Commit | Line | Data |
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2f7ca802 SG |
1 | /*************************************************************************** |
2 | * | |
3 | * Copyright (C) 2007-2008 SMSC | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
9cb00073 | 16 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
2f7ca802 SG |
17 | * |
18 | *****************************************************************************/ | |
19 | ||
20 | #include <linux/module.h> | |
21 | #include <linux/kmod.h> | |
2f7ca802 SG |
22 | #include <linux/netdevice.h> |
23 | #include <linux/etherdevice.h> | |
24 | #include <linux/ethtool.h> | |
25 | #include <linux/mii.h> | |
26 | #include <linux/usb.h> | |
bbd9f9ee SG |
27 | #include <linux/bitrev.h> |
28 | #include <linux/crc16.h> | |
2f7ca802 SG |
29 | #include <linux/crc32.h> |
30 | #include <linux/usb/usbnet.h> | |
5a0e3ad6 | 31 | #include <linux/slab.h> |
c489565b | 32 | #include <linux/of_net.h> |
2f7ca802 SG |
33 | #include "smsc95xx.h" |
34 | ||
35 | #define SMSC_CHIPNAME "smsc95xx" | |
f7b29271 | 36 | #define SMSC_DRIVER_VERSION "1.0.4" |
2f7ca802 SG |
37 | #define HS_USB_PKT_SIZE (512) |
38 | #define FS_USB_PKT_SIZE (64) | |
39 | #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) | |
40 | #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) | |
41 | #define DEFAULT_BULK_IN_DELAY (0x00002000) | |
42 | #define MAX_SINGLE_PACKET_SIZE (2048) | |
43 | #define LAN95XX_EEPROM_MAGIC (0x9500) | |
44 | #define EEPROM_MAC_OFFSET (0x01) | |
f7b29271 | 45 | #define DEFAULT_TX_CSUM_ENABLE (true) |
2f7ca802 SG |
46 | #define DEFAULT_RX_CSUM_ENABLE (true) |
47 | #define SMSC95XX_INTERNAL_PHY_ID (1) | |
48 | #define SMSC95XX_TX_OVERHEAD (8) | |
f7b29271 | 49 | #define SMSC95XX_TX_OVERHEAD_CSUM (12) |
e5e3af83 | 50 | #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \ |
bbd9f9ee | 51 | WAKE_MCAST | WAKE_ARP | WAKE_MAGIC) |
2f7ca802 | 52 | |
9ebca507 SG |
53 | #define FEATURE_8_WAKEUP_FILTERS (0x01) |
54 | #define FEATURE_PHY_NLP_CROSSOVER (0x02) | |
eb970ff0 | 55 | #define FEATURE_REMOTE_WAKEUP (0x04) |
9ebca507 | 56 | |
b2d4b150 SG |
57 | #define SUSPEND_SUSPEND0 (0x01) |
58 | #define SUSPEND_SUSPEND1 (0x02) | |
59 | #define SUSPEND_SUSPEND2 (0x04) | |
60 | #define SUSPEND_SUSPEND3 (0x08) | |
61 | #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ | |
62 | SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) | |
63 | ||
d69d1694 CF |
64 | #define CARRIER_CHECK_DELAY (2 * HZ) |
65 | ||
2f7ca802 SG |
66 | struct smsc95xx_priv { |
67 | u32 mac_cr; | |
3c0f3c60 MZ |
68 | u32 hash_hi; |
69 | u32 hash_lo; | |
e0e474a8 | 70 | u32 wolopts; |
2f7ca802 | 71 | spinlock_t mac_cr_lock; |
9ebca507 | 72 | u8 features; |
b2d4b150 | 73 | u8 suspend_flags; |
d69d1694 CF |
74 | bool link_ok; |
75 | struct delayed_work carrier_check; | |
76 | struct usbnet *dev; | |
2f7ca802 SG |
77 | }; |
78 | ||
eb939922 | 79 | static bool turbo_mode = true; |
2f7ca802 SG |
80 | module_param(turbo_mode, bool, 0644); |
81 | MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); | |
82 | ||
ec32115d ML |
83 | static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index, |
84 | u32 *data, int in_pm) | |
2f7ca802 | 85 | { |
72108fd2 | 86 | u32 buf; |
2f7ca802 | 87 | int ret; |
ec32115d | 88 | int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16); |
2f7ca802 SG |
89 | |
90 | BUG_ON(!dev); | |
91 | ||
ec32115d ML |
92 | if (!in_pm) |
93 | fn = usbnet_read_cmd; | |
94 | else | |
95 | fn = usbnet_read_cmd_nopm; | |
96 | ||
97 | ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN | |
98 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
99 | 0, index, &buf, 4); | |
5a36b68b | 100 | if (unlikely(ret < 0)) { |
1e1d7412 JP |
101 | netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", |
102 | index, ret); | |
5a36b68b DC |
103 | return ret; |
104 | } | |
2f7ca802 | 105 | |
72108fd2 ML |
106 | le32_to_cpus(&buf); |
107 | *data = buf; | |
2f7ca802 SG |
108 | |
109 | return ret; | |
110 | } | |
111 | ||
ec32115d ML |
112 | static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index, |
113 | u32 data, int in_pm) | |
2f7ca802 | 114 | { |
72108fd2 | 115 | u32 buf; |
2f7ca802 | 116 | int ret; |
ec32115d | 117 | int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16); |
2f7ca802 SG |
118 | |
119 | BUG_ON(!dev); | |
120 | ||
ec32115d ML |
121 | if (!in_pm) |
122 | fn = usbnet_write_cmd; | |
123 | else | |
124 | fn = usbnet_write_cmd_nopm; | |
125 | ||
72108fd2 ML |
126 | buf = data; |
127 | cpu_to_le32s(&buf); | |
2f7ca802 | 128 | |
ec32115d ML |
129 | ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT |
130 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
131 | 0, index, &buf, 4); | |
2f7ca802 | 132 | if (unlikely(ret < 0)) |
1e1d7412 JP |
133 | netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", |
134 | index, ret); | |
2f7ca802 | 135 | |
2f7ca802 SG |
136 | return ret; |
137 | } | |
138 | ||
ec32115d ML |
139 | static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index, |
140 | u32 *data) | |
141 | { | |
142 | return __smsc95xx_read_reg(dev, index, data, 1); | |
143 | } | |
144 | ||
145 | static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index, | |
146 | u32 data) | |
147 | { | |
148 | return __smsc95xx_write_reg(dev, index, data, 1); | |
149 | } | |
150 | ||
151 | static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index, | |
152 | u32 *data) | |
153 | { | |
154 | return __smsc95xx_read_reg(dev, index, data, 0); | |
155 | } | |
156 | ||
157 | static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index, | |
158 | u32 data) | |
159 | { | |
160 | return __smsc95xx_write_reg(dev, index, data, 0); | |
161 | } | |
e0e474a8 | 162 | |
2f7ca802 SG |
163 | /* Loop until the read is completed with timeout |
164 | * called with phy_mutex held */ | |
e5e3af83 SG |
165 | static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev, |
166 | int in_pm) | |
2f7ca802 SG |
167 | { |
168 | unsigned long start_time = jiffies; | |
169 | u32 val; | |
769ea6d8 | 170 | int ret; |
2f7ca802 SG |
171 | |
172 | do { | |
e5e3af83 | 173 | ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm); |
b052e073 SG |
174 | if (ret < 0) { |
175 | netdev_warn(dev->net, "Error reading MII_ACCESS\n"); | |
176 | return ret; | |
177 | } | |
178 | ||
2f7ca802 SG |
179 | if (!(val & MII_BUSY_)) |
180 | return 0; | |
181 | } while (!time_after(jiffies, start_time + HZ)); | |
182 | ||
183 | return -EIO; | |
184 | } | |
185 | ||
e5e3af83 SG |
186 | static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx, |
187 | int in_pm) | |
2f7ca802 SG |
188 | { |
189 | struct usbnet *dev = netdev_priv(netdev); | |
190 | u32 val, addr; | |
769ea6d8 | 191 | int ret; |
2f7ca802 SG |
192 | |
193 | mutex_lock(&dev->phy_mutex); | |
194 | ||
195 | /* confirm MII not busy */ | |
e5e3af83 | 196 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
197 | if (ret < 0) { |
198 | netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n"); | |
199 | goto done; | |
200 | } | |
2f7ca802 SG |
201 | |
202 | /* set the address, index & direction (read from PHY) */ | |
203 | phy_id &= dev->mii.phy_id_mask; | |
204 | idx &= dev->mii.reg_num_mask; | |
80928805 | 205 | addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_; |
e5e3af83 | 206 | ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); |
b052e073 SG |
207 | if (ret < 0) { |
208 | netdev_warn(dev->net, "Error writing MII_ADDR\n"); | |
209 | goto done; | |
210 | } | |
2f7ca802 | 211 | |
e5e3af83 | 212 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
213 | if (ret < 0) { |
214 | netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); | |
215 | goto done; | |
216 | } | |
2f7ca802 | 217 | |
e5e3af83 | 218 | ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm); |
b052e073 SG |
219 | if (ret < 0) { |
220 | netdev_warn(dev->net, "Error reading MII_DATA\n"); | |
221 | goto done; | |
222 | } | |
2f7ca802 | 223 | |
769ea6d8 | 224 | ret = (u16)(val & 0xFFFF); |
2f7ca802 | 225 | |
769ea6d8 SG |
226 | done: |
227 | mutex_unlock(&dev->phy_mutex); | |
228 | return ret; | |
2f7ca802 SG |
229 | } |
230 | ||
e5e3af83 SG |
231 | static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id, |
232 | int idx, int regval, int in_pm) | |
2f7ca802 SG |
233 | { |
234 | struct usbnet *dev = netdev_priv(netdev); | |
235 | u32 val, addr; | |
769ea6d8 | 236 | int ret; |
2f7ca802 SG |
237 | |
238 | mutex_lock(&dev->phy_mutex); | |
239 | ||
240 | /* confirm MII not busy */ | |
e5e3af83 | 241 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
242 | if (ret < 0) { |
243 | netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n"); | |
244 | goto done; | |
245 | } | |
2f7ca802 SG |
246 | |
247 | val = regval; | |
e5e3af83 | 248 | ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm); |
b052e073 SG |
249 | if (ret < 0) { |
250 | netdev_warn(dev->net, "Error writing MII_DATA\n"); | |
251 | goto done; | |
252 | } | |
2f7ca802 SG |
253 | |
254 | /* set the address, index & direction (write to PHY) */ | |
255 | phy_id &= dev->mii.phy_id_mask; | |
256 | idx &= dev->mii.reg_num_mask; | |
80928805 | 257 | addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_; |
e5e3af83 | 258 | ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); |
b052e073 SG |
259 | if (ret < 0) { |
260 | netdev_warn(dev->net, "Error writing MII_ADDR\n"); | |
261 | goto done; | |
262 | } | |
2f7ca802 | 263 | |
e5e3af83 | 264 | ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); |
b052e073 SG |
265 | if (ret < 0) { |
266 | netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); | |
267 | goto done; | |
268 | } | |
2f7ca802 | 269 | |
769ea6d8 | 270 | done: |
2f7ca802 SG |
271 | mutex_unlock(&dev->phy_mutex); |
272 | } | |
273 | ||
e5e3af83 SG |
274 | static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id, |
275 | int idx) | |
276 | { | |
277 | return __smsc95xx_mdio_read(netdev, phy_id, idx, 1); | |
278 | } | |
279 | ||
280 | static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id, | |
281 | int idx, int regval) | |
282 | { | |
283 | __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1); | |
284 | } | |
285 | ||
286 | static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) | |
287 | { | |
288 | return __smsc95xx_mdio_read(netdev, phy_id, idx, 0); | |
289 | } | |
290 | ||
291 | static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, | |
292 | int regval) | |
293 | { | |
294 | __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0); | |
295 | } | |
296 | ||
769ea6d8 | 297 | static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev) |
2f7ca802 SG |
298 | { |
299 | unsigned long start_time = jiffies; | |
300 | u32 val; | |
769ea6d8 | 301 | int ret; |
2f7ca802 SG |
302 | |
303 | do { | |
769ea6d8 | 304 | ret = smsc95xx_read_reg(dev, E2P_CMD, &val); |
b052e073 SG |
305 | if (ret < 0) { |
306 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
307 | return ret; | |
308 | } | |
309 | ||
2f7ca802 SG |
310 | if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) |
311 | break; | |
312 | udelay(40); | |
313 | } while (!time_after(jiffies, start_time + HZ)); | |
314 | ||
315 | if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { | |
60b86755 | 316 | netdev_warn(dev->net, "EEPROM read operation timeout\n"); |
2f7ca802 SG |
317 | return -EIO; |
318 | } | |
319 | ||
320 | return 0; | |
321 | } | |
322 | ||
769ea6d8 | 323 | static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) |
2f7ca802 SG |
324 | { |
325 | unsigned long start_time = jiffies; | |
326 | u32 val; | |
769ea6d8 | 327 | int ret; |
2f7ca802 SG |
328 | |
329 | do { | |
769ea6d8 | 330 | ret = smsc95xx_read_reg(dev, E2P_CMD, &val); |
b052e073 SG |
331 | if (ret < 0) { |
332 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
333 | return ret; | |
334 | } | |
2f7ca802 | 335 | |
2f7ca802 SG |
336 | if (!(val & E2P_CMD_BUSY_)) |
337 | return 0; | |
338 | ||
339 | udelay(40); | |
340 | } while (!time_after(jiffies, start_time + HZ)); | |
341 | ||
60b86755 | 342 | netdev_warn(dev->net, "EEPROM is busy\n"); |
2f7ca802 SG |
343 | return -EIO; |
344 | } | |
345 | ||
346 | static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
347 | u8 *data) | |
348 | { | |
349 | u32 val; | |
350 | int i, ret; | |
351 | ||
352 | BUG_ON(!dev); | |
353 | BUG_ON(!data); | |
354 | ||
355 | ret = smsc95xx_eeprom_confirm_not_busy(dev); | |
356 | if (ret) | |
357 | return ret; | |
358 | ||
359 | for (i = 0; i < length; i++) { | |
360 | val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); | |
769ea6d8 | 361 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
362 | if (ret < 0) { |
363 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
364 | return ret; | |
365 | } | |
2f7ca802 SG |
366 | |
367 | ret = smsc95xx_wait_eeprom(dev); | |
368 | if (ret < 0) | |
369 | return ret; | |
370 | ||
769ea6d8 | 371 | ret = smsc95xx_read_reg(dev, E2P_DATA, &val); |
b052e073 SG |
372 | if (ret < 0) { |
373 | netdev_warn(dev->net, "Error reading E2P_DATA\n"); | |
374 | return ret; | |
375 | } | |
2f7ca802 SG |
376 | |
377 | data[i] = val & 0xFF; | |
378 | offset++; | |
379 | } | |
380 | ||
381 | return 0; | |
382 | } | |
383 | ||
384 | static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
385 | u8 *data) | |
386 | { | |
387 | u32 val; | |
388 | int i, ret; | |
389 | ||
390 | BUG_ON(!dev); | |
391 | BUG_ON(!data); | |
392 | ||
393 | ret = smsc95xx_eeprom_confirm_not_busy(dev); | |
394 | if (ret) | |
395 | return ret; | |
396 | ||
397 | /* Issue write/erase enable command */ | |
398 | val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; | |
769ea6d8 | 399 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
400 | if (ret < 0) { |
401 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
402 | return ret; | |
403 | } | |
2f7ca802 SG |
404 | |
405 | ret = smsc95xx_wait_eeprom(dev); | |
406 | if (ret < 0) | |
407 | return ret; | |
408 | ||
409 | for (i = 0; i < length; i++) { | |
410 | ||
411 | /* Fill data register */ | |
412 | val = data[i]; | |
769ea6d8 | 413 | ret = smsc95xx_write_reg(dev, E2P_DATA, val); |
b052e073 SG |
414 | if (ret < 0) { |
415 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
416 | return ret; | |
417 | } | |
2f7ca802 SG |
418 | |
419 | /* Send "write" command */ | |
420 | val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); | |
769ea6d8 | 421 | ret = smsc95xx_write_reg(dev, E2P_CMD, val); |
b052e073 SG |
422 | if (ret < 0) { |
423 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
424 | return ret; | |
425 | } | |
2f7ca802 SG |
426 | |
427 | ret = smsc95xx_wait_eeprom(dev); | |
428 | if (ret < 0) | |
429 | return ret; | |
430 | ||
431 | offset++; | |
432 | } | |
433 | ||
434 | return 0; | |
435 | } | |
436 | ||
769ea6d8 | 437 | static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index, |
7b9e7580 | 438 | u32 data) |
2f7ca802 | 439 | { |
1d74a6bd | 440 | const u16 size = 4; |
7b9e7580 | 441 | u32 buf; |
72108fd2 | 442 | int ret; |
2f7ca802 | 443 | |
7b9e7580 SG |
444 | buf = data; |
445 | cpu_to_le32s(&buf); | |
446 | ||
72108fd2 ML |
447 | ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, |
448 | USB_DIR_OUT | USB_TYPE_VENDOR | | |
449 | USB_RECIP_DEVICE, | |
7b9e7580 | 450 | 0, index, &buf, size); |
72108fd2 ML |
451 | if (ret < 0) |
452 | netdev_warn(dev->net, "Error write async cmd, sts=%d\n", | |
453 | ret); | |
454 | return ret; | |
2f7ca802 SG |
455 | } |
456 | ||
457 | /* returns hash bit number for given MAC address | |
458 | * example: | |
459 | * 01 00 5E 00 00 01 -> returns bit number 31 */ | |
460 | static unsigned int smsc95xx_hash(char addr[ETH_ALEN]) | |
461 | { | |
462 | return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; | |
463 | } | |
464 | ||
465 | static void smsc95xx_set_multicast(struct net_device *netdev) | |
466 | { | |
467 | struct usbnet *dev = netdev_priv(netdev); | |
468 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
2f7ca802 | 469 | unsigned long flags; |
769ea6d8 | 470 | int ret; |
2f7ca802 | 471 | |
3c0f3c60 MZ |
472 | pdata->hash_hi = 0; |
473 | pdata->hash_lo = 0; | |
474 | ||
2f7ca802 SG |
475 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); |
476 | ||
477 | if (dev->net->flags & IFF_PROMISC) { | |
a475f603 | 478 | netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); |
2f7ca802 SG |
479 | pdata->mac_cr |= MAC_CR_PRMS_; |
480 | pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_); | |
481 | } else if (dev->net->flags & IFF_ALLMULTI) { | |
a475f603 | 482 | netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); |
2f7ca802 SG |
483 | pdata->mac_cr |= MAC_CR_MCPAS_; |
484 | pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_); | |
4cd24eaf | 485 | } else if (!netdev_mc_empty(dev->net)) { |
22bedad3 | 486 | struct netdev_hw_addr *ha; |
2f7ca802 SG |
487 | |
488 | pdata->mac_cr |= MAC_CR_HPFILT_; | |
489 | pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); | |
490 | ||
22bedad3 JP |
491 | netdev_for_each_mc_addr(ha, netdev) { |
492 | u32 bitnum = smsc95xx_hash(ha->addr); | |
a92635dc JP |
493 | u32 mask = 0x01 << (bitnum & 0x1F); |
494 | if (bitnum & 0x20) | |
3c0f3c60 | 495 | pdata->hash_hi |= mask; |
a92635dc | 496 | else |
3c0f3c60 | 497 | pdata->hash_lo |= mask; |
2f7ca802 SG |
498 | } |
499 | ||
a475f603 | 500 | netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n", |
3c0f3c60 | 501 | pdata->hash_hi, pdata->hash_lo); |
2f7ca802 | 502 | } else { |
a475f603 | 503 | netif_dbg(dev, drv, dev->net, "receive own packets only\n"); |
2f7ca802 SG |
504 | pdata->mac_cr &= |
505 | ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); | |
506 | } | |
507 | ||
508 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
509 | ||
510 | /* Initiate async writes, as we can't wait for completion here */ | |
7b9e7580 | 511 | ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi); |
b052e073 SG |
512 | if (ret < 0) |
513 | netdev_warn(dev->net, "failed to initiate async write to HASHH\n"); | |
769ea6d8 | 514 | |
7b9e7580 | 515 | ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo); |
b052e073 SG |
516 | if (ret < 0) |
517 | netdev_warn(dev->net, "failed to initiate async write to HASHL\n"); | |
769ea6d8 | 518 | |
7b9e7580 | 519 | ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr); |
b052e073 SG |
520 | if (ret < 0) |
521 | netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n"); | |
2f7ca802 SG |
522 | } |
523 | ||
769ea6d8 SG |
524 | static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex, |
525 | u16 lcladv, u16 rmtadv) | |
2f7ca802 SG |
526 | { |
527 | u32 flow, afc_cfg = 0; | |
528 | ||
529 | int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); | |
e360a8b4 | 530 | if (ret < 0) |
b052e073 | 531 | return ret; |
2f7ca802 SG |
532 | |
533 | if (duplex == DUPLEX_FULL) { | |
bc02ff95 | 534 | u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); |
2f7ca802 SG |
535 | |
536 | if (cap & FLOW_CTRL_RX) | |
537 | flow = 0xFFFF0002; | |
538 | else | |
539 | flow = 0; | |
540 | ||
541 | if (cap & FLOW_CTRL_TX) | |
542 | afc_cfg |= 0xF; | |
543 | else | |
544 | afc_cfg &= ~0xF; | |
545 | ||
a475f603 | 546 | netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", |
60b86755 JP |
547 | cap & FLOW_CTRL_RX ? "enabled" : "disabled", |
548 | cap & FLOW_CTRL_TX ? "enabled" : "disabled"); | |
2f7ca802 | 549 | } else { |
a475f603 | 550 | netif_dbg(dev, link, dev->net, "half duplex\n"); |
2f7ca802 SG |
551 | flow = 0; |
552 | afc_cfg |= 0xF; | |
553 | } | |
554 | ||
769ea6d8 | 555 | ret = smsc95xx_write_reg(dev, FLOW, flow); |
b052e073 | 556 | if (ret < 0) |
e360a8b4 | 557 | return ret; |
769ea6d8 | 558 | |
e360a8b4 | 559 | return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); |
2f7ca802 SG |
560 | } |
561 | ||
562 | static int smsc95xx_link_reset(struct usbnet *dev) | |
563 | { | |
564 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
565 | struct mii_if_info *mii = &dev->mii; | |
8ae6daca | 566 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
2f7ca802 SG |
567 | unsigned long flags; |
568 | u16 lcladv, rmtadv; | |
769ea6d8 | 569 | int ret; |
2f7ca802 SG |
570 | |
571 | /* clear interrupt status */ | |
769ea6d8 | 572 | ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); |
e360a8b4 | 573 | if (ret < 0) |
b052e073 | 574 | return ret; |
769ea6d8 SG |
575 | |
576 | ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); | |
e360a8b4 | 577 | if (ret < 0) |
b052e073 | 578 | return ret; |
2f7ca802 SG |
579 | |
580 | mii_check_media(mii, 1, 1); | |
581 | mii_ethtool_gset(&dev->mii, &ecmd); | |
582 | lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); | |
583 | rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA); | |
584 | ||
8ae6daca DD |
585 | netif_dbg(dev, link, dev->net, |
586 | "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", | |
587 | ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv); | |
2f7ca802 SG |
588 | |
589 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
590 | if (ecmd.duplex != DUPLEX_FULL) { | |
591 | pdata->mac_cr &= ~MAC_CR_FDPX_; | |
592 | pdata->mac_cr |= MAC_CR_RCVOWN_; | |
593 | } else { | |
594 | pdata->mac_cr &= ~MAC_CR_RCVOWN_; | |
595 | pdata->mac_cr |= MAC_CR_FDPX_; | |
596 | } | |
597 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
598 | ||
769ea6d8 | 599 | ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
e360a8b4 | 600 | if (ret < 0) |
b052e073 | 601 | return ret; |
2f7ca802 | 602 | |
769ea6d8 | 603 | ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); |
b052e073 SG |
604 | if (ret < 0) |
605 | netdev_warn(dev->net, "Error updating PHY flow control\n"); | |
2f7ca802 | 606 | |
b052e073 | 607 | return ret; |
2f7ca802 SG |
608 | } |
609 | ||
610 | static void smsc95xx_status(struct usbnet *dev, struct urb *urb) | |
611 | { | |
612 | u32 intdata; | |
613 | ||
614 | if (urb->actual_length != 4) { | |
60b86755 JP |
615 | netdev_warn(dev->net, "unexpected urb length %d\n", |
616 | urb->actual_length); | |
2f7ca802 SG |
617 | return; |
618 | } | |
619 | ||
620 | memcpy(&intdata, urb->transfer_buffer, 4); | |
1d74a6bd | 621 | le32_to_cpus(&intdata); |
2f7ca802 | 622 | |
a475f603 | 623 | netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); |
2f7ca802 SG |
624 | |
625 | if (intdata & INT_ENP_PHY_INT_) | |
626 | usbnet_defer_kevent(dev, EVENT_LINK_RESET); | |
627 | else | |
60b86755 JP |
628 | netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", |
629 | intdata); | |
2f7ca802 SG |
630 | } |
631 | ||
d69d1694 CF |
632 | static void set_carrier(struct usbnet *dev, bool link) |
633 | { | |
634 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
635 | ||
636 | if (pdata->link_ok == link) | |
637 | return; | |
638 | ||
639 | pdata->link_ok = link; | |
640 | ||
641 | if (link) | |
642 | usbnet_link_change(dev, 1, 0); | |
643 | else | |
644 | usbnet_link_change(dev, 0, 0); | |
645 | } | |
646 | ||
647 | static void check_carrier(struct work_struct *work) | |
648 | { | |
649 | struct smsc95xx_priv *pdata = container_of(work, struct smsc95xx_priv, | |
650 | carrier_check.work); | |
651 | struct usbnet *dev = pdata->dev; | |
652 | int ret; | |
653 | ||
654 | if (pdata->suspend_flags != 0) | |
655 | return; | |
656 | ||
657 | ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMSR); | |
658 | if (ret < 0) { | |
659 | netdev_warn(dev->net, "Failed to read MII_BMSR\n"); | |
660 | return; | |
661 | } | |
662 | if (ret & BMSR_LSTATUS) | |
663 | set_carrier(dev, 1); | |
664 | else | |
665 | set_carrier(dev, 0); | |
666 | ||
667 | schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY); | |
668 | } | |
669 | ||
f7b29271 | 670 | /* Enable or disable Tx & Rx checksum offload engines */ |
c8f44aff MM |
671 | static int smsc95xx_set_features(struct net_device *netdev, |
672 | netdev_features_t features) | |
2f7ca802 | 673 | { |
78e47fe4 | 674 | struct usbnet *dev = netdev_priv(netdev); |
2f7ca802 | 675 | u32 read_buf; |
78e47fe4 MM |
676 | int ret; |
677 | ||
678 | ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); | |
e360a8b4 | 679 | if (ret < 0) |
b052e073 | 680 | return ret; |
2f7ca802 | 681 | |
78e47fe4 | 682 | if (features & NETIF_F_HW_CSUM) |
f7b29271 SG |
683 | read_buf |= Tx_COE_EN_; |
684 | else | |
685 | read_buf &= ~Tx_COE_EN_; | |
686 | ||
78e47fe4 | 687 | if (features & NETIF_F_RXCSUM) |
2f7ca802 SG |
688 | read_buf |= Rx_COE_EN_; |
689 | else | |
690 | read_buf &= ~Rx_COE_EN_; | |
691 | ||
692 | ret = smsc95xx_write_reg(dev, COE_CR, read_buf); | |
e360a8b4 | 693 | if (ret < 0) |
b052e073 | 694 | return ret; |
2f7ca802 | 695 | |
a475f603 | 696 | netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); |
2f7ca802 SG |
697 | return 0; |
698 | } | |
699 | ||
700 | static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net) | |
701 | { | |
702 | return MAX_EEPROM_SIZE; | |
703 | } | |
704 | ||
705 | static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev, | |
706 | struct ethtool_eeprom *ee, u8 *data) | |
707 | { | |
708 | struct usbnet *dev = netdev_priv(netdev); | |
709 | ||
710 | ee->magic = LAN95XX_EEPROM_MAGIC; | |
711 | ||
712 | return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); | |
713 | } | |
714 | ||
715 | static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev, | |
716 | struct ethtool_eeprom *ee, u8 *data) | |
717 | { | |
718 | struct usbnet *dev = netdev_priv(netdev); | |
719 | ||
720 | if (ee->magic != LAN95XX_EEPROM_MAGIC) { | |
60b86755 JP |
721 | netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n", |
722 | ee->magic); | |
2f7ca802 SG |
723 | return -EINVAL; |
724 | } | |
725 | ||
726 | return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); | |
727 | } | |
728 | ||
9fa32e94 EV |
729 | static int smsc95xx_ethtool_getregslen(struct net_device *netdev) |
730 | { | |
731 | /* all smsc95xx registers */ | |
96245317 | 732 | return COE_CR - ID_REV + sizeof(u32); |
9fa32e94 EV |
733 | } |
734 | ||
735 | static void | |
736 | smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs, | |
737 | void *buf) | |
738 | { | |
739 | struct usbnet *dev = netdev_priv(netdev); | |
d348446b DC |
740 | unsigned int i, j; |
741 | int retval; | |
9fa32e94 EV |
742 | u32 *data = buf; |
743 | ||
744 | retval = smsc95xx_read_reg(dev, ID_REV, ®s->version); | |
745 | if (retval < 0) { | |
746 | netdev_warn(netdev, "REGS: cannot read ID_REV\n"); | |
747 | return; | |
748 | } | |
749 | ||
750 | for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) { | |
751 | retval = smsc95xx_read_reg(dev, i, &data[j]); | |
752 | if (retval < 0) { | |
753 | netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i); | |
754 | return; | |
755 | } | |
756 | } | |
757 | } | |
758 | ||
e0e474a8 SG |
759 | static void smsc95xx_ethtool_get_wol(struct net_device *net, |
760 | struct ethtool_wolinfo *wolinfo) | |
761 | { | |
762 | struct usbnet *dev = netdev_priv(net); | |
763 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
764 | ||
765 | wolinfo->supported = SUPPORTED_WAKE; | |
766 | wolinfo->wolopts = pdata->wolopts; | |
767 | } | |
768 | ||
769 | static int smsc95xx_ethtool_set_wol(struct net_device *net, | |
770 | struct ethtool_wolinfo *wolinfo) | |
771 | { | |
772 | struct usbnet *dev = netdev_priv(net); | |
773 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
3b14692c | 774 | int ret; |
e0e474a8 SG |
775 | |
776 | pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE; | |
3b14692c SG |
777 | |
778 | ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); | |
b052e073 SG |
779 | if (ret < 0) |
780 | netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); | |
3b14692c | 781 | |
b052e073 | 782 | return ret; |
e0e474a8 SG |
783 | } |
784 | ||
0fc0b732 | 785 | static const struct ethtool_ops smsc95xx_ethtool_ops = { |
2f7ca802 SG |
786 | .get_link = usbnet_get_link, |
787 | .nway_reset = usbnet_nway_reset, | |
788 | .get_drvinfo = usbnet_get_drvinfo, | |
789 | .get_msglevel = usbnet_get_msglevel, | |
790 | .set_msglevel = usbnet_set_msglevel, | |
791 | .get_settings = usbnet_get_settings, | |
792 | .set_settings = usbnet_set_settings, | |
793 | .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len, | |
794 | .get_eeprom = smsc95xx_ethtool_get_eeprom, | |
795 | .set_eeprom = smsc95xx_ethtool_set_eeprom, | |
9fa32e94 EV |
796 | .get_regs_len = smsc95xx_ethtool_getregslen, |
797 | .get_regs = smsc95xx_ethtool_getregs, | |
e0e474a8 SG |
798 | .get_wol = smsc95xx_ethtool_get_wol, |
799 | .set_wol = smsc95xx_ethtool_set_wol, | |
2f7ca802 SG |
800 | }; |
801 | ||
802 | static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
803 | { | |
804 | struct usbnet *dev = netdev_priv(netdev); | |
805 | ||
806 | if (!netif_running(netdev)) | |
807 | return -EINVAL; | |
808 | ||
809 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | |
810 | } | |
811 | ||
812 | static void smsc95xx_init_mac_address(struct usbnet *dev) | |
813 | { | |
c489565b AB |
814 | const u8 *mac_addr; |
815 | ||
816 | /* maybe the boot loader passed the MAC address in devicetree */ | |
817 | mac_addr = of_get_mac_address(dev->udev->dev.of_node); | |
818 | if (mac_addr) { | |
819 | memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN); | |
820 | return; | |
821 | } | |
822 | ||
2f7ca802 SG |
823 | /* try reading mac address from EEPROM */ |
824 | if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, | |
825 | dev->net->dev_addr) == 0) { | |
826 | if (is_valid_ether_addr(dev->net->dev_addr)) { | |
827 | /* eeprom values are valid so use them */ | |
a475f603 | 828 | netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n"); |
2f7ca802 SG |
829 | return; |
830 | } | |
831 | } | |
832 | ||
c489565b | 833 | /* no useful static MAC address found. generate a random one */ |
f2cedb63 | 834 | eth_hw_addr_random(dev->net); |
c7e12ead | 835 | netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); |
2f7ca802 SG |
836 | } |
837 | ||
838 | static int smsc95xx_set_mac_address(struct usbnet *dev) | |
839 | { | |
840 | u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | | |
841 | dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; | |
842 | u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; | |
843 | int ret; | |
844 | ||
845 | ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); | |
b052e073 | 846 | if (ret < 0) |
e360a8b4 | 847 | return ret; |
2f7ca802 | 848 | |
e360a8b4 | 849 | return smsc95xx_write_reg(dev, ADDRH, addr_hi); |
2f7ca802 SG |
850 | } |
851 | ||
852 | /* starts the TX path */ | |
769ea6d8 | 853 | static int smsc95xx_start_tx_path(struct usbnet *dev) |
2f7ca802 SG |
854 | { |
855 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
856 | unsigned long flags; | |
769ea6d8 | 857 | int ret; |
2f7ca802 SG |
858 | |
859 | /* Enable Tx at MAC */ | |
860 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
861 | pdata->mac_cr |= MAC_CR_TXEN_; | |
862 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
863 | ||
769ea6d8 | 864 | ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); |
e360a8b4 | 865 | if (ret < 0) |
b052e073 | 866 | return ret; |
2f7ca802 SG |
867 | |
868 | /* Enable Tx at SCSRs */ | |
e360a8b4 | 869 | return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_); |
2f7ca802 SG |
870 | } |
871 | ||
872 | /* Starts the Receive path */ | |
ec32115d | 873 | static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm) |
2f7ca802 SG |
874 | { |
875 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
876 | unsigned long flags; | |
877 | ||
878 | spin_lock_irqsave(&pdata->mac_cr_lock, flags); | |
879 | pdata->mac_cr |= MAC_CR_RXEN_; | |
880 | spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); | |
881 | ||
e360a8b4 | 882 | return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm); |
2f7ca802 SG |
883 | } |
884 | ||
885 | static int smsc95xx_phy_initialize(struct usbnet *dev) | |
886 | { | |
769ea6d8 | 887 | int bmcr, ret, timeout = 0; |
db443c44 | 888 | |
2f7ca802 SG |
889 | /* Initialize MII structure */ |
890 | dev->mii.dev = dev->net; | |
891 | dev->mii.mdio_read = smsc95xx_mdio_read; | |
892 | dev->mii.mdio_write = smsc95xx_mdio_write; | |
893 | dev->mii.phy_id_mask = 0x1f; | |
894 | dev->mii.reg_num_mask = 0x1f; | |
895 | dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID; | |
896 | ||
db443c44 | 897 | /* reset phy and wait for reset to complete */ |
2f7ca802 | 898 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); |
db443c44 SG |
899 | |
900 | do { | |
901 | msleep(10); | |
902 | bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); | |
903 | timeout++; | |
d9460920 | 904 | } while ((bmcr & BMCR_RESET) && (timeout < 100)); |
db443c44 SG |
905 | |
906 | if (timeout >= 100) { | |
907 | netdev_warn(dev->net, "timeout on PHY Reset"); | |
908 | return -EIO; | |
909 | } | |
910 | ||
2f7ca802 SG |
911 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, |
912 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | | |
913 | ADVERTISE_PAUSE_ASYM); | |
914 | ||
915 | /* read to clear */ | |
769ea6d8 | 916 | ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); |
b052e073 SG |
917 | if (ret < 0) { |
918 | netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n"); | |
919 | return ret; | |
920 | } | |
2f7ca802 SG |
921 | |
922 | smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, | |
923 | PHY_INT_MASK_DEFAULT_); | |
924 | mii_nway_restart(&dev->mii); | |
925 | ||
a475f603 | 926 | netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); |
2f7ca802 SG |
927 | return 0; |
928 | } | |
929 | ||
930 | static int smsc95xx_reset(struct usbnet *dev) | |
931 | { | |
932 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
933 | u32 read_buf, write_buf, burst_cap; | |
934 | int ret = 0, timeout; | |
2f7ca802 | 935 | |
a475f603 | 936 | netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); |
2f7ca802 | 937 | |
4436761b | 938 | ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_); |
e360a8b4 | 939 | if (ret < 0) |
b052e073 | 940 | return ret; |
2f7ca802 SG |
941 | |
942 | timeout = 0; | |
943 | do { | |
cf2acec2 | 944 | msleep(10); |
2f7ca802 | 945 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); |
e360a8b4 | 946 | if (ret < 0) |
b052e073 | 947 | return ret; |
2f7ca802 SG |
948 | timeout++; |
949 | } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); | |
950 | ||
951 | if (timeout >= 100) { | |
60b86755 | 952 | netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n"); |
2f7ca802 SG |
953 | return ret; |
954 | } | |
955 | ||
4436761b | 956 | ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_); |
e360a8b4 | 957 | if (ret < 0) |
b052e073 | 958 | return ret; |
2f7ca802 SG |
959 | |
960 | timeout = 0; | |
961 | do { | |
cf2acec2 | 962 | msleep(10); |
2f7ca802 | 963 | ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); |
e360a8b4 | 964 | if (ret < 0) |
b052e073 | 965 | return ret; |
2f7ca802 SG |
966 | timeout++; |
967 | } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); | |
968 | ||
969 | if (timeout >= 100) { | |
60b86755 | 970 | netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); |
2f7ca802 SG |
971 | return ret; |
972 | } | |
973 | ||
2f7ca802 SG |
974 | ret = smsc95xx_set_mac_address(dev); |
975 | if (ret < 0) | |
976 | return ret; | |
977 | ||
1e1d7412 JP |
978 | netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", |
979 | dev->net->dev_addr); | |
2f7ca802 SG |
980 | |
981 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 982 | if (ret < 0) |
b052e073 | 983 | return ret; |
2f7ca802 | 984 | |
1e1d7412 JP |
985 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", |
986 | read_buf); | |
2f7ca802 SG |
987 | |
988 | read_buf |= HW_CFG_BIR_; | |
989 | ||
990 | ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); | |
e360a8b4 | 991 | if (ret < 0) |
b052e073 | 992 | return ret; |
2f7ca802 SG |
993 | |
994 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 995 | if (ret < 0) |
b052e073 | 996 | return ret; |
b052e073 | 997 | |
a475f603 JP |
998 | netif_dbg(dev, ifup, dev->net, |
999 | "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n", | |
1000 | read_buf); | |
2f7ca802 SG |
1001 | |
1002 | if (!turbo_mode) { | |
1003 | burst_cap = 0; | |
1004 | dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; | |
1005 | } else if (dev->udev->speed == USB_SPEED_HIGH) { | |
1006 | burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; | |
1007 | dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; | |
1008 | } else { | |
1009 | burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; | |
1010 | dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; | |
1011 | } | |
1012 | ||
1e1d7412 JP |
1013 | netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", |
1014 | (ulong)dev->rx_urb_size); | |
2f7ca802 SG |
1015 | |
1016 | ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); | |
e360a8b4 | 1017 | if (ret < 0) |
b052e073 | 1018 | return ret; |
2f7ca802 SG |
1019 | |
1020 | ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); | |
e360a8b4 | 1021 | if (ret < 0) |
b052e073 | 1022 | return ret; |
769ea6d8 | 1023 | |
a475f603 JP |
1024 | netif_dbg(dev, ifup, dev->net, |
1025 | "Read Value from BURST_CAP after writing: 0x%08x\n", | |
1026 | read_buf); | |
2f7ca802 | 1027 | |
4436761b | 1028 | ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); |
e360a8b4 | 1029 | if (ret < 0) |
b052e073 | 1030 | return ret; |
2f7ca802 SG |
1031 | |
1032 | ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); | |
e360a8b4 | 1033 | if (ret < 0) |
b052e073 | 1034 | return ret; |
769ea6d8 | 1035 | |
a475f603 JP |
1036 | netif_dbg(dev, ifup, dev->net, |
1037 | "Read Value from BULK_IN_DLY after writing: 0x%08x\n", | |
1038 | read_buf); | |
2f7ca802 SG |
1039 | |
1040 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 1041 | if (ret < 0) |
b052e073 | 1042 | return ret; |
769ea6d8 | 1043 | |
1e1d7412 JP |
1044 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n", |
1045 | read_buf); | |
2f7ca802 SG |
1046 | |
1047 | if (turbo_mode) | |
1048 | read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); | |
1049 | ||
1050 | read_buf &= ~HW_CFG_RXDOFF_; | |
1051 | ||
1052 | /* set Rx data offset=2, Make IP header aligns on word boundary. */ | |
1053 | read_buf |= NET_IP_ALIGN << 9; | |
1054 | ||
1055 | ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); | |
e360a8b4 | 1056 | if (ret < 0) |
b052e073 | 1057 | return ret; |
2f7ca802 SG |
1058 | |
1059 | ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); | |
e360a8b4 | 1060 | if (ret < 0) |
b052e073 | 1061 | return ret; |
769ea6d8 | 1062 | |
a475f603 JP |
1063 | netif_dbg(dev, ifup, dev->net, |
1064 | "Read Value from HW_CFG after writing: 0x%08x\n", read_buf); | |
2f7ca802 | 1065 | |
4436761b | 1066 | ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); |
e360a8b4 | 1067 | if (ret < 0) |
b052e073 | 1068 | return ret; |
2f7ca802 SG |
1069 | |
1070 | ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); | |
e360a8b4 | 1071 | if (ret < 0) |
b052e073 | 1072 | return ret; |
a475f603 | 1073 | netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); |
2f7ca802 | 1074 | |
f293501c SG |
1075 | /* Configure GPIO pins as LED outputs */ |
1076 | write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | | |
1077 | LED_GPIO_CFG_FDX_LED; | |
1078 | ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); | |
e360a8b4 | 1079 | if (ret < 0) |
b052e073 | 1080 | return ret; |
f293501c | 1081 | |
2f7ca802 | 1082 | /* Init Tx */ |
4436761b | 1083 | ret = smsc95xx_write_reg(dev, FLOW, 0); |
e360a8b4 | 1084 | if (ret < 0) |
b052e073 | 1085 | return ret; |
2f7ca802 | 1086 | |
4436761b | 1087 | ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT); |
e360a8b4 | 1088 | if (ret < 0) |
b052e073 | 1089 | return ret; |
2f7ca802 SG |
1090 | |
1091 | /* Don't need mac_cr_lock during initialisation */ | |
1092 | ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); | |
e360a8b4 | 1093 | if (ret < 0) |
b052e073 | 1094 | return ret; |
2f7ca802 SG |
1095 | |
1096 | /* Init Rx */ | |
1097 | /* Set Vlan */ | |
4436761b | 1098 | ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q); |
e360a8b4 | 1099 | if (ret < 0) |
b052e073 | 1100 | return ret; |
2f7ca802 | 1101 | |
f7b29271 | 1102 | /* Enable or disable checksum offload engines */ |
769ea6d8 | 1103 | ret = smsc95xx_set_features(dev->net, dev->net->features); |
b052e073 SG |
1104 | if (ret < 0) { |
1105 | netdev_warn(dev->net, "Failed to set checksum offload features\n"); | |
1106 | return ret; | |
1107 | } | |
2f7ca802 SG |
1108 | |
1109 | smsc95xx_set_multicast(dev->net); | |
1110 | ||
769ea6d8 | 1111 | ret = smsc95xx_phy_initialize(dev); |
b052e073 SG |
1112 | if (ret < 0) { |
1113 | netdev_warn(dev->net, "Failed to init PHY\n"); | |
1114 | return ret; | |
1115 | } | |
2f7ca802 SG |
1116 | |
1117 | ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); | |
e360a8b4 | 1118 | if (ret < 0) |
b052e073 | 1119 | return ret; |
2f7ca802 SG |
1120 | |
1121 | /* enable PHY interrupts */ | |
1122 | read_buf |= INT_EP_CTL_PHY_INT_; | |
1123 | ||
1124 | ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); | |
e360a8b4 | 1125 | if (ret < 0) |
b052e073 | 1126 | return ret; |
2f7ca802 | 1127 | |
769ea6d8 | 1128 | ret = smsc95xx_start_tx_path(dev); |
b052e073 SG |
1129 | if (ret < 0) { |
1130 | netdev_warn(dev->net, "Failed to start TX path\n"); | |
1131 | return ret; | |
1132 | } | |
769ea6d8 | 1133 | |
ec32115d | 1134 | ret = smsc95xx_start_rx_path(dev, 0); |
b052e073 SG |
1135 | if (ret < 0) { |
1136 | netdev_warn(dev->net, "Failed to start RX path\n"); | |
1137 | return ret; | |
1138 | } | |
2f7ca802 | 1139 | |
a475f603 | 1140 | netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); |
2f7ca802 SG |
1141 | return 0; |
1142 | } | |
1143 | ||
63e77b39 SH |
1144 | static const struct net_device_ops smsc95xx_netdev_ops = { |
1145 | .ndo_open = usbnet_open, | |
1146 | .ndo_stop = usbnet_stop, | |
1147 | .ndo_start_xmit = usbnet_start_xmit, | |
1148 | .ndo_tx_timeout = usbnet_tx_timeout, | |
1149 | .ndo_change_mtu = usbnet_change_mtu, | |
1150 | .ndo_set_mac_address = eth_mac_addr, | |
1151 | .ndo_validate_addr = eth_validate_addr, | |
1152 | .ndo_do_ioctl = smsc95xx_ioctl, | |
afc4b13d | 1153 | .ndo_set_rx_mode = smsc95xx_set_multicast, |
78e47fe4 | 1154 | .ndo_set_features = smsc95xx_set_features, |
63e77b39 SH |
1155 | }; |
1156 | ||
2f7ca802 SG |
1157 | static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) |
1158 | { | |
1159 | struct smsc95xx_priv *pdata = NULL; | |
bbd9f9ee | 1160 | u32 val; |
2f7ca802 SG |
1161 | int ret; |
1162 | ||
1163 | printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); | |
1164 | ||
1165 | ret = usbnet_get_endpoints(dev, intf); | |
b052e073 SG |
1166 | if (ret < 0) { |
1167 | netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); | |
1168 | return ret; | |
1169 | } | |
2f7ca802 SG |
1170 | |
1171 | dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), | |
38673c82 | 1172 | GFP_KERNEL); |
2f7ca802 SG |
1173 | |
1174 | pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
38673c82 | 1175 | if (!pdata) |
2f7ca802 | 1176 | return -ENOMEM; |
2f7ca802 SG |
1177 | |
1178 | spin_lock_init(&pdata->mac_cr_lock); | |
1179 | ||
78e47fe4 MM |
1180 | if (DEFAULT_TX_CSUM_ENABLE) |
1181 | dev->net->features |= NETIF_F_HW_CSUM; | |
1182 | if (DEFAULT_RX_CSUM_ENABLE) | |
1183 | dev->net->features |= NETIF_F_RXCSUM; | |
1184 | ||
1185 | dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM; | |
2f7ca802 | 1186 | |
f4e8ab7c BB |
1187 | smsc95xx_init_mac_address(dev); |
1188 | ||
2f7ca802 SG |
1189 | /* Init all registers */ |
1190 | ret = smsc95xx_reset(dev); | |
1191 | ||
bbd9f9ee SG |
1192 | /* detect device revision as different features may be available */ |
1193 | ret = smsc95xx_read_reg(dev, ID_REV, &val); | |
e360a8b4 | 1194 | if (ret < 0) |
b052e073 | 1195 | return ret; |
bbd9f9ee | 1196 | val >>= 16; |
9ebca507 SG |
1197 | |
1198 | if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) || | |
1199 | (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_)) | |
1200 | pdata->features = (FEATURE_8_WAKEUP_FILTERS | | |
1201 | FEATURE_PHY_NLP_CROSSOVER | | |
eb970ff0 | 1202 | FEATURE_REMOTE_WAKEUP); |
9ebca507 SG |
1203 | else if (val == ID_REV_CHIP_ID_9512_) |
1204 | pdata->features = FEATURE_8_WAKEUP_FILTERS; | |
bbd9f9ee | 1205 | |
63e77b39 | 1206 | dev->net->netdev_ops = &smsc95xx_netdev_ops; |
2f7ca802 | 1207 | dev->net->ethtool_ops = &smsc95xx_ethtool_ops; |
2f7ca802 | 1208 | dev->net->flags |= IFF_MULTICAST; |
78e47fe4 | 1209 | dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM; |
9bbf5660 | 1210 | dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; |
d69d1694 CF |
1211 | |
1212 | pdata->dev = dev; | |
1213 | INIT_DELAYED_WORK(&pdata->carrier_check, check_carrier); | |
1214 | schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY); | |
1215 | ||
2f7ca802 SG |
1216 | return 0; |
1217 | } | |
1218 | ||
1219 | static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf) | |
1220 | { | |
1221 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
d69d1694 | 1222 | |
2f7ca802 | 1223 | if (pdata) { |
d69d1694 | 1224 | cancel_delayed_work(&pdata->carrier_check); |
a475f603 | 1225 | netif_dbg(dev, ifdown, dev->net, "free pdata\n"); |
2f7ca802 SG |
1226 | kfree(pdata); |
1227 | pdata = NULL; | |
1228 | dev->data[0] = 0; | |
1229 | } | |
1230 | } | |
1231 | ||
068bb1a7 | 1232 | static u32 smsc_crc(const u8 *buffer, size_t len, int filter) |
bbd9f9ee | 1233 | { |
068bb1a7 SG |
1234 | u32 crc = bitrev16(crc16(0xFFFF, buffer, len)); |
1235 | return crc << ((filter % 2) * 16); | |
bbd9f9ee SG |
1236 | } |
1237 | ||
e5e3af83 SG |
1238 | static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask) |
1239 | { | |
1240 | struct mii_if_info *mii = &dev->mii; | |
1241 | int ret; | |
1242 | ||
1e1d7412 | 1243 | netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n"); |
e5e3af83 SG |
1244 | |
1245 | /* read to clear */ | |
1246 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC); | |
e360a8b4 | 1247 | if (ret < 0) |
b052e073 | 1248 | return ret; |
e5e3af83 SG |
1249 | |
1250 | /* enable interrupt source */ | |
1251 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK); | |
e360a8b4 | 1252 | if (ret < 0) |
b052e073 | 1253 | return ret; |
e5e3af83 SG |
1254 | |
1255 | ret |= mask; | |
1256 | ||
1257 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret); | |
1258 | ||
1259 | return 0; | |
1260 | } | |
1261 | ||
1262 | static int smsc95xx_link_ok_nopm(struct usbnet *dev) | |
1263 | { | |
1264 | struct mii_if_info *mii = &dev->mii; | |
1265 | int ret; | |
1266 | ||
1267 | /* first, a dummy read, needed to latch some MII phys */ | |
1268 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e360a8b4 | 1269 | if (ret < 0) |
b052e073 | 1270 | return ret; |
e5e3af83 SG |
1271 | |
1272 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e360a8b4 | 1273 | if (ret < 0) |
b052e073 | 1274 | return ret; |
e5e3af83 SG |
1275 | |
1276 | return !!(ret & BMSR_LSTATUS); | |
1277 | } | |
1278 | ||
319b95b5 SG |
1279 | static int smsc95xx_enter_suspend0(struct usbnet *dev) |
1280 | { | |
1281 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1282 | u32 val; | |
1283 | int ret; | |
1284 | ||
1285 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1286 | if (ret < 0) |
b052e073 | 1287 | return ret; |
319b95b5 SG |
1288 | |
1289 | val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_)); | |
1290 | val |= PM_CTL_SUS_MODE_0; | |
1291 | ||
1292 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1293 | if (ret < 0) |
b052e073 | 1294 | return ret; |
319b95b5 SG |
1295 | |
1296 | /* clear wol status */ | |
1297 | val &= ~PM_CTL_WUPS_; | |
1298 | val |= PM_CTL_WUPS_WOL_; | |
1299 | ||
1300 | /* enable energy detection */ | |
1301 | if (pdata->wolopts & WAKE_PHY) | |
1302 | val |= PM_CTL_WUPS_ED_; | |
1303 | ||
1304 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1305 | if (ret < 0) |
b052e073 | 1306 | return ret; |
319b95b5 SG |
1307 | |
1308 | /* read back PM_CTRL */ | |
1309 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
76437214 ML |
1310 | if (ret < 0) |
1311 | return ret; | |
319b95b5 | 1312 | |
b2d4b150 SG |
1313 | pdata->suspend_flags |= SUSPEND_SUSPEND0; |
1314 | ||
76437214 | 1315 | return 0; |
319b95b5 SG |
1316 | } |
1317 | ||
1318 | static int smsc95xx_enter_suspend1(struct usbnet *dev) | |
1319 | { | |
1320 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1321 | struct mii_if_info *mii = &dev->mii; | |
1322 | u32 val; | |
1323 | int ret; | |
1324 | ||
1325 | /* reconfigure link pulse detection timing for | |
1326 | * compatibility with non-standard link partners | |
1327 | */ | |
1328 | if (pdata->features & FEATURE_PHY_NLP_CROSSOVER) | |
1329 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG, | |
1330 | PHY_EDPD_CONFIG_DEFAULT); | |
1331 | ||
1332 | /* enable energy detect power-down mode */ | |
1333 | ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS); | |
e360a8b4 | 1334 | if (ret < 0) |
b052e073 | 1335 | return ret; |
319b95b5 SG |
1336 | |
1337 | ret |= MODE_CTRL_STS_EDPWRDOWN_; | |
1338 | ||
1339 | smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret); | |
1340 | ||
1341 | /* enter SUSPEND1 mode */ | |
1342 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1343 | if (ret < 0) |
b052e073 | 1344 | return ret; |
319b95b5 SG |
1345 | |
1346 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1347 | val |= PM_CTL_SUS_MODE_1; | |
1348 | ||
1349 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
e360a8b4 | 1350 | if (ret < 0) |
b052e073 | 1351 | return ret; |
319b95b5 SG |
1352 | |
1353 | /* clear wol status, enable energy detection */ | |
1354 | val &= ~PM_CTL_WUPS_; | |
1355 | val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_); | |
1356 | ||
1357 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
76437214 ML |
1358 | if (ret < 0) |
1359 | return ret; | |
319b95b5 | 1360 | |
b2d4b150 SG |
1361 | pdata->suspend_flags |= SUSPEND_SUSPEND1; |
1362 | ||
76437214 | 1363 | return 0; |
319b95b5 SG |
1364 | } |
1365 | ||
1366 | static int smsc95xx_enter_suspend2(struct usbnet *dev) | |
1367 | { | |
b2d4b150 | 1368 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); |
319b95b5 SG |
1369 | u32 val; |
1370 | int ret; | |
1371 | ||
1372 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
e360a8b4 | 1373 | if (ret < 0) |
b052e073 | 1374 | return ret; |
319b95b5 SG |
1375 | |
1376 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1377 | val |= PM_CTL_SUS_MODE_2; | |
1378 | ||
1379 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
76437214 ML |
1380 | if (ret < 0) |
1381 | return ret; | |
319b95b5 | 1382 | |
b2d4b150 SG |
1383 | pdata->suspend_flags |= SUSPEND_SUSPEND2; |
1384 | ||
76437214 | 1385 | return 0; |
319b95b5 SG |
1386 | } |
1387 | ||
b2d4b150 SG |
1388 | static int smsc95xx_enter_suspend3(struct usbnet *dev) |
1389 | { | |
1390 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1391 | u32 val; | |
1392 | int ret; | |
1393 | ||
1394 | ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val); | |
1395 | if (ret < 0) | |
1396 | return ret; | |
1397 | ||
1398 | if (val & 0xFFFF) { | |
1399 | netdev_info(dev->net, "rx fifo not empty in autosuspend\n"); | |
1400 | return -EBUSY; | |
1401 | } | |
1402 | ||
1403 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); | |
1404 | if (ret < 0) | |
1405 | return ret; | |
1406 | ||
1407 | val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); | |
1408 | val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS; | |
1409 | ||
1410 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
1411 | if (ret < 0) | |
1412 | return ret; | |
1413 | ||
1414 | /* clear wol status */ | |
1415 | val &= ~PM_CTL_WUPS_; | |
1416 | val |= PM_CTL_WUPS_WOL_; | |
1417 | ||
1418 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); | |
1419 | if (ret < 0) | |
1420 | return ret; | |
1421 | ||
1422 | pdata->suspend_flags |= SUSPEND_SUSPEND3; | |
1423 | ||
1424 | return 0; | |
1425 | } | |
1426 | ||
1427 | static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up) | |
1428 | { | |
1429 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1430 | int ret; | |
1431 | ||
1432 | if (!netif_running(dev->net)) { | |
1433 | /* interface is ifconfig down so fully power down hw */ | |
1434 | netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n"); | |
1435 | return smsc95xx_enter_suspend2(dev); | |
1436 | } | |
1437 | ||
1438 | if (!link_up) { | |
1439 | /* link is down so enter EDPD mode, but only if device can | |
1440 | * reliably resume from it. This check should be redundant | |
eb970ff0 | 1441 | * as current FEATURE_REMOTE_WAKEUP parts also support |
b2d4b150 SG |
1442 | * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */ |
1443 | if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) { | |
1444 | netdev_warn(dev->net, "EDPD not supported\n"); | |
1445 | return -EBUSY; | |
1446 | } | |
1447 | ||
1448 | netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n"); | |
1449 | ||
1450 | /* enable PHY wakeup events for if cable is attached */ | |
1451 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1452 | PHY_INT_MASK_ANEG_COMP_); | |
1453 | if (ret < 0) { | |
1454 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1455 | return ret; | |
1456 | } | |
1457 | ||
1458 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); | |
1459 | return smsc95xx_enter_suspend1(dev); | |
1460 | } | |
1461 | ||
1462 | /* enable PHY wakeup events so we remote wakeup if cable is pulled */ | |
1463 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1464 | PHY_INT_MASK_LINK_DOWN_); | |
1465 | if (ret < 0) { | |
1466 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1467 | return ret; | |
1468 | } | |
1469 | ||
1470 | netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n"); | |
1471 | return smsc95xx_enter_suspend3(dev); | |
1472 | } | |
1473 | ||
b5a04475 SG |
1474 | static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message) |
1475 | { | |
1476 | struct usbnet *dev = usb_get_intfdata(intf); | |
e0e474a8 | 1477 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); |
e5e3af83 | 1478 | u32 val, link_up; |
b5a04475 | 1479 | int ret; |
b5a04475 | 1480 | |
b5a04475 | 1481 | ret = usbnet_suspend(intf, message); |
b052e073 SG |
1482 | if (ret < 0) { |
1483 | netdev_warn(dev->net, "usbnet_suspend error\n"); | |
1484 | return ret; | |
1485 | } | |
b5a04475 | 1486 | |
b2d4b150 SG |
1487 | if (pdata->suspend_flags) { |
1488 | netdev_warn(dev->net, "error during last resume\n"); | |
1489 | pdata->suspend_flags = 0; | |
1490 | } | |
1491 | ||
e5e3af83 SG |
1492 | /* determine if link is up using only _nopm functions */ |
1493 | link_up = smsc95xx_link_ok_nopm(dev); | |
1494 | ||
42e21c01 | 1495 | if (message.event == PM_EVENT_AUTO_SUSPEND && |
eb970ff0 | 1496 | (pdata->features & FEATURE_REMOTE_WAKEUP)) { |
b2d4b150 SG |
1497 | ret = smsc95xx_autosuspend(dev, link_up); |
1498 | goto done; | |
1499 | } | |
1500 | ||
1501 | /* if we get this far we're not autosuspending */ | |
e5e3af83 SG |
1502 | /* if no wol options set, or if link is down and we're not waking on |
1503 | * PHY activity, enter lowest power SUSPEND2 mode | |
1504 | */ | |
1505 | if (!(pdata->wolopts & SUPPORTED_WAKE) || | |
1506 | !(link_up || (pdata->wolopts & WAKE_PHY))) { | |
1e1d7412 | 1507 | netdev_info(dev->net, "entering SUSPEND2 mode\n"); |
e0e474a8 SG |
1508 | |
1509 | /* disable energy detect (link up) & wake up events */ | |
ec32115d | 1510 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1511 | if (ret < 0) |
b052e073 | 1512 | goto done; |
e0e474a8 SG |
1513 | |
1514 | val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_); | |
1515 | ||
ec32115d | 1516 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1517 | if (ret < 0) |
b052e073 | 1518 | goto done; |
e0e474a8 | 1519 | |
ec32115d | 1520 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1521 | if (ret < 0) |
b052e073 | 1522 | goto done; |
e0e474a8 SG |
1523 | |
1524 | val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_); | |
1525 | ||
ec32115d | 1526 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1527 | if (ret < 0) |
b052e073 | 1528 | goto done; |
e0e474a8 | 1529 | |
3b9f7d8c SG |
1530 | ret = smsc95xx_enter_suspend2(dev); |
1531 | goto done; | |
e0e474a8 SG |
1532 | } |
1533 | ||
e5e3af83 SG |
1534 | if (pdata->wolopts & WAKE_PHY) { |
1535 | ret = smsc95xx_enable_phy_wakeup_interrupts(dev, | |
1536 | (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_)); | |
b052e073 SG |
1537 | if (ret < 0) { |
1538 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1539 | goto done; | |
1540 | } | |
e5e3af83 SG |
1541 | |
1542 | /* if link is down then configure EDPD and enter SUSPEND1, | |
1543 | * otherwise enter SUSPEND0 below | |
1544 | */ | |
1545 | if (!link_up) { | |
1e1d7412 | 1546 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); |
3b9f7d8c SG |
1547 | ret = smsc95xx_enter_suspend1(dev); |
1548 | goto done; | |
e5e3af83 SG |
1549 | } |
1550 | } | |
1551 | ||
bbd9f9ee | 1552 | if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { |
eed9a729 | 1553 | u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL); |
06a221be ML |
1554 | u32 command[2]; |
1555 | u32 offset[2]; | |
1556 | u32 crc[4]; | |
9ebca507 SG |
1557 | int wuff_filter_count = |
1558 | (pdata->features & FEATURE_8_WAKEUP_FILTERS) ? | |
1559 | LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM; | |
bbd9f9ee SG |
1560 | int i, filter = 0; |
1561 | ||
eed9a729 SG |
1562 | if (!filter_mask) { |
1563 | netdev_warn(dev->net, "Unable to allocate filter_mask\n"); | |
3b9f7d8c SG |
1564 | ret = -ENOMEM; |
1565 | goto done; | |
eed9a729 SG |
1566 | } |
1567 | ||
06a221be ML |
1568 | memset(command, 0, sizeof(command)); |
1569 | memset(offset, 0, sizeof(offset)); | |
1570 | memset(crc, 0, sizeof(crc)); | |
1571 | ||
bbd9f9ee SG |
1572 | if (pdata->wolopts & WAKE_BCAST) { |
1573 | const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; | |
1e1d7412 | 1574 | netdev_info(dev->net, "enabling broadcast detection\n"); |
bbd9f9ee SG |
1575 | filter_mask[filter * 4] = 0x003F; |
1576 | filter_mask[filter * 4 + 1] = 0x00; | |
1577 | filter_mask[filter * 4 + 2] = 0x00; | |
1578 | filter_mask[filter * 4 + 3] = 0x00; | |
1579 | command[filter/4] |= 0x05UL << ((filter % 4) * 8); | |
1580 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1581 | crc[filter/2] |= smsc_crc(bcast, 6, filter); | |
1582 | filter++; | |
1583 | } | |
1584 | ||
1585 | if (pdata->wolopts & WAKE_MCAST) { | |
1586 | const u8 mcast[] = {0x01, 0x00, 0x5E}; | |
1e1d7412 | 1587 | netdev_info(dev->net, "enabling multicast detection\n"); |
bbd9f9ee SG |
1588 | filter_mask[filter * 4] = 0x0007; |
1589 | filter_mask[filter * 4 + 1] = 0x00; | |
1590 | filter_mask[filter * 4 + 2] = 0x00; | |
1591 | filter_mask[filter * 4 + 3] = 0x00; | |
1592 | command[filter/4] |= 0x09UL << ((filter % 4) * 8); | |
1593 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1594 | crc[filter/2] |= smsc_crc(mcast, 3, filter); | |
1595 | filter++; | |
1596 | } | |
1597 | ||
1598 | if (pdata->wolopts & WAKE_ARP) { | |
1599 | const u8 arp[] = {0x08, 0x06}; | |
1e1d7412 | 1600 | netdev_info(dev->net, "enabling ARP detection\n"); |
bbd9f9ee SG |
1601 | filter_mask[filter * 4] = 0x0003; |
1602 | filter_mask[filter * 4 + 1] = 0x00; | |
1603 | filter_mask[filter * 4 + 2] = 0x00; | |
1604 | filter_mask[filter * 4 + 3] = 0x00; | |
1605 | command[filter/4] |= 0x05UL << ((filter % 4) * 8); | |
1606 | offset[filter/4] |= 0x0C << ((filter % 4) * 8); | |
1607 | crc[filter/2] |= smsc_crc(arp, 2, filter); | |
1608 | filter++; | |
1609 | } | |
1610 | ||
1611 | if (pdata->wolopts & WAKE_UCAST) { | |
1e1d7412 | 1612 | netdev_info(dev->net, "enabling unicast detection\n"); |
bbd9f9ee SG |
1613 | filter_mask[filter * 4] = 0x003F; |
1614 | filter_mask[filter * 4 + 1] = 0x00; | |
1615 | filter_mask[filter * 4 + 2] = 0x00; | |
1616 | filter_mask[filter * 4 + 3] = 0x00; | |
1617 | command[filter/4] |= 0x01UL << ((filter % 4) * 8); | |
1618 | offset[filter/4] |= 0x00 << ((filter % 4) * 8); | |
1619 | crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter); | |
1620 | filter++; | |
1621 | } | |
1622 | ||
9ebca507 | 1623 | for (i = 0; i < (wuff_filter_count * 4); i++) { |
ec32115d | 1624 | ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]); |
b052e073 | 1625 | if (ret < 0) { |
06a221be | 1626 | kfree(filter_mask); |
b052e073 SG |
1627 | goto done; |
1628 | } | |
bbd9f9ee | 1629 | } |
06a221be | 1630 | kfree(filter_mask); |
bbd9f9ee | 1631 | |
9ebca507 | 1632 | for (i = 0; i < (wuff_filter_count / 4); i++) { |
ec32115d | 1633 | ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]); |
e360a8b4 | 1634 | if (ret < 0) |
b052e073 | 1635 | goto done; |
bbd9f9ee SG |
1636 | } |
1637 | ||
9ebca507 | 1638 | for (i = 0; i < (wuff_filter_count / 4); i++) { |
ec32115d | 1639 | ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]); |
e360a8b4 | 1640 | if (ret < 0) |
b052e073 | 1641 | goto done; |
bbd9f9ee SG |
1642 | } |
1643 | ||
9ebca507 | 1644 | for (i = 0; i < (wuff_filter_count / 2); i++) { |
ec32115d | 1645 | ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]); |
e360a8b4 | 1646 | if (ret < 0) |
b052e073 | 1647 | goto done; |
bbd9f9ee SG |
1648 | } |
1649 | ||
1650 | /* clear any pending pattern match packet status */ | |
ec32115d | 1651 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1652 | if (ret < 0) |
b052e073 | 1653 | goto done; |
bbd9f9ee SG |
1654 | |
1655 | val |= WUCSR_WUFR_; | |
1656 | ||
ec32115d | 1657 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1658 | if (ret < 0) |
b052e073 | 1659 | goto done; |
bbd9f9ee SG |
1660 | } |
1661 | ||
e0e474a8 SG |
1662 | if (pdata->wolopts & WAKE_MAGIC) { |
1663 | /* clear any pending magic packet status */ | |
ec32115d | 1664 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1665 | if (ret < 0) |
b052e073 | 1666 | goto done; |
e0e474a8 SG |
1667 | |
1668 | val |= WUCSR_MPR_; | |
1669 | ||
ec32115d | 1670 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1671 | if (ret < 0) |
b052e073 | 1672 | goto done; |
e0e474a8 SG |
1673 | } |
1674 | ||
bbd9f9ee | 1675 | /* enable/disable wakeup sources */ |
ec32115d | 1676 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1677 | if (ret < 0) |
b052e073 | 1678 | goto done; |
e0e474a8 | 1679 | |
bbd9f9ee | 1680 | if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { |
1e1d7412 | 1681 | netdev_info(dev->net, "enabling pattern match wakeup\n"); |
bbd9f9ee SG |
1682 | val |= WUCSR_WAKE_EN_; |
1683 | } else { | |
1e1d7412 | 1684 | netdev_info(dev->net, "disabling pattern match wakeup\n"); |
bbd9f9ee SG |
1685 | val &= ~WUCSR_WAKE_EN_; |
1686 | } | |
1687 | ||
e0e474a8 | 1688 | if (pdata->wolopts & WAKE_MAGIC) { |
1e1d7412 | 1689 | netdev_info(dev->net, "enabling magic packet wakeup\n"); |
e0e474a8 SG |
1690 | val |= WUCSR_MPEN_; |
1691 | } else { | |
1e1d7412 | 1692 | netdev_info(dev->net, "disabling magic packet wakeup\n"); |
e0e474a8 SG |
1693 | val &= ~WUCSR_MPEN_; |
1694 | } | |
1695 | ||
ec32115d | 1696 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1697 | if (ret < 0) |
b052e073 | 1698 | goto done; |
e0e474a8 SG |
1699 | |
1700 | /* enable wol wakeup source */ | |
ec32115d | 1701 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1702 | if (ret < 0) |
b052e073 | 1703 | goto done; |
e0e474a8 SG |
1704 | |
1705 | val |= PM_CTL_WOL_EN_; | |
1706 | ||
e5e3af83 SG |
1707 | /* phy energy detect wakeup source */ |
1708 | if (pdata->wolopts & WAKE_PHY) | |
1709 | val |= PM_CTL_ED_EN_; | |
1710 | ||
ec32115d | 1711 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1712 | if (ret < 0) |
b052e073 | 1713 | goto done; |
e0e474a8 | 1714 | |
bbd9f9ee | 1715 | /* enable receiver to enable frame reception */ |
ec32115d | 1716 | smsc95xx_start_rx_path(dev, 1); |
e0e474a8 SG |
1717 | |
1718 | /* some wol options are enabled, so enter SUSPEND0 */ | |
1e1d7412 | 1719 | netdev_info(dev->net, "entering SUSPEND0 mode\n"); |
3b9f7d8c SG |
1720 | ret = smsc95xx_enter_suspend0(dev); |
1721 | ||
1722 | done: | |
0d41be53 ML |
1723 | /* |
1724 | * TODO: resume() might need to handle the suspend failure | |
1725 | * in system sleep | |
1726 | */ | |
1727 | if (ret && PMSG_IS_AUTO(message)) | |
3b9f7d8c SG |
1728 | usbnet_resume(intf); |
1729 | return ret; | |
e0e474a8 SG |
1730 | } |
1731 | ||
1732 | static int smsc95xx_resume(struct usb_interface *intf) | |
1733 | { | |
1734 | struct usbnet *dev = usb_get_intfdata(intf); | |
8bca81d9 SM |
1735 | struct smsc95xx_priv *pdata; |
1736 | u8 suspend_flags; | |
e0e474a8 SG |
1737 | int ret; |
1738 | u32 val; | |
1739 | ||
1740 | BUG_ON(!dev); | |
8bca81d9 SM |
1741 | pdata = (struct smsc95xx_priv *)(dev->data[0]); |
1742 | suspend_flags = pdata->suspend_flags; | |
e0e474a8 | 1743 | |
b2d4b150 SG |
1744 | netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags); |
1745 | ||
1746 | /* do this first to ensure it's cleared even in error case */ | |
1747 | pdata->suspend_flags = 0; | |
d69d1694 | 1748 | schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY); |
b2d4b150 SG |
1749 | |
1750 | if (suspend_flags & SUSPEND_ALLMODES) { | |
bbd9f9ee | 1751 | /* clear wake-up sources */ |
ec32115d | 1752 | ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); |
e360a8b4 | 1753 | if (ret < 0) |
b052e073 | 1754 | return ret; |
e0e474a8 | 1755 | |
bbd9f9ee | 1756 | val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_); |
e0e474a8 | 1757 | |
ec32115d | 1758 | ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); |
e360a8b4 | 1759 | if (ret < 0) |
b052e073 | 1760 | return ret; |
e0e474a8 SG |
1761 | |
1762 | /* clear wake-up status */ | |
ec32115d | 1763 | ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); |
e360a8b4 | 1764 | if (ret < 0) |
b052e073 | 1765 | return ret; |
e0e474a8 SG |
1766 | |
1767 | val &= ~PM_CTL_WOL_EN_; | |
1768 | val |= PM_CTL_WUPS_; | |
1769 | ||
ec32115d | 1770 | ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); |
e360a8b4 | 1771 | if (ret < 0) |
b052e073 | 1772 | return ret; |
e0e474a8 SG |
1773 | } |
1774 | ||
af3d7c1e | 1775 | ret = usbnet_resume(intf); |
b052e073 SG |
1776 | if (ret < 0) |
1777 | netdev_warn(dev->net, "usbnet_resume error\n"); | |
e0e474a8 | 1778 | |
b052e073 | 1779 | return ret; |
b5a04475 SG |
1780 | } |
1781 | ||
b4df480f JS |
1782 | static int smsc95xx_reset_resume(struct usb_interface *intf) |
1783 | { | |
1784 | struct usbnet *dev = usb_get_intfdata(intf); | |
1785 | int ret; | |
1786 | ||
1787 | ret = smsc95xx_reset(dev); | |
1788 | if (ret < 0) | |
1789 | return ret; | |
1790 | ||
1791 | return smsc95xx_resume(intf); | |
1792 | } | |
1793 | ||
2f7ca802 SG |
1794 | static void smsc95xx_rx_csum_offload(struct sk_buff *skb) |
1795 | { | |
1796 | skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2); | |
1797 | skb->ip_summed = CHECKSUM_COMPLETE; | |
1798 | skb_trim(skb, skb->len - 2); | |
1799 | } | |
1800 | ||
1801 | static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | |
1802 | { | |
eb85569f EG |
1803 | /* This check is no longer done by usbnet */ |
1804 | if (skb->len < dev->net->hard_header_len) | |
1805 | return 0; | |
1806 | ||
2f7ca802 SG |
1807 | while (skb->len > 0) { |
1808 | u32 header, align_count; | |
1809 | struct sk_buff *ax_skb; | |
1810 | unsigned char *packet; | |
1811 | u16 size; | |
1812 | ||
1813 | memcpy(&header, skb->data, sizeof(header)); | |
1814 | le32_to_cpus(&header); | |
1815 | skb_pull(skb, 4 + NET_IP_ALIGN); | |
1816 | packet = skb->data; | |
1817 | ||
1818 | /* get the packet length */ | |
1819 | size = (u16)((header & RX_STS_FL_) >> 16); | |
1820 | align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; | |
1821 | ||
1822 | if (unlikely(header & RX_STS_ES_)) { | |
a475f603 JP |
1823 | netif_dbg(dev, rx_err, dev->net, |
1824 | "Error header=0x%08x\n", header); | |
80667ac1 HX |
1825 | dev->net->stats.rx_errors++; |
1826 | dev->net->stats.rx_dropped++; | |
2f7ca802 SG |
1827 | |
1828 | if (header & RX_STS_CRC_) { | |
80667ac1 | 1829 | dev->net->stats.rx_crc_errors++; |
2f7ca802 SG |
1830 | } else { |
1831 | if (header & (RX_STS_TL_ | RX_STS_RF_)) | |
80667ac1 | 1832 | dev->net->stats.rx_frame_errors++; |
2f7ca802 SG |
1833 | |
1834 | if ((header & RX_STS_LE_) && | |
1835 | (!(header & RX_STS_FT_))) | |
80667ac1 | 1836 | dev->net->stats.rx_length_errors++; |
2f7ca802 SG |
1837 | } |
1838 | } else { | |
1839 | /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ | |
1840 | if (unlikely(size > (ETH_FRAME_LEN + 12))) { | |
a475f603 JP |
1841 | netif_dbg(dev, rx_err, dev->net, |
1842 | "size err header=0x%08x\n", header); | |
2f7ca802 SG |
1843 | return 0; |
1844 | } | |
1845 | ||
1846 | /* last frame in this batch */ | |
1847 | if (skb->len == size) { | |
78e47fe4 | 1848 | if (dev->net->features & NETIF_F_RXCSUM) |
2f7ca802 | 1849 | smsc95xx_rx_csum_offload(skb); |
df18acca | 1850 | skb_trim(skb, skb->len - 4); /* remove fcs */ |
2f7ca802 SG |
1851 | skb->truesize = size + sizeof(struct sk_buff); |
1852 | ||
1853 | return 1; | |
1854 | } | |
1855 | ||
1856 | ax_skb = skb_clone(skb, GFP_ATOMIC); | |
1857 | if (unlikely(!ax_skb)) { | |
60b86755 | 1858 | netdev_warn(dev->net, "Error allocating skb\n"); |
2f7ca802 SG |
1859 | return 0; |
1860 | } | |
1861 | ||
1862 | ax_skb->len = size; | |
1863 | ax_skb->data = packet; | |
1864 | skb_set_tail_pointer(ax_skb, size); | |
1865 | ||
78e47fe4 | 1866 | if (dev->net->features & NETIF_F_RXCSUM) |
2f7ca802 | 1867 | smsc95xx_rx_csum_offload(ax_skb); |
df18acca | 1868 | skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ |
2f7ca802 SG |
1869 | ax_skb->truesize = size + sizeof(struct sk_buff); |
1870 | ||
1871 | usbnet_skb_return(dev, ax_skb); | |
1872 | } | |
1873 | ||
1874 | skb_pull(skb, size); | |
1875 | ||
1876 | /* padding bytes before the next frame starts */ | |
1877 | if (skb->len) | |
1878 | skb_pull(skb, align_count); | |
1879 | } | |
1880 | ||
2f7ca802 SG |
1881 | return 1; |
1882 | } | |
1883 | ||
f7b29271 SG |
1884 | static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb) |
1885 | { | |
55508d60 MM |
1886 | u16 low_16 = (u16)skb_checksum_start_offset(skb); |
1887 | u16 high_16 = low_16 + skb->csum_offset; | |
f7b29271 SG |
1888 | return (high_16 << 16) | low_16; |
1889 | } | |
1890 | ||
2f7ca802 SG |
1891 | static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, |
1892 | struct sk_buff *skb, gfp_t flags) | |
1893 | { | |
78e47fe4 | 1894 | bool csum = skb->ip_summed == CHECKSUM_PARTIAL; |
f7b29271 | 1895 | int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; |
2f7ca802 SG |
1896 | u32 tx_cmd_a, tx_cmd_b; |
1897 | ||
f7b29271 SG |
1898 | /* We do not advertise SG, so skbs should be already linearized */ |
1899 | BUG_ON(skb_shinfo(skb)->nr_frags); | |
1900 | ||
1901 | if (skb_headroom(skb) < overhead) { | |
2f7ca802 | 1902 | struct sk_buff *skb2 = skb_copy_expand(skb, |
f7b29271 | 1903 | overhead, 0, flags); |
2f7ca802 SG |
1904 | dev_kfree_skb_any(skb); |
1905 | skb = skb2; | |
1906 | if (!skb) | |
1907 | return NULL; | |
1908 | } | |
1909 | ||
f7b29271 | 1910 | if (csum) { |
11bc3088 SG |
1911 | if (skb->len <= 45) { |
1912 | /* workaround - hardware tx checksum does not work | |
1913 | * properly with extremely small packets */ | |
55508d60 | 1914 | long csstart = skb_checksum_start_offset(skb); |
11bc3088 SG |
1915 | __wsum calc = csum_partial(skb->data + csstart, |
1916 | skb->len - csstart, 0); | |
1917 | *((__sum16 *)(skb->data + csstart | |
1918 | + skb->csum_offset)) = csum_fold(calc); | |
1919 | ||
1920 | csum = false; | |
1921 | } else { | |
1922 | u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); | |
1923 | skb_push(skb, 4); | |
00acda68 | 1924 | cpu_to_le32s(&csum_preamble); |
11bc3088 SG |
1925 | memcpy(skb->data, &csum_preamble, 4); |
1926 | } | |
f7b29271 SG |
1927 | } |
1928 | ||
2f7ca802 SG |
1929 | skb_push(skb, 4); |
1930 | tx_cmd_b = (u32)(skb->len - 4); | |
f7b29271 SG |
1931 | if (csum) |
1932 | tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; | |
2f7ca802 SG |
1933 | cpu_to_le32s(&tx_cmd_b); |
1934 | memcpy(skb->data, &tx_cmd_b, 4); | |
1935 | ||
1936 | skb_push(skb, 4); | |
1937 | tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | | |
1938 | TX_CMD_A_LAST_SEG_; | |
1939 | cpu_to_le32s(&tx_cmd_a); | |
1940 | memcpy(skb->data, &tx_cmd_a, 4); | |
1941 | ||
1942 | return skb; | |
1943 | } | |
1944 | ||
b2d4b150 SG |
1945 | static int smsc95xx_manage_power(struct usbnet *dev, int on) |
1946 | { | |
1947 | struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); | |
1948 | ||
1949 | dev->intf->needs_remote_wakeup = on; | |
1950 | ||
eb970ff0 | 1951 | if (pdata->features & FEATURE_REMOTE_WAKEUP) |
b2d4b150 SG |
1952 | return 0; |
1953 | ||
eb970ff0 ML |
1954 | /* this chip revision isn't capable of remote wakeup */ |
1955 | netdev_info(dev->net, "hardware isn't capable of remote wakeup\n"); | |
b2d4b150 SG |
1956 | |
1957 | if (on) | |
1958 | usb_autopm_get_interface_no_resume(dev->intf); | |
1959 | else | |
1960 | usb_autopm_put_interface(dev->intf); | |
1961 | ||
1962 | return 0; | |
1963 | } | |
1964 | ||
2f7ca802 SG |
1965 | static const struct driver_info smsc95xx_info = { |
1966 | .description = "smsc95xx USB 2.0 Ethernet", | |
1967 | .bind = smsc95xx_bind, | |
1968 | .unbind = smsc95xx_unbind, | |
1969 | .link_reset = smsc95xx_link_reset, | |
1970 | .reset = smsc95xx_reset, | |
1971 | .rx_fixup = smsc95xx_rx_fixup, | |
1972 | .tx_fixup = smsc95xx_tx_fixup, | |
1973 | .status = smsc95xx_status, | |
b2d4b150 | 1974 | .manage_power = smsc95xx_manage_power, |
07d69d42 | 1975 | .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR, |
2f7ca802 SG |
1976 | }; |
1977 | ||
1978 | static const struct usb_device_id products[] = { | |
1979 | { | |
1980 | /* SMSC9500 USB Ethernet Device */ | |
1981 | USB_DEVICE(0x0424, 0x9500), | |
1982 | .driver_info = (unsigned long) &smsc95xx_info, | |
1983 | }, | |
6f41d12b SG |
1984 | { |
1985 | /* SMSC9505 USB Ethernet Device */ | |
1986 | USB_DEVICE(0x0424, 0x9505), | |
1987 | .driver_info = (unsigned long) &smsc95xx_info, | |
1988 | }, | |
1989 | { | |
1990 | /* SMSC9500A USB Ethernet Device */ | |
1991 | USB_DEVICE(0x0424, 0x9E00), | |
1992 | .driver_info = (unsigned long) &smsc95xx_info, | |
1993 | }, | |
1994 | { | |
1995 | /* SMSC9505A USB Ethernet Device */ | |
1996 | USB_DEVICE(0x0424, 0x9E01), | |
1997 | .driver_info = (unsigned long) &smsc95xx_info, | |
1998 | }, | |
726474b8 SG |
1999 | { |
2000 | /* SMSC9512/9514 USB Hub & Ethernet Device */ | |
2001 | USB_DEVICE(0x0424, 0xec00), | |
2002 | .driver_info = (unsigned long) &smsc95xx_info, | |
2003 | }, | |
6f41d12b SG |
2004 | { |
2005 | /* SMSC9500 USB Ethernet Device (SAL10) */ | |
2006 | USB_DEVICE(0x0424, 0x9900), | |
2007 | .driver_info = (unsigned long) &smsc95xx_info, | |
2008 | }, | |
2009 | { | |
2010 | /* SMSC9505 USB Ethernet Device (SAL10) */ | |
2011 | USB_DEVICE(0x0424, 0x9901), | |
2012 | .driver_info = (unsigned long) &smsc95xx_info, | |
2013 | }, | |
2014 | { | |
2015 | /* SMSC9500A USB Ethernet Device (SAL10) */ | |
2016 | USB_DEVICE(0x0424, 0x9902), | |
2017 | .driver_info = (unsigned long) &smsc95xx_info, | |
2018 | }, | |
2019 | { | |
2020 | /* SMSC9505A USB Ethernet Device (SAL10) */ | |
2021 | USB_DEVICE(0x0424, 0x9903), | |
2022 | .driver_info = (unsigned long) &smsc95xx_info, | |
2023 | }, | |
2024 | { | |
2025 | /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */ | |
2026 | USB_DEVICE(0x0424, 0x9904), | |
2027 | .driver_info = (unsigned long) &smsc95xx_info, | |
2028 | }, | |
2029 | { | |
2030 | /* SMSC9500A USB Ethernet Device (HAL) */ | |
2031 | USB_DEVICE(0x0424, 0x9905), | |
2032 | .driver_info = (unsigned long) &smsc95xx_info, | |
2033 | }, | |
2034 | { | |
2035 | /* SMSC9505A USB Ethernet Device (HAL) */ | |
2036 | USB_DEVICE(0x0424, 0x9906), | |
2037 | .driver_info = (unsigned long) &smsc95xx_info, | |
2038 | }, | |
2039 | { | |
2040 | /* SMSC9500 USB Ethernet Device (Alternate ID) */ | |
2041 | USB_DEVICE(0x0424, 0x9907), | |
2042 | .driver_info = (unsigned long) &smsc95xx_info, | |
2043 | }, | |
2044 | { | |
2045 | /* SMSC9500A USB Ethernet Device (Alternate ID) */ | |
2046 | USB_DEVICE(0x0424, 0x9908), | |
2047 | .driver_info = (unsigned long) &smsc95xx_info, | |
2048 | }, | |
2049 | { | |
2050 | /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */ | |
2051 | USB_DEVICE(0x0424, 0x9909), | |
2052 | .driver_info = (unsigned long) &smsc95xx_info, | |
2053 | }, | |
88edaa41 SG |
2054 | { |
2055 | /* SMSC LAN9530 USB Ethernet Device */ | |
2056 | USB_DEVICE(0x0424, 0x9530), | |
2057 | .driver_info = (unsigned long) &smsc95xx_info, | |
2058 | }, | |
2059 | { | |
2060 | /* SMSC LAN9730 USB Ethernet Device */ | |
2061 | USB_DEVICE(0x0424, 0x9730), | |
2062 | .driver_info = (unsigned long) &smsc95xx_info, | |
2063 | }, | |
2064 | { | |
2065 | /* SMSC LAN89530 USB Ethernet Device */ | |
2066 | USB_DEVICE(0x0424, 0x9E08), | |
2067 | .driver_info = (unsigned long) &smsc95xx_info, | |
2068 | }, | |
2f7ca802 SG |
2069 | { }, /* END */ |
2070 | }; | |
2071 | MODULE_DEVICE_TABLE(usb, products); | |
2072 | ||
2073 | static struct usb_driver smsc95xx_driver = { | |
2074 | .name = "smsc95xx", | |
2075 | .id_table = products, | |
2076 | .probe = usbnet_probe, | |
b5a04475 | 2077 | .suspend = smsc95xx_suspend, |
e0e474a8 | 2078 | .resume = smsc95xx_resume, |
b4df480f | 2079 | .reset_resume = smsc95xx_reset_resume, |
2f7ca802 | 2080 | .disconnect = usbnet_disconnect, |
e1f12eb6 | 2081 | .disable_hub_initiated_lpm = 1, |
b2d4b150 | 2082 | .supports_autosuspend = 1, |
2f7ca802 SG |
2083 | }; |
2084 | ||
d632eb1b | 2085 | module_usb_driver(smsc95xx_driver); |
2f7ca802 SG |
2086 | |
2087 | MODULE_AUTHOR("Nancy Lin"); | |
90b24cfb | 2088 | MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>"); |
2f7ca802 SG |
2089 | MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices"); |
2090 | MODULE_LICENSE("GPL"); |