Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * This code is derived from the VIA reference driver (copyright message | |
3 | * below) provided to Red Hat by VIA Networking Technologies, Inc. for | |
4 | * addition to the Linux kernel. | |
5 | * | |
6 | * The code has been merged into one source file, cleaned up to follow | |
7 | * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned | |
8 | * for 64bit hardware platforms. | |
9 | * | |
10 | * TODO | |
1da177e4 | 11 | * rx_copybreak/alignment |
1da177e4 LT |
12 | * More testing |
13 | * | |
113aa838 | 14 | * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk> |
1da177e4 LT |
15 | * Additional fixes and clean up: Francois Romieu |
16 | * | |
17 | * This source has not been verified for use in safety critical systems. | |
18 | * | |
19 | * Please direct queries about the revamped driver to the linux-kernel | |
20 | * list not VIA. | |
21 | * | |
22 | * Original code: | |
23 | * | |
24 | * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. | |
25 | * All rights reserved. | |
26 | * | |
27 | * This software may be redistributed and/or modified under | |
28 | * the terms of the GNU General Public License as published by the Free | |
29 | * Software Foundation; either version 2 of the License, or | |
30 | * any later version. | |
31 | * | |
32 | * This program is distributed in the hope that it will be useful, but | |
33 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
34 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
35 | * for more details. | |
36 | * | |
37 | * Author: Chuang Liang-Shing, AJ Jiang | |
38 | * | |
39 | * Date: Jan 24, 2003 | |
40 | * | |
41 | * MODULE_LICENSE("GPL"); | |
42 | * | |
43 | */ | |
44 | ||
45 | ||
46 | #include <linux/module.h> | |
47 | #include <linux/types.h> | |
73b54688 | 48 | #include <linux/bitops.h> |
1da177e4 LT |
49 | #include <linux/init.h> |
50 | #include <linux/mm.h> | |
51 | #include <linux/errno.h> | |
52 | #include <linux/ioport.h> | |
53 | #include <linux/pci.h> | |
54 | #include <linux/kernel.h> | |
55 | #include <linux/netdevice.h> | |
56 | #include <linux/etherdevice.h> | |
57 | #include <linux/skbuff.h> | |
58 | #include <linux/delay.h> | |
59 | #include <linux/timer.h> | |
60 | #include <linux/slab.h> | |
61 | #include <linux/interrupt.h> | |
1da177e4 LT |
62 | #include <linux/string.h> |
63 | #include <linux/wait.h> | |
c4067400 | 64 | #include <linux/io.h> |
1da177e4 | 65 | #include <linux/if.h> |
c4067400 | 66 | #include <linux/uaccess.h> |
1da177e4 LT |
67 | #include <linux/proc_fs.h> |
68 | #include <linux/inetdevice.h> | |
69 | #include <linux/reboot.h> | |
70 | #include <linux/ethtool.h> | |
71 | #include <linux/mii.h> | |
72 | #include <linux/in.h> | |
73 | #include <linux/if_arp.h> | |
501e4d24 | 74 | #include <linux/if_vlan.h> |
1da177e4 LT |
75 | #include <linux/ip.h> |
76 | #include <linux/tcp.h> | |
77 | #include <linux/udp.h> | |
78 | #include <linux/crc-ccitt.h> | |
79 | #include <linux/crc32.h> | |
73b54688 | 80 | #include <linux/if_vlan.h> |
1da177e4 LT |
81 | |
82 | #include "via-velocity.h" | |
83 | ||
84 | ||
c4067400 | 85 | static int velocity_nics; |
1da177e4 LT |
86 | static int msglevel = MSG_LEVEL_INFO; |
87 | ||
01faccbf SH |
88 | /** |
89 | * mac_get_cam_mask - Read a CAM mask | |
90 | * @regs: register block for this velocity | |
91 | * @mask: buffer to store mask | |
92 | * | |
93 | * Fetch the mask bits of the selected CAM and store them into the | |
94 | * provided mask buffer. | |
95 | */ | |
c4067400 | 96 | static void mac_get_cam_mask(struct mac_regs __iomem *regs, u8 *mask) |
01faccbf SH |
97 | { |
98 | int i; | |
99 | ||
100 | /* Select CAM mask */ | |
101 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
102 | ||
103 | writeb(0, ®s->CAMADDR); | |
104 | ||
105 | /* read mask */ | |
106 | for (i = 0; i < 8; i++) | |
107 | *mask++ = readb(&(regs->MARCAM[i])); | |
108 | ||
109 | /* disable CAMEN */ | |
110 | writeb(0, ®s->CAMADDR); | |
111 | ||
112 | /* Select mar */ | |
113 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
01faccbf SH |
114 | } |
115 | ||
116 | ||
117 | /** | |
118 | * mac_set_cam_mask - Set a CAM mask | |
119 | * @regs: register block for this velocity | |
120 | * @mask: CAM mask to load | |
121 | * | |
122 | * Store a new mask into a CAM | |
123 | */ | |
c4067400 | 124 | static void mac_set_cam_mask(struct mac_regs __iomem *regs, u8 *mask) |
01faccbf SH |
125 | { |
126 | int i; | |
127 | /* Select CAM mask */ | |
128 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
129 | ||
130 | writeb(CAMADDR_CAMEN, ®s->CAMADDR); | |
131 | ||
c4067400 | 132 | for (i = 0; i < 8; i++) |
01faccbf | 133 | writeb(*mask++, &(regs->MARCAM[i])); |
c4067400 | 134 | |
01faccbf SH |
135 | /* disable CAMEN */ |
136 | writeb(0, ®s->CAMADDR); | |
137 | ||
138 | /* Select mar */ | |
139 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
140 | } | |
141 | ||
c4067400 | 142 | static void mac_set_vlan_cam_mask(struct mac_regs __iomem *regs, u8 *mask) |
01faccbf SH |
143 | { |
144 | int i; | |
145 | /* Select CAM mask */ | |
146 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
147 | ||
148 | writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, ®s->CAMADDR); | |
149 | ||
c4067400 | 150 | for (i = 0; i < 8; i++) |
01faccbf | 151 | writeb(*mask++, &(regs->MARCAM[i])); |
c4067400 | 152 | |
01faccbf SH |
153 | /* disable CAMEN */ |
154 | writeb(0, ®s->CAMADDR); | |
155 | ||
156 | /* Select mar */ | |
157 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
158 | } | |
159 | ||
160 | /** | |
161 | * mac_set_cam - set CAM data | |
162 | * @regs: register block of this velocity | |
163 | * @idx: Cam index | |
164 | * @addr: 2 or 6 bytes of CAM data | |
165 | * | |
166 | * Load an address or vlan tag into a CAM | |
167 | */ | |
c4067400 | 168 | static void mac_set_cam(struct mac_regs __iomem *regs, int idx, const u8 *addr) |
01faccbf SH |
169 | { |
170 | int i; | |
171 | ||
172 | /* Select CAM mask */ | |
173 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
174 | ||
175 | idx &= (64 - 1); | |
176 | ||
177 | writeb(CAMADDR_CAMEN | idx, ®s->CAMADDR); | |
178 | ||
c4067400 | 179 | for (i = 0; i < 6; i++) |
01faccbf | 180 | writeb(*addr++, &(regs->MARCAM[i])); |
c4067400 | 181 | |
01faccbf SH |
182 | BYTE_REG_BITS_ON(CAMCR_CAMWR, ®s->CAMCR); |
183 | ||
184 | udelay(10); | |
185 | ||
186 | writeb(0, ®s->CAMADDR); | |
187 | ||
188 | /* Select mar */ | |
189 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
190 | } | |
191 | ||
c4067400 | 192 | static void mac_set_vlan_cam(struct mac_regs __iomem *regs, int idx, |
01faccbf SH |
193 | const u8 *addr) |
194 | { | |
195 | ||
196 | /* Select CAM mask */ | |
197 | BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
198 | ||
199 | idx &= (64 - 1); | |
200 | ||
201 | writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, ®s->CAMADDR); | |
202 | writew(*((u16 *) addr), ®s->MARCAM[0]); | |
203 | ||
204 | BYTE_REG_BITS_ON(CAMCR_CAMWR, ®s->CAMCR); | |
205 | ||
206 | udelay(10); | |
207 | ||
208 | writeb(0, ®s->CAMADDR); | |
209 | ||
210 | /* Select mar */ | |
211 | BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); | |
212 | } | |
213 | ||
214 | ||
215 | /** | |
216 | * mac_wol_reset - reset WOL after exiting low power | |
217 | * @regs: register block of this velocity | |
218 | * | |
219 | * Called after we drop out of wake on lan mode in order to | |
220 | * reset the Wake on lan features. This function doesn't restore | |
221 | * the rest of the logic from the result of sleep/wakeup | |
222 | */ | |
c4067400 | 223 | static void mac_wol_reset(struct mac_regs __iomem *regs) |
01faccbf SH |
224 | { |
225 | ||
226 | /* Turn off SWPTAG right after leaving power mode */ | |
227 | BYTE_REG_BITS_OFF(STICKHW_SWPTAG, ®s->STICKHW); | |
228 | /* clear sticky bits */ | |
229 | BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), ®s->STICKHW); | |
230 | ||
231 | BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, ®s->CHIPGCR); | |
232 | BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, ®s->CHIPGCR); | |
233 | /* disable force PME-enable */ | |
234 | writeb(WOLCFG_PMEOVR, ®s->WOLCFGClr); | |
235 | /* disable power-event config bit */ | |
236 | writew(0xFFFF, ®s->WOLCRClr); | |
237 | /* clear power status */ | |
238 | writew(0xFFFF, ®s->WOLSRClr); | |
239 | } | |
1da177e4 | 240 | |
7282d491 | 241 | static const struct ethtool_ops velocity_ethtool_ops; |
1da177e4 LT |
242 | |
243 | /* | |
244 | Define module options | |
245 | */ | |
246 | ||
247 | MODULE_AUTHOR("VIA Networking Technologies, Inc."); | |
248 | MODULE_LICENSE("GPL"); | |
249 | MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver"); | |
250 | ||
c4067400 DJ |
251 | #define VELOCITY_PARAM(N, D) \ |
252 | static int N[MAX_UNITS] = OPTION_DEFAULT;\ | |
1da177e4 | 253 | module_param_array(N, int, NULL, 0); \ |
c4067400 | 254 | MODULE_PARM_DESC(N, D); |
1da177e4 LT |
255 | |
256 | #define RX_DESC_MIN 64 | |
257 | #define RX_DESC_MAX 255 | |
258 | #define RX_DESC_DEF 64 | |
259 | VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors"); | |
260 | ||
261 | #define TX_DESC_MIN 16 | |
262 | #define TX_DESC_MAX 256 | |
263 | #define TX_DESC_DEF 64 | |
264 | VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors"); | |
265 | ||
1da177e4 LT |
266 | #define RX_THRESH_MIN 0 |
267 | #define RX_THRESH_MAX 3 | |
268 | #define RX_THRESH_DEF 0 | |
269 | /* rx_thresh[] is used for controlling the receive fifo threshold. | |
270 | 0: indicate the rxfifo threshold is 128 bytes. | |
271 | 1: indicate the rxfifo threshold is 512 bytes. | |
272 | 2: indicate the rxfifo threshold is 1024 bytes. | |
273 | 3: indicate the rxfifo threshold is store & forward. | |
274 | */ | |
275 | VELOCITY_PARAM(rx_thresh, "Receive fifo threshold"); | |
276 | ||
277 | #define DMA_LENGTH_MIN 0 | |
278 | #define DMA_LENGTH_MAX 7 | |
2a5774f7 | 279 | #define DMA_LENGTH_DEF 6 |
1da177e4 LT |
280 | |
281 | /* DMA_length[] is used for controlling the DMA length | |
282 | 0: 8 DWORDs | |
283 | 1: 16 DWORDs | |
284 | 2: 32 DWORDs | |
285 | 3: 64 DWORDs | |
286 | 4: 128 DWORDs | |
287 | 5: 256 DWORDs | |
288 | 6: SF(flush till emply) | |
289 | 7: SF(flush till emply) | |
290 | */ | |
291 | VELOCITY_PARAM(DMA_length, "DMA length"); | |
292 | ||
1da177e4 LT |
293 | #define IP_ALIG_DEF 0 |
294 | /* IP_byte_align[] is used for IP header DWORD byte aligned | |
295 | 0: indicate the IP header won't be DWORD byte aligned.(Default) . | |
296 | 1: indicate the IP header will be DWORD byte aligned. | |
25985edc | 297 | In some environment, the IP header should be DWORD byte aligned, |
1da177e4 LT |
298 | or the packet will be droped when we receive it. (eg: IPVS) |
299 | */ | |
300 | VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned"); | |
301 | ||
1da177e4 LT |
302 | #define FLOW_CNTL_DEF 1 |
303 | #define FLOW_CNTL_MIN 1 | |
304 | #define FLOW_CNTL_MAX 5 | |
305 | ||
306 | /* flow_control[] is used for setting the flow control ability of NIC. | |
307 | 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR. | |
308 | 2: enable TX flow control. | |
309 | 3: enable RX flow control. | |
310 | 4: enable RX/TX flow control. | |
311 | 5: disable | |
312 | */ | |
313 | VELOCITY_PARAM(flow_control, "Enable flow control ability"); | |
314 | ||
315 | #define MED_LNK_DEF 0 | |
316 | #define MED_LNK_MIN 0 | |
15419227 | 317 | #define MED_LNK_MAX 5 |
1da177e4 LT |
318 | /* speed_duplex[] is used for setting the speed and duplex mode of NIC. |
319 | 0: indicate autonegotiation for both speed and duplex mode | |
320 | 1: indicate 100Mbps half duplex mode | |
321 | 2: indicate 100Mbps full duplex mode | |
322 | 3: indicate 10Mbps half duplex mode | |
323 | 4: indicate 10Mbps full duplex mode | |
15419227 | 324 | 5: indicate 1000Mbps full duplex mode |
1da177e4 LT |
325 | |
326 | Note: | |
c4067400 DJ |
327 | if EEPROM have been set to the force mode, this option is ignored |
328 | by driver. | |
1da177e4 LT |
329 | */ |
330 | VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode"); | |
331 | ||
332 | #define VAL_PKT_LEN_DEF 0 | |
333 | /* ValPktLen[] is used for setting the checksum offload ability of NIC. | |
334 | 0: Receive frame with invalid layer 2 length (Default) | |
335 | 1: Drop frame with invalid layer 2 length | |
336 | */ | |
337 | VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame"); | |
338 | ||
339 | #define WOL_OPT_DEF 0 | |
340 | #define WOL_OPT_MIN 0 | |
341 | #define WOL_OPT_MAX 7 | |
342 | /* wol_opts[] is used for controlling wake on lan behavior. | |
343 | 0: Wake up if recevied a magic packet. (Default) | |
344 | 1: Wake up if link status is on/off. | |
345 | 2: Wake up if recevied an arp packet. | |
346 | 4: Wake up if recevied any unicast packet. | |
347 | Those value can be sumed up to support more than one option. | |
348 | */ | |
349 | VELOCITY_PARAM(wol_opts, "Wake On Lan options"); | |
350 | ||
1da177e4 LT |
351 | static int rx_copybreak = 200; |
352 | module_param(rx_copybreak, int, 0644); | |
353 | MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames"); | |
354 | ||
1da177e4 LT |
355 | /* |
356 | * Internal board variants. At the moment we have only one | |
357 | */ | |
4f14b92f | 358 | static struct velocity_info_tbl chip_info_table[] = { |
cabb7667 JG |
359 | {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL}, |
360 | { } | |
1da177e4 LT |
361 | }; |
362 | ||
363 | /* | |
364 | * Describe the PCI device identifiers that we support in this | |
365 | * device driver. Used for hotplug autoloading. | |
366 | */ | |
a3aa1884 | 367 | static DEFINE_PCI_DEVICE_TABLE(velocity_id_table) = { |
e54f4893 JG |
368 | { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) }, |
369 | { } | |
1da177e4 LT |
370 | }; |
371 | ||
372 | MODULE_DEVICE_TABLE(pci, velocity_id_table); | |
373 | ||
374 | /** | |
375 | * get_chip_name - identifier to name | |
376 | * @id: chip identifier | |
377 | * | |
378 | * Given a chip identifier return a suitable description. Returns | |
379 | * a pointer a static string valid while the driver is loaded. | |
380 | */ | |
01faccbf | 381 | static const char __devinit *get_chip_name(enum chip_type chip_id) |
1da177e4 LT |
382 | { |
383 | int i; | |
384 | for (i = 0; chip_info_table[i].name != NULL; i++) | |
385 | if (chip_info_table[i].chip_id == chip_id) | |
386 | break; | |
387 | return chip_info_table[i].name; | |
388 | } | |
389 | ||
390 | /** | |
391 | * velocity_remove1 - device unplug | |
392 | * @pdev: PCI device being removed | |
393 | * | |
394 | * Device unload callback. Called on an unplug or on module | |
395 | * unload for each active device that is present. Disconnects | |
396 | * the device from the network layer and frees all the resources | |
397 | */ | |
1da177e4 LT |
398 | static void __devexit velocity_remove1(struct pci_dev *pdev) |
399 | { | |
400 | struct net_device *dev = pci_get_drvdata(pdev); | |
8ab6f3f7 | 401 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 | 402 | |
1da177e4 LT |
403 | unregister_netdev(dev); |
404 | iounmap(vptr->mac_regs); | |
405 | pci_release_regions(pdev); | |
406 | pci_disable_device(pdev); | |
407 | pci_set_drvdata(pdev, NULL); | |
408 | free_netdev(dev); | |
409 | ||
410 | velocity_nics--; | |
411 | } | |
412 | ||
413 | /** | |
414 | * velocity_set_int_opt - parser for integer options | |
415 | * @opt: pointer to option value | |
416 | * @val: value the user requested (or -1 for default) | |
417 | * @min: lowest value allowed | |
418 | * @max: highest value allowed | |
419 | * @def: default value | |
420 | * @name: property name | |
421 | * @dev: device name | |
422 | * | |
423 | * Set an integer property in the module options. This function does | |
424 | * all the verification and checking as well as reporting so that | |
425 | * we don't duplicate code for each option. | |
426 | */ | |
07b5f6a6 | 427 | static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, const char *devname) |
1da177e4 LT |
428 | { |
429 | if (val == -1) | |
430 | *opt = def; | |
431 | else if (val < min || val > max) { | |
432 | VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n", | |
433 | devname, name, min, max); | |
434 | *opt = def; | |
435 | } else { | |
436 | VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n", | |
437 | devname, name, val); | |
438 | *opt = val; | |
439 | } | |
440 | } | |
441 | ||
442 | /** | |
443 | * velocity_set_bool_opt - parser for boolean options | |
444 | * @opt: pointer to option value | |
445 | * @val: value the user requested (or -1 for default) | |
446 | * @def: default value (yes/no) | |
447 | * @flag: numeric value to set for true. | |
448 | * @name: property name | |
449 | * @dev: device name | |
450 | * | |
451 | * Set a boolean property in the module options. This function does | |
452 | * all the verification and checking as well as reporting so that | |
453 | * we don't duplicate code for each option. | |
454 | */ | |
c4067400 | 455 | static void __devinit velocity_set_bool_opt(u32 *opt, int val, int def, u32 flag, char *name, const char *devname) |
1da177e4 LT |
456 | { |
457 | (*opt) &= (~flag); | |
458 | if (val == -1) | |
459 | *opt |= (def ? flag : 0); | |
460 | else if (val < 0 || val > 1) { | |
6aa20a22 | 461 | printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n", |
1da177e4 LT |
462 | devname, name); |
463 | *opt |= (def ? flag : 0); | |
464 | } else { | |
6aa20a22 | 465 | printk(KERN_INFO "%s: set parameter %s to %s\n", |
1da177e4 LT |
466 | devname, name, val ? "TRUE" : "FALSE"); |
467 | *opt |= (val ? flag : 0); | |
468 | } | |
469 | } | |
470 | ||
471 | /** | |
472 | * velocity_get_options - set options on device | |
473 | * @opts: option structure for the device | |
474 | * @index: index of option to use in module options array | |
475 | * @devname: device name | |
476 | * | |
477 | * Turn the module and command options into a single structure | |
478 | * for the current device | |
479 | */ | |
07b5f6a6 | 480 | static void __devinit velocity_get_options(struct velocity_opt *opts, int index, const char *devname) |
1da177e4 LT |
481 | { |
482 | ||
483 | velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname); | |
484 | velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname); | |
485 | velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname); | |
486 | velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname); | |
501e4d24 | 487 | |
1da177e4 LT |
488 | velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname); |
489 | velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname); | |
490 | velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname); | |
491 | velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname); | |
492 | velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname); | |
1da177e4 LT |
493 | opts->numrx = (opts->numrx & ~3); |
494 | } | |
495 | ||
496 | /** | |
497 | * velocity_init_cam_filter - initialise CAM | |
498 | * @vptr: velocity to program | |
499 | * | |
500 | * Initialize the content addressable memory used for filters. Load | |
501 | * appropriately according to the presence of VLAN | |
502 | */ | |
1da177e4 LT |
503 | static void velocity_init_cam_filter(struct velocity_info *vptr) |
504 | { | |
c4067400 | 505 | struct mac_regs __iomem *regs = vptr->mac_regs; |
73b54688 | 506 | unsigned int vid, i = 0; |
1da177e4 LT |
507 | |
508 | /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */ | |
509 | WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, ®s->MCFG); | |
510 | WORD_REG_BITS_ON(MCFG_VIDFR, ®s->MCFG); | |
511 | ||
512 | /* Disable all CAMs */ | |
513 | memset(vptr->vCAMmask, 0, sizeof(u8) * 8); | |
514 | memset(vptr->mCAMmask, 0, sizeof(u8) * 8); | |
01faccbf SH |
515 | mac_set_vlan_cam_mask(regs, vptr->vCAMmask); |
516 | mac_set_cam_mask(regs, vptr->mCAMmask); | |
1da177e4 | 517 | |
d4f73c8e | 518 | /* Enable VCAMs */ |
1da177e4 | 519 | |
73b54688 JP |
520 | if (test_bit(0, vptr->active_vlans)) |
521 | WORD_REG_BITS_ON(MCFG_RTGOPT, ®s->MCFG); | |
d4f73c8e | 522 | |
73b54688 JP |
523 | for_each_set_bit(vid, vptr->active_vlans, VLAN_N_VID) { |
524 | mac_set_vlan_cam(regs, i, (u8 *) &vid); | |
525 | vptr->vCAMmask[i / 8] |= 0x1 << (i % 8); | |
526 | if (++i >= VCAM_SIZE) | |
527 | break; | |
528 | } | |
529 | mac_set_vlan_cam_mask(regs, vptr->vCAMmask); | |
d4f73c8e FR |
530 | } |
531 | ||
501e4d24 SH |
532 | static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid) |
533 | { | |
534 | struct velocity_info *vptr = netdev_priv(dev); | |
535 | ||
c4067400 | 536 | spin_lock_irq(&vptr->lock); |
73b54688 | 537 | set_bit(vid, vptr->active_vlans); |
501e4d24 | 538 | velocity_init_cam_filter(vptr); |
c4067400 | 539 | spin_unlock_irq(&vptr->lock); |
501e4d24 SH |
540 | } |
541 | ||
542 | static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) | |
543 | { | |
544 | struct velocity_info *vptr = netdev_priv(dev); | |
545 | ||
c4067400 | 546 | spin_lock_irq(&vptr->lock); |
73b54688 | 547 | clear_bit(vid, vptr->active_vlans); |
501e4d24 | 548 | velocity_init_cam_filter(vptr); |
c4067400 | 549 | spin_unlock_irq(&vptr->lock); |
501e4d24 SH |
550 | } |
551 | ||
3c4dc711 FR |
552 | static void velocity_init_rx_ring_indexes(struct velocity_info *vptr) |
553 | { | |
554 | vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0; | |
555 | } | |
501e4d24 | 556 | |
1da177e4 LT |
557 | /** |
558 | * velocity_rx_reset - handle a receive reset | |
559 | * @vptr: velocity we are resetting | |
560 | * | |
561 | * Reset the ownership and status for the receive ring side. | |
562 | * Hand all the receive queue to the NIC. | |
563 | */ | |
1da177e4 LT |
564 | static void velocity_rx_reset(struct velocity_info *vptr) |
565 | { | |
566 | ||
c4067400 | 567 | struct mac_regs __iomem *regs = vptr->mac_regs; |
1da177e4 LT |
568 | int i; |
569 | ||
3c4dc711 | 570 | velocity_init_rx_ring_indexes(vptr); |
1da177e4 LT |
571 | |
572 | /* | |
573 | * Init state, all RD entries belong to the NIC | |
574 | */ | |
575 | for (i = 0; i < vptr->options.numrx; ++i) | |
0fe9f15e | 576 | vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC; |
1da177e4 LT |
577 | |
578 | writew(vptr->options.numrx, ®s->RBRDU); | |
0fe9f15e | 579 | writel(vptr->rx.pool_dma, ®s->RDBaseLo); |
1da177e4 LT |
580 | writew(0, ®s->RDIdx); |
581 | writew(vptr->options.numrx - 1, ®s->RDCSize); | |
582 | } | |
583 | ||
584 | /** | |
2cf71d2e DJ |
585 | * velocity_get_opt_media_mode - get media selection |
586 | * @vptr: velocity adapter | |
1da177e4 | 587 | * |
2cf71d2e DJ |
588 | * Get the media mode stored in EEPROM or module options and load |
589 | * mii_status accordingly. The requested link state information | |
590 | * is also returned. | |
1da177e4 | 591 | */ |
2cf71d2e | 592 | static u32 velocity_get_opt_media_mode(struct velocity_info *vptr) |
1da177e4 | 593 | { |
2cf71d2e | 594 | u32 status = 0; |
1da177e4 | 595 | |
2cf71d2e DJ |
596 | switch (vptr->options.spd_dpx) { |
597 | case SPD_DPX_AUTO: | |
598 | status = VELOCITY_AUTONEG_ENABLE; | |
1da177e4 | 599 | break; |
2cf71d2e DJ |
600 | case SPD_DPX_100_FULL: |
601 | status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL; | |
602 | break; | |
603 | case SPD_DPX_10_FULL: | |
604 | status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL; | |
605 | break; | |
606 | case SPD_DPX_100_HALF: | |
607 | status = VELOCITY_SPEED_100; | |
608 | break; | |
609 | case SPD_DPX_10_HALF: | |
610 | status = VELOCITY_SPEED_10; | |
611 | break; | |
15419227 | 612 | case SPD_DPX_1000_FULL: |
613 | status = VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL; | |
614 | break; | |
2cf71d2e DJ |
615 | } |
616 | vptr->mii_status = status; | |
617 | return status; | |
618 | } | |
1da177e4 | 619 | |
2cf71d2e DJ |
620 | /** |
621 | * safe_disable_mii_autopoll - autopoll off | |
622 | * @regs: velocity registers | |
623 | * | |
624 | * Turn off the autopoll and wait for it to disable on the chip | |
625 | */ | |
626 | static void safe_disable_mii_autopoll(struct mac_regs __iomem *regs) | |
627 | { | |
628 | u16 ww; | |
1da177e4 | 629 | |
2cf71d2e DJ |
630 | /* turn off MAUTO */ |
631 | writeb(0, ®s->MIICR); | |
632 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
633 | udelay(1); | |
634 | if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, ®s->MIISR)) | |
635 | break; | |
636 | } | |
637 | } | |
1da177e4 | 638 | |
2cf71d2e DJ |
639 | /** |
640 | * enable_mii_autopoll - turn on autopolling | |
641 | * @regs: velocity registers | |
642 | * | |
643 | * Enable the MII link status autopoll feature on the Velocity | |
644 | * hardware. Wait for it to enable. | |
645 | */ | |
646 | static void enable_mii_autopoll(struct mac_regs __iomem *regs) | |
647 | { | |
648 | int ii; | |
1da177e4 | 649 | |
2cf71d2e DJ |
650 | writeb(0, &(regs->MIICR)); |
651 | writeb(MIIADR_SWMPL, ®s->MIIADR); | |
1da177e4 | 652 | |
2cf71d2e DJ |
653 | for (ii = 0; ii < W_MAX_TIMEOUT; ii++) { |
654 | udelay(1); | |
655 | if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, ®s->MIISR)) | |
656 | break; | |
657 | } | |
1da177e4 | 658 | |
2cf71d2e | 659 | writeb(MIICR_MAUTO, ®s->MIICR); |
1da177e4 | 660 | |
2cf71d2e DJ |
661 | for (ii = 0; ii < W_MAX_TIMEOUT; ii++) { |
662 | udelay(1); | |
663 | if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, ®s->MIISR)) | |
664 | break; | |
665 | } | |
1da177e4 | 666 | |
2cf71d2e | 667 | } |
1da177e4 | 668 | |
2cf71d2e DJ |
669 | /** |
670 | * velocity_mii_read - read MII data | |
671 | * @regs: velocity registers | |
672 | * @index: MII register index | |
673 | * @data: buffer for received data | |
674 | * | |
675 | * Perform a single read of an MII 16bit register. Returns zero | |
676 | * on success or -ETIMEDOUT if the PHY did not respond. | |
677 | */ | |
678 | static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data) | |
679 | { | |
680 | u16 ww; | |
1da177e4 | 681 | |
2cf71d2e DJ |
682 | /* |
683 | * Disable MIICR_MAUTO, so that mii addr can be set normally | |
684 | */ | |
685 | safe_disable_mii_autopoll(regs); | |
1da177e4 | 686 | |
2cf71d2e | 687 | writeb(index, ®s->MIIADR); |
1da177e4 | 688 | |
2cf71d2e | 689 | BYTE_REG_BITS_ON(MIICR_RCMD, ®s->MIICR); |
1da177e4 | 690 | |
2cf71d2e DJ |
691 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { |
692 | if (!(readb(®s->MIICR) & MIICR_RCMD)) | |
693 | break; | |
694 | } | |
1da177e4 | 695 | |
2cf71d2e | 696 | *data = readw(®s->MIIDATA); |
1da177e4 | 697 | |
2cf71d2e DJ |
698 | enable_mii_autopoll(regs); |
699 | if (ww == W_MAX_TIMEOUT) | |
700 | return -ETIMEDOUT; | |
701 | return 0; | |
1da177e4 LT |
702 | } |
703 | ||
2cf71d2e | 704 | |
1da177e4 | 705 | /** |
2cf71d2e DJ |
706 | * mii_check_media_mode - check media state |
707 | * @regs: velocity registers | |
1da177e4 | 708 | * |
2cf71d2e DJ |
709 | * Check the current MII status and determine the link status |
710 | * accordingly | |
1da177e4 | 711 | */ |
2cf71d2e | 712 | static u32 mii_check_media_mode(struct mac_regs __iomem *regs) |
1da177e4 | 713 | { |
2cf71d2e DJ |
714 | u32 status = 0; |
715 | u16 ANAR; | |
1da177e4 | 716 | |
3a7f8681 | 717 | if (!MII_REG_BITS_IS_ON(BMSR_LSTATUS, MII_BMSR, regs)) |
2cf71d2e | 718 | status |= VELOCITY_LINK_FAIL; |
1da177e4 | 719 | |
3a7f8681 | 720 | if (MII_REG_BITS_IS_ON(ADVERTISE_1000FULL, MII_CTRL1000, regs)) |
2cf71d2e | 721 | status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL; |
3a7f8681 | 722 | else if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF, MII_CTRL1000, regs)) |
2cf71d2e DJ |
723 | status |= (VELOCITY_SPEED_1000); |
724 | else { | |
3a7f8681 FR |
725 | velocity_mii_read(regs, MII_ADVERTISE, &ANAR); |
726 | if (ANAR & ADVERTISE_100FULL) | |
2cf71d2e | 727 | status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL); |
3a7f8681 | 728 | else if (ANAR & ADVERTISE_100HALF) |
2cf71d2e | 729 | status |= VELOCITY_SPEED_100; |
3a7f8681 | 730 | else if (ANAR & ADVERTISE_10FULL) |
2cf71d2e DJ |
731 | status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL); |
732 | else | |
733 | status |= (VELOCITY_SPEED_10); | |
1da177e4 LT |
734 | } |
735 | ||
3a7f8681 FR |
736 | if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, regs)) { |
737 | velocity_mii_read(regs, MII_ADVERTISE, &ANAR); | |
738 | if ((ANAR & (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) | |
739 | == (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) { | |
740 | if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF | ADVERTISE_1000FULL, MII_CTRL1000, regs)) | |
2cf71d2e DJ |
741 | status |= VELOCITY_AUTONEG_ENABLE; |
742 | } | |
1da177e4 | 743 | } |
1da177e4 | 744 | |
2cf71d2e DJ |
745 | return status; |
746 | } | |
39a11bd9 | 747 | |
1da177e4 | 748 | /** |
2cf71d2e DJ |
749 | * velocity_mii_write - write MII data |
750 | * @regs: velocity registers | |
751 | * @index: MII register index | |
752 | * @data: 16bit data for the MII register | |
1da177e4 | 753 | * |
2cf71d2e DJ |
754 | * Perform a single write to an MII 16bit register. Returns zero |
755 | * on success or -ETIMEDOUT if the PHY did not respond. | |
1da177e4 | 756 | */ |
2cf71d2e | 757 | static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data) |
1da177e4 | 758 | { |
2cf71d2e | 759 | u16 ww; |
1da177e4 | 760 | |
2cf71d2e DJ |
761 | /* |
762 | * Disable MIICR_MAUTO, so that mii addr can be set normally | |
e54f4893 | 763 | */ |
2cf71d2e | 764 | safe_disable_mii_autopoll(regs); |
1da177e4 | 765 | |
2cf71d2e DJ |
766 | /* MII reg offset */ |
767 | writeb(mii_addr, ®s->MIIADR); | |
768 | /* set MII data */ | |
769 | writew(data, ®s->MIIDATA); | |
770 | ||
771 | /* turn on MIICR_WCMD */ | |
772 | BYTE_REG_BITS_ON(MIICR_WCMD, ®s->MIICR); | |
773 | ||
774 | /* W_MAX_TIMEOUT is the timeout period */ | |
775 | for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { | |
776 | udelay(5); | |
777 | if (!(readb(®s->MIICR) & MIICR_WCMD)) | |
778 | break; | |
1da177e4 | 779 | } |
2cf71d2e | 780 | enable_mii_autopoll(regs); |
6aa20a22 | 781 | |
2cf71d2e DJ |
782 | if (ww == W_MAX_TIMEOUT) |
783 | return -ETIMEDOUT; | |
784 | return 0; | |
785 | } | |
6aa20a22 | 786 | |
2cf71d2e DJ |
787 | /** |
788 | * set_mii_flow_control - flow control setup | |
789 | * @vptr: velocity interface | |
790 | * | |
791 | * Set up the flow control on this interface according to | |
792 | * the supplied user/eeprom options. | |
793 | */ | |
794 | static void set_mii_flow_control(struct velocity_info *vptr) | |
795 | { | |
796 | /*Enable or Disable PAUSE in ANAR */ | |
797 | switch (vptr->options.flow_cntl) { | |
798 | case FLOW_CNTL_TX: | |
3a7f8681 FR |
799 | MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs); |
800 | MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs); | |
2cf71d2e | 801 | break; |
1da177e4 | 802 | |
2cf71d2e | 803 | case FLOW_CNTL_RX: |
3a7f8681 FR |
804 | MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs); |
805 | MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs); | |
2cf71d2e | 806 | break; |
1da177e4 | 807 | |
2cf71d2e | 808 | case FLOW_CNTL_TX_RX: |
3a7f8681 | 809 | MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs); |
4a35ecf8 | 810 | MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs); |
2cf71d2e | 811 | break; |
1da177e4 | 812 | |
2cf71d2e | 813 | case FLOW_CNTL_DISABLE: |
3a7f8681 FR |
814 | MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs); |
815 | MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs); | |
2cf71d2e DJ |
816 | break; |
817 | default: | |
818 | break; | |
819 | } | |
820 | } | |
1da177e4 | 821 | |
2cf71d2e DJ |
822 | /** |
823 | * mii_set_auto_on - autonegotiate on | |
824 | * @vptr: velocity | |
825 | * | |
826 | * Enable autonegotation on this interface | |
827 | */ | |
828 | static void mii_set_auto_on(struct velocity_info *vptr) | |
829 | { | |
3a7f8681 FR |
830 | if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs)) |
831 | MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs); | |
2cf71d2e | 832 | else |
3a7f8681 | 833 | MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs); |
2cf71d2e | 834 | } |
1da177e4 | 835 | |
2cf71d2e DJ |
836 | static u32 check_connection_type(struct mac_regs __iomem *regs) |
837 | { | |
838 | u32 status = 0; | |
839 | u8 PHYSR0; | |
840 | u16 ANAR; | |
841 | PHYSR0 = readb(®s->PHYSR0); | |
1da177e4 | 842 | |
2cf71d2e DJ |
843 | /* |
844 | if (!(PHYSR0 & PHYSR0_LINKGD)) | |
845 | status|=VELOCITY_LINK_FAIL; | |
846 | */ | |
1da177e4 | 847 | |
2cf71d2e DJ |
848 | if (PHYSR0 & PHYSR0_FDPX) |
849 | status |= VELOCITY_DUPLEX_FULL; | |
1da177e4 | 850 | |
2cf71d2e DJ |
851 | if (PHYSR0 & PHYSR0_SPDG) |
852 | status |= VELOCITY_SPEED_1000; | |
853 | else if (PHYSR0 & PHYSR0_SPD10) | |
854 | status |= VELOCITY_SPEED_10; | |
855 | else | |
856 | status |= VELOCITY_SPEED_100; | |
1da177e4 | 857 | |
3a7f8681 FR |
858 | if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, regs)) { |
859 | velocity_mii_read(regs, MII_ADVERTISE, &ANAR); | |
860 | if ((ANAR & (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) | |
861 | == (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) { | |
862 | if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF | ADVERTISE_1000FULL, MII_CTRL1000, regs)) | |
2cf71d2e DJ |
863 | status |= VELOCITY_AUTONEG_ENABLE; |
864 | } | |
1da177e4 LT |
865 | } |
866 | ||
2cf71d2e DJ |
867 | return status; |
868 | } | |
1da177e4 | 869 | |
1da177e4 | 870 | |
1da177e4 | 871 | |
2cf71d2e DJ |
872 | /** |
873 | * velocity_set_media_mode - set media mode | |
874 | * @mii_status: old MII link state | |
875 | * | |
876 | * Check the media link state and configure the flow control | |
877 | * PHY and also velocity hardware setup accordingly. In particular | |
878 | * we need to set up CD polling and frame bursting. | |
879 | */ | |
880 | static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status) | |
881 | { | |
882 | u32 curr_status; | |
883 | struct mac_regs __iomem *regs = vptr->mac_regs; | |
1da177e4 | 884 | |
2cf71d2e DJ |
885 | vptr->mii_status = mii_check_media_mode(vptr->mac_regs); |
886 | curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL); | |
07b5f6a6 | 887 | |
2cf71d2e DJ |
888 | /* Set mii link status */ |
889 | set_mii_flow_control(vptr); | |
1da177e4 | 890 | |
6aa20a22 | 891 | /* |
a34f0b31 | 892 | Check if new status is consistent with current status |
8e95a202 JP |
893 | if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE) || |
894 | (mii_status==curr_status)) { | |
2cf71d2e DJ |
895 | vptr->mii_status=mii_check_media_mode(vptr->mac_regs); |
896 | vptr->mii_status=check_connection_type(vptr->mac_regs); | |
897 | VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n"); | |
898 | return 0; | |
899 | } | |
1da177e4 | 900 | */ |
6aa20a22 | 901 | |
2cf71d2e | 902 | if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) |
3a7f8681 | 903 | MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs); |
1da177e4 LT |
904 | |
905 | /* | |
2cf71d2e | 906 | * If connection type is AUTO |
1da177e4 | 907 | */ |
2cf71d2e DJ |
908 | if (mii_status & VELOCITY_AUTONEG_ENABLE) { |
909 | VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n"); | |
910 | /* clear force MAC mode bit */ | |
911 | BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, ®s->CHIPGCR); | |
912 | /* set duplex mode of MAC according to duplex mode of MII */ | |
3a7f8681 FR |
913 | MII_REG_BITS_ON(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF, MII_ADVERTISE, vptr->mac_regs); |
914 | MII_REG_BITS_ON(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs); | |
915 | MII_REG_BITS_ON(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs); | |
6aa20a22 | 916 | |
2cf71d2e DJ |
917 | /* enable AUTO-NEGO mode */ |
918 | mii_set_auto_on(vptr); | |
919 | } else { | |
15419227 | 920 | u16 CTRL1000; |
2cf71d2e DJ |
921 | u16 ANAR; |
922 | u8 CHIPGCR; | |
1da177e4 | 923 | |
2cf71d2e DJ |
924 | /* |
925 | * 1. if it's 3119, disable frame bursting in halfduplex mode | |
926 | * and enable it in fullduplex mode | |
927 | * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR | |
928 | * 3. only enable CD heart beat counter in 10HD mode | |
929 | */ | |
1da177e4 | 930 | |
2cf71d2e DJ |
931 | /* set force MAC mode bit */ |
932 | BYTE_REG_BITS_ON(CHIPGCR_FCMODE, ®s->CHIPGCR); | |
1da177e4 | 933 | |
2cf71d2e | 934 | CHIPGCR = readb(®s->CHIPGCR); |
15419227 | 935 | |
936 | if (mii_status & VELOCITY_SPEED_1000) | |
937 | CHIPGCR |= CHIPGCR_FCGMII; | |
938 | else | |
939 | CHIPGCR &= ~CHIPGCR_FCGMII; | |
501e4d24 | 940 | |
2cf71d2e DJ |
941 | if (mii_status & VELOCITY_DUPLEX_FULL) { |
942 | CHIPGCR |= CHIPGCR_FCFDX; | |
943 | writeb(CHIPGCR, ®s->CHIPGCR); | |
944 | VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n"); | |
945 | if (vptr->rev_id < REV_ID_VT3216_A0) | |
946 | BYTE_REG_BITS_OFF(TCR_TB2BDIS, ®s->TCR); | |
947 | } else { | |
948 | CHIPGCR &= ~CHIPGCR_FCFDX; | |
949 | VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n"); | |
950 | writeb(CHIPGCR, ®s->CHIPGCR); | |
951 | if (vptr->rev_id < REV_ID_VT3216_A0) | |
952 | BYTE_REG_BITS_ON(TCR_TB2BDIS, ®s->TCR); | |
953 | } | |
1da177e4 | 954 | |
15419227 | 955 | velocity_mii_read(vptr->mac_regs, MII_CTRL1000, &CTRL1000); |
956 | CTRL1000 &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
957 | if ((mii_status & VELOCITY_SPEED_1000) && | |
958 | (mii_status & VELOCITY_DUPLEX_FULL)) { | |
959 | CTRL1000 |= ADVERTISE_1000FULL; | |
960 | } | |
961 | velocity_mii_write(vptr->mac_regs, MII_CTRL1000, CTRL1000); | |
1da177e4 | 962 | |
2cf71d2e DJ |
963 | if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) |
964 | BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG); | |
965 | else | |
966 | BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG); | |
1da177e4 | 967 | |
3a7f8681 FR |
968 | /* MII_REG_BITS_OFF(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs); */ |
969 | velocity_mii_read(vptr->mac_regs, MII_ADVERTISE, &ANAR); | |
970 | ANAR &= (~(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)); | |
2cf71d2e DJ |
971 | if (mii_status & VELOCITY_SPEED_100) { |
972 | if (mii_status & VELOCITY_DUPLEX_FULL) | |
3a7f8681 | 973 | ANAR |= ADVERTISE_100FULL; |
2cf71d2e | 974 | else |
3a7f8681 | 975 | ANAR |= ADVERTISE_100HALF; |
15419227 | 976 | } else if (mii_status & VELOCITY_SPEED_10) { |
2cf71d2e | 977 | if (mii_status & VELOCITY_DUPLEX_FULL) |
3a7f8681 | 978 | ANAR |= ADVERTISE_10FULL; |
2cf71d2e | 979 | else |
3a7f8681 | 980 | ANAR |= ADVERTISE_10HALF; |
2cf71d2e | 981 | } |
3a7f8681 | 982 | velocity_mii_write(vptr->mac_regs, MII_ADVERTISE, ANAR); |
2cf71d2e DJ |
983 | /* enable AUTO-NEGO mode */ |
984 | mii_set_auto_on(vptr); | |
3a7f8681 | 985 | /* MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs); */ |
d3b238a0 | 986 | } |
2cf71d2e DJ |
987 | /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */ |
988 | /* vptr->mii_status=check_connection_type(vptr->mac_regs); */ | |
989 | return VELOCITY_LINK_CHANGE; | |
990 | } | |
8a22dddb | 991 | |
2cf71d2e DJ |
992 | /** |
993 | * velocity_print_link_status - link status reporting | |
994 | * @vptr: velocity to report on | |
995 | * | |
996 | * Turn the link status of the velocity card into a kernel log | |
997 | * description of the new link state, detailing speed and duplex | |
998 | * status | |
999 | */ | |
1000 | static void velocity_print_link_status(struct velocity_info *vptr) | |
1001 | { | |
6aa20a22 | 1002 | |
2cf71d2e DJ |
1003 | if (vptr->mii_status & VELOCITY_LINK_FAIL) { |
1004 | VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name); | |
1005 | } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) { | |
1006 | VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name); | |
6aa20a22 | 1007 | |
2cf71d2e DJ |
1008 | if (vptr->mii_status & VELOCITY_SPEED_1000) |
1009 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps"); | |
1010 | else if (vptr->mii_status & VELOCITY_SPEED_100) | |
1011 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps"); | |
1012 | else | |
1013 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps"); | |
1da177e4 | 1014 | |
2cf71d2e DJ |
1015 | if (vptr->mii_status & VELOCITY_DUPLEX_FULL) |
1016 | VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n"); | |
1017 | else | |
1018 | VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n"); | |
1019 | } else { | |
1020 | VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name); | |
1021 | switch (vptr->options.spd_dpx) { | |
15419227 | 1022 | case SPD_DPX_1000_FULL: |
1023 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps full duplex\n"); | |
1024 | break; | |
2cf71d2e DJ |
1025 | case SPD_DPX_100_HALF: |
1026 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n"); | |
1027 | break; | |
1028 | case SPD_DPX_100_FULL: | |
1029 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n"); | |
1030 | break; | |
1031 | case SPD_DPX_10_HALF: | |
1032 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n"); | |
1033 | break; | |
1034 | case SPD_DPX_10_FULL: | |
1035 | VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n"); | |
1036 | break; | |
1037 | default: | |
1038 | break; | |
1039 | } | |
1da177e4 | 1040 | } |
1da177e4 LT |
1041 | } |
1042 | ||
1043 | /** | |
2cf71d2e DJ |
1044 | * enable_flow_control_ability - flow control |
1045 | * @vptr: veloity to configure | |
1da177e4 | 1046 | * |
2cf71d2e DJ |
1047 | * Set up flow control according to the flow control options |
1048 | * determined by the eeprom/configuration. | |
1da177e4 | 1049 | */ |
2cf71d2e | 1050 | static void enable_flow_control_ability(struct velocity_info *vptr) |
1da177e4 | 1051 | { |
1da177e4 | 1052 | |
2cf71d2e | 1053 | struct mac_regs __iomem *regs = vptr->mac_regs; |
1da177e4 | 1054 | |
2cf71d2e | 1055 | switch (vptr->options.flow_cntl) { |
1da177e4 | 1056 | |
2cf71d2e DJ |
1057 | case FLOW_CNTL_DEFAULT: |
1058 | if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, ®s->PHYSR0)) | |
1059 | writel(CR0_FDXRFCEN, ®s->CR0Set); | |
1060 | else | |
1061 | writel(CR0_FDXRFCEN, ®s->CR0Clr); | |
1062 | ||
1063 | if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, ®s->PHYSR0)) | |
1064 | writel(CR0_FDXTFCEN, ®s->CR0Set); | |
1065 | else | |
1066 | writel(CR0_FDXTFCEN, ®s->CR0Clr); | |
1067 | break; | |
1068 | ||
1069 | case FLOW_CNTL_TX: | |
1070 | writel(CR0_FDXTFCEN, ®s->CR0Set); | |
1071 | writel(CR0_FDXRFCEN, ®s->CR0Clr); | |
1072 | break; | |
1073 | ||
1074 | case FLOW_CNTL_RX: | |
1075 | writel(CR0_FDXRFCEN, ®s->CR0Set); | |
1076 | writel(CR0_FDXTFCEN, ®s->CR0Clr); | |
1077 | break; | |
1078 | ||
1079 | case FLOW_CNTL_TX_RX: | |
1080 | writel(CR0_FDXTFCEN, ®s->CR0Set); | |
1081 | writel(CR0_FDXRFCEN, ®s->CR0Set); | |
1082 | break; | |
1083 | ||
1084 | case FLOW_CNTL_DISABLE: | |
1085 | writel(CR0_FDXRFCEN, ®s->CR0Clr); | |
1086 | writel(CR0_FDXTFCEN, ®s->CR0Clr); | |
1087 | break; | |
1088 | ||
1089 | default: | |
1090 | break; | |
1091 | } | |
1da177e4 | 1092 | |
1da177e4 LT |
1093 | } |
1094 | ||
1095 | /** | |
2cf71d2e DJ |
1096 | * velocity_soft_reset - soft reset |
1097 | * @vptr: velocity to reset | |
1da177e4 | 1098 | * |
2cf71d2e DJ |
1099 | * Kick off a soft reset of the velocity adapter and then poll |
1100 | * until the reset sequence has completed before returning. | |
1da177e4 | 1101 | */ |
2cf71d2e | 1102 | static int velocity_soft_reset(struct velocity_info *vptr) |
1da177e4 | 1103 | { |
2cf71d2e DJ |
1104 | struct mac_regs __iomem *regs = vptr->mac_regs; |
1105 | int i = 0; | |
6aa20a22 | 1106 | |
2cf71d2e | 1107 | writel(CR0_SFRST, ®s->CR0Set); |
1da177e4 | 1108 | |
2cf71d2e DJ |
1109 | for (i = 0; i < W_MAX_TIMEOUT; i++) { |
1110 | udelay(5); | |
1111 | if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, ®s->CR0Set)) | |
1112 | break; | |
1da177e4 LT |
1113 | } |
1114 | ||
2cf71d2e DJ |
1115 | if (i == W_MAX_TIMEOUT) { |
1116 | writel(CR0_FORSRST, ®s->CR0Set); | |
1117 | /* FIXME: PCI POSTING */ | |
1118 | /* delay 2ms */ | |
1119 | mdelay(2); | |
1da177e4 | 1120 | } |
1da177e4 LT |
1121 | return 0; |
1122 | } | |
1123 | ||
1124 | /** | |
2cf71d2e DJ |
1125 | * velocity_set_multi - filter list change callback |
1126 | * @dev: network device | |
1da177e4 | 1127 | * |
2cf71d2e DJ |
1128 | * Called by the network layer when the filter lists need to change |
1129 | * for a velocity adapter. Reload the CAMs with the new address | |
1130 | * filter ruleset. | |
1da177e4 | 1131 | */ |
2cf71d2e | 1132 | static void velocity_set_multi(struct net_device *dev) |
1da177e4 | 1133 | { |
2cf71d2e | 1134 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 | 1135 | struct mac_regs __iomem *regs = vptr->mac_regs; |
2cf71d2e DJ |
1136 | u8 rx_mode; |
1137 | int i; | |
22bedad3 | 1138 | struct netdev_hw_addr *ha; |
1da177e4 | 1139 | |
2cf71d2e DJ |
1140 | if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ |
1141 | writel(0xffffffff, ®s->MARCAM[0]); | |
1142 | writel(0xffffffff, ®s->MARCAM[4]); | |
1143 | rx_mode = (RCR_AM | RCR_AB | RCR_PROM); | |
4cd24eaf | 1144 | } else if ((netdev_mc_count(dev) > vptr->multicast_limit) || |
8e95a202 | 1145 | (dev->flags & IFF_ALLMULTI)) { |
2cf71d2e DJ |
1146 | writel(0xffffffff, ®s->MARCAM[0]); |
1147 | writel(0xffffffff, ®s->MARCAM[4]); | |
1148 | rx_mode = (RCR_AM | RCR_AB); | |
1149 | } else { | |
1150 | int offset = MCAM_SIZE - vptr->multicast_limit; | |
1151 | mac_get_cam_mask(regs, vptr->mCAMmask); | |
1da177e4 | 1152 | |
567ec874 | 1153 | i = 0; |
22bedad3 JP |
1154 | netdev_for_each_mc_addr(ha, dev) { |
1155 | mac_set_cam(regs, i + offset, ha->addr); | |
2cf71d2e | 1156 | vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7); |
567ec874 | 1157 | i++; |
1da177e4 | 1158 | } |
1da177e4 | 1159 | |
2cf71d2e DJ |
1160 | mac_set_cam_mask(regs, vptr->mCAMmask); |
1161 | rx_mode = RCR_AM | RCR_AB | RCR_AP; | |
1da177e4 | 1162 | } |
2cf71d2e DJ |
1163 | if (dev->mtu > 1500) |
1164 | rx_mode |= RCR_AL; | |
1da177e4 | 1165 | |
2cf71d2e | 1166 | BYTE_REG_BITS_ON(rx_mode, ®s->RCR); |
1da177e4 | 1167 | |
9088d9a4 FR |
1168 | } |
1169 | ||
2cf71d2e DJ |
1170 | /* |
1171 | * MII access , media link mode setting functions | |
1da177e4 LT |
1172 | */ |
1173 | ||
1da177e4 | 1174 | /** |
2cf71d2e DJ |
1175 | * mii_init - set up MII |
1176 | * @vptr: velocity adapter | |
1177 | * @mii_status: links tatus | |
1da177e4 | 1178 | * |
2cf71d2e | 1179 | * Set up the PHY for the current link state. |
1da177e4 | 1180 | */ |
2cf71d2e | 1181 | static void mii_init(struct velocity_info *vptr, u32 mii_status) |
1da177e4 | 1182 | { |
2cf71d2e | 1183 | u16 BMCR; |
1da177e4 | 1184 | |
2cf71d2e DJ |
1185 | switch (PHYID_GET_PHY_ID(vptr->phy_id)) { |
1186 | case PHYID_CICADA_CS8201: | |
1187 | /* | |
1188 | * Reset to hardware default | |
1189 | */ | |
3a7f8681 | 1190 | MII_REG_BITS_OFF((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs); |
2cf71d2e DJ |
1191 | /* |
1192 | * Turn on ECHODIS bit in NWay-forced full mode and turn it | |
1193 | * off it in NWay-forced half mode for NWay-forced v.s. | |
1194 | * legacy-forced issue. | |
1195 | */ | |
1196 | if (vptr->mii_status & VELOCITY_DUPLEX_FULL) | |
3a7f8681 | 1197 | MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs); |
2cf71d2e | 1198 | else |
3a7f8681 | 1199 | MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs); |
2cf71d2e DJ |
1200 | /* |
1201 | * Turn on Link/Activity LED enable bit for CIS8201 | |
1202 | */ | |
3a7f8681 | 1203 | MII_REG_BITS_ON(PLED_LALBE, MII_TPISTATUS, vptr->mac_regs); |
2cf71d2e DJ |
1204 | break; |
1205 | case PHYID_VT3216_32BIT: | |
1206 | case PHYID_VT3216_64BIT: | |
1207 | /* | |
1208 | * Reset to hardware default | |
1209 | */ | |
3a7f8681 | 1210 | MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs); |
2cf71d2e DJ |
1211 | /* |
1212 | * Turn on ECHODIS bit in NWay-forced full mode and turn it | |
1213 | * off it in NWay-forced half mode for NWay-forced v.s. | |
1214 | * legacy-forced issue | |
1215 | */ | |
1216 | if (vptr->mii_status & VELOCITY_DUPLEX_FULL) | |
3a7f8681 | 1217 | MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs); |
2cf71d2e | 1218 | else |
3a7f8681 | 1219 | MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs); |
2cf71d2e | 1220 | break; |
1da177e4 | 1221 | |
2cf71d2e DJ |
1222 | case PHYID_MARVELL_1000: |
1223 | case PHYID_MARVELL_1000S: | |
1224 | /* | |
1225 | * Assert CRS on Transmit | |
1226 | */ | |
1227 | MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs); | |
1228 | /* | |
1229 | * Reset to hardware default | |
1230 | */ | |
3a7f8681 | 1231 | MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs); |
2cf71d2e DJ |
1232 | break; |
1233 | default: | |
1234 | ; | |
1235 | } | |
3a7f8681 FR |
1236 | velocity_mii_read(vptr->mac_regs, MII_BMCR, &BMCR); |
1237 | if (BMCR & BMCR_ISOLATE) { | |
1238 | BMCR &= ~BMCR_ISOLATE; | |
1239 | velocity_mii_write(vptr->mac_regs, MII_BMCR, BMCR); | |
1da177e4 | 1240 | } |
1da177e4 LT |
1241 | } |
1242 | ||
6dfc4b95 SK |
1243 | /** |
1244 | * setup_queue_timers - Setup interrupt timers | |
1245 | * | |
1246 | * Setup interrupt frequency during suppression (timeout if the frame | |
1247 | * count isn't filled). | |
1248 | */ | |
1249 | static void setup_queue_timers(struct velocity_info *vptr) | |
1250 | { | |
1251 | /* Only for newer revisions */ | |
1252 | if (vptr->rev_id >= REV_ID_VT3216_A0) { | |
1253 | u8 txqueue_timer = 0; | |
1254 | u8 rxqueue_timer = 0; | |
1255 | ||
1256 | if (vptr->mii_status & (VELOCITY_SPEED_1000 | | |
1257 | VELOCITY_SPEED_100)) { | |
1258 | txqueue_timer = vptr->options.txqueue_timer; | |
1259 | rxqueue_timer = vptr->options.rxqueue_timer; | |
1260 | } | |
1261 | ||
1262 | writeb(txqueue_timer, &vptr->mac_regs->TQETMR); | |
1263 | writeb(rxqueue_timer, &vptr->mac_regs->RQETMR); | |
1264 | } | |
1265 | } | |
1266 | /** | |
1267 | * setup_adaptive_interrupts - Setup interrupt suppression | |
1268 | * | |
1269 | * @vptr velocity adapter | |
1270 | * | |
1271 | * The velocity is able to suppress interrupt during high interrupt load. | |
1272 | * This function turns on that feature. | |
1273 | */ | |
1274 | static void setup_adaptive_interrupts(struct velocity_info *vptr) | |
1275 | { | |
1276 | struct mac_regs __iomem *regs = vptr->mac_regs; | |
1277 | u16 tx_intsup = vptr->options.tx_intsup; | |
1278 | u16 rx_intsup = vptr->options.rx_intsup; | |
1279 | ||
1280 | /* Setup default interrupt mask (will be changed below) */ | |
1281 | vptr->int_mask = INT_MASK_DEF; | |
1282 | ||
1283 | /* Set Tx Interrupt Suppression Threshold */ | |
1284 | writeb(CAMCR_PS0, ®s->CAMCR); | |
1285 | if (tx_intsup != 0) { | |
1286 | vptr->int_mask &= ~(ISR_PTXI | ISR_PTX0I | ISR_PTX1I | | |
1287 | ISR_PTX2I | ISR_PTX3I); | |
1288 | writew(tx_intsup, ®s->ISRCTL); | |
1289 | } else | |
1290 | writew(ISRCTL_TSUPDIS, ®s->ISRCTL); | |
1291 | ||
1292 | /* Set Rx Interrupt Suppression Threshold */ | |
1293 | writeb(CAMCR_PS1, ®s->CAMCR); | |
1294 | if (rx_intsup != 0) { | |
1295 | vptr->int_mask &= ~ISR_PRXI; | |
1296 | writew(rx_intsup, ®s->ISRCTL); | |
1297 | } else | |
1298 | writew(ISRCTL_RSUPDIS, ®s->ISRCTL); | |
1299 | ||
1300 | /* Select page to interrupt hold timer */ | |
1301 | writeb(0, ®s->CAMCR); | |
1302 | } | |
2cf71d2e | 1303 | |
1da177e4 | 1304 | /** |
2cf71d2e DJ |
1305 | * velocity_init_registers - initialise MAC registers |
1306 | * @vptr: velocity to init | |
1307 | * @type: type of initialisation (hot or cold) | |
1da177e4 | 1308 | * |
2cf71d2e DJ |
1309 | * Initialise the MAC on a reset or on first set up on the |
1310 | * hardware. | |
1da177e4 | 1311 | */ |
2cf71d2e DJ |
1312 | static void velocity_init_registers(struct velocity_info *vptr, |
1313 | enum velocity_init_type type) | |
1da177e4 | 1314 | { |
2cf71d2e DJ |
1315 | struct mac_regs __iomem *regs = vptr->mac_regs; |
1316 | int i, mii_status; | |
1da177e4 | 1317 | |
2cf71d2e | 1318 | mac_wol_reset(regs); |
1da177e4 | 1319 | |
2cf71d2e DJ |
1320 | switch (type) { |
1321 | case VELOCITY_INIT_RESET: | |
1322 | case VELOCITY_INIT_WOL: | |
1da177e4 | 1323 | |
2cf71d2e | 1324 | netif_stop_queue(vptr->dev); |
6aa20a22 | 1325 | |
2cf71d2e DJ |
1326 | /* |
1327 | * Reset RX to prevent RX pointer not on the 4X location | |
1328 | */ | |
1329 | velocity_rx_reset(vptr); | |
1330 | mac_rx_queue_run(regs); | |
1331 | mac_rx_queue_wake(regs); | |
6aa20a22 | 1332 | |
2cf71d2e DJ |
1333 | mii_status = velocity_get_opt_media_mode(vptr); |
1334 | if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) { | |
1335 | velocity_print_link_status(vptr); | |
1336 | if (!(vptr->mii_status & VELOCITY_LINK_FAIL)) | |
1337 | netif_wake_queue(vptr->dev); | |
1da177e4 | 1338 | } |
1da177e4 | 1339 | |
2cf71d2e | 1340 | enable_flow_control_ability(vptr); |
1da177e4 | 1341 | |
2cf71d2e DJ |
1342 | mac_clear_isr(regs); |
1343 | writel(CR0_STOP, ®s->CR0Clr); | |
1344 | writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), | |
1345 | ®s->CR0Set); | |
6aa20a22 | 1346 | |
2cf71d2e | 1347 | break; |
1da177e4 | 1348 | |
2cf71d2e DJ |
1349 | case VELOCITY_INIT_COLD: |
1350 | default: | |
1351 | /* | |
1352 | * Do reset | |
1353 | */ | |
1354 | velocity_soft_reset(vptr); | |
1355 | mdelay(5); | |
1da177e4 | 1356 | |
2cf71d2e DJ |
1357 | mac_eeprom_reload(regs); |
1358 | for (i = 0; i < 6; i++) | |
1359 | writeb(vptr->dev->dev_addr[i], &(regs->PAR[i])); | |
1da177e4 | 1360 | |
2cf71d2e DJ |
1361 | /* |
1362 | * clear Pre_ACPI bit. | |
1363 | */ | |
1364 | BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA)); | |
1365 | mac_set_rx_thresh(regs, vptr->options.rx_thresh); | |
1366 | mac_set_dma_length(regs, vptr->options.DMA_length); | |
1da177e4 | 1367 | |
2cf71d2e DJ |
1368 | writeb(WOLCFG_SAM | WOLCFG_SAB, ®s->WOLCFGSet); |
1369 | /* | |
1370 | * Back off algorithm use original IEEE standard | |
1371 | */ | |
1372 | BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), ®s->CFGB); | |
1da177e4 LT |
1373 | |
1374 | /* | |
2cf71d2e | 1375 | * Init CAM filter |
1da177e4 | 1376 | */ |
2cf71d2e | 1377 | velocity_init_cam_filter(vptr); |
1da177e4 | 1378 | |
2cf71d2e DJ |
1379 | /* |
1380 | * Set packet filter: Receive directed and broadcast address | |
1381 | */ | |
1382 | velocity_set_multi(vptr->dev); | |
1da177e4 | 1383 | |
2cf71d2e DJ |
1384 | /* |
1385 | * Enable MII auto-polling | |
1386 | */ | |
1387 | enable_mii_autopoll(regs); | |
1da177e4 | 1388 | |
6dfc4b95 | 1389 | setup_adaptive_interrupts(vptr); |
1da177e4 | 1390 | |
2cf71d2e DJ |
1391 | writel(vptr->rx.pool_dma, ®s->RDBaseLo); |
1392 | writew(vptr->options.numrx - 1, ®s->RDCSize); | |
1393 | mac_rx_queue_run(regs); | |
1394 | mac_rx_queue_wake(regs); | |
1da177e4 | 1395 | |
2cf71d2e | 1396 | writew(vptr->options.numtx - 1, ®s->TDCSize); |
1da177e4 | 1397 | |
2cf71d2e DJ |
1398 | for (i = 0; i < vptr->tx.numq; i++) { |
1399 | writel(vptr->tx.pool_dma[i], ®s->TDBaseLo[i]); | |
1400 | mac_tx_queue_run(regs, i); | |
1401 | } | |
1da177e4 | 1402 | |
2cf71d2e | 1403 | init_flow_control_register(vptr); |
6aa20a22 | 1404 | |
2cf71d2e DJ |
1405 | writel(CR0_STOP, ®s->CR0Clr); |
1406 | writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), ®s->CR0Set); | |
1da177e4 | 1407 | |
2cf71d2e DJ |
1408 | mii_status = velocity_get_opt_media_mode(vptr); |
1409 | netif_stop_queue(vptr->dev); | |
1da177e4 | 1410 | |
2cf71d2e | 1411 | mii_init(vptr, mii_status); |
1da177e4 | 1412 | |
2cf71d2e DJ |
1413 | if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) { |
1414 | velocity_print_link_status(vptr); | |
1415 | if (!(vptr->mii_status & VELOCITY_LINK_FAIL)) | |
1416 | netif_wake_queue(vptr->dev); | |
1da177e4 | 1417 | } |
6aa20a22 | 1418 | |
2cf71d2e DJ |
1419 | enable_flow_control_ability(vptr); |
1420 | mac_hw_mibs_init(regs); | |
1421 | mac_write_int_mask(vptr->int_mask, regs); | |
1422 | mac_clear_isr(regs); | |
1423 | ||
1da177e4 | 1424 | } |
1da177e4 LT |
1425 | } |
1426 | ||
2cf71d2e | 1427 | static void velocity_give_many_rx_descs(struct velocity_info *vptr) |
1da177e4 | 1428 | { |
2cf71d2e DJ |
1429 | struct mac_regs __iomem *regs = vptr->mac_regs; |
1430 | int avail, dirty, unusable; | |
1431 | ||
1432 | /* | |
1433 | * RD number must be equal to 4X per hardware spec | |
1434 | * (programming guide rev 1.20, p.13) | |
1435 | */ | |
1436 | if (vptr->rx.filled < 4) | |
1437 | return; | |
1438 | ||
1439 | wmb(); | |
1440 | ||
1441 | unusable = vptr->rx.filled & 0x0003; | |
1442 | dirty = vptr->rx.dirty - unusable; | |
1443 | for (avail = vptr->rx.filled & 0xfffc; avail; avail--) { | |
1444 | dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1; | |
1445 | vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC; | |
1da177e4 | 1446 | } |
2cf71d2e DJ |
1447 | |
1448 | writew(vptr->rx.filled & 0xfffc, ®s->RBRDU); | |
1449 | vptr->rx.filled = unusable; | |
1da177e4 LT |
1450 | } |
1451 | ||
1452 | /** | |
2cf71d2e DJ |
1453 | * velocity_init_dma_rings - set up DMA rings |
1454 | * @vptr: Velocity to set up | |
6aa20a22 | 1455 | * |
2cf71d2e DJ |
1456 | * Allocate PCI mapped DMA rings for the receive and transmit layer |
1457 | * to use. | |
1da177e4 | 1458 | */ |
2cf71d2e | 1459 | static int velocity_init_dma_rings(struct velocity_info *vptr) |
1da177e4 | 1460 | { |
2cf71d2e DJ |
1461 | struct velocity_opt *opt = &vptr->options; |
1462 | const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc); | |
1463 | const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc); | |
1464 | struct pci_dev *pdev = vptr->pdev; | |
1465 | dma_addr_t pool_dma; | |
1466 | void *pool; | |
1467 | unsigned int i; | |
1da177e4 LT |
1468 | |
1469 | /* | |
2cf71d2e DJ |
1470 | * Allocate all RD/TD rings a single pool. |
1471 | * | |
1472 | * pci_alloc_consistent() fulfills the requirement for 64 bytes | |
1473 | * alignment | |
1da177e4 | 1474 | */ |
2cf71d2e DJ |
1475 | pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq + |
1476 | rx_ring_size, &pool_dma); | |
1477 | if (!pool) { | |
1478 | dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n", | |
1479 | vptr->dev->name); | |
1480 | return -ENOMEM; | |
1da177e4 LT |
1481 | } |
1482 | ||
2cf71d2e DJ |
1483 | vptr->rx.ring = pool; |
1484 | vptr->rx.pool_dma = pool_dma; | |
1da177e4 | 1485 | |
2cf71d2e DJ |
1486 | pool += rx_ring_size; |
1487 | pool_dma += rx_ring_size; | |
d4f73c8e | 1488 | |
2cf71d2e DJ |
1489 | for (i = 0; i < vptr->tx.numq; i++) { |
1490 | vptr->tx.rings[i] = pool; | |
1491 | vptr->tx.pool_dma[i] = pool_dma; | |
1492 | pool += tx_ring_size; | |
1493 | pool_dma += tx_ring_size; | |
1494 | } | |
1da177e4 LT |
1495 | |
1496 | return 0; | |
1497 | } | |
1498 | ||
2cf71d2e DJ |
1499 | static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu) |
1500 | { | |
1501 | vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32; | |
1502 | } | |
1503 | ||
1da177e4 LT |
1504 | /** |
1505 | * velocity_alloc_rx_buf - allocate aligned receive buffer | |
1506 | * @vptr: velocity | |
1507 | * @idx: ring index | |
1508 | * | |
1509 | * Allocate a new full sized buffer for the reception of a frame and | |
1510 | * map it into PCI space for the hardware to use. The hardware | |
1511 | * requires *64* byte alignment of the buffer which makes life | |
1512 | * less fun than would be ideal. | |
1513 | */ | |
1da177e4 LT |
1514 | static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx) |
1515 | { | |
0fe9f15e FR |
1516 | struct rx_desc *rd = &(vptr->rx.ring[idx]); |
1517 | struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]); | |
1da177e4 | 1518 | |
0fe9f15e | 1519 | rd_info->skb = dev_alloc_skb(vptr->rx.buf_sz + 64); |
1da177e4 LT |
1520 | if (rd_info->skb == NULL) |
1521 | return -ENOMEM; | |
1522 | ||
1523 | /* | |
1524 | * Do the gymnastics to get the buffer head for data at | |
1525 | * 64byte alignment. | |
1526 | */ | |
da95b2d4 SK |
1527 | skb_reserve(rd_info->skb, |
1528 | 64 - ((unsigned long) rd_info->skb->data & 63)); | |
0fe9f15e FR |
1529 | rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data, |
1530 | vptr->rx.buf_sz, PCI_DMA_FROMDEVICE); | |
6aa20a22 | 1531 | |
1da177e4 LT |
1532 | /* |
1533 | * Fill in the descriptor to match | |
0fe9f15e | 1534 | */ |
6aa20a22 | 1535 | |
1da177e4 | 1536 | *((u32 *) & (rd->rdesc0)) = 0; |
0fe9f15e | 1537 | rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN; |
1da177e4 LT |
1538 | rd->pa_low = cpu_to_le32(rd_info->skb_dma); |
1539 | rd->pa_high = 0; | |
1540 | return 0; | |
1541 | } | |
1542 | ||
6aa20a22 | 1543 | |
2cf71d2e | 1544 | static int velocity_rx_refill(struct velocity_info *vptr) |
1da177e4 | 1545 | { |
2cf71d2e | 1546 | int dirty = vptr->rx.dirty, done = 0; |
1da177e4 | 1547 | |
2cf71d2e DJ |
1548 | do { |
1549 | struct rx_desc *rd = vptr->rx.ring + dirty; | |
1da177e4 | 1550 | |
2cf71d2e DJ |
1551 | /* Fine for an all zero Rx desc at init time as well */ |
1552 | if (rd->rdesc0.len & OWNED_BY_NIC) | |
1553 | break; | |
1da177e4 | 1554 | |
2cf71d2e DJ |
1555 | if (!vptr->rx.info[dirty].skb) { |
1556 | if (velocity_alloc_rx_buf(vptr, dirty) < 0) | |
1da177e4 | 1557 | break; |
1da177e4 | 1558 | } |
2cf71d2e DJ |
1559 | done++; |
1560 | dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0; | |
1561 | } while (dirty != vptr->rx.curr); | |
1da177e4 | 1562 | |
2cf71d2e DJ |
1563 | if (done) { |
1564 | vptr->rx.dirty = dirty; | |
1565 | vptr->rx.filled += done; | |
1da177e4 | 1566 | } |
2cf71d2e DJ |
1567 | |
1568 | return done; | |
1da177e4 LT |
1569 | } |
1570 | ||
1571 | /** | |
2cf71d2e DJ |
1572 | * velocity_free_rd_ring - free receive ring |
1573 | * @vptr: velocity to clean up | |
1da177e4 | 1574 | * |
2cf71d2e DJ |
1575 | * Free the receive buffers for each ring slot and any |
1576 | * attached socket buffers that need to go away. | |
1da177e4 | 1577 | */ |
2cf71d2e | 1578 | static void velocity_free_rd_ring(struct velocity_info *vptr) |
1da177e4 | 1579 | { |
2cf71d2e | 1580 | int i; |
1da177e4 | 1581 | |
2cf71d2e DJ |
1582 | if (vptr->rx.info == NULL) |
1583 | return; | |
6aa20a22 | 1584 | |
2cf71d2e DJ |
1585 | for (i = 0; i < vptr->options.numrx; i++) { |
1586 | struct velocity_rd_info *rd_info = &(vptr->rx.info[i]); | |
1587 | struct rx_desc *rd = vptr->rx.ring + i; | |
1da177e4 | 1588 | |
2cf71d2e | 1589 | memset(rd, 0, sizeof(*rd)); |
1da177e4 | 1590 | |
2cf71d2e DJ |
1591 | if (!rd_info->skb) |
1592 | continue; | |
1593 | pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz, | |
1594 | PCI_DMA_FROMDEVICE); | |
1595 | rd_info->skb_dma = 0; | |
6aa20a22 | 1596 | |
2cf71d2e DJ |
1597 | dev_kfree_skb(rd_info->skb); |
1598 | rd_info->skb = NULL; | |
1da177e4 LT |
1599 | } |
1600 | ||
2cf71d2e DJ |
1601 | kfree(vptr->rx.info); |
1602 | vptr->rx.info = NULL; | |
1603 | } | |
1da177e4 | 1604 | |
1da177e4 | 1605 | |
1da177e4 | 1606 | |
2cf71d2e DJ |
1607 | /** |
1608 | * velocity_init_rd_ring - set up receive ring | |
1609 | * @vptr: velocity to configure | |
1610 | * | |
1611 | * Allocate and set up the receive buffers for each ring slot and | |
1612 | * assign them to the network adapter. | |
1613 | */ | |
1614 | static int velocity_init_rd_ring(struct velocity_info *vptr) | |
1615 | { | |
1616 | int ret = -ENOMEM; | |
1da177e4 | 1617 | |
2cf71d2e DJ |
1618 | vptr->rx.info = kcalloc(vptr->options.numrx, |
1619 | sizeof(struct velocity_rd_info), GFP_KERNEL); | |
1620 | if (!vptr->rx.info) | |
1621 | goto out; | |
6aa20a22 | 1622 | |
2cf71d2e | 1623 | velocity_init_rx_ring_indexes(vptr); |
1da177e4 | 1624 | |
2cf71d2e DJ |
1625 | if (velocity_rx_refill(vptr) != vptr->options.numrx) { |
1626 | VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR | |
1627 | "%s: failed to allocate RX buffer.\n", vptr->dev->name); | |
1628 | velocity_free_rd_ring(vptr); | |
1629 | goto out; | |
1630 | } | |
1da177e4 | 1631 | |
2cf71d2e DJ |
1632 | ret = 0; |
1633 | out: | |
1634 | return ret; | |
1da177e4 LT |
1635 | } |
1636 | ||
1637 | /** | |
2cf71d2e DJ |
1638 | * velocity_init_td_ring - set up transmit ring |
1639 | * @vptr: velocity | |
1da177e4 | 1640 | * |
2cf71d2e DJ |
1641 | * Set up the transmit ring and chain the ring pointers together. |
1642 | * Returns zero on success or a negative posix errno code for | |
1643 | * failure. | |
1da177e4 | 1644 | */ |
2cf71d2e | 1645 | static int velocity_init_td_ring(struct velocity_info *vptr) |
1da177e4 | 1646 | { |
2cf71d2e | 1647 | int j; |
1da177e4 | 1648 | |
2cf71d2e DJ |
1649 | /* Init the TD ring entries */ |
1650 | for (j = 0; j < vptr->tx.numq; j++) { | |
1da177e4 | 1651 | |
2cf71d2e DJ |
1652 | vptr->tx.infos[j] = kcalloc(vptr->options.numtx, |
1653 | sizeof(struct velocity_td_info), | |
1654 | GFP_KERNEL); | |
1655 | if (!vptr->tx.infos[j]) { | |
1656 | while (--j >= 0) | |
1657 | kfree(vptr->tx.infos[j]); | |
1658 | return -ENOMEM; | |
1da177e4 | 1659 | } |
2cf71d2e DJ |
1660 | |
1661 | vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0; | |
1da177e4 | 1662 | } |
2cf71d2e DJ |
1663 | return 0; |
1664 | } | |
1665 | ||
1666 | /** | |
1667 | * velocity_free_dma_rings - free PCI ring pointers | |
1668 | * @vptr: Velocity to free from | |
1669 | * | |
1670 | * Clean up the PCI ring buffers allocated to this velocity. | |
1671 | */ | |
1672 | static void velocity_free_dma_rings(struct velocity_info *vptr) | |
1673 | { | |
1674 | const int size = vptr->options.numrx * sizeof(struct rx_desc) + | |
1675 | vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq; | |
1676 | ||
1677 | pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma); | |
1da177e4 LT |
1678 | } |
1679 | ||
2cf71d2e | 1680 | |
3c4dc711 FR |
1681 | static int velocity_init_rings(struct velocity_info *vptr, int mtu) |
1682 | { | |
1683 | int ret; | |
1684 | ||
1685 | velocity_set_rxbufsize(vptr, mtu); | |
1686 | ||
1687 | ret = velocity_init_dma_rings(vptr); | |
1688 | if (ret < 0) | |
1689 | goto out; | |
1690 | ||
1691 | ret = velocity_init_rd_ring(vptr); | |
1692 | if (ret < 0) | |
1693 | goto err_free_dma_rings_0; | |
1694 | ||
1695 | ret = velocity_init_td_ring(vptr); | |
1696 | if (ret < 0) | |
1697 | goto err_free_rd_ring_1; | |
1698 | out: | |
1699 | return ret; | |
1700 | ||
1701 | err_free_rd_ring_1: | |
1702 | velocity_free_rd_ring(vptr); | |
1703 | err_free_dma_rings_0: | |
1704 | velocity_free_dma_rings(vptr); | |
1705 | goto out; | |
1706 | } | |
1707 | ||
1da177e4 | 1708 | /** |
2cf71d2e DJ |
1709 | * velocity_free_tx_buf - free transmit buffer |
1710 | * @vptr: velocity | |
1711 | * @tdinfo: buffer | |
1da177e4 | 1712 | * |
2cf71d2e DJ |
1713 | * Release an transmit buffer. If the buffer was preallocated then |
1714 | * recycle it, if not then unmap the buffer. | |
1da177e4 | 1715 | */ |
c79992fd SK |
1716 | static void velocity_free_tx_buf(struct velocity_info *vptr, |
1717 | struct velocity_td_info *tdinfo, struct tx_desc *td) | |
1da177e4 | 1718 | { |
2cf71d2e | 1719 | struct sk_buff *skb = tdinfo->skb; |
28133176 | 1720 | |
2cf71d2e DJ |
1721 | /* |
1722 | * Don't unmap the pre-allocated tx_bufs | |
1723 | */ | |
1724 | if (tdinfo->skb_dma) { | |
c79992fd | 1725 | int i; |
1da177e4 | 1726 | |
2cf71d2e | 1727 | for (i = 0; i < tdinfo->nskb_dma; i++) { |
c79992fd SK |
1728 | size_t pktlen = max_t(size_t, skb->len, ETH_ZLEN); |
1729 | ||
1730 | /* For scatter-gather */ | |
1731 | if (skb_shinfo(skb)->nr_frags > 0) | |
1732 | pktlen = max_t(size_t, pktlen, | |
1733 | td->td_buf[i].size & ~TD_QUEUE); | |
1734 | ||
1735 | pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], | |
1736 | le16_to_cpu(pktlen), PCI_DMA_TODEVICE); | |
2cf71d2e | 1737 | } |
1da177e4 | 1738 | } |
2cf71d2e DJ |
1739 | dev_kfree_skb_irq(skb); |
1740 | tdinfo->skb = NULL; | |
1da177e4 LT |
1741 | } |
1742 | ||
6aa20a22 | 1743 | |
2cf71d2e DJ |
1744 | /* |
1745 | * FIXME: could we merge this with velocity_free_tx_buf ? | |
1746 | */ | |
1747 | static void velocity_free_td_ring_entry(struct velocity_info *vptr, | |
1748 | int q, int n) | |
1da177e4 | 1749 | { |
2cf71d2e DJ |
1750 | struct velocity_td_info *td_info = &(vptr->tx.infos[q][n]); |
1751 | int i; | |
bd7b3f34 | 1752 | |
2cf71d2e DJ |
1753 | if (td_info == NULL) |
1754 | return; | |
3c4dc711 | 1755 | |
2cf71d2e DJ |
1756 | if (td_info->skb) { |
1757 | for (i = 0; i < td_info->nskb_dma; i++) { | |
1758 | if (td_info->skb_dma[i]) { | |
1759 | pci_unmap_single(vptr->pdev, td_info->skb_dma[i], | |
1760 | td_info->skb->len, PCI_DMA_TODEVICE); | |
1761 | td_info->skb_dma[i] = 0; | |
1762 | } | |
3c4dc711 | 1763 | } |
2cf71d2e DJ |
1764 | dev_kfree_skb(td_info->skb); |
1765 | td_info->skb = NULL; | |
3c4dc711 | 1766 | } |
1da177e4 LT |
1767 | } |
1768 | ||
1769 | /** | |
2cf71d2e DJ |
1770 | * velocity_free_td_ring - free td ring |
1771 | * @vptr: velocity | |
1da177e4 | 1772 | * |
2cf71d2e DJ |
1773 | * Free up the transmit ring for this particular velocity adapter. |
1774 | * We free the ring contents but not the ring itself. | |
1775 | */ | |
1776 | static void velocity_free_td_ring(struct velocity_info *vptr) | |
1777 | { | |
1778 | int i, j; | |
1da177e4 | 1779 | |
2cf71d2e DJ |
1780 | for (j = 0; j < vptr->tx.numq; j++) { |
1781 | if (vptr->tx.infos[j] == NULL) | |
1782 | continue; | |
1783 | for (i = 0; i < vptr->options.numtx; i++) | |
1784 | velocity_free_td_ring_entry(vptr, j, i); | |
6aa20a22 | 1785 | |
2cf71d2e DJ |
1786 | kfree(vptr->tx.infos[j]); |
1787 | vptr->tx.infos[j] = NULL; | |
1788 | } | |
1789 | } | |
6aa20a22 | 1790 | |
1da177e4 | 1791 | |
2cf71d2e DJ |
1792 | static void velocity_free_rings(struct velocity_info *vptr) |
1793 | { | |
1794 | velocity_free_td_ring(vptr); | |
1795 | velocity_free_rd_ring(vptr); | |
1796 | velocity_free_dma_rings(vptr); | |
1da177e4 LT |
1797 | } |
1798 | ||
1799 | /** | |
2cf71d2e DJ |
1800 | * velocity_error - handle error from controller |
1801 | * @vptr: velocity | |
1802 | * @status: card status | |
1803 | * | |
1804 | * Process an error report from the hardware and attempt to recover | |
1805 | * the card itself. At the moment we cannot recover from some | |
1806 | * theoretically impossible errors but this could be fixed using | |
1807 | * the pci_device_failed logic to bounce the hardware | |
1da177e4 | 1808 | * |
1da177e4 | 1809 | */ |
2cf71d2e | 1810 | static void velocity_error(struct velocity_info *vptr, int status) |
1da177e4 | 1811 | { |
580a6902 | 1812 | |
2cf71d2e DJ |
1813 | if (status & ISR_TXSTLI) { |
1814 | struct mac_regs __iomem *regs = vptr->mac_regs; | |
1da177e4 | 1815 | |
2cf71d2e DJ |
1816 | printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(®s->TDIdx[0])); |
1817 | BYTE_REG_BITS_ON(TXESR_TDSTR, ®s->TXESR); | |
1818 | writew(TRDCSR_RUN, ®s->TDCSRClr); | |
1819 | netif_stop_queue(vptr->dev); | |
1da177e4 | 1820 | |
2cf71d2e DJ |
1821 | /* FIXME: port over the pci_device_failed code and use it |
1822 | here */ | |
1823 | } | |
1da177e4 | 1824 | |
2cf71d2e DJ |
1825 | if (status & ISR_SRCI) { |
1826 | struct mac_regs __iomem *regs = vptr->mac_regs; | |
1827 | int linked; | |
1da177e4 | 1828 | |
2cf71d2e DJ |
1829 | if (vptr->options.spd_dpx == SPD_DPX_AUTO) { |
1830 | vptr->mii_status = check_connection_type(regs); | |
1da177e4 | 1831 | |
2cf71d2e DJ |
1832 | /* |
1833 | * If it is a 3119, disable frame bursting in | |
1834 | * halfduplex mode and enable it in fullduplex | |
1835 | * mode | |
1836 | */ | |
1837 | if (vptr->rev_id < REV_ID_VT3216_A0) { | |
0527a1a8 | 1838 | if (vptr->mii_status & VELOCITY_DUPLEX_FULL) |
2cf71d2e DJ |
1839 | BYTE_REG_BITS_ON(TCR_TB2BDIS, ®s->TCR); |
1840 | else | |
1841 | BYTE_REG_BITS_OFF(TCR_TB2BDIS, ®s->TCR); | |
1842 | } | |
1843 | /* | |
1844 | * Only enable CD heart beat counter in 10HD mode | |
1845 | */ | |
1846 | if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) | |
1847 | BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG); | |
1848 | else | |
1849 | BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG); | |
6dfc4b95 SK |
1850 | |
1851 | setup_queue_timers(vptr); | |
2cf71d2e DJ |
1852 | } |
1853 | /* | |
1854 | * Get link status from PHYSR0 | |
1855 | */ | |
1856 | linked = readb(®s->PHYSR0) & PHYSR0_LINKGD; | |
1da177e4 | 1857 | |
2cf71d2e DJ |
1858 | if (linked) { |
1859 | vptr->mii_status &= ~VELOCITY_LINK_FAIL; | |
1860 | netif_carrier_on(vptr->dev); | |
1861 | } else { | |
1862 | vptr->mii_status |= VELOCITY_LINK_FAIL; | |
1863 | netif_carrier_off(vptr->dev); | |
1864 | } | |
1da177e4 | 1865 | |
2cf71d2e DJ |
1866 | velocity_print_link_status(vptr); |
1867 | enable_flow_control_ability(vptr); | |
1da177e4 | 1868 | |
2cf71d2e DJ |
1869 | /* |
1870 | * Re-enable auto-polling because SRCI will disable | |
1871 | * auto-polling | |
1872 | */ | |
1da177e4 | 1873 | |
2cf71d2e | 1874 | enable_mii_autopoll(regs); |
1da177e4 | 1875 | |
2cf71d2e DJ |
1876 | if (vptr->mii_status & VELOCITY_LINK_FAIL) |
1877 | netif_stop_queue(vptr->dev); | |
1878 | else | |
1879 | netif_wake_queue(vptr->dev); | |
1da177e4 | 1880 | |
6403eab1 | 1881 | } |
2cf71d2e DJ |
1882 | if (status & ISR_MIBFI) |
1883 | velocity_update_hw_mibs(vptr); | |
1884 | if (status & ISR_LSTEI) | |
1885 | mac_rx_queue_wake(vptr->mac_regs); | |
1da177e4 LT |
1886 | } |
1887 | ||
1888 | /** | |
2cf71d2e DJ |
1889 | * tx_srv - transmit interrupt service |
1890 | * @vptr; Velocity | |
1da177e4 | 1891 | * |
2cf71d2e DJ |
1892 | * Scan the queues looking for transmitted packets that |
1893 | * we can complete and clean up. Update any statistics as | |
1894 | * necessary/ | |
1da177e4 | 1895 | */ |
d6cade0f | 1896 | static int velocity_tx_srv(struct velocity_info *vptr) |
1da177e4 | 1897 | { |
2cf71d2e DJ |
1898 | struct tx_desc *td; |
1899 | int qnum; | |
1900 | int full = 0; | |
1901 | int idx; | |
1902 | int works = 0; | |
1903 | struct velocity_td_info *tdinfo; | |
1904 | struct net_device_stats *stats = &vptr->dev->stats; | |
1da177e4 | 1905 | |
2cf71d2e DJ |
1906 | for (qnum = 0; qnum < vptr->tx.numq; qnum++) { |
1907 | for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0; | |
1908 | idx = (idx + 1) % vptr->options.numtx) { | |
1da177e4 | 1909 | |
2cf71d2e DJ |
1910 | /* |
1911 | * Get Tx Descriptor | |
1912 | */ | |
1913 | td = &(vptr->tx.rings[qnum][idx]); | |
1914 | tdinfo = &(vptr->tx.infos[qnum][idx]); | |
1da177e4 | 1915 | |
2cf71d2e DJ |
1916 | if (td->tdesc0.len & OWNED_BY_NIC) |
1917 | break; | |
1da177e4 | 1918 | |
2cf71d2e DJ |
1919 | if ((works++ > 15)) |
1920 | break; | |
1921 | ||
1922 | if (td->tdesc0.TSR & TSR0_TERR) { | |
1923 | stats->tx_errors++; | |
1924 | stats->tx_dropped++; | |
1925 | if (td->tdesc0.TSR & TSR0_CDH) | |
1926 | stats->tx_heartbeat_errors++; | |
1927 | if (td->tdesc0.TSR & TSR0_CRS) | |
1928 | stats->tx_carrier_errors++; | |
1929 | if (td->tdesc0.TSR & TSR0_ABT) | |
1930 | stats->tx_aborted_errors++; | |
1931 | if (td->tdesc0.TSR & TSR0_OWC) | |
1932 | stats->tx_window_errors++; | |
1933 | } else { | |
1934 | stats->tx_packets++; | |
1935 | stats->tx_bytes += tdinfo->skb->len; | |
1936 | } | |
c79992fd | 1937 | velocity_free_tx_buf(vptr, tdinfo, td); |
2cf71d2e DJ |
1938 | vptr->tx.used[qnum]--; |
1939 | } | |
1940 | vptr->tx.tail[qnum] = idx; | |
1da177e4 | 1941 | |
2cf71d2e DJ |
1942 | if (AVAIL_TD(vptr, qnum) < 1) |
1943 | full = 1; | |
1944 | } | |
1da177e4 | 1945 | /* |
2cf71d2e DJ |
1946 | * Look to see if we should kick the transmit network |
1947 | * layer for more work. | |
1da177e4 | 1948 | */ |
8e95a202 JP |
1949 | if (netif_queue_stopped(vptr->dev) && (full == 0) && |
1950 | (!(vptr->mii_status & VELOCITY_LINK_FAIL))) { | |
2cf71d2e DJ |
1951 | netif_wake_queue(vptr->dev); |
1952 | } | |
1953 | return works; | |
1954 | } | |
1955 | ||
1956 | /** | |
1957 | * velocity_rx_csum - checksum process | |
1958 | * @rd: receive packet descriptor | |
1959 | * @skb: network layer packet buffer | |
1960 | * | |
1961 | * Process the status bits for the received packet and determine | |
1962 | * if the checksum was computed and verified by the hardware | |
1963 | */ | |
1964 | static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb) | |
1965 | { | |
bc8acf2c | 1966 | skb_checksum_none_assert(skb); |
6aa20a22 | 1967 | |
2cf71d2e DJ |
1968 | if (rd->rdesc1.CSM & CSM_IPKT) { |
1969 | if (rd->rdesc1.CSM & CSM_IPOK) { | |
1970 | if ((rd->rdesc1.CSM & CSM_TCPKT) || | |
1971 | (rd->rdesc1.CSM & CSM_UDPKT)) { | |
1972 | if (!(rd->rdesc1.CSM & CSM_TUPOK)) | |
1973 | return; | |
1974 | } | |
1975 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1da177e4 LT |
1976 | } |
1977 | } | |
1da177e4 LT |
1978 | } |
1979 | ||
1da177e4 | 1980 | /** |
2cf71d2e DJ |
1981 | * velocity_rx_copy - in place Rx copy for small packets |
1982 | * @rx_skb: network layer packet buffer candidate | |
1983 | * @pkt_size: received data size | |
1984 | * @rd: receive packet descriptor | |
1da177e4 LT |
1985 | * @dev: network device |
1986 | * | |
2cf71d2e | 1987 | * Replace the current skb that is scheduled for Rx processing by a |
25985edc | 1988 | * shorter, immediately allocated skb, if the received packet is small |
2cf71d2e DJ |
1989 | * enough. This function returns a negative value if the received |
1990 | * packet is too big or if memory is exhausted. | |
1da177e4 | 1991 | */ |
2cf71d2e DJ |
1992 | static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size, |
1993 | struct velocity_info *vptr) | |
1da177e4 | 1994 | { |
2cf71d2e DJ |
1995 | int ret = -1; |
1996 | if (pkt_size < rx_copybreak) { | |
1997 | struct sk_buff *new_skb; | |
1da177e4 | 1998 | |
89d71a66 | 1999 | new_skb = netdev_alloc_skb_ip_align(vptr->dev, pkt_size); |
2cf71d2e DJ |
2000 | if (new_skb) { |
2001 | new_skb->ip_summed = rx_skb[0]->ip_summed; | |
2cf71d2e DJ |
2002 | skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size); |
2003 | *rx_skb = new_skb; | |
2004 | ret = 0; | |
1da177e4 LT |
2005 | } |
2006 | ||
1da177e4 | 2007 | } |
2cf71d2e | 2008 | return ret; |
1da177e4 LT |
2009 | } |
2010 | ||
2011 | /** | |
2cf71d2e DJ |
2012 | * velocity_iph_realign - IP header alignment |
2013 | * @vptr: velocity we are handling | |
2014 | * @skb: network layer packet buffer | |
2015 | * @pkt_size: received data size | |
1da177e4 | 2016 | * |
2cf71d2e DJ |
2017 | * Align IP header on a 2 bytes boundary. This behavior can be |
2018 | * configured by the user. | |
1da177e4 | 2019 | */ |
2cf71d2e DJ |
2020 | static inline void velocity_iph_realign(struct velocity_info *vptr, |
2021 | struct sk_buff *skb, int pkt_size) | |
1da177e4 | 2022 | { |
2cf71d2e DJ |
2023 | if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) { |
2024 | memmove(skb->data + 2, skb->data, pkt_size); | |
2025 | skb_reserve(skb, 2); | |
2026 | } | |
2027 | } | |
6aa20a22 | 2028 | |
1da177e4 | 2029 | |
2cf71d2e DJ |
2030 | /** |
2031 | * velocity_receive_frame - received packet processor | |
2032 | * @vptr: velocity we are handling | |
2033 | * @idx: ring index | |
2034 | * | |
2035 | * A packet has arrived. We process the packet and if appropriate | |
2036 | * pass the frame up the network stack | |
2037 | */ | |
2038 | static int velocity_receive_frame(struct velocity_info *vptr, int idx) | |
2039 | { | |
2040 | void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int); | |
2041 | struct net_device_stats *stats = &vptr->dev->stats; | |
2042 | struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]); | |
2043 | struct rx_desc *rd = &(vptr->rx.ring[idx]); | |
2044 | int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff; | |
2045 | struct sk_buff *skb; | |
1da177e4 | 2046 | |
2cf71d2e DJ |
2047 | if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) { |
2048 | VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name); | |
2049 | stats->rx_length_errors++; | |
2050 | return -EINVAL; | |
2051 | } | |
1da177e4 | 2052 | |
2cf71d2e DJ |
2053 | if (rd->rdesc0.RSR & RSR_MAR) |
2054 | stats->multicast++; | |
1da177e4 | 2055 | |
2cf71d2e | 2056 | skb = rd_info->skb; |
1da177e4 | 2057 | |
2cf71d2e DJ |
2058 | pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma, |
2059 | vptr->rx.buf_sz, PCI_DMA_FROMDEVICE); | |
1da177e4 | 2060 | |
2cf71d2e DJ |
2061 | /* |
2062 | * Drop frame not meeting IEEE 802.3 | |
2063 | */ | |
1da177e4 | 2064 | |
2cf71d2e DJ |
2065 | if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) { |
2066 | if (rd->rdesc0.RSR & RSR_RL) { | |
2067 | stats->rx_length_errors++; | |
2068 | return -EINVAL; | |
2069 | } | |
2070 | } | |
6aa20a22 | 2071 | |
2cf71d2e | 2072 | pci_action = pci_dma_sync_single_for_device; |
1da177e4 | 2073 | |
2cf71d2e | 2074 | velocity_rx_csum(rd, skb); |
6aa20a22 | 2075 | |
2cf71d2e DJ |
2076 | if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) { |
2077 | velocity_iph_realign(vptr, skb, pkt_len); | |
2078 | pci_action = pci_unmap_single; | |
2079 | rd_info->skb = NULL; | |
2080 | } | |
6aa20a22 | 2081 | |
2cf71d2e DJ |
2082 | pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz, |
2083 | PCI_DMA_FROMDEVICE); | |
1da177e4 | 2084 | |
2cf71d2e DJ |
2085 | skb_put(skb, pkt_len - 4); |
2086 | skb->protocol = eth_type_trans(skb, vptr->dev); | |
2087 | ||
73b54688 JP |
2088 | if (rd->rdesc0.RSR & RSR_DETAG) { |
2089 | u16 vid = swab16(le16_to_cpu(rd->rdesc1.PQTAG)); | |
2090 | ||
2091 | __vlan_hwaccel_put_tag(skb, vid); | |
2092 | } | |
2093 | netif_rx(skb); | |
6aa20a22 | 2094 | |
2cf71d2e | 2095 | stats->rx_bytes += pkt_len; |
6aa20a22 | 2096 | |
2cf71d2e | 2097 | return 0; |
1da177e4 LT |
2098 | } |
2099 | ||
1da177e4 LT |
2100 | |
2101 | /** | |
2cf71d2e DJ |
2102 | * velocity_rx_srv - service RX interrupt |
2103 | * @vptr: velocity | |
1da177e4 | 2104 | * |
2cf71d2e DJ |
2105 | * Walk the receive ring of the velocity adapter and remove |
2106 | * any received packets from the receive queue. Hand the ring | |
2107 | * slots back to the adapter for reuse. | |
1da177e4 | 2108 | */ |
d6cade0f | 2109 | static int velocity_rx_srv(struct velocity_info *vptr, int budget_left) |
1da177e4 | 2110 | { |
2cf71d2e DJ |
2111 | struct net_device_stats *stats = &vptr->dev->stats; |
2112 | int rd_curr = vptr->rx.curr; | |
2113 | int works = 0; | |
2114 | ||
dfff7144 | 2115 | while (works < budget_left) { |
2cf71d2e DJ |
2116 | struct rx_desc *rd = vptr->rx.ring + rd_curr; |
2117 | ||
2118 | if (!vptr->rx.info[rd_curr].skb) | |
2119 | break; | |
2120 | ||
2121 | if (rd->rdesc0.len & OWNED_BY_NIC) | |
2122 | break; | |
2123 | ||
2124 | rmb(); | |
1da177e4 | 2125 | |
2cf71d2e DJ |
2126 | /* |
2127 | * Don't drop CE or RL error frame although RXOK is off | |
2128 | */ | |
2129 | if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) { | |
2130 | if (velocity_receive_frame(vptr, rd_curr) < 0) | |
2131 | stats->rx_dropped++; | |
2132 | } else { | |
2133 | if (rd->rdesc0.RSR & RSR_CRC) | |
2134 | stats->rx_crc_errors++; | |
2135 | if (rd->rdesc0.RSR & RSR_FAE) | |
2136 | stats->rx_frame_errors++; | |
1da177e4 | 2137 | |
2cf71d2e DJ |
2138 | stats->rx_dropped++; |
2139 | } | |
6aa20a22 | 2140 | |
2cf71d2e | 2141 | rd->size |= RX_INTEN; |
1da177e4 | 2142 | |
2cf71d2e DJ |
2143 | rd_curr++; |
2144 | if (rd_curr >= vptr->options.numrx) | |
2145 | rd_curr = 0; | |
dfff7144 SK |
2146 | works++; |
2147 | } | |
1da177e4 | 2148 | |
2cf71d2e | 2149 | vptr->rx.curr = rd_curr; |
1da177e4 | 2150 | |
2cf71d2e DJ |
2151 | if ((works > 0) && (velocity_rx_refill(vptr) > 0)) |
2152 | velocity_give_many_rx_descs(vptr); | |
2153 | ||
2154 | VAR_USED(stats); | |
2155 | return works; | |
2156 | } | |
6aa20a22 | 2157 | |
dfff7144 SK |
2158 | static int velocity_poll(struct napi_struct *napi, int budget) |
2159 | { | |
2160 | struct velocity_info *vptr = container_of(napi, | |
2161 | struct velocity_info, napi); | |
2162 | unsigned int rx_done; | |
3f2e8d9f | 2163 | unsigned long flags; |
dfff7144 | 2164 | |
3f2e8d9f | 2165 | spin_lock_irqsave(&vptr->lock, flags); |
dfff7144 SK |
2166 | /* |
2167 | * Do rx and tx twice for performance (taken from the VIA | |
2168 | * out-of-tree driver). | |
2169 | */ | |
d6cade0f SK |
2170 | rx_done = velocity_rx_srv(vptr, budget / 2); |
2171 | velocity_tx_srv(vptr); | |
2172 | rx_done += velocity_rx_srv(vptr, budget - rx_done); | |
2173 | velocity_tx_srv(vptr); | |
dfff7144 SK |
2174 | |
2175 | /* If budget not fully consumed, exit the polling mode */ | |
2176 | if (rx_done < budget) { | |
2177 | napi_complete(napi); | |
2178 | mac_enable_int(vptr->mac_regs); | |
2179 | } | |
3f2e8d9f | 2180 | spin_unlock_irqrestore(&vptr->lock, flags); |
dfff7144 SK |
2181 | |
2182 | return rx_done; | |
2183 | } | |
6aa20a22 | 2184 | |
1da177e4 | 2185 | /** |
2cf71d2e DJ |
2186 | * velocity_intr - interrupt callback |
2187 | * @irq: interrupt number | |
2188 | * @dev_instance: interrupting device | |
1da177e4 | 2189 | * |
2cf71d2e DJ |
2190 | * Called whenever an interrupt is generated by the velocity |
2191 | * adapter IRQ line. We may not be the source of the interrupt | |
2192 | * and need to identify initially if we are, and if not exit as | |
2193 | * efficiently as possible. | |
1da177e4 | 2194 | */ |
2cf71d2e | 2195 | static irqreturn_t velocity_intr(int irq, void *dev_instance) |
1da177e4 | 2196 | { |
2cf71d2e DJ |
2197 | struct net_device *dev = dev_instance; |
2198 | struct velocity_info *vptr = netdev_priv(dev); | |
2199 | u32 isr_status; | |
1da177e4 | 2200 | |
2cf71d2e DJ |
2201 | spin_lock(&vptr->lock); |
2202 | isr_status = mac_read_isr(vptr->mac_regs); | |
2203 | ||
2204 | /* Not us ? */ | |
2205 | if (isr_status == 0) { | |
2206 | spin_unlock(&vptr->lock); | |
2207 | return IRQ_NONE; | |
1da177e4 | 2208 | } |
1da177e4 | 2209 | |
3f2e8d9f SK |
2210 | /* Ack the interrupt */ |
2211 | mac_write_isr(vptr->mac_regs, isr_status); | |
2212 | ||
dfff7144 SK |
2213 | if (likely(napi_schedule_prep(&vptr->napi))) { |
2214 | mac_disable_int(vptr->mac_regs); | |
2215 | __napi_schedule(&vptr->napi); | |
1da177e4 | 2216 | } |
3f2e8d9f SK |
2217 | |
2218 | if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI))) | |
2219 | velocity_error(vptr, isr_status); | |
2220 | ||
2cf71d2e | 2221 | spin_unlock(&vptr->lock); |
2cf71d2e | 2222 | |
dfff7144 | 2223 | return IRQ_HANDLED; |
1da177e4 LT |
2224 | } |
2225 | ||
2226 | /** | |
2cf71d2e DJ |
2227 | * velocity_open - interface activation callback |
2228 | * @dev: network layer device to open | |
1da177e4 | 2229 | * |
2cf71d2e DJ |
2230 | * Called when the network layer brings the interface up. Returns |
2231 | * a negative posix error code on failure, or zero on success. | |
2232 | * | |
2233 | * All the ring allocation and set up is done on open for this | |
2234 | * adapter to minimise memory usage when inactive | |
1da177e4 | 2235 | */ |
2cf71d2e | 2236 | static int velocity_open(struct net_device *dev) |
1da177e4 | 2237 | { |
2cf71d2e DJ |
2238 | struct velocity_info *vptr = netdev_priv(dev); |
2239 | int ret; | |
1da177e4 | 2240 | |
2cf71d2e DJ |
2241 | ret = velocity_init_rings(vptr, dev->mtu); |
2242 | if (ret < 0) | |
2243 | goto out; | |
1da177e4 | 2244 | |
2cf71d2e DJ |
2245 | /* Ensure chip is running */ |
2246 | pci_set_power_state(vptr->pdev, PCI_D0); | |
1da177e4 | 2247 | |
2cf71d2e DJ |
2248 | velocity_init_registers(vptr, VELOCITY_INIT_COLD); |
2249 | ||
1ede9b52 | 2250 | ret = request_irq(vptr->pdev->irq, velocity_intr, IRQF_SHARED, |
2cf71d2e DJ |
2251 | dev->name, dev); |
2252 | if (ret < 0) { | |
2253 | /* Power down the chip */ | |
2254 | pci_set_power_state(vptr->pdev, PCI_D3hot); | |
2255 | velocity_free_rings(vptr); | |
2256 | goto out; | |
1da177e4 LT |
2257 | } |
2258 | ||
35bb5cad BH |
2259 | velocity_give_many_rx_descs(vptr); |
2260 | ||
2cf71d2e DJ |
2261 | mac_enable_int(vptr->mac_regs); |
2262 | netif_start_queue(dev); | |
dfff7144 | 2263 | napi_enable(&vptr->napi); |
2cf71d2e DJ |
2264 | vptr->flags |= VELOCITY_FLAGS_OPENED; |
2265 | out: | |
2266 | return ret; | |
1da177e4 LT |
2267 | } |
2268 | ||
2269 | /** | |
2cf71d2e DJ |
2270 | * velocity_shutdown - shut down the chip |
2271 | * @vptr: velocity to deactivate | |
1da177e4 | 2272 | * |
2cf71d2e DJ |
2273 | * Shuts down the internal operations of the velocity and |
2274 | * disables interrupts, autopolling, transmit and receive | |
1da177e4 | 2275 | */ |
2cf71d2e | 2276 | static void velocity_shutdown(struct velocity_info *vptr) |
1da177e4 | 2277 | { |
2cf71d2e DJ |
2278 | struct mac_regs __iomem *regs = vptr->mac_regs; |
2279 | mac_disable_int(regs); | |
2280 | writel(CR0_STOP, ®s->CR0Set); | |
2281 | writew(0xFFFF, ®s->TDCSRClr); | |
2282 | writeb(0xFF, ®s->RDCSRClr); | |
1da177e4 | 2283 | safe_disable_mii_autopoll(regs); |
2cf71d2e DJ |
2284 | mac_clear_isr(regs); |
2285 | } | |
1da177e4 | 2286 | |
2cf71d2e DJ |
2287 | /** |
2288 | * velocity_change_mtu - MTU change callback | |
2289 | * @dev: network device | |
2290 | * @new_mtu: desired MTU | |
2291 | * | |
2292 | * Handle requests from the networking layer for MTU change on | |
2293 | * this interface. It gets called on a change by the network layer. | |
2294 | * Return zero for success or negative posix error code. | |
2295 | */ | |
2296 | static int velocity_change_mtu(struct net_device *dev, int new_mtu) | |
2297 | { | |
2298 | struct velocity_info *vptr = netdev_priv(dev); | |
2299 | int ret = 0; | |
1da177e4 | 2300 | |
2cf71d2e DJ |
2301 | if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) { |
2302 | VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n", | |
2303 | vptr->dev->name); | |
2304 | ret = -EINVAL; | |
2305 | goto out_0; | |
2306 | } | |
1da177e4 | 2307 | |
2cf71d2e DJ |
2308 | if (!netif_running(dev)) { |
2309 | dev->mtu = new_mtu; | |
2310 | goto out_0; | |
1da177e4 LT |
2311 | } |
2312 | ||
2cf71d2e DJ |
2313 | if (dev->mtu != new_mtu) { |
2314 | struct velocity_info *tmp_vptr; | |
2315 | unsigned long flags; | |
2316 | struct rx_info rx; | |
2317 | struct tx_info tx; | |
1da177e4 | 2318 | |
2cf71d2e DJ |
2319 | tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL); |
2320 | if (!tmp_vptr) { | |
2321 | ret = -ENOMEM; | |
2322 | goto out_0; | |
2323 | } | |
1da177e4 | 2324 | |
2cf71d2e DJ |
2325 | tmp_vptr->dev = dev; |
2326 | tmp_vptr->pdev = vptr->pdev; | |
2327 | tmp_vptr->options = vptr->options; | |
2328 | tmp_vptr->tx.numq = vptr->tx.numq; | |
6aa20a22 | 2329 | |
2cf71d2e DJ |
2330 | ret = velocity_init_rings(tmp_vptr, new_mtu); |
2331 | if (ret < 0) | |
2332 | goto out_free_tmp_vptr_1; | |
1da177e4 | 2333 | |
2cf71d2e | 2334 | spin_lock_irqsave(&vptr->lock, flags); |
1da177e4 | 2335 | |
2cf71d2e DJ |
2336 | netif_stop_queue(dev); |
2337 | velocity_shutdown(vptr); | |
1da177e4 | 2338 | |
2cf71d2e DJ |
2339 | rx = vptr->rx; |
2340 | tx = vptr->tx; | |
1da177e4 | 2341 | |
2cf71d2e DJ |
2342 | vptr->rx = tmp_vptr->rx; |
2343 | vptr->tx = tmp_vptr->tx; | |
1da177e4 | 2344 | |
2cf71d2e DJ |
2345 | tmp_vptr->rx = rx; |
2346 | tmp_vptr->tx = tx; | |
1da177e4 | 2347 | |
2cf71d2e | 2348 | dev->mtu = new_mtu; |
6aa20a22 | 2349 | |
2cf71d2e | 2350 | velocity_init_registers(vptr, VELOCITY_INIT_COLD); |
1da177e4 | 2351 | |
35bb5cad BH |
2352 | velocity_give_many_rx_descs(vptr); |
2353 | ||
2cf71d2e DJ |
2354 | mac_enable_int(vptr->mac_regs); |
2355 | netif_start_queue(dev); | |
6aa20a22 | 2356 | |
2cf71d2e | 2357 | spin_unlock_irqrestore(&vptr->lock, flags); |
1da177e4 | 2358 | |
2cf71d2e | 2359 | velocity_free_rings(tmp_vptr); |
1da177e4 | 2360 | |
2cf71d2e DJ |
2361 | out_free_tmp_vptr_1: |
2362 | kfree(tmp_vptr); | |
2363 | } | |
2364 | out_0: | |
2365 | return ret; | |
1da177e4 | 2366 | } |
1da177e4 LT |
2367 | |
2368 | /** | |
2cf71d2e DJ |
2369 | * velocity_mii_ioctl - MII ioctl handler |
2370 | * @dev: network device | |
2371 | * @ifr: the ifreq block for the ioctl | |
2372 | * @cmd: the command | |
1da177e4 | 2373 | * |
2cf71d2e DJ |
2374 | * Process MII requests made via ioctl from the network layer. These |
2375 | * are used by tools like kudzu to interrogate the link state of the | |
2376 | * hardware | |
1da177e4 | 2377 | */ |
2cf71d2e | 2378 | static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) |
1da177e4 | 2379 | { |
2cf71d2e DJ |
2380 | struct velocity_info *vptr = netdev_priv(dev); |
2381 | struct mac_regs __iomem *regs = vptr->mac_regs; | |
2382 | unsigned long flags; | |
2383 | struct mii_ioctl_data *miidata = if_mii(ifr); | |
2384 | int err; | |
1da177e4 | 2385 | |
2cf71d2e DJ |
2386 | switch (cmd) { |
2387 | case SIOCGMIIPHY: | |
2388 | miidata->phy_id = readb(®s->MIIADR) & 0x1f; | |
1da177e4 | 2389 | break; |
2cf71d2e | 2390 | case SIOCGMIIREG: |
2cf71d2e DJ |
2391 | if (velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0) |
2392 | return -ETIMEDOUT; | |
1da177e4 | 2393 | break; |
2cf71d2e | 2394 | case SIOCSMIIREG: |
2cf71d2e DJ |
2395 | spin_lock_irqsave(&vptr->lock, flags); |
2396 | err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in); | |
2397 | spin_unlock_irqrestore(&vptr->lock, flags); | |
2398 | check_connection_type(vptr->mac_regs); | |
2399 | if (err) | |
2400 | return err; | |
1da177e4 LT |
2401 | break; |
2402 | default: | |
2cf71d2e | 2403 | return -EOPNOTSUPP; |
1da177e4 | 2404 | } |
2cf71d2e | 2405 | return 0; |
1da177e4 LT |
2406 | } |
2407 | ||
2cf71d2e | 2408 | |
1da177e4 | 2409 | /** |
2cf71d2e DJ |
2410 | * velocity_ioctl - ioctl entry point |
2411 | * @dev: network device | |
2412 | * @rq: interface request ioctl | |
2413 | * @cmd: command code | |
1da177e4 | 2414 | * |
2cf71d2e DJ |
2415 | * Called when the user issues an ioctl request to the network |
2416 | * device in question. The velocity interface supports MII. | |
1da177e4 | 2417 | */ |
2cf71d2e DJ |
2418 | static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
2419 | { | |
2420 | struct velocity_info *vptr = netdev_priv(dev); | |
2421 | int ret; | |
6aa20a22 | 2422 | |
2cf71d2e DJ |
2423 | /* If we are asked for information and the device is power |
2424 | saving then we need to bring the device back up to talk to it */ | |
1da177e4 | 2425 | |
2cf71d2e DJ |
2426 | if (!netif_running(dev)) |
2427 | pci_set_power_state(vptr->pdev, PCI_D0); | |
1da177e4 | 2428 | |
2cf71d2e DJ |
2429 | switch (cmd) { |
2430 | case SIOCGMIIPHY: /* Get address of MII PHY in use. */ | |
2431 | case SIOCGMIIREG: /* Read MII PHY register. */ | |
2432 | case SIOCSMIIREG: /* Write to MII PHY register. */ | |
2433 | ret = velocity_mii_ioctl(dev, rq, cmd); | |
2434 | break; | |
1da177e4 | 2435 | |
2cf71d2e DJ |
2436 | default: |
2437 | ret = -EOPNOTSUPP; | |
2438 | } | |
2439 | if (!netif_running(dev)) | |
2440 | pci_set_power_state(vptr->pdev, PCI_D3hot); | |
1da177e4 | 2441 | |
c4067400 | 2442 | |
2cf71d2e | 2443 | return ret; |
1da177e4 LT |
2444 | } |
2445 | ||
2446 | /** | |
2cf71d2e DJ |
2447 | * velocity_get_status - statistics callback |
2448 | * @dev: network device | |
1da177e4 | 2449 | * |
2cf71d2e DJ |
2450 | * Callback from the network layer to allow driver statistics |
2451 | * to be resynchronized with hardware collected state. In the | |
2452 | * case of the velocity we need to pull the MIB counters from | |
2453 | * the hardware into the counters before letting the network | |
2454 | * layer display them. | |
1da177e4 | 2455 | */ |
2cf71d2e | 2456 | static struct net_device_stats *velocity_get_stats(struct net_device *dev) |
1da177e4 | 2457 | { |
2cf71d2e | 2458 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 | 2459 | |
2cf71d2e DJ |
2460 | /* If the hardware is down, don't touch MII */ |
2461 | if (!netif_running(dev)) | |
2462 | return &dev->stats; | |
1da177e4 | 2463 | |
2cf71d2e DJ |
2464 | spin_lock_irq(&vptr->lock); |
2465 | velocity_update_hw_mibs(vptr); | |
2466 | spin_unlock_irq(&vptr->lock); | |
1da177e4 | 2467 | |
2cf71d2e DJ |
2468 | dev->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts]; |
2469 | dev->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts]; | |
2470 | dev->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors]; | |
1da177e4 | 2471 | |
2cf71d2e DJ |
2472 | // unsigned long rx_dropped; /* no space in linux buffers */ |
2473 | dev->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions]; | |
2474 | /* detailed rx_errors: */ | |
2475 | // unsigned long rx_length_errors; | |
2476 | // unsigned long rx_over_errors; /* receiver ring buff overflow */ | |
2477 | dev->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE]; | |
2478 | // unsigned long rx_frame_errors; /* recv'd frame alignment error */ | |
2479 | // unsigned long rx_fifo_errors; /* recv'r fifo overrun */ | |
2480 | // unsigned long rx_missed_errors; /* receiver missed packet */ | |
2481 | ||
2482 | /* detailed tx_errors */ | |
2483 | // unsigned long tx_fifo_errors; | |
2484 | ||
2485 | return &dev->stats; | |
1da177e4 LT |
2486 | } |
2487 | ||
2cf71d2e DJ |
2488 | /** |
2489 | * velocity_close - close adapter callback | |
2490 | * @dev: network device | |
2491 | * | |
2492 | * Callback from the network layer when the velocity is being | |
2493 | * deactivated by the network layer | |
2494 | */ | |
2495 | static int velocity_close(struct net_device *dev) | |
1da177e4 | 2496 | { |
2cf71d2e | 2497 | struct velocity_info *vptr = netdev_priv(dev); |
1da177e4 | 2498 | |
dfff7144 | 2499 | napi_disable(&vptr->napi); |
2cf71d2e DJ |
2500 | netif_stop_queue(dev); |
2501 | velocity_shutdown(vptr); | |
1da177e4 | 2502 | |
2cf71d2e DJ |
2503 | if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) |
2504 | velocity_get_ip(vptr); | |
2505 | if (dev->irq != 0) | |
2506 | free_irq(dev->irq, dev); | |
1da177e4 | 2507 | |
2cf71d2e DJ |
2508 | /* Power down the chip */ |
2509 | pci_set_power_state(vptr->pdev, PCI_D3hot); | |
1da177e4 | 2510 | |
2cf71d2e | 2511 | velocity_free_rings(vptr); |
1da177e4 | 2512 | |
2cf71d2e DJ |
2513 | vptr->flags &= (~VELOCITY_FLAGS_OPENED); |
2514 | return 0; | |
1da177e4 LT |
2515 | } |
2516 | ||
2517 | /** | |
2cf71d2e DJ |
2518 | * velocity_xmit - transmit packet callback |
2519 | * @skb: buffer to transmit | |
2520 | * @dev: network device | |
1da177e4 | 2521 | * |
2cf71d2e DJ |
2522 | * Called by the networ layer to request a packet is queued to |
2523 | * the velocity. Returns zero on success. | |
1da177e4 | 2524 | */ |
61357325 SH |
2525 | static netdev_tx_t velocity_xmit(struct sk_buff *skb, |
2526 | struct net_device *dev) | |
1da177e4 | 2527 | { |
2cf71d2e DJ |
2528 | struct velocity_info *vptr = netdev_priv(dev); |
2529 | int qnum = 0; | |
2530 | struct tx_desc *td_ptr; | |
2531 | struct velocity_td_info *tdinfo; | |
2532 | unsigned long flags; | |
2533 | int pktlen; | |
c79992fd SK |
2534 | int index, prev; |
2535 | int i = 0; | |
1da177e4 | 2536 | |
2cf71d2e DJ |
2537 | if (skb_padto(skb, ETH_ZLEN)) |
2538 | goto out; | |
1da177e4 | 2539 | |
c79992fd SK |
2540 | /* The hardware can handle at most 7 memory segments, so merge |
2541 | * the skb if there are more */ | |
2542 | if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) { | |
2543 | kfree_skb(skb); | |
2544 | return NETDEV_TX_OK; | |
2545 | } | |
2546 | ||
2547 | pktlen = skb_shinfo(skb)->nr_frags == 0 ? | |
2548 | max_t(unsigned int, skb->len, ETH_ZLEN) : | |
2549 | skb_headlen(skb); | |
1da177e4 | 2550 | |
2cf71d2e | 2551 | spin_lock_irqsave(&vptr->lock, flags); |
1da177e4 | 2552 | |
2cf71d2e DJ |
2553 | index = vptr->tx.curr[qnum]; |
2554 | td_ptr = &(vptr->tx.rings[qnum][index]); | |
2555 | tdinfo = &(vptr->tx.infos[qnum][index]); | |
1da177e4 | 2556 | |
2cf71d2e DJ |
2557 | td_ptr->tdesc1.TCR = TCR0_TIC; |
2558 | td_ptr->td_buf[0].size &= ~TD_QUEUE; | |
1da177e4 | 2559 | |
2cf71d2e DJ |
2560 | /* |
2561 | * Map the linear network buffer into PCI space and | |
2562 | * add it to the transmit ring. | |
2563 | */ | |
2564 | tdinfo->skb = skb; | |
2565 | tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE); | |
c79992fd | 2566 | td_ptr->tdesc0.len = cpu_to_le16(pktlen); |
2cf71d2e DJ |
2567 | td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]); |
2568 | td_ptr->td_buf[0].pa_high = 0; | |
c79992fd SK |
2569 | td_ptr->td_buf[0].size = cpu_to_le16(pktlen); |
2570 | ||
2571 | /* Handle fragments */ | |
2572 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | |
2573 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; | |
2574 | ||
2575 | tdinfo->skb_dma[i + 1] = pci_map_page(vptr->pdev, frag->page, | |
2576 | frag->page_offset, frag->size, | |
2577 | PCI_DMA_TODEVICE); | |
2578 | ||
2579 | td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]); | |
2580 | td_ptr->td_buf[i + 1].pa_high = 0; | |
2581 | td_ptr->td_buf[i + 1].size = cpu_to_le16(frag->size); | |
2582 | } | |
2583 | tdinfo->nskb_dma = i + 1; | |
2cf71d2e DJ |
2584 | |
2585 | td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16; | |
2586 | ||
eab6d18d | 2587 | if (vlan_tx_tag_present(skb)) { |
2cf71d2e DJ |
2588 | td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb)); |
2589 | td_ptr->tdesc1.TCR |= TCR0_VETAG; | |
2590 | } | |
2591 | ||
2592 | /* | |
2593 | * Handle hardware checksum | |
2594 | */ | |
f593fe36 | 2595 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
2cf71d2e DJ |
2596 | const struct iphdr *ip = ip_hdr(skb); |
2597 | if (ip->protocol == IPPROTO_TCP) | |
2598 | td_ptr->tdesc1.TCR |= TCR0_TCPCK; | |
2599 | else if (ip->protocol == IPPROTO_UDP) | |
2600 | td_ptr->tdesc1.TCR |= (TCR0_UDPCK); | |
2601 | td_ptr->tdesc1.TCR |= TCR0_IPCK; | |
2602 | } | |
1da177e4 | 2603 | |
c79992fd SK |
2604 | prev = index - 1; |
2605 | if (prev < 0) | |
2606 | prev = vptr->options.numtx - 1; | |
2607 | td_ptr->tdesc0.len |= OWNED_BY_NIC; | |
2608 | vptr->tx.used[qnum]++; | |
2609 | vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx; | |
1da177e4 | 2610 | |
c79992fd SK |
2611 | if (AVAIL_TD(vptr, qnum) < 1) |
2612 | netif_stop_queue(dev); | |
1da177e4 | 2613 | |
c79992fd SK |
2614 | td_ptr = &(vptr->tx.rings[qnum][prev]); |
2615 | td_ptr->td_buf[0].size |= TD_QUEUE; | |
2616 | mac_tx_queue_wake(vptr->mac_regs, qnum); | |
1da177e4 | 2617 | |
2cf71d2e DJ |
2618 | spin_unlock_irqrestore(&vptr->lock, flags); |
2619 | out: | |
2620 | return NETDEV_TX_OK; | |
1da177e4 LT |
2621 | } |
2622 | ||
2623 | ||
2cf71d2e DJ |
2624 | static const struct net_device_ops velocity_netdev_ops = { |
2625 | .ndo_open = velocity_open, | |
2626 | .ndo_stop = velocity_close, | |
2627 | .ndo_start_xmit = velocity_xmit, | |
2628 | .ndo_get_stats = velocity_get_stats, | |
2629 | .ndo_validate_addr = eth_validate_addr, | |
2630 | .ndo_set_mac_address = eth_mac_addr, | |
2631 | .ndo_set_multicast_list = velocity_set_multi, | |
2632 | .ndo_change_mtu = velocity_change_mtu, | |
2633 | .ndo_do_ioctl = velocity_ioctl, | |
2634 | .ndo_vlan_rx_add_vid = velocity_vlan_rx_add_vid, | |
2635 | .ndo_vlan_rx_kill_vid = velocity_vlan_rx_kill_vid, | |
2cf71d2e DJ |
2636 | }; |
2637 | ||
1da177e4 | 2638 | /** |
2cf71d2e DJ |
2639 | * velocity_init_info - init private data |
2640 | * @pdev: PCI device | |
2641 | * @vptr: Velocity info | |
2642 | * @info: Board type | |
1da177e4 | 2643 | * |
2cf71d2e DJ |
2644 | * Set up the initial velocity_info struct for the device that has been |
2645 | * discovered. | |
1da177e4 | 2646 | */ |
2cf71d2e DJ |
2647 | static void __devinit velocity_init_info(struct pci_dev *pdev, |
2648 | struct velocity_info *vptr, | |
2649 | const struct velocity_info_tbl *info) | |
1da177e4 | 2650 | { |
2cf71d2e DJ |
2651 | memset(vptr, 0, sizeof(struct velocity_info)); |
2652 | ||
2653 | vptr->pdev = pdev; | |
2654 | vptr->chip_id = info->chip_id; | |
2655 | vptr->tx.numq = info->txqueue; | |
2656 | vptr->multicast_limit = MCAM_SIZE; | |
2657 | spin_lock_init(&vptr->lock); | |
6aa20a22 | 2658 | } |
1da177e4 LT |
2659 | |
2660 | /** | |
2cf71d2e DJ |
2661 | * velocity_get_pci_info - retrieve PCI info for device |
2662 | * @vptr: velocity device | |
2663 | * @pdev: PCI device it matches | |
1da177e4 | 2664 | * |
2cf71d2e DJ |
2665 | * Retrieve the PCI configuration space data that interests us from |
2666 | * the kernel PCI layer | |
1da177e4 | 2667 | */ |
2cf71d2e | 2668 | static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev) |
1da177e4 | 2669 | { |
2cf71d2e | 2670 | vptr->rev_id = pdev->revision; |
1da177e4 | 2671 | |
2cf71d2e | 2672 | pci_set_master(pdev); |
1da177e4 | 2673 | |
2cf71d2e DJ |
2674 | vptr->ioaddr = pci_resource_start(pdev, 0); |
2675 | vptr->memaddr = pci_resource_start(pdev, 1); | |
1da177e4 | 2676 | |
2cf71d2e DJ |
2677 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) { |
2678 | dev_err(&pdev->dev, | |
2679 | "region #0 is not an I/O resource, aborting.\n"); | |
2680 | return -EINVAL; | |
2681 | } | |
2682 | ||
2683 | if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) { | |
2684 | dev_err(&pdev->dev, | |
2685 | "region #1 is an I/O resource, aborting.\n"); | |
2686 | return -EINVAL; | |
2687 | } | |
2688 | ||
2689 | if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) { | |
2690 | dev_err(&pdev->dev, "region #1 is too small.\n"); | |
2691 | return -EINVAL; | |
2692 | } | |
2693 | vptr->pdev = pdev; | |
6aa20a22 | 2694 | |
1da177e4 LT |
2695 | return 0; |
2696 | } | |
2697 | ||
2cf71d2e DJ |
2698 | /** |
2699 | * velocity_print_info - per driver data | |
2700 | * @vptr: velocity | |
2701 | * | |
2702 | * Print per driver data as the kernel driver finds Velocity | |
2703 | * hardware | |
2704 | */ | |
2705 | static void __devinit velocity_print_info(struct velocity_info *vptr) | |
1da177e4 | 2706 | { |
2cf71d2e | 2707 | struct net_device *dev = vptr->dev; |
1da177e4 | 2708 | |
2cf71d2e | 2709 | printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id)); |
aa7c68a5 HS |
2710 | printk(KERN_INFO "%s: Ethernet Address: %pM\n", |
2711 | dev->name, dev->dev_addr); | |
1da177e4 LT |
2712 | } |
2713 | ||
2714 | static u32 velocity_get_link(struct net_device *dev) | |
2715 | { | |
8ab6f3f7 | 2716 | struct velocity_info *vptr = netdev_priv(dev); |
c4067400 | 2717 | struct mac_regs __iomem *regs = vptr->mac_regs; |
59b693fb | 2718 | return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, ®s->PHYSR0) ? 1 : 0; |
1da177e4 LT |
2719 | } |
2720 | ||
1da177e4 | 2721 | |
2cf71d2e DJ |
2722 | /** |
2723 | * velocity_found1 - set up discovered velocity card | |
2724 | * @pdev: PCI device | |
2725 | * @ent: PCI device table entry that matched | |
2726 | * | |
2727 | * Configure a discovered adapter from scratch. Return a negative | |
2728 | * errno error code on failure paths. | |
2729 | */ | |
2730 | static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent) | |
1da177e4 | 2731 | { |
2cf71d2e DJ |
2732 | static int first = 1; |
2733 | struct net_device *dev; | |
2734 | int i; | |
2735 | const char *drv_string; | |
2736 | const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data]; | |
2737 | struct velocity_info *vptr; | |
2738 | struct mac_regs __iomem *regs; | |
2739 | int ret = -ENOMEM; | |
1da177e4 | 2740 | |
2cf71d2e DJ |
2741 | /* FIXME: this driver, like almost all other ethernet drivers, |
2742 | * can support more than MAX_UNITS. | |
2743 | */ | |
2744 | if (velocity_nics >= MAX_UNITS) { | |
2745 | dev_notice(&pdev->dev, "already found %d NICs.\n", | |
2746 | velocity_nics); | |
2747 | return -ENODEV; | |
2748 | } | |
1da177e4 | 2749 | |
2cf71d2e DJ |
2750 | dev = alloc_etherdev(sizeof(struct velocity_info)); |
2751 | if (!dev) { | |
2752 | dev_err(&pdev->dev, "allocate net device failed.\n"); | |
2753 | goto out; | |
2754 | } | |
1da177e4 | 2755 | |
2cf71d2e | 2756 | /* Chain it all together */ |
1da177e4 | 2757 | |
2cf71d2e DJ |
2758 | SET_NETDEV_DEV(dev, &pdev->dev); |
2759 | vptr = netdev_priv(dev); | |
2760 | ||
2761 | ||
2762 | if (first) { | |
2763 | printk(KERN_INFO "%s Ver. %s\n", | |
2764 | VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION); | |
2765 | printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n"); | |
2766 | printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n"); | |
2767 | first = 0; | |
2768 | } | |
2769 | ||
2770 | velocity_init_info(pdev, vptr, info); | |
2771 | ||
2772 | vptr->dev = dev; | |
2773 | ||
2cf71d2e DJ |
2774 | ret = pci_enable_device(pdev); |
2775 | if (ret < 0) | |
2776 | goto err_free_dev; | |
2777 | ||
889635fd KV |
2778 | dev->irq = pdev->irq; |
2779 | ||
2cf71d2e DJ |
2780 | ret = velocity_get_pci_info(vptr, pdev); |
2781 | if (ret < 0) { | |
2782 | /* error message already printed */ | |
2783 | goto err_disable; | |
1da177e4 | 2784 | } |
2cf71d2e DJ |
2785 | |
2786 | ret = pci_request_regions(pdev, VELOCITY_NAME); | |
2787 | if (ret < 0) { | |
2788 | dev_err(&pdev->dev, "No PCI resources.\n"); | |
2789 | goto err_disable; | |
1da177e4 | 2790 | } |
2cf71d2e DJ |
2791 | |
2792 | regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE); | |
2793 | if (regs == NULL) { | |
2794 | ret = -EIO; | |
2795 | goto err_release_res; | |
1da177e4 | 2796 | } |
1da177e4 | 2797 | |
2cf71d2e | 2798 | vptr->mac_regs = regs; |
1da177e4 | 2799 | |
2cf71d2e | 2800 | mac_wol_reset(regs); |
1da177e4 | 2801 | |
2cf71d2e | 2802 | dev->base_addr = vptr->ioaddr; |
1da177e4 | 2803 | |
2cf71d2e DJ |
2804 | for (i = 0; i < 6; i++) |
2805 | dev->dev_addr[i] = readb(®s->PAR[i]); | |
6aa20a22 | 2806 | |
6aa20a22 | 2807 | |
2cf71d2e | 2808 | drv_string = dev_driver_string(&pdev->dev); |
1da177e4 | 2809 | |
2cf71d2e | 2810 | velocity_get_options(&vptr->options, velocity_nics, drv_string); |
1da177e4 | 2811 | |
2cf71d2e DJ |
2812 | /* |
2813 | * Mask out the options cannot be set to the chip | |
2814 | */ | |
6aa20a22 | 2815 | |
2cf71d2e | 2816 | vptr->options.flags &= info->flags; |
1da177e4 | 2817 | |
2cf71d2e DJ |
2818 | /* |
2819 | * Enable the chip specified capbilities | |
2820 | */ | |
1da177e4 | 2821 | |
2cf71d2e | 2822 | vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL); |
1da177e4 | 2823 | |
2cf71d2e DJ |
2824 | vptr->wol_opts = vptr->options.wol_opts; |
2825 | vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED; | |
1da177e4 | 2826 | |
2cf71d2e | 2827 | vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs); |
1da177e4 | 2828 | |
2cf71d2e DJ |
2829 | dev->irq = pdev->irq; |
2830 | dev->netdev_ops = &velocity_netdev_ops; | |
2831 | dev->ethtool_ops = &velocity_ethtool_ops; | |
dfff7144 | 2832 | netif_napi_add(dev, &vptr->napi, velocity_poll, VELOCITY_NAPI_WEIGHT); |
6aa20a22 | 2833 | |
f593fe36 | 2834 | dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_HW_VLAN_TX; |
2cf71d2e | 2835 | dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | |
de2b96f1 | 2836 | NETIF_F_HW_VLAN_RX | NETIF_F_IP_CSUM; |
1da177e4 | 2837 | |
2cf71d2e DJ |
2838 | ret = register_netdev(dev); |
2839 | if (ret < 0) | |
2840 | goto err_iounmap; | |
2841 | ||
2842 | if (!velocity_get_link(dev)) { | |
2843 | netif_carrier_off(dev); | |
2844 | vptr->mii_status |= VELOCITY_LINK_FAIL; | |
1da177e4 LT |
2845 | } |
2846 | ||
2cf71d2e DJ |
2847 | velocity_print_info(vptr); |
2848 | pci_set_drvdata(pdev, dev); | |
1da177e4 | 2849 | |
2cf71d2e | 2850 | /* and leave the chip powered down */ |
1da177e4 | 2851 | |
2cf71d2e | 2852 | pci_set_power_state(pdev, PCI_D3hot); |
2cf71d2e DJ |
2853 | velocity_nics++; |
2854 | out: | |
2855 | return ret; | |
2856 | ||
2857 | err_iounmap: | |
2858 | iounmap(regs); | |
2859 | err_release_res: | |
2860 | pci_release_regions(pdev); | |
2861 | err_disable: | |
2862 | pci_disable_device(pdev); | |
2863 | err_free_dev: | |
2864 | free_netdev(dev); | |
2865 | goto out; | |
1da177e4 LT |
2866 | } |
2867 | ||
2cf71d2e DJ |
2868 | |
2869 | #ifdef CONFIG_PM | |
1da177e4 LT |
2870 | /** |
2871 | * wol_calc_crc - WOL CRC | |
2872 | * @pattern: data pattern | |
2873 | * @mask_pattern: mask | |
2874 | * | |
2875 | * Compute the wake on lan crc hashes for the packet header | |
2876 | * we are interested in. | |
2877 | */ | |
c4067400 | 2878 | static u16 wol_calc_crc(int size, u8 *pattern, u8 *mask_pattern) |
1da177e4 LT |
2879 | { |
2880 | u16 crc = 0xFFFF; | |
2881 | u8 mask; | |
2882 | int i, j; | |
2883 | ||
2884 | for (i = 0; i < size; i++) { | |
2885 | mask = mask_pattern[i]; | |
2886 | ||
2887 | /* Skip this loop if the mask equals to zero */ | |
2888 | if (mask == 0x00) | |
2889 | continue; | |
2890 | ||
2891 | for (j = 0; j < 8; j++) { | |
2892 | if ((mask & 0x01) == 0) { | |
2893 | mask >>= 1; | |
2894 | continue; | |
2895 | } | |
2896 | mask >>= 1; | |
2897 | crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1); | |
2898 | } | |
2899 | } | |
2900 | /* Finally, invert the result once to get the correct data */ | |
2901 | crc = ~crc; | |
906d66df | 2902 | return bitrev32(crc) >> 16; |
1da177e4 LT |
2903 | } |
2904 | ||
2905 | /** | |
2906 | * velocity_set_wol - set up for wake on lan | |
2907 | * @vptr: velocity to set WOL status on | |
2908 | * | |
2909 | * Set a card up for wake on lan either by unicast or by | |
2910 | * ARP packet. | |
2911 | * | |
2912 | * FIXME: check static buffer is safe here | |
2913 | */ | |
1da177e4 LT |
2914 | static int velocity_set_wol(struct velocity_info *vptr) |
2915 | { | |
c4067400 | 2916 | struct mac_regs __iomem *regs = vptr->mac_regs; |
2ffa007e | 2917 | enum speed_opt spd_dpx = vptr->options.spd_dpx; |
1da177e4 LT |
2918 | static u8 buf[256]; |
2919 | int i; | |
2920 | ||
2921 | static u32 mask_pattern[2][4] = { | |
2922 | {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */ | |
2923 | {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */ | |
2924 | }; | |
2925 | ||
2926 | writew(0xFFFF, ®s->WOLCRClr); | |
2927 | writeb(WOLCFG_SAB | WOLCFG_SAM, ®s->WOLCFGSet); | |
2928 | writew(WOLCR_MAGIC_EN, ®s->WOLCRSet); | |
2929 | ||
2930 | /* | |
2931 | if (vptr->wol_opts & VELOCITY_WOL_PHY) | |
2932 | writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), ®s->WOLCRSet); | |
2933 | */ | |
2934 | ||
c4067400 | 2935 | if (vptr->wol_opts & VELOCITY_WOL_UCAST) |
1da177e4 | 2936 | writew(WOLCR_UNICAST_EN, ®s->WOLCRSet); |
1da177e4 LT |
2937 | |
2938 | if (vptr->wol_opts & VELOCITY_WOL_ARP) { | |
2939 | struct arp_packet *arp = (struct arp_packet *) buf; | |
2940 | u16 crc; | |
2941 | memset(buf, 0, sizeof(struct arp_packet) + 7); | |
2942 | ||
2943 | for (i = 0; i < 4; i++) | |
2944 | writel(mask_pattern[0][i], ®s->ByteMask[0][i]); | |
2945 | ||
2946 | arp->type = htons(ETH_P_ARP); | |
2947 | arp->ar_op = htons(1); | |
2948 | ||
2949 | memcpy(arp->ar_tip, vptr->ip_addr, 4); | |
2950 | ||
2951 | crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf, | |
2952 | (u8 *) & mask_pattern[0][0]); | |
2953 | ||
2954 | writew(crc, ®s->PatternCRC[0]); | |
2955 | writew(WOLCR_ARP_EN, ®s->WOLCRSet); | |
2956 | } | |
2957 | ||
2958 | BYTE_REG_BITS_ON(PWCFG_WOLTYPE, ®s->PWCFGSet); | |
2959 | BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, ®s->PWCFGSet); | |
2960 | ||
2961 | writew(0x0FFF, ®s->WOLSRClr); | |
2962 | ||
2ffa007e | 2963 | if (spd_dpx == SPD_DPX_1000_FULL) |
2964 | goto mac_done; | |
2965 | ||
2966 | if (spd_dpx != SPD_DPX_AUTO) | |
2967 | goto advertise_done; | |
2968 | ||
1da177e4 LT |
2969 | if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) { |
2970 | if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) | |
3a7f8681 | 2971 | MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs); |
1da177e4 | 2972 | |
3a7f8681 | 2973 | MII_REG_BITS_OFF(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs); |
1da177e4 LT |
2974 | } |
2975 | ||
2976 | if (vptr->mii_status & VELOCITY_SPEED_1000) | |
3a7f8681 | 2977 | MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs); |
1da177e4 | 2978 | |
2ffa007e | 2979 | advertise_done: |
1da177e4 LT |
2980 | BYTE_REG_BITS_ON(CHIPGCR_FCMODE, ®s->CHIPGCR); |
2981 | ||
2982 | { | |
2983 | u8 GCR; | |
2984 | GCR = readb(®s->CHIPGCR); | |
2985 | GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX; | |
2986 | writeb(GCR, ®s->CHIPGCR); | |
2987 | } | |
2988 | ||
2ffa007e | 2989 | mac_done: |
1da177e4 LT |
2990 | BYTE_REG_BITS_OFF(ISR_PWEI, ®s->ISR); |
2991 | /* Turn on SWPTAG just before entering power mode */ | |
2992 | BYTE_REG_BITS_ON(STICKHW_SWPTAG, ®s->STICKHW); | |
2993 | /* Go to bed ..... */ | |
2994 | BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), ®s->STICKHW); | |
2995 | ||
2996 | return 0; | |
2997 | } | |
2998 | ||
2cf71d2e DJ |
2999 | /** |
3000 | * velocity_save_context - save registers | |
3001 | * @vptr: velocity | |
3002 | * @context: buffer for stored context | |
3003 | * | |
3004 | * Retrieve the current configuration from the velocity hardware | |
3005 | * and stash it in the context structure, for use by the context | |
3006 | * restore functions. This allows us to save things we need across | |
3007 | * power down states | |
3008 | */ | |
3009 | static void velocity_save_context(struct velocity_info *vptr, struct velocity_context *context) | |
3010 | { | |
3011 | struct mac_regs __iomem *regs = vptr->mac_regs; | |
3012 | u16 i; | |
3013 | u8 __iomem *ptr = (u8 __iomem *)regs; | |
3014 | ||
3015 | for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4) | |
3016 | *((u32 *) (context->mac_reg + i)) = readl(ptr + i); | |
3017 | ||
3018 | for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4) | |
3019 | *((u32 *) (context->mac_reg + i)) = readl(ptr + i); | |
3020 | ||
3021 | for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) | |
3022 | *((u32 *) (context->mac_reg + i)) = readl(ptr + i); | |
3023 | ||
3024 | } | |
3025 | ||
1da177e4 LT |
3026 | static int velocity_suspend(struct pci_dev *pdev, pm_message_t state) |
3027 | { | |
3028 | struct net_device *dev = pci_get_drvdata(pdev); | |
3029 | struct velocity_info *vptr = netdev_priv(dev); | |
3030 | unsigned long flags; | |
3031 | ||
c4067400 | 3032 | if (!netif_running(vptr->dev)) |
1da177e4 LT |
3033 | return 0; |
3034 | ||
3035 | netif_device_detach(vptr->dev); | |
3036 | ||
3037 | spin_lock_irqsave(&vptr->lock, flags); | |
3038 | pci_save_state(pdev); | |
3039 | #ifdef ETHTOOL_GWOL | |
3040 | if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) { | |
3041 | velocity_get_ip(vptr); | |
3042 | velocity_save_context(vptr, &vptr->context); | |
3043 | velocity_shutdown(vptr); | |
3044 | velocity_set_wol(vptr); | |
4a51c0d0 | 3045 | pci_enable_wake(pdev, PCI_D3hot, 1); |
1da177e4 LT |
3046 | pci_set_power_state(pdev, PCI_D3hot); |
3047 | } else { | |
3048 | velocity_save_context(vptr, &vptr->context); | |
3049 | velocity_shutdown(vptr); | |
3050 | pci_disable_device(pdev); | |
3051 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
3052 | } | |
2cf71d2e DJ |
3053 | #else |
3054 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
3055 | #endif | |
3056 | spin_unlock_irqrestore(&vptr->lock, flags); | |
3057 | return 0; | |
3058 | } | |
3059 | ||
3060 | /** | |
3061 | * velocity_restore_context - restore registers | |
3062 | * @vptr: velocity | |
3063 | * @context: buffer for stored context | |
3064 | * | |
3065 | * Reload the register configuration from the velocity context | |
3066 | * created by velocity_save_context. | |
3067 | */ | |
3068 | static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context) | |
3069 | { | |
3070 | struct mac_regs __iomem *regs = vptr->mac_regs; | |
3071 | int i; | |
3072 | u8 __iomem *ptr = (u8 __iomem *)regs; | |
3073 | ||
3074 | for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) | |
3075 | writel(*((u32 *) (context->mac_reg + i)), ptr + i); | |
3076 | ||
3077 | /* Just skip cr0 */ | |
3078 | for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) { | |
3079 | /* Clear */ | |
3080 | writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4); | |
3081 | /* Set */ | |
3082 | writeb(*((u8 *) (context->mac_reg + i)), ptr + i); | |
3083 | } | |
3084 | ||
3085 | for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) | |
3086 | writel(*((u32 *) (context->mac_reg + i)), ptr + i); | |
3087 | ||
3088 | for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) | |
3089 | writel(*((u32 *) (context->mac_reg + i)), ptr + i); | |
3090 | ||
3091 | for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) | |
3092 | writeb(*((u8 *) (context->mac_reg + i)), ptr + i); | |
1da177e4 LT |
3093 | } |
3094 | ||
3095 | static int velocity_resume(struct pci_dev *pdev) | |
3096 | { | |
3097 | struct net_device *dev = pci_get_drvdata(pdev); | |
3098 | struct velocity_info *vptr = netdev_priv(dev); | |
3099 | unsigned long flags; | |
3100 | int i; | |
3101 | ||
c4067400 | 3102 | if (!netif_running(vptr->dev)) |
1da177e4 LT |
3103 | return 0; |
3104 | ||
3105 | pci_set_power_state(pdev, PCI_D0); | |
3106 | pci_enable_wake(pdev, 0, 0); | |
3107 | pci_restore_state(pdev); | |
3108 | ||
3109 | mac_wol_reset(vptr->mac_regs); | |
3110 | ||
3111 | spin_lock_irqsave(&vptr->lock, flags); | |
3112 | velocity_restore_context(vptr, &vptr->context); | |
3113 | velocity_init_registers(vptr, VELOCITY_INIT_WOL); | |
3114 | mac_disable_int(vptr->mac_regs); | |
3115 | ||
d6cade0f | 3116 | velocity_tx_srv(vptr); |
1da177e4 | 3117 | |
0fe9f15e | 3118 | for (i = 0; i < vptr->tx.numq; i++) { |
c4067400 | 3119 | if (vptr->tx.used[i]) |
1da177e4 | 3120 | mac_tx_queue_wake(vptr->mac_regs, i); |
1da177e4 LT |
3121 | } |
3122 | ||
3123 | mac_enable_int(vptr->mac_regs); | |
3124 | spin_unlock_irqrestore(&vptr->lock, flags); | |
3125 | netif_device_attach(vptr->dev); | |
3126 | ||
3127 | return 0; | |
3128 | } | |
2cf71d2e | 3129 | #endif |
1da177e4 | 3130 | |
2cf71d2e DJ |
3131 | /* |
3132 | * Definition for our device driver. The PCI layer interface | |
3133 | * uses this to handle all our card discover and plugging | |
3134 | */ | |
3135 | static struct pci_driver velocity_driver = { | |
3136 | .name = VELOCITY_NAME, | |
3137 | .id_table = velocity_id_table, | |
3138 | .probe = velocity_found1, | |
3139 | .remove = __devexit_p(velocity_remove1), | |
3140 | #ifdef CONFIG_PM | |
3141 | .suspend = velocity_suspend, | |
3142 | .resume = velocity_resume, | |
3143 | #endif | |
3144 | }; | |
3145 | ||
3146 | ||
3147 | /** | |
3148 | * velocity_ethtool_up - pre hook for ethtool | |
3149 | * @dev: network device | |
3150 | * | |
3151 | * Called before an ethtool operation. We need to make sure the | |
3152 | * chip is out of D3 state before we poke at it. | |
3153 | */ | |
3154 | static int velocity_ethtool_up(struct net_device *dev) | |
3155 | { | |
3156 | struct velocity_info *vptr = netdev_priv(dev); | |
3157 | if (!netif_running(dev)) | |
3158 | pci_set_power_state(vptr->pdev, PCI_D0); | |
3159 | return 0; | |
3160 | } | |
3161 | ||
3162 | /** | |
3163 | * velocity_ethtool_down - post hook for ethtool | |
3164 | * @dev: network device | |
3165 | * | |
3166 | * Called after an ethtool operation. Restore the chip back to D3 | |
3167 | * state if it isn't running. | |
3168 | */ | |
3169 | static void velocity_ethtool_down(struct net_device *dev) | |
3170 | { | |
3171 | struct velocity_info *vptr = netdev_priv(dev); | |
3172 | if (!netif_running(dev)) | |
3173 | pci_set_power_state(vptr->pdev, PCI_D3hot); | |
3174 | } | |
3175 | ||
70739497 DD |
3176 | static int velocity_get_settings(struct net_device *dev, |
3177 | struct ethtool_cmd *cmd) | |
2cf71d2e DJ |
3178 | { |
3179 | struct velocity_info *vptr = netdev_priv(dev); | |
3180 | struct mac_regs __iomem *regs = vptr->mac_regs; | |
3181 | u32 status; | |
3182 | status = check_connection_type(vptr->mac_regs); | |
3183 | ||
3184 | cmd->supported = SUPPORTED_TP | | |
3185 | SUPPORTED_Autoneg | | |
3186 | SUPPORTED_10baseT_Half | | |
3187 | SUPPORTED_10baseT_Full | | |
3188 | SUPPORTED_100baseT_Half | | |
3189 | SUPPORTED_100baseT_Full | | |
3190 | SUPPORTED_1000baseT_Half | | |
3191 | SUPPORTED_1000baseT_Full; | |
15419227 | 3192 | |
3193 | cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg; | |
3194 | if (vptr->options.spd_dpx == SPD_DPX_AUTO) { | |
3195 | cmd->advertising |= | |
3196 | ADVERTISED_10baseT_Half | | |
3197 | ADVERTISED_10baseT_Full | | |
3198 | ADVERTISED_100baseT_Half | | |
3199 | ADVERTISED_100baseT_Full | | |
3200 | ADVERTISED_1000baseT_Half | | |
3201 | ADVERTISED_1000baseT_Full; | |
3202 | } else { | |
3203 | switch (vptr->options.spd_dpx) { | |
3204 | case SPD_DPX_1000_FULL: | |
3205 | cmd->advertising |= ADVERTISED_1000baseT_Full; | |
3206 | break; | |
3207 | case SPD_DPX_100_HALF: | |
3208 | cmd->advertising |= ADVERTISED_100baseT_Half; | |
3209 | break; | |
3210 | case SPD_DPX_100_FULL: | |
3211 | cmd->advertising |= ADVERTISED_100baseT_Full; | |
3212 | break; | |
3213 | case SPD_DPX_10_HALF: | |
3214 | cmd->advertising |= ADVERTISED_10baseT_Half; | |
3215 | break; | |
3216 | case SPD_DPX_10_FULL: | |
3217 | cmd->advertising |= ADVERTISED_10baseT_Full; | |
3218 | break; | |
3219 | default: | |
3220 | break; | |
3221 | } | |
3222 | } | |
70739497 | 3223 | |
2cf71d2e | 3224 | if (status & VELOCITY_SPEED_1000) |
70739497 | 3225 | ethtool_cmd_speed_set(cmd, SPEED_1000); |
2cf71d2e | 3226 | else if (status & VELOCITY_SPEED_100) |
70739497 | 3227 | ethtool_cmd_speed_set(cmd, SPEED_100); |
2cf71d2e | 3228 | else |
70739497 DD |
3229 | ethtool_cmd_speed_set(cmd, SPEED_10); |
3230 | ||
2cf71d2e DJ |
3231 | cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE; |
3232 | cmd->port = PORT_TP; | |
3233 | cmd->transceiver = XCVR_INTERNAL; | |
3234 | cmd->phy_address = readb(®s->MIIADR) & 0x1F; | |
3235 | ||
3236 | if (status & VELOCITY_DUPLEX_FULL) | |
3237 | cmd->duplex = DUPLEX_FULL; | |
3238 | else | |
3239 | cmd->duplex = DUPLEX_HALF; | |
3240 | ||
3241 | return 0; | |
3242 | } | |
3243 | ||
25db0338 DD |
3244 | static int velocity_set_settings(struct net_device *dev, |
3245 | struct ethtool_cmd *cmd) | |
2cf71d2e DJ |
3246 | { |
3247 | struct velocity_info *vptr = netdev_priv(dev); | |
25db0338 | 3248 | u32 speed = ethtool_cmd_speed(cmd); |
2cf71d2e DJ |
3249 | u32 curr_status; |
3250 | u32 new_status = 0; | |
3251 | int ret = 0; | |
3252 | ||
3253 | curr_status = check_connection_type(vptr->mac_regs); | |
3254 | curr_status &= (~VELOCITY_LINK_FAIL); | |
3255 | ||
3256 | new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0); | |
25db0338 DD |
3257 | new_status |= ((speed == SPEED_1000) ? VELOCITY_SPEED_1000 : 0); |
3258 | new_status |= ((speed == SPEED_100) ? VELOCITY_SPEED_100 : 0); | |
3259 | new_status |= ((speed == SPEED_10) ? VELOCITY_SPEED_10 : 0); | |
2cf71d2e DJ |
3260 | new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0); |
3261 | ||
15419227 | 3262 | if ((new_status & VELOCITY_AUTONEG_ENABLE) && |
3263 | (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE))) { | |
2cf71d2e | 3264 | ret = -EINVAL; |
15419227 | 3265 | } else { |
3266 | enum speed_opt spd_dpx; | |
3267 | ||
3268 | if (new_status & VELOCITY_AUTONEG_ENABLE) | |
3269 | spd_dpx = SPD_DPX_AUTO; | |
3270 | else if ((new_status & VELOCITY_SPEED_1000) && | |
3271 | (new_status & VELOCITY_DUPLEX_FULL)) { | |
3272 | spd_dpx = SPD_DPX_1000_FULL; | |
3273 | } else if (new_status & VELOCITY_SPEED_100) | |
3274 | spd_dpx = (new_status & VELOCITY_DUPLEX_FULL) ? | |
3275 | SPD_DPX_100_FULL : SPD_DPX_100_HALF; | |
3276 | else if (new_status & VELOCITY_SPEED_10) | |
3277 | spd_dpx = (new_status & VELOCITY_DUPLEX_FULL) ? | |
3278 | SPD_DPX_10_FULL : SPD_DPX_10_HALF; | |
3279 | else | |
3280 | return -EOPNOTSUPP; | |
3281 | ||
3282 | vptr->options.spd_dpx = spd_dpx; | |
3283 | ||
2cf71d2e | 3284 | velocity_set_media_mode(vptr, new_status); |
15419227 | 3285 | } |
2cf71d2e DJ |
3286 | |
3287 | return ret; | |
3288 | } | |
3289 | ||
3290 | static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |
3291 | { | |
3292 | struct velocity_info *vptr = netdev_priv(dev); | |
3293 | strcpy(info->driver, VELOCITY_NAME); | |
3294 | strcpy(info->version, VELOCITY_VERSION); | |
3295 | strcpy(info->bus_info, pci_name(vptr->pdev)); | |
3296 | } | |
3297 | ||
3298 | static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |
3299 | { | |
3300 | struct velocity_info *vptr = netdev_priv(dev); | |
3301 | wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP; | |
3302 | wol->wolopts |= WAKE_MAGIC; | |
3303 | /* | |
3304 | if (vptr->wol_opts & VELOCITY_WOL_PHY) | |
3305 | wol.wolopts|=WAKE_PHY; | |
3306 | */ | |
3307 | if (vptr->wol_opts & VELOCITY_WOL_UCAST) | |
3308 | wol->wolopts |= WAKE_UCAST; | |
3309 | if (vptr->wol_opts & VELOCITY_WOL_ARP) | |
3310 | wol->wolopts |= WAKE_ARP; | |
3311 | memcpy(&wol->sopass, vptr->wol_passwd, 6); | |
3312 | } | |
3313 | ||
3314 | static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |
3315 | { | |
3316 | struct velocity_info *vptr = netdev_priv(dev); | |
3317 | ||
3318 | if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP))) | |
3319 | return -EFAULT; | |
3320 | vptr->wol_opts = VELOCITY_WOL_MAGIC; | |
3321 | ||
3322 | /* | |
3323 | if (wol.wolopts & WAKE_PHY) { | |
3324 | vptr->wol_opts|=VELOCITY_WOL_PHY; | |
3325 | vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED; | |
3326 | } | |
3327 | */ | |
3328 | ||
3329 | if (wol->wolopts & WAKE_MAGIC) { | |
3330 | vptr->wol_opts |= VELOCITY_WOL_MAGIC; | |
3331 | vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED; | |
3332 | } | |
3333 | if (wol->wolopts & WAKE_UCAST) { | |
3334 | vptr->wol_opts |= VELOCITY_WOL_UCAST; | |
3335 | vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED; | |
3336 | } | |
3337 | if (wol->wolopts & WAKE_ARP) { | |
3338 | vptr->wol_opts |= VELOCITY_WOL_ARP; | |
3339 | vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED; | |
3340 | } | |
3341 | memcpy(vptr->wol_passwd, wol->sopass, 6); | |
3342 | return 0; | |
3343 | } | |
3344 | ||
3345 | static u32 velocity_get_msglevel(struct net_device *dev) | |
3346 | { | |
3347 | return msglevel; | |
3348 | } | |
3349 | ||
3350 | static void velocity_set_msglevel(struct net_device *dev, u32 value) | |
3351 | { | |
3352 | msglevel = value; | |
3353 | } | |
3354 | ||
6dfc4b95 SK |
3355 | static int get_pending_timer_val(int val) |
3356 | { | |
3357 | int mult_bits = val >> 6; | |
3358 | int mult = 1; | |
3359 | ||
3360 | switch (mult_bits) | |
3361 | { | |
3362 | case 1: | |
3363 | mult = 4; break; | |
3364 | case 2: | |
3365 | mult = 16; break; | |
3366 | case 3: | |
3367 | mult = 64; break; | |
3368 | case 0: | |
3369 | default: | |
3370 | break; | |
3371 | } | |
3372 | ||
3373 | return (val & 0x3f) * mult; | |
3374 | } | |
3375 | ||
3376 | static void set_pending_timer_val(int *val, u32 us) | |
3377 | { | |
3378 | u8 mult = 0; | |
3379 | u8 shift = 0; | |
3380 | ||
3381 | if (us >= 0x3f) { | |
3382 | mult = 1; /* mult with 4 */ | |
3383 | shift = 2; | |
3384 | } | |
3385 | if (us >= 0x3f * 4) { | |
3386 | mult = 2; /* mult with 16 */ | |
3387 | shift = 4; | |
3388 | } | |
3389 | if (us >= 0x3f * 16) { | |
3390 | mult = 3; /* mult with 64 */ | |
3391 | shift = 6; | |
3392 | } | |
3393 | ||
3394 | *val = (mult << 6) | ((us >> shift) & 0x3f); | |
3395 | } | |
3396 | ||
3397 | ||
3398 | static int velocity_get_coalesce(struct net_device *dev, | |
3399 | struct ethtool_coalesce *ecmd) | |
3400 | { | |
3401 | struct velocity_info *vptr = netdev_priv(dev); | |
3402 | ||
3403 | ecmd->tx_max_coalesced_frames = vptr->options.tx_intsup; | |
3404 | ecmd->rx_max_coalesced_frames = vptr->options.rx_intsup; | |
3405 | ||
3406 | ecmd->rx_coalesce_usecs = get_pending_timer_val(vptr->options.rxqueue_timer); | |
3407 | ecmd->tx_coalesce_usecs = get_pending_timer_val(vptr->options.txqueue_timer); | |
3408 | ||
3409 | return 0; | |
3410 | } | |
3411 | ||
3412 | static int velocity_set_coalesce(struct net_device *dev, | |
3413 | struct ethtool_coalesce *ecmd) | |
3414 | { | |
3415 | struct velocity_info *vptr = netdev_priv(dev); | |
3416 | int max_us = 0x3f * 64; | |
39c2ff43 | 3417 | unsigned long flags; |
6dfc4b95 SK |
3418 | |
3419 | /* 6 bits of */ | |
3420 | if (ecmd->tx_coalesce_usecs > max_us) | |
3421 | return -EINVAL; | |
3422 | if (ecmd->rx_coalesce_usecs > max_us) | |
3423 | return -EINVAL; | |
3424 | ||
3425 | if (ecmd->tx_max_coalesced_frames > 0xff) | |
3426 | return -EINVAL; | |
3427 | if (ecmd->rx_max_coalesced_frames > 0xff) | |
3428 | return -EINVAL; | |
3429 | ||
3430 | vptr->options.rx_intsup = ecmd->rx_max_coalesced_frames; | |
3431 | vptr->options.tx_intsup = ecmd->tx_max_coalesced_frames; | |
3432 | ||
3433 | set_pending_timer_val(&vptr->options.rxqueue_timer, | |
3434 | ecmd->rx_coalesce_usecs); | |
3435 | set_pending_timer_val(&vptr->options.txqueue_timer, | |
3436 | ecmd->tx_coalesce_usecs); | |
3437 | ||
3438 | /* Setup the interrupt suppression and queue timers */ | |
39c2ff43 | 3439 | spin_lock_irqsave(&vptr->lock, flags); |
6dfc4b95 SK |
3440 | mac_disable_int(vptr->mac_regs); |
3441 | setup_adaptive_interrupts(vptr); | |
3442 | setup_queue_timers(vptr); | |
3443 | ||
3444 | mac_write_int_mask(vptr->int_mask, vptr->mac_regs); | |
3445 | mac_clear_isr(vptr->mac_regs); | |
3446 | mac_enable_int(vptr->mac_regs); | |
39c2ff43 | 3447 | spin_unlock_irqrestore(&vptr->lock, flags); |
6dfc4b95 SK |
3448 | |
3449 | return 0; | |
3450 | } | |
3451 | ||
2cf71d2e DJ |
3452 | static const struct ethtool_ops velocity_ethtool_ops = { |
3453 | .get_settings = velocity_get_settings, | |
3454 | .set_settings = velocity_set_settings, | |
3455 | .get_drvinfo = velocity_get_drvinfo, | |
3456 | .get_wol = velocity_ethtool_get_wol, | |
3457 | .set_wol = velocity_ethtool_set_wol, | |
3458 | .get_msglevel = velocity_get_msglevel, | |
3459 | .set_msglevel = velocity_set_msglevel, | |
3460 | .get_link = velocity_get_link, | |
6dfc4b95 SK |
3461 | .get_coalesce = velocity_get_coalesce, |
3462 | .set_coalesce = velocity_set_coalesce, | |
2cf71d2e DJ |
3463 | .begin = velocity_ethtool_up, |
3464 | .complete = velocity_ethtool_down | |
3465 | }; | |
ce9f7fe3 | 3466 | |
2cf71d2e DJ |
3467 | #ifdef CONFIG_PM |
3468 | #ifdef CONFIG_INET | |
1da177e4 LT |
3469 | static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr) |
3470 | { | |
3471 | struct in_ifaddr *ifa = (struct in_ifaddr *) ptr; | |
a337499f | 3472 | struct net_device *dev = ifa->ifa_dev->dev; |
1da177e4 | 3473 | |
516b4df1 BH |
3474 | if (dev_net(dev) == &init_net && |
3475 | dev->netdev_ops == &velocity_netdev_ops) | |
3476 | velocity_get_ip(netdev_priv(dev)); | |
a337499f | 3477 | |
1da177e4 LT |
3478 | return NOTIFY_DONE; |
3479 | } | |
2cf71d2e DJ |
3480 | #endif /* CONFIG_INET */ |
3481 | #endif /* CONFIG_PM */ | |
ce9f7fe3 | 3482 | |
2cf71d2e DJ |
3483 | #if defined(CONFIG_PM) && defined(CONFIG_INET) |
3484 | static struct notifier_block velocity_inetaddr_notifier = { | |
3485 | .notifier_call = velocity_netdev_event, | |
3486 | }; | |
3487 | ||
3488 | static void velocity_register_notifier(void) | |
3489 | { | |
3490 | register_inetaddr_notifier(&velocity_inetaddr_notifier); | |
3491 | } | |
3492 | ||
3493 | static void velocity_unregister_notifier(void) | |
3494 | { | |
3495 | unregister_inetaddr_notifier(&velocity_inetaddr_notifier); | |
3496 | } | |
3497 | ||
3498 | #else | |
3499 | ||
3500 | #define velocity_register_notifier() do {} while (0) | |
3501 | #define velocity_unregister_notifier() do {} while (0) | |
3502 | ||
3503 | #endif /* defined(CONFIG_PM) && defined(CONFIG_INET) */ | |
3504 | ||
3505 | /** | |
3506 | * velocity_init_module - load time function | |
3507 | * | |
3508 | * Called when the velocity module is loaded. The PCI driver | |
3509 | * is registered with the PCI layer, and in turn will call | |
3510 | * the probe functions for each velocity adapter installed | |
3511 | * in the system. | |
3512 | */ | |
3513 | static int __init velocity_init_module(void) | |
3514 | { | |
3515 | int ret; | |
3516 | ||
3517 | velocity_register_notifier(); | |
3518 | ret = pci_register_driver(&velocity_driver); | |
3519 | if (ret < 0) | |
3520 | velocity_unregister_notifier(); | |
3521 | return ret; | |
3522 | } | |
3523 | ||
3524 | /** | |
3525 | * velocity_cleanup - module unload | |
3526 | * | |
3527 | * When the velocity hardware is unloaded this function is called. | |
3528 | * It will clean up the notifiers and the unregister the PCI | |
3529 | * driver interface for this hardware. This in turn cleans up | |
3530 | * all discovered interfaces before returning from the function | |
3531 | */ | |
3532 | static void __exit velocity_cleanup_module(void) | |
3533 | { | |
3534 | velocity_unregister_notifier(); | |
3535 | pci_unregister_driver(&velocity_driver); | |
3536 | } | |
3537 | ||
3538 | module_init(velocity_init_module); | |
3539 | module_exit(velocity_cleanup_module); |