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[deliverable/linux.git] / drivers / net / via-velocity.c
CommitLineData
1da177e4
LT		 1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
1da177e4
LT		 11 * rx_copybreak/alignment
12 * Scatter gather
13 * More testing
14 *
113aa838 15 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk>
1da177e4
LT		 16 * Additional fixes and clean up: Francois Romieu
17 *
18 * This source has not been verified for use in safety critical systems.
19 *
20 * Please direct queries about the revamped driver to the linux-kernel
21 * list not VIA.
22 *
23 * Original code:
24 *
25 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
26 * All rights reserved.
27 *
28 * This software may be redistributed and/or modified under
29 * the terms of the GNU General Public License as published by the Free
30 * Software Foundation; either version 2 of the License, or
31 * any later version.
32 *
33 * This program is distributed in the hope that it will be useful, but
34 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
35 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
36 * for more details.
37 *
38 * Author: Chuang Liang-Shing, AJ Jiang
39 *
40 * Date: Jan 24, 2003
41 *
42 * MODULE_LICENSE("GPL");
43 *
44 */
45
46
47#include <linux/module.h>
48#include <linux/types.h>
1da177e4
LT		 49#include <linux/init.h>
50#include <linux/mm.h>
51#include <linux/errno.h>
52#include <linux/ioport.h>
53#include <linux/pci.h>
54#include <linux/kernel.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/skbuff.h>
58#include <linux/delay.h>
59#include <linux/timer.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
1da177e4
LT		 62#include <linux/string.h>
63#include <linux/wait.h>
64#include <asm/io.h>
65#include <linux/if.h>
1da177e4
LT		 66#include <asm/uaccess.h>
67#include <linux/proc_fs.h>
68#include <linux/inetdevice.h>
69#include <linux/reboot.h>
70#include <linux/ethtool.h>
71#include <linux/mii.h>
72#include <linux/in.h>
73#include <linux/if_arp.h>
501e4d24 74#include <linux/if_vlan.h>
1da177e4
LT		 75#include <linux/ip.h>
76#include <linux/tcp.h>
77#include <linux/udp.h>
78#include <linux/crc-ccitt.h>
79#include <linux/crc32.h>
80
81#include "via-velocity.h"
82
83
84static int velocity_nics = 0;
85static int msglevel = MSG_LEVEL_INFO;
86
01faccbf
SH		 87/**
88 * mac_get_cam_mask - Read a CAM mask
89 * @regs: register block for this velocity
90 * @mask: buffer to store mask
91 *
92 * Fetch the mask bits of the selected CAM and store them into the
93 * provided mask buffer.
94 */
95
96static void mac_get_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
97{
98 int i;
99
100 /* Select CAM mask */
101 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
102
103 writeb(0, &regs->CAMADDR);
104
105 /* read mask */
106 for (i = 0; i < 8; i++)
107 *mask++ = readb(&(regs->MARCAM[i]));
108
109 /* disable CAMEN */
110 writeb(0, &regs->CAMADDR);
111
112 /* Select mar */
113 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
114
115}
116
117
118/**
119 * mac_set_cam_mask - Set a CAM mask
120 * @regs: register block for this velocity
121 * @mask: CAM mask to load
122 *
123 * Store a new mask into a CAM
124 */
125
126static void mac_set_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
127{
128 int i;
129 /* Select CAM mask */
130 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
131
132 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
133
134 for (i = 0; i < 8; i++) {
135 writeb(*mask++, &(regs->MARCAM[i]));
136 }
137 /* disable CAMEN */
138 writeb(0, &regs->CAMADDR);
139
140 /* Select mar */
141 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
142}
143
144static void mac_set_vlan_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
145{
146 int i;
147 /* Select CAM mask */
148 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
149
150 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
151
152 for (i = 0; i < 8; i++) {
153 writeb(*mask++, &(regs->MARCAM[i]));
154 }
155 /* disable CAMEN */
156 writeb(0, &regs->CAMADDR);
157
158 /* Select mar */
159 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
160}
161
162/**
163 * mac_set_cam - set CAM data
164 * @regs: register block of this velocity
165 * @idx: Cam index
166 * @addr: 2 or 6 bytes of CAM data
167 *
168 * Load an address or vlan tag into a CAM
169 */
170
171static void mac_set_cam(struct mac_regs __iomem * regs, int idx, const u8 *addr)
172{
173 int i;
174
175 /* Select CAM mask */
176 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
177
178 idx &= (64 - 1);
179
180 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
181
182 for (i = 0; i < 6; i++) {
183 writeb(*addr++, &(regs->MARCAM[i]));
184 }
185 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
186
187 udelay(10);
188
189 writeb(0, &regs->CAMADDR);
190
191 /* Select mar */
192 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
193}
194
195static void mac_set_vlan_cam(struct mac_regs __iomem * regs, int idx,
196 const u8 *addr)
197{
198
199 /* Select CAM mask */
200 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
201
202 idx &= (64 - 1);
203
204 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
205 writew(*((u16 *) addr), &regs->MARCAM[0]);
206
207 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
208
209 udelay(10);
210
211 writeb(0, &regs->CAMADDR);
212
213 /* Select mar */
214 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
215}
216
217
218/**
219 * mac_wol_reset - reset WOL after exiting low power
220 * @regs: register block of this velocity
221 *
222 * Called after we drop out of wake on lan mode in order to
223 * reset the Wake on lan features. This function doesn't restore
224 * the rest of the logic from the result of sleep/wakeup
225 */
226
227static void mac_wol_reset(struct mac_regs __iomem * regs)
228{
229
230 /* Turn off SWPTAG right after leaving power mode */
231 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
232 /* clear sticky bits */
233 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
234
235 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
236 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
237 /* disable force PME-enable */
238 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
239 /* disable power-event config bit */
240 writew(0xFFFF, &regs->WOLCRClr);
241 /* clear power status */
242 writew(0xFFFF, &regs->WOLSRClr);
243}
1da177e4
LT		 244
245static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
7282d491 246static const struct ethtool_ops velocity_ethtool_ops;
1da177e4
LT		 247
248/*
249 Define module options
250*/
251
252MODULE_AUTHOR("VIA Networking Technologies, Inc.");
253MODULE_LICENSE("GPL");
254MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
255
256#define VELOCITY_PARAM(N,D) \
257 static int N[MAX_UNITS]=OPTION_DEFAULT;\
258 module_param_array(N, int, NULL, 0); \
259 MODULE_PARM_DESC(N, D);
260
261#define RX_DESC_MIN 64
262#define RX_DESC_MAX 255
263#define RX_DESC_DEF 64
264VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
265
266#define TX_DESC_MIN 16
267#define TX_DESC_MAX 256
268#define TX_DESC_DEF 64
269VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
270
1da177e4
LT		 271#define RX_THRESH_MIN 0
272#define RX_THRESH_MAX 3
273#define RX_THRESH_DEF 0
274/* rx_thresh[] is used for controlling the receive fifo threshold.
275 0: indicate the rxfifo threshold is 128 bytes.
276 1: indicate the rxfifo threshold is 512 bytes.
277 2: indicate the rxfifo threshold is 1024 bytes.
278 3: indicate the rxfifo threshold is store & forward.
279*/
280VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
281
282#define DMA_LENGTH_MIN 0
283#define DMA_LENGTH_MAX 7
284#define DMA_LENGTH_DEF 0
285
286/* DMA_length[] is used for controlling the DMA length
287 0: 8 DWORDs
288 1: 16 DWORDs
289 2: 32 DWORDs
290 3: 64 DWORDs
291 4: 128 DWORDs
292 5: 256 DWORDs
293 6: SF(flush till emply)
294 7: SF(flush till emply)
295*/
296VELOCITY_PARAM(DMA_length, "DMA length");
297
1da177e4
LT		 298#define IP_ALIG_DEF 0
299/* IP_byte_align[] is used for IP header DWORD byte aligned
300 0: indicate the IP header won't be DWORD byte aligned.(Default) .
301 1: indicate the IP header will be DWORD byte aligned.
302 In some enviroment, the IP header should be DWORD byte aligned,
303 or the packet will be droped when we receive it. (eg: IPVS)
304*/
305VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
306
307#define TX_CSUM_DEF 1
308/* txcsum_offload[] is used for setting the checksum offload ability of NIC.
309 (We only support RX checksum offload now)
310 0: disable csum_offload[checksum offload
311 1: enable checksum offload. (Default)
312*/
313VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
314
315#define FLOW_CNTL_DEF 1
316#define FLOW_CNTL_MIN 1
317#define FLOW_CNTL_MAX 5
318
319/* flow_control[] is used for setting the flow control ability of NIC.
320 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
321 2: enable TX flow control.
322 3: enable RX flow control.
323 4: enable RX/TX flow control.
324 5: disable
325*/
326VELOCITY_PARAM(flow_control, "Enable flow control ability");
327
328#define MED_LNK_DEF 0
329#define MED_LNK_MIN 0
330#define MED_LNK_MAX 4
331/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
332 0: indicate autonegotiation for both speed and duplex mode
333 1: indicate 100Mbps half duplex mode
334 2: indicate 100Mbps full duplex mode
335 3: indicate 10Mbps half duplex mode
336 4: indicate 10Mbps full duplex mode
337
338 Note:
339 if EEPROM have been set to the force mode, this option is ignored
340 by driver.
341*/
342VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
343
344#define VAL_PKT_LEN_DEF 0
345/* ValPktLen[] is used for setting the checksum offload ability of NIC.
346 0: Receive frame with invalid layer 2 length (Default)
347 1: Drop frame with invalid layer 2 length
348*/
349VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
350
351#define WOL_OPT_DEF 0
352#define WOL_OPT_MIN 0
353#define WOL_OPT_MAX 7
354/* wol_opts[] is used for controlling wake on lan behavior.
355 0: Wake up if recevied a magic packet. (Default)
356 1: Wake up if link status is on/off.
357 2: Wake up if recevied an arp packet.
358 4: Wake up if recevied any unicast packet.
359 Those value can be sumed up to support more than one option.
360*/
361VELOCITY_PARAM(wol_opts, "Wake On Lan options");
362
363#define INT_WORKS_DEF 20
364#define INT_WORKS_MIN 10
365#define INT_WORKS_MAX 64
366
367VELOCITY_PARAM(int_works, "Number of packets per interrupt services");
368
369static int rx_copybreak = 200;
370module_param(rx_copybreak, int, 0644);
371MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
372
cabb7667
JG		 373static void velocity_init_info(struct pci_dev *pdev, struct velocity_info *vptr,
374 const struct velocity_info_tbl *info);
1da177e4
LT		 375static int velocity_get_pci_info(struct velocity_info *, struct pci_dev *pdev);
376static void velocity_print_info(struct velocity_info *vptr);
377static int velocity_open(struct net_device *dev);
378static int velocity_change_mtu(struct net_device *dev, int mtu);
379static int velocity_xmit(struct sk_buff *skb, struct net_device *dev);
7d12e780 380static int velocity_intr(int irq, void *dev_instance);
1da177e4
LT		 381static void velocity_set_multi(struct net_device *dev);
382static struct net_device_stats *velocity_get_stats(struct net_device *dev);
383static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
384static int velocity_close(struct net_device *dev);
385static int velocity_receive_frame(struct velocity_info *, int idx);
386static int velocity_alloc_rx_buf(struct velocity_info *, int idx);
387static void velocity_free_rd_ring(struct velocity_info *vptr);
388static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *);
389static int velocity_soft_reset(struct velocity_info *vptr);
390static void mii_init(struct velocity_info *vptr, u32 mii_status);
8a22dddb 391static u32 velocity_get_link(struct net_device *dev);
1da177e4
LT		 392static u32 velocity_get_opt_media_mode(struct velocity_info *vptr);
393static void velocity_print_link_status(struct velocity_info *vptr);
394static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs);
395static void velocity_shutdown(struct velocity_info *vptr);
396static void enable_flow_control_ability(struct velocity_info *vptr);
397static void enable_mii_autopoll(struct mac_regs __iomem * regs);
398static int velocity_mii_read(struct mac_regs __iomem *, u8 byIdx, u16 * pdata);
399static int velocity_mii_write(struct mac_regs __iomem *, u8 byMiiAddr, u16 data);
400static u32 mii_check_media_mode(struct mac_regs __iomem * regs);
401static u32 check_connection_type(struct mac_regs __iomem * regs);
402static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status);
403
404#ifdef CONFIG_PM
405
406static int velocity_suspend(struct pci_dev *pdev, pm_message_t state);
407static int velocity_resume(struct pci_dev *pdev);
408
ce9f7fe3
RD		 409static DEFINE_SPINLOCK(velocity_dev_list_lock);
410static LIST_HEAD(velocity_dev_list);
411
412#endif
413
414#if defined(CONFIG_PM) && defined(CONFIG_INET)
415
1da177e4
LT		 416static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr);
417
418static struct notifier_block velocity_inetaddr_notifier = {
419 .notifier_call = velocity_netdev_event,
420};
421
1da177e4
LT		 422static void velocity_register_notifier(void)
423{
424 register_inetaddr_notifier(&velocity_inetaddr_notifier);
425}
426
427static void velocity_unregister_notifier(void)
428{
429 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
430}
431
ce9f7fe3 432#else
1da177e4
LT		 433
434#define velocity_register_notifier() do {} while (0)
435#define velocity_unregister_notifier() do {} while (0)
436
ce9f7fe3 437#endif
1da177e4
LT		 438
439/*
440 * Internal board variants. At the moment we have only one
441 */
442
4f14b92f 443static struct velocity_info_tbl chip_info_table[] = {
cabb7667
JG		 444 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
445 { }
1da177e4
LT		 446};
447
448/*
449 * Describe the PCI device identifiers that we support in this
450 * device driver. Used for hotplug autoloading.
451 */
452
e54f4893
JG		 453static const struct pci_device_id velocity_id_table[] __devinitdata = {
454 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
455 { }
1da177e4
LT		 456};
457
458MODULE_DEVICE_TABLE(pci, velocity_id_table);
459
460/**
461 * get_chip_name - identifier to name
462 * @id: chip identifier
463 *
464 * Given a chip identifier return a suitable description. Returns
465 * a pointer a static string valid while the driver is loaded.
466 */
467
01faccbf 468static const char __devinit *get_chip_name(enum chip_type chip_id)
1da177e4
LT		 469{
470 int i;
471 for (i = 0; chip_info_table[i].name != NULL; i++)
472 if (chip_info_table[i].chip_id == chip_id)
473 break;
474 return chip_info_table[i].name;
475}
476
477/**
478 * velocity_remove1 - device unplug
479 * @pdev: PCI device being removed
480 *
481 * Device unload callback. Called on an unplug or on module
482 * unload for each active device that is present. Disconnects
483 * the device from the network layer and frees all the resources
484 */
485
486static void __devexit velocity_remove1(struct pci_dev *pdev)
487{
488 struct net_device *dev = pci_get_drvdata(pdev);
8ab6f3f7 489 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 490
491#ifdef CONFIG_PM
492 unsigned long flags;
493
494 spin_lock_irqsave(&velocity_dev_list_lock, flags);
495 if (!list_empty(&velocity_dev_list))
496 list_del(&vptr->list);
497 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
498#endif
499 unregister_netdev(dev);
500 iounmap(vptr->mac_regs);
501 pci_release_regions(pdev);
502 pci_disable_device(pdev);
503 pci_set_drvdata(pdev, NULL);
504 free_netdev(dev);
505
506 velocity_nics--;
507}
508
509/**
510 * velocity_set_int_opt - parser for integer options
511 * @opt: pointer to option value
512 * @val: value the user requested (or -1 for default)
513 * @min: lowest value allowed
514 * @max: highest value allowed
515 * @def: default value
516 * @name: property name
517 * @dev: device name
518 *
519 * Set an integer property in the module options. This function does
520 * all the verification and checking as well as reporting so that
521 * we don't duplicate code for each option.
522 */
523
07b5f6a6 524static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, const char *devname)
1da177e4
LT		 525{
526 if (val == -1)
527 *opt = def;
528 else if (val < min || val > max) {
529 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
530 devname, name, min, max);
531 *opt = def;
532 } else {
533 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
534 devname, name, val);
535 *opt = val;
536 }
537}
538
539/**
540 * velocity_set_bool_opt - parser for boolean options
541 * @opt: pointer to option value
542 * @val: value the user requested (or -1 for default)
543 * @def: default value (yes/no)
544 * @flag: numeric value to set for true.
545 * @name: property name
546 * @dev: device name
547 *
548 * Set a boolean property in the module options. This function does
549 * all the verification and checking as well as reporting so that
550 * we don't duplicate code for each option.
551 */
552
07b5f6a6 553static void __devinit velocity_set_bool_opt(u32 * opt, int val, int def, u32 flag, char *name, const char *devname)
1da177e4
LT		 554{
555 (*opt) &= (~flag);
556 if (val == -1)
557 *opt |= (def ? flag : 0);
558 else if (val < 0 || val > 1) {
6aa20a22 559 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT		 560 devname, name);
561 *opt |= (def ? flag : 0);
562 } else {
6aa20a22 563 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT		 564 devname, name, val ? "TRUE" : "FALSE");
565 *opt |= (val ? flag : 0);
566 }
567}
568
569/**
570 * velocity_get_options - set options on device
571 * @opts: option structure for the device
572 * @index: index of option to use in module options array
573 * @devname: device name
574 *
575 * Turn the module and command options into a single structure
576 * for the current device
577 */
578
07b5f6a6 579static void __devinit velocity_get_options(struct velocity_opt *opts, int index, const char *devname)
1da177e4
LT		 580{
581
582 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
583 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
584 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
585 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
501e4d24 586
1da177e4
LT		 587 velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname);
588 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
589 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
590 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
591 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
592 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
593 velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname);
594 opts->numrx = (opts->numrx & ~3);
595}
596
597/**
598 * velocity_init_cam_filter - initialise CAM
599 * @vptr: velocity to program
600 *
601 * Initialize the content addressable memory used for filters. Load
602 * appropriately according to the presence of VLAN
603 */
604
605static void velocity_init_cam_filter(struct velocity_info *vptr)
606{
607 struct mac_regs __iomem * regs = vptr->mac_regs;
608
609 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
610 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
611 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
612
613 /* Disable all CAMs */
614 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
615 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
01faccbf
SH		 616 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
617 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4 618
d4f73c8e 619 /* Enable VCAMs */
501e4d24 620 if (vptr->vlgrp) {
d4f73c8e
FR		 621 unsigned int vid, i = 0;
622
623 if (!vlan_group_get_device(vptr->vlgrp, 0))
624 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
501e4d24 625
d4f73c8e
FR		 626 for (vid = 1; (vid < VLAN_VID_MASK); vid++) {
627 if (vlan_group_get_device(vptr->vlgrp, vid)) {
628 mac_set_vlan_cam(regs, i, (u8 *) &vid);
629 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
630 if (++i >= VCAM_SIZE)
631 break;
501e4d24
SH		 632 }
633 }
01faccbf 634 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
1da177e4
LT		 635 }
636}
637
d4f73c8e
FR		 638static void velocity_vlan_rx_register(struct net_device *dev,
639 struct vlan_group *grp)
640{
641 struct velocity_info *vptr = netdev_priv(dev);
642
643 vptr->vlgrp = grp;
644}
645
501e4d24
SH		 646static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
647{
648 struct velocity_info *vptr = netdev_priv(dev);
649
650 spin_lock_irq(&vptr->lock);
651 velocity_init_cam_filter(vptr);
652 spin_unlock_irq(&vptr->lock);
653}
654
655static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
656{
657 struct velocity_info *vptr = netdev_priv(dev);
658
659 spin_lock_irq(&vptr->lock);
660 vlan_group_set_device(vptr->vlgrp, vid, NULL);
661 velocity_init_cam_filter(vptr);
662 spin_unlock_irq(&vptr->lock);
663}
664
3c4dc711
FR		 665static void velocity_init_rx_ring_indexes(struct velocity_info *vptr)
666{
667 vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0;
668}
501e4d24 669
1da177e4
LT		 670/**
671 * velocity_rx_reset - handle a receive reset
672 * @vptr: velocity we are resetting
673 *
674 * Reset the ownership and status for the receive ring side.
675 * Hand all the receive queue to the NIC.
676 */
677
678static void velocity_rx_reset(struct velocity_info *vptr)
679{
680
681 struct mac_regs __iomem * regs = vptr->mac_regs;
682 int i;
683
3c4dc711 684 velocity_init_rx_ring_indexes(vptr);
1da177e4
LT		 685
686 /*
687 * Init state, all RD entries belong to the NIC
688 */
689 for (i = 0; i < vptr->options.numrx; ++i)
0fe9f15e 690 vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 691
692 writew(vptr->options.numrx, &regs->RBRDU);
0fe9f15e 693 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1da177e4
LT		 694 writew(0, &regs->RDIdx);
695 writew(vptr->options.numrx - 1, &regs->RDCSize);
696}
697
698/**
699 * velocity_init_registers - initialise MAC registers
700 * @vptr: velocity to init
701 * @type: type of initialisation (hot or cold)
702 *
703 * Initialise the MAC on a reset or on first set up on the
704 * hardware.
705 */
706
6aa20a22 707static void velocity_init_registers(struct velocity_info *vptr,
1da177e4
LT		 708 enum velocity_init_type type)
709{
710 struct mac_regs __iomem * regs = vptr->mac_regs;
711 int i, mii_status;
712
713 mac_wol_reset(regs);
714
715 switch (type) {
716 case VELOCITY_INIT_RESET:
717 case VELOCITY_INIT_WOL:
718
719 netif_stop_queue(vptr->dev);
720
721 /*
722 * Reset RX to prevent RX pointer not on the 4X location
723 */
724 velocity_rx_reset(vptr);
725 mac_rx_queue_run(regs);
726 mac_rx_queue_wake(regs);
727
728 mii_status = velocity_get_opt_media_mode(vptr);
729 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
730 velocity_print_link_status(vptr);
731 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
732 netif_wake_queue(vptr->dev);
733 }
734
735 enable_flow_control_ability(vptr);
736
737 mac_clear_isr(regs);
738 writel(CR0_STOP, &regs->CR0Clr);
6aa20a22 739 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1da177e4
LT		 740 &regs->CR0Set);
741
742 break;
743
744 case VELOCITY_INIT_COLD:
745 default:
746 /*
747 * Do reset
748 */
749 velocity_soft_reset(vptr);
750 mdelay(5);
751
752 mac_eeprom_reload(regs);
753 for (i = 0; i < 6; i++) {
754 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
755 }
756 /*
757 * clear Pre_ACPI bit.
758 */
759 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
760 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
761 mac_set_dma_length(regs, vptr->options.DMA_length);
762
763 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
764 /*
765 * Back off algorithm use original IEEE standard
766 */
767 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
768
769 /*
770 * Init CAM filter
771 */
772 velocity_init_cam_filter(vptr);
773
774 /*
775 * Set packet filter: Receive directed and broadcast address
776 */
777 velocity_set_multi(vptr->dev);
778
779 /*
780 * Enable MII auto-polling
781 */
782 enable_mii_autopoll(regs);
783
784 vptr->int_mask = INT_MASK_DEF;
785
0fe9f15e 786 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1da177e4
LT		 787 writew(vptr->options.numrx - 1, &regs->RDCSize);
788 mac_rx_queue_run(regs);
789 mac_rx_queue_wake(regs);
790
791 writew(vptr->options.numtx - 1, &regs->TDCSize);
792
0fe9f15e
FR		 793 for (i = 0; i < vptr->tx.numq; i++) {
794 writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
1da177e4
LT		 795 mac_tx_queue_run(regs, i);
796 }
797
798 init_flow_control_register(vptr);
799
800 writel(CR0_STOP, &regs->CR0Clr);
801 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
802
803 mii_status = velocity_get_opt_media_mode(vptr);
804 netif_stop_queue(vptr->dev);
805
806 mii_init(vptr, mii_status);
807
808 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
809 velocity_print_link_status(vptr);
810 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
811 netif_wake_queue(vptr->dev);
812 }
813
814 enable_flow_control_ability(vptr);
815 mac_hw_mibs_init(regs);
816 mac_write_int_mask(vptr->int_mask, regs);
817 mac_clear_isr(regs);
818
819 }
820}
821
822/**
823 * velocity_soft_reset - soft reset
824 * @vptr: velocity to reset
825 *
826 * Kick off a soft reset of the velocity adapter and then poll
827 * until the reset sequence has completed before returning.
828 */
829
830static int velocity_soft_reset(struct velocity_info *vptr)
831{
832 struct mac_regs __iomem * regs = vptr->mac_regs;
833 int i = 0;
834
835 writel(CR0_SFRST, &regs->CR0Set);
836
837 for (i = 0; i < W_MAX_TIMEOUT; i++) {
838 udelay(5);
839 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
840 break;
841 }
842
843 if (i == W_MAX_TIMEOUT) {
844 writel(CR0_FORSRST, &regs->CR0Set);
845 /* FIXME: PCI POSTING */
846 /* delay 2ms */
847 mdelay(2);
848 }
849 return 0;
850}
851
39a11bd9
SH		 852static const struct net_device_ops velocity_netdev_ops = {
853 .ndo_open = velocity_open,
854 .ndo_stop = velocity_close,
00829823 855 .ndo_start_xmit = velocity_xmit,
39a11bd9
SH		 856 .ndo_get_stats = velocity_get_stats,
857 .ndo_validate_addr = eth_validate_addr,
fe96aaa1 858 .ndo_set_mac_address = eth_mac_addr,
39a11bd9
SH		 859 .ndo_set_multicast_list = velocity_set_multi,
860 .ndo_change_mtu = velocity_change_mtu,
861 .ndo_do_ioctl = velocity_ioctl,
862 .ndo_vlan_rx_add_vid = velocity_vlan_rx_add_vid,
863 .ndo_vlan_rx_kill_vid = velocity_vlan_rx_kill_vid,
864 .ndo_vlan_rx_register = velocity_vlan_rx_register,
865};
866
1da177e4
LT		 867/**
868 * velocity_found1 - set up discovered velocity card
869 * @pdev: PCI device
870 * @ent: PCI device table entry that matched
871 *
872 * Configure a discovered adapter from scratch. Return a negative
873 * errno error code on failure paths.
874 */
875
876static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
877{
878 static int first = 1;
879 struct net_device *dev;
880 int i;
07b5f6a6 881 const char *drv_string;
cabb7667 882 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
1da177e4
LT		 883 struct velocity_info *vptr;
884 struct mac_regs __iomem * regs;
885 int ret = -ENOMEM;
886
e54f4893
JG		 887 /* FIXME: this driver, like almost all other ethernet drivers,
888 * can support more than MAX_UNITS.
889 */
1da177e4 890 if (velocity_nics >= MAX_UNITS) {
6aa20a22 891 dev_notice(&pdev->dev, "already found %d NICs.\n",
e54f4893 892 velocity_nics);
1da177e4
LT		 893 return -ENODEV;
894 }
895
896 dev = alloc_etherdev(sizeof(struct velocity_info));
e54f4893 897 if (!dev) {
9b91cf9d 898 dev_err(&pdev->dev, "allocate net device failed.\n");
1da177e4
LT		 899 goto out;
900 }
6aa20a22 901
1da177e4 902 /* Chain it all together */
6aa20a22 903
1da177e4 904 SET_NETDEV_DEV(dev, &pdev->dev);
8ab6f3f7 905 vptr = netdev_priv(dev);
1da177e4
LT		 906
907
908 if (first) {
6aa20a22 909 printk(KERN_INFO "%s Ver. %s\n",
1da177e4
LT		 910 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
911 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
912 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
913 first = 0;
914 }
915
916 velocity_init_info(pdev, vptr, info);
917
918 vptr->dev = dev;
919
920 dev->irq = pdev->irq;
921
922 ret = pci_enable_device(pdev);
6aa20a22 923 if (ret < 0)
1da177e4
LT		 924 goto err_free_dev;
925
926 ret = velocity_get_pci_info(vptr, pdev);
927 if (ret < 0) {
e54f4893 928 /* error message already printed */
1da177e4
LT		 929 goto err_disable;
930 }
931
932 ret = pci_request_regions(pdev, VELOCITY_NAME);
933 if (ret < 0) {
9b91cf9d 934 dev_err(&pdev->dev, "No PCI resources.\n");
1da177e4
LT		 935 goto err_disable;
936 }
937
cabb7667 938 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
1da177e4
LT		 939 if (regs == NULL) {
940 ret = -EIO;
941 goto err_release_res;
942 }
943
944 vptr->mac_regs = regs;
945
946 mac_wol_reset(regs);
947
948 dev->base_addr = vptr->ioaddr;
949
950 for (i = 0; i < 6; i++)
951 dev->dev_addr[i] = readb(&regs->PAR[i]);
952
953
07b5f6a6
SH		 954 drv_string = dev_driver_string(&pdev->dev);
955
956 velocity_get_options(&vptr->options, velocity_nics, drv_string);
1da177e4 957
6aa20a22 958 /*
1da177e4
LT		 959 * Mask out the options cannot be set to the chip
960 */
6aa20a22 961
1da177e4
LT		 962 vptr->options.flags &= info->flags;
963
964 /*
965 * Enable the chip specified capbilities
966 */
6aa20a22 967
1da177e4
LT		 968 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
969
970 vptr->wol_opts = vptr->options.wol_opts;
971 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
972
973 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
974
975 dev->irq = pdev->irq;
39a11bd9 976 dev->netdev_ops = &velocity_netdev_ops;
1da177e4 977 dev->ethtool_ops = &velocity_ethtool_ops;
501e4d24 978
1da177e4
LT		 979#ifdef VELOCITY_ZERO_COPY_SUPPORT
980 dev->features |= NETIF_F_SG;
981#endif
d4f73c8e
FR		 982 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
983 NETIF_F_HW_VLAN_RX;
1da177e4 984
501e4d24 985 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM)
9f3f46b5 986 dev->features |= NETIF_F_IP_CSUM;
1da177e4
LT		 987
988 ret = register_netdev(dev);
989 if (ret < 0)
990 goto err_iounmap;
991
8a22dddb
FR		 992 if (velocity_get_link(dev))
993 netif_carrier_off(dev);
994
1da177e4
LT		 995 velocity_print_info(vptr);
996 pci_set_drvdata(pdev, dev);
6aa20a22 997
1da177e4 998 /* and leave the chip powered down */
6aa20a22 999
1da177e4
LT		 1000 pci_set_power_state(pdev, PCI_D3hot);
1001#ifdef CONFIG_PM
1002 {
1003 unsigned long flags;
1004
1005 spin_lock_irqsave(&velocity_dev_list_lock, flags);
1006 list_add(&vptr->list, &velocity_dev_list);
1007 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
1008 }
1009#endif
1010 velocity_nics++;
1011out:
1012 return ret;
1013
1014err_iounmap:
1015 iounmap(regs);
1016err_release_res:
1017 pci_release_regions(pdev);
1018err_disable:
1019 pci_disable_device(pdev);
1020err_free_dev:
1021 free_netdev(dev);
1022 goto out;
1023}
1024
1025/**
1026 * velocity_print_info - per driver data
1027 * @vptr: velocity
1028 *
1029 * Print per driver data as the kernel driver finds Velocity
1030 * hardware
1031 */
1032
1033static void __devinit velocity_print_info(struct velocity_info *vptr)
1034{
1035 struct net_device *dev = vptr->dev;
1036
1037 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
6aa20a22
JG		 1038 printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
1039 dev->name,
1040 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1da177e4
LT		 1041 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1042}
1043
1044/**
1045 * velocity_init_info - init private data
1046 * @pdev: PCI device
1047 * @vptr: Velocity info
1048 * @info: Board type
1049 *
1050 * Set up the initial velocity_info struct for the device that has been
1051 * discovered.
1052 */
1053
cabb7667
JG		 1054static void __devinit velocity_init_info(struct pci_dev *pdev,
1055 struct velocity_info *vptr,
1056 const struct velocity_info_tbl *info)
1da177e4
LT		 1057{
1058 memset(vptr, 0, sizeof(struct velocity_info));
1059
1060 vptr->pdev = pdev;
1061 vptr->chip_id = info->chip_id;
0fe9f15e 1062 vptr->tx.numq = info->txqueue;
1da177e4
LT		 1063 vptr->multicast_limit = MCAM_SIZE;
1064 spin_lock_init(&vptr->lock);
1065 INIT_LIST_HEAD(&vptr->list);
1066}
1067
1068/**
1069 * velocity_get_pci_info - retrieve PCI info for device
1070 * @vptr: velocity device
1071 * @pdev: PCI device it matches
1072 *
1073 * Retrieve the PCI configuration space data that interests us from
1074 * the kernel PCI layer
1075 */
1076
1077static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
1078{
44c10138 1079 vptr->rev_id = pdev->revision;
6aa20a22 1080
1da177e4
LT		 1081 pci_set_master(pdev);
1082
1083 vptr->ioaddr = pci_resource_start(pdev, 0);
1084 vptr->memaddr = pci_resource_start(pdev, 1);
6aa20a22 1085
e54f4893 1086 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
9b91cf9d 1087 dev_err(&pdev->dev,
e54f4893 1088 "region #0 is not an I/O resource, aborting.\n");
1da177e4
LT		 1089 return -EINVAL;
1090 }
1091
e54f4893 1092 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
9b91cf9d 1093 dev_err(&pdev->dev,
e54f4893 1094 "region #1 is an I/O resource, aborting.\n");
1da177e4
LT		 1095 return -EINVAL;
1096 }
1097
cabb7667 1098 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
9b91cf9d 1099 dev_err(&pdev->dev, "region #1 is too small.\n");
1da177e4
LT		 1100 return -EINVAL;
1101 }
1102 vptr->pdev = pdev;
1103
1104 return 0;
1105}
1106
1107/**
3c4dc711 1108 * velocity_init_dma_rings - set up DMA rings
1da177e4
LT		 1109 * @vptr: Velocity to set up
1110 *
1111 * Allocate PCI mapped DMA rings for the receive and transmit layer
1112 * to use.
1113 */
1114
3c4dc711 1115static int velocity_init_dma_rings(struct velocity_info *vptr)
1da177e4 1116{
8ac53afc
FR		 1117 struct velocity_opt *opt = &vptr->options;
1118 const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
1119 const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
1120 struct pci_dev *pdev = vptr->pdev;
1da177e4 1121 dma_addr_t pool_dma;
8ac53afc
FR		 1122 void *pool;
1123 unsigned int i;
1da177e4
LT		 1124
1125 /*
8ac53afc
FR		 1126 * Allocate all RD/TD rings a single pool.
1127 *
1da177e4
LT		 1128 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1129 * alignment
1130 */
0fe9f15e 1131 pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq +
8ac53afc
FR		 1132 rx_ring_size, &pool_dma);
1133 if (!pool) {
1134 dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
1135 vptr->dev->name);
1da177e4
LT		 1136 return -ENOMEM;
1137 }
1138
0fe9f15e
FR		 1139 vptr->rx.ring = pool;
1140 vptr->rx.pool_dma = pool_dma;
1da177e4 1141
8ac53afc
FR		 1142 pool += rx_ring_size;
1143 pool_dma += rx_ring_size;
1da177e4 1144
0fe9f15e
FR		 1145 for (i = 0; i < vptr->tx.numq; i++) {
1146 vptr->tx.rings[i] = pool;
1147 vptr->tx.pool_dma[i] = pool_dma;
8ac53afc
FR		 1148 pool += tx_ring_size;
1149 pool_dma += tx_ring_size;
1da177e4 1150 }
8ac53afc 1151
1da177e4
LT		 1152 return 0;
1153}
1154
1155/**
3c4dc711 1156 * velocity_free_dma_rings - free PCI ring pointers
1da177e4
LT		 1157 * @vptr: Velocity to free from
1158 *
1159 * Clean up the PCI ring buffers allocated to this velocity.
1160 */
1161
3c4dc711 1162static void velocity_free_dma_rings(struct velocity_info *vptr)
1da177e4 1163{
580a6902 1164 const int size = vptr->options.numrx * sizeof(struct rx_desc) +
0fe9f15e 1165 vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq;
1da177e4 1166
0fe9f15e 1167 pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma);
1da177e4
LT		 1168}
1169
28133176 1170static void velocity_give_many_rx_descs(struct velocity_info *vptr)
1da177e4
LT		 1171{
1172 struct mac_regs __iomem *regs = vptr->mac_regs;
1173 int avail, dirty, unusable;
1174
1175 /*
1176 * RD number must be equal to 4X per hardware spec
1177 * (programming guide rev 1.20, p.13)
1178 */
0fe9f15e 1179 if (vptr->rx.filled < 4)
1da177e4
LT		 1180 return;
1181
1182 wmb();
1183
0fe9f15e
FR		 1184 unusable = vptr->rx.filled & 0x0003;
1185 dirty = vptr->rx.dirty - unusable;
1186 for (avail = vptr->rx.filled & 0xfffc; avail; avail--) {
1da177e4 1187 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
0fe9f15e 1188 vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 1189 }
1190
0fe9f15e
FR		 1191 writew(vptr->rx.filled & 0xfffc, &regs->RBRDU);
1192 vptr->rx.filled = unusable;
1da177e4
LT		 1193}
1194
1195static int velocity_rx_refill(struct velocity_info *vptr)
1196{
0fe9f15e 1197 int dirty = vptr->rx.dirty, done = 0;
1da177e4
LT		 1198
1199 do {
0fe9f15e 1200 struct rx_desc *rd = vptr->rx.ring + dirty;
1da177e4
LT		 1201
1202 /* Fine for an all zero Rx desc at init time as well */
4a51c0d0 1203 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1204 break;
1205
0fe9f15e 1206 if (!vptr->rx.info[dirty].skb) {
28133176 1207 if (velocity_alloc_rx_buf(vptr, dirty) < 0)
1da177e4
LT		 1208 break;
1209 }
1210 done++;
6aa20a22 1211 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
0fe9f15e 1212 } while (dirty != vptr->rx.curr);
1da177e4
LT		 1213
1214 if (done) {
0fe9f15e
FR		 1215 vptr->rx.dirty = dirty;
1216 vptr->rx.filled += done;
1da177e4
LT		 1217 }
1218
28133176 1219 return done;
1da177e4
LT		 1220}
1221
9088d9a4
FR		 1222static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
1223{
0fe9f15e 1224 vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
9088d9a4
FR		 1225}
1226
1da177e4
LT		 1227/**
1228 * velocity_init_rd_ring - set up receive ring
1229 * @vptr: velocity to configure
1230 *
1231 * Allocate and set up the receive buffers for each ring slot and
1232 * assign them to the network adapter.
1233 */
1234
1235static int velocity_init_rd_ring(struct velocity_info *vptr)
1236{
28133176 1237 int ret = -ENOMEM;
48f6b053 1238
0fe9f15e 1239 vptr->rx.info = kcalloc(vptr->options.numrx,
ae94607d 1240 sizeof(struct velocity_rd_info), GFP_KERNEL);
0fe9f15e 1241 if (!vptr->rx.info)
28133176 1242 goto out;
1da177e4 1243
3c4dc711 1244 velocity_init_rx_ring_indexes(vptr);
1da177e4 1245
28133176 1246 if (velocity_rx_refill(vptr) != vptr->options.numrx) {
1da177e4
LT		 1247 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1248 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1249 velocity_free_rd_ring(vptr);
28133176 1250 goto out;
1da177e4 1251 }
ae94607d 1252
28133176
FR		 1253 ret = 0;
1254out:
1da177e4
LT		 1255 return ret;
1256}
1257
1258/**
1259 * velocity_free_rd_ring - free receive ring
1260 * @vptr: velocity to clean up
1261 *
1262 * Free the receive buffers for each ring slot and any
1263 * attached socket buffers that need to go away.
1264 */
1265
1266static void velocity_free_rd_ring(struct velocity_info *vptr)
1267{
1268 int i;
1269
0fe9f15e 1270 if (vptr->rx.info == NULL)
1da177e4
LT		 1271 return;
1272
1273 for (i = 0; i < vptr->options.numrx; i++) {
0fe9f15e
FR		 1274 struct velocity_rd_info *rd_info = &(vptr->rx.info[i]);
1275 struct rx_desc *rd = vptr->rx.ring + i;
b3c3e7d7
FR		 1276
1277 memset(rd, 0, sizeof(*rd));
1da177e4
LT		 1278
1279 if (!rd_info->skb)
1280 continue;
0fe9f15e 1281 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
1da177e4 1282 PCI_DMA_FROMDEVICE);
822f1a57 1283 rd_info->skb_dma = 0;
1da177e4
LT		 1284
1285 dev_kfree_skb(rd_info->skb);
1286 rd_info->skb = NULL;
1287 }
1288
0fe9f15e
FR		 1289 kfree(vptr->rx.info);
1290 vptr->rx.info = NULL;
1da177e4
LT		 1291}
1292
1293/**
1294 * velocity_init_td_ring - set up transmit ring
1295 * @vptr: velocity
1296 *
1297 * Set up the transmit ring and chain the ring pointers together.
1298 * Returns zero on success or a negative posix errno code for
1299 * failure.
1300 */
6aa20a22 1301
1da177e4
LT		 1302static int velocity_init_td_ring(struct velocity_info *vptr)
1303{
1da177e4 1304 dma_addr_t curr;
0d1cfd20 1305 int j;
1da177e4
LT		 1306
1307 /* Init the TD ring entries */
0fe9f15e
FR		 1308 for (j = 0; j < vptr->tx.numq; j++) {
1309 curr = vptr->tx.pool_dma[j];
1da177e4 1310
0fe9f15e 1311 vptr->tx.infos[j] = kcalloc(vptr->options.numtx,
ae94607d
MK		 1312 sizeof(struct velocity_td_info),
1313 GFP_KERNEL);
0fe9f15e 1314 if (!vptr->tx.infos[j]) {
1da177e4 1315 while(--j >= 0)
0fe9f15e 1316 kfree(vptr->tx.infos[j]);
1da177e4
LT		 1317 return -ENOMEM;
1318 }
1da177e4 1319
0fe9f15e 1320 vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0;
1da177e4
LT		 1321 }
1322 return 0;
1323}
1324
1325/*
1326 * FIXME: could we merge this with velocity_free_tx_buf ?
1327 */
1328
1329static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1330 int q, int n)
1331{
0fe9f15e 1332 struct velocity_td_info * td_info = &(vptr->tx.infos[q][n]);
1da177e4 1333 int i;
6aa20a22 1334
1da177e4
LT		 1335 if (td_info == NULL)
1336 return;
6aa20a22 1337
1da177e4
LT		 1338 if (td_info->skb) {
1339 for (i = 0; i < td_info->nskb_dma; i++)
1340 {
1341 if (td_info->skb_dma[i]) {
6aa20a22 1342 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1da177e4 1343 td_info->skb->len, PCI_DMA_TODEVICE);
822f1a57 1344 td_info->skb_dma[i] = 0;
1da177e4
LT		 1345 }
1346 }
1347 dev_kfree_skb(td_info->skb);
1348 td_info->skb = NULL;
1349 }
1350}
1351
1352/**
1353 * velocity_free_td_ring - free td ring
1354 * @vptr: velocity
1355 *
1356 * Free up the transmit ring for this particular velocity adapter.
1357 * We free the ring contents but not the ring itself.
1358 */
6aa20a22 1359
1da177e4
LT		 1360static void velocity_free_td_ring(struct velocity_info *vptr)
1361{
1362 int i, j;
1363
0fe9f15e
FR		 1364 for (j = 0; j < vptr->tx.numq; j++) {
1365 if (vptr->tx.infos[j] == NULL)
1da177e4
LT		 1366 continue;
1367 for (i = 0; i < vptr->options.numtx; i++) {
1368 velocity_free_td_ring_entry(vptr, j, i);
1369
1370 }
0fe9f15e
FR		 1371 kfree(vptr->tx.infos[j]);
1372 vptr->tx.infos[j] = NULL;
1da177e4
LT		 1373 }
1374}
1375
1376/**
1377 * velocity_rx_srv - service RX interrupt
1378 * @vptr: velocity
1379 * @status: adapter status (unused)
1380 *
1381 * Walk the receive ring of the velocity adapter and remove
1382 * any received packets from the receive queue. Hand the ring
1383 * slots back to the adapter for reuse.
1384 */
6aa20a22 1385
1da177e4
LT		 1386static int velocity_rx_srv(struct velocity_info *vptr, int status)
1387{
1388 struct net_device_stats *stats = &vptr->stats;
0fe9f15e 1389 int rd_curr = vptr->rx.curr;
1da177e4
LT		 1390 int works = 0;
1391
1392 do {
0fe9f15e 1393 struct rx_desc *rd = vptr->rx.ring + rd_curr;
1da177e4 1394
0fe9f15e 1395 if (!vptr->rx.info[rd_curr].skb)
1da177e4
LT		 1396 break;
1397
4a51c0d0 1398 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1399 break;
1400
1401 rmb();
1402
1403 /*
1404 * Don't drop CE or RL error frame although RXOK is off
1405 */
4a51c0d0 1406 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
1da177e4
LT		 1407 if (velocity_receive_frame(vptr, rd_curr) < 0)
1408 stats->rx_dropped++;
1409 } else {
1410 if (rd->rdesc0.RSR & RSR_CRC)
1411 stats->rx_crc_errors++;
1412 if (rd->rdesc0.RSR & RSR_FAE)
1413 stats->rx_frame_errors++;
1414
1415 stats->rx_dropped++;
1416 }
1417
4a51c0d0 1418 rd->size |= RX_INTEN;
1da177e4 1419
1da177e4
LT		 1420 rd_curr++;
1421 if (rd_curr >= vptr->options.numrx)
1422 rd_curr = 0;
1423 } while (++works <= 15);
1424
0fe9f15e 1425 vptr->rx.curr = rd_curr;
1da177e4 1426
28133176
FR		 1427 if ((works > 0) && (velocity_rx_refill(vptr) > 0))
1428 velocity_give_many_rx_descs(vptr);
1da177e4
LT		 1429
1430 VAR_USED(stats);
1431 return works;
1432}
1433
1434/**
1435 * velocity_rx_csum - checksum process
1436 * @rd: receive packet descriptor
1437 * @skb: network layer packet buffer
1438 *
1439 * Process the status bits for the received packet and determine
1440 * if the checksum was computed and verified by the hardware
1441 */
6aa20a22 1442
1da177e4
LT		 1443static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1444{
1445 skb->ip_summed = CHECKSUM_NONE;
1446
1447 if (rd->rdesc1.CSM & CSM_IPKT) {
1448 if (rd->rdesc1.CSM & CSM_IPOK) {
6aa20a22 1449 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1da177e4
LT		 1450 (rd->rdesc1.CSM & CSM_UDPKT)) {
1451 if (!(rd->rdesc1.CSM & CSM_TUPOK)) {
1452 return;
1453 }
1454 }
1455 skb->ip_summed = CHECKSUM_UNNECESSARY;
1456 }
1457 }
1458}
1459
1460/**
1461 * velocity_rx_copy - in place Rx copy for small packets
1462 * @rx_skb: network layer packet buffer candidate
1463 * @pkt_size: received data size
1464 * @rd: receive packet descriptor
1465 * @dev: network device
1466 *
1467 * Replace the current skb that is scheduled for Rx processing by a
1468 * shorter, immediatly allocated skb, if the received packet is small
1469 * enough. This function returns a negative value if the received
1470 * packet is too big or if memory is exhausted.
1471 */
c73d2589
SH		 1472static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1473 struct velocity_info *vptr)
1da177e4
LT		 1474{
1475 int ret = -1;
1da177e4
LT		 1476 if (pkt_size < rx_copybreak) {
1477 struct sk_buff *new_skb;
1478
c73d2589 1479 new_skb = netdev_alloc_skb(vptr->dev, pkt_size + 2);
1da177e4 1480 if (new_skb) {
1da177e4 1481 new_skb->ip_summed = rx_skb[0]->ip_summed;
c73d2589
SH		 1482 skb_reserve(new_skb, 2);
1483 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
1da177e4
LT		 1484 *rx_skb = new_skb;
1485 ret = 0;
1486 }
6aa20a22 1487
1da177e4
LT		 1488 }
1489 return ret;
1490}
1491
1492/**
1493 * velocity_iph_realign - IP header alignment
1494 * @vptr: velocity we are handling
1495 * @skb: network layer packet buffer
1496 * @pkt_size: received data size
1497 *
1498 * Align IP header on a 2 bytes boundary. This behavior can be
1499 * configured by the user.
1500 */
1501static inline void velocity_iph_realign(struct velocity_info *vptr,
1502 struct sk_buff *skb, int pkt_size)
1503{
1da177e4 1504 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
c03571a3 1505 memmove(skb->data + 2, skb->data, pkt_size);
1da177e4
LT		 1506 skb_reserve(skb, 2);
1507 }
1508}
1509
1510/**
1511 * velocity_receive_frame - received packet processor
1512 * @vptr: velocity we are handling
1513 * @idx: ring index
6aa20a22 1514 *
1da177e4
LT		 1515 * A packet has arrived. We process the packet and if appropriate
1516 * pass the frame up the network stack
1517 */
6aa20a22 1518
1da177e4
LT		 1519static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1520{
1521 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
1522 struct net_device_stats *stats = &vptr->stats;
0fe9f15e
FR		 1523 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1524 struct rx_desc *rd = &(vptr->rx.ring[idx]);
4a51c0d0 1525 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
1da177e4
LT		 1526 struct sk_buff *skb;
1527
1528 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
1529 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
1530 stats->rx_length_errors++;
1531 return -EINVAL;
1532 }
1533
1534 if (rd->rdesc0.RSR & RSR_MAR)
1535 vptr->stats.multicast++;
1536
1537 skb = rd_info->skb;
1da177e4
LT		 1538
1539 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
0fe9f15e 1540 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
1da177e4
LT		 1541
1542 /*
1543 * Drop frame not meeting IEEE 802.3
1544 */
6aa20a22 1545
1da177e4
LT		 1546 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
1547 if (rd->rdesc0.RSR & RSR_RL) {
1548 stats->rx_length_errors++;
1549 return -EINVAL;
1550 }
1551 }
1552
1553 pci_action = pci_dma_sync_single_for_device;
1554
1555 velocity_rx_csum(rd, skb);
1556
1557 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
1558 velocity_iph_realign(vptr, skb, pkt_len);
1559 pci_action = pci_unmap_single;
1560 rd_info->skb = NULL;
1561 }
1562
0fe9f15e 1563 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
1da177e4
LT		 1564 PCI_DMA_FROMDEVICE);
1565
1566 skb_put(skb, pkt_len - 4);
4c13eb66 1567 skb->protocol = eth_type_trans(skb, vptr->dev);
1da177e4 1568
d4f73c8e
FR		 1569 if (vptr->vlgrp && (rd->rdesc0.RSR & RSR_DETAG)) {
1570 vlan_hwaccel_rx(skb, vptr->vlgrp,
1571 swab16(le16_to_cpu(rd->rdesc1.PQTAG)));
1572 } else
1573 netif_rx(skb);
1574
1da177e4 1575 stats->rx_bytes += pkt_len;
1da177e4
LT		 1576
1577 return 0;
1578}
1579
1580/**
1581 * velocity_alloc_rx_buf - allocate aligned receive buffer
1582 * @vptr: velocity
1583 * @idx: ring index
1584 *
1585 * Allocate a new full sized buffer for the reception of a frame and
1586 * map it into PCI space for the hardware to use. The hardware
1587 * requires *64* byte alignment of the buffer which makes life
1588 * less fun than would be ideal.
1589 */
6aa20a22 1590
1da177e4
LT		 1591static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1592{
0fe9f15e
FR		 1593 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1594 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1da177e4 1595
0fe9f15e 1596 rd_info->skb = dev_alloc_skb(vptr->rx.buf_sz + 64);
1da177e4
LT		 1597 if (rd_info->skb == NULL)
1598 return -ENOMEM;
1599
1600 /*
1601 * Do the gymnastics to get the buffer head for data at
1602 * 64byte alignment.
1603 */
689be439 1604 skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63);
0fe9f15e
FR		 1605 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data,
1606 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
6aa20a22 1607
1da177e4
LT		 1608 /*
1609 * Fill in the descriptor to match
0fe9f15e 1610 */
6aa20a22 1611
1da177e4 1612 *((u32 *) & (rd->rdesc0)) = 0;
0fe9f15e 1613 rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN;
1da177e4
LT		 1614 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1615 rd->pa_high = 0;
1616 return 0;
1617}
1618
1619/**
1620 * tx_srv - transmit interrupt service
1621 * @vptr; Velocity
1622 * @status:
1623 *
1624 * Scan the queues looking for transmitted packets that
1625 * we can complete and clean up. Update any statistics as
3a4fa0a2 1626 * necessary/
1da177e4 1627 */
6aa20a22 1628
1da177e4
LT		 1629static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1630{
1631 struct tx_desc *td;
1632 int qnum;
1633 int full = 0;
1634 int idx;
1635 int works = 0;
1636 struct velocity_td_info *tdinfo;
1637 struct net_device_stats *stats = &vptr->stats;
1638
0fe9f15e
FR		 1639 for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
1640 for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
1da177e4
LT		 1641 idx = (idx + 1) % vptr->options.numtx) {
1642
1643 /*
1644 * Get Tx Descriptor
1645 */
0fe9f15e
FR		 1646 td = &(vptr->tx.rings[qnum][idx]);
1647 tdinfo = &(vptr->tx.infos[qnum][idx]);
1da177e4 1648
4a51c0d0 1649 if (td->tdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1650 break;
1651
1652 if ((works++ > 15))
1653 break;
1654
1655 if (td->tdesc0.TSR & TSR0_TERR) {
1656 stats->tx_errors++;
1657 stats->tx_dropped++;
1658 if (td->tdesc0.TSR & TSR0_CDH)
1659 stats->tx_heartbeat_errors++;
1660 if (td->tdesc0.TSR & TSR0_CRS)
1661 stats->tx_carrier_errors++;
1662 if (td->tdesc0.TSR & TSR0_ABT)
1663 stats->tx_aborted_errors++;
1664 if (td->tdesc0.TSR & TSR0_OWC)
1665 stats->tx_window_errors++;
1666 } else {
1667 stats->tx_packets++;
1668 stats->tx_bytes += tdinfo->skb->len;
1669 }
1670 velocity_free_tx_buf(vptr, tdinfo);
0fe9f15e 1671 vptr->tx.used[qnum]--;
1da177e4 1672 }
0fe9f15e 1673 vptr->tx.tail[qnum] = idx;
1da177e4
LT		 1674
1675 if (AVAIL_TD(vptr, qnum) < 1) {
1676 full = 1;
1677 }
1678 }
1679 /*
1680 * Look to see if we should kick the transmit network
1681 * layer for more work.
1682 */
1683 if (netif_queue_stopped(vptr->dev) && (full == 0)
1684 && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1685 netif_wake_queue(vptr->dev);
1686 }
1687 return works;
1688}
1689
1690/**
1691 * velocity_print_link_status - link status reporting
1692 * @vptr: velocity to report on
1693 *
1694 * Turn the link status of the velocity card into a kernel log
1695 * description of the new link state, detailing speed and duplex
1696 * status
1697 */
1698
1699static void velocity_print_link_status(struct velocity_info *vptr)
1700{
1701
1702 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1703 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1704 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
b4fea61a 1705 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
1da177e4
LT		 1706
1707 if (vptr->mii_status & VELOCITY_SPEED_1000)
1708 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1709 else if (vptr->mii_status & VELOCITY_SPEED_100)
1710 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1711 else
1712 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1713
1714 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1715 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1716 else
1717 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1718 } else {
1719 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1720 switch (vptr->options.spd_dpx) {
1721 case SPD_DPX_100_HALF:
1722 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1723 break;
1724 case SPD_DPX_100_FULL:
1725 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1726 break;
1727 case SPD_DPX_10_HALF:
1728 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1729 break;
1730 case SPD_DPX_10_FULL:
1731 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1732 break;
1733 default:
1734 break;
1735 }
1736 }
1737}
1738
1739/**
1740 * velocity_error - handle error from controller
1741 * @vptr: velocity
1742 * @status: card status
1743 *
1744 * Process an error report from the hardware and attempt to recover
6aa20a22 1745 * the card itself. At the moment we cannot recover from some
1da177e4
LT		 1746 * theoretically impossible errors but this could be fixed using
1747 * the pci_device_failed logic to bounce the hardware
1748 *
1749 */
6aa20a22 1750
1da177e4
LT		 1751static void velocity_error(struct velocity_info *vptr, int status)
1752{
1753
1754 if (status & ISR_TXSTLI) {
1755 struct mac_regs __iomem * regs = vptr->mac_regs;
1756
0e6ff158 1757 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1da177e4
LT		 1758 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1759 writew(TRDCSR_RUN, &regs->TDCSRClr);
1760 netif_stop_queue(vptr->dev);
6aa20a22 1761
1da177e4
LT		 1762 /* FIXME: port over the pci_device_failed code and use it
1763 here */
1764 }
1765
1766 if (status & ISR_SRCI) {
1767 struct mac_regs __iomem * regs = vptr->mac_regs;
1768 int linked;
1769
1770 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1771 vptr->mii_status = check_connection_type(regs);
1772
1773 /*
6aa20a22 1774 * If it is a 3119, disable frame bursting in
1da177e4
LT		 1775 * halfduplex mode and enable it in fullduplex
1776 * mode
1777 */
1778 if (vptr->rev_id < REV_ID_VT3216_A0) {
1779 if (vptr->mii_status | VELOCITY_DUPLEX_FULL)
1780 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1781 else
1782 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1783 }
1784 /*
1785 * Only enable CD heart beat counter in 10HD mode
1786 */
1787 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) {
1788 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1789 } else {
1790 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1791 }
1792 }
1793 /*
1794 * Get link status from PHYSR0
1795 */
1796 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1797
1798 if (linked) {
1799 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
8a22dddb 1800 netif_carrier_on(vptr->dev);
1da177e4
LT		 1801 } else {
1802 vptr->mii_status |= VELOCITY_LINK_FAIL;
8a22dddb 1803 netif_carrier_off(vptr->dev);
1da177e4
LT		 1804 }
1805
1806 velocity_print_link_status(vptr);
1807 enable_flow_control_ability(vptr);
1808
1809 /*
6aa20a22 1810 * Re-enable auto-polling because SRCI will disable
1da177e4
LT		 1811 * auto-polling
1812 */
6aa20a22 1813
1da177e4
LT		 1814 enable_mii_autopoll(regs);
1815
1816 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1817 netif_stop_queue(vptr->dev);
1818 else
1819 netif_wake_queue(vptr->dev);
1820
1821 };
1822 if (status & ISR_MIBFI)
1823 velocity_update_hw_mibs(vptr);
1824 if (status & ISR_LSTEI)
1825 mac_rx_queue_wake(vptr->mac_regs);
1826}
1827
1828/**
1829 * velocity_free_tx_buf - free transmit buffer
1830 * @vptr: velocity
1831 * @tdinfo: buffer
1832 *
1833 * Release an transmit buffer. If the buffer was preallocated then
1834 * recycle it, if not then unmap the buffer.
1835 */
6aa20a22 1836
1da177e4
LT		 1837static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo)
1838{
1839 struct sk_buff *skb = tdinfo->skb;
1840 int i;
1841
1842 /*
1843 * Don't unmap the pre-allocated tx_bufs
1844 */
580a6902 1845 if (tdinfo->skb_dma) {
1da177e4
LT		 1846
1847 for (i = 0; i < tdinfo->nskb_dma; i++) {
1848#ifdef VELOCITY_ZERO_COPY_SUPPORT
4a51c0d0 1849 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], le16_to_cpu(td->tdesc1.len), PCI_DMA_TODEVICE);
1da177e4
LT		 1850#else
1851 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], skb->len, PCI_DMA_TODEVICE);
1852#endif
1853 tdinfo->skb_dma[i] = 0;
1854 }
1855 }
1856 dev_kfree_skb_irq(skb);
1857 tdinfo->skb = NULL;
1858}
1859
3c4dc711
FR		 1860static int velocity_init_rings(struct velocity_info *vptr, int mtu)
1861{
1862 int ret;
1863
1864 velocity_set_rxbufsize(vptr, mtu);
1865
1866 ret = velocity_init_dma_rings(vptr);
1867 if (ret < 0)
1868 goto out;
1869
1870 ret = velocity_init_rd_ring(vptr);
1871 if (ret < 0)
1872 goto err_free_dma_rings_0;
1873
1874 ret = velocity_init_td_ring(vptr);
1875 if (ret < 0)
1876 goto err_free_rd_ring_1;
1877out:
1878 return ret;
1879
1880err_free_rd_ring_1:
1881 velocity_free_rd_ring(vptr);
1882err_free_dma_rings_0:
1883 velocity_free_dma_rings(vptr);
1884 goto out;
1885}
1886
1887static void velocity_free_rings(struct velocity_info *vptr)
1888{
1889 velocity_free_td_ring(vptr);
1890 velocity_free_rd_ring(vptr);
1891 velocity_free_dma_rings(vptr);
1892}
1893
1da177e4
LT		 1894/**
1895 * velocity_open - interface activation callback
1896 * @dev: network layer device to open
1897 *
1898 * Called when the network layer brings the interface up. Returns
1899 * a negative posix error code on failure, or zero on success.
1900 *
1901 * All the ring allocation and set up is done on open for this
1902 * adapter to minimise memory usage when inactive
1903 */
6aa20a22 1904
1da177e4
LT		 1905static int velocity_open(struct net_device *dev)
1906{
8ab6f3f7 1907 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1908 int ret;
1909
3c4dc711 1910 ret = velocity_init_rings(vptr, dev->mtu);
1da177e4
LT		 1911 if (ret < 0)
1912 goto out;
1913
6aa20a22 1914 /* Ensure chip is running */
1da177e4 1915 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 1916
28133176
FR		 1917 velocity_give_many_rx_descs(vptr);
1918
1da177e4
LT		 1919 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1920
1fb9df5d 1921 ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED,
1da177e4
LT		 1922 dev->name, dev);
1923 if (ret < 0) {
1924 /* Power down the chip */
1925 pci_set_power_state(vptr->pdev, PCI_D3hot);
3c4dc711
FR		 1926 velocity_free_rings(vptr);
1927 goto out;
1da177e4
LT		 1928 }
1929
1930 mac_enable_int(vptr->mac_regs);
1931 netif_start_queue(dev);
1932 vptr->flags |= VELOCITY_FLAGS_OPENED;
1933out:
1934 return ret;
1da177e4
LT		 1935}
1936
6aa20a22 1937/**
1da177e4
LT		 1938 * velocity_change_mtu - MTU change callback
1939 * @dev: network device
1940 * @new_mtu: desired MTU
1941 *
1942 * Handle requests from the networking layer for MTU change on
1943 * this interface. It gets called on a change by the network layer.
1944 * Return zero for success or negative posix error code.
1945 */
6aa20a22 1946
1da177e4
LT		 1947static int velocity_change_mtu(struct net_device *dev, int new_mtu)
1948{
8ab6f3f7 1949 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1950 int ret = 0;
1951
1952 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
6aa20a22 1953 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
1da177e4 1954 vptr->dev->name);
3c4dc711
FR		 1955 ret = -EINVAL;
1956 goto out_0;
1da177e4
LT		 1957 }
1958
bd7b3f34
SH		 1959 if (!netif_running(dev)) {
1960 dev->mtu = new_mtu;
3c4dc711 1961 goto out_0;
bd7b3f34
SH		 1962 }
1963
3c4dc711
FR		 1964 if (dev->mtu != new_mtu) {
1965 struct velocity_info *tmp_vptr;
1966 unsigned long flags;
1967 struct rx_info rx;
1968 struct tx_info tx;
1969
1970 tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL);
1971 if (!tmp_vptr) {
1972 ret = -ENOMEM;
1973 goto out_0;
1974 }
1975
1976 tmp_vptr->dev = dev;
1977 tmp_vptr->pdev = vptr->pdev;
1978 tmp_vptr->options = vptr->options;
1979 tmp_vptr->tx.numq = vptr->tx.numq;
1980
1981 ret = velocity_init_rings(tmp_vptr, new_mtu);
1982 if (ret < 0)
1983 goto out_free_tmp_vptr_1;
1984
1da177e4
LT		 1985 spin_lock_irqsave(&vptr->lock, flags);
1986
1987 netif_stop_queue(dev);
1988 velocity_shutdown(vptr);
1989
3c4dc711
FR		 1990 rx = vptr->rx;
1991 tx = vptr->tx;
1da177e4 1992
3c4dc711
FR		 1993 vptr->rx = tmp_vptr->rx;
1994 vptr->tx = tmp_vptr->tx;
1da177e4 1995
3c4dc711
FR		 1996 tmp_vptr->rx = rx;
1997 tmp_vptr->tx = tx;
9088d9a4 1998
3c4dc711 1999 dev->mtu = new_mtu;
1da177e4 2000
3c4dc711 2001 velocity_give_many_rx_descs(vptr);
1da177e4
LT		 2002
2003 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2004
2005 mac_enable_int(vptr->mac_regs);
2006 netif_start_queue(dev);
3c4dc711 2007
1da177e4 2008 spin_unlock_irqrestore(&vptr->lock, flags);
1da177e4 2009
3c4dc711
FR		 2010 velocity_free_rings(tmp_vptr);
2011
2012out_free_tmp_vptr_1:
2013 kfree(tmp_vptr);
2014 }
2015out_0:
1da177e4
LT		 2016 return ret;
2017}
2018
2019/**
2020 * velocity_shutdown - shut down the chip
2021 * @vptr: velocity to deactivate
2022 *
2023 * Shuts down the internal operations of the velocity and
2024 * disables interrupts, autopolling, transmit and receive
2025 */
6aa20a22 2026
1da177e4
LT		 2027static void velocity_shutdown(struct velocity_info *vptr)
2028{
2029 struct mac_regs __iomem * regs = vptr->mac_regs;
2030 mac_disable_int(regs);
2031 writel(CR0_STOP, &regs->CR0Set);
2032 writew(0xFFFF, &regs->TDCSRClr);
2033 writeb(0xFF, &regs->RDCSRClr);
2034 safe_disable_mii_autopoll(regs);
2035 mac_clear_isr(regs);
2036}
2037
2038/**
2039 * velocity_close - close adapter callback
2040 * @dev: network device
2041 *
2042 * Callback from the network layer when the velocity is being
2043 * deactivated by the network layer
2044 */
2045
2046static int velocity_close(struct net_device *dev)
2047{
8ab6f3f7 2048 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2049
2050 netif_stop_queue(dev);
2051 velocity_shutdown(vptr);
2052
2053 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2054 velocity_get_ip(vptr);
2055 if (dev->irq != 0)
2056 free_irq(dev->irq, dev);
6aa20a22 2057
1da177e4
LT		 2058 /* Power down the chip */
2059 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22 2060
1da177e4
LT		 2061 velocity_free_rings(vptr);
2062
2063 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2064 return 0;
2065}
2066
2067/**
2068 * velocity_xmit - transmit packet callback
2069 * @skb: buffer to transmit
2070 * @dev: network device
2071 *
2072 * Called by the networ layer to request a packet is queued to
2073 * the velocity. Returns zero on success.
2074 */
6aa20a22 2075
1da177e4
LT		 2076static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
2077{
8ab6f3f7 2078 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2079 int qnum = 0;
2080 struct tx_desc *td_ptr;
2081 struct velocity_td_info *tdinfo;
2082 unsigned long flags;
1da177e4 2083 int pktlen = skb->len;
580a6902
FR		 2084 __le16 len;
2085 int index;
2086
2087
2088
2089 if (skb->len < ETH_ZLEN) {
2090 if (skb_padto(skb, ETH_ZLEN))
2091 goto out;
2092 pktlen = ETH_ZLEN;
2093 }
2094
2095 len = cpu_to_le16(pktlen);
1da177e4 2096
364c6bad
HX		 2097#ifdef VELOCITY_ZERO_COPY_SUPPORT
2098 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
2099 kfree_skb(skb);
2100 return 0;
2101 }
2102#endif
2103
1da177e4
LT		 2104 spin_lock_irqsave(&vptr->lock, flags);
2105
0fe9f15e
FR		 2106 index = vptr->tx.curr[qnum];
2107 td_ptr = &(vptr->tx.rings[qnum][index]);
2108 tdinfo = &(vptr->tx.infos[qnum][index]);
1da177e4 2109
1da177e4 2110 td_ptr->tdesc1.TCR = TCR0_TIC;
4a51c0d0 2111 td_ptr->td_buf[0].size &= ~TD_QUEUE;
1da177e4 2112
1da177e4
LT		 2113#ifdef VELOCITY_ZERO_COPY_SUPPORT
2114 if (skb_shinfo(skb)->nr_frags > 0) {
2115 int nfrags = skb_shinfo(skb)->nr_frags;
2116 tdinfo->skb = skb;
2117 if (nfrags > 6) {
d626f62b 2118 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4 2119 tdinfo->skb_dma[0] = tdinfo->buf_dma;
4a51c0d0 2120 td_ptr->tdesc0.len = len;
0fe9f15e
FR		 2121 td_ptr->tx.buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2122 td_ptr->tx.buf[0].pa_high = 0;
2123 td_ptr->tx.buf[0].size = len; /* queue is 0 anyway */
1da177e4 2124 tdinfo->nskb_dma = 1;
1da177e4
LT		 2125 } else {
2126 int i = 0;
2127 tdinfo->nskb_dma = 0;
4a51c0d0
AV		 2128 tdinfo->skb_dma[i] = pci_map_single(vptr->pdev, skb->data,
2129 skb_headlen(skb), PCI_DMA_TODEVICE);
1da177e4 2130
4a51c0d0 2131 td_ptr->tdesc0.len = len;
1da177e4
LT		 2132
2133 /* FIXME: support 48bit DMA later */
0fe9f15e
FR		 2134 td_ptr->tx.buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma);
2135 td_ptr->tx.buf[i].pa_high = 0;
2136 td_ptr->tx.buf[i].size = cpu_to_le16(skb_headlen(skb));
1da177e4
LT		 2137
2138 for (i = 0; i < nfrags; i++) {
2139 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
4a51c0d0 2140 void *addr = (void *)page_address(frag->page) + frag->page_offset;
1da177e4
LT		 2141
2142 tdinfo->skb_dma[i + 1] = pci_map_single(vptr->pdev, addr, frag->size, PCI_DMA_TODEVICE);
2143
0fe9f15e
FR		 2144 td_ptr->tx.buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
2145 td_ptr->tx.buf[i + 1].pa_high = 0;
2146 td_ptr->tx.buf[i + 1].size = cpu_to_le16(frag->size);
1da177e4
LT		 2147 }
2148 tdinfo->nskb_dma = i - 1;
1da177e4
LT		 2149 }
2150
2151 } else
2152#endif
2153 {
2154 /*
2155 * Map the linear network buffer into PCI space and
2156 * add it to the transmit ring.
2157 */
2158 tdinfo->skb = skb;
2159 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
4a51c0d0 2160 td_ptr->tdesc0.len = len;
1da177e4
LT		 2161 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2162 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2163 td_ptr->td_buf[0].size = len;
1da177e4 2164 tdinfo->nskb_dma = 1;
1da177e4 2165 }
4a51c0d0 2166 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
1da177e4 2167
501e4d24 2168 if (vptr->vlgrp && vlan_tx_tag_present(skb)) {
4a51c0d0 2169 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1da177e4
LT		 2170 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2171 }
2172
2173 /*
2174 * Handle hardware checksum
2175 */
2176 if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM)
84fa7933 2177 && (skb->ip_summed == CHECKSUM_PARTIAL)) {
eddc9ec5 2178 const struct iphdr *ip = ip_hdr(skb);
1da177e4
LT		 2179 if (ip->protocol == IPPROTO_TCP)
2180 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2181 else if (ip->protocol == IPPROTO_UDP)
2182 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2183 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2184 }
2185 {
2186
2187 int prev = index - 1;
2188
2189 if (prev < 0)
2190 prev = vptr->options.numtx - 1;
4a51c0d0 2191 td_ptr->tdesc0.len |= OWNED_BY_NIC;
0fe9f15e
FR		 2192 vptr->tx.used[qnum]++;
2193 vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx;
1da177e4
LT		 2194
2195 if (AVAIL_TD(vptr, qnum) < 1)
2196 netif_stop_queue(dev);
2197
0fe9f15e 2198 td_ptr = &(vptr->tx.rings[qnum][prev]);
4a51c0d0 2199 td_ptr->td_buf[0].size |= TD_QUEUE;
1da177e4
LT		 2200 mac_tx_queue_wake(vptr->mac_regs, qnum);
2201 }
2202 dev->trans_start = jiffies;
2203 spin_unlock_irqrestore(&vptr->lock, flags);
580a6902
FR		 2204out:
2205 return NETDEV_TX_OK;
1da177e4
LT		 2206}
2207
2208/**
2209 * velocity_intr - interrupt callback
2210 * @irq: interrupt number
2211 * @dev_instance: interrupting device
1da177e4
LT		 2212 *
2213 * Called whenever an interrupt is generated by the velocity
2214 * adapter IRQ line. We may not be the source of the interrupt
2215 * and need to identify initially if we are, and if not exit as
2216 * efficiently as possible.
2217 */
6aa20a22 2218
7d12e780 2219static int velocity_intr(int irq, void *dev_instance)
1da177e4
LT		 2220{
2221 struct net_device *dev = dev_instance;
8ab6f3f7 2222 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2223 u32 isr_status;
2224 int max_count = 0;
2225
2226
2227 spin_lock(&vptr->lock);
2228 isr_status = mac_read_isr(vptr->mac_regs);
2229
2230 /* Not us ? */
2231 if (isr_status == 0) {
2232 spin_unlock(&vptr->lock);
2233 return IRQ_NONE;
2234 }
2235
2236 mac_disable_int(vptr->mac_regs);
2237
2238 /*
2239 * Keep processing the ISR until we have completed
2240 * processing and the isr_status becomes zero
2241 */
6aa20a22 2242
1da177e4
LT		 2243 while (isr_status != 0) {
2244 mac_write_isr(vptr->mac_regs, isr_status);
2245 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2246 velocity_error(vptr, isr_status);
2247 if (isr_status & (ISR_PRXI | ISR_PPRXI))
2248 max_count += velocity_rx_srv(vptr, isr_status);
2249 if (isr_status & (ISR_PTXI | ISR_PPTXI))
2250 max_count += velocity_tx_srv(vptr, isr_status);
2251 isr_status = mac_read_isr(vptr->mac_regs);
2252 if (max_count > vptr->options.int_works)
2253 {
6aa20a22 2254 printk(KERN_WARNING "%s: excessive work at interrupt.\n",
1da177e4
LT		 2255 dev->name);
2256 max_count = 0;
2257 }
2258 }
2259 spin_unlock(&vptr->lock);
2260 mac_enable_int(vptr->mac_regs);
2261 return IRQ_HANDLED;
2262
2263}
2264
2265
2266/**
2267 * velocity_set_multi - filter list change callback
2268 * @dev: network device
2269 *
2270 * Called by the network layer when the filter lists need to change
2271 * for a velocity adapter. Reload the CAMs with the new address
2272 * filter ruleset.
2273 */
6aa20a22 2274
1da177e4
LT		 2275static void velocity_set_multi(struct net_device *dev)
2276{
8ab6f3f7 2277 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2278 struct mac_regs __iomem * regs = vptr->mac_regs;
2279 u8 rx_mode;
2280 int i;
2281 struct dev_mc_list *mclist;
2282
2283 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1da177e4
LT		 2284 writel(0xffffffff, &regs->MARCAM[0]);
2285 writel(0xffffffff, &regs->MARCAM[4]);
2286 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
2287 } else if ((dev->mc_count > vptr->multicast_limit)
2288 || (dev->flags & IFF_ALLMULTI)) {
2289 writel(0xffffffff, &regs->MARCAM[0]);
2290 writel(0xffffffff, &regs->MARCAM[4]);
2291 rx_mode = (RCR_AM | RCR_AB);
2292 } else {
2293 int offset = MCAM_SIZE - vptr->multicast_limit;
01faccbf 2294 mac_get_cam_mask(regs, vptr->mCAMmask);
1da177e4
LT		 2295
2296 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
01faccbf 2297 mac_set_cam(regs, i + offset, mclist->dmi_addr);
1da177e4
LT		 2298 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
2299 }
2300
01faccbf 2301 mac_set_cam_mask(regs, vptr->mCAMmask);
5f5c4bdb 2302 rx_mode = RCR_AM | RCR_AB | RCR_AP;
1da177e4
LT		 2303 }
2304 if (dev->mtu > 1500)
2305 rx_mode |= RCR_AL;
2306
2307 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
2308
2309}
2310
2311/**
2312 * velocity_get_status - statistics callback
2313 * @dev: network device
2314 *
2315 * Callback from the network layer to allow driver statistics
2316 * to be resynchronized with hardware collected state. In the
2317 * case of the velocity we need to pull the MIB counters from
2318 * the hardware into the counters before letting the network
2319 * layer display them.
2320 */
6aa20a22 2321
1da177e4
LT		 2322static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2323{
8ab6f3f7 2324 struct velocity_info *vptr = netdev_priv(dev);
6aa20a22 2325
1da177e4
LT		 2326 /* If the hardware is down, don't touch MII */
2327 if(!netif_running(dev))
2328 return &vptr->stats;
2329
2330 spin_lock_irq(&vptr->lock);
2331 velocity_update_hw_mibs(vptr);
2332 spin_unlock_irq(&vptr->lock);
2333
2334 vptr->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2335 vptr->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2336 vptr->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2337
2338// unsigned long rx_dropped; /* no space in linux buffers */
2339 vptr->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2340 /* detailed rx_errors: */
2341// unsigned long rx_length_errors;
2342// unsigned long rx_over_errors; /* receiver ring buff overflow */
2343 vptr->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2344// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2345// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2346// unsigned long rx_missed_errors; /* receiver missed packet */
2347
2348 /* detailed tx_errors */
2349// unsigned long tx_fifo_errors;
2350
2351 return &vptr->stats;
2352}
2353
2354
2355/**
2356 * velocity_ioctl - ioctl entry point
2357 * @dev: network device
2358 * @rq: interface request ioctl
2359 * @cmd: command code
2360 *
2361 * Called when the user issues an ioctl request to the network
2362 * device in question. The velocity interface supports MII.
2363 */
6aa20a22 2364
1da177e4
LT		 2365static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2366{
8ab6f3f7 2367 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2368 int ret;
2369
2370 /* If we are asked for information and the device is power
2371 saving then we need to bring the device back up to talk to it */
6aa20a22 2372
1da177e4
LT		 2373 if (!netif_running(dev))
2374 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 2375
1da177e4
LT		 2376 switch (cmd) {
2377 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2378 case SIOCGMIIREG: /* Read MII PHY register. */
2379 case SIOCSMIIREG: /* Write to MII PHY register. */
2380 ret = velocity_mii_ioctl(dev, rq, cmd);
2381 break;
2382
2383 default:
2384 ret = -EOPNOTSUPP;
2385 }
2386 if (!netif_running(dev))
2387 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22
JG		 2388
2389
1da177e4
LT		 2390 return ret;
2391}
2392
2393/*
2394 * Definition for our device driver. The PCI layer interface
2395 * uses this to handle all our card discover and plugging
2396 */
6aa20a22 2397
1da177e4
LT		 2398static struct pci_driver velocity_driver = {
2399 .name = VELOCITY_NAME,
2400 .id_table = velocity_id_table,
2401 .probe = velocity_found1,
2402 .remove = __devexit_p(velocity_remove1),
2403#ifdef CONFIG_PM
2404 .suspend = velocity_suspend,
2405 .resume = velocity_resume,
2406#endif
2407};
2408
2409/**
2410 * velocity_init_module - load time function
2411 *
2412 * Called when the velocity module is loaded. The PCI driver
2413 * is registered with the PCI layer, and in turn will call
2414 * the probe functions for each velocity adapter installed
2415 * in the system.
2416 */
6aa20a22 2417
1da177e4
LT		 2418static int __init velocity_init_module(void)
2419{
2420 int ret;
2421
2422 velocity_register_notifier();
29917620 2423 ret = pci_register_driver(&velocity_driver);
1da177e4
LT		 2424 if (ret < 0)
2425 velocity_unregister_notifier();
2426 return ret;
2427}
2428
2429/**
2430 * velocity_cleanup - module unload
2431 *
2432 * When the velocity hardware is unloaded this function is called.
6aa20a22 2433 * It will clean up the notifiers and the unregister the PCI
1da177e4
LT		 2434 * driver interface for this hardware. This in turn cleans up
2435 * all discovered interfaces before returning from the function
2436 */
6aa20a22 2437
1da177e4
LT		 2438static void __exit velocity_cleanup_module(void)
2439{
2440 velocity_unregister_notifier();
2441 pci_unregister_driver(&velocity_driver);
2442}
2443
2444module_init(velocity_init_module);
2445module_exit(velocity_cleanup_module);
2446
2447
2448/*
2449 * MII access , media link mode setting functions
2450 */
6aa20a22
JG		 2451
2452
1da177e4
LT		 2453/**
2454 * mii_init - set up MII
2455 * @vptr: velocity adapter
2456 * @mii_status: links tatus
2457 *
2458 * Set up the PHY for the current link state.
2459 */
6aa20a22 2460
1da177e4
LT		 2461static void mii_init(struct velocity_info *vptr, u32 mii_status)
2462{
2463 u16 BMCR;
2464
2465 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
2466 case PHYID_CICADA_CS8201:
2467 /*
2468 * Reset to hardware default
2469 */
2470 MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2471 /*
2472 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2473 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2474 * legacy-forced issue.
2475 */
2476 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2477 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2478 else
2479 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2480 /*
2481 * Turn on Link/Activity LED enable bit for CIS8201
2482 */
2483 MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
2484 break;
2485 case PHYID_VT3216_32BIT:
2486 case PHYID_VT3216_64BIT:
2487 /*
2488 * Reset to hardware default
2489 */
2490 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2491 /*
2492 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2493 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2494 * legacy-forced issue
2495 */
2496 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2497 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2498 else
2499 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2500 break;
2501
2502 case PHYID_MARVELL_1000:
2503 case PHYID_MARVELL_1000S:
2504 /*
6aa20a22 2505 * Assert CRS on Transmit
1da177e4
LT		 2506 */
2507 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
2508 /*
6aa20a22 2509 * Reset to hardware default
1da177e4
LT		 2510 */
2511 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2512 break;
2513 default:
2514 ;
2515 }
2516 velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
2517 if (BMCR & BMCR_ISO) {
2518 BMCR &= ~BMCR_ISO;
2519 velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
2520 }
2521}
2522
2523/**
2524 * safe_disable_mii_autopoll - autopoll off
2525 * @regs: velocity registers
2526 *
2527 * Turn off the autopoll and wait for it to disable on the chip
2528 */
6aa20a22 2529
1da177e4
LT		 2530static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs)
2531{
2532 u16 ww;
2533
2534 /* turn off MAUTO */
2535 writeb(0, &regs->MIICR);
2536 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2537 udelay(1);
2538 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2539 break;
2540 }
2541}
2542
2543/**
2544 * enable_mii_autopoll - turn on autopolling
2545 * @regs: velocity registers
2546 *
2547 * Enable the MII link status autopoll feature on the Velocity
2548 * hardware. Wait for it to enable.
2549 */
2550
2551static void enable_mii_autopoll(struct mac_regs __iomem * regs)
2552{
2553 int ii;
2554
2555 writeb(0, &(regs->MIICR));
2556 writeb(MIIADR_SWMPL, &regs->MIIADR);
2557
2558 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2559 udelay(1);
2560 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2561 break;
2562 }
2563
2564 writeb(MIICR_MAUTO, &regs->MIICR);
2565
2566 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2567 udelay(1);
2568 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2569 break;
2570 }
2571
2572}
2573
2574/**
2575 * velocity_mii_read - read MII data
2576 * @regs: velocity registers
2577 * @index: MII register index
2578 * @data: buffer for received data
2579 *
2580 * Perform a single read of an MII 16bit register. Returns zero
2581 * on success or -ETIMEDOUT if the PHY did not respond.
2582 */
6aa20a22 2583
1da177e4
LT		 2584static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
2585{
2586 u16 ww;
2587
2588 /*
2589 * Disable MIICR_MAUTO, so that mii addr can be set normally
2590 */
2591 safe_disable_mii_autopoll(regs);
2592
2593 writeb(index, &regs->MIIADR);
2594
2595 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
2596
2597 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2598 if (!(readb(&regs->MIICR) & MIICR_RCMD))
2599 break;
2600 }
2601
2602 *data = readw(&regs->MIIDATA);
2603
2604 enable_mii_autopoll(regs);
2605 if (ww == W_MAX_TIMEOUT)
2606 return -ETIMEDOUT;
2607 return 0;
2608}
2609
2610/**
2611 * velocity_mii_write - write MII data
2612 * @regs: velocity registers
2613 * @index: MII register index
2614 * @data: 16bit data for the MII register
2615 *
2616 * Perform a single write to an MII 16bit register. Returns zero
2617 * on success or -ETIMEDOUT if the PHY did not respond.
2618 */
6aa20a22 2619
1da177e4
LT		 2620static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
2621{
2622 u16 ww;
2623
2624 /*
2625 * Disable MIICR_MAUTO, so that mii addr can be set normally
2626 */
2627 safe_disable_mii_autopoll(regs);
2628
2629 /* MII reg offset */
2630 writeb(mii_addr, &regs->MIIADR);
2631 /* set MII data */
2632 writew(data, &regs->MIIDATA);
2633
2634 /* turn on MIICR_WCMD */
2635 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
2636
2637 /* W_MAX_TIMEOUT is the timeout period */
2638 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2639 udelay(5);
2640 if (!(readb(&regs->MIICR) & MIICR_WCMD))
2641 break;
2642 }
2643 enable_mii_autopoll(regs);
2644
2645 if (ww == W_MAX_TIMEOUT)
2646 return -ETIMEDOUT;
2647 return 0;
2648}
2649
2650/**
2651 * velocity_get_opt_media_mode - get media selection
2652 * @vptr: velocity adapter
2653 *
2654 * Get the media mode stored in EEPROM or module options and load
2655 * mii_status accordingly. The requested link state information
2656 * is also returned.
2657 */
6aa20a22 2658
1da177e4
LT		 2659static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
2660{
2661 u32 status = 0;
2662
2663 switch (vptr->options.spd_dpx) {
2664 case SPD_DPX_AUTO:
2665 status = VELOCITY_AUTONEG_ENABLE;
2666 break;
2667 case SPD_DPX_100_FULL:
2668 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
2669 break;
2670 case SPD_DPX_10_FULL:
2671 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
2672 break;
2673 case SPD_DPX_100_HALF:
2674 status = VELOCITY_SPEED_100;
2675 break;
2676 case SPD_DPX_10_HALF:
2677 status = VELOCITY_SPEED_10;
2678 break;
2679 }
2680 vptr->mii_status = status;
2681 return status;
2682}
2683
2684/**
2685 * mii_set_auto_on - autonegotiate on
2686 * @vptr: velocity
2687 *
2688 * Enable autonegotation on this interface
2689 */
6aa20a22 2690
1da177e4
LT		 2691static void mii_set_auto_on(struct velocity_info *vptr)
2692{
2693 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
2694 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
2695 else
2696 MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2697}
2698
2699
2700/*
2701static void mii_set_auto_off(struct velocity_info * vptr)
2702{
2703 MII_REG_BITS_OFF(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2704}
2705*/
2706
2707/**
2708 * set_mii_flow_control - flow control setup
2709 * @vptr: velocity interface
2710 *
2711 * Set up the flow control on this interface according to
2712 * the supplied user/eeprom options.
2713 */
6aa20a22 2714
1da177e4
LT		 2715static void set_mii_flow_control(struct velocity_info *vptr)
2716{
2717 /*Enable or Disable PAUSE in ANAR */
2718 switch (vptr->options.flow_cntl) {
2719 case FLOW_CNTL_TX:
2720 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2721 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2722 break;
2723
2724 case FLOW_CNTL_RX:
2725 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2726 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2727 break;
2728
2729 case FLOW_CNTL_TX_RX:
2730 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2731 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2732 break;
2733
2734 case FLOW_CNTL_DISABLE:
2735 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2736 MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2737 break;
2738 default:
2739 break;
2740 }
2741}
2742
2743/**
2744 * velocity_set_media_mode - set media mode
2745 * @mii_status: old MII link state
2746 *
2747 * Check the media link state and configure the flow control
2748 * PHY and also velocity hardware setup accordingly. In particular
2749 * we need to set up CD polling and frame bursting.
2750 */
6aa20a22 2751
1da177e4
LT		 2752static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
2753{
2754 u32 curr_status;
2755 struct mac_regs __iomem * regs = vptr->mac_regs;
2756
2757 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
2758 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
2759
2760 /* Set mii link status */
2761 set_mii_flow_control(vptr);
2762
2763 /*
2764 Check if new status is consisent with current status
2765 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE)
2766 || (mii_status==curr_status)) {
2767 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
2768 vptr->mii_status=check_connection_type(vptr->mac_regs);
2769 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
2770 return 0;
2771 }
2772 */
2773
2774 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) {
2775 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
2776 }
2777
2778 /*
2779 * If connection type is AUTO
2780 */
2781 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
2782 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
2783 /* clear force MAC mode bit */
2784 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
2785 /* set duplex mode of MAC according to duplex mode of MII */
2786 MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs);
2787 MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2788 MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs);
2789
2790 /* enable AUTO-NEGO mode */
2791 mii_set_auto_on(vptr);
2792 } else {
2793 u16 ANAR;
2794 u8 CHIPGCR;
2795
2796 /*
2797 * 1. if it's 3119, disable frame bursting in halfduplex mode
2798 * and enable it in fullduplex mode
2799 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
2800 * 3. only enable CD heart beat counter in 10HD mode
2801 */
2802
2803 /* set force MAC mode bit */
2804 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2805
2806 CHIPGCR = readb(&regs->CHIPGCR);
2807 CHIPGCR &= ~CHIPGCR_FCGMII;
2808
2809 if (mii_status & VELOCITY_DUPLEX_FULL) {
2810 CHIPGCR |= CHIPGCR_FCFDX;
2811 writeb(CHIPGCR, &regs->CHIPGCR);
2812 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
2813 if (vptr->rev_id < REV_ID_VT3216_A0)
2814 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
2815 } else {
2816 CHIPGCR &= ~CHIPGCR_FCFDX;
2817 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
2818 writeb(CHIPGCR, &regs->CHIPGCR);
2819 if (vptr->rev_id < REV_ID_VT3216_A0)
2820 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
2821 }
2822
2823 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2824
2825 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) {
2826 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
2827 } else {
2828 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
2829 }
2830 /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
2831 velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
2832 ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
2833 if (mii_status & VELOCITY_SPEED_100) {
2834 if (mii_status & VELOCITY_DUPLEX_FULL)
2835 ANAR |= ANAR_TXFD;
2836 else
2837 ANAR |= ANAR_TX;
2838 } else {
2839 if (mii_status & VELOCITY_DUPLEX_FULL)
2840 ANAR |= ANAR_10FD;
2841 else
2842 ANAR |= ANAR_10;
2843 }
2844 velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
2845 /* enable AUTO-NEGO mode */
2846 mii_set_auto_on(vptr);
2847 /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
2848 }
2849 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
2850 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
2851 return VELOCITY_LINK_CHANGE;
2852}
2853
2854/**
2855 * mii_check_media_mode - check media state
2856 * @regs: velocity registers
2857 *
2858 * Check the current MII status and determine the link status
2859 * accordingly
2860 */
6aa20a22 2861
1da177e4
LT		 2862static u32 mii_check_media_mode(struct mac_regs __iomem * regs)
2863{
2864 u32 status = 0;
2865 u16 ANAR;
2866
2867 if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
2868 status |= VELOCITY_LINK_FAIL;
2869
2870 if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
2871 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
2872 else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
2873 status |= (VELOCITY_SPEED_1000);
2874 else {
2875 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2876 if (ANAR & ANAR_TXFD)
2877 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
2878 else if (ANAR & ANAR_TX)
2879 status |= VELOCITY_SPEED_100;
2880 else if (ANAR & ANAR_10FD)
2881 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
2882 else
2883 status |= (VELOCITY_SPEED_10);
2884 }
2885
2886 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2887 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2888 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2889 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2890 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2891 status |= VELOCITY_AUTONEG_ENABLE;
2892 }
2893 }
2894
2895 return status;
2896}
2897
2898static u32 check_connection_type(struct mac_regs __iomem * regs)
2899{
2900 u32 status = 0;
2901 u8 PHYSR0;
2902 u16 ANAR;
2903 PHYSR0 = readb(&regs->PHYSR0);
2904
2905 /*
2906 if (!(PHYSR0 & PHYSR0_LINKGD))
2907 status|=VELOCITY_LINK_FAIL;
2908 */
2909
2910 if (PHYSR0 & PHYSR0_FDPX)
2911 status |= VELOCITY_DUPLEX_FULL;
2912
2913 if (PHYSR0 & PHYSR0_SPDG)
2914 status |= VELOCITY_SPEED_1000;
59b693fb 2915 else if (PHYSR0 & PHYSR0_SPD10)
1da177e4
LT		 2916 status |= VELOCITY_SPEED_10;
2917 else
2918 status |= VELOCITY_SPEED_100;
2919
2920 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2921 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2922 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2923 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2924 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2925 status |= VELOCITY_AUTONEG_ENABLE;
2926 }
2927 }
2928
2929 return status;
2930}
2931
2932/**
2933 * enable_flow_control_ability - flow control
2934 * @vptr: veloity to configure
2935 *
2936 * Set up flow control according to the flow control options
2937 * determined by the eeprom/configuration.
2938 */
2939
2940static void enable_flow_control_ability(struct velocity_info *vptr)
2941{
2942
2943 struct mac_regs __iomem * regs = vptr->mac_regs;
2944
2945 switch (vptr->options.flow_cntl) {
2946
2947 case FLOW_CNTL_DEFAULT:
2948 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
2949 writel(CR0_FDXRFCEN, &regs->CR0Set);
2950 else
2951 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2952
2953 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
2954 writel(CR0_FDXTFCEN, &regs->CR0Set);
2955 else
2956 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2957 break;
2958
2959 case FLOW_CNTL_TX:
2960 writel(CR0_FDXTFCEN, &regs->CR0Set);
2961 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2962 break;
2963
2964 case FLOW_CNTL_RX:
2965 writel(CR0_FDXRFCEN, &regs->CR0Set);
2966 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2967 break;
2968
2969 case FLOW_CNTL_TX_RX:
2970 writel(CR0_FDXTFCEN, &regs->CR0Set);
2971 writel(CR0_FDXRFCEN, &regs->CR0Set);
2972 break;
2973
2974 case FLOW_CNTL_DISABLE:
2975 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2976 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2977 break;
2978
2979 default:
2980 break;
2981 }
2982
2983}
2984
2985
2986/**
2987 * velocity_ethtool_up - pre hook for ethtool
2988 * @dev: network device
2989 *
2990 * Called before an ethtool operation. We need to make sure the
2991 * chip is out of D3 state before we poke at it.
2992 */
6aa20a22 2993
1da177e4
LT		 2994static int velocity_ethtool_up(struct net_device *dev)
2995{
8ab6f3f7 2996 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2997 if (!netif_running(dev))
2998 pci_set_power_state(vptr->pdev, PCI_D0);
2999 return 0;
6aa20a22 3000}
1da177e4
LT		 3001
3002/**
3003 * velocity_ethtool_down - post hook for ethtool
3004 * @dev: network device
3005 *
3006 * Called after an ethtool operation. Restore the chip back to D3
3007 * state if it isn't running.
3008 */
6aa20a22 3009
1da177e4
LT		 3010static void velocity_ethtool_down(struct net_device *dev)
3011{
8ab6f3f7 3012 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3013 if (!netif_running(dev))
3014 pci_set_power_state(vptr->pdev, PCI_D3hot);
3015}
3016
3017static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3018{
8ab6f3f7 3019 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3020 struct mac_regs __iomem * regs = vptr->mac_regs;
3021 u32 status;
3022 status = check_connection_type(vptr->mac_regs);
3023
59b693fb
JC		 3024 cmd->supported = SUPPORTED_TP |
3025 SUPPORTED_Autoneg |
3026 SUPPORTED_10baseT_Half |
3027 SUPPORTED_10baseT_Full |
3028 SUPPORTED_100baseT_Half |
3029 SUPPORTED_100baseT_Full |
3030 SUPPORTED_1000baseT_Half |
3031 SUPPORTED_1000baseT_Full;
3032 if (status & VELOCITY_SPEED_1000)
3033 cmd->speed = SPEED_1000;
3034 else if (status & VELOCITY_SPEED_100)
1da177e4
LT		 3035 cmd->speed = SPEED_100;
3036 else
3037 cmd->speed = SPEED_10;
3038 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
3039 cmd->port = PORT_TP;
3040 cmd->transceiver = XCVR_INTERNAL;
3041 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
3042
3043 if (status & VELOCITY_DUPLEX_FULL)
3044 cmd->duplex = DUPLEX_FULL;
3045 else
3046 cmd->duplex = DUPLEX_HALF;
6aa20a22 3047
1da177e4
LT		 3048 return 0;
3049}
3050
3051static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3052{
8ab6f3f7 3053 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3054 u32 curr_status;
3055 u32 new_status = 0;
3056 int ret = 0;
6aa20a22 3057
1da177e4
LT		 3058 curr_status = check_connection_type(vptr->mac_regs);
3059 curr_status &= (~VELOCITY_LINK_FAIL);
3060
3061 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3062 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3063 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3064 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3065
3066 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
3067 ret = -EINVAL;
3068 else
3069 velocity_set_media_mode(vptr, new_status);
3070
3071 return ret;
3072}
3073
3074static u32 velocity_get_link(struct net_device *dev)
3075{
8ab6f3f7 3076 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 3077 struct mac_regs __iomem * regs = vptr->mac_regs;
59b693fb 3078 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT		 3079}
3080
3081static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3082{
8ab6f3f7 3083 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3084 strcpy(info->driver, VELOCITY_NAME);
3085 strcpy(info->version, VELOCITY_VERSION);
3086 strcpy(info->bus_info, pci_name(vptr->pdev));
3087}
3088
3089static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3090{
8ab6f3f7 3091 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3092 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3093 wol->wolopts |= WAKE_MAGIC;
3094 /*
3095 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3096 wol.wolopts|=WAKE_PHY;
3097 */
3098 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3099 wol->wolopts |= WAKE_UCAST;
3100 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3101 wol->wolopts |= WAKE_ARP;
3102 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3103}
3104
3105static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3106{
8ab6f3f7 3107 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3108
3109 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3110 return -EFAULT;
3111 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3112
3113 /*
3114 if (wol.wolopts & WAKE_PHY) {
3115 vptr->wol_opts|=VELOCITY_WOL_PHY;
3116 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3117 }
3118 */
3119
3120 if (wol->wolopts & WAKE_MAGIC) {
3121 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3122 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3123 }
3124 if (wol->wolopts & WAKE_UCAST) {
3125 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3126 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3127 }
3128 if (wol->wolopts & WAKE_ARP) {
3129 vptr->wol_opts |= VELOCITY_WOL_ARP;
3130 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3131 }
3132 memcpy(vptr->wol_passwd, wol->sopass, 6);
3133 return 0;
3134}
3135
3136static u32 velocity_get_msglevel(struct net_device *dev)
3137{
3138 return msglevel;
3139}
3140
3141static void velocity_set_msglevel(struct net_device *dev, u32 value)
3142{
3143 msglevel = value;
3144}
3145
7282d491 3146static const struct ethtool_ops velocity_ethtool_ops = {
1da177e4
LT		 3147 .get_settings = velocity_get_settings,
3148 .set_settings = velocity_set_settings,
3149 .get_drvinfo = velocity_get_drvinfo,
3150 .get_wol = velocity_ethtool_get_wol,
3151 .set_wol = velocity_ethtool_set_wol,
3152 .get_msglevel = velocity_get_msglevel,
3153 .set_msglevel = velocity_set_msglevel,
3154 .get_link = velocity_get_link,
3155 .begin = velocity_ethtool_up,
3156 .complete = velocity_ethtool_down
3157};
3158
3159/**
3160 * velocity_mii_ioctl - MII ioctl handler
3161 * @dev: network device
3162 * @ifr: the ifreq block for the ioctl
3163 * @cmd: the command
3164 *
3165 * Process MII requests made via ioctl from the network layer. These
3166 * are used by tools like kudzu to interrogate the link state of the
3167 * hardware
3168 */
6aa20a22 3169
1da177e4
LT		 3170static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
3171{
8ab6f3f7 3172 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3173 struct mac_regs __iomem * regs = vptr->mac_regs;
3174 unsigned long flags;
3175 struct mii_ioctl_data *miidata = if_mii(ifr);
3176 int err;
6aa20a22 3177
1da177e4
LT		 3178 switch (cmd) {
3179 case SIOCGMIIPHY:
3180 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
3181 break;
3182 case SIOCGMIIREG:
3183 if (!capable(CAP_NET_ADMIN))
3184 return -EPERM;
3185 if(velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
3186 return -ETIMEDOUT;
3187 break;
3188 case SIOCSMIIREG:
3189 if (!capable(CAP_NET_ADMIN))
3190 return -EPERM;
3191 spin_lock_irqsave(&vptr->lock, flags);
3192 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
3193 spin_unlock_irqrestore(&vptr->lock, flags);
3194 check_connection_type(vptr->mac_regs);
3195 if(err)
3196 return err;
3197 break;
3198 default:
3199 return -EOPNOTSUPP;
3200 }
3201 return 0;
3202}
3203
3204#ifdef CONFIG_PM
3205
3206/**
3207 * velocity_save_context - save registers
6aa20a22 3208 * @vptr: velocity
1da177e4
LT		 3209 * @context: buffer for stored context
3210 *
3211 * Retrieve the current configuration from the velocity hardware
3212 * and stash it in the context structure, for use by the context
3213 * restore functions. This allows us to save things we need across
3214 * power down states
3215 */
6aa20a22 3216
1da177e4
LT		 3217static void velocity_save_context(struct velocity_info *vptr, struct velocity_context * context)
3218{
3219 struct mac_regs __iomem * regs = vptr->mac_regs;
3220 u16 i;
3221 u8 __iomem *ptr = (u8 __iomem *)regs;
3222
3223 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
3224 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3225
3226 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3227 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3228
3229 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3230 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3231
3232}
3233
3234/**
3235 * velocity_restore_context - restore registers
6aa20a22 3236 * @vptr: velocity
1da177e4
LT		 3237 * @context: buffer for stored context
3238 *
6aa20a22 3239 * Reload the register configuration from the velocity context
1da177e4
LT		 3240 * created by velocity_save_context.
3241 */
6aa20a22 3242
1da177e4
LT		 3243static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3244{
3245 struct mac_regs __iomem * regs = vptr->mac_regs;
3246 int i;
3247 u8 __iomem *ptr = (u8 __iomem *)regs;
3248
3249 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) {
3250 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3251 }
3252
3253 /* Just skip cr0 */
3254 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3255 /* Clear */
3256 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3257 /* Set */
3258 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3259 }
3260
3261 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) {
3262 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3263 }
3264
3265 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) {
3266 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3267 }
3268
3269 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) {
3270 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3271 }
3272
3273}
3274
3275/**
3276 * wol_calc_crc - WOL CRC
3277 * @pattern: data pattern
3278 * @mask_pattern: mask
3279 *
3280 * Compute the wake on lan crc hashes for the packet header
3281 * we are interested in.
3282 */
3283
3284static u16 wol_calc_crc(int size, u8 * pattern, u8 *mask_pattern)
3285{
3286 u16 crc = 0xFFFF;
3287 u8 mask;
3288 int i, j;
3289
3290 for (i = 0; i < size; i++) {
3291 mask = mask_pattern[i];
3292
3293 /* Skip this loop if the mask equals to zero */
3294 if (mask == 0x00)
3295 continue;
3296
3297 for (j = 0; j < 8; j++) {
3298 if ((mask & 0x01) == 0) {
3299 mask >>= 1;
3300 continue;
3301 }
3302 mask >>= 1;
3303 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
3304 }
3305 }
3306 /* Finally, invert the result once to get the correct data */
3307 crc = ~crc;
906d66df 3308 return bitrev32(crc) >> 16;
1da177e4
LT		 3309}
3310
3311/**
3312 * velocity_set_wol - set up for wake on lan
3313 * @vptr: velocity to set WOL status on
3314 *
3315 * Set a card up for wake on lan either by unicast or by
3316 * ARP packet.
3317 *
3318 * FIXME: check static buffer is safe here
3319 */
3320
3321static int velocity_set_wol(struct velocity_info *vptr)
3322{
3323 struct mac_regs __iomem * regs = vptr->mac_regs;
3324 static u8 buf[256];
3325 int i;
3326
3327 static u32 mask_pattern[2][4] = {
3328 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
3329 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
3330 };
3331
3332 writew(0xFFFF, &regs->WOLCRClr);
3333 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
3334 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
3335
3336 /*
3337 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3338 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
3339 */
3340
3341 if (vptr->wol_opts & VELOCITY_WOL_UCAST) {
3342 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
3343 }
3344
3345 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
3346 struct arp_packet *arp = (struct arp_packet *) buf;
3347 u16 crc;
3348 memset(buf, 0, sizeof(struct arp_packet) + 7);
3349
3350 for (i = 0; i < 4; i++)
3351 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
3352
3353 arp->type = htons(ETH_P_ARP);
3354 arp->ar_op = htons(1);
3355
3356 memcpy(arp->ar_tip, vptr->ip_addr, 4);
3357
3358 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
3359 (u8 *) & mask_pattern[0][0]);
3360
3361 writew(crc, &regs->PatternCRC[0]);
3362 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
3363 }
3364
3365 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
3366 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
3367
3368 writew(0x0FFF, &regs->WOLSRClr);
3369
3370 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
3371 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3372 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
3373
3374 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
3375 }
3376
3377 if (vptr->mii_status & VELOCITY_SPEED_1000)
3378 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
3379
3380 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
3381
3382 {
3383 u8 GCR;
3384 GCR = readb(&regs->CHIPGCR);
3385 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
3386 writeb(GCR, &regs->CHIPGCR);
3387 }
3388
3389 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
3390 /* Turn on SWPTAG just before entering power mode */
3391 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
3392 /* Go to bed ..... */
3393 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
3394
3395 return 0;
3396}
3397
3398static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3399{
3400 struct net_device *dev = pci_get_drvdata(pdev);
3401 struct velocity_info *vptr = netdev_priv(dev);
3402 unsigned long flags;
3403
3404 if(!netif_running(vptr->dev))
3405 return 0;
3406
3407 netif_device_detach(vptr->dev);
3408
3409 spin_lock_irqsave(&vptr->lock, flags);
3410 pci_save_state(pdev);
3411#ifdef ETHTOOL_GWOL
3412 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3413 velocity_get_ip(vptr);
3414 velocity_save_context(vptr, &vptr->context);
3415 velocity_shutdown(vptr);
3416 velocity_set_wol(vptr);
4a51c0d0 3417 pci_enable_wake(pdev, PCI_D3hot, 1);
1da177e4
LT		 3418 pci_set_power_state(pdev, PCI_D3hot);
3419 } else {
3420 velocity_save_context(vptr, &vptr->context);
3421 velocity_shutdown(vptr);
3422 pci_disable_device(pdev);
3423 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3424 }
3425#else
3426 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3427#endif
3428 spin_unlock_irqrestore(&vptr->lock, flags);
3429 return 0;
3430}
3431
3432static int velocity_resume(struct pci_dev *pdev)
3433{
3434 struct net_device *dev = pci_get_drvdata(pdev);
3435 struct velocity_info *vptr = netdev_priv(dev);
3436 unsigned long flags;
3437 int i;
3438
3439 if(!netif_running(vptr->dev))
3440 return 0;
3441
3442 pci_set_power_state(pdev, PCI_D0);
3443 pci_enable_wake(pdev, 0, 0);
3444 pci_restore_state(pdev);
3445
3446 mac_wol_reset(vptr->mac_regs);
3447
3448 spin_lock_irqsave(&vptr->lock, flags);
3449 velocity_restore_context(vptr, &vptr->context);
3450 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3451 mac_disable_int(vptr->mac_regs);
3452
3453 velocity_tx_srv(vptr, 0);
3454
0fe9f15e
FR		 3455 for (i = 0; i < vptr->tx.numq; i++) {
3456 if (vptr->tx.used[i]) {
1da177e4
LT		 3457 mac_tx_queue_wake(vptr->mac_regs, i);
3458 }
3459 }
3460
3461 mac_enable_int(vptr->mac_regs);
3462 spin_unlock_irqrestore(&vptr->lock, flags);
3463 netif_device_attach(vptr->dev);
3464
3465 return 0;
3466}
3467
ce9f7fe3
RD		 3468#ifdef CONFIG_INET
3469
1da177e4
LT		 3470static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3471{
3472 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
a337499f
DL		 3473 struct net_device *dev = ifa->ifa_dev->dev;
3474 struct velocity_info *vptr;
3475 unsigned long flags;
1da177e4 3476
c346dca1 3477 if (dev_net(dev) != &init_net)
6133fb1a
DL		 3478 return NOTIFY_DONE;
3479
a337499f
DL		 3480 spin_lock_irqsave(&velocity_dev_list_lock, flags);
3481 list_for_each_entry(vptr, &velocity_dev_list, list) {
3482 if (vptr->dev == dev) {
3483 velocity_get_ip(vptr);
3484 break;
1da177e4 3485 }
1da177e4 3486 }
a337499f
DL		 3487 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
3488
1da177e4
LT		 3489 return NOTIFY_DONE;
3490}
ce9f7fe3
RD		 3491
3492#endif
1da177e4 3493#endif
Linux kernel - Deliverables
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