projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
e1000: convert to net_device_ops
[deliverable/linux.git] / drivers / net / via-velocity.c
CommitLineData
1da177e4
LT		 1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
1da177e4
LT		 11 * rx_copybreak/alignment
12 * Scatter gather
13 * More testing
14 *
113aa838 15 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk>
1da177e4
LT		 16 * Additional fixes and clean up: Francois Romieu
17 *
18 * This source has not been verified for use in safety critical systems.
19 *
20 * Please direct queries about the revamped driver to the linux-kernel
21 * list not VIA.
22 *
23 * Original code:
24 *
25 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
26 * All rights reserved.
27 *
28 * This software may be redistributed and/or modified under
29 * the terms of the GNU General Public License as published by the Free
30 * Software Foundation; either version 2 of the License, or
31 * any later version.
32 *
33 * This program is distributed in the hope that it will be useful, but
34 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
35 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
36 * for more details.
37 *
38 * Author: Chuang Liang-Shing, AJ Jiang
39 *
40 * Date: Jan 24, 2003
41 *
42 * MODULE_LICENSE("GPL");
43 *
44 */
45
46
47#include <linux/module.h>
48#include <linux/types.h>
1da177e4
LT		 49#include <linux/init.h>
50#include <linux/mm.h>
51#include <linux/errno.h>
52#include <linux/ioport.h>
53#include <linux/pci.h>
54#include <linux/kernel.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/skbuff.h>
58#include <linux/delay.h>
59#include <linux/timer.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
1da177e4
LT		 62#include <linux/string.h>
63#include <linux/wait.h>
64#include <asm/io.h>
65#include <linux/if.h>
1da177e4
LT		 66#include <asm/uaccess.h>
67#include <linux/proc_fs.h>
68#include <linux/inetdevice.h>
69#include <linux/reboot.h>
70#include <linux/ethtool.h>
71#include <linux/mii.h>
72#include <linux/in.h>
73#include <linux/if_arp.h>
501e4d24 74#include <linux/if_vlan.h>
1da177e4
LT		 75#include <linux/ip.h>
76#include <linux/tcp.h>
77#include <linux/udp.h>
78#include <linux/crc-ccitt.h>
79#include <linux/crc32.h>
80
81#include "via-velocity.h"
82
83
84static int velocity_nics = 0;
85static int msglevel = MSG_LEVEL_INFO;
86
01faccbf
SH		 87/**
88 * mac_get_cam_mask - Read a CAM mask
89 * @regs: register block for this velocity
90 * @mask: buffer to store mask
91 *
92 * Fetch the mask bits of the selected CAM and store them into the
93 * provided mask buffer.
94 */
95
96static void mac_get_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
97{
98 int i;
99
100 /* Select CAM mask */
101 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
102
103 writeb(0, &regs->CAMADDR);
104
105 /* read mask */
106 for (i = 0; i < 8; i++)
107 *mask++ = readb(&(regs->MARCAM[i]));
108
109 /* disable CAMEN */
110 writeb(0, &regs->CAMADDR);
111
112 /* Select mar */
113 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
114
115}
116
117
118/**
119 * mac_set_cam_mask - Set a CAM mask
120 * @regs: register block for this velocity
121 * @mask: CAM mask to load
122 *
123 * Store a new mask into a CAM
124 */
125
126static void mac_set_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
127{
128 int i;
129 /* Select CAM mask */
130 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
131
132 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
133
134 for (i = 0; i < 8; i++) {
135 writeb(*mask++, &(regs->MARCAM[i]));
136 }
137 /* disable CAMEN */
138 writeb(0, &regs->CAMADDR);
139
140 /* Select mar */
141 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
142}
143
144static void mac_set_vlan_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
145{
146 int i;
147 /* Select CAM mask */
148 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
149
150 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
151
152 for (i = 0; i < 8; i++) {
153 writeb(*mask++, &(regs->MARCAM[i]));
154 }
155 /* disable CAMEN */
156 writeb(0, &regs->CAMADDR);
157
158 /* Select mar */
159 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
160}
161
162/**
163 * mac_set_cam - set CAM data
164 * @regs: register block of this velocity
165 * @idx: Cam index
166 * @addr: 2 or 6 bytes of CAM data
167 *
168 * Load an address or vlan tag into a CAM
169 */
170
171static void mac_set_cam(struct mac_regs __iomem * regs, int idx, const u8 *addr)
172{
173 int i;
174
175 /* Select CAM mask */
176 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
177
178 idx &= (64 - 1);
179
180 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
181
182 for (i = 0; i < 6; i++) {
183 writeb(*addr++, &(regs->MARCAM[i]));
184 }
185 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
186
187 udelay(10);
188
189 writeb(0, &regs->CAMADDR);
190
191 /* Select mar */
192 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
193}
194
195static void mac_set_vlan_cam(struct mac_regs __iomem * regs, int idx,
196 const u8 *addr)
197{
198
199 /* Select CAM mask */
200 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
201
202 idx &= (64 - 1);
203
204 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
205 writew(*((u16 *) addr), &regs->MARCAM[0]);
206
207 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
208
209 udelay(10);
210
211 writeb(0, &regs->CAMADDR);
212
213 /* Select mar */
214 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
215}
216
217
218/**
219 * mac_wol_reset - reset WOL after exiting low power
220 * @regs: register block of this velocity
221 *
222 * Called after we drop out of wake on lan mode in order to
223 * reset the Wake on lan features. This function doesn't restore
224 * the rest of the logic from the result of sleep/wakeup
225 */
226
227static void mac_wol_reset(struct mac_regs __iomem * regs)
228{
229
230 /* Turn off SWPTAG right after leaving power mode */
231 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
232 /* clear sticky bits */
233 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
234
235 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
236 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
237 /* disable force PME-enable */
238 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
239 /* disable power-event config bit */
240 writew(0xFFFF, &regs->WOLCRClr);
241 /* clear power status */
242 writew(0xFFFF, &regs->WOLSRClr);
243}
1da177e4
LT		 244
245static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
7282d491 246static const struct ethtool_ops velocity_ethtool_ops;
1da177e4
LT		 247
248/*
249 Define module options
250*/
251
252MODULE_AUTHOR("VIA Networking Technologies, Inc.");
253MODULE_LICENSE("GPL");
254MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
255
256#define VELOCITY_PARAM(N,D) \
257 static int N[MAX_UNITS]=OPTION_DEFAULT;\
258 module_param_array(N, int, NULL, 0); \
259 MODULE_PARM_DESC(N, D);
260
261#define RX_DESC_MIN 64
262#define RX_DESC_MAX 255
263#define RX_DESC_DEF 64
264VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
265
266#define TX_DESC_MIN 16
267#define TX_DESC_MAX 256
268#define TX_DESC_DEF 64
269VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
270
1da177e4
LT		 271#define RX_THRESH_MIN 0
272#define RX_THRESH_MAX 3
273#define RX_THRESH_DEF 0
274/* rx_thresh[] is used for controlling the receive fifo threshold.
275 0: indicate the rxfifo threshold is 128 bytes.
276 1: indicate the rxfifo threshold is 512 bytes.
277 2: indicate the rxfifo threshold is 1024 bytes.
278 3: indicate the rxfifo threshold is store & forward.
279*/
280VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
281
282#define DMA_LENGTH_MIN 0
283#define DMA_LENGTH_MAX 7
284#define DMA_LENGTH_DEF 0
285
286/* DMA_length[] is used for controlling the DMA length
287 0: 8 DWORDs
288 1: 16 DWORDs
289 2: 32 DWORDs
290 3: 64 DWORDs
291 4: 128 DWORDs
292 5: 256 DWORDs
293 6: SF(flush till emply)
294 7: SF(flush till emply)
295*/
296VELOCITY_PARAM(DMA_length, "DMA length");
297
1da177e4
LT		 298#define IP_ALIG_DEF 0
299/* IP_byte_align[] is used for IP header DWORD byte aligned
300 0: indicate the IP header won't be DWORD byte aligned.(Default) .
301 1: indicate the IP header will be DWORD byte aligned.
302 In some enviroment, the IP header should be DWORD byte aligned,
303 or the packet will be droped when we receive it. (eg: IPVS)
304*/
305VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
306
307#define TX_CSUM_DEF 1
308/* txcsum_offload[] is used for setting the checksum offload ability of NIC.
309 (We only support RX checksum offload now)
310 0: disable csum_offload[checksum offload
311 1: enable checksum offload. (Default)
312*/
313VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
314
315#define FLOW_CNTL_DEF 1
316#define FLOW_CNTL_MIN 1
317#define FLOW_CNTL_MAX 5
318
319/* flow_control[] is used for setting the flow control ability of NIC.
320 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
321 2: enable TX flow control.
322 3: enable RX flow control.
323 4: enable RX/TX flow control.
324 5: disable
325*/
326VELOCITY_PARAM(flow_control, "Enable flow control ability");
327
328#define MED_LNK_DEF 0
329#define MED_LNK_MIN 0
330#define MED_LNK_MAX 4
331/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
332 0: indicate autonegotiation for both speed and duplex mode
333 1: indicate 100Mbps half duplex mode
334 2: indicate 100Mbps full duplex mode
335 3: indicate 10Mbps half duplex mode
336 4: indicate 10Mbps full duplex mode
337
338 Note:
339 if EEPROM have been set to the force mode, this option is ignored
340 by driver.
341*/
342VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
343
344#define VAL_PKT_LEN_DEF 0
345/* ValPktLen[] is used for setting the checksum offload ability of NIC.
346 0: Receive frame with invalid layer 2 length (Default)
347 1: Drop frame with invalid layer 2 length
348*/
349VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
350
351#define WOL_OPT_DEF 0
352#define WOL_OPT_MIN 0
353#define WOL_OPT_MAX 7
354/* wol_opts[] is used for controlling wake on lan behavior.
355 0: Wake up if recevied a magic packet. (Default)
356 1: Wake up if link status is on/off.
357 2: Wake up if recevied an arp packet.
358 4: Wake up if recevied any unicast packet.
359 Those value can be sumed up to support more than one option.
360*/
361VELOCITY_PARAM(wol_opts, "Wake On Lan options");
362
363#define INT_WORKS_DEF 20
364#define INT_WORKS_MIN 10
365#define INT_WORKS_MAX 64
366
367VELOCITY_PARAM(int_works, "Number of packets per interrupt services");
368
369static int rx_copybreak = 200;
370module_param(rx_copybreak, int, 0644);
371MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
372
cabb7667
JG		 373static void velocity_init_info(struct pci_dev *pdev, struct velocity_info *vptr,
374 const struct velocity_info_tbl *info);
1da177e4
LT		 375static int velocity_get_pci_info(struct velocity_info *, struct pci_dev *pdev);
376static void velocity_print_info(struct velocity_info *vptr);
377static int velocity_open(struct net_device *dev);
378static int velocity_change_mtu(struct net_device *dev, int mtu);
379static int velocity_xmit(struct sk_buff *skb, struct net_device *dev);
7d12e780 380static int velocity_intr(int irq, void *dev_instance);
1da177e4
LT		 381static void velocity_set_multi(struct net_device *dev);
382static struct net_device_stats *velocity_get_stats(struct net_device *dev);
383static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
384static int velocity_close(struct net_device *dev);
385static int velocity_receive_frame(struct velocity_info *, int idx);
386static int velocity_alloc_rx_buf(struct velocity_info *, int idx);
387static void velocity_free_rd_ring(struct velocity_info *vptr);
388static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *);
389static int velocity_soft_reset(struct velocity_info *vptr);
390static void mii_init(struct velocity_info *vptr, u32 mii_status);
8a22dddb 391static u32 velocity_get_link(struct net_device *dev);
1da177e4
LT		 392static u32 velocity_get_opt_media_mode(struct velocity_info *vptr);
393static void velocity_print_link_status(struct velocity_info *vptr);
394static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs);
395static void velocity_shutdown(struct velocity_info *vptr);
396static void enable_flow_control_ability(struct velocity_info *vptr);
397static void enable_mii_autopoll(struct mac_regs __iomem * regs);
398static int velocity_mii_read(struct mac_regs __iomem *, u8 byIdx, u16 * pdata);
399static int velocity_mii_write(struct mac_regs __iomem *, u8 byMiiAddr, u16 data);
400static u32 mii_check_media_mode(struct mac_regs __iomem * regs);
401static u32 check_connection_type(struct mac_regs __iomem * regs);
402static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status);
403
404#ifdef CONFIG_PM
405
406static int velocity_suspend(struct pci_dev *pdev, pm_message_t state);
407static int velocity_resume(struct pci_dev *pdev);
408
ce9f7fe3
RD		 409static DEFINE_SPINLOCK(velocity_dev_list_lock);
410static LIST_HEAD(velocity_dev_list);
411
412#endif
413
414#if defined(CONFIG_PM) && defined(CONFIG_INET)
415
1da177e4
LT		 416static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr);
417
418static struct notifier_block velocity_inetaddr_notifier = {
419 .notifier_call = velocity_netdev_event,
420};
421
1da177e4
LT		 422static void velocity_register_notifier(void)
423{
424 register_inetaddr_notifier(&velocity_inetaddr_notifier);
425}
426
427static void velocity_unregister_notifier(void)
428{
429 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
430}
431
ce9f7fe3 432#else
1da177e4
LT		 433
434#define velocity_register_notifier() do {} while (0)
435#define velocity_unregister_notifier() do {} while (0)
436
ce9f7fe3 437#endif
1da177e4
LT		 438
439/*
440 * Internal board variants. At the moment we have only one
441 */
442
4f14b92f 443static struct velocity_info_tbl chip_info_table[] = {
cabb7667
JG		 444 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
445 { }
1da177e4
LT		 446};
447
448/*
449 * Describe the PCI device identifiers that we support in this
450 * device driver. Used for hotplug autoloading.
451 */
452
e54f4893
JG		 453static const struct pci_device_id velocity_id_table[] __devinitdata = {
454 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
455 { }
1da177e4
LT		 456};
457
458MODULE_DEVICE_TABLE(pci, velocity_id_table);
459
460/**
461 * get_chip_name - identifier to name
462 * @id: chip identifier
463 *
464 * Given a chip identifier return a suitable description. Returns
465 * a pointer a static string valid while the driver is loaded.
466 */
467
01faccbf 468static const char __devinit *get_chip_name(enum chip_type chip_id)
1da177e4
LT		 469{
470 int i;
471 for (i = 0; chip_info_table[i].name != NULL; i++)
472 if (chip_info_table[i].chip_id == chip_id)
473 break;
474 return chip_info_table[i].name;
475}
476
477/**
478 * velocity_remove1 - device unplug
479 * @pdev: PCI device being removed
480 *
481 * Device unload callback. Called on an unplug or on module
482 * unload for each active device that is present. Disconnects
483 * the device from the network layer and frees all the resources
484 */
485
486static void __devexit velocity_remove1(struct pci_dev *pdev)
487{
488 struct net_device *dev = pci_get_drvdata(pdev);
8ab6f3f7 489 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 490
491#ifdef CONFIG_PM
492 unsigned long flags;
493
494 spin_lock_irqsave(&velocity_dev_list_lock, flags);
495 if (!list_empty(&velocity_dev_list))
496 list_del(&vptr->list);
497 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
498#endif
499 unregister_netdev(dev);
500 iounmap(vptr->mac_regs);
501 pci_release_regions(pdev);
502 pci_disable_device(pdev);
503 pci_set_drvdata(pdev, NULL);
504 free_netdev(dev);
505
506 velocity_nics--;
507}
508
509/**
510 * velocity_set_int_opt - parser for integer options
511 * @opt: pointer to option value
512 * @val: value the user requested (or -1 for default)
513 * @min: lowest value allowed
514 * @max: highest value allowed
515 * @def: default value
516 * @name: property name
517 * @dev: device name
518 *
519 * Set an integer property in the module options. This function does
520 * all the verification and checking as well as reporting so that
521 * we don't duplicate code for each option.
522 */
523
07b5f6a6 524static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, const char *devname)
1da177e4
LT		 525{
526 if (val == -1)
527 *opt = def;
528 else if (val < min || val > max) {
529 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
530 devname, name, min, max);
531 *opt = def;
532 } else {
533 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
534 devname, name, val);
535 *opt = val;
536 }
537}
538
539/**
540 * velocity_set_bool_opt - parser for boolean options
541 * @opt: pointer to option value
542 * @val: value the user requested (or -1 for default)
543 * @def: default value (yes/no)
544 * @flag: numeric value to set for true.
545 * @name: property name
546 * @dev: device name
547 *
548 * Set a boolean property in the module options. This function does
549 * all the verification and checking as well as reporting so that
550 * we don't duplicate code for each option.
551 */
552
07b5f6a6 553static void __devinit velocity_set_bool_opt(u32 * opt, int val, int def, u32 flag, char *name, const char *devname)
1da177e4
LT		 554{
555 (*opt) &= (~flag);
556 if (val == -1)
557 *opt |= (def ? flag : 0);
558 else if (val < 0 || val > 1) {
6aa20a22 559 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT		 560 devname, name);
561 *opt |= (def ? flag : 0);
562 } else {
6aa20a22 563 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT		 564 devname, name, val ? "TRUE" : "FALSE");
565 *opt |= (val ? flag : 0);
566 }
567}
568
569/**
570 * velocity_get_options - set options on device
571 * @opts: option structure for the device
572 * @index: index of option to use in module options array
573 * @devname: device name
574 *
575 * Turn the module and command options into a single structure
576 * for the current device
577 */
578
07b5f6a6 579static void __devinit velocity_get_options(struct velocity_opt *opts, int index, const char *devname)
1da177e4
LT		 580{
581
582 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
583 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
584 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
585 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
501e4d24 586
1da177e4
LT		 587 velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname);
588 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
589 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
590 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
591 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
592 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
593 velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname);
594 opts->numrx = (opts->numrx & ~3);
595}
596
597/**
598 * velocity_init_cam_filter - initialise CAM
599 * @vptr: velocity to program
600 *
601 * Initialize the content addressable memory used for filters. Load
602 * appropriately according to the presence of VLAN
603 */
604
605static void velocity_init_cam_filter(struct velocity_info *vptr)
606{
607 struct mac_regs __iomem * regs = vptr->mac_regs;
608
609 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
610 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
611 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
612
613 /* Disable all CAMs */
614 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
615 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
01faccbf
SH		 616 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
617 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4 618
d4f73c8e 619 /* Enable VCAMs */
501e4d24 620 if (vptr->vlgrp) {
d4f73c8e
FR		 621 unsigned int vid, i = 0;
622
623 if (!vlan_group_get_device(vptr->vlgrp, 0))
624 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
501e4d24 625
d4f73c8e
FR		 626 for (vid = 1; (vid < VLAN_VID_MASK); vid++) {
627 if (vlan_group_get_device(vptr->vlgrp, vid)) {
628 mac_set_vlan_cam(regs, i, (u8 *) &vid);
629 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
630 if (++i >= VCAM_SIZE)
631 break;
501e4d24
SH		 632 }
633 }
01faccbf 634 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
1da177e4
LT		 635 }
636}
637
d4f73c8e
FR		 638static void velocity_vlan_rx_register(struct net_device *dev,
639 struct vlan_group *grp)
640{
641 struct velocity_info *vptr = netdev_priv(dev);
642
643 vptr->vlgrp = grp;
644}
645
501e4d24
SH		 646static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
647{
648 struct velocity_info *vptr = netdev_priv(dev);
649
650 spin_lock_irq(&vptr->lock);
651 velocity_init_cam_filter(vptr);
652 spin_unlock_irq(&vptr->lock);
653}
654
655static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
656{
657 struct velocity_info *vptr = netdev_priv(dev);
658
659 spin_lock_irq(&vptr->lock);
660 vlan_group_set_device(vptr->vlgrp, vid, NULL);
661 velocity_init_cam_filter(vptr);
662 spin_unlock_irq(&vptr->lock);
663}
664
3c4dc711
FR		 665static void velocity_init_rx_ring_indexes(struct velocity_info *vptr)
666{
667 vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0;
668}
501e4d24 669
1da177e4
LT		 670/**
671 * velocity_rx_reset - handle a receive reset
672 * @vptr: velocity we are resetting
673 *
674 * Reset the ownership and status for the receive ring side.
675 * Hand all the receive queue to the NIC.
676 */
677
678static void velocity_rx_reset(struct velocity_info *vptr)
679{
680
681 struct mac_regs __iomem * regs = vptr->mac_regs;
682 int i;
683
3c4dc711 684 velocity_init_rx_ring_indexes(vptr);
1da177e4
LT		 685
686 /*
687 * Init state, all RD entries belong to the NIC
688 */
689 for (i = 0; i < vptr->options.numrx; ++i)
0fe9f15e 690 vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 691
692 writew(vptr->options.numrx, &regs->RBRDU);
0fe9f15e 693 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1da177e4
LT		 694 writew(0, &regs->RDIdx);
695 writew(vptr->options.numrx - 1, &regs->RDCSize);
696}
697
698/**
699 * velocity_init_registers - initialise MAC registers
700 * @vptr: velocity to init
701 * @type: type of initialisation (hot or cold)
702 *
703 * Initialise the MAC on a reset or on first set up on the
704 * hardware.
705 */
706
6aa20a22 707static void velocity_init_registers(struct velocity_info *vptr,
1da177e4
LT		 708 enum velocity_init_type type)
709{
710 struct mac_regs __iomem * regs = vptr->mac_regs;
711 int i, mii_status;
712
713 mac_wol_reset(regs);
714
715 switch (type) {
716 case VELOCITY_INIT_RESET:
717 case VELOCITY_INIT_WOL:
718
719 netif_stop_queue(vptr->dev);
720
721 /*
722 * Reset RX to prevent RX pointer not on the 4X location
723 */
724 velocity_rx_reset(vptr);
725 mac_rx_queue_run(regs);
726 mac_rx_queue_wake(regs);
727
728 mii_status = velocity_get_opt_media_mode(vptr);
729 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
730 velocity_print_link_status(vptr);
731 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
732 netif_wake_queue(vptr->dev);
733 }
734
735 enable_flow_control_ability(vptr);
736
737 mac_clear_isr(regs);
738 writel(CR0_STOP, &regs->CR0Clr);
6aa20a22 739 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1da177e4
LT		 740 &regs->CR0Set);
741
742 break;
743
744 case VELOCITY_INIT_COLD:
745 default:
746 /*
747 * Do reset
748 */
749 velocity_soft_reset(vptr);
750 mdelay(5);
751
752 mac_eeprom_reload(regs);
753 for (i = 0; i < 6; i++) {
754 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
755 }
756 /*
757 * clear Pre_ACPI bit.
758 */
759 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
760 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
761 mac_set_dma_length(regs, vptr->options.DMA_length);
762
763 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
764 /*
765 * Back off algorithm use original IEEE standard
766 */
767 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
768
769 /*
770 * Init CAM filter
771 */
772 velocity_init_cam_filter(vptr);
773
774 /*
775 * Set packet filter: Receive directed and broadcast address
776 */
777 velocity_set_multi(vptr->dev);
778
779 /*
780 * Enable MII auto-polling
781 */
782 enable_mii_autopoll(regs);
783
784 vptr->int_mask = INT_MASK_DEF;
785
0fe9f15e 786 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1da177e4
LT		 787 writew(vptr->options.numrx - 1, &regs->RDCSize);
788 mac_rx_queue_run(regs);
789 mac_rx_queue_wake(regs);
790
791 writew(vptr->options.numtx - 1, &regs->TDCSize);
792
0fe9f15e
FR		 793 for (i = 0; i < vptr->tx.numq; i++) {
794 writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
1da177e4
LT		 795 mac_tx_queue_run(regs, i);
796 }
797
798 init_flow_control_register(vptr);
799
800 writel(CR0_STOP, &regs->CR0Clr);
801 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
802
803 mii_status = velocity_get_opt_media_mode(vptr);
804 netif_stop_queue(vptr->dev);
805
806 mii_init(vptr, mii_status);
807
808 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
809 velocity_print_link_status(vptr);
810 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
811 netif_wake_queue(vptr->dev);
812 }
813
814 enable_flow_control_ability(vptr);
815 mac_hw_mibs_init(regs);
816 mac_write_int_mask(vptr->int_mask, regs);
817 mac_clear_isr(regs);
818
819 }
820}
821
822/**
823 * velocity_soft_reset - soft reset
824 * @vptr: velocity to reset
825 *
826 * Kick off a soft reset of the velocity adapter and then poll
827 * until the reset sequence has completed before returning.
828 */
829
830static int velocity_soft_reset(struct velocity_info *vptr)
831{
832 struct mac_regs __iomem * regs = vptr->mac_regs;
833 int i = 0;
834
835 writel(CR0_SFRST, &regs->CR0Set);
836
837 for (i = 0; i < W_MAX_TIMEOUT; i++) {
838 udelay(5);
839 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
840 break;
841 }
842
843 if (i == W_MAX_TIMEOUT) {
844 writel(CR0_FORSRST, &regs->CR0Set);
845 /* FIXME: PCI POSTING */
846 /* delay 2ms */
847 mdelay(2);
848 }
849 return 0;
850}
851
852/**
853 * velocity_found1 - set up discovered velocity card
854 * @pdev: PCI device
855 * @ent: PCI device table entry that matched
856 *
857 * Configure a discovered adapter from scratch. Return a negative
858 * errno error code on failure paths.
859 */
860
861static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
862{
863 static int first = 1;
864 struct net_device *dev;
865 int i;
07b5f6a6 866 const char *drv_string;
cabb7667 867 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
1da177e4
LT		 868 struct velocity_info *vptr;
869 struct mac_regs __iomem * regs;
870 int ret = -ENOMEM;
871
e54f4893
JG		 872 /* FIXME: this driver, like almost all other ethernet drivers,
873 * can support more than MAX_UNITS.
874 */
1da177e4 875 if (velocity_nics >= MAX_UNITS) {
6aa20a22 876 dev_notice(&pdev->dev, "already found %d NICs.\n",
e54f4893 877 velocity_nics);
1da177e4
LT		 878 return -ENODEV;
879 }
880
881 dev = alloc_etherdev(sizeof(struct velocity_info));
e54f4893 882 if (!dev) {
9b91cf9d 883 dev_err(&pdev->dev, "allocate net device failed.\n");
1da177e4
LT		 884 goto out;
885 }
6aa20a22 886
1da177e4 887 /* Chain it all together */
6aa20a22 888
1da177e4 889 SET_NETDEV_DEV(dev, &pdev->dev);
8ab6f3f7 890 vptr = netdev_priv(dev);
1da177e4
LT		 891
892
893 if (first) {
6aa20a22 894 printk(KERN_INFO "%s Ver. %s\n",
1da177e4
LT		 895 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
896 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
897 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
898 first = 0;
899 }
900
901 velocity_init_info(pdev, vptr, info);
902
903 vptr->dev = dev;
904
905 dev->irq = pdev->irq;
906
907 ret = pci_enable_device(pdev);
6aa20a22 908 if (ret < 0)
1da177e4
LT		 909 goto err_free_dev;
910
911 ret = velocity_get_pci_info(vptr, pdev);
912 if (ret < 0) {
e54f4893 913 /* error message already printed */
1da177e4
LT		 914 goto err_disable;
915 }
916
917 ret = pci_request_regions(pdev, VELOCITY_NAME);
918 if (ret < 0) {
9b91cf9d 919 dev_err(&pdev->dev, "No PCI resources.\n");
1da177e4
LT		 920 goto err_disable;
921 }
922
cabb7667 923 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
1da177e4
LT		 924 if (regs == NULL) {
925 ret = -EIO;
926 goto err_release_res;
927 }
928
929 vptr->mac_regs = regs;
930
931 mac_wol_reset(regs);
932
933 dev->base_addr = vptr->ioaddr;
934
935 for (i = 0; i < 6; i++)
936 dev->dev_addr[i] = readb(&regs->PAR[i]);
937
938
07b5f6a6
SH		 939 drv_string = dev_driver_string(&pdev->dev);
940
941 velocity_get_options(&vptr->options, velocity_nics, drv_string);
1da177e4 942
6aa20a22 943 /*
1da177e4
LT		 944 * Mask out the options cannot be set to the chip
945 */
6aa20a22 946
1da177e4
LT		 947 vptr->options.flags &= info->flags;
948
949 /*
950 * Enable the chip specified capbilities
951 */
6aa20a22 952
1da177e4
LT		 953 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
954
955 vptr->wol_opts = vptr->options.wol_opts;
956 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
957
958 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
959
960 dev->irq = pdev->irq;
961 dev->open = velocity_open;
962 dev->hard_start_xmit = velocity_xmit;
963 dev->stop = velocity_close;
964 dev->get_stats = velocity_get_stats;
965 dev->set_multicast_list = velocity_set_multi;
966 dev->do_ioctl = velocity_ioctl;
967 dev->ethtool_ops = &velocity_ethtool_ops;
968 dev->change_mtu = velocity_change_mtu;
501e4d24
SH		 969
970 dev->vlan_rx_add_vid = velocity_vlan_rx_add_vid;
971 dev->vlan_rx_kill_vid = velocity_vlan_rx_kill_vid;
d4f73c8e 972 dev->vlan_rx_register = velocity_vlan_rx_register;
501e4d24 973
1da177e4
LT		 974#ifdef VELOCITY_ZERO_COPY_SUPPORT
975 dev->features |= NETIF_F_SG;
976#endif
d4f73c8e
FR		 977 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
978 NETIF_F_HW_VLAN_RX;
1da177e4 979
501e4d24 980 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM)
9f3f46b5 981 dev->features |= NETIF_F_IP_CSUM;
1da177e4
LT		 982
983 ret = register_netdev(dev);
984 if (ret < 0)
985 goto err_iounmap;
986
8a22dddb
FR		 987 if (velocity_get_link(dev))
988 netif_carrier_off(dev);
989
1da177e4
LT		 990 velocity_print_info(vptr);
991 pci_set_drvdata(pdev, dev);
6aa20a22 992
1da177e4 993 /* and leave the chip powered down */
6aa20a22 994
1da177e4
LT		 995 pci_set_power_state(pdev, PCI_D3hot);
996#ifdef CONFIG_PM
997 {
998 unsigned long flags;
999
1000 spin_lock_irqsave(&velocity_dev_list_lock, flags);
1001 list_add(&vptr->list, &velocity_dev_list);
1002 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
1003 }
1004#endif
1005 velocity_nics++;
1006out:
1007 return ret;
1008
1009err_iounmap:
1010 iounmap(regs);
1011err_release_res:
1012 pci_release_regions(pdev);
1013err_disable:
1014 pci_disable_device(pdev);
1015err_free_dev:
1016 free_netdev(dev);
1017 goto out;
1018}
1019
1020/**
1021 * velocity_print_info - per driver data
1022 * @vptr: velocity
1023 *
1024 * Print per driver data as the kernel driver finds Velocity
1025 * hardware
1026 */
1027
1028static void __devinit velocity_print_info(struct velocity_info *vptr)
1029{
1030 struct net_device *dev = vptr->dev;
1031
1032 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
6aa20a22
JG		 1033 printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
1034 dev->name,
1035 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1da177e4
LT		 1036 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1037}
1038
1039/**
1040 * velocity_init_info - init private data
1041 * @pdev: PCI device
1042 * @vptr: Velocity info
1043 * @info: Board type
1044 *
1045 * Set up the initial velocity_info struct for the device that has been
1046 * discovered.
1047 */
1048
cabb7667
JG		 1049static void __devinit velocity_init_info(struct pci_dev *pdev,
1050 struct velocity_info *vptr,
1051 const struct velocity_info_tbl *info)
1da177e4
LT		 1052{
1053 memset(vptr, 0, sizeof(struct velocity_info));
1054
1055 vptr->pdev = pdev;
1056 vptr->chip_id = info->chip_id;
0fe9f15e 1057 vptr->tx.numq = info->txqueue;
1da177e4
LT		 1058 vptr->multicast_limit = MCAM_SIZE;
1059 spin_lock_init(&vptr->lock);
1060 INIT_LIST_HEAD(&vptr->list);
1061}
1062
1063/**
1064 * velocity_get_pci_info - retrieve PCI info for device
1065 * @vptr: velocity device
1066 * @pdev: PCI device it matches
1067 *
1068 * Retrieve the PCI configuration space data that interests us from
1069 * the kernel PCI layer
1070 */
1071
1072static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
1073{
44c10138 1074 vptr->rev_id = pdev->revision;
6aa20a22 1075
1da177e4
LT		 1076 pci_set_master(pdev);
1077
1078 vptr->ioaddr = pci_resource_start(pdev, 0);
1079 vptr->memaddr = pci_resource_start(pdev, 1);
6aa20a22 1080
e54f4893 1081 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
9b91cf9d 1082 dev_err(&pdev->dev,
e54f4893 1083 "region #0 is not an I/O resource, aborting.\n");
1da177e4
LT		 1084 return -EINVAL;
1085 }
1086
e54f4893 1087 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
9b91cf9d 1088 dev_err(&pdev->dev,
e54f4893 1089 "region #1 is an I/O resource, aborting.\n");
1da177e4
LT		 1090 return -EINVAL;
1091 }
1092
cabb7667 1093 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
9b91cf9d 1094 dev_err(&pdev->dev, "region #1 is too small.\n");
1da177e4
LT		 1095 return -EINVAL;
1096 }
1097 vptr->pdev = pdev;
1098
1099 return 0;
1100}
1101
1102/**
3c4dc711 1103 * velocity_init_dma_rings - set up DMA rings
1da177e4
LT		 1104 * @vptr: Velocity to set up
1105 *
1106 * Allocate PCI mapped DMA rings for the receive and transmit layer
1107 * to use.
1108 */
1109
3c4dc711 1110static int velocity_init_dma_rings(struct velocity_info *vptr)
1da177e4 1111{
8ac53afc
FR		 1112 struct velocity_opt *opt = &vptr->options;
1113 const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
1114 const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
1115 struct pci_dev *pdev = vptr->pdev;
1da177e4 1116 dma_addr_t pool_dma;
8ac53afc
FR		 1117 void *pool;
1118 unsigned int i;
1da177e4
LT		 1119
1120 /*
8ac53afc
FR		 1121 * Allocate all RD/TD rings a single pool.
1122 *
1da177e4
LT		 1123 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1124 * alignment
1125 */
0fe9f15e 1126 pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq +
8ac53afc
FR		 1127 rx_ring_size, &pool_dma);
1128 if (!pool) {
1129 dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
1130 vptr->dev->name);
1da177e4
LT		 1131 return -ENOMEM;
1132 }
1133
0fe9f15e
FR		 1134 vptr->rx.ring = pool;
1135 vptr->rx.pool_dma = pool_dma;
1da177e4 1136
8ac53afc
FR		 1137 pool += rx_ring_size;
1138 pool_dma += rx_ring_size;
1da177e4 1139
0fe9f15e
FR		 1140 for (i = 0; i < vptr->tx.numq; i++) {
1141 vptr->tx.rings[i] = pool;
1142 vptr->tx.pool_dma[i] = pool_dma;
8ac53afc
FR		 1143 pool += tx_ring_size;
1144 pool_dma += tx_ring_size;
1da177e4 1145 }
8ac53afc 1146
1da177e4
LT		 1147 return 0;
1148}
1149
1150/**
3c4dc711 1151 * velocity_free_dma_rings - free PCI ring pointers
1da177e4
LT		 1152 * @vptr: Velocity to free from
1153 *
1154 * Clean up the PCI ring buffers allocated to this velocity.
1155 */
1156
3c4dc711 1157static void velocity_free_dma_rings(struct velocity_info *vptr)
1da177e4 1158{
580a6902 1159 const int size = vptr->options.numrx * sizeof(struct rx_desc) +
0fe9f15e 1160 vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq;
1da177e4 1161
0fe9f15e 1162 pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma);
1da177e4
LT		 1163}
1164
28133176 1165static void velocity_give_many_rx_descs(struct velocity_info *vptr)
1da177e4
LT		 1166{
1167 struct mac_regs __iomem *regs = vptr->mac_regs;
1168 int avail, dirty, unusable;
1169
1170 /*
1171 * RD number must be equal to 4X per hardware spec
1172 * (programming guide rev 1.20, p.13)
1173 */
0fe9f15e 1174 if (vptr->rx.filled < 4)
1da177e4
LT		 1175 return;
1176
1177 wmb();
1178
0fe9f15e
FR		 1179 unusable = vptr->rx.filled & 0x0003;
1180 dirty = vptr->rx.dirty - unusable;
1181 for (avail = vptr->rx.filled & 0xfffc; avail; avail--) {
1da177e4 1182 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
0fe9f15e 1183 vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 1184 }
1185
0fe9f15e
FR		 1186 writew(vptr->rx.filled & 0xfffc, &regs->RBRDU);
1187 vptr->rx.filled = unusable;
1da177e4
LT		 1188}
1189
1190static int velocity_rx_refill(struct velocity_info *vptr)
1191{
0fe9f15e 1192 int dirty = vptr->rx.dirty, done = 0;
1da177e4
LT		 1193
1194 do {
0fe9f15e 1195 struct rx_desc *rd = vptr->rx.ring + dirty;
1da177e4
LT		 1196
1197 /* Fine for an all zero Rx desc at init time as well */
4a51c0d0 1198 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1199 break;
1200
0fe9f15e 1201 if (!vptr->rx.info[dirty].skb) {
28133176 1202 if (velocity_alloc_rx_buf(vptr, dirty) < 0)
1da177e4
LT		 1203 break;
1204 }
1205 done++;
6aa20a22 1206 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
0fe9f15e 1207 } while (dirty != vptr->rx.curr);
1da177e4
LT		 1208
1209 if (done) {
0fe9f15e
FR		 1210 vptr->rx.dirty = dirty;
1211 vptr->rx.filled += done;
1da177e4
LT		 1212 }
1213
28133176 1214 return done;
1da177e4
LT		 1215}
1216
9088d9a4
FR		 1217static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
1218{
0fe9f15e 1219 vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
9088d9a4
FR		 1220}
1221
1da177e4
LT		 1222/**
1223 * velocity_init_rd_ring - set up receive ring
1224 * @vptr: velocity to configure
1225 *
1226 * Allocate and set up the receive buffers for each ring slot and
1227 * assign them to the network adapter.
1228 */
1229
1230static int velocity_init_rd_ring(struct velocity_info *vptr)
1231{
28133176 1232 int ret = -ENOMEM;
48f6b053 1233
0fe9f15e 1234 vptr->rx.info = kcalloc(vptr->options.numrx,
ae94607d 1235 sizeof(struct velocity_rd_info), GFP_KERNEL);
0fe9f15e 1236 if (!vptr->rx.info)
28133176 1237 goto out;
1da177e4 1238
3c4dc711 1239 velocity_init_rx_ring_indexes(vptr);
1da177e4 1240
28133176 1241 if (velocity_rx_refill(vptr) != vptr->options.numrx) {
1da177e4
LT		 1242 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1243 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1244 velocity_free_rd_ring(vptr);
28133176 1245 goto out;
1da177e4 1246 }
ae94607d 1247
28133176
FR		 1248 ret = 0;
1249out:
1da177e4
LT		 1250 return ret;
1251}
1252
1253/**
1254 * velocity_free_rd_ring - free receive ring
1255 * @vptr: velocity to clean up
1256 *
1257 * Free the receive buffers for each ring slot and any
1258 * attached socket buffers that need to go away.
1259 */
1260
1261static void velocity_free_rd_ring(struct velocity_info *vptr)
1262{
1263 int i;
1264
0fe9f15e 1265 if (vptr->rx.info == NULL)
1da177e4
LT		 1266 return;
1267
1268 for (i = 0; i < vptr->options.numrx; i++) {
0fe9f15e
FR		 1269 struct velocity_rd_info *rd_info = &(vptr->rx.info[i]);
1270 struct rx_desc *rd = vptr->rx.ring + i;
b3c3e7d7
FR		 1271
1272 memset(rd, 0, sizeof(*rd));
1da177e4
LT		 1273
1274 if (!rd_info->skb)
1275 continue;
0fe9f15e 1276 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
1da177e4 1277 PCI_DMA_FROMDEVICE);
822f1a57 1278 rd_info->skb_dma = 0;
1da177e4
LT		 1279
1280 dev_kfree_skb(rd_info->skb);
1281 rd_info->skb = NULL;
1282 }
1283
0fe9f15e
FR		 1284 kfree(vptr->rx.info);
1285 vptr->rx.info = NULL;
1da177e4
LT		 1286}
1287
1288/**
1289 * velocity_init_td_ring - set up transmit ring
1290 * @vptr: velocity
1291 *
1292 * Set up the transmit ring and chain the ring pointers together.
1293 * Returns zero on success or a negative posix errno code for
1294 * failure.
1295 */
6aa20a22 1296
1da177e4
LT		 1297static int velocity_init_td_ring(struct velocity_info *vptr)
1298{
1da177e4 1299 dma_addr_t curr;
580a6902 1300 unsigned int j;
1da177e4
LT		 1301
1302 /* Init the TD ring entries */
0fe9f15e
FR		 1303 for (j = 0; j < vptr->tx.numq; j++) {
1304 curr = vptr->tx.pool_dma[j];
1da177e4 1305
0fe9f15e 1306 vptr->tx.infos[j] = kcalloc(vptr->options.numtx,
ae94607d
MK		 1307 sizeof(struct velocity_td_info),
1308 GFP_KERNEL);
0fe9f15e 1309 if (!vptr->tx.infos[j]) {
1da177e4 1310 while(--j >= 0)
0fe9f15e 1311 kfree(vptr->tx.infos[j]);
1da177e4
LT		 1312 return -ENOMEM;
1313 }
1da177e4 1314
0fe9f15e 1315 vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0;
1da177e4
LT		 1316 }
1317 return 0;
1318}
1319
1320/*
1321 * FIXME: could we merge this with velocity_free_tx_buf ?
1322 */
1323
1324static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1325 int q, int n)
1326{
0fe9f15e 1327 struct velocity_td_info * td_info = &(vptr->tx.infos[q][n]);
1da177e4 1328 int i;
6aa20a22 1329
1da177e4
LT		 1330 if (td_info == NULL)
1331 return;
6aa20a22 1332
1da177e4
LT		 1333 if (td_info->skb) {
1334 for (i = 0; i < td_info->nskb_dma; i++)
1335 {
1336 if (td_info->skb_dma[i]) {
6aa20a22 1337 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1da177e4 1338 td_info->skb->len, PCI_DMA_TODEVICE);
822f1a57 1339 td_info->skb_dma[i] = 0;
1da177e4
LT		 1340 }
1341 }
1342 dev_kfree_skb(td_info->skb);
1343 td_info->skb = NULL;
1344 }
1345}
1346
1347/**
1348 * velocity_free_td_ring - free td ring
1349 * @vptr: velocity
1350 *
1351 * Free up the transmit ring for this particular velocity adapter.
1352 * We free the ring contents but not the ring itself.
1353 */
6aa20a22 1354
1da177e4
LT		 1355static void velocity_free_td_ring(struct velocity_info *vptr)
1356{
1357 int i, j;
1358
0fe9f15e
FR		 1359 for (j = 0; j < vptr->tx.numq; j++) {
1360 if (vptr->tx.infos[j] == NULL)
1da177e4
LT		 1361 continue;
1362 for (i = 0; i < vptr->options.numtx; i++) {
1363 velocity_free_td_ring_entry(vptr, j, i);
1364
1365 }
0fe9f15e
FR		 1366 kfree(vptr->tx.infos[j]);
1367 vptr->tx.infos[j] = NULL;
1da177e4
LT		 1368 }
1369}
1370
1371/**
1372 * velocity_rx_srv - service RX interrupt
1373 * @vptr: velocity
1374 * @status: adapter status (unused)
1375 *
1376 * Walk the receive ring of the velocity adapter and remove
1377 * any received packets from the receive queue. Hand the ring
1378 * slots back to the adapter for reuse.
1379 */
6aa20a22 1380
1da177e4
LT		 1381static int velocity_rx_srv(struct velocity_info *vptr, int status)
1382{
1383 struct net_device_stats *stats = &vptr->stats;
0fe9f15e 1384 int rd_curr = vptr->rx.curr;
1da177e4
LT		 1385 int works = 0;
1386
1387 do {
0fe9f15e 1388 struct rx_desc *rd = vptr->rx.ring + rd_curr;
1da177e4 1389
0fe9f15e 1390 if (!vptr->rx.info[rd_curr].skb)
1da177e4
LT		 1391 break;
1392
4a51c0d0 1393 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1394 break;
1395
1396 rmb();
1397
1398 /*
1399 * Don't drop CE or RL error frame although RXOK is off
1400 */
4a51c0d0 1401 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
1da177e4
LT		 1402 if (velocity_receive_frame(vptr, rd_curr) < 0)
1403 stats->rx_dropped++;
1404 } else {
1405 if (rd->rdesc0.RSR & RSR_CRC)
1406 stats->rx_crc_errors++;
1407 if (rd->rdesc0.RSR & RSR_FAE)
1408 stats->rx_frame_errors++;
1409
1410 stats->rx_dropped++;
1411 }
1412
4a51c0d0 1413 rd->size |= RX_INTEN;
1da177e4 1414
1da177e4
LT		 1415 rd_curr++;
1416 if (rd_curr >= vptr->options.numrx)
1417 rd_curr = 0;
1418 } while (++works <= 15);
1419
0fe9f15e 1420 vptr->rx.curr = rd_curr;
1da177e4 1421
28133176
FR		 1422 if ((works > 0) && (velocity_rx_refill(vptr) > 0))
1423 velocity_give_many_rx_descs(vptr);
1da177e4
LT		 1424
1425 VAR_USED(stats);
1426 return works;
1427}
1428
1429/**
1430 * velocity_rx_csum - checksum process
1431 * @rd: receive packet descriptor
1432 * @skb: network layer packet buffer
1433 *
1434 * Process the status bits for the received packet and determine
1435 * if the checksum was computed and verified by the hardware
1436 */
6aa20a22 1437
1da177e4
LT		 1438static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1439{
1440 skb->ip_summed = CHECKSUM_NONE;
1441
1442 if (rd->rdesc1.CSM & CSM_IPKT) {
1443 if (rd->rdesc1.CSM & CSM_IPOK) {
6aa20a22 1444 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1da177e4
LT		 1445 (rd->rdesc1.CSM & CSM_UDPKT)) {
1446 if (!(rd->rdesc1.CSM & CSM_TUPOK)) {
1447 return;
1448 }
1449 }
1450 skb->ip_summed = CHECKSUM_UNNECESSARY;
1451 }
1452 }
1453}
1454
1455/**
1456 * velocity_rx_copy - in place Rx copy for small packets
1457 * @rx_skb: network layer packet buffer candidate
1458 * @pkt_size: received data size
1459 * @rd: receive packet descriptor
1460 * @dev: network device
1461 *
1462 * Replace the current skb that is scheduled for Rx processing by a
1463 * shorter, immediatly allocated skb, if the received packet is small
1464 * enough. This function returns a negative value if the received
1465 * packet is too big or if memory is exhausted.
1466 */
c73d2589
SH		 1467static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1468 struct velocity_info *vptr)
1da177e4
LT		 1469{
1470 int ret = -1;
1da177e4
LT		 1471 if (pkt_size < rx_copybreak) {
1472 struct sk_buff *new_skb;
1473
c73d2589 1474 new_skb = netdev_alloc_skb(vptr->dev, pkt_size + 2);
1da177e4 1475 if (new_skb) {
1da177e4 1476 new_skb->ip_summed = rx_skb[0]->ip_summed;
c73d2589
SH		 1477 skb_reserve(new_skb, 2);
1478 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
1da177e4
LT		 1479 *rx_skb = new_skb;
1480 ret = 0;
1481 }
6aa20a22 1482
1da177e4
LT		 1483 }
1484 return ret;
1485}
1486
1487/**
1488 * velocity_iph_realign - IP header alignment
1489 * @vptr: velocity we are handling
1490 * @skb: network layer packet buffer
1491 * @pkt_size: received data size
1492 *
1493 * Align IP header on a 2 bytes boundary. This behavior can be
1494 * configured by the user.
1495 */
1496static inline void velocity_iph_realign(struct velocity_info *vptr,
1497 struct sk_buff *skb, int pkt_size)
1498{
1da177e4 1499 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
c03571a3 1500 memmove(skb->data + 2, skb->data, pkt_size);
1da177e4
LT		 1501 skb_reserve(skb, 2);
1502 }
1503}
1504
1505/**
1506 * velocity_receive_frame - received packet processor
1507 * @vptr: velocity we are handling
1508 * @idx: ring index
6aa20a22 1509 *
1da177e4
LT		 1510 * A packet has arrived. We process the packet and if appropriate
1511 * pass the frame up the network stack
1512 */
6aa20a22 1513
1da177e4
LT		 1514static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1515{
1516 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
1517 struct net_device_stats *stats = &vptr->stats;
0fe9f15e
FR		 1518 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1519 struct rx_desc *rd = &(vptr->rx.ring[idx]);
4a51c0d0 1520 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
1da177e4
LT		 1521 struct sk_buff *skb;
1522
1523 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
1524 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
1525 stats->rx_length_errors++;
1526 return -EINVAL;
1527 }
1528
1529 if (rd->rdesc0.RSR & RSR_MAR)
1530 vptr->stats.multicast++;
1531
1532 skb = rd_info->skb;
1da177e4
LT		 1533
1534 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
0fe9f15e 1535 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
1da177e4
LT		 1536
1537 /*
1538 * Drop frame not meeting IEEE 802.3
1539 */
6aa20a22 1540
1da177e4
LT		 1541 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
1542 if (rd->rdesc0.RSR & RSR_RL) {
1543 stats->rx_length_errors++;
1544 return -EINVAL;
1545 }
1546 }
1547
1548 pci_action = pci_dma_sync_single_for_device;
1549
1550 velocity_rx_csum(rd, skb);
1551
1552 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
1553 velocity_iph_realign(vptr, skb, pkt_len);
1554 pci_action = pci_unmap_single;
1555 rd_info->skb = NULL;
1556 }
1557
0fe9f15e 1558 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
1da177e4
LT		 1559 PCI_DMA_FROMDEVICE);
1560
1561 skb_put(skb, pkt_len - 4);
4c13eb66 1562 skb->protocol = eth_type_trans(skb, vptr->dev);
1da177e4 1563
d4f73c8e
FR		 1564 if (vptr->vlgrp && (rd->rdesc0.RSR & RSR_DETAG)) {
1565 vlan_hwaccel_rx(skb, vptr->vlgrp,
1566 swab16(le16_to_cpu(rd->rdesc1.PQTAG)));
1567 } else
1568 netif_rx(skb);
1569
1da177e4 1570 stats->rx_bytes += pkt_len;
1da177e4
LT		 1571
1572 return 0;
1573}
1574
1575/**
1576 * velocity_alloc_rx_buf - allocate aligned receive buffer
1577 * @vptr: velocity
1578 * @idx: ring index
1579 *
1580 * Allocate a new full sized buffer for the reception of a frame and
1581 * map it into PCI space for the hardware to use. The hardware
1582 * requires *64* byte alignment of the buffer which makes life
1583 * less fun than would be ideal.
1584 */
6aa20a22 1585
1da177e4
LT		 1586static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1587{
0fe9f15e
FR		 1588 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1589 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1da177e4 1590
0fe9f15e 1591 rd_info->skb = dev_alloc_skb(vptr->rx.buf_sz + 64);
1da177e4
LT		 1592 if (rd_info->skb == NULL)
1593 return -ENOMEM;
1594
1595 /*
1596 * Do the gymnastics to get the buffer head for data at
1597 * 64byte alignment.
1598 */
689be439 1599 skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63);
0fe9f15e
FR		 1600 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data,
1601 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
6aa20a22 1602
1da177e4
LT		 1603 /*
1604 * Fill in the descriptor to match
0fe9f15e 1605 */
6aa20a22 1606
1da177e4 1607 *((u32 *) & (rd->rdesc0)) = 0;
0fe9f15e 1608 rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN;
1da177e4
LT		 1609 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1610 rd->pa_high = 0;
1611 return 0;
1612}
1613
1614/**
1615 * tx_srv - transmit interrupt service
1616 * @vptr; Velocity
1617 * @status:
1618 *
1619 * Scan the queues looking for transmitted packets that
1620 * we can complete and clean up. Update any statistics as
3a4fa0a2 1621 * necessary/
1da177e4 1622 */
6aa20a22 1623
1da177e4
LT		 1624static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1625{
1626 struct tx_desc *td;
1627 int qnum;
1628 int full = 0;
1629 int idx;
1630 int works = 0;
1631 struct velocity_td_info *tdinfo;
1632 struct net_device_stats *stats = &vptr->stats;
1633
0fe9f15e
FR		 1634 for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
1635 for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
1da177e4
LT		 1636 idx = (idx + 1) % vptr->options.numtx) {
1637
1638 /*
1639 * Get Tx Descriptor
1640 */
0fe9f15e
FR		 1641 td = &(vptr->tx.rings[qnum][idx]);
1642 tdinfo = &(vptr->tx.infos[qnum][idx]);
1da177e4 1643
4a51c0d0 1644 if (td->tdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1645 break;
1646
1647 if ((works++ > 15))
1648 break;
1649
1650 if (td->tdesc0.TSR & TSR0_TERR) {
1651 stats->tx_errors++;
1652 stats->tx_dropped++;
1653 if (td->tdesc0.TSR & TSR0_CDH)
1654 stats->tx_heartbeat_errors++;
1655 if (td->tdesc0.TSR & TSR0_CRS)
1656 stats->tx_carrier_errors++;
1657 if (td->tdesc0.TSR & TSR0_ABT)
1658 stats->tx_aborted_errors++;
1659 if (td->tdesc0.TSR & TSR0_OWC)
1660 stats->tx_window_errors++;
1661 } else {
1662 stats->tx_packets++;
1663 stats->tx_bytes += tdinfo->skb->len;
1664 }
1665 velocity_free_tx_buf(vptr, tdinfo);
0fe9f15e 1666 vptr->tx.used[qnum]--;
1da177e4 1667 }
0fe9f15e 1668 vptr->tx.tail[qnum] = idx;
1da177e4
LT		 1669
1670 if (AVAIL_TD(vptr, qnum) < 1) {
1671 full = 1;
1672 }
1673 }
1674 /*
1675 * Look to see if we should kick the transmit network
1676 * layer for more work.
1677 */
1678 if (netif_queue_stopped(vptr->dev) && (full == 0)
1679 && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1680 netif_wake_queue(vptr->dev);
1681 }
1682 return works;
1683}
1684
1685/**
1686 * velocity_print_link_status - link status reporting
1687 * @vptr: velocity to report on
1688 *
1689 * Turn the link status of the velocity card into a kernel log
1690 * description of the new link state, detailing speed and duplex
1691 * status
1692 */
1693
1694static void velocity_print_link_status(struct velocity_info *vptr)
1695{
1696
1697 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1698 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1699 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
b4fea61a 1700 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
1da177e4
LT		 1701
1702 if (vptr->mii_status & VELOCITY_SPEED_1000)
1703 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1704 else if (vptr->mii_status & VELOCITY_SPEED_100)
1705 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1706 else
1707 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1708
1709 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1710 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1711 else
1712 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1713 } else {
1714 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1715 switch (vptr->options.spd_dpx) {
1716 case SPD_DPX_100_HALF:
1717 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1718 break;
1719 case SPD_DPX_100_FULL:
1720 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1721 break;
1722 case SPD_DPX_10_HALF:
1723 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1724 break;
1725 case SPD_DPX_10_FULL:
1726 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1727 break;
1728 default:
1729 break;
1730 }
1731 }
1732}
1733
1734/**
1735 * velocity_error - handle error from controller
1736 * @vptr: velocity
1737 * @status: card status
1738 *
1739 * Process an error report from the hardware and attempt to recover
6aa20a22 1740 * the card itself. At the moment we cannot recover from some
1da177e4
LT		 1741 * theoretically impossible errors but this could be fixed using
1742 * the pci_device_failed logic to bounce the hardware
1743 *
1744 */
6aa20a22 1745
1da177e4
LT		 1746static void velocity_error(struct velocity_info *vptr, int status)
1747{
1748
1749 if (status & ISR_TXSTLI) {
1750 struct mac_regs __iomem * regs = vptr->mac_regs;
1751
0e6ff158 1752 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1da177e4
LT		 1753 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1754 writew(TRDCSR_RUN, &regs->TDCSRClr);
1755 netif_stop_queue(vptr->dev);
6aa20a22 1756
1da177e4
LT		 1757 /* FIXME: port over the pci_device_failed code and use it
1758 here */
1759 }
1760
1761 if (status & ISR_SRCI) {
1762 struct mac_regs __iomem * regs = vptr->mac_regs;
1763 int linked;
1764
1765 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1766 vptr->mii_status = check_connection_type(regs);
1767
1768 /*
6aa20a22 1769 * If it is a 3119, disable frame bursting in
1da177e4
LT		 1770 * halfduplex mode and enable it in fullduplex
1771 * mode
1772 */
1773 if (vptr->rev_id < REV_ID_VT3216_A0) {
1774 if (vptr->mii_status | VELOCITY_DUPLEX_FULL)
1775 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1776 else
1777 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1778 }
1779 /*
1780 * Only enable CD heart beat counter in 10HD mode
1781 */
1782 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) {
1783 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1784 } else {
1785 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1786 }
1787 }
1788 /*
1789 * Get link status from PHYSR0
1790 */
1791 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1792
1793 if (linked) {
1794 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
8a22dddb 1795 netif_carrier_on(vptr->dev);
1da177e4
LT		 1796 } else {
1797 vptr->mii_status |= VELOCITY_LINK_FAIL;
8a22dddb 1798 netif_carrier_off(vptr->dev);
1da177e4
LT		 1799 }
1800
1801 velocity_print_link_status(vptr);
1802 enable_flow_control_ability(vptr);
1803
1804 /*
6aa20a22 1805 * Re-enable auto-polling because SRCI will disable
1da177e4
LT		 1806 * auto-polling
1807 */
6aa20a22 1808
1da177e4
LT		 1809 enable_mii_autopoll(regs);
1810
1811 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1812 netif_stop_queue(vptr->dev);
1813 else
1814 netif_wake_queue(vptr->dev);
1815
1816 };
1817 if (status & ISR_MIBFI)
1818 velocity_update_hw_mibs(vptr);
1819 if (status & ISR_LSTEI)
1820 mac_rx_queue_wake(vptr->mac_regs);
1821}
1822
1823/**
1824 * velocity_free_tx_buf - free transmit buffer
1825 * @vptr: velocity
1826 * @tdinfo: buffer
1827 *
1828 * Release an transmit buffer. If the buffer was preallocated then
1829 * recycle it, if not then unmap the buffer.
1830 */
6aa20a22 1831
1da177e4
LT		 1832static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo)
1833{
1834 struct sk_buff *skb = tdinfo->skb;
1835 int i;
1836
1837 /*
1838 * Don't unmap the pre-allocated tx_bufs
1839 */
580a6902 1840 if (tdinfo->skb_dma) {
1da177e4
LT		 1841
1842 for (i = 0; i < tdinfo->nskb_dma; i++) {
1843#ifdef VELOCITY_ZERO_COPY_SUPPORT
4a51c0d0 1844 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], le16_to_cpu(td->tdesc1.len), PCI_DMA_TODEVICE);
1da177e4
LT		 1845#else
1846 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], skb->len, PCI_DMA_TODEVICE);
1847#endif
1848 tdinfo->skb_dma[i] = 0;
1849 }
1850 }
1851 dev_kfree_skb_irq(skb);
1852 tdinfo->skb = NULL;
1853}
1854
3c4dc711
FR		 1855static int velocity_init_rings(struct velocity_info *vptr, int mtu)
1856{
1857 int ret;
1858
1859 velocity_set_rxbufsize(vptr, mtu);
1860
1861 ret = velocity_init_dma_rings(vptr);
1862 if (ret < 0)
1863 goto out;
1864
1865 ret = velocity_init_rd_ring(vptr);
1866 if (ret < 0)
1867 goto err_free_dma_rings_0;
1868
1869 ret = velocity_init_td_ring(vptr);
1870 if (ret < 0)
1871 goto err_free_rd_ring_1;
1872out:
1873 return ret;
1874
1875err_free_rd_ring_1:
1876 velocity_free_rd_ring(vptr);
1877err_free_dma_rings_0:
1878 velocity_free_dma_rings(vptr);
1879 goto out;
1880}
1881
1882static void velocity_free_rings(struct velocity_info *vptr)
1883{
1884 velocity_free_td_ring(vptr);
1885 velocity_free_rd_ring(vptr);
1886 velocity_free_dma_rings(vptr);
1887}
1888
1da177e4
LT		 1889/**
1890 * velocity_open - interface activation callback
1891 * @dev: network layer device to open
1892 *
1893 * Called when the network layer brings the interface up. Returns
1894 * a negative posix error code on failure, or zero on success.
1895 *
1896 * All the ring allocation and set up is done on open for this
1897 * adapter to minimise memory usage when inactive
1898 */
6aa20a22 1899
1da177e4
LT		 1900static int velocity_open(struct net_device *dev)
1901{
8ab6f3f7 1902 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1903 int ret;
1904
3c4dc711 1905 ret = velocity_init_rings(vptr, dev->mtu);
1da177e4
LT		 1906 if (ret < 0)
1907 goto out;
1908
6aa20a22 1909 /* Ensure chip is running */
1da177e4 1910 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 1911
28133176
FR		 1912 velocity_give_many_rx_descs(vptr);
1913
1da177e4
LT		 1914 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1915
1fb9df5d 1916 ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED,
1da177e4
LT		 1917 dev->name, dev);
1918 if (ret < 0) {
1919 /* Power down the chip */
1920 pci_set_power_state(vptr->pdev, PCI_D3hot);
3c4dc711
FR		 1921 velocity_free_rings(vptr);
1922 goto out;
1da177e4
LT		 1923 }
1924
1925 mac_enable_int(vptr->mac_regs);
1926 netif_start_queue(dev);
1927 vptr->flags |= VELOCITY_FLAGS_OPENED;
1928out:
1929 return ret;
1da177e4
LT		 1930}
1931
6aa20a22 1932/**
1da177e4
LT		 1933 * velocity_change_mtu - MTU change callback
1934 * @dev: network device
1935 * @new_mtu: desired MTU
1936 *
1937 * Handle requests from the networking layer for MTU change on
1938 * this interface. It gets called on a change by the network layer.
1939 * Return zero for success or negative posix error code.
1940 */
6aa20a22 1941
1da177e4
LT		 1942static int velocity_change_mtu(struct net_device *dev, int new_mtu)
1943{
8ab6f3f7 1944 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1945 int ret = 0;
1946
1947 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
6aa20a22 1948 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
1da177e4 1949 vptr->dev->name);
3c4dc711
FR		 1950 ret = -EINVAL;
1951 goto out_0;
1da177e4
LT		 1952 }
1953
bd7b3f34
SH		 1954 if (!netif_running(dev)) {
1955 dev->mtu = new_mtu;
3c4dc711 1956 goto out_0;
bd7b3f34
SH		 1957 }
1958
3c4dc711
FR		 1959 if (dev->mtu != new_mtu) {
1960 struct velocity_info *tmp_vptr;
1961 unsigned long flags;
1962 struct rx_info rx;
1963 struct tx_info tx;
1964
1965 tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL);
1966 if (!tmp_vptr) {
1967 ret = -ENOMEM;
1968 goto out_0;
1969 }
1970
1971 tmp_vptr->dev = dev;
1972 tmp_vptr->pdev = vptr->pdev;
1973 tmp_vptr->options = vptr->options;
1974 tmp_vptr->tx.numq = vptr->tx.numq;
1975
1976 ret = velocity_init_rings(tmp_vptr, new_mtu);
1977 if (ret < 0)
1978 goto out_free_tmp_vptr_1;
1979
1da177e4
LT		 1980 spin_lock_irqsave(&vptr->lock, flags);
1981
1982 netif_stop_queue(dev);
1983 velocity_shutdown(vptr);
1984
3c4dc711
FR		 1985 rx = vptr->rx;
1986 tx = vptr->tx;
1da177e4 1987
3c4dc711
FR		 1988 vptr->rx = tmp_vptr->rx;
1989 vptr->tx = tmp_vptr->tx;
1da177e4 1990
3c4dc711
FR		 1991 tmp_vptr->rx = rx;
1992 tmp_vptr->tx = tx;
9088d9a4 1993
3c4dc711 1994 dev->mtu = new_mtu;
1da177e4 1995
3c4dc711 1996 velocity_give_many_rx_descs(vptr);
1da177e4
LT		 1997
1998 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1999
2000 mac_enable_int(vptr->mac_regs);
2001 netif_start_queue(dev);
3c4dc711 2002
1da177e4 2003 spin_unlock_irqrestore(&vptr->lock, flags);
1da177e4 2004
3c4dc711
FR		 2005 velocity_free_rings(tmp_vptr);
2006
2007out_free_tmp_vptr_1:
2008 kfree(tmp_vptr);
2009 }
2010out_0:
1da177e4
LT		 2011 return ret;
2012}
2013
2014/**
2015 * velocity_shutdown - shut down the chip
2016 * @vptr: velocity to deactivate
2017 *
2018 * Shuts down the internal operations of the velocity and
2019 * disables interrupts, autopolling, transmit and receive
2020 */
6aa20a22 2021
1da177e4
LT		 2022static void velocity_shutdown(struct velocity_info *vptr)
2023{
2024 struct mac_regs __iomem * regs = vptr->mac_regs;
2025 mac_disable_int(regs);
2026 writel(CR0_STOP, &regs->CR0Set);
2027 writew(0xFFFF, &regs->TDCSRClr);
2028 writeb(0xFF, &regs->RDCSRClr);
2029 safe_disable_mii_autopoll(regs);
2030 mac_clear_isr(regs);
2031}
2032
2033/**
2034 * velocity_close - close adapter callback
2035 * @dev: network device
2036 *
2037 * Callback from the network layer when the velocity is being
2038 * deactivated by the network layer
2039 */
2040
2041static int velocity_close(struct net_device *dev)
2042{
8ab6f3f7 2043 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2044
2045 netif_stop_queue(dev);
2046 velocity_shutdown(vptr);
2047
2048 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2049 velocity_get_ip(vptr);
2050 if (dev->irq != 0)
2051 free_irq(dev->irq, dev);
6aa20a22 2052
1da177e4
LT		 2053 /* Power down the chip */
2054 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22 2055
1da177e4
LT		 2056 velocity_free_rings(vptr);
2057
2058 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2059 return 0;
2060}
2061
2062/**
2063 * velocity_xmit - transmit packet callback
2064 * @skb: buffer to transmit
2065 * @dev: network device
2066 *
2067 * Called by the networ layer to request a packet is queued to
2068 * the velocity. Returns zero on success.
2069 */
6aa20a22 2070
1da177e4
LT		 2071static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
2072{
8ab6f3f7 2073 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2074 int qnum = 0;
2075 struct tx_desc *td_ptr;
2076 struct velocity_td_info *tdinfo;
2077 unsigned long flags;
1da177e4 2078 int pktlen = skb->len;
580a6902
FR		 2079 __le16 len;
2080 int index;
2081
2082
2083
2084 if (skb->len < ETH_ZLEN) {
2085 if (skb_padto(skb, ETH_ZLEN))
2086 goto out;
2087 pktlen = ETH_ZLEN;
2088 }
2089
2090 len = cpu_to_le16(pktlen);
1da177e4 2091
364c6bad
HX		 2092#ifdef VELOCITY_ZERO_COPY_SUPPORT
2093 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
2094 kfree_skb(skb);
2095 return 0;
2096 }
2097#endif
2098
1da177e4
LT		 2099 spin_lock_irqsave(&vptr->lock, flags);
2100
0fe9f15e
FR		 2101 index = vptr->tx.curr[qnum];
2102 td_ptr = &(vptr->tx.rings[qnum][index]);
2103 tdinfo = &(vptr->tx.infos[qnum][index]);
1da177e4 2104
1da177e4 2105 td_ptr->tdesc1.TCR = TCR0_TIC;
4a51c0d0 2106 td_ptr->td_buf[0].size &= ~TD_QUEUE;
1da177e4 2107
1da177e4
LT		 2108#ifdef VELOCITY_ZERO_COPY_SUPPORT
2109 if (skb_shinfo(skb)->nr_frags > 0) {
2110 int nfrags = skb_shinfo(skb)->nr_frags;
2111 tdinfo->skb = skb;
2112 if (nfrags > 6) {
d626f62b 2113 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4 2114 tdinfo->skb_dma[0] = tdinfo->buf_dma;
4a51c0d0 2115 td_ptr->tdesc0.len = len;
0fe9f15e
FR		 2116 td_ptr->tx.buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2117 td_ptr->tx.buf[0].pa_high = 0;
2118 td_ptr->tx.buf[0].size = len; /* queue is 0 anyway */
1da177e4 2119 tdinfo->nskb_dma = 1;
1da177e4
LT		 2120 } else {
2121 int i = 0;
2122 tdinfo->nskb_dma = 0;
4a51c0d0
AV		 2123 tdinfo->skb_dma[i] = pci_map_single(vptr->pdev, skb->data,
2124 skb_headlen(skb), PCI_DMA_TODEVICE);
1da177e4 2125
4a51c0d0 2126 td_ptr->tdesc0.len = len;
1da177e4
LT		 2127
2128 /* FIXME: support 48bit DMA later */
0fe9f15e
FR		 2129 td_ptr->tx.buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma);
2130 td_ptr->tx.buf[i].pa_high = 0;
2131 td_ptr->tx.buf[i].size = cpu_to_le16(skb_headlen(skb));
1da177e4
LT		 2132
2133 for (i = 0; i < nfrags; i++) {
2134 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
4a51c0d0 2135 void *addr = (void *)page_address(frag->page) + frag->page_offset;
1da177e4
LT		 2136
2137 tdinfo->skb_dma[i + 1] = pci_map_single(vptr->pdev, addr, frag->size, PCI_DMA_TODEVICE);
2138
0fe9f15e
FR		 2139 td_ptr->tx.buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
2140 td_ptr->tx.buf[i + 1].pa_high = 0;
2141 td_ptr->tx.buf[i + 1].size = cpu_to_le16(frag->size);
1da177e4
LT		 2142 }
2143 tdinfo->nskb_dma = i - 1;
1da177e4
LT		 2144 }
2145
2146 } else
2147#endif
2148 {
2149 /*
2150 * Map the linear network buffer into PCI space and
2151 * add it to the transmit ring.
2152 */
2153 tdinfo->skb = skb;
2154 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
4a51c0d0 2155 td_ptr->tdesc0.len = len;
1da177e4
LT		 2156 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2157 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2158 td_ptr->td_buf[0].size = len;
1da177e4 2159 tdinfo->nskb_dma = 1;
1da177e4 2160 }
4a51c0d0 2161 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
1da177e4 2162
501e4d24 2163 if (vptr->vlgrp && vlan_tx_tag_present(skb)) {
4a51c0d0 2164 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1da177e4
LT		 2165 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2166 }
2167
2168 /*
2169 * Handle hardware checksum
2170 */
2171 if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM)
84fa7933 2172 && (skb->ip_summed == CHECKSUM_PARTIAL)) {
eddc9ec5 2173 const struct iphdr *ip = ip_hdr(skb);
1da177e4
LT		 2174 if (ip->protocol == IPPROTO_TCP)
2175 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2176 else if (ip->protocol == IPPROTO_UDP)
2177 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2178 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2179 }
2180 {
2181
2182 int prev = index - 1;
2183
2184 if (prev < 0)
2185 prev = vptr->options.numtx - 1;
4a51c0d0 2186 td_ptr->tdesc0.len |= OWNED_BY_NIC;
0fe9f15e
FR		 2187 vptr->tx.used[qnum]++;
2188 vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx;
1da177e4
LT		 2189
2190 if (AVAIL_TD(vptr, qnum) < 1)
2191 netif_stop_queue(dev);
2192
0fe9f15e 2193 td_ptr = &(vptr->tx.rings[qnum][prev]);
4a51c0d0 2194 td_ptr->td_buf[0].size |= TD_QUEUE;
1da177e4
LT		 2195 mac_tx_queue_wake(vptr->mac_regs, qnum);
2196 }
2197 dev->trans_start = jiffies;
2198 spin_unlock_irqrestore(&vptr->lock, flags);
580a6902
FR		 2199out:
2200 return NETDEV_TX_OK;
1da177e4
LT		 2201}
2202
2203/**
2204 * velocity_intr - interrupt callback
2205 * @irq: interrupt number
2206 * @dev_instance: interrupting device
1da177e4
LT		 2207 *
2208 * Called whenever an interrupt is generated by the velocity
2209 * adapter IRQ line. We may not be the source of the interrupt
2210 * and need to identify initially if we are, and if not exit as
2211 * efficiently as possible.
2212 */
6aa20a22 2213
7d12e780 2214static int velocity_intr(int irq, void *dev_instance)
1da177e4
LT		 2215{
2216 struct net_device *dev = dev_instance;
8ab6f3f7 2217 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2218 u32 isr_status;
2219 int max_count = 0;
2220
2221
2222 spin_lock(&vptr->lock);
2223 isr_status = mac_read_isr(vptr->mac_regs);
2224
2225 /* Not us ? */
2226 if (isr_status == 0) {
2227 spin_unlock(&vptr->lock);
2228 return IRQ_NONE;
2229 }
2230
2231 mac_disable_int(vptr->mac_regs);
2232
2233 /*
2234 * Keep processing the ISR until we have completed
2235 * processing and the isr_status becomes zero
2236 */
6aa20a22 2237
1da177e4
LT		 2238 while (isr_status != 0) {
2239 mac_write_isr(vptr->mac_regs, isr_status);
2240 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2241 velocity_error(vptr, isr_status);
2242 if (isr_status & (ISR_PRXI | ISR_PPRXI))
2243 max_count += velocity_rx_srv(vptr, isr_status);
2244 if (isr_status & (ISR_PTXI | ISR_PPTXI))
2245 max_count += velocity_tx_srv(vptr, isr_status);
2246 isr_status = mac_read_isr(vptr->mac_regs);
2247 if (max_count > vptr->options.int_works)
2248 {
6aa20a22 2249 printk(KERN_WARNING "%s: excessive work at interrupt.\n",
1da177e4
LT		 2250 dev->name);
2251 max_count = 0;
2252 }
2253 }
2254 spin_unlock(&vptr->lock);
2255 mac_enable_int(vptr->mac_regs);
2256 return IRQ_HANDLED;
2257
2258}
2259
2260
2261/**
2262 * velocity_set_multi - filter list change callback
2263 * @dev: network device
2264 *
2265 * Called by the network layer when the filter lists need to change
2266 * for a velocity adapter. Reload the CAMs with the new address
2267 * filter ruleset.
2268 */
6aa20a22 2269
1da177e4
LT		 2270static void velocity_set_multi(struct net_device *dev)
2271{
8ab6f3f7 2272 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2273 struct mac_regs __iomem * regs = vptr->mac_regs;
2274 u8 rx_mode;
2275 int i;
2276 struct dev_mc_list *mclist;
2277
2278 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1da177e4
LT		 2279 writel(0xffffffff, &regs->MARCAM[0]);
2280 writel(0xffffffff, &regs->MARCAM[4]);
2281 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
2282 } else if ((dev->mc_count > vptr->multicast_limit)
2283 || (dev->flags & IFF_ALLMULTI)) {
2284 writel(0xffffffff, &regs->MARCAM[0]);
2285 writel(0xffffffff, &regs->MARCAM[4]);
2286 rx_mode = (RCR_AM | RCR_AB);
2287 } else {
2288 int offset = MCAM_SIZE - vptr->multicast_limit;
01faccbf 2289 mac_get_cam_mask(regs, vptr->mCAMmask);
1da177e4
LT		 2290
2291 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
01faccbf 2292 mac_set_cam(regs, i + offset, mclist->dmi_addr);
1da177e4
LT		 2293 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
2294 }
2295
01faccbf 2296 mac_set_cam_mask(regs, vptr->mCAMmask);
5f5c4bdb 2297 rx_mode = RCR_AM | RCR_AB | RCR_AP;
1da177e4
LT		 2298 }
2299 if (dev->mtu > 1500)
2300 rx_mode |= RCR_AL;
2301
2302 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
2303
2304}
2305
2306/**
2307 * velocity_get_status - statistics callback
2308 * @dev: network device
2309 *
2310 * Callback from the network layer to allow driver statistics
2311 * to be resynchronized with hardware collected state. In the
2312 * case of the velocity we need to pull the MIB counters from
2313 * the hardware into the counters before letting the network
2314 * layer display them.
2315 */
6aa20a22 2316
1da177e4
LT		 2317static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2318{
8ab6f3f7 2319 struct velocity_info *vptr = netdev_priv(dev);
6aa20a22 2320
1da177e4
LT		 2321 /* If the hardware is down, don't touch MII */
2322 if(!netif_running(dev))
2323 return &vptr->stats;
2324
2325 spin_lock_irq(&vptr->lock);
2326 velocity_update_hw_mibs(vptr);
2327 spin_unlock_irq(&vptr->lock);
2328
2329 vptr->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2330 vptr->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2331 vptr->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2332
2333// unsigned long rx_dropped; /* no space in linux buffers */
2334 vptr->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2335 /* detailed rx_errors: */
2336// unsigned long rx_length_errors;
2337// unsigned long rx_over_errors; /* receiver ring buff overflow */
2338 vptr->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2339// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2340// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2341// unsigned long rx_missed_errors; /* receiver missed packet */
2342
2343 /* detailed tx_errors */
2344// unsigned long tx_fifo_errors;
2345
2346 return &vptr->stats;
2347}
2348
2349
2350/**
2351 * velocity_ioctl - ioctl entry point
2352 * @dev: network device
2353 * @rq: interface request ioctl
2354 * @cmd: command code
2355 *
2356 * Called when the user issues an ioctl request to the network
2357 * device in question. The velocity interface supports MII.
2358 */
6aa20a22 2359
1da177e4
LT		 2360static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2361{
8ab6f3f7 2362 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2363 int ret;
2364
2365 /* If we are asked for information and the device is power
2366 saving then we need to bring the device back up to talk to it */
6aa20a22 2367
1da177e4
LT		 2368 if (!netif_running(dev))
2369 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 2370
1da177e4
LT		 2371 switch (cmd) {
2372 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2373 case SIOCGMIIREG: /* Read MII PHY register. */
2374 case SIOCSMIIREG: /* Write to MII PHY register. */
2375 ret = velocity_mii_ioctl(dev, rq, cmd);
2376 break;
2377
2378 default:
2379 ret = -EOPNOTSUPP;
2380 }
2381 if (!netif_running(dev))
2382 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22
JG		 2383
2384
1da177e4
LT		 2385 return ret;
2386}
2387
2388/*
2389 * Definition for our device driver. The PCI layer interface
2390 * uses this to handle all our card discover and plugging
2391 */
6aa20a22 2392
1da177e4
LT		 2393static struct pci_driver velocity_driver = {
2394 .name = VELOCITY_NAME,
2395 .id_table = velocity_id_table,
2396 .probe = velocity_found1,
2397 .remove = __devexit_p(velocity_remove1),
2398#ifdef CONFIG_PM
2399 .suspend = velocity_suspend,
2400 .resume = velocity_resume,
2401#endif
2402};
2403
2404/**
2405 * velocity_init_module - load time function
2406 *
2407 * Called when the velocity module is loaded. The PCI driver
2408 * is registered with the PCI layer, and in turn will call
2409 * the probe functions for each velocity adapter installed
2410 * in the system.
2411 */
6aa20a22 2412
1da177e4
LT		 2413static int __init velocity_init_module(void)
2414{
2415 int ret;
2416
2417 velocity_register_notifier();
29917620 2418 ret = pci_register_driver(&velocity_driver);
1da177e4
LT		 2419 if (ret < 0)
2420 velocity_unregister_notifier();
2421 return ret;
2422}
2423
2424/**
2425 * velocity_cleanup - module unload
2426 *
2427 * When the velocity hardware is unloaded this function is called.
6aa20a22 2428 * It will clean up the notifiers and the unregister the PCI
1da177e4
LT		 2429 * driver interface for this hardware. This in turn cleans up
2430 * all discovered interfaces before returning from the function
2431 */
6aa20a22 2432
1da177e4
LT		 2433static void __exit velocity_cleanup_module(void)
2434{
2435 velocity_unregister_notifier();
2436 pci_unregister_driver(&velocity_driver);
2437}
2438
2439module_init(velocity_init_module);
2440module_exit(velocity_cleanup_module);
2441
2442
2443/*
2444 * MII access , media link mode setting functions
2445 */
6aa20a22
JG		 2446
2447
1da177e4
LT		 2448/**
2449 * mii_init - set up MII
2450 * @vptr: velocity adapter
2451 * @mii_status: links tatus
2452 *
2453 * Set up the PHY for the current link state.
2454 */
6aa20a22 2455
1da177e4
LT		 2456static void mii_init(struct velocity_info *vptr, u32 mii_status)
2457{
2458 u16 BMCR;
2459
2460 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
2461 case PHYID_CICADA_CS8201:
2462 /*
2463 * Reset to hardware default
2464 */
2465 MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2466 /*
2467 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2468 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2469 * legacy-forced issue.
2470 */
2471 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2472 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2473 else
2474 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2475 /*
2476 * Turn on Link/Activity LED enable bit for CIS8201
2477 */
2478 MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
2479 break;
2480 case PHYID_VT3216_32BIT:
2481 case PHYID_VT3216_64BIT:
2482 /*
2483 * Reset to hardware default
2484 */
2485 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2486 /*
2487 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2488 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2489 * legacy-forced issue
2490 */
2491 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2492 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2493 else
2494 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2495 break;
2496
2497 case PHYID_MARVELL_1000:
2498 case PHYID_MARVELL_1000S:
2499 /*
6aa20a22 2500 * Assert CRS on Transmit
1da177e4
LT		 2501 */
2502 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
2503 /*
6aa20a22 2504 * Reset to hardware default
1da177e4
LT		 2505 */
2506 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2507 break;
2508 default:
2509 ;
2510 }
2511 velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
2512 if (BMCR & BMCR_ISO) {
2513 BMCR &= ~BMCR_ISO;
2514 velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
2515 }
2516}
2517
2518/**
2519 * safe_disable_mii_autopoll - autopoll off
2520 * @regs: velocity registers
2521 *
2522 * Turn off the autopoll and wait for it to disable on the chip
2523 */
6aa20a22 2524
1da177e4
LT		 2525static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs)
2526{
2527 u16 ww;
2528
2529 /* turn off MAUTO */
2530 writeb(0, &regs->MIICR);
2531 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2532 udelay(1);
2533 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2534 break;
2535 }
2536}
2537
2538/**
2539 * enable_mii_autopoll - turn on autopolling
2540 * @regs: velocity registers
2541 *
2542 * Enable the MII link status autopoll feature on the Velocity
2543 * hardware. Wait for it to enable.
2544 */
2545
2546static void enable_mii_autopoll(struct mac_regs __iomem * regs)
2547{
2548 int ii;
2549
2550 writeb(0, &(regs->MIICR));
2551 writeb(MIIADR_SWMPL, &regs->MIIADR);
2552
2553 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2554 udelay(1);
2555 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2556 break;
2557 }
2558
2559 writeb(MIICR_MAUTO, &regs->MIICR);
2560
2561 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2562 udelay(1);
2563 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2564 break;
2565 }
2566
2567}
2568
2569/**
2570 * velocity_mii_read - read MII data
2571 * @regs: velocity registers
2572 * @index: MII register index
2573 * @data: buffer for received data
2574 *
2575 * Perform a single read of an MII 16bit register. Returns zero
2576 * on success or -ETIMEDOUT if the PHY did not respond.
2577 */
6aa20a22 2578
1da177e4
LT		 2579static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
2580{
2581 u16 ww;
2582
2583 /*
2584 * Disable MIICR_MAUTO, so that mii addr can be set normally
2585 */
2586 safe_disable_mii_autopoll(regs);
2587
2588 writeb(index, &regs->MIIADR);
2589
2590 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
2591
2592 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2593 if (!(readb(&regs->MIICR) & MIICR_RCMD))
2594 break;
2595 }
2596
2597 *data = readw(&regs->MIIDATA);
2598
2599 enable_mii_autopoll(regs);
2600 if (ww == W_MAX_TIMEOUT)
2601 return -ETIMEDOUT;
2602 return 0;
2603}
2604
2605/**
2606 * velocity_mii_write - write MII data
2607 * @regs: velocity registers
2608 * @index: MII register index
2609 * @data: 16bit data for the MII register
2610 *
2611 * Perform a single write to an MII 16bit register. Returns zero
2612 * on success or -ETIMEDOUT if the PHY did not respond.
2613 */
6aa20a22 2614
1da177e4
LT		 2615static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
2616{
2617 u16 ww;
2618
2619 /*
2620 * Disable MIICR_MAUTO, so that mii addr can be set normally
2621 */
2622 safe_disable_mii_autopoll(regs);
2623
2624 /* MII reg offset */
2625 writeb(mii_addr, &regs->MIIADR);
2626 /* set MII data */
2627 writew(data, &regs->MIIDATA);
2628
2629 /* turn on MIICR_WCMD */
2630 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
2631
2632 /* W_MAX_TIMEOUT is the timeout period */
2633 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2634 udelay(5);
2635 if (!(readb(&regs->MIICR) & MIICR_WCMD))
2636 break;
2637 }
2638 enable_mii_autopoll(regs);
2639
2640 if (ww == W_MAX_TIMEOUT)
2641 return -ETIMEDOUT;
2642 return 0;
2643}
2644
2645/**
2646 * velocity_get_opt_media_mode - get media selection
2647 * @vptr: velocity adapter
2648 *
2649 * Get the media mode stored in EEPROM or module options and load
2650 * mii_status accordingly. The requested link state information
2651 * is also returned.
2652 */
6aa20a22 2653
1da177e4
LT		 2654static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
2655{
2656 u32 status = 0;
2657
2658 switch (vptr->options.spd_dpx) {
2659 case SPD_DPX_AUTO:
2660 status = VELOCITY_AUTONEG_ENABLE;
2661 break;
2662 case SPD_DPX_100_FULL:
2663 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
2664 break;
2665 case SPD_DPX_10_FULL:
2666 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
2667 break;
2668 case SPD_DPX_100_HALF:
2669 status = VELOCITY_SPEED_100;
2670 break;
2671 case SPD_DPX_10_HALF:
2672 status = VELOCITY_SPEED_10;
2673 break;
2674 }
2675 vptr->mii_status = status;
2676 return status;
2677}
2678
2679/**
2680 * mii_set_auto_on - autonegotiate on
2681 * @vptr: velocity
2682 *
2683 * Enable autonegotation on this interface
2684 */
6aa20a22 2685
1da177e4
LT		 2686static void mii_set_auto_on(struct velocity_info *vptr)
2687{
2688 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
2689 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
2690 else
2691 MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2692}
2693
2694
2695/*
2696static void mii_set_auto_off(struct velocity_info * vptr)
2697{
2698 MII_REG_BITS_OFF(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2699}
2700*/
2701
2702/**
2703 * set_mii_flow_control - flow control setup
2704 * @vptr: velocity interface
2705 *
2706 * Set up the flow control on this interface according to
2707 * the supplied user/eeprom options.
2708 */
6aa20a22 2709
1da177e4
LT		 2710static void set_mii_flow_control(struct velocity_info *vptr)
2711{
2712 /*Enable or Disable PAUSE in ANAR */
2713 switch (vptr->options.flow_cntl) {
2714 case FLOW_CNTL_TX:
2715 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2716 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2717 break;
2718
2719 case FLOW_CNTL_RX:
2720 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2721 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2722 break;
2723
2724 case FLOW_CNTL_TX_RX:
2725 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2726 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2727 break;
2728
2729 case FLOW_CNTL_DISABLE:
2730 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2731 MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2732 break;
2733 default:
2734 break;
2735 }
2736}
2737
2738/**
2739 * velocity_set_media_mode - set media mode
2740 * @mii_status: old MII link state
2741 *
2742 * Check the media link state and configure the flow control
2743 * PHY and also velocity hardware setup accordingly. In particular
2744 * we need to set up CD polling and frame bursting.
2745 */
6aa20a22 2746
1da177e4
LT		 2747static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
2748{
2749 u32 curr_status;
2750 struct mac_regs __iomem * regs = vptr->mac_regs;
2751
2752 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
2753 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
2754
2755 /* Set mii link status */
2756 set_mii_flow_control(vptr);
2757
2758 /*
2759 Check if new status is consisent with current status
2760 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE)
2761 || (mii_status==curr_status)) {
2762 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
2763 vptr->mii_status=check_connection_type(vptr->mac_regs);
2764 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
2765 return 0;
2766 }
2767 */
2768
2769 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) {
2770 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
2771 }
2772
2773 /*
2774 * If connection type is AUTO
2775 */
2776 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
2777 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
2778 /* clear force MAC mode bit */
2779 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
2780 /* set duplex mode of MAC according to duplex mode of MII */
2781 MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs);
2782 MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2783 MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs);
2784
2785 /* enable AUTO-NEGO mode */
2786 mii_set_auto_on(vptr);
2787 } else {
2788 u16 ANAR;
2789 u8 CHIPGCR;
2790
2791 /*
2792 * 1. if it's 3119, disable frame bursting in halfduplex mode
2793 * and enable it in fullduplex mode
2794 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
2795 * 3. only enable CD heart beat counter in 10HD mode
2796 */
2797
2798 /* set force MAC mode bit */
2799 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2800
2801 CHIPGCR = readb(&regs->CHIPGCR);
2802 CHIPGCR &= ~CHIPGCR_FCGMII;
2803
2804 if (mii_status & VELOCITY_DUPLEX_FULL) {
2805 CHIPGCR |= CHIPGCR_FCFDX;
2806 writeb(CHIPGCR, &regs->CHIPGCR);
2807 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
2808 if (vptr->rev_id < REV_ID_VT3216_A0)
2809 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
2810 } else {
2811 CHIPGCR &= ~CHIPGCR_FCFDX;
2812 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
2813 writeb(CHIPGCR, &regs->CHIPGCR);
2814 if (vptr->rev_id < REV_ID_VT3216_A0)
2815 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
2816 }
2817
2818 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2819
2820 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) {
2821 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
2822 } else {
2823 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
2824 }
2825 /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
2826 velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
2827 ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
2828 if (mii_status & VELOCITY_SPEED_100) {
2829 if (mii_status & VELOCITY_DUPLEX_FULL)
2830 ANAR |= ANAR_TXFD;
2831 else
2832 ANAR |= ANAR_TX;
2833 } else {
2834 if (mii_status & VELOCITY_DUPLEX_FULL)
2835 ANAR |= ANAR_10FD;
2836 else
2837 ANAR |= ANAR_10;
2838 }
2839 velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
2840 /* enable AUTO-NEGO mode */
2841 mii_set_auto_on(vptr);
2842 /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
2843 }
2844 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
2845 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
2846 return VELOCITY_LINK_CHANGE;
2847}
2848
2849/**
2850 * mii_check_media_mode - check media state
2851 * @regs: velocity registers
2852 *
2853 * Check the current MII status and determine the link status
2854 * accordingly
2855 */
6aa20a22 2856
1da177e4
LT		 2857static u32 mii_check_media_mode(struct mac_regs __iomem * regs)
2858{
2859 u32 status = 0;
2860 u16 ANAR;
2861
2862 if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
2863 status |= VELOCITY_LINK_FAIL;
2864
2865 if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
2866 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
2867 else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
2868 status |= (VELOCITY_SPEED_1000);
2869 else {
2870 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2871 if (ANAR & ANAR_TXFD)
2872 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
2873 else if (ANAR & ANAR_TX)
2874 status |= VELOCITY_SPEED_100;
2875 else if (ANAR & ANAR_10FD)
2876 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
2877 else
2878 status |= (VELOCITY_SPEED_10);
2879 }
2880
2881 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2882 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2883 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2884 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2885 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2886 status |= VELOCITY_AUTONEG_ENABLE;
2887 }
2888 }
2889
2890 return status;
2891}
2892
2893static u32 check_connection_type(struct mac_regs __iomem * regs)
2894{
2895 u32 status = 0;
2896 u8 PHYSR0;
2897 u16 ANAR;
2898 PHYSR0 = readb(&regs->PHYSR0);
2899
2900 /*
2901 if (!(PHYSR0 & PHYSR0_LINKGD))
2902 status|=VELOCITY_LINK_FAIL;
2903 */
2904
2905 if (PHYSR0 & PHYSR0_FDPX)
2906 status |= VELOCITY_DUPLEX_FULL;
2907
2908 if (PHYSR0 & PHYSR0_SPDG)
2909 status |= VELOCITY_SPEED_1000;
59b693fb 2910 else if (PHYSR0 & PHYSR0_SPD10)
1da177e4
LT		 2911 status |= VELOCITY_SPEED_10;
2912 else
2913 status |= VELOCITY_SPEED_100;
2914
2915 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2916 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2917 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2918 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2919 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2920 status |= VELOCITY_AUTONEG_ENABLE;
2921 }
2922 }
2923
2924 return status;
2925}
2926
2927/**
2928 * enable_flow_control_ability - flow control
2929 * @vptr: veloity to configure
2930 *
2931 * Set up flow control according to the flow control options
2932 * determined by the eeprom/configuration.
2933 */
2934
2935static void enable_flow_control_ability(struct velocity_info *vptr)
2936{
2937
2938 struct mac_regs __iomem * regs = vptr->mac_regs;
2939
2940 switch (vptr->options.flow_cntl) {
2941
2942 case FLOW_CNTL_DEFAULT:
2943 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
2944 writel(CR0_FDXRFCEN, &regs->CR0Set);
2945 else
2946 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2947
2948 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
2949 writel(CR0_FDXTFCEN, &regs->CR0Set);
2950 else
2951 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2952 break;
2953
2954 case FLOW_CNTL_TX:
2955 writel(CR0_FDXTFCEN, &regs->CR0Set);
2956 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2957 break;
2958
2959 case FLOW_CNTL_RX:
2960 writel(CR0_FDXRFCEN, &regs->CR0Set);
2961 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2962 break;
2963
2964 case FLOW_CNTL_TX_RX:
2965 writel(CR0_FDXTFCEN, &regs->CR0Set);
2966 writel(CR0_FDXRFCEN, &regs->CR0Set);
2967 break;
2968
2969 case FLOW_CNTL_DISABLE:
2970 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2971 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2972 break;
2973
2974 default:
2975 break;
2976 }
2977
2978}
2979
2980
2981/**
2982 * velocity_ethtool_up - pre hook for ethtool
2983 * @dev: network device
2984 *
2985 * Called before an ethtool operation. We need to make sure the
2986 * chip is out of D3 state before we poke at it.
2987 */
6aa20a22 2988
1da177e4
LT		 2989static int velocity_ethtool_up(struct net_device *dev)
2990{
8ab6f3f7 2991 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2992 if (!netif_running(dev))
2993 pci_set_power_state(vptr->pdev, PCI_D0);
2994 return 0;
6aa20a22 2995}
1da177e4
LT		 2996
2997/**
2998 * velocity_ethtool_down - post hook for ethtool
2999 * @dev: network device
3000 *
3001 * Called after an ethtool operation. Restore the chip back to D3
3002 * state if it isn't running.
3003 */
6aa20a22 3004
1da177e4
LT		 3005static void velocity_ethtool_down(struct net_device *dev)
3006{
8ab6f3f7 3007 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3008 if (!netif_running(dev))
3009 pci_set_power_state(vptr->pdev, PCI_D3hot);
3010}
3011
3012static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3013{
8ab6f3f7 3014 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3015 struct mac_regs __iomem * regs = vptr->mac_regs;
3016 u32 status;
3017 status = check_connection_type(vptr->mac_regs);
3018
59b693fb
JC		 3019 cmd->supported = SUPPORTED_TP |
3020 SUPPORTED_Autoneg |
3021 SUPPORTED_10baseT_Half |
3022 SUPPORTED_10baseT_Full |
3023 SUPPORTED_100baseT_Half |
3024 SUPPORTED_100baseT_Full |
3025 SUPPORTED_1000baseT_Half |
3026 SUPPORTED_1000baseT_Full;
3027 if (status & VELOCITY_SPEED_1000)
3028 cmd->speed = SPEED_1000;
3029 else if (status & VELOCITY_SPEED_100)
1da177e4
LT		 3030 cmd->speed = SPEED_100;
3031 else
3032 cmd->speed = SPEED_10;
3033 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
3034 cmd->port = PORT_TP;
3035 cmd->transceiver = XCVR_INTERNAL;
3036 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
3037
3038 if (status & VELOCITY_DUPLEX_FULL)
3039 cmd->duplex = DUPLEX_FULL;
3040 else
3041 cmd->duplex = DUPLEX_HALF;
6aa20a22 3042
1da177e4
LT		 3043 return 0;
3044}
3045
3046static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3047{
8ab6f3f7 3048 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3049 u32 curr_status;
3050 u32 new_status = 0;
3051 int ret = 0;
6aa20a22 3052
1da177e4
LT		 3053 curr_status = check_connection_type(vptr->mac_regs);
3054 curr_status &= (~VELOCITY_LINK_FAIL);
3055
3056 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3057 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3058 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3059 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3060
3061 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
3062 ret = -EINVAL;
3063 else
3064 velocity_set_media_mode(vptr, new_status);
3065
3066 return ret;
3067}
3068
3069static u32 velocity_get_link(struct net_device *dev)
3070{
8ab6f3f7 3071 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 3072 struct mac_regs __iomem * regs = vptr->mac_regs;
59b693fb 3073 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT		 3074}
3075
3076static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3077{
8ab6f3f7 3078 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3079 strcpy(info->driver, VELOCITY_NAME);
3080 strcpy(info->version, VELOCITY_VERSION);
3081 strcpy(info->bus_info, pci_name(vptr->pdev));
3082}
3083
3084static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3085{
8ab6f3f7 3086 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3087 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3088 wol->wolopts |= WAKE_MAGIC;
3089 /*
3090 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3091 wol.wolopts|=WAKE_PHY;
3092 */
3093 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3094 wol->wolopts |= WAKE_UCAST;
3095 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3096 wol->wolopts |= WAKE_ARP;
3097 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3098}
3099
3100static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3101{
8ab6f3f7 3102 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3103
3104 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3105 return -EFAULT;
3106 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3107
3108 /*
3109 if (wol.wolopts & WAKE_PHY) {
3110 vptr->wol_opts|=VELOCITY_WOL_PHY;
3111 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3112 }
3113 */
3114
3115 if (wol->wolopts & WAKE_MAGIC) {
3116 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3117 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3118 }
3119 if (wol->wolopts & WAKE_UCAST) {
3120 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3121 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3122 }
3123 if (wol->wolopts & WAKE_ARP) {
3124 vptr->wol_opts |= VELOCITY_WOL_ARP;
3125 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3126 }
3127 memcpy(vptr->wol_passwd, wol->sopass, 6);
3128 return 0;
3129}
3130
3131static u32 velocity_get_msglevel(struct net_device *dev)
3132{
3133 return msglevel;
3134}
3135
3136static void velocity_set_msglevel(struct net_device *dev, u32 value)
3137{
3138 msglevel = value;
3139}
3140
7282d491 3141static const struct ethtool_ops velocity_ethtool_ops = {
1da177e4
LT		 3142 .get_settings = velocity_get_settings,
3143 .set_settings = velocity_set_settings,
3144 .get_drvinfo = velocity_get_drvinfo,
3145 .get_wol = velocity_ethtool_get_wol,
3146 .set_wol = velocity_ethtool_set_wol,
3147 .get_msglevel = velocity_get_msglevel,
3148 .set_msglevel = velocity_set_msglevel,
3149 .get_link = velocity_get_link,
3150 .begin = velocity_ethtool_up,
3151 .complete = velocity_ethtool_down
3152};
3153
3154/**
3155 * velocity_mii_ioctl - MII ioctl handler
3156 * @dev: network device
3157 * @ifr: the ifreq block for the ioctl
3158 * @cmd: the command
3159 *
3160 * Process MII requests made via ioctl from the network layer. These
3161 * are used by tools like kudzu to interrogate the link state of the
3162 * hardware
3163 */
6aa20a22 3164
1da177e4
LT		 3165static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
3166{
8ab6f3f7 3167 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3168 struct mac_regs __iomem * regs = vptr->mac_regs;
3169 unsigned long flags;
3170 struct mii_ioctl_data *miidata = if_mii(ifr);
3171 int err;
6aa20a22 3172
1da177e4
LT		 3173 switch (cmd) {
3174 case SIOCGMIIPHY:
3175 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
3176 break;
3177 case SIOCGMIIREG:
3178 if (!capable(CAP_NET_ADMIN))
3179 return -EPERM;
3180 if(velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
3181 return -ETIMEDOUT;
3182 break;
3183 case SIOCSMIIREG:
3184 if (!capable(CAP_NET_ADMIN))
3185 return -EPERM;
3186 spin_lock_irqsave(&vptr->lock, flags);
3187 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
3188 spin_unlock_irqrestore(&vptr->lock, flags);
3189 check_connection_type(vptr->mac_regs);
3190 if(err)
3191 return err;
3192 break;
3193 default:
3194 return -EOPNOTSUPP;
3195 }
3196 return 0;
3197}
3198
3199#ifdef CONFIG_PM
3200
3201/**
3202 * velocity_save_context - save registers
6aa20a22 3203 * @vptr: velocity
1da177e4
LT		 3204 * @context: buffer for stored context
3205 *
3206 * Retrieve the current configuration from the velocity hardware
3207 * and stash it in the context structure, for use by the context
3208 * restore functions. This allows us to save things we need across
3209 * power down states
3210 */
6aa20a22 3211
1da177e4
LT		 3212static void velocity_save_context(struct velocity_info *vptr, struct velocity_context * context)
3213{
3214 struct mac_regs __iomem * regs = vptr->mac_regs;
3215 u16 i;
3216 u8 __iomem *ptr = (u8 __iomem *)regs;
3217
3218 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
3219 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3220
3221 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3222 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3223
3224 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3225 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3226
3227}
3228
3229/**
3230 * velocity_restore_context - restore registers
6aa20a22 3231 * @vptr: velocity
1da177e4
LT		 3232 * @context: buffer for stored context
3233 *
6aa20a22 3234 * Reload the register configuration from the velocity context
1da177e4
LT		 3235 * created by velocity_save_context.
3236 */
6aa20a22 3237
1da177e4
LT		 3238static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3239{
3240 struct mac_regs __iomem * regs = vptr->mac_regs;
3241 int i;
3242 u8 __iomem *ptr = (u8 __iomem *)regs;
3243
3244 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) {
3245 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3246 }
3247
3248 /* Just skip cr0 */
3249 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3250 /* Clear */
3251 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3252 /* Set */
3253 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3254 }
3255
3256 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) {
3257 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3258 }
3259
3260 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) {
3261 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3262 }
3263
3264 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) {
3265 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3266 }
3267
3268}
3269
3270/**
3271 * wol_calc_crc - WOL CRC
3272 * @pattern: data pattern
3273 * @mask_pattern: mask
3274 *
3275 * Compute the wake on lan crc hashes for the packet header
3276 * we are interested in.
3277 */
3278
3279static u16 wol_calc_crc(int size, u8 * pattern, u8 *mask_pattern)
3280{
3281 u16 crc = 0xFFFF;
3282 u8 mask;
3283 int i, j;
3284
3285 for (i = 0; i < size; i++) {
3286 mask = mask_pattern[i];
3287
3288 /* Skip this loop if the mask equals to zero */
3289 if (mask == 0x00)
3290 continue;
3291
3292 for (j = 0; j < 8; j++) {
3293 if ((mask & 0x01) == 0) {
3294 mask >>= 1;
3295 continue;
3296 }
3297 mask >>= 1;
3298 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
3299 }
3300 }
3301 /* Finally, invert the result once to get the correct data */
3302 crc = ~crc;
906d66df 3303 return bitrev32(crc) >> 16;
1da177e4
LT		 3304}
3305
3306/**
3307 * velocity_set_wol - set up for wake on lan
3308 * @vptr: velocity to set WOL status on
3309 *
3310 * Set a card up for wake on lan either by unicast or by
3311 * ARP packet.
3312 *
3313 * FIXME: check static buffer is safe here
3314 */
3315
3316static int velocity_set_wol(struct velocity_info *vptr)
3317{
3318 struct mac_regs __iomem * regs = vptr->mac_regs;
3319 static u8 buf[256];
3320 int i;
3321
3322 static u32 mask_pattern[2][4] = {
3323 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
3324 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
3325 };
3326
3327 writew(0xFFFF, &regs->WOLCRClr);
3328 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
3329 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
3330
3331 /*
3332 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3333 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
3334 */
3335
3336 if (vptr->wol_opts & VELOCITY_WOL_UCAST) {
3337 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
3338 }
3339
3340 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
3341 struct arp_packet *arp = (struct arp_packet *) buf;
3342 u16 crc;
3343 memset(buf, 0, sizeof(struct arp_packet) + 7);
3344
3345 for (i = 0; i < 4; i++)
3346 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
3347
3348 arp->type = htons(ETH_P_ARP);
3349 arp->ar_op = htons(1);
3350
3351 memcpy(arp->ar_tip, vptr->ip_addr, 4);
3352
3353 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
3354 (u8 *) & mask_pattern[0][0]);
3355
3356 writew(crc, &regs->PatternCRC[0]);
3357 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
3358 }
3359
3360 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
3361 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
3362
3363 writew(0x0FFF, &regs->WOLSRClr);
3364
3365 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
3366 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3367 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
3368
3369 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
3370 }
3371
3372 if (vptr->mii_status & VELOCITY_SPEED_1000)
3373 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
3374
3375 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
3376
3377 {
3378 u8 GCR;
3379 GCR = readb(&regs->CHIPGCR);
3380 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
3381 writeb(GCR, &regs->CHIPGCR);
3382 }
3383
3384 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
3385 /* Turn on SWPTAG just before entering power mode */
3386 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
3387 /* Go to bed ..... */
3388 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
3389
3390 return 0;
3391}
3392
3393static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3394{
3395 struct net_device *dev = pci_get_drvdata(pdev);
3396 struct velocity_info *vptr = netdev_priv(dev);
3397 unsigned long flags;
3398
3399 if(!netif_running(vptr->dev))
3400 return 0;
3401
3402 netif_device_detach(vptr->dev);
3403
3404 spin_lock_irqsave(&vptr->lock, flags);
3405 pci_save_state(pdev);
3406#ifdef ETHTOOL_GWOL
3407 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3408 velocity_get_ip(vptr);
3409 velocity_save_context(vptr, &vptr->context);
3410 velocity_shutdown(vptr);
3411 velocity_set_wol(vptr);
4a51c0d0 3412 pci_enable_wake(pdev, PCI_D3hot, 1);
1da177e4
LT		 3413 pci_set_power_state(pdev, PCI_D3hot);
3414 } else {
3415 velocity_save_context(vptr, &vptr->context);
3416 velocity_shutdown(vptr);
3417 pci_disable_device(pdev);
3418 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3419 }
3420#else
3421 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3422#endif
3423 spin_unlock_irqrestore(&vptr->lock, flags);
3424 return 0;
3425}
3426
3427static int velocity_resume(struct pci_dev *pdev)
3428{
3429 struct net_device *dev = pci_get_drvdata(pdev);
3430 struct velocity_info *vptr = netdev_priv(dev);
3431 unsigned long flags;
3432 int i;
3433
3434 if(!netif_running(vptr->dev))
3435 return 0;
3436
3437 pci_set_power_state(pdev, PCI_D0);
3438 pci_enable_wake(pdev, 0, 0);
3439 pci_restore_state(pdev);
3440
3441 mac_wol_reset(vptr->mac_regs);
3442
3443 spin_lock_irqsave(&vptr->lock, flags);
3444 velocity_restore_context(vptr, &vptr->context);
3445 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3446 mac_disable_int(vptr->mac_regs);
3447
3448 velocity_tx_srv(vptr, 0);
3449
0fe9f15e
FR		 3450 for (i = 0; i < vptr->tx.numq; i++) {
3451 if (vptr->tx.used[i]) {
1da177e4
LT		 3452 mac_tx_queue_wake(vptr->mac_regs, i);
3453 }
3454 }
3455
3456 mac_enable_int(vptr->mac_regs);
3457 spin_unlock_irqrestore(&vptr->lock, flags);
3458 netif_device_attach(vptr->dev);
3459
3460 return 0;
3461}
3462
ce9f7fe3
RD		 3463#ifdef CONFIG_INET
3464
1da177e4
LT		 3465static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3466{
3467 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
a337499f
DL		 3468 struct net_device *dev = ifa->ifa_dev->dev;
3469 struct velocity_info *vptr;
3470 unsigned long flags;
1da177e4 3471
c346dca1 3472 if (dev_net(dev) != &init_net)
6133fb1a
DL		 3473 return NOTIFY_DONE;
3474
a337499f
DL		 3475 spin_lock_irqsave(&velocity_dev_list_lock, flags);
3476 list_for_each_entry(vptr, &velocity_dev_list, list) {
3477 if (vptr->dev == dev) {
3478 velocity_get_ip(vptr);
3479 break;
1da177e4 3480 }
1da177e4 3481 }
a337499f
DL		 3482 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
3483
1da177e4
LT		 3484 return NOTIFY_DONE;
3485}
ce9f7fe3
RD		 3486
3487#endif
1da177e4 3488#endif
Linux kernel - Deliverables
This page took 0.64264 seconds and 5 git commands to generate.