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d1a890fa SB |
1 | /* |
2 | * Linux driver for VMware's vmxnet3 ethernet NIC. | |
3 | * | |
4 | * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; version 2 of the License and no later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
13 | * NON INFRINGEMENT. See the GNU General Public License for more | |
14 | * details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
19 | * | |
20 | * The full GNU General Public License is included in this distribution in | |
21 | * the file called "COPYING". | |
22 | * | |
23 | * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com> | |
24 | * | |
25 | */ | |
26 | ||
27 | #ifndef _VMXNET3_INT_H | |
28 | #define _VMXNET3_INT_H | |
29 | ||
72e85c45 | 30 | #include <linux/bitops.h> |
d1a890fa SB |
31 | #include <linux/ethtool.h> |
32 | #include <linux/delay.h> | |
33 | #include <linux/netdevice.h> | |
34 | #include <linux/pci.h> | |
d1a890fa | 35 | #include <linux/compiler.h> |
d1a890fa SB |
36 | #include <linux/slab.h> |
37 | #include <linux/spinlock.h> | |
38 | #include <linux/ioport.h> | |
39 | #include <linux/highmem.h> | |
d1a890fa SB |
40 | #include <linux/timer.h> |
41 | #include <linux/skbuff.h> | |
42 | #include <linux/interrupt.h> | |
43 | #include <linux/workqueue.h> | |
44 | #include <linux/uaccess.h> | |
45 | #include <asm/dma.h> | |
46 | #include <asm/page.h> | |
47 | ||
48 | #include <linux/tcp.h> | |
49 | #include <linux/udp.h> | |
50 | #include <linux/ip.h> | |
51 | #include <linux/ipv6.h> | |
52 | #include <linux/in.h> | |
53 | #include <linux/etherdevice.h> | |
54 | #include <asm/checksum.h> | |
55 | #include <linux/if_vlan.h> | |
56 | #include <linux/if_arp.h> | |
57 | #include <linux/inetdevice.h> | |
eebb02b1 | 58 | #include <linux/log2.h> |
d1a890fa SB |
59 | |
60 | #include "vmxnet3_defs.h" | |
61 | ||
62 | #ifdef DEBUG | |
63 | # define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)" | |
64 | #else | |
65 | # define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI" | |
66 | #endif | |
67 | ||
68 | ||
69 | /* | |
70 | * Version numbers | |
71 | */ | |
dd83829e | 72 | #define VMXNET3_DRIVER_VERSION_STRING "1.3.4.0-k" |
d1a890fa SB |
73 | |
74 | /* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */ | |
dd83829e | 75 | #define VMXNET3_DRIVER_VERSION_NUM 0x01030400 |
d1a890fa | 76 | |
09c5088e SB |
77 | #if defined(CONFIG_PCI_MSI) |
78 | /* RSS only makes sense if MSI-X is supported. */ | |
79 | #define VMXNET3_RSS | |
80 | #endif | |
d1a890fa SB |
81 | |
82 | /* | |
83 | * Capabilities | |
84 | */ | |
85 | ||
86 | enum { | |
87 | VMNET_CAP_SG = 0x0001, /* Can do scatter-gather transmits. */ | |
88 | VMNET_CAP_IP4_CSUM = 0x0002, /* Can checksum only TCP/UDP over | |
89 | * IPv4 */ | |
90 | VMNET_CAP_HW_CSUM = 0x0004, /* Can checksum all packets. */ | |
91 | VMNET_CAP_HIGH_DMA = 0x0008, /* Can DMA to high memory. */ | |
92 | VMNET_CAP_TOE = 0x0010, /* Supports TCP/IP offload. */ | |
93 | VMNET_CAP_TSO = 0x0020, /* Supports TCP Segmentation | |
94 | * offload */ | |
95 | VMNET_CAP_SW_TSO = 0x0040, /* Supports SW TCP Segmentation */ | |
96 | VMNET_CAP_VMXNET_APROM = 0x0080, /* Vmxnet APROM support */ | |
97 | VMNET_CAP_HW_TX_VLAN = 0x0100, /* Can we do VLAN tagging in HW */ | |
98 | VMNET_CAP_HW_RX_VLAN = 0x0200, /* Can we do VLAN untagging in HW */ | |
99 | VMNET_CAP_SW_VLAN = 0x0400, /* VLAN tagging/untagging in SW */ | |
100 | VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */ | |
101 | VMNET_CAP_ENABLE_INT_INLINE = 0x1000, /* Enable Interrupt Inline */ | |
102 | VMNET_CAP_ENABLE_HEADER_COPY = 0x2000, /* copy header for vmkernel */ | |
103 | VMNET_CAP_TX_CHAIN = 0x4000, /* Guest can use multiple tx entries | |
104 | * for a pkt */ | |
105 | VMNET_CAP_RX_CHAIN = 0x8000, /* pkt can span multiple rx entries */ | |
106 | VMNET_CAP_LPD = 0x10000, /* large pkt delivery */ | |
107 | VMNET_CAP_BPF = 0x20000, /* BPF Support in VMXNET Virtual HW*/ | |
108 | VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/ | |
109 | /* pages transmits */ | |
110 | VMNET_CAP_IP6_CSUM = 0x80000, /* Can do IPv6 csum offload. */ | |
111 | VMNET_CAP_TSO6 = 0x100000, /* TSO seg. offload for IPv6 pkts. */ | |
112 | VMNET_CAP_TSO256k = 0x200000, /* Can do TSO seg offload for */ | |
113 | /* pkts up to 256kB. */ | |
114 | VMNET_CAP_UPT = 0x400000 /* Support UPT */ | |
115 | }; | |
116 | ||
117 | /* | |
118 | * PCI vendor and device IDs. | |
119 | */ | |
d1a890fa SB |
120 | #define PCI_DEVICE_ID_VMWARE_VMXNET3 0x07B0 |
121 | #define MAX_ETHERNET_CARDS 10 | |
122 | #define MAX_PCI_PASSTHRU_DEVICE 6 | |
123 | ||
124 | struct vmxnet3_cmd_ring { | |
125 | union Vmxnet3_GenericDesc *base; | |
126 | u32 size; | |
127 | u32 next2fill; | |
128 | u32 next2comp; | |
129 | u8 gen; | |
130 | dma_addr_t basePA; | |
131 | }; | |
132 | ||
133 | static inline void | |
134 | vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring) | |
135 | { | |
136 | ring->next2fill++; | |
137 | if (unlikely(ring->next2fill == ring->size)) { | |
138 | ring->next2fill = 0; | |
139 | VMXNET3_FLIP_RING_GEN(ring->gen); | |
140 | } | |
141 | } | |
142 | ||
143 | static inline void | |
144 | vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring) | |
145 | { | |
146 | VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size); | |
147 | } | |
148 | ||
149 | static inline int | |
150 | vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring) | |
151 | { | |
152 | return (ring->next2comp > ring->next2fill ? 0 : ring->size) + | |
153 | ring->next2comp - ring->next2fill - 1; | |
154 | } | |
155 | ||
156 | struct vmxnet3_comp_ring { | |
157 | union Vmxnet3_GenericDesc *base; | |
158 | u32 size; | |
159 | u32 next2proc; | |
160 | u8 gen; | |
161 | u8 intr_idx; | |
162 | dma_addr_t basePA; | |
163 | }; | |
164 | ||
165 | static inline void | |
166 | vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring) | |
167 | { | |
168 | ring->next2proc++; | |
169 | if (unlikely(ring->next2proc == ring->size)) { | |
170 | ring->next2proc = 0; | |
171 | VMXNET3_FLIP_RING_GEN(ring->gen); | |
172 | } | |
173 | } | |
174 | ||
175 | struct vmxnet3_tx_data_ring { | |
176 | struct Vmxnet3_TxDataDesc *base; | |
177 | u32 size; | |
178 | dma_addr_t basePA; | |
179 | }; | |
180 | ||
181 | enum vmxnet3_buf_map_type { | |
182 | VMXNET3_MAP_INVALID = 0, | |
183 | VMXNET3_MAP_NONE, | |
184 | VMXNET3_MAP_SINGLE, | |
185 | VMXNET3_MAP_PAGE, | |
186 | }; | |
187 | ||
188 | struct vmxnet3_tx_buf_info { | |
189 | u32 map_type; | |
190 | u16 len; | |
191 | u16 sop_idx; | |
192 | dma_addr_t dma_addr; | |
193 | struct sk_buff *skb; | |
194 | }; | |
195 | ||
196 | struct vmxnet3_tq_driver_stats { | |
197 | u64 drop_total; /* # of pkts dropped by the driver, the | |
198 | * counters below track droppings due to | |
199 | * different reasons | |
200 | */ | |
201 | u64 drop_too_many_frags; | |
202 | u64 drop_oversized_hdr; | |
203 | u64 drop_hdr_inspect_err; | |
204 | u64 drop_tso; | |
205 | ||
206 | u64 tx_ring_full; | |
207 | u64 linearized; /* # of pkts linearized */ | |
208 | u64 copy_skb_header; /* # of times we have to copy skb header */ | |
209 | u64 oversized_hdr; | |
210 | }; | |
211 | ||
212 | struct vmxnet3_tx_ctx { | |
213 | bool ipv4; | |
214 | u16 mss; | |
215 | u32 eth_ip_hdr_size; /* only valid for pkts requesting tso or csum | |
216 | * offloading | |
217 | */ | |
218 | u32 l4_hdr_size; /* only valid if mss != 0 */ | |
219 | u32 copy_size; /* # of bytes copied into the data ring */ | |
220 | union Vmxnet3_GenericDesc *sop_txd; | |
221 | union Vmxnet3_GenericDesc *eop_txd; | |
222 | }; | |
223 | ||
224 | struct vmxnet3_tx_queue { | |
09c5088e SB |
225 | char name[IFNAMSIZ+8]; /* To identify interrupt */ |
226 | struct vmxnet3_adapter *adapter; | |
d1a890fa SB |
227 | spinlock_t tx_lock; |
228 | struct vmxnet3_cmd_ring tx_ring; | |
09c5088e | 229 | struct vmxnet3_tx_buf_info *buf_info; |
b0eb57cb | 230 | dma_addr_t buf_info_pa; |
d1a890fa SB |
231 | struct vmxnet3_tx_data_ring data_ring; |
232 | struct vmxnet3_comp_ring comp_ring; | |
09c5088e | 233 | struct Vmxnet3_TxQueueCtrl *shared; |
d1a890fa SB |
234 | struct vmxnet3_tq_driver_stats stats; |
235 | bool stopped; | |
236 | int num_stop; /* # of times the queue is | |
237 | * stopped */ | |
09c5088e | 238 | int qid; |
d1a890fa SB |
239 | } __attribute__((__aligned__(SMP_CACHE_BYTES))); |
240 | ||
241 | enum vmxnet3_rx_buf_type { | |
242 | VMXNET3_RX_BUF_NONE = 0, | |
243 | VMXNET3_RX_BUF_SKB = 1, | |
244 | VMXNET3_RX_BUF_PAGE = 2 | |
245 | }; | |
246 | ||
247 | struct vmxnet3_rx_buf_info { | |
248 | enum vmxnet3_rx_buf_type buf_type; | |
249 | u16 len; | |
250 | union { | |
251 | struct sk_buff *skb; | |
252 | struct page *page; | |
253 | }; | |
254 | dma_addr_t dma_addr; | |
255 | }; | |
256 | ||
257 | struct vmxnet3_rx_ctx { | |
258 | struct sk_buff *skb; | |
259 | u32 sop_idx; | |
260 | }; | |
261 | ||
262 | struct vmxnet3_rq_driver_stats { | |
263 | u64 drop_total; | |
264 | u64 drop_err; | |
265 | u64 drop_fcs; | |
266 | u64 rx_buf_alloc_failure; | |
267 | }; | |
268 | ||
269 | struct vmxnet3_rx_queue { | |
09c5088e SB |
270 | char name[IFNAMSIZ + 8]; /* To identify interrupt */ |
271 | struct vmxnet3_adapter *adapter; | |
272 | struct napi_struct napi; | |
d1a890fa SB |
273 | struct vmxnet3_cmd_ring rx_ring[2]; |
274 | struct vmxnet3_comp_ring comp_ring; | |
275 | struct vmxnet3_rx_ctx rx_ctx; | |
276 | u32 qid; /* rqID in RCD for buffer from 1st ring */ | |
277 | u32 qid2; /* rqID in RCD for buffer from 2nd ring */ | |
d1a890fa | 278 | struct vmxnet3_rx_buf_info *buf_info[2]; |
b0eb57cb | 279 | dma_addr_t buf_info_pa; |
d1a890fa SB |
280 | struct Vmxnet3_RxQueueCtrl *shared; |
281 | struct vmxnet3_rq_driver_stats stats; | |
282 | } __attribute__((__aligned__(SMP_CACHE_BYTES))); | |
283 | ||
09c5088e SB |
284 | #define VMXNET3_DEVICE_MAX_TX_QUEUES 8 |
285 | #define VMXNET3_DEVICE_MAX_RX_QUEUES 8 /* Keep this value as a power of 2 */ | |
286 | ||
287 | /* Should be less than UPT1_RSS_MAX_IND_TABLE_SIZE */ | |
288 | #define VMXNET3_RSS_IND_TABLE_SIZE (VMXNET3_DEVICE_MAX_RX_QUEUES * 4) | |
289 | ||
290 | #define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \ | |
291 | VMXNET3_DEVICE_MAX_RX_QUEUES + 1) | |
7e96fbf2 | 292 | #define VMXNET3_LINUX_MIN_MSIX_VECT 2 /* 1 for tx-rx pair and 1 for event */ |
09c5088e | 293 | |
d1a890fa SB |
294 | |
295 | struct vmxnet3_intr { | |
296 | enum vmxnet3_intr_mask_mode mask_mode; | |
297 | enum vmxnet3_intr_type type; /* MSI-X, MSI, or INTx? */ | |
298 | u8 num_intrs; /* # of intr vectors */ | |
299 | u8 event_intr_idx; /* idx of the intr vector for event */ | |
300 | u8 mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */ | |
09c5088e | 301 | char event_msi_vector_name[IFNAMSIZ+11]; |
d1a890fa SB |
302 | #ifdef CONFIG_PCI_MSI |
303 | struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT]; | |
304 | #endif | |
305 | }; | |
306 | ||
09c5088e SB |
307 | /* Interrupt sharing schemes, share_intr */ |
308 | #define VMXNET3_INTR_BUDDYSHARE 0 /* Corresponding tx,rx queues share irq */ | |
309 | #define VMXNET3_INTR_TXSHARE 1 /* All tx queues share one irq */ | |
310 | #define VMXNET3_INTR_DONTSHARE 2 /* each queue has its own irq */ | |
311 | ||
312 | ||
d1a890fa SB |
313 | #define VMXNET3_STATE_BIT_RESETTING 0 |
314 | #define VMXNET3_STATE_BIT_QUIESCED 1 | |
315 | struct vmxnet3_adapter { | |
09c5088e SB |
316 | struct vmxnet3_tx_queue tx_queue[VMXNET3_DEVICE_MAX_TX_QUEUES]; |
317 | struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES]; | |
72e85c45 | 318 | unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; |
09c5088e | 319 | struct vmxnet3_intr intr; |
83d0feff | 320 | spinlock_t cmd_lock; |
09c5088e SB |
321 | struct Vmxnet3_DriverShared *shared; |
322 | struct Vmxnet3_PMConf *pm_conf; | |
323 | struct Vmxnet3_TxQueueDesc *tqd_start; /* all tx queue desc */ | |
324 | struct Vmxnet3_RxQueueDesc *rqd_start; /* all rx queue desc */ | |
325 | struct net_device *netdev; | |
09c5088e | 326 | struct pci_dev *pdev; |
d1a890fa | 327 | |
81e8e560 HH |
328 | u8 __iomem *hw_addr0; /* for BAR 0 */ |
329 | u8 __iomem *hw_addr1; /* for BAR 1 */ | |
d1a890fa | 330 | |
09c5088e SB |
331 | #ifdef VMXNET3_RSS |
332 | struct UPT1_RSSConf *rss_conf; | |
333 | bool rss; | |
334 | #endif | |
335 | u32 num_rx_queues; | |
336 | u32 num_tx_queues; | |
d1a890fa SB |
337 | |
338 | /* rx buffer related */ | |
339 | unsigned skb_buf_size; | |
340 | int rx_buf_per_pkt; /* only apply to the 1st ring */ | |
341 | dma_addr_t shared_pa; | |
342 | dma_addr_t queue_desc_pa; | |
343 | ||
344 | /* Wake-on-LAN */ | |
345 | u32 wol; | |
346 | ||
347 | /* Link speed */ | |
348 | u32 link_speed; /* in mbps */ | |
349 | ||
350 | u64 tx_timeout_count; | |
f00e2b0a NH |
351 | |
352 | /* Ring sizes */ | |
353 | u32 tx_ring_size; | |
354 | u32 rx_ring_size; | |
53831aa1 | 355 | u32 rx_ring2_size; |
f00e2b0a | 356 | |
d1a890fa SB |
357 | struct work_struct work; |
358 | ||
359 | unsigned long state; /* VMXNET3_STATE_BIT_xxx */ | |
360 | ||
09c5088e | 361 | int share_intr; |
b0eb57cb AK |
362 | |
363 | dma_addr_t adapter_pa; | |
364 | dma_addr_t pm_conf_pa; | |
365 | dma_addr_t rss_conf_pa; | |
d1a890fa SB |
366 | }; |
367 | ||
368 | #define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \ | |
b8744cab | 369 | writel((val), (adapter)->hw_addr0 + (reg)) |
d1a890fa | 370 | #define VMXNET3_READ_BAR0_REG(adapter, reg) \ |
b8744cab | 371 | readl((adapter)->hw_addr0 + (reg)) |
d1a890fa SB |
372 | |
373 | #define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \ | |
b8744cab | 374 | writel((val), (adapter)->hw_addr1 + (reg)) |
d1a890fa | 375 | #define VMXNET3_READ_BAR1_REG(adapter, reg) \ |
b8744cab | 376 | readl((adapter)->hw_addr1 + (reg)) |
d1a890fa SB |
377 | |
378 | #define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5) | |
379 | #define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \ | |
380 | ((rq)->rx_ring[ring_idx].size >> 3) | |
381 | ||
382 | #define VMXNET3_GET_ADDR_LO(dma) ((u32)(dma)) | |
383 | #define VMXNET3_GET_ADDR_HI(dma) ((u32)(((u64)(dma)) >> 32)) | |
384 | ||
385 | /* must be a multiple of VMXNET3_RING_SIZE_ALIGN */ | |
386 | #define VMXNET3_DEF_TX_RING_SIZE 512 | |
387 | #define VMXNET3_DEF_RX_RING_SIZE 256 | |
53831aa1 | 388 | #define VMXNET3_DEF_RX_RING2_SIZE 128 |
d1a890fa SB |
389 | |
390 | #define VMXNET3_MAX_ETH_HDR_SIZE 22 | |
391 | #define VMXNET3_MAX_SKB_BUF_SIZE (3*1024) | |
392 | ||
393 | int | |
394 | vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter); | |
395 | ||
396 | int | |
397 | vmxnet3_activate_dev(struct vmxnet3_adapter *adapter); | |
398 | ||
399 | void | |
400 | vmxnet3_force_close(struct vmxnet3_adapter *adapter); | |
401 | ||
402 | void | |
403 | vmxnet3_reset_dev(struct vmxnet3_adapter *adapter); | |
404 | ||
405 | void | |
09c5088e | 406 | vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter); |
d1a890fa SB |
407 | |
408 | void | |
09c5088e | 409 | vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter); |
d1a890fa | 410 | |
a0d2730c | 411 | int |
c8f44aff | 412 | vmxnet3_set_features(struct net_device *netdev, netdev_features_t features); |
a0d2730c | 413 | |
d1a890fa SB |
414 | int |
415 | vmxnet3_create_queues(struct vmxnet3_adapter *adapter, | |
416 | u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size); | |
417 | ||
d8dea1eb | 418 | void vmxnet3_set_ethtool_ops(struct net_device *netdev); |
95305f6c | 419 | |
d8dea1eb | 420 | struct rtnl_link_stats64 * |
95305f6c | 421 | vmxnet3_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats); |
d1a890fa SB |
422 | |
423 | extern char vmxnet3_driver_name[]; | |
424 | #endif |