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[deliverable/linux.git] / drivers / net / wan / lmc / lmc_media.c
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1da177e4
LT		 1/* $Id: lmc_media.c,v 1.13 2000/04/11 05:25:26 asj Exp $ */
2
3#include <linux/config.h>
4#include <linux/kernel.h>
5#include <linux/string.h>
6#include <linux/timer.h>
7#include <linux/ptrace.h>
8#include <linux/errno.h>
9#include <linux/ioport.h>
10#include <linux/slab.h>
11#include <linux/interrupt.h>
12#include <linux/pci.h>
13#include <linux/in.h>
14#include <linux/if_arp.h>
15#include <linux/netdevice.h>
16#include <linux/etherdevice.h>
17#include <linux/skbuff.h>
18#include <linux/inet.h>
19#include <linux/bitops.h>
20
21#include <net/syncppp.h>
22
23#include <asm/processor.h> /* Processor type for cache alignment. */
24#include <asm/io.h>
25#include <asm/dma.h>
26
27#include <asm/uaccess.h>
28
29#include "lmc.h"
30#include "lmc_var.h"
31#include "lmc_ioctl.h"
32#include "lmc_debug.h"
33
34#define CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE 1
35
36 /*
37 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
38 * All rights reserved. www.lanmedia.com
39 *
40 * This code is written by:
41 * Andrew Stanley-Jones (asj@cban.com)
42 * Rob Braun (bbraun@vix.com),
43 * Michael Graff (explorer@vix.com) and
44 * Matt Thomas (matt@3am-software.com).
45 *
46 * This software may be used and distributed according to the terms
47 * of the GNU General Public License version 2, incorporated herein by reference.
48 */
49
1da177e4
LT		 50/*
51 * protocol independent method.
52 */
53static void lmc_set_protocol (lmc_softc_t * const, lmc_ctl_t *);
54
55/*
56 * media independent methods to check on media status, link, light LEDs,
57 * etc.
58 */
59static void lmc_ds3_init (lmc_softc_t * const);
60static void lmc_ds3_default (lmc_softc_t * const);
61static void lmc_ds3_set_status (lmc_softc_t * const, lmc_ctl_t *);
62static void lmc_ds3_set_100ft (lmc_softc_t * const, int);
63static int lmc_ds3_get_link_status (lmc_softc_t * const);
64static void lmc_ds3_set_crc_length (lmc_softc_t * const, int);
65static void lmc_ds3_set_scram (lmc_softc_t * const, int);
66static void lmc_ds3_watchdog (lmc_softc_t * const);
67
68static void lmc_hssi_init (lmc_softc_t * const);
69static void lmc_hssi_default (lmc_softc_t * const);
70static void lmc_hssi_set_status (lmc_softc_t * const, lmc_ctl_t *);
71static void lmc_hssi_set_clock (lmc_softc_t * const, int);
72static int lmc_hssi_get_link_status (lmc_softc_t * const);
73static void lmc_hssi_set_link_status (lmc_softc_t * const, int);
74static void lmc_hssi_set_crc_length (lmc_softc_t * const, int);
75static void lmc_hssi_watchdog (lmc_softc_t * const);
76
77static void lmc_ssi_init (lmc_softc_t * const);
78static void lmc_ssi_default (lmc_softc_t * const);
79static void lmc_ssi_set_status (lmc_softc_t * const, lmc_ctl_t *);
80static void lmc_ssi_set_clock (lmc_softc_t * const, int);
81static void lmc_ssi_set_speed (lmc_softc_t * const, lmc_ctl_t *);
82static int lmc_ssi_get_link_status (lmc_softc_t * const);
83static void lmc_ssi_set_link_status (lmc_softc_t * const, int);
84static void lmc_ssi_set_crc_length (lmc_softc_t * const, int);
85static void lmc_ssi_watchdog (lmc_softc_t * const);
86
87static void lmc_t1_init (lmc_softc_t * const);
88static void lmc_t1_default (lmc_softc_t * const);
89static void lmc_t1_set_status (lmc_softc_t * const, lmc_ctl_t *);
90static int lmc_t1_get_link_status (lmc_softc_t * const);
91static void lmc_t1_set_circuit_type (lmc_softc_t * const, int);
92static void lmc_t1_set_crc_length (lmc_softc_t * const, int);
93static void lmc_t1_set_clock (lmc_softc_t * const, int);
94static void lmc_t1_watchdog (lmc_softc_t * const);
95
96static void lmc_dummy_set_1 (lmc_softc_t * const, int);
97static void lmc_dummy_set2_1 (lmc_softc_t * const, lmc_ctl_t *);
98
99static inline void write_av9110_bit (lmc_softc_t *, int);
100static void write_av9110 (lmc_softc_t *, u_int32_t, u_int32_t, u_int32_t,
101 u_int32_t, u_int32_t);
102
103lmc_media_t lmc_ds3_media = {
104 lmc_ds3_init, /* special media init stuff */
105 lmc_ds3_default, /* reset to default state */
106 lmc_ds3_set_status, /* reset status to state provided */
107 lmc_dummy_set_1, /* set clock source */
108 lmc_dummy_set2_1, /* set line speed */
109 lmc_ds3_set_100ft, /* set cable length */
110 lmc_ds3_set_scram, /* set scrambler */
111 lmc_ds3_get_link_status, /* get link status */
112 lmc_dummy_set_1, /* set link status */
113 lmc_ds3_set_crc_length, /* set CRC length */
114 lmc_dummy_set_1, /* set T1 or E1 circuit type */
115 lmc_ds3_watchdog
116};
117
118lmc_media_t lmc_hssi_media = {
119 lmc_hssi_init, /* special media init stuff */
120 lmc_hssi_default, /* reset to default state */
121 lmc_hssi_set_status, /* reset status to state provided */
122 lmc_hssi_set_clock, /* set clock source */
123 lmc_dummy_set2_1, /* set line speed */
124 lmc_dummy_set_1, /* set cable length */
125 lmc_dummy_set_1, /* set scrambler */
126 lmc_hssi_get_link_status, /* get link status */
127 lmc_hssi_set_link_status, /* set link status */
128 lmc_hssi_set_crc_length, /* set CRC length */
129 lmc_dummy_set_1, /* set T1 or E1 circuit type */
130 lmc_hssi_watchdog
131};
132
133lmc_media_t lmc_ssi_media = { lmc_ssi_init, /* special media init stuff */
134 lmc_ssi_default, /* reset to default state */
135 lmc_ssi_set_status, /* reset status to state provided */
136 lmc_ssi_set_clock, /* set clock source */
137 lmc_ssi_set_speed, /* set line speed */
138 lmc_dummy_set_1, /* set cable length */
139 lmc_dummy_set_1, /* set scrambler */
140 lmc_ssi_get_link_status, /* get link status */
141 lmc_ssi_set_link_status, /* set link status */
142 lmc_ssi_set_crc_length, /* set CRC length */
143 lmc_dummy_set_1, /* set T1 or E1 circuit type */
144 lmc_ssi_watchdog
145};
146
147lmc_media_t lmc_t1_media = {
148 lmc_t1_init, /* special media init stuff */
149 lmc_t1_default, /* reset to default state */
150 lmc_t1_set_status, /* reset status to state provided */
151 lmc_t1_set_clock, /* set clock source */
152 lmc_dummy_set2_1, /* set line speed */
153 lmc_dummy_set_1, /* set cable length */
154 lmc_dummy_set_1, /* set scrambler */
155 lmc_t1_get_link_status, /* get link status */
156 lmc_dummy_set_1, /* set link status */
157 lmc_t1_set_crc_length, /* set CRC length */
158 lmc_t1_set_circuit_type, /* set T1 or E1 circuit type */
159 lmc_t1_watchdog
160};
161
162static void
163lmc_dummy_set_1 (lmc_softc_t * const sc, int a)
164{
165}
166
167static void
168lmc_dummy_set2_1 (lmc_softc_t * const sc, lmc_ctl_t * a)
169{
170}
171
172/*
173 * HSSI methods
174 */
175
176static void
177lmc_hssi_init (lmc_softc_t * const sc)
178{
179 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200;
180
181 lmc_gpio_mkoutput (sc, LMC_GEP_HSSI_CLOCK);
182}
183
184static void
185lmc_hssi_default (lmc_softc_t * const sc)
186{
187 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
188
189 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
190 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
191 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
192}
193
194/*
195 * Given a user provided state, set ourselves up to match it. This will
196 * always reset the card if needed.
197 */
198static void
199lmc_hssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
200{
201 if (ctl == NULL)
202 {
203 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
204 lmc_set_protocol (sc, NULL);
205
206 return;
207 }
208
209 /*
210 * check for change in clock source
211 */
212 if (ctl->clock_source && !sc->ictl.clock_source)
213 {
214 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
215 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
216 }
217 else if (!ctl->clock_source && sc->ictl.clock_source)
218 {
219 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
220 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
221 }
222
223 lmc_set_protocol (sc, ctl);
224}
225
226/*
227 * 1 == internal, 0 == external
228 */
229static void
230lmc_hssi_set_clock (lmc_softc_t * const sc, int ie)
231{
232 int old;
233 old = sc->ictl.clock_source;
234 if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
235 {
236 sc->lmc_gpio |= LMC_GEP_HSSI_CLOCK;
237 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
238 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
239 if(old != ie)
240 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
241 }
242 else
243 {
244 sc->lmc_gpio &= ~(LMC_GEP_HSSI_CLOCK);
245 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
246 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
247 if(old != ie)
248 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
249 }
250}
251
252/*
253 * return hardware link status.
254 * 0 == link is down, 1 == link is up.
255 */
256static int
257lmc_hssi_get_link_status (lmc_softc_t * const sc)
258{
259 /*
260 * We're using the same code as SSI since
261 * they're practically the same
262 */
263 return lmc_ssi_get_link_status(sc);
264}
265
266static void
267lmc_hssi_set_link_status (lmc_softc_t * const sc, int state)
268{
269 if (state == LMC_LINK_UP)
270 sc->lmc_miireg16 |= LMC_MII16_HSSI_TA;
271 else
272 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_TA;
273
274 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
275}
276
277/*
278 * 0 == 16bit, 1 == 32bit
279 */
280static void
281lmc_hssi_set_crc_length (lmc_softc_t * const sc, int state)
282{
283 if (state == LMC_CTL_CRC_LENGTH_32)
284 {
285 /* 32 bit */
286 sc->lmc_miireg16 |= LMC_MII16_HSSI_CRC;
287 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
288 }
289 else
290 {
291 /* 16 bit */
292 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_CRC;
293 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
294 }
295
296 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
297}
298
299static void
300lmc_hssi_watchdog (lmc_softc_t * const sc)
301{
302 /* HSSI is blank */
303}
304
305/*
306 * DS3 methods
307 */
308
309/*
310 * Set cable length
311 */
312static void
313lmc_ds3_set_100ft (lmc_softc_t * const sc, int ie)
314{
315 if (ie == LMC_CTL_CABLE_LENGTH_GT_100FT)
316 {
317 sc->lmc_miireg16 &= ~LMC_MII16_DS3_ZERO;
318 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_GT_100FT;
319 }
320 else if (ie == LMC_CTL_CABLE_LENGTH_LT_100FT)
321 {
322 sc->lmc_miireg16 |= LMC_MII16_DS3_ZERO;
323 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_LT_100FT;
324 }
325 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
326}
327
328static void
329lmc_ds3_default (lmc_softc_t * const sc)
330{
331 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
332
333 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
334 sc->lmc_media->set_cable_length (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
335 sc->lmc_media->set_scrambler (sc, LMC_CTL_OFF);
336 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
337}
338
339/*
340 * Given a user provided state, set ourselves up to match it. This will
341 * always reset the card if needed.
342 */
343static void
344lmc_ds3_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
345{
346 if (ctl == NULL)
347 {
348 sc->lmc_media->set_cable_length (sc, sc->ictl.cable_length);
349 sc->lmc_media->set_scrambler (sc, sc->ictl.scrambler_onoff);
350 lmc_set_protocol (sc, NULL);
351
352 return;
353 }
354
355 /*
356 * check for change in cable length setting
357 */
358 if (ctl->cable_length && !sc->ictl.cable_length)
359 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_GT_100FT);
360 else if (!ctl->cable_length && sc->ictl.cable_length)
361 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
362
363 /*
364 * Check for change in scrambler setting (requires reset)
365 */
366 if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff)
367 lmc_ds3_set_scram (sc, LMC_CTL_ON);
368 else if (!ctl->scrambler_onoff && sc->ictl.scrambler_onoff)
369 lmc_ds3_set_scram (sc, LMC_CTL_OFF);
370
371 lmc_set_protocol (sc, ctl);
372}
373
374static void
375lmc_ds3_init (lmc_softc_t * const sc)
376{
377 int i;
378
379 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5245;
380
381 /* writes zeros everywhere */
382 for (i = 0; i < 21; i++)
383 {
384 lmc_mii_writereg (sc, 0, 17, i);
385 lmc_mii_writereg (sc, 0, 18, 0);
386 }
387
388 /* set some essential bits */
389 lmc_mii_writereg (sc, 0, 17, 1);
390 lmc_mii_writereg (sc, 0, 18, 0x25); /* ser, xtx */
391
392 lmc_mii_writereg (sc, 0, 17, 5);
393 lmc_mii_writereg (sc, 0, 18, 0x80); /* emode */
394
395 lmc_mii_writereg (sc, 0, 17, 14);
396 lmc_mii_writereg (sc, 0, 18, 0x30); /* rcgen, tcgen */
397
398 /* clear counters and latched bits */
399 for (i = 0; i < 21; i++)
400 {
401 lmc_mii_writereg (sc, 0, 17, i);
402 lmc_mii_readreg (sc, 0, 18);
403 }
404}
405
406/*
407 * 1 == DS3 payload scrambled, 0 == not scrambled
408 */
409static void
410lmc_ds3_set_scram (lmc_softc_t * const sc, int ie)
411{
412 if (ie == LMC_CTL_ON)
413 {
414 sc->lmc_miireg16 |= LMC_MII16_DS3_SCRAM;
415 sc->ictl.scrambler_onoff = LMC_CTL_ON;
416 }
417 else
418 {
419 sc->lmc_miireg16 &= ~LMC_MII16_DS3_SCRAM;
420 sc->ictl.scrambler_onoff = LMC_CTL_OFF;
421 }
422 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
423}
424
425/*
426 * return hardware link status.
427 * 0 == link is down, 1 == link is up.
428 */
429static int
430lmc_ds3_get_link_status (lmc_softc_t * const sc)
431{
432 u_int16_t link_status, link_status_11;
433 int ret = 1;
434
435 lmc_mii_writereg (sc, 0, 17, 7);
436 link_status = lmc_mii_readreg (sc, 0, 18);
437
438 /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
439 * led0 yellow = far-end adapter is in Red alarm condition
440 * led1 blue = received an Alarm Indication signal
441 * (upstream failure)
442 * led2 Green = power to adapter, Gate Array loaded & driver
443 * attached
444 * led3 red = Loss of Signal (LOS) or out of frame (OOF)
445 * conditions detected on T3 receive signal
446 */
447
448 lmc_led_on(sc, LMC_DS3_LED2);
449
450 if ((link_status & LMC_FRAMER_REG0_DLOS) ||
451 (link_status & LMC_FRAMER_REG0_OOFS)){
452 ret = 0;
453 if(sc->last_led_err[3] != 1){
454 u16 r1;
455 lmc_mii_writereg (sc, 0, 17, 01); /* Turn on Xbit error as our cisco does */
456 r1 = lmc_mii_readreg (sc, 0, 18);
457 r1 &= 0xfe;
458 lmc_mii_writereg(sc, 0, 18, r1);
459 printk(KERN_WARNING "%s: Red Alarm - Loss of Signal or Loss of Framing\n", sc->name);
460 }
461 lmc_led_on(sc, LMC_DS3_LED3); /* turn on red LED */
462 sc->last_led_err[3] = 1;
463 }
464 else {
465 lmc_led_off(sc, LMC_DS3_LED3); /* turn on red LED */
466 if(sc->last_led_err[3] == 1){
467 u16 r1;
468 lmc_mii_writereg (sc, 0, 17, 01); /* Turn off Xbit error */
469 r1 = lmc_mii_readreg (sc, 0, 18);
470 r1 |= 0x01;
471 lmc_mii_writereg(sc, 0, 18, r1);
472 }
473 sc->last_led_err[3] = 0;
474 }
475
476 lmc_mii_writereg(sc, 0, 17, 0x10);
477 link_status_11 = lmc_mii_readreg(sc, 0, 18);
478 if((link_status & LMC_FRAMER_REG0_AIS) ||
479 (link_status_11 & LMC_FRAMER_REG10_XBIT)) {
480 ret = 0;
481 if(sc->last_led_err[0] != 1){
482 printk(KERN_WARNING "%s: AIS Alarm or XBit Error\n", sc->name);
483 printk(KERN_WARNING "%s: Remote end has loss of signal or framing\n", sc->name);
484 }
485 lmc_led_on(sc, LMC_DS3_LED0);
486 sc->last_led_err[0] = 1;
487 }
488 else {
489 lmc_led_off(sc, LMC_DS3_LED0);
490 sc->last_led_err[0] = 0;
491 }
492
493 lmc_mii_writereg (sc, 0, 17, 9);
494 link_status = lmc_mii_readreg (sc, 0, 18);
495
496 if(link_status & LMC_FRAMER_REG9_RBLUE){
497 ret = 0;
498 if(sc->last_led_err[1] != 1){
499 printk(KERN_WARNING "%s: Blue Alarm - Receiving all 1's\n", sc->name);
500 }
501 lmc_led_on(sc, LMC_DS3_LED1);
502 sc->last_led_err[1] = 1;
503 }
504 else {
505 lmc_led_off(sc, LMC_DS3_LED1);
506 sc->last_led_err[1] = 0;
507 }
508
509 return ret;
510}
511
512/*
513 * 0 == 16bit, 1 == 32bit
514 */
515static void
516lmc_ds3_set_crc_length (lmc_softc_t * const sc, int state)
517{
518 if (state == LMC_CTL_CRC_LENGTH_32)
519 {
520 /* 32 bit */
521 sc->lmc_miireg16 |= LMC_MII16_DS3_CRC;
522 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
523 }
524 else
525 {
526 /* 16 bit */
527 sc->lmc_miireg16 &= ~LMC_MII16_DS3_CRC;
528 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
529 }
530
531 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
532}
533
534static void
535lmc_ds3_watchdog (lmc_softc_t * const sc)
536{
537
538}
539
540
541/*
542 * SSI methods
543 */
544
545static void
546lmc_ssi_init (lmc_softc_t * const sc)
547{
548 u_int16_t mii17;
549 int cable;
550
551 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000;
552
553 mii17 = lmc_mii_readreg (sc, 0, 17);
554
555 cable = (mii17 & LMC_MII17_SSI_CABLE_MASK) >> LMC_MII17_SSI_CABLE_SHIFT;
556 sc->ictl.cable_type = cable;
557
558 lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
559}
560
561static void
562lmc_ssi_default (lmc_softc_t * const sc)
563{
564 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
565
566 /*
567 * make TXCLOCK always be an output
568 */
569 lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
570
571 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
572 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
573 sc->lmc_media->set_speed (sc, NULL);
574 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
575}
576
577/*
578 * Given a user provided state, set ourselves up to match it. This will
579 * always reset the card if needed.
580 */
581static void
582lmc_ssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
583{
584 if (ctl == NULL)
585 {
586 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
587 sc->lmc_media->set_speed (sc, &sc->ictl);
588 lmc_set_protocol (sc, NULL);
589
590 return;
591 }
592
593 /*
594 * check for change in clock source
595 */
596 if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_INT
597 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_EXT)
598 {
599 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
600 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
601 }
602 else if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_EXT
603 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_INT)
604 {
605 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
606 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
607 }
608
609 if (ctl->clock_rate != sc->ictl.clock_rate)
610 sc->lmc_media->set_speed (sc, ctl);
611
612 lmc_set_protocol (sc, ctl);
613}
614
615/*
616 * 1 == internal, 0 == external
617 */
618static void
619lmc_ssi_set_clock (lmc_softc_t * const sc, int ie)
620{
621 int old;
622 old = ie;
623 if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
624 {
625 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
626 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
627 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
628 if(ie != old)
629 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
630 }
631 else
632 {
633 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
634 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
635 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
636 if(ie != old)
637 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
638 }
639}
640
641static void
642lmc_ssi_set_speed (lmc_softc_t * const sc, lmc_ctl_t * ctl)
643{
644 lmc_ctl_t *ictl = &sc->ictl;
645 lmc_av9110_t *av;
646
647 /* original settings for clock rate of:
648 * 100 Khz (8,25,0,0,2) were incorrect
649 * they should have been 80,125,1,3,3
650 * There are 17 param combinations to produce this freq.
651 * For 1.5 Mhz use 120,100,1,1,2 (226 param. combinations)
652 */
653 if (ctl == NULL)
654 {
655 av = &ictl->cardspec.ssi;
656 ictl->clock_rate = 1500000;
657 av->f = ictl->clock_rate;
658 av->n = 120;
659 av->m = 100;
660 av->v = 1;
661 av->x = 1;
662 av->r = 2;
663
664 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
665 return;
666 }
667
668 av = &ctl->cardspec.ssi;
669
670 if (av->f == 0)
671 return;
672
673 ictl->clock_rate = av->f; /* really, this is the rate we are */
674 ictl->cardspec.ssi = *av;
675
676 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
677}
678
679/*
680 * return hardware link status.
681 * 0 == link is down, 1 == link is up.
682 */
683static int
684lmc_ssi_get_link_status (lmc_softc_t * const sc)
685{
686 u_int16_t link_status;
687 u_int32_t ticks;
688 int ret = 1;
689 int hw_hdsk = 1;
690
691 /*
692 * missing CTS? Hmm. If we require CTS on, we may never get the
693 * link to come up, so omit it in this test.
694 *
695 * Also, it seems that with a loopback cable, DCD isn't asserted,
696 * so just check for things like this:
697 * DSR _must_ be asserted.
698 * One of DCD or CTS must be asserted.
699 */
700
701 /* LMC 1000 (SSI) LED definitions
702 * led0 Green = power to adapter, Gate Array loaded &
703 * driver attached
704 * led1 Green = DSR and DTR and RTS and CTS are set
705 * led2 Green = Cable detected
706 * led3 red = No timing is available from the
707 * cable or the on-board frequency
708 * generator.
709 */
710
711 link_status = lmc_mii_readreg (sc, 0, 16);
712
713 /* Is the transmit clock still available */
714 ticks = LMC_CSR_READ (sc, csr_gp_timer);
715 ticks = 0x0000ffff - (ticks & 0x0000ffff);
716
717 lmc_led_on (sc, LMC_MII16_LED0);
718
719 /* ====== transmit clock determination ===== */
720 if (sc->lmc_timing == LMC_CTL_CLOCK_SOURCE_INT) {
721 lmc_led_off(sc, LMC_MII16_LED3);
722 }
723 else if (ticks == 0 ) { /* no clock found ? */
724 ret = 0;
725 if(sc->last_led_err[3] != 1){
726 sc->stats.tx_lossOfClockCnt++;
727 printk(KERN_WARNING "%s: Lost Clock, Link Down\n", sc->name);
728 }
729 sc->last_led_err[3] = 1;
730 lmc_led_on (sc, LMC_MII16_LED3); /* turn ON red LED */
731 }
732 else {
733 if(sc->last_led_err[3] == 1)
734 printk(KERN_WARNING "%s: Clock Returned\n", sc->name);
735 sc->last_led_err[3] = 0;
736 lmc_led_off (sc, LMC_MII16_LED3); /* turn OFF red LED */
737 }
738
739 if ((link_status & LMC_MII16_SSI_DSR) == 0) { /* Also HSSI CA */
740 ret = 0;
741 hw_hdsk = 0;
742 }
743
744#ifdef CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE
745 if ((link_status & (LMC_MII16_SSI_CTS | LMC_MII16_SSI_DCD)) == 0){
746 ret = 0;
747 hw_hdsk = 0;
748 }
749#endif
750
751 if(hw_hdsk == 0){
752 if(sc->last_led_err[1] != 1)
753 printk(KERN_WARNING "%s: DSR not asserted\n", sc->name);
754 sc->last_led_err[1] = 1;
755 lmc_led_off(sc, LMC_MII16_LED1);
756 }
757 else {
758 if(sc->last_led_err[1] != 0)
759 printk(KERN_WARNING "%s: DSR now asserted\n", sc->name);
760 sc->last_led_err[1] = 0;
761 lmc_led_on(sc, LMC_MII16_LED1);
762 }
763
764 if(ret == 1) {
765 lmc_led_on(sc, LMC_MII16_LED2); /* Over all good status? */
766 }
767
768 return ret;
769}
770
771static void
772lmc_ssi_set_link_status (lmc_softc_t * const sc, int state)
773{
774 if (state == LMC_LINK_UP)
775 {
776 sc->lmc_miireg16 |= (LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
777 printk (LMC_PRINTF_FMT ": asserting DTR and RTS\n", LMC_PRINTF_ARGS);
778 }
779 else
780 {
781 sc->lmc_miireg16 &= ~(LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
782 printk (LMC_PRINTF_FMT ": deasserting DTR and RTS\n", LMC_PRINTF_ARGS);
783 }
784
785 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
786
787}
788
789/*
790 * 0 == 16bit, 1 == 32bit
791 */
792static void
793lmc_ssi_set_crc_length (lmc_softc_t * const sc, int state)
794{
795 if (state == LMC_CTL_CRC_LENGTH_32)
796 {
797 /* 32 bit */
798 sc->lmc_miireg16 |= LMC_MII16_SSI_CRC;
799 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
800 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
801
802 }
803 else
804 {
805 /* 16 bit */
806 sc->lmc_miireg16 &= ~LMC_MII16_SSI_CRC;
807 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
808 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
809 }
810
811 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
812}
813
814/*
815 * These are bits to program the ssi frequency generator
816 */
817static inline void
818write_av9110_bit (lmc_softc_t * sc, int c)
819{
820 /*
821 * set the data bit as we need it.
822 */
823 sc->lmc_gpio &= ~(LMC_GEP_CLK);
824 if (c & 0x01)
825 sc->lmc_gpio |= LMC_GEP_DATA;
826 else
827 sc->lmc_gpio &= ~(LMC_GEP_DATA);
828 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
829
830 /*
831 * set the clock to high
832 */
833 sc->lmc_gpio |= LMC_GEP_CLK;
834 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
835
836 /*
837 * set the clock to low again.
838 */
839 sc->lmc_gpio &= ~(LMC_GEP_CLK);
840 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
841}
842
843static void
844write_av9110 (lmc_softc_t * sc, u_int32_t n, u_int32_t m, u_int32_t v,
845 u_int32_t x, u_int32_t r)
846{
847 int i;
848
849#if 0
850 printk (LMC_PRINTF_FMT ": speed %u, %d %d %d %d %d\n",
851 LMC_PRINTF_ARGS, sc->ictl.clock_rate, n, m, v, x, r);
852#endif
853
854 sc->lmc_gpio |= LMC_GEP_SSI_GENERATOR;
855 sc->lmc_gpio &= ~(LMC_GEP_DATA | LMC_GEP_CLK);
856 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
857
858 /*
859 * Set the TXCLOCK, GENERATOR, SERIAL, and SERIALCLK
860 * as outputs.
861 */
862 lmc_gpio_mkoutput (sc, (LMC_GEP_DATA | LMC_GEP_CLK
863 | LMC_GEP_SSI_GENERATOR));
864
865 sc->lmc_gpio &= ~(LMC_GEP_SSI_GENERATOR);
866 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
867
868 /*
869 * a shifting we will go...
870 */
871 for (i = 0; i < 7; i++)
872 write_av9110_bit (sc, n >> i);
873 for (i = 0; i < 7; i++)
874 write_av9110_bit (sc, m >> i);
875 for (i = 0; i < 1; i++)
876 write_av9110_bit (sc, v >> i);
877 for (i = 0; i < 2; i++)
878 write_av9110_bit (sc, x >> i);
879 for (i = 0; i < 2; i++)
880 write_av9110_bit (sc, r >> i);
881 for (i = 0; i < 5; i++)
882 write_av9110_bit (sc, 0x17 >> i);
883
884 /*
885 * stop driving serial-related signals
886 */
887 lmc_gpio_mkinput (sc,
888 (LMC_GEP_DATA | LMC_GEP_CLK
889 | LMC_GEP_SSI_GENERATOR));
890}
891
892static void
893lmc_ssi_watchdog (lmc_softc_t * const sc)
894{
895 u_int16_t mii17;
896 struct ssicsr2
897 {
898 unsigned short dtr:1, dsr:1, rts:1, cable:3, crc:1, led0:1, led1:1,
899 led2:1, led3:1, fifo:1, ll:1, rl:1, tm:1, loop:1;
900 };
901 struct ssicsr2 *ssicsr;
902 mii17 = lmc_mii_readreg (sc, 0, 17);
903 ssicsr = (struct ssicsr2 *) &mii17;
904 if (ssicsr->cable == 7)
905 {
906 lmc_led_off (sc, LMC_MII16_LED2);
907 }
908 else
909 {
910 lmc_led_on (sc, LMC_MII16_LED2);
911 }
912
913}
914
915/*
916 * T1 methods
917 */
918
919/*
920 * The framer regs are multiplexed through MII regs 17 & 18
921 * write the register address to MII reg 17 and the * data to MII reg 18. */
922static void
923lmc_t1_write (lmc_softc_t * const sc, int a, int d)
924{
925 lmc_mii_writereg (sc, 0, 17, a);
926 lmc_mii_writereg (sc, 0, 18, d);
927}
928
929/* Save a warning
930static int
931lmc_t1_read (lmc_softc_t * const sc, int a)
932{
933 lmc_mii_writereg (sc, 0, 17, a);
934 return lmc_mii_readreg (sc, 0, 18);
935}
936*/
937
938
939static void
940lmc_t1_init (lmc_softc_t * const sc)
941{
942 u_int16_t mii16;
943 int i;
944
945 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1200;
946 mii16 = lmc_mii_readreg (sc, 0, 16);
947
948 /* reset 8370 */
949 mii16 &= ~LMC_MII16_T1_RST;
950 lmc_mii_writereg (sc, 0, 16, mii16 | LMC_MII16_T1_RST);
951 lmc_mii_writereg (sc, 0, 16, mii16);
952
953 /* set T1 or E1 line. Uses sc->lmcmii16 reg in function so update it */
954 sc->lmc_miireg16 = mii16;
955 lmc_t1_set_circuit_type(sc, LMC_CTL_CIRCUIT_TYPE_T1);
956 mii16 = sc->lmc_miireg16;
957
958 lmc_t1_write (sc, 0x01, 0x1B); /* CR0 - primary control */
959 lmc_t1_write (sc, 0x02, 0x42); /* JAT_CR - jitter atten config */
960 lmc_t1_write (sc, 0x14, 0x00); /* LOOP - loopback config */
961 lmc_t1_write (sc, 0x15, 0x00); /* DL3_TS - external data link timeslot */
962 lmc_t1_write (sc, 0x18, 0xFF); /* PIO - programmable I/O */
963 lmc_t1_write (sc, 0x19, 0x30); /* POE - programmable OE */
964 lmc_t1_write (sc, 0x1A, 0x0F); /* CMUX - clock input mux */
965 lmc_t1_write (sc, 0x20, 0x41); /* LIU_CR - RX LIU config */
966 lmc_t1_write (sc, 0x22, 0x76); /* RLIU_CR - RX LIU config */
967 lmc_t1_write (sc, 0x40, 0x03); /* RCR0 - RX config */
968 lmc_t1_write (sc, 0x45, 0x00); /* RALM - RX alarm config */
969 lmc_t1_write (sc, 0x46, 0x05); /* LATCH - RX alarm/err/cntr latch */
970 lmc_t1_write (sc, 0x68, 0x40); /* TLIU_CR - TX LIU config */
971 lmc_t1_write (sc, 0x70, 0x0D); /* TCR0 - TX framer config */
972 lmc_t1_write (sc, 0x71, 0x05); /* TCR1 - TX config */
973 lmc_t1_write (sc, 0x72, 0x0B); /* TFRM - TX frame format */
974 lmc_t1_write (sc, 0x73, 0x00); /* TERROR - TX error insert */
975 lmc_t1_write (sc, 0x74, 0x00); /* TMAN - TX manual Sa/FEBE config */
976 lmc_t1_write (sc, 0x75, 0x00); /* TALM - TX alarm signal config */
977 lmc_t1_write (sc, 0x76, 0x00); /* TPATT - TX test pattern config */
978 lmc_t1_write (sc, 0x77, 0x00); /* TLB - TX inband loopback config */
979 lmc_t1_write (sc, 0x90, 0x05); /* CLAD_CR - clock rate adapter config */
980 lmc_t1_write (sc, 0x91, 0x05); /* CSEL - clad freq sel */
981 lmc_t1_write (sc, 0xA6, 0x00); /* DL1_CTL - DL1 control */
982 lmc_t1_write (sc, 0xB1, 0x00); /* DL2_CTL - DL2 control */
983 lmc_t1_write (sc, 0xD0, 0x47); /* SBI_CR - sys bus iface config */
984 lmc_t1_write (sc, 0xD1, 0x70); /* RSB_CR - RX sys bus config */
985 lmc_t1_write (sc, 0xD4, 0x30); /* TSB_CR - TX sys bus config */
986 for (i = 0; i < 32; i++)
987 {
988 lmc_t1_write (sc, 0x0E0 + i, 0x00); /* SBCn - sys bus per-channel ctl */
989 lmc_t1_write (sc, 0x100 + i, 0x00); /* TPCn - TX per-channel ctl */
990 lmc_t1_write (sc, 0x180 + i, 0x00); /* RPCn - RX per-channel ctl */
991 }
992 for (i = 1; i < 25; i++)
993 {
994 lmc_t1_write (sc, 0x0E0 + i, 0x0D); /* SBCn - sys bus per-channel ctl */
995 }
996
997 mii16 |= LMC_MII16_T1_XOE;
998 lmc_mii_writereg (sc, 0, 16, mii16);
999 sc->lmc_miireg16 = mii16;
1000}
1001
1002static void
1003lmc_t1_default (lmc_softc_t * const sc)
1004{
1005 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
1006 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
1007 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
1008 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
1009 /* Right now we can only clock from out internal source */
1010 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
1011}
1012/* * Given a user provided state, set ourselves up to match it. This will * always reset the card if needed.
1013 */
1014static void
1015lmc_t1_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
1016{
1017 if (ctl == NULL)
1018 {
1019 sc->lmc_media->set_circuit_type (sc, sc->ictl.circuit_type);
1020 lmc_set_protocol (sc, NULL);
1021
1022 return;
1023 }
1024 /*
1025 * check for change in circuit type */
1026 if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_T1
1027 && sc->ictl.circuit_type ==
1028 LMC_CTL_CIRCUIT_TYPE_E1) sc->lmc_media->set_circuit_type (sc,
1029 LMC_CTL_CIRCUIT_TYPE_E1);
1030 else if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_E1
1031 && sc->ictl.circuit_type == LMC_CTL_CIRCUIT_TYPE_T1)
1032 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
1033 lmc_set_protocol (sc, ctl);
1034}
1035/*
1036 * return hardware link status.
1037 * 0 == link is down, 1 == link is up.
1038 */ static int
1039lmc_t1_get_link_status (lmc_softc_t * const sc)
1040{
1041 u_int16_t link_status;
1042 int ret = 1;
1043
1044 /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
1045 * led0 yellow = far-end adapter is in Red alarm condition
1046 * led1 blue = received an Alarm Indication signal
1047 * (upstream failure)
1048 * led2 Green = power to adapter, Gate Array loaded & driver
1049 * attached
1050 * led3 red = Loss of Signal (LOS) or out of frame (OOF)
1051 * conditions detected on T3 receive signal
1052 */
1053 lmc_trace(sc->lmc_device, "lmc_t1_get_link_status in");
1054 lmc_led_on(sc, LMC_DS3_LED2);
1055
1056 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM1_STATUS);
1057 link_status = lmc_mii_readreg (sc, 0, 18);
1058
1059
1060 if (link_status & T1F_RAIS) { /* turn on blue LED */
1061 ret = 0;
1062 if(sc->last_led_err[1] != 1){
1063 printk(KERN_WARNING "%s: Receive AIS/Blue Alarm. Far end in RED alarm\n", sc->name);
1064 }
1065 lmc_led_on(sc, LMC_DS3_LED1);
1066 sc->last_led_err[1] = 1;
1067 }
1068 else {
1069 if(sc->last_led_err[1] != 0){
1070 printk(KERN_WARNING "%s: End AIS/Blue Alarm\n", sc->name);
1071 }
1072 lmc_led_off (sc, LMC_DS3_LED1);
1073 sc->last_led_err[1] = 0;
1074 }
1075
1076 /*
1077 * Yellow Alarm is nasty evil stuff, looks at data patterns
1078 * inside the channel and confuses it with HDLC framing
1079 * ignore all yellow alarms.
1080 *
1081 * Do listen to MultiFrame Yellow alarm which while implemented
1082 * different ways isn't in the channel and hence somewhat
1083 * more reliable
1084 */
1085
1086 if (link_status & T1F_RMYEL) {
1087 ret = 0;
1088 if(sc->last_led_err[0] != 1){
1089 printk(KERN_WARNING "%s: Receive Yellow AIS Alarm\n", sc->name);
1090 }
1091 lmc_led_on(sc, LMC_DS3_LED0);
1092 sc->last_led_err[0] = 1;
1093 }
1094 else {
1095 if(sc->last_led_err[0] != 0){
1096 printk(KERN_WARNING "%s: End of Yellow AIS Alarm\n", sc->name);
1097 }
1098 lmc_led_off(sc, LMC_DS3_LED0);
1099 sc->last_led_err[0] = 0;
1100 }
1101
1102 /*
1103 * Loss of signal and los of frame
1104 * Use the green bit to identify which one lit the led
1105 */
1106 if(link_status & T1F_RLOF){
1107 ret = 0;
1108 if(sc->last_led_err[3] != 1){
1109 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Framing\n", sc->name);
1110 }
1111 lmc_led_on(sc, LMC_DS3_LED3);
1112 sc->last_led_err[3] = 1;
1113
1114 }
1115 else {
1116 if(sc->last_led_err[3] != 0){
1117 printk(KERN_WARNING "%s: End Red Alarm (LOF)\n", sc->name);
1118 }
1119 if( ! (link_status & T1F_RLOS))
1120 lmc_led_off(sc, LMC_DS3_LED3);
1121 sc->last_led_err[3] = 0;
1122 }
1123
1124 if(link_status & T1F_RLOS){
1125 ret = 0;
1126 if(sc->last_led_err[2] != 1){
1127 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Signal\n", sc->name);
1128 }
1129 lmc_led_on(sc, LMC_DS3_LED3);
1130 sc->last_led_err[2] = 1;
1131
1132 }
1133 else {
1134 if(sc->last_led_err[2] != 0){
1135 printk(KERN_WARNING "%s: End Red Alarm (LOS)\n", sc->name);
1136 }
1137 if( ! (link_status & T1F_RLOF))
1138 lmc_led_off(sc, LMC_DS3_LED3);
1139 sc->last_led_err[2] = 0;
1140 }
1141
1142 sc->lmc_xinfo.t1_alarm1_status = link_status;
1143
1144 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM2_STATUS);
1145 sc->lmc_xinfo.t1_alarm2_status = lmc_mii_readreg (sc, 0, 18);
1146
1147
1148 lmc_trace(sc->lmc_device, "lmc_t1_get_link_status out");
1149
1150 return ret;
1151}
1152
1153/*
1154 * 1 == T1 Circuit Type , 0 == E1 Circuit Type
1155 */
1156static void
1157lmc_t1_set_circuit_type (lmc_softc_t * const sc, int ie)
1158{
1159 if (ie == LMC_CTL_CIRCUIT_TYPE_T1) {
1160 sc->lmc_miireg16 |= LMC_MII16_T1_Z;
1161 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_T1;
1162 printk(KERN_INFO "%s: In T1 Mode\n", sc->name);
1163 }
1164 else {
1165 sc->lmc_miireg16 &= ~LMC_MII16_T1_Z;
1166 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_E1;
1167 printk(KERN_INFO "%s: In E1 Mode\n", sc->name);
1168 }
1169
1170 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
1171
1172}
1173
1174/*
1175 * 0 == 16bit, 1 == 32bit */
1176static void
1177lmc_t1_set_crc_length (lmc_softc_t * const sc, int state)
1178{
1179 if (state == LMC_CTL_CRC_LENGTH_32)
1180 {
1181 /* 32 bit */
1182 sc->lmc_miireg16 |= LMC_MII16_T1_CRC;
1183 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
1184 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
1185
1186 }
1187 else
1188 {
1189 /* 16 bit */ sc->lmc_miireg16 &= ~LMC_MII16_T1_CRC;
1190 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
1191 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
1192
1193 }
1194
1195 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
1196}
1197
1198/*
1199 * 1 == internal, 0 == external
1200 */
1201static void
1202lmc_t1_set_clock (lmc_softc_t * const sc, int ie)
1203{
1204 int old;
1205 old = ie;
1206 if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
1207 {
1208 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
1209 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
1210 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
1211 if(old != ie)
1212 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
1213 }
1214 else
1215 {
1216 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
1217 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
1218 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
1219 if(old != ie)
1220 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
1221 }
1222}
1223
1224static void
1225lmc_t1_watchdog (lmc_softc_t * const sc)
1226{
1227}
1228
1229static void
1230lmc_set_protocol (lmc_softc_t * const sc, lmc_ctl_t * ctl)
1231{
1232 if (ctl == 0)
1233 {
1234 sc->ictl.keepalive_onoff = LMC_CTL_ON;
1235
1236 return;
1237 }
1238}
Linux kernel - Deliverables
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