ath10k: expose hw restart via debugfs
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / core.c
CommitLineData
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1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
20
21#include "core.h"
22#include "mac.h"
23#include "htc.h"
24#include "hif.h"
25#include "wmi.h"
26#include "bmi.h"
27#include "debug.h"
28#include "htt.h"
43d2a30f 29#include "testmode.h"
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30
31unsigned int ath10k_debug_mask;
32static bool uart_print;
33static unsigned int ath10k_p2p;
34module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
35module_param(uart_print, bool, 0644);
36module_param_named(p2p, ath10k_p2p, uint, 0644);
37MODULE_PARM_DESC(debug_mask, "Debugging mask");
38MODULE_PARM_DESC(uart_print, "Uart target debugging");
39MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
40
41static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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42 {
43 .id = QCA988X_HW_2_0_VERSION,
44 .name = "qca988x hw2.0",
45 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
46 .fw = {
47 .dir = QCA988X_HW_2_0_FW_DIR,
48 .fw = QCA988X_HW_2_0_FW_FILE,
49 .otp = QCA988X_HW_2_0_OTP_FILE,
50 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
51 },
52 },
53};
54
55static void ath10k_send_suspend_complete(struct ath10k *ar)
56{
7aa7a72a 57 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
5e3dd157 58
9042e17d 59 complete(&ar->target_suspend);
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60}
61
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62static int ath10k_init_configure_target(struct ath10k *ar)
63{
64 u32 param_host;
65 int ret;
66
67 /* tell target which HTC version it is used*/
68 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
69 HTC_PROTOCOL_VERSION);
70 if (ret) {
7aa7a72a 71 ath10k_err(ar, "settings HTC version failed\n");
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72 return ret;
73 }
74
75 /* set the firmware mode to STA/IBSS/AP */
76 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
77 if (ret) {
7aa7a72a 78 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
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79 return ret;
80 }
81
82 /* TODO following parameters need to be re-visited. */
83 /* num_device */
84 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
85 /* Firmware mode */
86 /* FIXME: Why FW_MODE_AP ??.*/
87 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
88 /* mac_addr_method */
89 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
90 /* firmware_bridge */
91 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
92 /* fwsubmode */
93 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
94
95 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
96 if (ret) {
7aa7a72a 97 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
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98 return ret;
99 }
100
101 /* We do all byte-swapping on the host */
102 ret = ath10k_bmi_write32(ar, hi_be, 0);
103 if (ret) {
7aa7a72a 104 ath10k_err(ar, "setting host CPU BE mode failed\n");
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105 return ret;
106 }
107
108 /* FW descriptor/Data swap flags */
109 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
110
111 if (ret) {
7aa7a72a 112 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
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113 return ret;
114 }
115
116 return 0;
117}
118
119static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
120 const char *dir,
121 const char *file)
122{
123 char filename[100];
124 const struct firmware *fw;
125 int ret;
126
127 if (file == NULL)
128 return ERR_PTR(-ENOENT);
129
130 if (dir == NULL)
131 dir = ".";
132
133 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
134 ret = request_firmware(&fw, filename, ar->dev);
135 if (ret)
136 return ERR_PTR(ret);
137
138 return fw;
139}
140
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141static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
142 size_t data_len)
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143{
144 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
145 u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
146 u32 board_ext_data_addr;
147 int ret;
148
149 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
150 if (ret) {
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151 ath10k_err(ar, "could not read board ext data addr (%d)\n",
152 ret);
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153 return ret;
154 }
155
7aa7a72a 156 ath10k_dbg(ar, ATH10K_DBG_BOOT,
effea968 157 "boot push board extended data addr 0x%x\n",
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158 board_ext_data_addr);
159
160 if (board_ext_data_addr == 0)
161 return 0;
162
a58227ef 163 if (data_len != (board_data_size + board_ext_data_size)) {
7aa7a72a 164 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
a58227ef 165 data_len, board_data_size, board_ext_data_size);
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166 return -EINVAL;
167 }
168
169 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
a58227ef 170 data + board_data_size,
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171 board_ext_data_size);
172 if (ret) {
7aa7a72a 173 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
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174 return ret;
175 }
176
177 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
178 (board_ext_data_size << 16) | 1);
179 if (ret) {
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180 ath10k_err(ar, "could not write board ext data bit (%d)\n",
181 ret);
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182 return ret;
183 }
184
185 return 0;
186}
187
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188static int ath10k_download_board_data(struct ath10k *ar, const void *data,
189 size_t data_len)
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190{
191 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
192 u32 address;
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193 int ret;
194
a58227ef 195 ret = ath10k_push_board_ext_data(ar, data, data_len);
5e3dd157 196 if (ret) {
7aa7a72a 197 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
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198 goto exit;
199 }
200
201 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
202 if (ret) {
7aa7a72a 203 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
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204 goto exit;
205 }
206
a58227ef 207 ret = ath10k_bmi_write_memory(ar, address, data,
958df3a0 208 min_t(u32, board_data_size,
a58227ef 209 data_len));
5e3dd157 210 if (ret) {
7aa7a72a 211 ath10k_err(ar, "could not write board data (%d)\n", ret);
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212 goto exit;
213 }
214
215 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
216 if (ret) {
7aa7a72a 217 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
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218 goto exit;
219 }
220
221exit:
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222 return ret;
223}
224
a58227ef
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225static int ath10k_download_cal_file(struct ath10k *ar)
226{
227 int ret;
228
229 if (!ar->cal_file)
230 return -ENOENT;
231
232 if (IS_ERR(ar->cal_file))
233 return PTR_ERR(ar->cal_file);
234
235 ret = ath10k_download_board_data(ar, ar->cal_file->data,
236 ar->cal_file->size);
237 if (ret) {
238 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
239 return ret;
240 }
241
242 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
243
244 return 0;
245}
246
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247static int ath10k_download_and_run_otp(struct ath10k *ar)
248{
d6d4a58d 249 u32 result, address = ar->hw_params.patch_load_addr;
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250 int ret;
251
a58227ef 252 ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
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253 if (ret) {
254 ath10k_err(ar, "failed to download board data: %d\n", ret);
255 return ret;
256 }
257
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258 /* OTP is optional */
259
7f06ea1e 260 if (!ar->otp_data || !ar->otp_len) {
7aa7a72a 261 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
36a8f413 262 ar->otp_data, ar->otp_len);
5e3dd157 263 return 0;
7f06ea1e
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264 }
265
7aa7a72a 266 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
7f06ea1e 267 address, ar->otp_len);
5e3dd157 268
958df3a0 269 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
5e3dd157 270 if (ret) {
7aa7a72a 271 ath10k_err(ar, "could not write otp (%d)\n", ret);
7f06ea1e 272 return ret;
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273 }
274
d6d4a58d 275 ret = ath10k_bmi_execute(ar, address, 0, &result);
5e3dd157 276 if (ret) {
7aa7a72a 277 ath10k_err(ar, "could not execute otp (%d)\n", ret);
7f06ea1e 278 return ret;
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279 }
280
7aa7a72a 281 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
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282
283 if (result != 0) {
7aa7a72a 284 ath10k_err(ar, "otp calibration failed: %d", result);
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285 return -EINVAL;
286 }
287
288 return 0;
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289}
290
43d2a30f 291static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
5e3dd157 292{
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293 u32 address, data_len;
294 const char *mode_name;
295 const void *data;
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296 int ret;
297
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298 address = ar->hw_params.patch_load_addr;
299
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300 switch (mode) {
301 case ATH10K_FIRMWARE_MODE_NORMAL:
302 data = ar->firmware_data;
303 data_len = ar->firmware_len;
304 mode_name = "normal";
305 break;
306 case ATH10K_FIRMWARE_MODE_UTF:
307 data = ar->testmode.utf->data;
308 data_len = ar->testmode.utf->size;
309 mode_name = "utf";
310 break;
311 default:
312 ath10k_err(ar, "unknown firmware mode: %d\n", mode);
313 return -EINVAL;
314 }
315
316 ath10k_dbg(ar, ATH10K_DBG_BOOT,
317 "boot uploading firmware image %p len %d mode %s\n",
318 data, data_len, mode_name);
319
320 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
5e3dd157 321 if (ret) {
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322 ath10k_err(ar, "failed to download %s firmware: %d\n",
323 mode_name, ret);
324 return ret;
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325 }
326
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327 return ret;
328}
329
330static void ath10k_core_free_firmware_files(struct ath10k *ar)
331{
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332 if (ar->board && !IS_ERR(ar->board))
333 release_firmware(ar->board);
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334
335 if (ar->otp && !IS_ERR(ar->otp))
336 release_firmware(ar->otp);
337
338 if (ar->firmware && !IS_ERR(ar->firmware))
339 release_firmware(ar->firmware);
340
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341 if (ar->cal_file && !IS_ERR(ar->cal_file))
342 release_firmware(ar->cal_file);
343
36527916 344 ar->board = NULL;
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345 ar->board_data = NULL;
346 ar->board_len = 0;
347
29385057 348 ar->otp = NULL;
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349 ar->otp_data = NULL;
350 ar->otp_len = 0;
351
29385057 352 ar->firmware = NULL;
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353 ar->firmware_data = NULL;
354 ar->firmware_len = 0;
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355
356 ar->cal_file = NULL;
357}
358
359static int ath10k_fetch_cal_file(struct ath10k *ar)
360{
361 char filename[100];
362
363 /* cal-<bus>-<id>.bin */
364 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
365 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
366
367 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
368 if (IS_ERR(ar->cal_file))
369 /* calibration file is optional, don't print any warnings */
370 return PTR_ERR(ar->cal_file);
371
372 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
373 ATH10K_FW_DIR, filename);
374
375 return 0;
29385057
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376}
377
1a222435 378static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
29385057
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379{
380 int ret = 0;
381
382 if (ar->hw_params.fw.fw == NULL) {
7aa7a72a 383 ath10k_err(ar, "firmware file not defined\n");
29385057
MK
384 return -EINVAL;
385 }
386
387 if (ar->hw_params.fw.board == NULL) {
7aa7a72a 388 ath10k_err(ar, "board data file not defined");
29385057
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389 return -EINVAL;
390 }
391
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392 ar->board = ath10k_fetch_fw_file(ar,
393 ar->hw_params.fw.dir,
394 ar->hw_params.fw.board);
395 if (IS_ERR(ar->board)) {
396 ret = PTR_ERR(ar->board);
7aa7a72a 397 ath10k_err(ar, "could not fetch board data (%d)\n", ret);
29385057
MK
398 goto err;
399 }
400
958df3a0
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401 ar->board_data = ar->board->data;
402 ar->board_len = ar->board->size;
403
29385057
MK
404 ar->firmware = ath10k_fetch_fw_file(ar,
405 ar->hw_params.fw.dir,
406 ar->hw_params.fw.fw);
407 if (IS_ERR(ar->firmware)) {
408 ret = PTR_ERR(ar->firmware);
7aa7a72a 409 ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
29385057
MK
410 goto err;
411 }
412
958df3a0
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413 ar->firmware_data = ar->firmware->data;
414 ar->firmware_len = ar->firmware->size;
415
29385057
MK
416 /* OTP may be undefined. If so, don't fetch it at all */
417 if (ar->hw_params.fw.otp == NULL)
418 return 0;
419
420 ar->otp = ath10k_fetch_fw_file(ar,
421 ar->hw_params.fw.dir,
422 ar->hw_params.fw.otp);
423 if (IS_ERR(ar->otp)) {
424 ret = PTR_ERR(ar->otp);
7aa7a72a 425 ath10k_err(ar, "could not fetch otp (%d)\n", ret);
29385057
MK
426 goto err;
427 }
428
958df3a0
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429 ar->otp_data = ar->otp->data;
430 ar->otp_len = ar->otp->size;
431
29385057
MK
432 return 0;
433
434err:
435 ath10k_core_free_firmware_files(ar);
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436 return ret;
437}
438
1a222435
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439static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
440{
441 size_t magic_len, len, ie_len;
442 int ie_id, i, index, bit, ret;
443 struct ath10k_fw_ie *hdr;
444 const u8 *data;
445 __le32 *timestamp;
446
447 /* first fetch the firmware file (firmware-*.bin) */
448 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
449 if (IS_ERR(ar->firmware)) {
7aa7a72a 450 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
53c02284 451 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
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452 return PTR_ERR(ar->firmware);
453 }
454
455 data = ar->firmware->data;
456 len = ar->firmware->size;
457
458 /* magic also includes the null byte, check that as well */
459 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
460
461 if (len < magic_len) {
7aa7a72a 462 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
53c02284 463 ar->hw_params.fw.dir, name, len);
9bab1cc0
MK
464 ret = -EINVAL;
465 goto err;
1a222435
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466 }
467
468 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
7aa7a72a 469 ath10k_err(ar, "invalid firmware magic\n");
9bab1cc0
MK
470 ret = -EINVAL;
471 goto err;
1a222435
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472 }
473
474 /* jump over the padding */
475 magic_len = ALIGN(magic_len, 4);
476
477 len -= magic_len;
478 data += magic_len;
479
480 /* loop elements */
481 while (len > sizeof(struct ath10k_fw_ie)) {
482 hdr = (struct ath10k_fw_ie *)data;
483
484 ie_id = le32_to_cpu(hdr->id);
485 ie_len = le32_to_cpu(hdr->len);
486
487 len -= sizeof(*hdr);
488 data += sizeof(*hdr);
489
490 if (len < ie_len) {
7aa7a72a 491 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1a222435 492 ie_id, len, ie_len);
9bab1cc0
MK
493 ret = -EINVAL;
494 goto err;
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495 }
496
497 switch (ie_id) {
498 case ATH10K_FW_IE_FW_VERSION:
499 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
500 break;
501
502 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
503 ar->hw->wiphy->fw_version[ie_len] = '\0';
504
7aa7a72a 505 ath10k_dbg(ar, ATH10K_DBG_BOOT,
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506 "found fw version %s\n",
507 ar->hw->wiphy->fw_version);
508 break;
509 case ATH10K_FW_IE_TIMESTAMP:
510 if (ie_len != sizeof(u32))
511 break;
512
513 timestamp = (__le32 *)data;
514
7aa7a72a 515 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
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516 le32_to_cpup(timestamp));
517 break;
518 case ATH10K_FW_IE_FEATURES:
7aa7a72a 519 ath10k_dbg(ar, ATH10K_DBG_BOOT,
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520 "found firmware features ie (%zd B)\n",
521 ie_len);
522
523 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
524 index = i / 8;
525 bit = i % 8;
526
527 if (index == ie_len)
528 break;
529
f591a1a5 530 if (data[index] & (1 << bit)) {
7aa7a72a 531 ath10k_dbg(ar, ATH10K_DBG_BOOT,
f591a1a5
BG
532 "Enabling feature bit: %i\n",
533 i);
1a222435 534 __set_bit(i, ar->fw_features);
f591a1a5 535 }
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536 }
537
7aa7a72a 538 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1a222435
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539 ar->fw_features,
540 sizeof(ar->fw_features));
541 break;
542 case ATH10K_FW_IE_FW_IMAGE:
7aa7a72a 543 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1a222435
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544 "found fw image ie (%zd B)\n",
545 ie_len);
546
547 ar->firmware_data = data;
548 ar->firmware_len = ie_len;
549
550 break;
551 case ATH10K_FW_IE_OTP_IMAGE:
7aa7a72a 552 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1a222435
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553 "found otp image ie (%zd B)\n",
554 ie_len);
555
556 ar->otp_data = data;
557 ar->otp_len = ie_len;
558
559 break;
560 default:
7aa7a72a 561 ath10k_warn(ar, "Unknown FW IE: %u\n",
1a222435
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562 le32_to_cpu(hdr->id));
563 break;
564 }
565
566 /* jump over the padding */
567 ie_len = ALIGN(ie_len, 4);
568
569 len -= ie_len;
570 data += ie_len;
e05634ee 571 }
1a222435
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572
573 if (!ar->firmware_data || !ar->firmware_len) {
7aa7a72a 574 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
53c02284 575 ar->hw_params.fw.dir, name);
1a222435
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576 ret = -ENOMEDIUM;
577 goto err;
578 }
579
24c88f78
MK
580 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
581 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
7aa7a72a 582 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
24c88f78
MK
583 ret = -EINVAL;
584 goto err;
585 }
586
1a222435
KV
587 /* now fetch the board file */
588 if (ar->hw_params.fw.board == NULL) {
7aa7a72a 589 ath10k_err(ar, "board data file not defined");
1a222435
KV
590 ret = -EINVAL;
591 goto err;
592 }
593
594 ar->board = ath10k_fetch_fw_file(ar,
595 ar->hw_params.fw.dir,
596 ar->hw_params.fw.board);
597 if (IS_ERR(ar->board)) {
598 ret = PTR_ERR(ar->board);
7aa7a72a 599 ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
53c02284
BG
600 ar->hw_params.fw.dir, ar->hw_params.fw.board,
601 ret);
1a222435
KV
602 goto err;
603 }
604
605 ar->board_data = ar->board->data;
606 ar->board_len = ar->board->size;
607
608 return 0;
609
610err:
611 ath10k_core_free_firmware_files(ar);
612 return ret;
613}
614
615static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
616{
617 int ret;
618
a58227ef
KV
619 /* calibration file is optional, don't check for any errors */
620 ath10k_fetch_cal_file(ar);
621
24c88f78 622 ar->fw_api = 3;
7aa7a72a 623 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
24c88f78
MK
624
625 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
626 if (ret == 0)
627 goto success;
628
53c02284 629 ar->fw_api = 2;
7aa7a72a 630 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
53c02284 631
1a222435 632 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
53c02284
BG
633 if (ret == 0)
634 goto success;
635
636 ar->fw_api = 1;
7aa7a72a 637 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1a222435
KV
638
639 ret = ath10k_core_fetch_firmware_api_1(ar);
640 if (ret)
641 return ret;
642
53c02284 643success:
7aa7a72a 644 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1a222435
KV
645
646 return 0;
647}
648
83091559 649static int ath10k_download_cal_data(struct ath10k *ar)
5e3dd157
KV
650{
651 int ret;
652
a58227ef
KV
653 ret = ath10k_download_cal_file(ar);
654 if (ret == 0) {
655 ar->cal_mode = ATH10K_CAL_MODE_FILE;
656 goto done;
657 }
658
659 ath10k_dbg(ar, ATH10K_DBG_BOOT,
660 "boot did not find a calibration file, try OTP next: %d\n",
661 ret);
662
5e3dd157 663 ret = ath10k_download_and_run_otp(ar);
36a8f413 664 if (ret) {
7aa7a72a 665 ath10k_err(ar, "failed to run otp: %d\n", ret);
5e3dd157 666 return ret;
36a8f413 667 }
5e3dd157 668
a58227ef
KV
669 ar->cal_mode = ATH10K_CAL_MODE_OTP;
670
671done:
672 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
673 ath10k_cal_mode_str(ar->cal_mode));
674 return 0;
5e3dd157
KV
675}
676
677static int ath10k_init_uart(struct ath10k *ar)
678{
679 int ret;
680
681 /*
682 * Explicitly setting UART prints to zero as target turns it on
683 * based on scratch registers.
684 */
685 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
686 if (ret) {
7aa7a72a 687 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
5e3dd157
KV
688 return ret;
689 }
690
c8c39afe 691 if (!uart_print)
5e3dd157 692 return 0;
5e3dd157
KV
693
694 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
695 if (ret) {
7aa7a72a 696 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
5e3dd157
KV
697 return ret;
698 }
699
700 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
701 if (ret) {
7aa7a72a 702 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
5e3dd157
KV
703 return ret;
704 }
705
03fc137b
BM
706 /* Set the UART baud rate to 19200. */
707 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
708 if (ret) {
7aa7a72a 709 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
03fc137b
BM
710 return ret;
711 }
712
7aa7a72a 713 ath10k_info(ar, "UART prints enabled\n");
5e3dd157
KV
714 return 0;
715}
716
717static int ath10k_init_hw_params(struct ath10k *ar)
718{
719 const struct ath10k_hw_params *uninitialized_var(hw_params);
720 int i;
721
722 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
723 hw_params = &ath10k_hw_params_list[i];
724
725 if (hw_params->id == ar->target_version)
726 break;
727 }
728
729 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
7aa7a72a 730 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
5e3dd157
KV
731 ar->target_version);
732 return -EINVAL;
733 }
734
735 ar->hw_params = *hw_params;
736
7aa7a72a 737 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
c8c39afe 738 ar->hw_params.name, ar->target_version);
5e3dd157
KV
739
740 return 0;
741}
742
affd3217
MK
743static void ath10k_core_restart(struct work_struct *work)
744{
745 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
746
747 mutex_lock(&ar->conf_mutex);
748
749 switch (ar->state) {
750 case ATH10K_STATE_ON:
affd3217 751 ar->state = ATH10K_STATE_RESTARTING;
61e9aab7 752 ath10k_hif_stop(ar);
5c81c7fd 753 ath10k_scan_finish(ar);
affd3217
MK
754 ieee80211_restart_hw(ar->hw);
755 break;
756 case ATH10K_STATE_OFF:
5e90de86
MK
757 /* this can happen if driver is being unloaded
758 * or if the crash happens during FW probing */
7aa7a72a 759 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
affd3217
MK
760 break;
761 case ATH10K_STATE_RESTARTING:
c5058f5b
MK
762 /* hw restart might be requested from multiple places */
763 break;
affd3217
MK
764 case ATH10K_STATE_RESTARTED:
765 ar->state = ATH10K_STATE_WEDGED;
766 /* fall through */
767 case ATH10K_STATE_WEDGED:
7aa7a72a 768 ath10k_warn(ar, "device is wedged, will not restart\n");
affd3217 769 break;
43d2a30f
KV
770 case ATH10K_STATE_UTF:
771 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
772 break;
affd3217
MK
773 }
774
775 mutex_unlock(&ar->conf_mutex);
776}
777
43d2a30f 778int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
5e3dd157 779{
5e3dd157
KV
780 int status;
781
60631c5c
KV
782 lockdep_assert_held(&ar->conf_mutex);
783
64d151d4
MK
784 ath10k_bmi_start(ar);
785
5e3dd157
KV
786 if (ath10k_init_configure_target(ar)) {
787 status = -EINVAL;
788 goto err;
789 }
790
83091559
KV
791 status = ath10k_download_cal_data(ar);
792 if (status)
793 goto err;
794
795 status = ath10k_download_fw(ar, mode);
5e3dd157
KV
796 if (status)
797 goto err;
798
799 status = ath10k_init_uart(ar);
800 if (status)
801 goto err;
802
cd003fad
MK
803 ar->htc.htc_ops.target_send_suspend_complete =
804 ath10k_send_suspend_complete;
5e3dd157 805
cd003fad
MK
806 status = ath10k_htc_init(ar);
807 if (status) {
7aa7a72a 808 ath10k_err(ar, "could not init HTC (%d)\n", status);
5e3dd157
KV
809 goto err;
810 }
811
812 status = ath10k_bmi_done(ar);
813 if (status)
cd003fad 814 goto err;
5e3dd157
KV
815
816 status = ath10k_wmi_attach(ar);
817 if (status) {
7aa7a72a 818 ath10k_err(ar, "WMI attach failed: %d\n", status);
cd003fad 819 goto err;
5e3dd157
KV
820 }
821
95bf21f9
MK
822 status = ath10k_htt_init(ar);
823 if (status) {
7aa7a72a 824 ath10k_err(ar, "failed to init htt: %d\n", status);
95bf21f9
MK
825 goto err_wmi_detach;
826 }
827
828 status = ath10k_htt_tx_alloc(&ar->htt);
829 if (status) {
7aa7a72a 830 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
95bf21f9
MK
831 goto err_wmi_detach;
832 }
833
834 status = ath10k_htt_rx_alloc(&ar->htt);
835 if (status) {
7aa7a72a 836 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
95bf21f9
MK
837 goto err_htt_tx_detach;
838 }
839
67e3c63f
MK
840 status = ath10k_hif_start(ar);
841 if (status) {
7aa7a72a 842 ath10k_err(ar, "could not start HIF: %d\n", status);
95bf21f9 843 goto err_htt_rx_detach;
67e3c63f
MK
844 }
845
846 status = ath10k_htc_wait_target(&ar->htc);
847 if (status) {
7aa7a72a 848 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
67e3c63f
MK
849 goto err_hif_stop;
850 }
5e3dd157 851
43d2a30f
KV
852 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
853 status = ath10k_htt_connect(&ar->htt);
854 if (status) {
855 ath10k_err(ar, "failed to connect htt (%d)\n", status);
856 goto err_hif_stop;
857 }
5e3dd157
KV
858 }
859
95bf21f9
MK
860 status = ath10k_wmi_connect(ar);
861 if (status) {
7aa7a72a 862 ath10k_err(ar, "could not connect wmi: %d\n", status);
95bf21f9
MK
863 goto err_hif_stop;
864 }
865
866 status = ath10k_htc_start(&ar->htc);
867 if (status) {
7aa7a72a 868 ath10k_err(ar, "failed to start htc: %d\n", status);
95bf21f9
MK
869 goto err_hif_stop;
870 }
871
43d2a30f
KV
872 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
873 status = ath10k_wmi_wait_for_service_ready(ar);
874 if (status <= 0) {
875 ath10k_warn(ar, "wmi service ready event not received");
876 status = -ETIMEDOUT;
877 goto err_hif_stop;
878 }
95bf21f9 879 }
5e3dd157 880
7aa7a72a 881 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
c8c39afe 882 ar->hw->wiphy->fw_version);
5e3dd157 883
5e3dd157
KV
884 status = ath10k_wmi_cmd_init(ar);
885 if (status) {
7aa7a72a
MK
886 ath10k_err(ar, "could not send WMI init command (%d)\n",
887 status);
b7967dc7 888 goto err_hif_stop;
5e3dd157
KV
889 }
890
891 status = ath10k_wmi_wait_for_unified_ready(ar);
892 if (status <= 0) {
7aa7a72a 893 ath10k_err(ar, "wmi unified ready event not received\n");
5e3dd157 894 status = -ETIMEDOUT;
b7967dc7 895 goto err_hif_stop;
5e3dd157
KV
896 }
897
43d2a30f
KV
898 /* we don't care about HTT in UTF mode */
899 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
900 status = ath10k_htt_setup(&ar->htt);
901 if (status) {
902 ath10k_err(ar, "failed to setup htt: %d\n", status);
903 goto err_hif_stop;
904 }
95bf21f9 905 }
5e3dd157 906
db66ea04
KV
907 status = ath10k_debug_start(ar);
908 if (status)
b7967dc7 909 goto err_hif_stop;
db66ea04 910
dfa413de 911 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
16c11176 912 ar->free_vdev_map = (1LL << TARGET_10X_NUM_VDEVS) - 1;
dfa413de 913 else
16c11176 914 ar->free_vdev_map = (1LL << TARGET_NUM_VDEVS) - 1;
dfa413de 915
0579119f 916 INIT_LIST_HEAD(&ar->arvifs);
1a1b8a88 917
dd30a36e
MK
918 return 0;
919
67e3c63f
MK
920err_hif_stop:
921 ath10k_hif_stop(ar);
95bf21f9
MK
922err_htt_rx_detach:
923 ath10k_htt_rx_free(&ar->htt);
924err_htt_tx_detach:
925 ath10k_htt_tx_free(&ar->htt);
dd30a36e
MK
926err_wmi_detach:
927 ath10k_wmi_detach(ar);
928err:
929 return status;
930}
818bdd16 931EXPORT_SYMBOL(ath10k_core_start);
dd30a36e 932
00f5482b
MP
933int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
934{
935 int ret;
936
937 reinit_completion(&ar->target_suspend);
938
939 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
940 if (ret) {
7aa7a72a 941 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
00f5482b
MP
942 return ret;
943 }
944
945 ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
946
947 if (ret == 0) {
7aa7a72a 948 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
00f5482b
MP
949 return -ETIMEDOUT;
950 }
951
952 return 0;
953}
954
dd30a36e
MK
955void ath10k_core_stop(struct ath10k *ar)
956{
60631c5c
KV
957 lockdep_assert_held(&ar->conf_mutex);
958
00f5482b 959 /* try to suspend target */
43d2a30f
KV
960 if (ar->state != ATH10K_STATE_RESTARTING &&
961 ar->state != ATH10K_STATE_UTF)
216a1836
MK
962 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
963
db66ea04 964 ath10k_debug_stop(ar);
95bf21f9
MK
965 ath10k_hif_stop(ar);
966 ath10k_htt_tx_free(&ar->htt);
967 ath10k_htt_rx_free(&ar->htt);
dd30a36e
MK
968 ath10k_wmi_detach(ar);
969}
818bdd16
MK
970EXPORT_SYMBOL(ath10k_core_stop);
971
972/* mac80211 manages fw/hw initialization through start/stop hooks. However in
973 * order to know what hw capabilities should be advertised to mac80211 it is
974 * necessary to load the firmware (and tear it down immediately since start
975 * hook will try to init it again) before registering */
976static int ath10k_core_probe_fw(struct ath10k *ar)
977{
29385057
MK
978 struct bmi_target_info target_info;
979 int ret = 0;
818bdd16
MK
980
981 ret = ath10k_hif_power_up(ar);
982 if (ret) {
7aa7a72a 983 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
818bdd16
MK
984 return ret;
985 }
986
29385057
MK
987 memset(&target_info, 0, sizeof(target_info));
988 ret = ath10k_bmi_get_target_info(ar, &target_info);
989 if (ret) {
7aa7a72a 990 ath10k_err(ar, "could not get target info (%d)\n", ret);
29385057
MK
991 ath10k_hif_power_down(ar);
992 return ret;
993 }
994
995 ar->target_version = target_info.version;
996 ar->hw->wiphy->hw_version = target_info.version;
997
998 ret = ath10k_init_hw_params(ar);
999 if (ret) {
7aa7a72a 1000 ath10k_err(ar, "could not get hw params (%d)\n", ret);
29385057
MK
1001 ath10k_hif_power_down(ar);
1002 return ret;
1003 }
1004
1005 ret = ath10k_core_fetch_firmware_files(ar);
1006 if (ret) {
7aa7a72a 1007 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
29385057
MK
1008 ath10k_hif_power_down(ar);
1009 return ret;
1010 }
1011
60631c5c
KV
1012 mutex_lock(&ar->conf_mutex);
1013
43d2a30f 1014 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
818bdd16 1015 if (ret) {
7aa7a72a 1016 ath10k_err(ar, "could not init core (%d)\n", ret);
29385057 1017 ath10k_core_free_firmware_files(ar);
818bdd16 1018 ath10k_hif_power_down(ar);
60631c5c 1019 mutex_unlock(&ar->conf_mutex);
818bdd16
MK
1020 return ret;
1021 }
1022
8079de0d 1023 ath10k_print_driver_info(ar);
818bdd16 1024 ath10k_core_stop(ar);
60631c5c
KV
1025
1026 mutex_unlock(&ar->conf_mutex);
1027
818bdd16
MK
1028 ath10k_hif_power_down(ar);
1029 return 0;
1030}
dd30a36e 1031
e01ae68c
KV
1032static int ath10k_core_check_chip_id(struct ath10k *ar)
1033{
1034 u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
1035
7aa7a72a 1036 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
effea968
KV
1037 ar->chip_id, hw_revision);
1038
e01ae68c
KV
1039 /* Check that we are not using hw1.0 (some of them have same pci id
1040 * as hw2.0) before doing anything else as ath10k crashes horribly
1041 * due to missing hw1.0 workarounds. */
1042 switch (hw_revision) {
1043 case QCA988X_HW_1_0_CHIP_ID_REV:
7aa7a72a 1044 ath10k_err(ar, "ERROR: qca988x hw1.0 is not supported\n");
e01ae68c
KV
1045 return -EOPNOTSUPP;
1046
1047 case QCA988X_HW_2_0_CHIP_ID_REV:
1048 /* known hardware revision, continue normally */
1049 return 0;
1050
1051 default:
7aa7a72a 1052 ath10k_warn(ar, "Warning: hardware revision unknown (0x%x), expect problems\n",
e01ae68c
KV
1053 ar->chip_id);
1054 return 0;
1055 }
1056
1057 return 0;
1058}
1059
6782cb69 1060static void ath10k_core_register_work(struct work_struct *work)
dd30a36e 1061{
6782cb69 1062 struct ath10k *ar = container_of(work, struct ath10k, register_work);
dd30a36e
MK
1063 int status;
1064
818bdd16
MK
1065 status = ath10k_core_probe_fw(ar);
1066 if (status) {
7aa7a72a 1067 ath10k_err(ar, "could not probe fw (%d)\n", status);
6782cb69 1068 goto err;
818bdd16 1069 }
dd30a36e 1070
5e3dd157 1071 status = ath10k_mac_register(ar);
818bdd16 1072 if (status) {
7aa7a72a 1073 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
29385057 1074 goto err_release_fw;
818bdd16 1075 }
5e3dd157 1076
e13cf7a3 1077 status = ath10k_debug_register(ar);
5e3dd157 1078 if (status) {
7aa7a72a 1079 ath10k_err(ar, "unable to initialize debugfs\n");
5e3dd157
KV
1080 goto err_unregister_mac;
1081 }
1082
855aed12
SW
1083 status = ath10k_spectral_create(ar);
1084 if (status) {
7aa7a72a 1085 ath10k_err(ar, "failed to initialize spectral\n");
855aed12
SW
1086 goto err_debug_destroy;
1087 }
1088
6782cb69
MK
1089 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
1090 return;
5e3dd157 1091
855aed12
SW
1092err_debug_destroy:
1093 ath10k_debug_destroy(ar);
5e3dd157
KV
1094err_unregister_mac:
1095 ath10k_mac_unregister(ar);
29385057
MK
1096err_release_fw:
1097 ath10k_core_free_firmware_files(ar);
6782cb69 1098err:
a491a920
MK
1099 /* TODO: It's probably a good idea to release device from the driver
1100 * but calling device_release_driver() here will cause a deadlock.
1101 */
6782cb69
MK
1102 return;
1103}
1104
1105int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1106{
1107 int status;
1108
1109 ar->chip_id = chip_id;
1110
1111 status = ath10k_core_check_chip_id(ar);
1112 if (status) {
7aa7a72a 1113 ath10k_err(ar, "Unsupported chip id 0x%08x\n", ar->chip_id);
6782cb69
MK
1114 return status;
1115 }
1116
1117 queue_work(ar->workqueue, &ar->register_work);
1118
1119 return 0;
5e3dd157
KV
1120}
1121EXPORT_SYMBOL(ath10k_core_register);
1122
1123void ath10k_core_unregister(struct ath10k *ar)
1124{
6782cb69
MK
1125 cancel_work_sync(&ar->register_work);
1126
1127 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1128 return;
1129
804eef14
SW
1130 /* Stop spectral before unregistering from mac80211 to remove the
1131 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
1132 * would be already be free'd recursively, leading to a double free.
1133 */
1134 ath10k_spectral_destroy(ar);
1135
5e3dd157
KV
1136 /* We must unregister from mac80211 before we stop HTC and HIF.
1137 * Otherwise we will fail to submit commands to FW and mac80211 will be
1138 * unhappy about callback failures. */
1139 ath10k_mac_unregister(ar);
db66ea04 1140
43d2a30f
KV
1141 ath10k_testmode_destroy(ar);
1142
29385057 1143 ath10k_core_free_firmware_files(ar);
6f1f56ea 1144
e13cf7a3 1145 ath10k_debug_unregister(ar);
5e3dd157
KV
1146}
1147EXPORT_SYMBOL(ath10k_core_unregister);
1148
e7b54194 1149struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
e07db352 1150 enum ath10k_bus bus,
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MK
1151 const struct ath10k_hif_ops *hif_ops)
1152{
1153 struct ath10k *ar;
e13cf7a3 1154 int ret;
0d0a6939 1155
e7b54194 1156 ar = ath10k_mac_create(priv_size);
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MK
1157 if (!ar)
1158 return NULL;
1159
1160 ar->ath_common.priv = ar;
1161 ar->ath_common.hw = ar->hw;
1162
1163 ar->p2p = !!ath10k_p2p;
1164 ar->dev = dev;
1165
0d0a6939 1166 ar->hif.ops = hif_ops;
e07db352 1167 ar->hif.bus = bus;
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1168
1169 init_completion(&ar->scan.started);
1170 init_completion(&ar->scan.completed);
1171 init_completion(&ar->scan.on_channel);
1172 init_completion(&ar->target_suspend);
1173
1174 init_completion(&ar->install_key_done);
1175 init_completion(&ar->vdev_setup_done);
1176
5c81c7fd 1177 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
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MK
1178
1179 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
1180 if (!ar->workqueue)
e13cf7a3 1181 goto err_free_mac;
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MK
1182
1183 mutex_init(&ar->conf_mutex);
1184 spin_lock_init(&ar->data_lock);
1185
1186 INIT_LIST_HEAD(&ar->peers);
1187 init_waitqueue_head(&ar->peer_mapping_wq);
1188
1189 init_completion(&ar->offchan_tx_completed);
1190 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
1191 skb_queue_head_init(&ar->offchan_tx_queue);
1192
1193 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
1194 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
1195
6782cb69 1196 INIT_WORK(&ar->register_work, ath10k_core_register_work);
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1197 INIT_WORK(&ar->restart_work, ath10k_core_restart);
1198
e13cf7a3
MK
1199 ret = ath10k_debug_create(ar);
1200 if (ret)
1201 goto err_free_wq;
1202
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MK
1203 return ar;
1204
e13cf7a3
MK
1205err_free_wq:
1206 destroy_workqueue(ar->workqueue);
1207
1208err_free_mac:
0d0a6939 1209 ath10k_mac_destroy(ar);
e13cf7a3 1210
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MK
1211 return NULL;
1212}
1213EXPORT_SYMBOL(ath10k_core_create);
1214
1215void ath10k_core_destroy(struct ath10k *ar)
1216{
1217 flush_workqueue(ar->workqueue);
1218 destroy_workqueue(ar->workqueue);
1219
e13cf7a3 1220 ath10k_debug_destroy(ar);
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MK
1221 ath10k_mac_destroy(ar);
1222}
1223EXPORT_SYMBOL(ath10k_core_destroy);
1224
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KV
1225MODULE_AUTHOR("Qualcomm Atheros");
1226MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1227MODULE_LICENSE("Dual BSD/GPL");
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