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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
5aabff05 | 20 | #include <linux/of.h> |
5e3dd157 KV |
21 | |
22 | #include "core.h" | |
23 | #include "mac.h" | |
24 | #include "htc.h" | |
25 | #include "hif.h" | |
26 | #include "wmi.h" | |
27 | #include "bmi.h" | |
28 | #include "debug.h" | |
29 | #include "htt.h" | |
43d2a30f | 30 | #include "testmode.h" |
d7579d12 | 31 | #include "wmi-ops.h" |
5e3dd157 KV |
32 | |
33 | unsigned int ath10k_debug_mask; | |
34 | static bool uart_print; | |
8868b12c RM |
35 | static bool skip_otp; |
36 | ||
5e3dd157 KV |
37 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); |
38 | module_param(uart_print, bool, 0644); | |
8868b12c RM |
39 | module_param(skip_otp, bool, 0644); |
40 | ||
5e3dd157 KV |
41 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); |
42 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
8868b12c | 43 | MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); |
5e3dd157 KV |
44 | |
45 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
46 | { |
47 | .id = QCA988X_HW_2_0_VERSION, | |
48 | .name = "qca988x hw2.0", | |
49 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
3a8200b2 | 50 | .uart_pin = 7, |
5e3dd157 KV |
51 | .fw = { |
52 | .dir = QCA988X_HW_2_0_FW_DIR, | |
53 | .fw = QCA988X_HW_2_0_FW_FILE, | |
54 | .otp = QCA988X_HW_2_0_OTP_FILE, | |
55 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, | |
9764a2af MK |
56 | .board_size = QCA988X_BOARD_DATA_SZ, |
57 | .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, | |
5e3dd157 KV |
58 | }, |
59 | }, | |
d63955b3 MK |
60 | { |
61 | .id = QCA6174_HW_2_1_VERSION, | |
62 | .name = "qca6174 hw2.1", | |
63 | .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, | |
64 | .uart_pin = 6, | |
65 | .fw = { | |
66 | .dir = QCA6174_HW_2_1_FW_DIR, | |
67 | .fw = QCA6174_HW_2_1_FW_FILE, | |
68 | .otp = QCA6174_HW_2_1_OTP_FILE, | |
69 | .board = QCA6174_HW_2_1_BOARD_DATA_FILE, | |
70 | .board_size = QCA6174_BOARD_DATA_SZ, | |
71 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
72 | }, | |
73 | }, | |
74 | { | |
75 | .id = QCA6174_HW_3_0_VERSION, | |
76 | .name = "qca6174 hw3.0", | |
77 | .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, | |
78 | .uart_pin = 6, | |
79 | .fw = { | |
80 | .dir = QCA6174_HW_3_0_FW_DIR, | |
81 | .fw = QCA6174_HW_3_0_FW_FILE, | |
82 | .otp = QCA6174_HW_3_0_OTP_FILE, | |
83 | .board = QCA6174_HW_3_0_BOARD_DATA_FILE, | |
84 | .board_size = QCA6174_BOARD_DATA_SZ, | |
85 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
86 | }, | |
87 | }, | |
608b8f73 MK |
88 | { |
89 | .id = QCA6174_HW_3_2_VERSION, | |
90 | .name = "qca6174 hw3.2", | |
91 | .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, | |
92 | .uart_pin = 6, | |
93 | .fw = { | |
94 | /* uses same binaries as hw3.0 */ | |
95 | .dir = QCA6174_HW_3_0_FW_DIR, | |
96 | .fw = QCA6174_HW_3_0_FW_FILE, | |
97 | .otp = QCA6174_HW_3_0_OTP_FILE, | |
98 | .board = QCA6174_HW_3_0_BOARD_DATA_FILE, | |
99 | .board_size = QCA6174_BOARD_DATA_SZ, | |
100 | .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, | |
101 | }, | |
102 | }, | |
5e3dd157 KV |
103 | }; |
104 | ||
105 | static void ath10k_send_suspend_complete(struct ath10k *ar) | |
106 | { | |
7aa7a72a | 107 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 108 | |
9042e17d | 109 | complete(&ar->target_suspend); |
5e3dd157 KV |
110 | } |
111 | ||
5e3dd157 KV |
112 | static int ath10k_init_configure_target(struct ath10k *ar) |
113 | { | |
114 | u32 param_host; | |
115 | int ret; | |
116 | ||
117 | /* tell target which HTC version it is used*/ | |
118 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
119 | HTC_PROTOCOL_VERSION); | |
120 | if (ret) { | |
7aa7a72a | 121 | ath10k_err(ar, "settings HTC version failed\n"); |
5e3dd157 KV |
122 | return ret; |
123 | } | |
124 | ||
125 | /* set the firmware mode to STA/IBSS/AP */ | |
126 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
127 | if (ret) { | |
7aa7a72a | 128 | ath10k_err(ar, "setting firmware mode (1/2) failed\n"); |
5e3dd157 KV |
129 | return ret; |
130 | } | |
131 | ||
132 | /* TODO following parameters need to be re-visited. */ | |
133 | /* num_device */ | |
134 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
135 | /* Firmware mode */ | |
136 | /* FIXME: Why FW_MODE_AP ??.*/ | |
137 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
138 | /* mac_addr_method */ | |
139 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
140 | /* firmware_bridge */ | |
141 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
142 | /* fwsubmode */ | |
143 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
144 | ||
145 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
146 | if (ret) { | |
7aa7a72a | 147 | ath10k_err(ar, "setting firmware mode (2/2) failed\n"); |
5e3dd157 KV |
148 | return ret; |
149 | } | |
150 | ||
151 | /* We do all byte-swapping on the host */ | |
152 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
153 | if (ret) { | |
7aa7a72a | 154 | ath10k_err(ar, "setting host CPU BE mode failed\n"); |
5e3dd157 KV |
155 | return ret; |
156 | } | |
157 | ||
158 | /* FW descriptor/Data swap flags */ | |
159 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
160 | ||
161 | if (ret) { | |
7aa7a72a | 162 | ath10k_err(ar, "setting FW data/desc swap flags failed\n"); |
5e3dd157 KV |
163 | return ret; |
164 | } | |
165 | ||
166 | return 0; | |
167 | } | |
168 | ||
169 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
170 | const char *dir, | |
171 | const char *file) | |
172 | { | |
173 | char filename[100]; | |
174 | const struct firmware *fw; | |
175 | int ret; | |
176 | ||
177 | if (file == NULL) | |
178 | return ERR_PTR(-ENOENT); | |
179 | ||
180 | if (dir == NULL) | |
181 | dir = "."; | |
182 | ||
183 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
184 | ret = request_firmware(&fw, filename, ar->dev); | |
185 | if (ret) | |
186 | return ERR_PTR(ret); | |
187 | ||
188 | return fw; | |
189 | } | |
190 | ||
a58227ef KV |
191 | static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, |
192 | size_t data_len) | |
5e3dd157 | 193 | { |
9764a2af MK |
194 | u32 board_data_size = ar->hw_params.fw.board_size; |
195 | u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; | |
5e3dd157 KV |
196 | u32 board_ext_data_addr; |
197 | int ret; | |
198 | ||
199 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
200 | if (ret) { | |
7aa7a72a MK |
201 | ath10k_err(ar, "could not read board ext data addr (%d)\n", |
202 | ret); | |
5e3dd157 KV |
203 | return ret; |
204 | } | |
205 | ||
7aa7a72a | 206 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
effea968 | 207 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
208 | board_ext_data_addr); |
209 | ||
210 | if (board_ext_data_addr == 0) | |
211 | return 0; | |
212 | ||
a58227ef | 213 | if (data_len != (board_data_size + board_ext_data_size)) { |
7aa7a72a | 214 | ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", |
a58227ef | 215 | data_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
216 | return -EINVAL; |
217 | } | |
218 | ||
219 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
a58227ef | 220 | data + board_data_size, |
5e3dd157 KV |
221 | board_ext_data_size); |
222 | if (ret) { | |
7aa7a72a | 223 | ath10k_err(ar, "could not write board ext data (%d)\n", ret); |
5e3dd157 KV |
224 | return ret; |
225 | } | |
226 | ||
227 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
228 | (board_ext_data_size << 16) | 1); | |
229 | if (ret) { | |
7aa7a72a MK |
230 | ath10k_err(ar, "could not write board ext data bit (%d)\n", |
231 | ret); | |
5e3dd157 KV |
232 | return ret; |
233 | } | |
234 | ||
235 | return 0; | |
236 | } | |
237 | ||
a58227ef KV |
238 | static int ath10k_download_board_data(struct ath10k *ar, const void *data, |
239 | size_t data_len) | |
5e3dd157 | 240 | { |
9764a2af | 241 | u32 board_data_size = ar->hw_params.fw.board_size; |
5e3dd157 | 242 | u32 address; |
5e3dd157 KV |
243 | int ret; |
244 | ||
a58227ef | 245 | ret = ath10k_push_board_ext_data(ar, data, data_len); |
5e3dd157 | 246 | if (ret) { |
7aa7a72a | 247 | ath10k_err(ar, "could not push board ext data (%d)\n", ret); |
5e3dd157 KV |
248 | goto exit; |
249 | } | |
250 | ||
251 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
252 | if (ret) { | |
7aa7a72a | 253 | ath10k_err(ar, "could not read board data addr (%d)\n", ret); |
5e3dd157 KV |
254 | goto exit; |
255 | } | |
256 | ||
a58227ef | 257 | ret = ath10k_bmi_write_memory(ar, address, data, |
958df3a0 | 258 | min_t(u32, board_data_size, |
a58227ef | 259 | data_len)); |
5e3dd157 | 260 | if (ret) { |
7aa7a72a | 261 | ath10k_err(ar, "could not write board data (%d)\n", ret); |
5e3dd157 KV |
262 | goto exit; |
263 | } | |
264 | ||
265 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
266 | if (ret) { | |
7aa7a72a | 267 | ath10k_err(ar, "could not write board data bit (%d)\n", ret); |
5e3dd157 KV |
268 | goto exit; |
269 | } | |
270 | ||
271 | exit: | |
5e3dd157 KV |
272 | return ret; |
273 | } | |
274 | ||
a58227ef KV |
275 | static int ath10k_download_cal_file(struct ath10k *ar) |
276 | { | |
277 | int ret; | |
278 | ||
279 | if (!ar->cal_file) | |
280 | return -ENOENT; | |
281 | ||
282 | if (IS_ERR(ar->cal_file)) | |
283 | return PTR_ERR(ar->cal_file); | |
284 | ||
285 | ret = ath10k_download_board_data(ar, ar->cal_file->data, | |
286 | ar->cal_file->size); | |
287 | if (ret) { | |
288 | ath10k_err(ar, "failed to download cal_file data: %d\n", ret); | |
289 | return ret; | |
290 | } | |
291 | ||
292 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); | |
293 | ||
294 | return 0; | |
295 | } | |
296 | ||
5aabff05 TK |
297 | static int ath10k_download_cal_dt(struct ath10k *ar) |
298 | { | |
299 | struct device_node *node; | |
300 | int data_len; | |
301 | void *data; | |
302 | int ret; | |
303 | ||
304 | node = ar->dev->of_node; | |
305 | if (!node) | |
306 | /* Device Tree is optional, don't print any warnings if | |
307 | * there's no node for ath10k. | |
308 | */ | |
309 | return -ENOENT; | |
310 | ||
311 | if (!of_get_property(node, "qcom,ath10k-calibration-data", | |
312 | &data_len)) { | |
313 | /* The calibration data node is optional */ | |
314 | return -ENOENT; | |
315 | } | |
316 | ||
317 | if (data_len != QCA988X_CAL_DATA_LEN) { | |
318 | ath10k_warn(ar, "invalid calibration data length in DT: %d\n", | |
319 | data_len); | |
320 | ret = -EMSGSIZE; | |
321 | goto out; | |
322 | } | |
323 | ||
324 | data = kmalloc(data_len, GFP_KERNEL); | |
325 | if (!data) { | |
326 | ret = -ENOMEM; | |
327 | goto out; | |
328 | } | |
329 | ||
330 | ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data", | |
331 | data, data_len); | |
332 | if (ret) { | |
333 | ath10k_warn(ar, "failed to read calibration data from DT: %d\n", | |
334 | ret); | |
335 | goto out_free; | |
336 | } | |
337 | ||
338 | ret = ath10k_download_board_data(ar, data, data_len); | |
339 | if (ret) { | |
340 | ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", | |
341 | ret); | |
342 | goto out_free; | |
343 | } | |
344 | ||
345 | ret = 0; | |
346 | ||
347 | out_free: | |
348 | kfree(data); | |
349 | ||
350 | out: | |
351 | return ret; | |
352 | } | |
353 | ||
5e3dd157 KV |
354 | static int ath10k_download_and_run_otp(struct ath10k *ar) |
355 | { | |
d6d4a58d | 356 | u32 result, address = ar->hw_params.patch_load_addr; |
5e3dd157 KV |
357 | int ret; |
358 | ||
a58227ef | 359 | ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len); |
83091559 KV |
360 | if (ret) { |
361 | ath10k_err(ar, "failed to download board data: %d\n", ret); | |
362 | return ret; | |
363 | } | |
364 | ||
5e3dd157 KV |
365 | /* OTP is optional */ |
366 | ||
7f06ea1e | 367 | if (!ar->otp_data || !ar->otp_len) { |
7aa7a72a | 368 | ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", |
36a8f413 | 369 | ar->otp_data, ar->otp_len); |
5e3dd157 | 370 | return 0; |
7f06ea1e KV |
371 | } |
372 | ||
7aa7a72a | 373 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", |
7f06ea1e | 374 | address, ar->otp_len); |
5e3dd157 | 375 | |
958df3a0 | 376 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); |
5e3dd157 | 377 | if (ret) { |
7aa7a72a | 378 | ath10k_err(ar, "could not write otp (%d)\n", ret); |
7f06ea1e | 379 | return ret; |
5e3dd157 KV |
380 | } |
381 | ||
d6d4a58d | 382 | ret = ath10k_bmi_execute(ar, address, 0, &result); |
5e3dd157 | 383 | if (ret) { |
7aa7a72a | 384 | ath10k_err(ar, "could not execute otp (%d)\n", ret); |
7f06ea1e | 385 | return ret; |
5e3dd157 KV |
386 | } |
387 | ||
7aa7a72a | 388 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); |
7f06ea1e | 389 | |
8868b12c | 390 | if (!skip_otp && result != 0) { |
7aa7a72a | 391 | ath10k_err(ar, "otp calibration failed: %d", result); |
7f06ea1e KV |
392 | return -EINVAL; |
393 | } | |
394 | ||
395 | return 0; | |
5e3dd157 KV |
396 | } |
397 | ||
43d2a30f | 398 | static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 399 | { |
43d2a30f KV |
400 | u32 address, data_len; |
401 | const char *mode_name; | |
402 | const void *data; | |
5e3dd157 KV |
403 | int ret; |
404 | ||
5e3dd157 KV |
405 | address = ar->hw_params.patch_load_addr; |
406 | ||
43d2a30f KV |
407 | switch (mode) { |
408 | case ATH10K_FIRMWARE_MODE_NORMAL: | |
409 | data = ar->firmware_data; | |
410 | data_len = ar->firmware_len; | |
411 | mode_name = "normal"; | |
412 | break; | |
413 | case ATH10K_FIRMWARE_MODE_UTF: | |
414 | data = ar->testmode.utf->data; | |
415 | data_len = ar->testmode.utf->size; | |
416 | mode_name = "utf"; | |
417 | break; | |
418 | default: | |
419 | ath10k_err(ar, "unknown firmware mode: %d\n", mode); | |
420 | return -EINVAL; | |
421 | } | |
422 | ||
423 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
424 | "boot uploading firmware image %p len %d mode %s\n", | |
425 | data, data_len, mode_name); | |
426 | ||
427 | ret = ath10k_bmi_fast_download(ar, address, data, data_len); | |
5e3dd157 | 428 | if (ret) { |
43d2a30f KV |
429 | ath10k_err(ar, "failed to download %s firmware: %d\n", |
430 | mode_name, ret); | |
431 | return ret; | |
5e3dd157 KV |
432 | } |
433 | ||
29385057 MK |
434 | return ret; |
435 | } | |
436 | ||
437 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
438 | { | |
36527916 KV |
439 | if (ar->board && !IS_ERR(ar->board)) |
440 | release_firmware(ar->board); | |
29385057 MK |
441 | |
442 | if (ar->otp && !IS_ERR(ar->otp)) | |
443 | release_firmware(ar->otp); | |
444 | ||
445 | if (ar->firmware && !IS_ERR(ar->firmware)) | |
446 | release_firmware(ar->firmware); | |
447 | ||
a58227ef KV |
448 | if (ar->cal_file && !IS_ERR(ar->cal_file)) |
449 | release_firmware(ar->cal_file); | |
450 | ||
36527916 | 451 | ar->board = NULL; |
958df3a0 KV |
452 | ar->board_data = NULL; |
453 | ar->board_len = 0; | |
454 | ||
29385057 | 455 | ar->otp = NULL; |
958df3a0 KV |
456 | ar->otp_data = NULL; |
457 | ar->otp_len = 0; | |
458 | ||
29385057 | 459 | ar->firmware = NULL; |
958df3a0 KV |
460 | ar->firmware_data = NULL; |
461 | ar->firmware_len = 0; | |
a58227ef KV |
462 | |
463 | ar->cal_file = NULL; | |
464 | } | |
465 | ||
466 | static int ath10k_fetch_cal_file(struct ath10k *ar) | |
467 | { | |
468 | char filename[100]; | |
469 | ||
470 | /* cal-<bus>-<id>.bin */ | |
471 | scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", | |
472 | ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); | |
473 | ||
474 | ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); | |
475 | if (IS_ERR(ar->cal_file)) | |
476 | /* calibration file is optional, don't print any warnings */ | |
477 | return PTR_ERR(ar->cal_file); | |
478 | ||
479 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", | |
480 | ATH10K_FW_DIR, filename); | |
481 | ||
482 | return 0; | |
29385057 MK |
483 | } |
484 | ||
1a222435 | 485 | static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) |
29385057 MK |
486 | { |
487 | int ret = 0; | |
488 | ||
489 | if (ar->hw_params.fw.fw == NULL) { | |
7aa7a72a | 490 | ath10k_err(ar, "firmware file not defined\n"); |
29385057 MK |
491 | return -EINVAL; |
492 | } | |
493 | ||
494 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 495 | ath10k_err(ar, "board data file not defined"); |
29385057 MK |
496 | return -EINVAL; |
497 | } | |
498 | ||
36527916 KV |
499 | ar->board = ath10k_fetch_fw_file(ar, |
500 | ar->hw_params.fw.dir, | |
501 | ar->hw_params.fw.board); | |
502 | if (IS_ERR(ar->board)) { | |
503 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 504 | ath10k_err(ar, "could not fetch board data (%d)\n", ret); |
29385057 MK |
505 | goto err; |
506 | } | |
507 | ||
958df3a0 KV |
508 | ar->board_data = ar->board->data; |
509 | ar->board_len = ar->board->size; | |
510 | ||
29385057 MK |
511 | ar->firmware = ath10k_fetch_fw_file(ar, |
512 | ar->hw_params.fw.dir, | |
513 | ar->hw_params.fw.fw); | |
514 | if (IS_ERR(ar->firmware)) { | |
515 | ret = PTR_ERR(ar->firmware); | |
7aa7a72a | 516 | ath10k_err(ar, "could not fetch firmware (%d)\n", ret); |
29385057 MK |
517 | goto err; |
518 | } | |
519 | ||
958df3a0 KV |
520 | ar->firmware_data = ar->firmware->data; |
521 | ar->firmware_len = ar->firmware->size; | |
522 | ||
29385057 MK |
523 | /* OTP may be undefined. If so, don't fetch it at all */ |
524 | if (ar->hw_params.fw.otp == NULL) | |
525 | return 0; | |
526 | ||
527 | ar->otp = ath10k_fetch_fw_file(ar, | |
528 | ar->hw_params.fw.dir, | |
529 | ar->hw_params.fw.otp); | |
530 | if (IS_ERR(ar->otp)) { | |
531 | ret = PTR_ERR(ar->otp); | |
7aa7a72a | 532 | ath10k_err(ar, "could not fetch otp (%d)\n", ret); |
29385057 MK |
533 | goto err; |
534 | } | |
535 | ||
958df3a0 KV |
536 | ar->otp_data = ar->otp->data; |
537 | ar->otp_len = ar->otp->size; | |
538 | ||
29385057 MK |
539 | return 0; |
540 | ||
541 | err: | |
542 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
543 | return ret; |
544 | } | |
545 | ||
1a222435 KV |
546 | static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) |
547 | { | |
548 | size_t magic_len, len, ie_len; | |
549 | int ie_id, i, index, bit, ret; | |
550 | struct ath10k_fw_ie *hdr; | |
551 | const u8 *data; | |
202e86e6 | 552 | __le32 *timestamp, *version; |
1a222435 KV |
553 | |
554 | /* first fetch the firmware file (firmware-*.bin) */ | |
555 | ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); | |
556 | if (IS_ERR(ar->firmware)) { | |
7aa7a72a | 557 | ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", |
53c02284 | 558 | ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); |
1a222435 KV |
559 | return PTR_ERR(ar->firmware); |
560 | } | |
561 | ||
562 | data = ar->firmware->data; | |
563 | len = ar->firmware->size; | |
564 | ||
565 | /* magic also includes the null byte, check that as well */ | |
566 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
567 | ||
568 | if (len < magic_len) { | |
7aa7a72a | 569 | ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", |
53c02284 | 570 | ar->hw_params.fw.dir, name, len); |
9bab1cc0 MK |
571 | ret = -EINVAL; |
572 | goto err; | |
1a222435 KV |
573 | } |
574 | ||
575 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
7aa7a72a | 576 | ath10k_err(ar, "invalid firmware magic\n"); |
9bab1cc0 MK |
577 | ret = -EINVAL; |
578 | goto err; | |
1a222435 KV |
579 | } |
580 | ||
581 | /* jump over the padding */ | |
582 | magic_len = ALIGN(magic_len, 4); | |
583 | ||
584 | len -= magic_len; | |
585 | data += magic_len; | |
586 | ||
587 | /* loop elements */ | |
588 | while (len > sizeof(struct ath10k_fw_ie)) { | |
589 | hdr = (struct ath10k_fw_ie *)data; | |
590 | ||
591 | ie_id = le32_to_cpu(hdr->id); | |
592 | ie_len = le32_to_cpu(hdr->len); | |
593 | ||
594 | len -= sizeof(*hdr); | |
595 | data += sizeof(*hdr); | |
596 | ||
597 | if (len < ie_len) { | |
7aa7a72a | 598 | ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 599 | ie_id, len, ie_len); |
9bab1cc0 MK |
600 | ret = -EINVAL; |
601 | goto err; | |
1a222435 KV |
602 | } |
603 | ||
604 | switch (ie_id) { | |
605 | case ATH10K_FW_IE_FW_VERSION: | |
606 | if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) | |
607 | break; | |
608 | ||
609 | memcpy(ar->hw->wiphy->fw_version, data, ie_len); | |
610 | ar->hw->wiphy->fw_version[ie_len] = '\0'; | |
611 | ||
7aa7a72a | 612 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
613 | "found fw version %s\n", |
614 | ar->hw->wiphy->fw_version); | |
615 | break; | |
616 | case ATH10K_FW_IE_TIMESTAMP: | |
617 | if (ie_len != sizeof(u32)) | |
618 | break; | |
619 | ||
620 | timestamp = (__le32 *)data; | |
621 | ||
7aa7a72a | 622 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", |
1a222435 KV |
623 | le32_to_cpup(timestamp)); |
624 | break; | |
625 | case ATH10K_FW_IE_FEATURES: | |
7aa7a72a | 626 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
627 | "found firmware features ie (%zd B)\n", |
628 | ie_len); | |
629 | ||
630 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
631 | index = i / 8; | |
632 | bit = i % 8; | |
633 | ||
634 | if (index == ie_len) | |
635 | break; | |
636 | ||
f591a1a5 | 637 | if (data[index] & (1 << bit)) { |
7aa7a72a | 638 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
f591a1a5 BG |
639 | "Enabling feature bit: %i\n", |
640 | i); | |
1a222435 | 641 | __set_bit(i, ar->fw_features); |
f591a1a5 | 642 | } |
1a222435 KV |
643 | } |
644 | ||
7aa7a72a | 645 | ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", |
1a222435 KV |
646 | ar->fw_features, |
647 | sizeof(ar->fw_features)); | |
648 | break; | |
649 | case ATH10K_FW_IE_FW_IMAGE: | |
7aa7a72a | 650 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
651 | "found fw image ie (%zd B)\n", |
652 | ie_len); | |
653 | ||
654 | ar->firmware_data = data; | |
655 | ar->firmware_len = ie_len; | |
656 | ||
657 | break; | |
658 | case ATH10K_FW_IE_OTP_IMAGE: | |
7aa7a72a | 659 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
660 | "found otp image ie (%zd B)\n", |
661 | ie_len); | |
662 | ||
663 | ar->otp_data = data; | |
664 | ar->otp_len = ie_len; | |
665 | ||
666 | break; | |
202e86e6 KV |
667 | case ATH10K_FW_IE_WMI_OP_VERSION: |
668 | if (ie_len != sizeof(u32)) | |
669 | break; | |
670 | ||
671 | version = (__le32 *)data; | |
672 | ||
673 | ar->wmi.op_version = le32_to_cpup(version); | |
674 | ||
675 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", | |
676 | ar->wmi.op_version); | |
677 | break; | |
1a222435 | 678 | default: |
7aa7a72a | 679 | ath10k_warn(ar, "Unknown FW IE: %u\n", |
1a222435 KV |
680 | le32_to_cpu(hdr->id)); |
681 | break; | |
682 | } | |
683 | ||
684 | /* jump over the padding */ | |
685 | ie_len = ALIGN(ie_len, 4); | |
686 | ||
687 | len -= ie_len; | |
688 | data += ie_len; | |
e05634ee | 689 | } |
1a222435 KV |
690 | |
691 | if (!ar->firmware_data || !ar->firmware_len) { | |
7aa7a72a | 692 | ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", |
53c02284 | 693 | ar->hw_params.fw.dir, name); |
1a222435 KV |
694 | ret = -ENOMEDIUM; |
695 | goto err; | |
696 | } | |
697 | ||
698 | /* now fetch the board file */ | |
699 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 700 | ath10k_err(ar, "board data file not defined"); |
1a222435 KV |
701 | ret = -EINVAL; |
702 | goto err; | |
703 | } | |
704 | ||
705 | ar->board = ath10k_fetch_fw_file(ar, | |
706 | ar->hw_params.fw.dir, | |
707 | ar->hw_params.fw.board); | |
708 | if (IS_ERR(ar->board)) { | |
709 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 710 | ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n", |
53c02284 BG |
711 | ar->hw_params.fw.dir, ar->hw_params.fw.board, |
712 | ret); | |
1a222435 KV |
713 | goto err; |
714 | } | |
715 | ||
716 | ar->board_data = ar->board->data; | |
717 | ar->board_len = ar->board->size; | |
718 | ||
719 | return 0; | |
720 | ||
721 | err: | |
722 | ath10k_core_free_firmware_files(ar); | |
723 | return ret; | |
724 | } | |
725 | ||
726 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) | |
727 | { | |
728 | int ret; | |
729 | ||
a58227ef KV |
730 | /* calibration file is optional, don't check for any errors */ |
731 | ath10k_fetch_cal_file(ar); | |
732 | ||
4a16fbec RM |
733 | ar->fw_api = 4; |
734 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); | |
735 | ||
736 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE); | |
737 | if (ret == 0) | |
738 | goto success; | |
739 | ||
24c88f78 | 740 | ar->fw_api = 3; |
7aa7a72a | 741 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
24c88f78 MK |
742 | |
743 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE); | |
744 | if (ret == 0) | |
745 | goto success; | |
746 | ||
53c02284 | 747 | ar->fw_api = 2; |
7aa7a72a | 748 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
53c02284 | 749 | |
1a222435 | 750 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); |
53c02284 BG |
751 | if (ret == 0) |
752 | goto success; | |
753 | ||
754 | ar->fw_api = 1; | |
7aa7a72a | 755 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
1a222435 KV |
756 | |
757 | ret = ath10k_core_fetch_firmware_api_1(ar); | |
758 | if (ret) | |
759 | return ret; | |
760 | ||
53c02284 | 761 | success: |
7aa7a72a | 762 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); |
1a222435 KV |
763 | |
764 | return 0; | |
765 | } | |
766 | ||
83091559 | 767 | static int ath10k_download_cal_data(struct ath10k *ar) |
5e3dd157 KV |
768 | { |
769 | int ret; | |
770 | ||
a58227ef KV |
771 | ret = ath10k_download_cal_file(ar); |
772 | if (ret == 0) { | |
773 | ar->cal_mode = ATH10K_CAL_MODE_FILE; | |
774 | goto done; | |
775 | } | |
776 | ||
777 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
5aabff05 TK |
778 | "boot did not find a calibration file, try DT next: %d\n", |
779 | ret); | |
780 | ||
781 | ret = ath10k_download_cal_dt(ar); | |
782 | if (ret == 0) { | |
783 | ar->cal_mode = ATH10K_CAL_MODE_DT; | |
784 | goto done; | |
785 | } | |
786 | ||
787 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
788 | "boot did not find DT entry, try OTP next: %d\n", | |
a58227ef KV |
789 | ret); |
790 | ||
5e3dd157 | 791 | ret = ath10k_download_and_run_otp(ar); |
36a8f413 | 792 | if (ret) { |
7aa7a72a | 793 | ath10k_err(ar, "failed to run otp: %d\n", ret); |
5e3dd157 | 794 | return ret; |
36a8f413 | 795 | } |
5e3dd157 | 796 | |
a58227ef KV |
797 | ar->cal_mode = ATH10K_CAL_MODE_OTP; |
798 | ||
799 | done: | |
800 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", | |
801 | ath10k_cal_mode_str(ar->cal_mode)); | |
802 | return 0; | |
5e3dd157 KV |
803 | } |
804 | ||
805 | static int ath10k_init_uart(struct ath10k *ar) | |
806 | { | |
807 | int ret; | |
808 | ||
809 | /* | |
810 | * Explicitly setting UART prints to zero as target turns it on | |
811 | * based on scratch registers. | |
812 | */ | |
813 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
814 | if (ret) { | |
7aa7a72a | 815 | ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); |
5e3dd157 KV |
816 | return ret; |
817 | } | |
818 | ||
c8c39afe | 819 | if (!uart_print) |
5e3dd157 | 820 | return 0; |
5e3dd157 | 821 | |
3a8200b2 | 822 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); |
5e3dd157 | 823 | if (ret) { |
7aa7a72a | 824 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
825 | return ret; |
826 | } | |
827 | ||
828 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
829 | if (ret) { | |
7aa7a72a | 830 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
831 | return ret; |
832 | } | |
833 | ||
03fc137b BM |
834 | /* Set the UART baud rate to 19200. */ |
835 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
836 | if (ret) { | |
7aa7a72a | 837 | ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); |
03fc137b BM |
838 | return ret; |
839 | } | |
840 | ||
7aa7a72a | 841 | ath10k_info(ar, "UART prints enabled\n"); |
5e3dd157 KV |
842 | return 0; |
843 | } | |
844 | ||
845 | static int ath10k_init_hw_params(struct ath10k *ar) | |
846 | { | |
847 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
848 | int i; | |
849 | ||
850 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
851 | hw_params = &ath10k_hw_params_list[i]; | |
852 | ||
853 | if (hw_params->id == ar->target_version) | |
854 | break; | |
855 | } | |
856 | ||
857 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
7aa7a72a | 858 | ath10k_err(ar, "Unsupported hardware version: 0x%x\n", |
5e3dd157 KV |
859 | ar->target_version); |
860 | return -EINVAL; | |
861 | } | |
862 | ||
863 | ar->hw_params = *hw_params; | |
864 | ||
7aa7a72a | 865 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
c8c39afe | 866 | ar->hw_params.name, ar->target_version); |
5e3dd157 KV |
867 | |
868 | return 0; | |
869 | } | |
870 | ||
affd3217 MK |
871 | static void ath10k_core_restart(struct work_struct *work) |
872 | { | |
873 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
874 | ||
7962b0d8 MK |
875 | set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
876 | ||
877 | /* Place a barrier to make sure the compiler doesn't reorder | |
878 | * CRASH_FLUSH and calling other functions. | |
879 | */ | |
880 | barrier(); | |
881 | ||
882 | ieee80211_stop_queues(ar->hw); | |
883 | ath10k_drain_tx(ar); | |
884 | complete_all(&ar->scan.started); | |
885 | complete_all(&ar->scan.completed); | |
886 | complete_all(&ar->scan.on_channel); | |
887 | complete_all(&ar->offchan_tx_completed); | |
888 | complete_all(&ar->install_key_done); | |
889 | complete_all(&ar->vdev_setup_done); | |
ac2953fc | 890 | complete_all(&ar->thermal.wmi_sync); |
7962b0d8 MK |
891 | wake_up(&ar->htt.empty_tx_wq); |
892 | wake_up(&ar->wmi.tx_credits_wq); | |
893 | wake_up(&ar->peer_mapping_wq); | |
894 | ||
affd3217 MK |
895 | mutex_lock(&ar->conf_mutex); |
896 | ||
897 | switch (ar->state) { | |
898 | case ATH10K_STATE_ON: | |
affd3217 | 899 | ar->state = ATH10K_STATE_RESTARTING; |
61e9aab7 | 900 | ath10k_hif_stop(ar); |
5c81c7fd | 901 | ath10k_scan_finish(ar); |
affd3217 MK |
902 | ieee80211_restart_hw(ar->hw); |
903 | break; | |
904 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
905 | /* this can happen if driver is being unloaded |
906 | * or if the crash happens during FW probing */ | |
7aa7a72a | 907 | ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); |
affd3217 MK |
908 | break; |
909 | case ATH10K_STATE_RESTARTING: | |
c5058f5b MK |
910 | /* hw restart might be requested from multiple places */ |
911 | break; | |
affd3217 MK |
912 | case ATH10K_STATE_RESTARTED: |
913 | ar->state = ATH10K_STATE_WEDGED; | |
914 | /* fall through */ | |
915 | case ATH10K_STATE_WEDGED: | |
7aa7a72a | 916 | ath10k_warn(ar, "device is wedged, will not restart\n"); |
affd3217 | 917 | break; |
43d2a30f KV |
918 | case ATH10K_STATE_UTF: |
919 | ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); | |
920 | break; | |
affd3217 MK |
921 | } |
922 | ||
923 | mutex_unlock(&ar->conf_mutex); | |
924 | } | |
925 | ||
5f2144d9 | 926 | static int ath10k_core_init_firmware_features(struct ath10k *ar) |
cfd1061e | 927 | { |
5f2144d9 KV |
928 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) && |
929 | !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
930 | ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); | |
931 | return -EINVAL; | |
932 | } | |
933 | ||
202e86e6 KV |
934 | if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { |
935 | ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", | |
936 | ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version); | |
937 | return -EINVAL; | |
938 | } | |
939 | ||
940 | /* Backwards compatibility for firmwares without | |
941 | * ATH10K_FW_IE_WMI_OP_VERSION. | |
942 | */ | |
943 | if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { | |
944 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
4a16fbec RM |
945 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, |
946 | ar->fw_features)) | |
202e86e6 KV |
947 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2; |
948 | else | |
949 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1; | |
950 | } else { | |
951 | ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; | |
952 | } | |
953 | } | |
954 | ||
955 | switch (ar->wmi.op_version) { | |
956 | case ATH10K_FW_WMI_OP_VERSION_MAIN: | |
cfd1061e MK |
957 | ar->max_num_peers = TARGET_NUM_PEERS; |
958 | ar->max_num_stations = TARGET_NUM_STATIONS; | |
30c78167 | 959 | ar->max_num_vdevs = TARGET_NUM_VDEVS; |
91ad5f56 | 960 | ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; |
202e86e6 KV |
961 | break; |
962 | case ATH10K_FW_WMI_OP_VERSION_10_1: | |
963 | case ATH10K_FW_WMI_OP_VERSION_10_2: | |
4a16fbec | 964 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: |
202e86e6 KV |
965 | ar->max_num_peers = TARGET_10X_NUM_PEERS; |
966 | ar->max_num_stations = TARGET_10X_NUM_STATIONS; | |
30c78167 | 967 | ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; |
91ad5f56 | 968 | ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; |
202e86e6 | 969 | break; |
ca996ec5 MK |
970 | case ATH10K_FW_WMI_OP_VERSION_TLV: |
971 | ar->max_num_peers = TARGET_TLV_NUM_PEERS; | |
972 | ar->max_num_stations = TARGET_TLV_NUM_STATIONS; | |
49274332 | 973 | ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; |
ca996ec5 MK |
974 | ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; |
975 | break; | |
202e86e6 KV |
976 | case ATH10K_FW_WMI_OP_VERSION_UNSET: |
977 | case ATH10K_FW_WMI_OP_VERSION_MAX: | |
978 | WARN_ON(1); | |
979 | return -EINVAL; | |
cfd1061e | 980 | } |
5f2144d9 KV |
981 | |
982 | return 0; | |
cfd1061e MK |
983 | } |
984 | ||
43d2a30f | 985 | int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 986 | { |
5e3dd157 KV |
987 | int status; |
988 | ||
60631c5c KV |
989 | lockdep_assert_held(&ar->conf_mutex); |
990 | ||
7962b0d8 MK |
991 | clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
992 | ||
64d151d4 MK |
993 | ath10k_bmi_start(ar); |
994 | ||
5e3dd157 KV |
995 | if (ath10k_init_configure_target(ar)) { |
996 | status = -EINVAL; | |
997 | goto err; | |
998 | } | |
999 | ||
83091559 KV |
1000 | status = ath10k_download_cal_data(ar); |
1001 | if (status) | |
1002 | goto err; | |
1003 | ||
1004 | status = ath10k_download_fw(ar, mode); | |
5e3dd157 KV |
1005 | if (status) |
1006 | goto err; | |
1007 | ||
1008 | status = ath10k_init_uart(ar); | |
1009 | if (status) | |
1010 | goto err; | |
1011 | ||
cd003fad MK |
1012 | ar->htc.htc_ops.target_send_suspend_complete = |
1013 | ath10k_send_suspend_complete; | |
5e3dd157 | 1014 | |
cd003fad MK |
1015 | status = ath10k_htc_init(ar); |
1016 | if (status) { | |
7aa7a72a | 1017 | ath10k_err(ar, "could not init HTC (%d)\n", status); |
5e3dd157 KV |
1018 | goto err; |
1019 | } | |
1020 | ||
1021 | status = ath10k_bmi_done(ar); | |
1022 | if (status) | |
cd003fad | 1023 | goto err; |
5e3dd157 KV |
1024 | |
1025 | status = ath10k_wmi_attach(ar); | |
1026 | if (status) { | |
7aa7a72a | 1027 | ath10k_err(ar, "WMI attach failed: %d\n", status); |
cd003fad | 1028 | goto err; |
5e3dd157 KV |
1029 | } |
1030 | ||
95bf21f9 MK |
1031 | status = ath10k_htt_init(ar); |
1032 | if (status) { | |
7aa7a72a | 1033 | ath10k_err(ar, "failed to init htt: %d\n", status); |
95bf21f9 MK |
1034 | goto err_wmi_detach; |
1035 | } | |
1036 | ||
1037 | status = ath10k_htt_tx_alloc(&ar->htt); | |
1038 | if (status) { | |
7aa7a72a | 1039 | ath10k_err(ar, "failed to alloc htt tx: %d\n", status); |
95bf21f9 MK |
1040 | goto err_wmi_detach; |
1041 | } | |
1042 | ||
1043 | status = ath10k_htt_rx_alloc(&ar->htt); | |
1044 | if (status) { | |
7aa7a72a | 1045 | ath10k_err(ar, "failed to alloc htt rx: %d\n", status); |
95bf21f9 MK |
1046 | goto err_htt_tx_detach; |
1047 | } | |
1048 | ||
67e3c63f MK |
1049 | status = ath10k_hif_start(ar); |
1050 | if (status) { | |
7aa7a72a | 1051 | ath10k_err(ar, "could not start HIF: %d\n", status); |
95bf21f9 | 1052 | goto err_htt_rx_detach; |
67e3c63f MK |
1053 | } |
1054 | ||
1055 | status = ath10k_htc_wait_target(&ar->htc); | |
1056 | if (status) { | |
7aa7a72a | 1057 | ath10k_err(ar, "failed to connect to HTC: %d\n", status); |
67e3c63f MK |
1058 | goto err_hif_stop; |
1059 | } | |
5e3dd157 | 1060 | |
43d2a30f KV |
1061 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
1062 | status = ath10k_htt_connect(&ar->htt); | |
1063 | if (status) { | |
1064 | ath10k_err(ar, "failed to connect htt (%d)\n", status); | |
1065 | goto err_hif_stop; | |
1066 | } | |
5e3dd157 KV |
1067 | } |
1068 | ||
95bf21f9 MK |
1069 | status = ath10k_wmi_connect(ar); |
1070 | if (status) { | |
7aa7a72a | 1071 | ath10k_err(ar, "could not connect wmi: %d\n", status); |
95bf21f9 MK |
1072 | goto err_hif_stop; |
1073 | } | |
1074 | ||
1075 | status = ath10k_htc_start(&ar->htc); | |
1076 | if (status) { | |
7aa7a72a | 1077 | ath10k_err(ar, "failed to start htc: %d\n", status); |
95bf21f9 MK |
1078 | goto err_hif_stop; |
1079 | } | |
1080 | ||
43d2a30f KV |
1081 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
1082 | status = ath10k_wmi_wait_for_service_ready(ar); | |
1083 | if (status <= 0) { | |
1084 | ath10k_warn(ar, "wmi service ready event not received"); | |
1085 | status = -ETIMEDOUT; | |
1086 | goto err_hif_stop; | |
1087 | } | |
95bf21f9 | 1088 | } |
5e3dd157 | 1089 | |
7aa7a72a | 1090 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", |
c8c39afe | 1091 | ar->hw->wiphy->fw_version); |
5e3dd157 | 1092 | |
5e3dd157 KV |
1093 | status = ath10k_wmi_cmd_init(ar); |
1094 | if (status) { | |
7aa7a72a MK |
1095 | ath10k_err(ar, "could not send WMI init command (%d)\n", |
1096 | status); | |
b7967dc7 | 1097 | goto err_hif_stop; |
5e3dd157 KV |
1098 | } |
1099 | ||
1100 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
1101 | if (status <= 0) { | |
7aa7a72a | 1102 | ath10k_err(ar, "wmi unified ready event not received\n"); |
5e3dd157 | 1103 | status = -ETIMEDOUT; |
b7967dc7 | 1104 | goto err_hif_stop; |
5e3dd157 KV |
1105 | } |
1106 | ||
c545070e MK |
1107 | /* If firmware indicates Full Rx Reorder support it must be used in a |
1108 | * slightly different manner. Let HTT code know. | |
1109 | */ | |
1110 | ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, | |
1111 | ar->wmi.svc_map)); | |
1112 | ||
1113 | status = ath10k_htt_rx_ring_refill(ar); | |
1114 | if (status) { | |
1115 | ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); | |
1116 | goto err_hif_stop; | |
1117 | } | |
1118 | ||
43d2a30f KV |
1119 | /* we don't care about HTT in UTF mode */ |
1120 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { | |
1121 | status = ath10k_htt_setup(&ar->htt); | |
1122 | if (status) { | |
1123 | ath10k_err(ar, "failed to setup htt: %d\n", status); | |
1124 | goto err_hif_stop; | |
1125 | } | |
95bf21f9 | 1126 | } |
5e3dd157 | 1127 | |
db66ea04 KV |
1128 | status = ath10k_debug_start(ar); |
1129 | if (status) | |
b7967dc7 | 1130 | goto err_hif_stop; |
db66ea04 | 1131 | |
30c78167 | 1132 | ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; |
dfa413de | 1133 | |
0579119f | 1134 | INIT_LIST_HEAD(&ar->arvifs); |
1a1b8a88 | 1135 | |
dd30a36e MK |
1136 | return 0; |
1137 | ||
67e3c63f MK |
1138 | err_hif_stop: |
1139 | ath10k_hif_stop(ar); | |
95bf21f9 MK |
1140 | err_htt_rx_detach: |
1141 | ath10k_htt_rx_free(&ar->htt); | |
1142 | err_htt_tx_detach: | |
1143 | ath10k_htt_tx_free(&ar->htt); | |
dd30a36e MK |
1144 | err_wmi_detach: |
1145 | ath10k_wmi_detach(ar); | |
1146 | err: | |
1147 | return status; | |
1148 | } | |
818bdd16 | 1149 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 1150 | |
00f5482b MP |
1151 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
1152 | { | |
1153 | int ret; | |
1154 | ||
1155 | reinit_completion(&ar->target_suspend); | |
1156 | ||
1157 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
1158 | if (ret) { | |
7aa7a72a | 1159 | ath10k_warn(ar, "could not suspend target (%d)\n", ret); |
00f5482b MP |
1160 | return ret; |
1161 | } | |
1162 | ||
1163 | ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); | |
1164 | ||
1165 | if (ret == 0) { | |
7aa7a72a | 1166 | ath10k_warn(ar, "suspend timed out - target pause event never came\n"); |
00f5482b MP |
1167 | return -ETIMEDOUT; |
1168 | } | |
1169 | ||
1170 | return 0; | |
1171 | } | |
1172 | ||
dd30a36e MK |
1173 | void ath10k_core_stop(struct ath10k *ar) |
1174 | { | |
60631c5c KV |
1175 | lockdep_assert_held(&ar->conf_mutex); |
1176 | ||
00f5482b | 1177 | /* try to suspend target */ |
43d2a30f KV |
1178 | if (ar->state != ATH10K_STATE_RESTARTING && |
1179 | ar->state != ATH10K_STATE_UTF) | |
216a1836 MK |
1180 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); |
1181 | ||
db66ea04 | 1182 | ath10k_debug_stop(ar); |
95bf21f9 MK |
1183 | ath10k_hif_stop(ar); |
1184 | ath10k_htt_tx_free(&ar->htt); | |
1185 | ath10k_htt_rx_free(&ar->htt); | |
dd30a36e MK |
1186 | ath10k_wmi_detach(ar); |
1187 | } | |
818bdd16 MK |
1188 | EXPORT_SYMBOL(ath10k_core_stop); |
1189 | ||
1190 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
1191 | * order to know what hw capabilities should be advertised to mac80211 it is | |
1192 | * necessary to load the firmware (and tear it down immediately since start | |
1193 | * hook will try to init it again) before registering */ | |
1194 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
1195 | { | |
29385057 MK |
1196 | struct bmi_target_info target_info; |
1197 | int ret = 0; | |
818bdd16 MK |
1198 | |
1199 | ret = ath10k_hif_power_up(ar); | |
1200 | if (ret) { | |
7aa7a72a | 1201 | ath10k_err(ar, "could not start pci hif (%d)\n", ret); |
818bdd16 MK |
1202 | return ret; |
1203 | } | |
1204 | ||
29385057 MK |
1205 | memset(&target_info, 0, sizeof(target_info)); |
1206 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
1207 | if (ret) { | |
7aa7a72a | 1208 | ath10k_err(ar, "could not get target info (%d)\n", ret); |
c6ce492d | 1209 | goto err_power_down; |
29385057 MK |
1210 | } |
1211 | ||
1212 | ar->target_version = target_info.version; | |
1213 | ar->hw->wiphy->hw_version = target_info.version; | |
1214 | ||
1215 | ret = ath10k_init_hw_params(ar); | |
1216 | if (ret) { | |
7aa7a72a | 1217 | ath10k_err(ar, "could not get hw params (%d)\n", ret); |
c6ce492d | 1218 | goto err_power_down; |
29385057 MK |
1219 | } |
1220 | ||
1221 | ret = ath10k_core_fetch_firmware_files(ar); | |
1222 | if (ret) { | |
7aa7a72a | 1223 | ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); |
c6ce492d | 1224 | goto err_power_down; |
29385057 MK |
1225 | } |
1226 | ||
5f2144d9 KV |
1227 | ret = ath10k_core_init_firmware_features(ar); |
1228 | if (ret) { | |
1229 | ath10k_err(ar, "fatal problem with firmware features: %d\n", | |
1230 | ret); | |
1231 | goto err_free_firmware_files; | |
1232 | } | |
cfd1061e | 1233 | |
60631c5c KV |
1234 | mutex_lock(&ar->conf_mutex); |
1235 | ||
43d2a30f | 1236 | ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL); |
818bdd16 | 1237 | if (ret) { |
7aa7a72a | 1238 | ath10k_err(ar, "could not init core (%d)\n", ret); |
c6ce492d | 1239 | goto err_unlock; |
818bdd16 MK |
1240 | } |
1241 | ||
8079de0d | 1242 | ath10k_print_driver_info(ar); |
818bdd16 | 1243 | ath10k_core_stop(ar); |
60631c5c KV |
1244 | |
1245 | mutex_unlock(&ar->conf_mutex); | |
1246 | ||
818bdd16 MK |
1247 | ath10k_hif_power_down(ar); |
1248 | return 0; | |
c6ce492d KV |
1249 | |
1250 | err_unlock: | |
1251 | mutex_unlock(&ar->conf_mutex); | |
1252 | ||
5f2144d9 | 1253 | err_free_firmware_files: |
c6ce492d KV |
1254 | ath10k_core_free_firmware_files(ar); |
1255 | ||
1256 | err_power_down: | |
1257 | ath10k_hif_power_down(ar); | |
1258 | ||
1259 | return ret; | |
818bdd16 | 1260 | } |
dd30a36e | 1261 | |
6782cb69 | 1262 | static void ath10k_core_register_work(struct work_struct *work) |
dd30a36e | 1263 | { |
6782cb69 | 1264 | struct ath10k *ar = container_of(work, struct ath10k, register_work); |
dd30a36e MK |
1265 | int status; |
1266 | ||
818bdd16 MK |
1267 | status = ath10k_core_probe_fw(ar); |
1268 | if (status) { | |
7aa7a72a | 1269 | ath10k_err(ar, "could not probe fw (%d)\n", status); |
6782cb69 | 1270 | goto err; |
818bdd16 | 1271 | } |
dd30a36e | 1272 | |
5e3dd157 | 1273 | status = ath10k_mac_register(ar); |
818bdd16 | 1274 | if (status) { |
7aa7a72a | 1275 | ath10k_err(ar, "could not register to mac80211 (%d)\n", status); |
29385057 | 1276 | goto err_release_fw; |
818bdd16 | 1277 | } |
5e3dd157 | 1278 | |
e13cf7a3 | 1279 | status = ath10k_debug_register(ar); |
5e3dd157 | 1280 | if (status) { |
7aa7a72a | 1281 | ath10k_err(ar, "unable to initialize debugfs\n"); |
5e3dd157 KV |
1282 | goto err_unregister_mac; |
1283 | } | |
1284 | ||
855aed12 SW |
1285 | status = ath10k_spectral_create(ar); |
1286 | if (status) { | |
7aa7a72a | 1287 | ath10k_err(ar, "failed to initialize spectral\n"); |
855aed12 SW |
1288 | goto err_debug_destroy; |
1289 | } | |
1290 | ||
fe6f36d6 RM |
1291 | status = ath10k_thermal_register(ar); |
1292 | if (status) { | |
1293 | ath10k_err(ar, "could not register thermal device: %d\n", | |
1294 | status); | |
1295 | goto err_spectral_destroy; | |
1296 | } | |
1297 | ||
6782cb69 MK |
1298 | set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); |
1299 | return; | |
5e3dd157 | 1300 | |
fe6f36d6 RM |
1301 | err_spectral_destroy: |
1302 | ath10k_spectral_destroy(ar); | |
855aed12 SW |
1303 | err_debug_destroy: |
1304 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
1305 | err_unregister_mac: |
1306 | ath10k_mac_unregister(ar); | |
29385057 MK |
1307 | err_release_fw: |
1308 | ath10k_core_free_firmware_files(ar); | |
6782cb69 | 1309 | err: |
a491a920 MK |
1310 | /* TODO: It's probably a good idea to release device from the driver |
1311 | * but calling device_release_driver() here will cause a deadlock. | |
1312 | */ | |
6782cb69 MK |
1313 | return; |
1314 | } | |
1315 | ||
1316 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
1317 | { | |
6782cb69 | 1318 | ar->chip_id = chip_id; |
6782cb69 MK |
1319 | queue_work(ar->workqueue, &ar->register_work); |
1320 | ||
1321 | return 0; | |
5e3dd157 KV |
1322 | } |
1323 | EXPORT_SYMBOL(ath10k_core_register); | |
1324 | ||
1325 | void ath10k_core_unregister(struct ath10k *ar) | |
1326 | { | |
6782cb69 MK |
1327 | cancel_work_sync(&ar->register_work); |
1328 | ||
1329 | if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) | |
1330 | return; | |
1331 | ||
fe6f36d6 | 1332 | ath10k_thermal_unregister(ar); |
804eef14 SW |
1333 | /* Stop spectral before unregistering from mac80211 to remove the |
1334 | * relayfs debugfs file cleanly. Otherwise the parent debugfs tree | |
1335 | * would be already be free'd recursively, leading to a double free. | |
1336 | */ | |
1337 | ath10k_spectral_destroy(ar); | |
1338 | ||
5e3dd157 KV |
1339 | /* We must unregister from mac80211 before we stop HTC and HIF. |
1340 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
1341 | * unhappy about callback failures. */ | |
1342 | ath10k_mac_unregister(ar); | |
db66ea04 | 1343 | |
43d2a30f KV |
1344 | ath10k_testmode_destroy(ar); |
1345 | ||
29385057 | 1346 | ath10k_core_free_firmware_files(ar); |
6f1f56ea | 1347 | |
e13cf7a3 | 1348 | ath10k_debug_unregister(ar); |
5e3dd157 KV |
1349 | } |
1350 | EXPORT_SYMBOL(ath10k_core_unregister); | |
1351 | ||
e7b54194 | 1352 | struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, |
e07db352 | 1353 | enum ath10k_bus bus, |
d63955b3 | 1354 | enum ath10k_hw_rev hw_rev, |
0d0a6939 MK |
1355 | const struct ath10k_hif_ops *hif_ops) |
1356 | { | |
1357 | struct ath10k *ar; | |
e13cf7a3 | 1358 | int ret; |
0d0a6939 | 1359 | |
e7b54194 | 1360 | ar = ath10k_mac_create(priv_size); |
0d0a6939 MK |
1361 | if (!ar) |
1362 | return NULL; | |
1363 | ||
1364 | ar->ath_common.priv = ar; | |
1365 | ar->ath_common.hw = ar->hw; | |
0d0a6939 | 1366 | ar->dev = dev; |
d63955b3 | 1367 | ar->hw_rev = hw_rev; |
0d0a6939 | 1368 | ar->hif.ops = hif_ops; |
e07db352 | 1369 | ar->hif.bus = bus; |
0d0a6939 | 1370 | |
d63955b3 MK |
1371 | switch (hw_rev) { |
1372 | case ATH10K_HW_QCA988X: | |
1373 | ar->regs = &qca988x_regs; | |
1374 | break; | |
1375 | case ATH10K_HW_QCA6174: | |
1376 | ar->regs = &qca6174_regs; | |
1377 | break; | |
1378 | default: | |
1379 | ath10k_err(ar, "unsupported core hardware revision %d\n", | |
1380 | hw_rev); | |
1381 | ret = -ENOTSUPP; | |
1382 | goto err_free_mac; | |
1383 | } | |
1384 | ||
0d0a6939 MK |
1385 | init_completion(&ar->scan.started); |
1386 | init_completion(&ar->scan.completed); | |
1387 | init_completion(&ar->scan.on_channel); | |
1388 | init_completion(&ar->target_suspend); | |
1389 | ||
1390 | init_completion(&ar->install_key_done); | |
1391 | init_completion(&ar->vdev_setup_done); | |
ac2953fc | 1392 | init_completion(&ar->thermal.wmi_sync); |
0d0a6939 | 1393 | |
5c81c7fd | 1394 | INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); |
0d0a6939 MK |
1395 | |
1396 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
1397 | if (!ar->workqueue) | |
e13cf7a3 | 1398 | goto err_free_mac; |
0d0a6939 MK |
1399 | |
1400 | mutex_init(&ar->conf_mutex); | |
1401 | spin_lock_init(&ar->data_lock); | |
1402 | ||
1403 | INIT_LIST_HEAD(&ar->peers); | |
1404 | init_waitqueue_head(&ar->peer_mapping_wq); | |
7962b0d8 MK |
1405 | init_waitqueue_head(&ar->htt.empty_tx_wq); |
1406 | init_waitqueue_head(&ar->wmi.tx_credits_wq); | |
0d0a6939 MK |
1407 | |
1408 | init_completion(&ar->offchan_tx_completed); | |
1409 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
1410 | skb_queue_head_init(&ar->offchan_tx_queue); | |
1411 | ||
1412 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); | |
1413 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
1414 | ||
6782cb69 | 1415 | INIT_WORK(&ar->register_work, ath10k_core_register_work); |
0d0a6939 MK |
1416 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
1417 | ||
e13cf7a3 MK |
1418 | ret = ath10k_debug_create(ar); |
1419 | if (ret) | |
1420 | goto err_free_wq; | |
1421 | ||
0d0a6939 MK |
1422 | return ar; |
1423 | ||
e13cf7a3 MK |
1424 | err_free_wq: |
1425 | destroy_workqueue(ar->workqueue); | |
1426 | ||
1427 | err_free_mac: | |
0d0a6939 | 1428 | ath10k_mac_destroy(ar); |
e13cf7a3 | 1429 | |
0d0a6939 MK |
1430 | return NULL; |
1431 | } | |
1432 | EXPORT_SYMBOL(ath10k_core_create); | |
1433 | ||
1434 | void ath10k_core_destroy(struct ath10k *ar) | |
1435 | { | |
1436 | flush_workqueue(ar->workqueue); | |
1437 | destroy_workqueue(ar->workqueue); | |
1438 | ||
e13cf7a3 | 1439 | ath10k_debug_destroy(ar); |
0d0a6939 MK |
1440 | ath10k_mac_destroy(ar); |
1441 | } | |
1442 | EXPORT_SYMBOL(ath10k_core_destroy); | |
1443 | ||
5e3dd157 KV |
1444 | MODULE_AUTHOR("Qualcomm Atheros"); |
1445 | MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); | |
1446 | MODULE_LICENSE("Dual BSD/GPL"); |