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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
20 | ||
21 | #include "core.h" | |
22 | #include "mac.h" | |
23 | #include "htc.h" | |
24 | #include "hif.h" | |
25 | #include "wmi.h" | |
26 | #include "bmi.h" | |
27 | #include "debug.h" | |
28 | #include "htt.h" | |
29 | ||
30 | unsigned int ath10k_debug_mask; | |
31 | static bool uart_print; | |
32 | static unsigned int ath10k_p2p; | |
33 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); | |
34 | module_param(uart_print, bool, 0644); | |
35 | module_param_named(p2p, ath10k_p2p, uint, 0644); | |
36 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); | |
37 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
38 | MODULE_PARM_DESC(p2p, "Enable ath10k P2P support"); | |
39 | ||
40 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
41 | { |
42 | .id = QCA988X_HW_2_0_VERSION, | |
43 | .name = "qca988x hw2.0", | |
44 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
45 | .fw = { | |
46 | .dir = QCA988X_HW_2_0_FW_DIR, | |
47 | .fw = QCA988X_HW_2_0_FW_FILE, | |
48 | .otp = QCA988X_HW_2_0_OTP_FILE, | |
49 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, | |
50 | }, | |
51 | }, | |
52 | }; | |
53 | ||
54 | static void ath10k_send_suspend_complete(struct ath10k *ar) | |
55 | { | |
effea968 | 56 | ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 57 | |
9042e17d | 58 | complete(&ar->target_suspend); |
5e3dd157 KV |
59 | } |
60 | ||
5e3dd157 KV |
61 | static int ath10k_init_connect_htc(struct ath10k *ar) |
62 | { | |
63 | int status; | |
64 | ||
65 | status = ath10k_wmi_connect_htc_service(ar); | |
66 | if (status) | |
67 | goto conn_fail; | |
68 | ||
69 | /* Start HTC */ | |
cd003fad | 70 | status = ath10k_htc_start(&ar->htc); |
5e3dd157 KV |
71 | if (status) |
72 | goto conn_fail; | |
73 | ||
74 | /* Wait for WMI event to be ready */ | |
75 | status = ath10k_wmi_wait_for_service_ready(ar); | |
76 | if (status <= 0) { | |
77 | ath10k_warn("wmi service ready event not received"); | |
78 | status = -ETIMEDOUT; | |
79 | goto timeout; | |
80 | } | |
81 | ||
effea968 | 82 | ath10k_dbg(ATH10K_DBG_BOOT, "boot wmi ready\n"); |
5e3dd157 KV |
83 | return 0; |
84 | ||
85 | timeout: | |
cd003fad | 86 | ath10k_htc_stop(&ar->htc); |
5e3dd157 KV |
87 | conn_fail: |
88 | return status; | |
89 | } | |
90 | ||
91 | static int ath10k_init_configure_target(struct ath10k *ar) | |
92 | { | |
93 | u32 param_host; | |
94 | int ret; | |
95 | ||
96 | /* tell target which HTC version it is used*/ | |
97 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
98 | HTC_PROTOCOL_VERSION); | |
99 | if (ret) { | |
100 | ath10k_err("settings HTC version failed\n"); | |
101 | return ret; | |
102 | } | |
103 | ||
104 | /* set the firmware mode to STA/IBSS/AP */ | |
105 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
106 | if (ret) { | |
107 | ath10k_err("setting firmware mode (1/2) failed\n"); | |
108 | return ret; | |
109 | } | |
110 | ||
111 | /* TODO following parameters need to be re-visited. */ | |
112 | /* num_device */ | |
113 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
114 | /* Firmware mode */ | |
115 | /* FIXME: Why FW_MODE_AP ??.*/ | |
116 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
117 | /* mac_addr_method */ | |
118 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
119 | /* firmware_bridge */ | |
120 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
121 | /* fwsubmode */ | |
122 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
123 | ||
124 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
125 | if (ret) { | |
126 | ath10k_err("setting firmware mode (2/2) failed\n"); | |
127 | return ret; | |
128 | } | |
129 | ||
130 | /* We do all byte-swapping on the host */ | |
131 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
132 | if (ret) { | |
133 | ath10k_err("setting host CPU BE mode failed\n"); | |
134 | return ret; | |
135 | } | |
136 | ||
137 | /* FW descriptor/Data swap flags */ | |
138 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
139 | ||
140 | if (ret) { | |
141 | ath10k_err("setting FW data/desc swap flags failed\n"); | |
142 | return ret; | |
143 | } | |
144 | ||
145 | return 0; | |
146 | } | |
147 | ||
148 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
149 | const char *dir, | |
150 | const char *file) | |
151 | { | |
152 | char filename[100]; | |
153 | const struct firmware *fw; | |
154 | int ret; | |
155 | ||
156 | if (file == NULL) | |
157 | return ERR_PTR(-ENOENT); | |
158 | ||
159 | if (dir == NULL) | |
160 | dir = "."; | |
161 | ||
162 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
163 | ret = request_firmware(&fw, filename, ar->dev); | |
164 | if (ret) | |
165 | return ERR_PTR(ret); | |
166 | ||
167 | return fw; | |
168 | } | |
169 | ||
958df3a0 | 170 | static int ath10k_push_board_ext_data(struct ath10k *ar) |
5e3dd157 KV |
171 | { |
172 | u32 board_data_size = QCA988X_BOARD_DATA_SZ; | |
173 | u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ; | |
174 | u32 board_ext_data_addr; | |
175 | int ret; | |
176 | ||
177 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
178 | if (ret) { | |
179 | ath10k_err("could not read board ext data addr (%d)\n", ret); | |
180 | return ret; | |
181 | } | |
182 | ||
b52b7688 | 183 | ath10k_dbg(ATH10K_DBG_BOOT, |
effea968 | 184 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
185 | board_ext_data_addr); |
186 | ||
187 | if (board_ext_data_addr == 0) | |
188 | return 0; | |
189 | ||
958df3a0 | 190 | if (ar->board_len != (board_data_size + board_ext_data_size)) { |
5e3dd157 | 191 | ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n", |
958df3a0 | 192 | ar->board_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
193 | return -EINVAL; |
194 | } | |
195 | ||
196 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
958df3a0 | 197 | ar->board_data + board_data_size, |
5e3dd157 KV |
198 | board_ext_data_size); |
199 | if (ret) { | |
200 | ath10k_err("could not write board ext data (%d)\n", ret); | |
201 | return ret; | |
202 | } | |
203 | ||
204 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
205 | (board_ext_data_size << 16) | 1); | |
206 | if (ret) { | |
207 | ath10k_err("could not write board ext data bit (%d)\n", ret); | |
208 | return ret; | |
209 | } | |
210 | ||
211 | return 0; | |
212 | } | |
213 | ||
214 | static int ath10k_download_board_data(struct ath10k *ar) | |
215 | { | |
216 | u32 board_data_size = QCA988X_BOARD_DATA_SZ; | |
217 | u32 address; | |
5e3dd157 KV |
218 | int ret; |
219 | ||
958df3a0 | 220 | ret = ath10k_push_board_ext_data(ar); |
5e3dd157 KV |
221 | if (ret) { |
222 | ath10k_err("could not push board ext data (%d)\n", ret); | |
223 | goto exit; | |
224 | } | |
225 | ||
226 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
227 | if (ret) { | |
228 | ath10k_err("could not read board data addr (%d)\n", ret); | |
229 | goto exit; | |
230 | } | |
231 | ||
958df3a0 KV |
232 | ret = ath10k_bmi_write_memory(ar, address, ar->board_data, |
233 | min_t(u32, board_data_size, | |
234 | ar->board_len)); | |
5e3dd157 KV |
235 | if (ret) { |
236 | ath10k_err("could not write board data (%d)\n", ret); | |
237 | goto exit; | |
238 | } | |
239 | ||
240 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
241 | if (ret) { | |
242 | ath10k_err("could not write board data bit (%d)\n", ret); | |
243 | goto exit; | |
244 | } | |
245 | ||
246 | exit: | |
5e3dd157 KV |
247 | return ret; |
248 | } | |
249 | ||
250 | static int ath10k_download_and_run_otp(struct ath10k *ar) | |
251 | { | |
d6d4a58d | 252 | u32 result, address = ar->hw_params.patch_load_addr; |
5e3dd157 KV |
253 | int ret; |
254 | ||
255 | /* OTP is optional */ | |
256 | ||
7f06ea1e KV |
257 | if (!ar->otp_data || !ar->otp_len) { |
258 | ath10k_warn("Not running otp, calibration will be incorrect!\n"); | |
5e3dd157 | 259 | return 0; |
7f06ea1e KV |
260 | } |
261 | ||
262 | ath10k_dbg(ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", | |
263 | address, ar->otp_len); | |
5e3dd157 | 264 | |
958df3a0 | 265 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); |
5e3dd157 KV |
266 | if (ret) { |
267 | ath10k_err("could not write otp (%d)\n", ret); | |
7f06ea1e | 268 | return ret; |
5e3dd157 KV |
269 | } |
270 | ||
d6d4a58d | 271 | ret = ath10k_bmi_execute(ar, address, 0, &result); |
5e3dd157 KV |
272 | if (ret) { |
273 | ath10k_err("could not execute otp (%d)\n", ret); | |
7f06ea1e | 274 | return ret; |
5e3dd157 KV |
275 | } |
276 | ||
7f06ea1e KV |
277 | ath10k_dbg(ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); |
278 | ||
279 | if (result != 0) { | |
280 | ath10k_err("otp calibration failed: %d", result); | |
281 | return -EINVAL; | |
282 | } | |
283 | ||
284 | return 0; | |
5e3dd157 KV |
285 | } |
286 | ||
287 | static int ath10k_download_fw(struct ath10k *ar) | |
288 | { | |
5e3dd157 KV |
289 | u32 address; |
290 | int ret; | |
291 | ||
5e3dd157 KV |
292 | address = ar->hw_params.patch_load_addr; |
293 | ||
958df3a0 KV |
294 | ret = ath10k_bmi_fast_download(ar, address, ar->firmware_data, |
295 | ar->firmware_len); | |
5e3dd157 KV |
296 | if (ret) { |
297 | ath10k_err("could not write fw (%d)\n", ret); | |
298 | goto exit; | |
299 | } | |
300 | ||
301 | exit: | |
29385057 MK |
302 | return ret; |
303 | } | |
304 | ||
305 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
306 | { | |
36527916 KV |
307 | if (ar->board && !IS_ERR(ar->board)) |
308 | release_firmware(ar->board); | |
29385057 MK |
309 | |
310 | if (ar->otp && !IS_ERR(ar->otp)) | |
311 | release_firmware(ar->otp); | |
312 | ||
313 | if (ar->firmware && !IS_ERR(ar->firmware)) | |
314 | release_firmware(ar->firmware); | |
315 | ||
36527916 | 316 | ar->board = NULL; |
958df3a0 KV |
317 | ar->board_data = NULL; |
318 | ar->board_len = 0; | |
319 | ||
29385057 | 320 | ar->otp = NULL; |
958df3a0 KV |
321 | ar->otp_data = NULL; |
322 | ar->otp_len = 0; | |
323 | ||
29385057 | 324 | ar->firmware = NULL; |
958df3a0 KV |
325 | ar->firmware_data = NULL; |
326 | ar->firmware_len = 0; | |
29385057 MK |
327 | } |
328 | ||
1a222435 | 329 | static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) |
29385057 MK |
330 | { |
331 | int ret = 0; | |
332 | ||
333 | if (ar->hw_params.fw.fw == NULL) { | |
334 | ath10k_err("firmware file not defined\n"); | |
335 | return -EINVAL; | |
336 | } | |
337 | ||
338 | if (ar->hw_params.fw.board == NULL) { | |
339 | ath10k_err("board data file not defined"); | |
340 | return -EINVAL; | |
341 | } | |
342 | ||
36527916 KV |
343 | ar->board = ath10k_fetch_fw_file(ar, |
344 | ar->hw_params.fw.dir, | |
345 | ar->hw_params.fw.board); | |
346 | if (IS_ERR(ar->board)) { | |
347 | ret = PTR_ERR(ar->board); | |
29385057 MK |
348 | ath10k_err("could not fetch board data (%d)\n", ret); |
349 | goto err; | |
350 | } | |
351 | ||
958df3a0 KV |
352 | ar->board_data = ar->board->data; |
353 | ar->board_len = ar->board->size; | |
354 | ||
29385057 MK |
355 | ar->firmware = ath10k_fetch_fw_file(ar, |
356 | ar->hw_params.fw.dir, | |
357 | ar->hw_params.fw.fw); | |
358 | if (IS_ERR(ar->firmware)) { | |
359 | ret = PTR_ERR(ar->firmware); | |
360 | ath10k_err("could not fetch firmware (%d)\n", ret); | |
361 | goto err; | |
362 | } | |
363 | ||
958df3a0 KV |
364 | ar->firmware_data = ar->firmware->data; |
365 | ar->firmware_len = ar->firmware->size; | |
366 | ||
29385057 MK |
367 | /* OTP may be undefined. If so, don't fetch it at all */ |
368 | if (ar->hw_params.fw.otp == NULL) | |
369 | return 0; | |
370 | ||
371 | ar->otp = ath10k_fetch_fw_file(ar, | |
372 | ar->hw_params.fw.dir, | |
373 | ar->hw_params.fw.otp); | |
374 | if (IS_ERR(ar->otp)) { | |
375 | ret = PTR_ERR(ar->otp); | |
376 | ath10k_err("could not fetch otp (%d)\n", ret); | |
377 | goto err; | |
378 | } | |
379 | ||
958df3a0 KV |
380 | ar->otp_data = ar->otp->data; |
381 | ar->otp_len = ar->otp->size; | |
382 | ||
29385057 MK |
383 | return 0; |
384 | ||
385 | err: | |
386 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
387 | return ret; |
388 | } | |
389 | ||
1a222435 KV |
390 | static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) |
391 | { | |
392 | size_t magic_len, len, ie_len; | |
393 | int ie_id, i, index, bit, ret; | |
394 | struct ath10k_fw_ie *hdr; | |
395 | const u8 *data; | |
396 | __le32 *timestamp; | |
397 | ||
398 | /* first fetch the firmware file (firmware-*.bin) */ | |
399 | ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); | |
400 | if (IS_ERR(ar->firmware)) { | |
401 | ath10k_err("Could not fetch firmware file '%s': %ld\n", | |
402 | name, PTR_ERR(ar->firmware)); | |
403 | return PTR_ERR(ar->firmware); | |
404 | } | |
405 | ||
406 | data = ar->firmware->data; | |
407 | len = ar->firmware->size; | |
408 | ||
409 | /* magic also includes the null byte, check that as well */ | |
410 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
411 | ||
412 | if (len < magic_len) { | |
fd9c4864 | 413 | ath10k_err("firmware image too small to contain magic: %zu\n", |
1a222435 | 414 | len); |
9bab1cc0 MK |
415 | ret = -EINVAL; |
416 | goto err; | |
1a222435 KV |
417 | } |
418 | ||
419 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
420 | ath10k_err("Invalid firmware magic\n"); | |
9bab1cc0 MK |
421 | ret = -EINVAL; |
422 | goto err; | |
1a222435 KV |
423 | } |
424 | ||
425 | /* jump over the padding */ | |
426 | magic_len = ALIGN(magic_len, 4); | |
427 | ||
428 | len -= magic_len; | |
429 | data += magic_len; | |
430 | ||
431 | /* loop elements */ | |
432 | while (len > sizeof(struct ath10k_fw_ie)) { | |
433 | hdr = (struct ath10k_fw_ie *)data; | |
434 | ||
435 | ie_id = le32_to_cpu(hdr->id); | |
436 | ie_len = le32_to_cpu(hdr->len); | |
437 | ||
438 | len -= sizeof(*hdr); | |
439 | data += sizeof(*hdr); | |
440 | ||
441 | if (len < ie_len) { | |
fd9c4864 | 442 | ath10k_err("Invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 443 | ie_id, len, ie_len); |
9bab1cc0 MK |
444 | ret = -EINVAL; |
445 | goto err; | |
1a222435 KV |
446 | } |
447 | ||
448 | switch (ie_id) { | |
449 | case ATH10K_FW_IE_FW_VERSION: | |
450 | if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) | |
451 | break; | |
452 | ||
453 | memcpy(ar->hw->wiphy->fw_version, data, ie_len); | |
454 | ar->hw->wiphy->fw_version[ie_len] = '\0'; | |
455 | ||
456 | ath10k_dbg(ATH10K_DBG_BOOT, | |
457 | "found fw version %s\n", | |
458 | ar->hw->wiphy->fw_version); | |
459 | break; | |
460 | case ATH10K_FW_IE_TIMESTAMP: | |
461 | if (ie_len != sizeof(u32)) | |
462 | break; | |
463 | ||
464 | timestamp = (__le32 *)data; | |
465 | ||
466 | ath10k_dbg(ATH10K_DBG_BOOT, "found fw timestamp %d\n", | |
467 | le32_to_cpup(timestamp)); | |
468 | break; | |
469 | case ATH10K_FW_IE_FEATURES: | |
470 | ath10k_dbg(ATH10K_DBG_BOOT, | |
471 | "found firmware features ie (%zd B)\n", | |
472 | ie_len); | |
473 | ||
474 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
475 | index = i / 8; | |
476 | bit = i % 8; | |
477 | ||
478 | if (index == ie_len) | |
479 | break; | |
480 | ||
f591a1a5 BG |
481 | if (data[index] & (1 << bit)) { |
482 | ath10k_dbg(ATH10K_DBG_BOOT, | |
483 | "Enabling feature bit: %i\n", | |
484 | i); | |
1a222435 | 485 | __set_bit(i, ar->fw_features); |
f591a1a5 | 486 | } |
1a222435 KV |
487 | } |
488 | ||
489 | ath10k_dbg_dump(ATH10K_DBG_BOOT, "features", "", | |
490 | ar->fw_features, | |
491 | sizeof(ar->fw_features)); | |
492 | break; | |
493 | case ATH10K_FW_IE_FW_IMAGE: | |
494 | ath10k_dbg(ATH10K_DBG_BOOT, | |
495 | "found fw image ie (%zd B)\n", | |
496 | ie_len); | |
497 | ||
498 | ar->firmware_data = data; | |
499 | ar->firmware_len = ie_len; | |
500 | ||
501 | break; | |
502 | case ATH10K_FW_IE_OTP_IMAGE: | |
503 | ath10k_dbg(ATH10K_DBG_BOOT, | |
504 | "found otp image ie (%zd B)\n", | |
505 | ie_len); | |
506 | ||
507 | ar->otp_data = data; | |
508 | ar->otp_len = ie_len; | |
509 | ||
510 | break; | |
511 | default: | |
512 | ath10k_warn("Unknown FW IE: %u\n", | |
513 | le32_to_cpu(hdr->id)); | |
514 | break; | |
515 | } | |
516 | ||
517 | /* jump over the padding */ | |
518 | ie_len = ALIGN(ie_len, 4); | |
519 | ||
520 | len -= ie_len; | |
521 | data += ie_len; | |
e05634ee | 522 | } |
1a222435 KV |
523 | |
524 | if (!ar->firmware_data || !ar->firmware_len) { | |
525 | ath10k_warn("No ATH10K_FW_IE_FW_IMAGE found from %s, skipping\n", | |
526 | name); | |
527 | ret = -ENOMEDIUM; | |
528 | goto err; | |
529 | } | |
530 | ||
531 | /* now fetch the board file */ | |
532 | if (ar->hw_params.fw.board == NULL) { | |
533 | ath10k_err("board data file not defined"); | |
534 | ret = -EINVAL; | |
535 | goto err; | |
536 | } | |
537 | ||
538 | ar->board = ath10k_fetch_fw_file(ar, | |
539 | ar->hw_params.fw.dir, | |
540 | ar->hw_params.fw.board); | |
541 | if (IS_ERR(ar->board)) { | |
542 | ret = PTR_ERR(ar->board); | |
543 | ath10k_err("could not fetch board data (%d)\n", ret); | |
544 | goto err; | |
545 | } | |
546 | ||
547 | ar->board_data = ar->board->data; | |
548 | ar->board_len = ar->board->size; | |
549 | ||
550 | return 0; | |
551 | ||
552 | err: | |
553 | ath10k_core_free_firmware_files(ar); | |
554 | return ret; | |
555 | } | |
556 | ||
557 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) | |
558 | { | |
559 | int ret; | |
560 | ||
561 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); | |
562 | if (ret == 0) { | |
563 | ar->fw_api = 2; | |
564 | goto out; | |
565 | } | |
566 | ||
567 | ret = ath10k_core_fetch_firmware_api_1(ar); | |
568 | if (ret) | |
569 | return ret; | |
570 | ||
571 | ar->fw_api = 1; | |
572 | ||
573 | out: | |
574 | ath10k_dbg(ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); | |
575 | ||
576 | return 0; | |
577 | } | |
578 | ||
5e3dd157 KV |
579 | static int ath10k_init_download_firmware(struct ath10k *ar) |
580 | { | |
581 | int ret; | |
582 | ||
583 | ret = ath10k_download_board_data(ar); | |
584 | if (ret) | |
585 | return ret; | |
586 | ||
587 | ret = ath10k_download_and_run_otp(ar); | |
588 | if (ret) | |
589 | return ret; | |
590 | ||
591 | ret = ath10k_download_fw(ar); | |
592 | if (ret) | |
593 | return ret; | |
594 | ||
595 | return ret; | |
596 | } | |
597 | ||
598 | static int ath10k_init_uart(struct ath10k *ar) | |
599 | { | |
600 | int ret; | |
601 | ||
602 | /* | |
603 | * Explicitly setting UART prints to zero as target turns it on | |
604 | * based on scratch registers. | |
605 | */ | |
606 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
607 | if (ret) { | |
608 | ath10k_warn("could not disable UART prints (%d)\n", ret); | |
609 | return ret; | |
610 | } | |
611 | ||
c8c39afe | 612 | if (!uart_print) |
5e3dd157 | 613 | return 0; |
5e3dd157 KV |
614 | |
615 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7); | |
616 | if (ret) { | |
617 | ath10k_warn("could not enable UART prints (%d)\n", ret); | |
618 | return ret; | |
619 | } | |
620 | ||
621 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
622 | if (ret) { | |
623 | ath10k_warn("could not enable UART prints (%d)\n", ret); | |
624 | return ret; | |
625 | } | |
626 | ||
03fc137b BM |
627 | /* Set the UART baud rate to 19200. */ |
628 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
629 | if (ret) { | |
630 | ath10k_warn("could not set the baud rate (%d)\n", ret); | |
631 | return ret; | |
632 | } | |
633 | ||
5e3dd157 KV |
634 | ath10k_info("UART prints enabled\n"); |
635 | return 0; | |
636 | } | |
637 | ||
638 | static int ath10k_init_hw_params(struct ath10k *ar) | |
639 | { | |
640 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
641 | int i; | |
642 | ||
643 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
644 | hw_params = &ath10k_hw_params_list[i]; | |
645 | ||
646 | if (hw_params->id == ar->target_version) | |
647 | break; | |
648 | } | |
649 | ||
650 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
651 | ath10k_err("Unsupported hardware version: 0x%x\n", | |
652 | ar->target_version); | |
653 | return -EINVAL; | |
654 | } | |
655 | ||
656 | ar->hw_params = *hw_params; | |
657 | ||
c8c39afe KV |
658 | ath10k_dbg(ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
659 | ar->hw_params.name, ar->target_version); | |
5e3dd157 KV |
660 | |
661 | return 0; | |
662 | } | |
663 | ||
affd3217 MK |
664 | static void ath10k_core_restart(struct work_struct *work) |
665 | { | |
666 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
667 | ||
668 | mutex_lock(&ar->conf_mutex); | |
669 | ||
670 | switch (ar->state) { | |
671 | case ATH10K_STATE_ON: | |
672 | ath10k_halt(ar); | |
673 | ar->state = ATH10K_STATE_RESTARTING; | |
674 | ieee80211_restart_hw(ar->hw); | |
675 | break; | |
676 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
677 | /* this can happen if driver is being unloaded |
678 | * or if the crash happens during FW probing */ | |
affd3217 MK |
679 | ath10k_warn("cannot restart a device that hasn't been started\n"); |
680 | break; | |
681 | case ATH10K_STATE_RESTARTING: | |
682 | case ATH10K_STATE_RESTARTED: | |
683 | ar->state = ATH10K_STATE_WEDGED; | |
684 | /* fall through */ | |
685 | case ATH10K_STATE_WEDGED: | |
686 | ath10k_warn("device is wedged, will not restart\n"); | |
687 | break; | |
688 | } | |
689 | ||
690 | mutex_unlock(&ar->conf_mutex); | |
691 | } | |
692 | ||
5e3dd157 | 693 | struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev, |
5e3dd157 KV |
694 | const struct ath10k_hif_ops *hif_ops) |
695 | { | |
696 | struct ath10k *ar; | |
697 | ||
698 | ar = ath10k_mac_create(); | |
699 | if (!ar) | |
700 | return NULL; | |
701 | ||
702 | ar->ath_common.priv = ar; | |
703 | ar->ath_common.hw = ar->hw; | |
704 | ||
705 | ar->p2p = !!ath10k_p2p; | |
706 | ar->dev = dev; | |
707 | ||
708 | ar->hif.priv = hif_priv; | |
709 | ar->hif.ops = hif_ops; | |
5e3dd157 | 710 | |
5e3dd157 KV |
711 | init_completion(&ar->scan.started); |
712 | init_completion(&ar->scan.completed); | |
713 | init_completion(&ar->scan.on_channel); | |
9042e17d | 714 | init_completion(&ar->target_suspend); |
5e3dd157 KV |
715 | |
716 | init_completion(&ar->install_key_done); | |
717 | init_completion(&ar->vdev_setup_done); | |
718 | ||
719 | setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar); | |
720 | ||
721 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
722 | if (!ar->workqueue) | |
723 | goto err_wq; | |
724 | ||
725 | mutex_init(&ar->conf_mutex); | |
726 | spin_lock_init(&ar->data_lock); | |
727 | ||
728 | INIT_LIST_HEAD(&ar->peers); | |
729 | init_waitqueue_head(&ar->peer_mapping_wq); | |
730 | ||
731 | init_completion(&ar->offchan_tx_completed); | |
732 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
733 | skb_queue_head_init(&ar->offchan_tx_queue); | |
734 | ||
5e00d31a BM |
735 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); |
736 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
737 | ||
affd3217 MK |
738 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
739 | ||
5e3dd157 KV |
740 | return ar; |
741 | ||
742 | err_wq: | |
743 | ath10k_mac_destroy(ar); | |
744 | return NULL; | |
745 | } | |
746 | EXPORT_SYMBOL(ath10k_core_create); | |
747 | ||
748 | void ath10k_core_destroy(struct ath10k *ar) | |
749 | { | |
750 | flush_workqueue(ar->workqueue); | |
751 | destroy_workqueue(ar->workqueue); | |
752 | ||
753 | ath10k_mac_destroy(ar); | |
754 | } | |
755 | EXPORT_SYMBOL(ath10k_core_destroy); | |
756 | ||
dd30a36e | 757 | int ath10k_core_start(struct ath10k *ar) |
5e3dd157 | 758 | { |
5e3dd157 KV |
759 | int status; |
760 | ||
60631c5c KV |
761 | lockdep_assert_held(&ar->conf_mutex); |
762 | ||
64d151d4 MK |
763 | ath10k_bmi_start(ar); |
764 | ||
5e3dd157 KV |
765 | if (ath10k_init_configure_target(ar)) { |
766 | status = -EINVAL; | |
767 | goto err; | |
768 | } | |
769 | ||
770 | status = ath10k_init_download_firmware(ar); | |
771 | if (status) | |
772 | goto err; | |
773 | ||
774 | status = ath10k_init_uart(ar); | |
775 | if (status) | |
776 | goto err; | |
777 | ||
cd003fad MK |
778 | ar->htc.htc_ops.target_send_suspend_complete = |
779 | ath10k_send_suspend_complete; | |
5e3dd157 | 780 | |
cd003fad MK |
781 | status = ath10k_htc_init(ar); |
782 | if (status) { | |
783 | ath10k_err("could not init HTC (%d)\n", status); | |
5e3dd157 KV |
784 | goto err; |
785 | } | |
786 | ||
787 | status = ath10k_bmi_done(ar); | |
788 | if (status) | |
cd003fad | 789 | goto err; |
5e3dd157 KV |
790 | |
791 | status = ath10k_wmi_attach(ar); | |
792 | if (status) { | |
793 | ath10k_err("WMI attach failed: %d\n", status); | |
cd003fad | 794 | goto err; |
5e3dd157 KV |
795 | } |
796 | ||
67e3c63f MK |
797 | status = ath10k_hif_start(ar); |
798 | if (status) { | |
799 | ath10k_err("could not start HIF: %d\n", status); | |
5e3dd157 | 800 | goto err_wmi_detach; |
67e3c63f MK |
801 | } |
802 | ||
803 | status = ath10k_htc_wait_target(&ar->htc); | |
804 | if (status) { | |
805 | ath10k_err("failed to connect to HTC: %d\n", status); | |
806 | goto err_hif_stop; | |
807 | } | |
5e3dd157 | 808 | |
edb8236d MK |
809 | status = ath10k_htt_attach(ar); |
810 | if (status) { | |
811 | ath10k_err("could not attach htt (%d)\n", status); | |
67e3c63f | 812 | goto err_hif_stop; |
5e3dd157 KV |
813 | } |
814 | ||
815 | status = ath10k_init_connect_htc(ar); | |
816 | if (status) | |
817 | goto err_htt_detach; | |
818 | ||
c8c39afe KV |
819 | ath10k_dbg(ATH10K_DBG_BOOT, "firmware %s booted\n", |
820 | ar->hw->wiphy->fw_version); | |
5e3dd157 | 821 | |
5e3dd157 KV |
822 | status = ath10k_wmi_cmd_init(ar); |
823 | if (status) { | |
824 | ath10k_err("could not send WMI init command (%d)\n", status); | |
825 | goto err_disconnect_htc; | |
826 | } | |
827 | ||
828 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
829 | if (status <= 0) { | |
830 | ath10k_err("wmi unified ready event not received\n"); | |
831 | status = -ETIMEDOUT; | |
832 | goto err_disconnect_htc; | |
833 | } | |
834 | ||
edb8236d | 835 | status = ath10k_htt_attach_target(&ar->htt); |
5e3dd157 KV |
836 | if (status) |
837 | goto err_disconnect_htc; | |
838 | ||
db66ea04 KV |
839 | status = ath10k_debug_start(ar); |
840 | if (status) | |
841 | goto err_disconnect_htc; | |
842 | ||
1a1b8a88 | 843 | ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1; |
0579119f | 844 | INIT_LIST_HEAD(&ar->arvifs); |
1a1b8a88 | 845 | |
650b91fb KV |
846 | if (!test_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags)) |
847 | ath10k_info("%s (0x%x) fw %s api %d htt %d.%d\n", | |
848 | ar->hw_params.name, ar->target_version, | |
849 | ar->hw->wiphy->fw_version, ar->fw_api, | |
850 | ar->htt.target_version_major, | |
851 | ar->htt.target_version_minor); | |
852 | ||
853 | __set_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags); | |
c8c39afe | 854 | |
dd30a36e MK |
855 | return 0; |
856 | ||
857 | err_disconnect_htc: | |
858 | ath10k_htc_stop(&ar->htc); | |
859 | err_htt_detach: | |
860 | ath10k_htt_detach(&ar->htt); | |
67e3c63f MK |
861 | err_hif_stop: |
862 | ath10k_hif_stop(ar); | |
dd30a36e MK |
863 | err_wmi_detach: |
864 | ath10k_wmi_detach(ar); | |
865 | err: | |
866 | return status; | |
867 | } | |
818bdd16 | 868 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 869 | |
00f5482b MP |
870 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
871 | { | |
872 | int ret; | |
873 | ||
874 | reinit_completion(&ar->target_suspend); | |
875 | ||
876 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
877 | if (ret) { | |
878 | ath10k_warn("could not suspend target (%d)\n", ret); | |
879 | return ret; | |
880 | } | |
881 | ||
882 | ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); | |
883 | ||
884 | if (ret == 0) { | |
885 | ath10k_warn("suspend timed out - target pause event never came\n"); | |
886 | return -ETIMEDOUT; | |
887 | } | |
888 | ||
889 | return 0; | |
890 | } | |
891 | ||
dd30a36e MK |
892 | void ath10k_core_stop(struct ath10k *ar) |
893 | { | |
60631c5c KV |
894 | lockdep_assert_held(&ar->conf_mutex); |
895 | ||
00f5482b MP |
896 | /* try to suspend target */ |
897 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); | |
db66ea04 | 898 | ath10k_debug_stop(ar); |
dd30a36e MK |
899 | ath10k_htc_stop(&ar->htc); |
900 | ath10k_htt_detach(&ar->htt); | |
901 | ath10k_wmi_detach(ar); | |
902 | } | |
818bdd16 MK |
903 | EXPORT_SYMBOL(ath10k_core_stop); |
904 | ||
905 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
906 | * order to know what hw capabilities should be advertised to mac80211 it is | |
907 | * necessary to load the firmware (and tear it down immediately since start | |
908 | * hook will try to init it again) before registering */ | |
909 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
910 | { | |
29385057 MK |
911 | struct bmi_target_info target_info; |
912 | int ret = 0; | |
818bdd16 MK |
913 | |
914 | ret = ath10k_hif_power_up(ar); | |
915 | if (ret) { | |
916 | ath10k_err("could not start pci hif (%d)\n", ret); | |
917 | return ret; | |
918 | } | |
919 | ||
29385057 MK |
920 | memset(&target_info, 0, sizeof(target_info)); |
921 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
922 | if (ret) { | |
923 | ath10k_err("could not get target info (%d)\n", ret); | |
924 | ath10k_hif_power_down(ar); | |
925 | return ret; | |
926 | } | |
927 | ||
928 | ar->target_version = target_info.version; | |
929 | ar->hw->wiphy->hw_version = target_info.version; | |
930 | ||
931 | ret = ath10k_init_hw_params(ar); | |
932 | if (ret) { | |
933 | ath10k_err("could not get hw params (%d)\n", ret); | |
934 | ath10k_hif_power_down(ar); | |
935 | return ret; | |
936 | } | |
937 | ||
938 | ret = ath10k_core_fetch_firmware_files(ar); | |
939 | if (ret) { | |
940 | ath10k_err("could not fetch firmware files (%d)\n", ret); | |
941 | ath10k_hif_power_down(ar); | |
942 | return ret; | |
943 | } | |
944 | ||
60631c5c KV |
945 | mutex_lock(&ar->conf_mutex); |
946 | ||
818bdd16 MK |
947 | ret = ath10k_core_start(ar); |
948 | if (ret) { | |
949 | ath10k_err("could not init core (%d)\n", ret); | |
29385057 | 950 | ath10k_core_free_firmware_files(ar); |
818bdd16 | 951 | ath10k_hif_power_down(ar); |
60631c5c | 952 | mutex_unlock(&ar->conf_mutex); |
818bdd16 MK |
953 | return ret; |
954 | } | |
955 | ||
956 | ath10k_core_stop(ar); | |
60631c5c KV |
957 | |
958 | mutex_unlock(&ar->conf_mutex); | |
959 | ||
818bdd16 MK |
960 | ath10k_hif_power_down(ar); |
961 | return 0; | |
962 | } | |
dd30a36e | 963 | |
e01ae68c KV |
964 | static int ath10k_core_check_chip_id(struct ath10k *ar) |
965 | { | |
966 | u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV); | |
967 | ||
effea968 KV |
968 | ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n", |
969 | ar->chip_id, hw_revision); | |
970 | ||
e01ae68c KV |
971 | /* Check that we are not using hw1.0 (some of them have same pci id |
972 | * as hw2.0) before doing anything else as ath10k crashes horribly | |
973 | * due to missing hw1.0 workarounds. */ | |
974 | switch (hw_revision) { | |
975 | case QCA988X_HW_1_0_CHIP_ID_REV: | |
976 | ath10k_err("ERROR: qca988x hw1.0 is not supported\n"); | |
977 | return -EOPNOTSUPP; | |
978 | ||
979 | case QCA988X_HW_2_0_CHIP_ID_REV: | |
980 | /* known hardware revision, continue normally */ | |
981 | return 0; | |
982 | ||
983 | default: | |
984 | ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n", | |
985 | ar->chip_id); | |
986 | return 0; | |
987 | } | |
988 | ||
989 | return 0; | |
990 | } | |
991 | ||
992 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
dd30a36e MK |
993 | { |
994 | int status; | |
995 | ||
e01ae68c KV |
996 | ar->chip_id = chip_id; |
997 | ||
998 | status = ath10k_core_check_chip_id(ar); | |
999 | if (status) { | |
1000 | ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id); | |
1001 | return status; | |
1002 | } | |
1003 | ||
818bdd16 MK |
1004 | status = ath10k_core_probe_fw(ar); |
1005 | if (status) { | |
1006 | ath10k_err("could not probe fw (%d)\n", status); | |
1007 | return status; | |
1008 | } | |
dd30a36e | 1009 | |
5e3dd157 | 1010 | status = ath10k_mac_register(ar); |
818bdd16 MK |
1011 | if (status) { |
1012 | ath10k_err("could not register to mac80211 (%d)\n", status); | |
29385057 | 1013 | goto err_release_fw; |
818bdd16 | 1014 | } |
5e3dd157 KV |
1015 | |
1016 | status = ath10k_debug_create(ar); | |
1017 | if (status) { | |
1018 | ath10k_err("unable to initialize debugfs\n"); | |
1019 | goto err_unregister_mac; | |
1020 | } | |
1021 | ||
1022 | return 0; | |
1023 | ||
1024 | err_unregister_mac: | |
1025 | ath10k_mac_unregister(ar); | |
29385057 MK |
1026 | err_release_fw: |
1027 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
1028 | return status; |
1029 | } | |
1030 | EXPORT_SYMBOL(ath10k_core_register); | |
1031 | ||
1032 | void ath10k_core_unregister(struct ath10k *ar) | |
1033 | { | |
1034 | /* We must unregister from mac80211 before we stop HTC and HIF. | |
1035 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
1036 | * unhappy about callback failures. */ | |
1037 | ath10k_mac_unregister(ar); | |
db66ea04 | 1038 | |
29385057 | 1039 | ath10k_core_free_firmware_files(ar); |
6f1f56ea BG |
1040 | |
1041 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
1042 | } |
1043 | EXPORT_SYMBOL(ath10k_core_unregister); | |
1044 | ||
5e3dd157 KV |
1045 | MODULE_AUTHOR("Qualcomm Atheros"); |
1046 | MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); | |
1047 | MODULE_LICENSE("Dual BSD/GPL"); |