Commit | Line | Data |
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5e3dd157 KV |
1 | /* |
2 | * Copyright (c) 2005-2011 Atheros Communications Inc. | |
3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/firmware.h> | |
5aabff05 | 20 | #include <linux/of.h> |
5e3dd157 KV |
21 | |
22 | #include "core.h" | |
23 | #include "mac.h" | |
24 | #include "htc.h" | |
25 | #include "hif.h" | |
26 | #include "wmi.h" | |
27 | #include "bmi.h" | |
28 | #include "debug.h" | |
29 | #include "htt.h" | |
43d2a30f | 30 | #include "testmode.h" |
5e3dd157 KV |
31 | |
32 | unsigned int ath10k_debug_mask; | |
33 | static bool uart_print; | |
34 | static unsigned int ath10k_p2p; | |
8868b12c RM |
35 | static bool skip_otp; |
36 | ||
5e3dd157 KV |
37 | module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); |
38 | module_param(uart_print, bool, 0644); | |
39 | module_param_named(p2p, ath10k_p2p, uint, 0644); | |
8868b12c RM |
40 | module_param(skip_otp, bool, 0644); |
41 | ||
5e3dd157 KV |
42 | MODULE_PARM_DESC(debug_mask, "Debugging mask"); |
43 | MODULE_PARM_DESC(uart_print, "Uart target debugging"); | |
44 | MODULE_PARM_DESC(p2p, "Enable ath10k P2P support"); | |
8868b12c | 45 | MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); |
5e3dd157 KV |
46 | |
47 | static const struct ath10k_hw_params ath10k_hw_params_list[] = { | |
5e3dd157 KV |
48 | { |
49 | .id = QCA988X_HW_2_0_VERSION, | |
50 | .name = "qca988x hw2.0", | |
51 | .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, | |
52 | .fw = { | |
53 | .dir = QCA988X_HW_2_0_FW_DIR, | |
54 | .fw = QCA988X_HW_2_0_FW_FILE, | |
55 | .otp = QCA988X_HW_2_0_OTP_FILE, | |
56 | .board = QCA988X_HW_2_0_BOARD_DATA_FILE, | |
9764a2af MK |
57 | .board_size = QCA988X_BOARD_DATA_SZ, |
58 | .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, | |
5e3dd157 KV |
59 | }, |
60 | }, | |
61 | }; | |
62 | ||
63 | static void ath10k_send_suspend_complete(struct ath10k *ar) | |
64 | { | |
7aa7a72a | 65 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); |
5e3dd157 | 66 | |
9042e17d | 67 | complete(&ar->target_suspend); |
5e3dd157 KV |
68 | } |
69 | ||
5e3dd157 KV |
70 | static int ath10k_init_configure_target(struct ath10k *ar) |
71 | { | |
72 | u32 param_host; | |
73 | int ret; | |
74 | ||
75 | /* tell target which HTC version it is used*/ | |
76 | ret = ath10k_bmi_write32(ar, hi_app_host_interest, | |
77 | HTC_PROTOCOL_VERSION); | |
78 | if (ret) { | |
7aa7a72a | 79 | ath10k_err(ar, "settings HTC version failed\n"); |
5e3dd157 KV |
80 | return ret; |
81 | } | |
82 | ||
83 | /* set the firmware mode to STA/IBSS/AP */ | |
84 | ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); | |
85 | if (ret) { | |
7aa7a72a | 86 | ath10k_err(ar, "setting firmware mode (1/2) failed\n"); |
5e3dd157 KV |
87 | return ret; |
88 | } | |
89 | ||
90 | /* TODO following parameters need to be re-visited. */ | |
91 | /* num_device */ | |
92 | param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
93 | /* Firmware mode */ | |
94 | /* FIXME: Why FW_MODE_AP ??.*/ | |
95 | param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); | |
96 | /* mac_addr_method */ | |
97 | param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | |
98 | /* firmware_bridge */ | |
99 | param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
100 | /* fwsubmode */ | |
101 | param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); | |
102 | ||
103 | ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); | |
104 | if (ret) { | |
7aa7a72a | 105 | ath10k_err(ar, "setting firmware mode (2/2) failed\n"); |
5e3dd157 KV |
106 | return ret; |
107 | } | |
108 | ||
109 | /* We do all byte-swapping on the host */ | |
110 | ret = ath10k_bmi_write32(ar, hi_be, 0); | |
111 | if (ret) { | |
7aa7a72a | 112 | ath10k_err(ar, "setting host CPU BE mode failed\n"); |
5e3dd157 KV |
113 | return ret; |
114 | } | |
115 | ||
116 | /* FW descriptor/Data swap flags */ | |
117 | ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); | |
118 | ||
119 | if (ret) { | |
7aa7a72a | 120 | ath10k_err(ar, "setting FW data/desc swap flags failed\n"); |
5e3dd157 KV |
121 | return ret; |
122 | } | |
123 | ||
124 | return 0; | |
125 | } | |
126 | ||
127 | static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, | |
128 | const char *dir, | |
129 | const char *file) | |
130 | { | |
131 | char filename[100]; | |
132 | const struct firmware *fw; | |
133 | int ret; | |
134 | ||
135 | if (file == NULL) | |
136 | return ERR_PTR(-ENOENT); | |
137 | ||
138 | if (dir == NULL) | |
139 | dir = "."; | |
140 | ||
141 | snprintf(filename, sizeof(filename), "%s/%s", dir, file); | |
142 | ret = request_firmware(&fw, filename, ar->dev); | |
143 | if (ret) | |
144 | return ERR_PTR(ret); | |
145 | ||
146 | return fw; | |
147 | } | |
148 | ||
a58227ef KV |
149 | static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, |
150 | size_t data_len) | |
5e3dd157 | 151 | { |
9764a2af MK |
152 | u32 board_data_size = ar->hw_params.fw.board_size; |
153 | u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; | |
5e3dd157 KV |
154 | u32 board_ext_data_addr; |
155 | int ret; | |
156 | ||
157 | ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); | |
158 | if (ret) { | |
7aa7a72a MK |
159 | ath10k_err(ar, "could not read board ext data addr (%d)\n", |
160 | ret); | |
5e3dd157 KV |
161 | return ret; |
162 | } | |
163 | ||
7aa7a72a | 164 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
effea968 | 165 | "boot push board extended data addr 0x%x\n", |
5e3dd157 KV |
166 | board_ext_data_addr); |
167 | ||
168 | if (board_ext_data_addr == 0) | |
169 | return 0; | |
170 | ||
a58227ef | 171 | if (data_len != (board_data_size + board_ext_data_size)) { |
7aa7a72a | 172 | ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", |
a58227ef | 173 | data_len, board_data_size, board_ext_data_size); |
5e3dd157 KV |
174 | return -EINVAL; |
175 | } | |
176 | ||
177 | ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, | |
a58227ef | 178 | data + board_data_size, |
5e3dd157 KV |
179 | board_ext_data_size); |
180 | if (ret) { | |
7aa7a72a | 181 | ath10k_err(ar, "could not write board ext data (%d)\n", ret); |
5e3dd157 KV |
182 | return ret; |
183 | } | |
184 | ||
185 | ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, | |
186 | (board_ext_data_size << 16) | 1); | |
187 | if (ret) { | |
7aa7a72a MK |
188 | ath10k_err(ar, "could not write board ext data bit (%d)\n", |
189 | ret); | |
5e3dd157 KV |
190 | return ret; |
191 | } | |
192 | ||
193 | return 0; | |
194 | } | |
195 | ||
a58227ef KV |
196 | static int ath10k_download_board_data(struct ath10k *ar, const void *data, |
197 | size_t data_len) | |
5e3dd157 | 198 | { |
9764a2af | 199 | u32 board_data_size = ar->hw_params.fw.board_size; |
5e3dd157 | 200 | u32 address; |
5e3dd157 KV |
201 | int ret; |
202 | ||
a58227ef | 203 | ret = ath10k_push_board_ext_data(ar, data, data_len); |
5e3dd157 | 204 | if (ret) { |
7aa7a72a | 205 | ath10k_err(ar, "could not push board ext data (%d)\n", ret); |
5e3dd157 KV |
206 | goto exit; |
207 | } | |
208 | ||
209 | ret = ath10k_bmi_read32(ar, hi_board_data, &address); | |
210 | if (ret) { | |
7aa7a72a | 211 | ath10k_err(ar, "could not read board data addr (%d)\n", ret); |
5e3dd157 KV |
212 | goto exit; |
213 | } | |
214 | ||
a58227ef | 215 | ret = ath10k_bmi_write_memory(ar, address, data, |
958df3a0 | 216 | min_t(u32, board_data_size, |
a58227ef | 217 | data_len)); |
5e3dd157 | 218 | if (ret) { |
7aa7a72a | 219 | ath10k_err(ar, "could not write board data (%d)\n", ret); |
5e3dd157 KV |
220 | goto exit; |
221 | } | |
222 | ||
223 | ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); | |
224 | if (ret) { | |
7aa7a72a | 225 | ath10k_err(ar, "could not write board data bit (%d)\n", ret); |
5e3dd157 KV |
226 | goto exit; |
227 | } | |
228 | ||
229 | exit: | |
5e3dd157 KV |
230 | return ret; |
231 | } | |
232 | ||
a58227ef KV |
233 | static int ath10k_download_cal_file(struct ath10k *ar) |
234 | { | |
235 | int ret; | |
236 | ||
237 | if (!ar->cal_file) | |
238 | return -ENOENT; | |
239 | ||
240 | if (IS_ERR(ar->cal_file)) | |
241 | return PTR_ERR(ar->cal_file); | |
242 | ||
243 | ret = ath10k_download_board_data(ar, ar->cal_file->data, | |
244 | ar->cal_file->size); | |
245 | if (ret) { | |
246 | ath10k_err(ar, "failed to download cal_file data: %d\n", ret); | |
247 | return ret; | |
248 | } | |
249 | ||
250 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); | |
251 | ||
252 | return 0; | |
253 | } | |
254 | ||
5aabff05 TK |
255 | static int ath10k_download_cal_dt(struct ath10k *ar) |
256 | { | |
257 | struct device_node *node; | |
258 | int data_len; | |
259 | void *data; | |
260 | int ret; | |
261 | ||
262 | node = ar->dev->of_node; | |
263 | if (!node) | |
264 | /* Device Tree is optional, don't print any warnings if | |
265 | * there's no node for ath10k. | |
266 | */ | |
267 | return -ENOENT; | |
268 | ||
269 | if (!of_get_property(node, "qcom,ath10k-calibration-data", | |
270 | &data_len)) { | |
271 | /* The calibration data node is optional */ | |
272 | return -ENOENT; | |
273 | } | |
274 | ||
275 | if (data_len != QCA988X_CAL_DATA_LEN) { | |
276 | ath10k_warn(ar, "invalid calibration data length in DT: %d\n", | |
277 | data_len); | |
278 | ret = -EMSGSIZE; | |
279 | goto out; | |
280 | } | |
281 | ||
282 | data = kmalloc(data_len, GFP_KERNEL); | |
283 | if (!data) { | |
284 | ret = -ENOMEM; | |
285 | goto out; | |
286 | } | |
287 | ||
288 | ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data", | |
289 | data, data_len); | |
290 | if (ret) { | |
291 | ath10k_warn(ar, "failed to read calibration data from DT: %d\n", | |
292 | ret); | |
293 | goto out_free; | |
294 | } | |
295 | ||
296 | ret = ath10k_download_board_data(ar, data, data_len); | |
297 | if (ret) { | |
298 | ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", | |
299 | ret); | |
300 | goto out_free; | |
301 | } | |
302 | ||
303 | ret = 0; | |
304 | ||
305 | out_free: | |
306 | kfree(data); | |
307 | ||
308 | out: | |
309 | return ret; | |
310 | } | |
311 | ||
5e3dd157 KV |
312 | static int ath10k_download_and_run_otp(struct ath10k *ar) |
313 | { | |
d6d4a58d | 314 | u32 result, address = ar->hw_params.patch_load_addr; |
5e3dd157 KV |
315 | int ret; |
316 | ||
a58227ef | 317 | ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len); |
83091559 KV |
318 | if (ret) { |
319 | ath10k_err(ar, "failed to download board data: %d\n", ret); | |
320 | return ret; | |
321 | } | |
322 | ||
5e3dd157 KV |
323 | /* OTP is optional */ |
324 | ||
7f06ea1e | 325 | if (!ar->otp_data || !ar->otp_len) { |
7aa7a72a | 326 | ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", |
36a8f413 | 327 | ar->otp_data, ar->otp_len); |
5e3dd157 | 328 | return 0; |
7f06ea1e KV |
329 | } |
330 | ||
7aa7a72a | 331 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", |
7f06ea1e | 332 | address, ar->otp_len); |
5e3dd157 | 333 | |
958df3a0 | 334 | ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); |
5e3dd157 | 335 | if (ret) { |
7aa7a72a | 336 | ath10k_err(ar, "could not write otp (%d)\n", ret); |
7f06ea1e | 337 | return ret; |
5e3dd157 KV |
338 | } |
339 | ||
d6d4a58d | 340 | ret = ath10k_bmi_execute(ar, address, 0, &result); |
5e3dd157 | 341 | if (ret) { |
7aa7a72a | 342 | ath10k_err(ar, "could not execute otp (%d)\n", ret); |
7f06ea1e | 343 | return ret; |
5e3dd157 KV |
344 | } |
345 | ||
7aa7a72a | 346 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); |
7f06ea1e | 347 | |
8868b12c | 348 | if (!skip_otp && result != 0) { |
7aa7a72a | 349 | ath10k_err(ar, "otp calibration failed: %d", result); |
7f06ea1e KV |
350 | return -EINVAL; |
351 | } | |
352 | ||
353 | return 0; | |
5e3dd157 KV |
354 | } |
355 | ||
43d2a30f | 356 | static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 357 | { |
43d2a30f KV |
358 | u32 address, data_len; |
359 | const char *mode_name; | |
360 | const void *data; | |
5e3dd157 KV |
361 | int ret; |
362 | ||
5e3dd157 KV |
363 | address = ar->hw_params.patch_load_addr; |
364 | ||
43d2a30f KV |
365 | switch (mode) { |
366 | case ATH10K_FIRMWARE_MODE_NORMAL: | |
367 | data = ar->firmware_data; | |
368 | data_len = ar->firmware_len; | |
369 | mode_name = "normal"; | |
370 | break; | |
371 | case ATH10K_FIRMWARE_MODE_UTF: | |
372 | data = ar->testmode.utf->data; | |
373 | data_len = ar->testmode.utf->size; | |
374 | mode_name = "utf"; | |
375 | break; | |
376 | default: | |
377 | ath10k_err(ar, "unknown firmware mode: %d\n", mode); | |
378 | return -EINVAL; | |
379 | } | |
380 | ||
381 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
382 | "boot uploading firmware image %p len %d mode %s\n", | |
383 | data, data_len, mode_name); | |
384 | ||
385 | ret = ath10k_bmi_fast_download(ar, address, data, data_len); | |
5e3dd157 | 386 | if (ret) { |
43d2a30f KV |
387 | ath10k_err(ar, "failed to download %s firmware: %d\n", |
388 | mode_name, ret); | |
389 | return ret; | |
5e3dd157 KV |
390 | } |
391 | ||
29385057 MK |
392 | return ret; |
393 | } | |
394 | ||
395 | static void ath10k_core_free_firmware_files(struct ath10k *ar) | |
396 | { | |
36527916 KV |
397 | if (ar->board && !IS_ERR(ar->board)) |
398 | release_firmware(ar->board); | |
29385057 MK |
399 | |
400 | if (ar->otp && !IS_ERR(ar->otp)) | |
401 | release_firmware(ar->otp); | |
402 | ||
403 | if (ar->firmware && !IS_ERR(ar->firmware)) | |
404 | release_firmware(ar->firmware); | |
405 | ||
a58227ef KV |
406 | if (ar->cal_file && !IS_ERR(ar->cal_file)) |
407 | release_firmware(ar->cal_file); | |
408 | ||
36527916 | 409 | ar->board = NULL; |
958df3a0 KV |
410 | ar->board_data = NULL; |
411 | ar->board_len = 0; | |
412 | ||
29385057 | 413 | ar->otp = NULL; |
958df3a0 KV |
414 | ar->otp_data = NULL; |
415 | ar->otp_len = 0; | |
416 | ||
29385057 | 417 | ar->firmware = NULL; |
958df3a0 KV |
418 | ar->firmware_data = NULL; |
419 | ar->firmware_len = 0; | |
a58227ef KV |
420 | |
421 | ar->cal_file = NULL; | |
422 | } | |
423 | ||
424 | static int ath10k_fetch_cal_file(struct ath10k *ar) | |
425 | { | |
426 | char filename[100]; | |
427 | ||
428 | /* cal-<bus>-<id>.bin */ | |
429 | scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", | |
430 | ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); | |
431 | ||
432 | ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); | |
433 | if (IS_ERR(ar->cal_file)) | |
434 | /* calibration file is optional, don't print any warnings */ | |
435 | return PTR_ERR(ar->cal_file); | |
436 | ||
437 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", | |
438 | ATH10K_FW_DIR, filename); | |
439 | ||
440 | return 0; | |
29385057 MK |
441 | } |
442 | ||
1a222435 | 443 | static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) |
29385057 MK |
444 | { |
445 | int ret = 0; | |
446 | ||
447 | if (ar->hw_params.fw.fw == NULL) { | |
7aa7a72a | 448 | ath10k_err(ar, "firmware file not defined\n"); |
29385057 MK |
449 | return -EINVAL; |
450 | } | |
451 | ||
452 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 453 | ath10k_err(ar, "board data file not defined"); |
29385057 MK |
454 | return -EINVAL; |
455 | } | |
456 | ||
36527916 KV |
457 | ar->board = ath10k_fetch_fw_file(ar, |
458 | ar->hw_params.fw.dir, | |
459 | ar->hw_params.fw.board); | |
460 | if (IS_ERR(ar->board)) { | |
461 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 462 | ath10k_err(ar, "could not fetch board data (%d)\n", ret); |
29385057 MK |
463 | goto err; |
464 | } | |
465 | ||
958df3a0 KV |
466 | ar->board_data = ar->board->data; |
467 | ar->board_len = ar->board->size; | |
468 | ||
29385057 MK |
469 | ar->firmware = ath10k_fetch_fw_file(ar, |
470 | ar->hw_params.fw.dir, | |
471 | ar->hw_params.fw.fw); | |
472 | if (IS_ERR(ar->firmware)) { | |
473 | ret = PTR_ERR(ar->firmware); | |
7aa7a72a | 474 | ath10k_err(ar, "could not fetch firmware (%d)\n", ret); |
29385057 MK |
475 | goto err; |
476 | } | |
477 | ||
958df3a0 KV |
478 | ar->firmware_data = ar->firmware->data; |
479 | ar->firmware_len = ar->firmware->size; | |
480 | ||
29385057 MK |
481 | /* OTP may be undefined. If so, don't fetch it at all */ |
482 | if (ar->hw_params.fw.otp == NULL) | |
483 | return 0; | |
484 | ||
485 | ar->otp = ath10k_fetch_fw_file(ar, | |
486 | ar->hw_params.fw.dir, | |
487 | ar->hw_params.fw.otp); | |
488 | if (IS_ERR(ar->otp)) { | |
489 | ret = PTR_ERR(ar->otp); | |
7aa7a72a | 490 | ath10k_err(ar, "could not fetch otp (%d)\n", ret); |
29385057 MK |
491 | goto err; |
492 | } | |
493 | ||
958df3a0 KV |
494 | ar->otp_data = ar->otp->data; |
495 | ar->otp_len = ar->otp->size; | |
496 | ||
29385057 MK |
497 | return 0; |
498 | ||
499 | err: | |
500 | ath10k_core_free_firmware_files(ar); | |
5e3dd157 KV |
501 | return ret; |
502 | } | |
503 | ||
1a222435 KV |
504 | static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) |
505 | { | |
506 | size_t magic_len, len, ie_len; | |
507 | int ie_id, i, index, bit, ret; | |
508 | struct ath10k_fw_ie *hdr; | |
509 | const u8 *data; | |
510 | __le32 *timestamp; | |
511 | ||
512 | /* first fetch the firmware file (firmware-*.bin) */ | |
513 | ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); | |
514 | if (IS_ERR(ar->firmware)) { | |
7aa7a72a | 515 | ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", |
53c02284 | 516 | ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); |
1a222435 KV |
517 | return PTR_ERR(ar->firmware); |
518 | } | |
519 | ||
520 | data = ar->firmware->data; | |
521 | len = ar->firmware->size; | |
522 | ||
523 | /* magic also includes the null byte, check that as well */ | |
524 | magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; | |
525 | ||
526 | if (len < magic_len) { | |
7aa7a72a | 527 | ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", |
53c02284 | 528 | ar->hw_params.fw.dir, name, len); |
9bab1cc0 MK |
529 | ret = -EINVAL; |
530 | goto err; | |
1a222435 KV |
531 | } |
532 | ||
533 | if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { | |
7aa7a72a | 534 | ath10k_err(ar, "invalid firmware magic\n"); |
9bab1cc0 MK |
535 | ret = -EINVAL; |
536 | goto err; | |
1a222435 KV |
537 | } |
538 | ||
539 | /* jump over the padding */ | |
540 | magic_len = ALIGN(magic_len, 4); | |
541 | ||
542 | len -= magic_len; | |
543 | data += magic_len; | |
544 | ||
545 | /* loop elements */ | |
546 | while (len > sizeof(struct ath10k_fw_ie)) { | |
547 | hdr = (struct ath10k_fw_ie *)data; | |
548 | ||
549 | ie_id = le32_to_cpu(hdr->id); | |
550 | ie_len = le32_to_cpu(hdr->len); | |
551 | ||
552 | len -= sizeof(*hdr); | |
553 | data += sizeof(*hdr); | |
554 | ||
555 | if (len < ie_len) { | |
7aa7a72a | 556 | ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", |
1a222435 | 557 | ie_id, len, ie_len); |
9bab1cc0 MK |
558 | ret = -EINVAL; |
559 | goto err; | |
1a222435 KV |
560 | } |
561 | ||
562 | switch (ie_id) { | |
563 | case ATH10K_FW_IE_FW_VERSION: | |
564 | if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) | |
565 | break; | |
566 | ||
567 | memcpy(ar->hw->wiphy->fw_version, data, ie_len); | |
568 | ar->hw->wiphy->fw_version[ie_len] = '\0'; | |
569 | ||
7aa7a72a | 570 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
571 | "found fw version %s\n", |
572 | ar->hw->wiphy->fw_version); | |
573 | break; | |
574 | case ATH10K_FW_IE_TIMESTAMP: | |
575 | if (ie_len != sizeof(u32)) | |
576 | break; | |
577 | ||
578 | timestamp = (__le32 *)data; | |
579 | ||
7aa7a72a | 580 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", |
1a222435 KV |
581 | le32_to_cpup(timestamp)); |
582 | break; | |
583 | case ATH10K_FW_IE_FEATURES: | |
7aa7a72a | 584 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
585 | "found firmware features ie (%zd B)\n", |
586 | ie_len); | |
587 | ||
588 | for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { | |
589 | index = i / 8; | |
590 | bit = i % 8; | |
591 | ||
592 | if (index == ie_len) | |
593 | break; | |
594 | ||
f591a1a5 | 595 | if (data[index] & (1 << bit)) { |
7aa7a72a | 596 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
f591a1a5 BG |
597 | "Enabling feature bit: %i\n", |
598 | i); | |
1a222435 | 599 | __set_bit(i, ar->fw_features); |
f591a1a5 | 600 | } |
1a222435 KV |
601 | } |
602 | ||
7aa7a72a | 603 | ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", |
1a222435 KV |
604 | ar->fw_features, |
605 | sizeof(ar->fw_features)); | |
606 | break; | |
607 | case ATH10K_FW_IE_FW_IMAGE: | |
7aa7a72a | 608 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
609 | "found fw image ie (%zd B)\n", |
610 | ie_len); | |
611 | ||
612 | ar->firmware_data = data; | |
613 | ar->firmware_len = ie_len; | |
614 | ||
615 | break; | |
616 | case ATH10K_FW_IE_OTP_IMAGE: | |
7aa7a72a | 617 | ath10k_dbg(ar, ATH10K_DBG_BOOT, |
1a222435 KV |
618 | "found otp image ie (%zd B)\n", |
619 | ie_len); | |
620 | ||
621 | ar->otp_data = data; | |
622 | ar->otp_len = ie_len; | |
623 | ||
624 | break; | |
625 | default: | |
7aa7a72a | 626 | ath10k_warn(ar, "Unknown FW IE: %u\n", |
1a222435 KV |
627 | le32_to_cpu(hdr->id)); |
628 | break; | |
629 | } | |
630 | ||
631 | /* jump over the padding */ | |
632 | ie_len = ALIGN(ie_len, 4); | |
633 | ||
634 | len -= ie_len; | |
635 | data += ie_len; | |
e05634ee | 636 | } |
1a222435 KV |
637 | |
638 | if (!ar->firmware_data || !ar->firmware_len) { | |
7aa7a72a | 639 | ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", |
53c02284 | 640 | ar->hw_params.fw.dir, name); |
1a222435 KV |
641 | ret = -ENOMEDIUM; |
642 | goto err; | |
643 | } | |
644 | ||
24c88f78 MK |
645 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) && |
646 | !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
7aa7a72a | 647 | ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); |
24c88f78 MK |
648 | ret = -EINVAL; |
649 | goto err; | |
650 | } | |
651 | ||
1a222435 KV |
652 | /* now fetch the board file */ |
653 | if (ar->hw_params.fw.board == NULL) { | |
7aa7a72a | 654 | ath10k_err(ar, "board data file not defined"); |
1a222435 KV |
655 | ret = -EINVAL; |
656 | goto err; | |
657 | } | |
658 | ||
659 | ar->board = ath10k_fetch_fw_file(ar, | |
660 | ar->hw_params.fw.dir, | |
661 | ar->hw_params.fw.board); | |
662 | if (IS_ERR(ar->board)) { | |
663 | ret = PTR_ERR(ar->board); | |
7aa7a72a | 664 | ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n", |
53c02284 BG |
665 | ar->hw_params.fw.dir, ar->hw_params.fw.board, |
666 | ret); | |
1a222435 KV |
667 | goto err; |
668 | } | |
669 | ||
670 | ar->board_data = ar->board->data; | |
671 | ar->board_len = ar->board->size; | |
672 | ||
673 | return 0; | |
674 | ||
675 | err: | |
676 | ath10k_core_free_firmware_files(ar); | |
677 | return ret; | |
678 | } | |
679 | ||
680 | static int ath10k_core_fetch_firmware_files(struct ath10k *ar) | |
681 | { | |
682 | int ret; | |
683 | ||
a58227ef KV |
684 | /* calibration file is optional, don't check for any errors */ |
685 | ath10k_fetch_cal_file(ar); | |
686 | ||
24c88f78 | 687 | ar->fw_api = 3; |
7aa7a72a | 688 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
24c88f78 MK |
689 | |
690 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE); | |
691 | if (ret == 0) | |
692 | goto success; | |
693 | ||
53c02284 | 694 | ar->fw_api = 2; |
7aa7a72a | 695 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
53c02284 | 696 | |
1a222435 | 697 | ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); |
53c02284 BG |
698 | if (ret == 0) |
699 | goto success; | |
700 | ||
701 | ar->fw_api = 1; | |
7aa7a72a | 702 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); |
1a222435 KV |
703 | |
704 | ret = ath10k_core_fetch_firmware_api_1(ar); | |
705 | if (ret) | |
706 | return ret; | |
707 | ||
53c02284 | 708 | success: |
7aa7a72a | 709 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); |
1a222435 KV |
710 | |
711 | return 0; | |
712 | } | |
713 | ||
83091559 | 714 | static int ath10k_download_cal_data(struct ath10k *ar) |
5e3dd157 KV |
715 | { |
716 | int ret; | |
717 | ||
a58227ef KV |
718 | ret = ath10k_download_cal_file(ar); |
719 | if (ret == 0) { | |
720 | ar->cal_mode = ATH10K_CAL_MODE_FILE; | |
721 | goto done; | |
722 | } | |
723 | ||
724 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
5aabff05 TK |
725 | "boot did not find a calibration file, try DT next: %d\n", |
726 | ret); | |
727 | ||
728 | ret = ath10k_download_cal_dt(ar); | |
729 | if (ret == 0) { | |
730 | ar->cal_mode = ATH10K_CAL_MODE_DT; | |
731 | goto done; | |
732 | } | |
733 | ||
734 | ath10k_dbg(ar, ATH10K_DBG_BOOT, | |
735 | "boot did not find DT entry, try OTP next: %d\n", | |
a58227ef KV |
736 | ret); |
737 | ||
5e3dd157 | 738 | ret = ath10k_download_and_run_otp(ar); |
36a8f413 | 739 | if (ret) { |
7aa7a72a | 740 | ath10k_err(ar, "failed to run otp: %d\n", ret); |
5e3dd157 | 741 | return ret; |
36a8f413 | 742 | } |
5e3dd157 | 743 | |
a58227ef KV |
744 | ar->cal_mode = ATH10K_CAL_MODE_OTP; |
745 | ||
746 | done: | |
747 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", | |
748 | ath10k_cal_mode_str(ar->cal_mode)); | |
749 | return 0; | |
5e3dd157 KV |
750 | } |
751 | ||
752 | static int ath10k_init_uart(struct ath10k *ar) | |
753 | { | |
754 | int ret; | |
755 | ||
756 | /* | |
757 | * Explicitly setting UART prints to zero as target turns it on | |
758 | * based on scratch registers. | |
759 | */ | |
760 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); | |
761 | if (ret) { | |
7aa7a72a | 762 | ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); |
5e3dd157 KV |
763 | return ret; |
764 | } | |
765 | ||
c8c39afe | 766 | if (!uart_print) |
5e3dd157 | 767 | return 0; |
5e3dd157 KV |
768 | |
769 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7); | |
770 | if (ret) { | |
7aa7a72a | 771 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
772 | return ret; |
773 | } | |
774 | ||
775 | ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); | |
776 | if (ret) { | |
7aa7a72a | 777 | ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); |
5e3dd157 KV |
778 | return ret; |
779 | } | |
780 | ||
03fc137b BM |
781 | /* Set the UART baud rate to 19200. */ |
782 | ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); | |
783 | if (ret) { | |
7aa7a72a | 784 | ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); |
03fc137b BM |
785 | return ret; |
786 | } | |
787 | ||
7aa7a72a | 788 | ath10k_info(ar, "UART prints enabled\n"); |
5e3dd157 KV |
789 | return 0; |
790 | } | |
791 | ||
792 | static int ath10k_init_hw_params(struct ath10k *ar) | |
793 | { | |
794 | const struct ath10k_hw_params *uninitialized_var(hw_params); | |
795 | int i; | |
796 | ||
797 | for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { | |
798 | hw_params = &ath10k_hw_params_list[i]; | |
799 | ||
800 | if (hw_params->id == ar->target_version) | |
801 | break; | |
802 | } | |
803 | ||
804 | if (i == ARRAY_SIZE(ath10k_hw_params_list)) { | |
7aa7a72a | 805 | ath10k_err(ar, "Unsupported hardware version: 0x%x\n", |
5e3dd157 KV |
806 | ar->target_version); |
807 | return -EINVAL; | |
808 | } | |
809 | ||
810 | ar->hw_params = *hw_params; | |
811 | ||
7aa7a72a | 812 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", |
c8c39afe | 813 | ar->hw_params.name, ar->target_version); |
5e3dd157 KV |
814 | |
815 | return 0; | |
816 | } | |
817 | ||
affd3217 MK |
818 | static void ath10k_core_restart(struct work_struct *work) |
819 | { | |
820 | struct ath10k *ar = container_of(work, struct ath10k, restart_work); | |
821 | ||
7962b0d8 MK |
822 | set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
823 | ||
824 | /* Place a barrier to make sure the compiler doesn't reorder | |
825 | * CRASH_FLUSH and calling other functions. | |
826 | */ | |
827 | barrier(); | |
828 | ||
829 | ieee80211_stop_queues(ar->hw); | |
830 | ath10k_drain_tx(ar); | |
831 | complete_all(&ar->scan.started); | |
832 | complete_all(&ar->scan.completed); | |
833 | complete_all(&ar->scan.on_channel); | |
834 | complete_all(&ar->offchan_tx_completed); | |
835 | complete_all(&ar->install_key_done); | |
836 | complete_all(&ar->vdev_setup_done); | |
837 | wake_up(&ar->htt.empty_tx_wq); | |
838 | wake_up(&ar->wmi.tx_credits_wq); | |
839 | wake_up(&ar->peer_mapping_wq); | |
840 | ||
affd3217 MK |
841 | mutex_lock(&ar->conf_mutex); |
842 | ||
843 | switch (ar->state) { | |
844 | case ATH10K_STATE_ON: | |
affd3217 | 845 | ar->state = ATH10K_STATE_RESTARTING; |
61e9aab7 | 846 | ath10k_hif_stop(ar); |
5c81c7fd | 847 | ath10k_scan_finish(ar); |
affd3217 MK |
848 | ieee80211_restart_hw(ar->hw); |
849 | break; | |
850 | case ATH10K_STATE_OFF: | |
5e90de86 MK |
851 | /* this can happen if driver is being unloaded |
852 | * or if the crash happens during FW probing */ | |
7aa7a72a | 853 | ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); |
affd3217 MK |
854 | break; |
855 | case ATH10K_STATE_RESTARTING: | |
c5058f5b MK |
856 | /* hw restart might be requested from multiple places */ |
857 | break; | |
affd3217 MK |
858 | case ATH10K_STATE_RESTARTED: |
859 | ar->state = ATH10K_STATE_WEDGED; | |
860 | /* fall through */ | |
861 | case ATH10K_STATE_WEDGED: | |
7aa7a72a | 862 | ath10k_warn(ar, "device is wedged, will not restart\n"); |
affd3217 | 863 | break; |
43d2a30f KV |
864 | case ATH10K_STATE_UTF: |
865 | ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); | |
866 | break; | |
affd3217 MK |
867 | } |
868 | ||
869 | mutex_unlock(&ar->conf_mutex); | |
870 | } | |
871 | ||
cfd1061e MK |
872 | static void ath10k_core_init_max_sta_count(struct ath10k *ar) |
873 | { | |
874 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | |
875 | ar->max_num_peers = TARGET_10X_NUM_PEERS; | |
876 | ar->max_num_stations = TARGET_10X_NUM_STATIONS; | |
877 | } else { | |
878 | ar->max_num_peers = TARGET_NUM_PEERS; | |
879 | ar->max_num_stations = TARGET_NUM_STATIONS; | |
880 | } | |
881 | } | |
882 | ||
43d2a30f | 883 | int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) |
5e3dd157 | 884 | { |
5e3dd157 KV |
885 | int status; |
886 | ||
60631c5c KV |
887 | lockdep_assert_held(&ar->conf_mutex); |
888 | ||
7962b0d8 MK |
889 | clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); |
890 | ||
64d151d4 MK |
891 | ath10k_bmi_start(ar); |
892 | ||
5e3dd157 KV |
893 | if (ath10k_init_configure_target(ar)) { |
894 | status = -EINVAL; | |
895 | goto err; | |
896 | } | |
897 | ||
83091559 KV |
898 | status = ath10k_download_cal_data(ar); |
899 | if (status) | |
900 | goto err; | |
901 | ||
902 | status = ath10k_download_fw(ar, mode); | |
5e3dd157 KV |
903 | if (status) |
904 | goto err; | |
905 | ||
906 | status = ath10k_init_uart(ar); | |
907 | if (status) | |
908 | goto err; | |
909 | ||
cd003fad MK |
910 | ar->htc.htc_ops.target_send_suspend_complete = |
911 | ath10k_send_suspend_complete; | |
5e3dd157 | 912 | |
cd003fad MK |
913 | status = ath10k_htc_init(ar); |
914 | if (status) { | |
7aa7a72a | 915 | ath10k_err(ar, "could not init HTC (%d)\n", status); |
5e3dd157 KV |
916 | goto err; |
917 | } | |
918 | ||
919 | status = ath10k_bmi_done(ar); | |
920 | if (status) | |
cd003fad | 921 | goto err; |
5e3dd157 KV |
922 | |
923 | status = ath10k_wmi_attach(ar); | |
924 | if (status) { | |
7aa7a72a | 925 | ath10k_err(ar, "WMI attach failed: %d\n", status); |
cd003fad | 926 | goto err; |
5e3dd157 KV |
927 | } |
928 | ||
95bf21f9 MK |
929 | status = ath10k_htt_init(ar); |
930 | if (status) { | |
7aa7a72a | 931 | ath10k_err(ar, "failed to init htt: %d\n", status); |
95bf21f9 MK |
932 | goto err_wmi_detach; |
933 | } | |
934 | ||
935 | status = ath10k_htt_tx_alloc(&ar->htt); | |
936 | if (status) { | |
7aa7a72a | 937 | ath10k_err(ar, "failed to alloc htt tx: %d\n", status); |
95bf21f9 MK |
938 | goto err_wmi_detach; |
939 | } | |
940 | ||
941 | status = ath10k_htt_rx_alloc(&ar->htt); | |
942 | if (status) { | |
7aa7a72a | 943 | ath10k_err(ar, "failed to alloc htt rx: %d\n", status); |
95bf21f9 MK |
944 | goto err_htt_tx_detach; |
945 | } | |
946 | ||
67e3c63f MK |
947 | status = ath10k_hif_start(ar); |
948 | if (status) { | |
7aa7a72a | 949 | ath10k_err(ar, "could not start HIF: %d\n", status); |
95bf21f9 | 950 | goto err_htt_rx_detach; |
67e3c63f MK |
951 | } |
952 | ||
953 | status = ath10k_htc_wait_target(&ar->htc); | |
954 | if (status) { | |
7aa7a72a | 955 | ath10k_err(ar, "failed to connect to HTC: %d\n", status); |
67e3c63f MK |
956 | goto err_hif_stop; |
957 | } | |
5e3dd157 | 958 | |
43d2a30f KV |
959 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
960 | status = ath10k_htt_connect(&ar->htt); | |
961 | if (status) { | |
962 | ath10k_err(ar, "failed to connect htt (%d)\n", status); | |
963 | goto err_hif_stop; | |
964 | } | |
5e3dd157 KV |
965 | } |
966 | ||
95bf21f9 MK |
967 | status = ath10k_wmi_connect(ar); |
968 | if (status) { | |
7aa7a72a | 969 | ath10k_err(ar, "could not connect wmi: %d\n", status); |
95bf21f9 MK |
970 | goto err_hif_stop; |
971 | } | |
972 | ||
973 | status = ath10k_htc_start(&ar->htc); | |
974 | if (status) { | |
7aa7a72a | 975 | ath10k_err(ar, "failed to start htc: %d\n", status); |
95bf21f9 MK |
976 | goto err_hif_stop; |
977 | } | |
978 | ||
43d2a30f KV |
979 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { |
980 | status = ath10k_wmi_wait_for_service_ready(ar); | |
981 | if (status <= 0) { | |
982 | ath10k_warn(ar, "wmi service ready event not received"); | |
983 | status = -ETIMEDOUT; | |
984 | goto err_hif_stop; | |
985 | } | |
95bf21f9 | 986 | } |
5e3dd157 | 987 | |
7aa7a72a | 988 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", |
c8c39afe | 989 | ar->hw->wiphy->fw_version); |
5e3dd157 | 990 | |
5e3dd157 KV |
991 | status = ath10k_wmi_cmd_init(ar); |
992 | if (status) { | |
7aa7a72a MK |
993 | ath10k_err(ar, "could not send WMI init command (%d)\n", |
994 | status); | |
b7967dc7 | 995 | goto err_hif_stop; |
5e3dd157 KV |
996 | } |
997 | ||
998 | status = ath10k_wmi_wait_for_unified_ready(ar); | |
999 | if (status <= 0) { | |
7aa7a72a | 1000 | ath10k_err(ar, "wmi unified ready event not received\n"); |
5e3dd157 | 1001 | status = -ETIMEDOUT; |
b7967dc7 | 1002 | goto err_hif_stop; |
5e3dd157 KV |
1003 | } |
1004 | ||
43d2a30f KV |
1005 | /* we don't care about HTT in UTF mode */ |
1006 | if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { | |
1007 | status = ath10k_htt_setup(&ar->htt); | |
1008 | if (status) { | |
1009 | ath10k_err(ar, "failed to setup htt: %d\n", status); | |
1010 | goto err_hif_stop; | |
1011 | } | |
95bf21f9 | 1012 | } |
5e3dd157 | 1013 | |
db66ea04 KV |
1014 | status = ath10k_debug_start(ar); |
1015 | if (status) | |
b7967dc7 | 1016 | goto err_hif_stop; |
db66ea04 | 1017 | |
dfa413de | 1018 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) |
16c11176 | 1019 | ar->free_vdev_map = (1LL << TARGET_10X_NUM_VDEVS) - 1; |
dfa413de | 1020 | else |
16c11176 | 1021 | ar->free_vdev_map = (1LL << TARGET_NUM_VDEVS) - 1; |
dfa413de | 1022 | |
0579119f | 1023 | INIT_LIST_HEAD(&ar->arvifs); |
1a1b8a88 | 1024 | |
dd30a36e MK |
1025 | return 0; |
1026 | ||
67e3c63f MK |
1027 | err_hif_stop: |
1028 | ath10k_hif_stop(ar); | |
95bf21f9 MK |
1029 | err_htt_rx_detach: |
1030 | ath10k_htt_rx_free(&ar->htt); | |
1031 | err_htt_tx_detach: | |
1032 | ath10k_htt_tx_free(&ar->htt); | |
dd30a36e MK |
1033 | err_wmi_detach: |
1034 | ath10k_wmi_detach(ar); | |
1035 | err: | |
1036 | return status; | |
1037 | } | |
818bdd16 | 1038 | EXPORT_SYMBOL(ath10k_core_start); |
dd30a36e | 1039 | |
00f5482b MP |
1040 | int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) |
1041 | { | |
1042 | int ret; | |
1043 | ||
1044 | reinit_completion(&ar->target_suspend); | |
1045 | ||
1046 | ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); | |
1047 | if (ret) { | |
7aa7a72a | 1048 | ath10k_warn(ar, "could not suspend target (%d)\n", ret); |
00f5482b MP |
1049 | return ret; |
1050 | } | |
1051 | ||
1052 | ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); | |
1053 | ||
1054 | if (ret == 0) { | |
7aa7a72a | 1055 | ath10k_warn(ar, "suspend timed out - target pause event never came\n"); |
00f5482b MP |
1056 | return -ETIMEDOUT; |
1057 | } | |
1058 | ||
1059 | return 0; | |
1060 | } | |
1061 | ||
dd30a36e MK |
1062 | void ath10k_core_stop(struct ath10k *ar) |
1063 | { | |
60631c5c KV |
1064 | lockdep_assert_held(&ar->conf_mutex); |
1065 | ||
00f5482b | 1066 | /* try to suspend target */ |
43d2a30f KV |
1067 | if (ar->state != ATH10K_STATE_RESTARTING && |
1068 | ar->state != ATH10K_STATE_UTF) | |
216a1836 MK |
1069 | ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); |
1070 | ||
db66ea04 | 1071 | ath10k_debug_stop(ar); |
95bf21f9 MK |
1072 | ath10k_hif_stop(ar); |
1073 | ath10k_htt_tx_free(&ar->htt); | |
1074 | ath10k_htt_rx_free(&ar->htt); | |
dd30a36e MK |
1075 | ath10k_wmi_detach(ar); |
1076 | } | |
818bdd16 MK |
1077 | EXPORT_SYMBOL(ath10k_core_stop); |
1078 | ||
1079 | /* mac80211 manages fw/hw initialization through start/stop hooks. However in | |
1080 | * order to know what hw capabilities should be advertised to mac80211 it is | |
1081 | * necessary to load the firmware (and tear it down immediately since start | |
1082 | * hook will try to init it again) before registering */ | |
1083 | static int ath10k_core_probe_fw(struct ath10k *ar) | |
1084 | { | |
29385057 MK |
1085 | struct bmi_target_info target_info; |
1086 | int ret = 0; | |
818bdd16 MK |
1087 | |
1088 | ret = ath10k_hif_power_up(ar); | |
1089 | if (ret) { | |
7aa7a72a | 1090 | ath10k_err(ar, "could not start pci hif (%d)\n", ret); |
818bdd16 MK |
1091 | return ret; |
1092 | } | |
1093 | ||
29385057 MK |
1094 | memset(&target_info, 0, sizeof(target_info)); |
1095 | ret = ath10k_bmi_get_target_info(ar, &target_info); | |
1096 | if (ret) { | |
7aa7a72a | 1097 | ath10k_err(ar, "could not get target info (%d)\n", ret); |
29385057 MK |
1098 | ath10k_hif_power_down(ar); |
1099 | return ret; | |
1100 | } | |
1101 | ||
1102 | ar->target_version = target_info.version; | |
1103 | ar->hw->wiphy->hw_version = target_info.version; | |
1104 | ||
1105 | ret = ath10k_init_hw_params(ar); | |
1106 | if (ret) { | |
7aa7a72a | 1107 | ath10k_err(ar, "could not get hw params (%d)\n", ret); |
29385057 MK |
1108 | ath10k_hif_power_down(ar); |
1109 | return ret; | |
1110 | } | |
1111 | ||
1112 | ret = ath10k_core_fetch_firmware_files(ar); | |
1113 | if (ret) { | |
7aa7a72a | 1114 | ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); |
29385057 MK |
1115 | ath10k_hif_power_down(ar); |
1116 | return ret; | |
1117 | } | |
1118 | ||
cfd1061e MK |
1119 | ath10k_core_init_max_sta_count(ar); |
1120 | ||
60631c5c KV |
1121 | mutex_lock(&ar->conf_mutex); |
1122 | ||
43d2a30f | 1123 | ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL); |
818bdd16 | 1124 | if (ret) { |
7aa7a72a | 1125 | ath10k_err(ar, "could not init core (%d)\n", ret); |
29385057 | 1126 | ath10k_core_free_firmware_files(ar); |
818bdd16 | 1127 | ath10k_hif_power_down(ar); |
60631c5c | 1128 | mutex_unlock(&ar->conf_mutex); |
818bdd16 MK |
1129 | return ret; |
1130 | } | |
1131 | ||
8079de0d | 1132 | ath10k_print_driver_info(ar); |
818bdd16 | 1133 | ath10k_core_stop(ar); |
60631c5c KV |
1134 | |
1135 | mutex_unlock(&ar->conf_mutex); | |
1136 | ||
818bdd16 MK |
1137 | ath10k_hif_power_down(ar); |
1138 | return 0; | |
1139 | } | |
dd30a36e | 1140 | |
6782cb69 | 1141 | static void ath10k_core_register_work(struct work_struct *work) |
dd30a36e | 1142 | { |
6782cb69 | 1143 | struct ath10k *ar = container_of(work, struct ath10k, register_work); |
dd30a36e MK |
1144 | int status; |
1145 | ||
818bdd16 MK |
1146 | status = ath10k_core_probe_fw(ar); |
1147 | if (status) { | |
7aa7a72a | 1148 | ath10k_err(ar, "could not probe fw (%d)\n", status); |
6782cb69 | 1149 | goto err; |
818bdd16 | 1150 | } |
dd30a36e | 1151 | |
5e3dd157 | 1152 | status = ath10k_mac_register(ar); |
818bdd16 | 1153 | if (status) { |
7aa7a72a | 1154 | ath10k_err(ar, "could not register to mac80211 (%d)\n", status); |
29385057 | 1155 | goto err_release_fw; |
818bdd16 | 1156 | } |
5e3dd157 | 1157 | |
e13cf7a3 | 1158 | status = ath10k_debug_register(ar); |
5e3dd157 | 1159 | if (status) { |
7aa7a72a | 1160 | ath10k_err(ar, "unable to initialize debugfs\n"); |
5e3dd157 KV |
1161 | goto err_unregister_mac; |
1162 | } | |
1163 | ||
855aed12 SW |
1164 | status = ath10k_spectral_create(ar); |
1165 | if (status) { | |
7aa7a72a | 1166 | ath10k_err(ar, "failed to initialize spectral\n"); |
855aed12 SW |
1167 | goto err_debug_destroy; |
1168 | } | |
1169 | ||
6782cb69 MK |
1170 | set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); |
1171 | return; | |
5e3dd157 | 1172 | |
855aed12 SW |
1173 | err_debug_destroy: |
1174 | ath10k_debug_destroy(ar); | |
5e3dd157 KV |
1175 | err_unregister_mac: |
1176 | ath10k_mac_unregister(ar); | |
29385057 MK |
1177 | err_release_fw: |
1178 | ath10k_core_free_firmware_files(ar); | |
6782cb69 | 1179 | err: |
a491a920 MK |
1180 | /* TODO: It's probably a good idea to release device from the driver |
1181 | * but calling device_release_driver() here will cause a deadlock. | |
1182 | */ | |
6782cb69 MK |
1183 | return; |
1184 | } | |
1185 | ||
1186 | int ath10k_core_register(struct ath10k *ar, u32 chip_id) | |
1187 | { | |
6782cb69 | 1188 | ar->chip_id = chip_id; |
6782cb69 MK |
1189 | queue_work(ar->workqueue, &ar->register_work); |
1190 | ||
1191 | return 0; | |
5e3dd157 KV |
1192 | } |
1193 | EXPORT_SYMBOL(ath10k_core_register); | |
1194 | ||
1195 | void ath10k_core_unregister(struct ath10k *ar) | |
1196 | { | |
6782cb69 MK |
1197 | cancel_work_sync(&ar->register_work); |
1198 | ||
1199 | if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) | |
1200 | return; | |
1201 | ||
804eef14 SW |
1202 | /* Stop spectral before unregistering from mac80211 to remove the |
1203 | * relayfs debugfs file cleanly. Otherwise the parent debugfs tree | |
1204 | * would be already be free'd recursively, leading to a double free. | |
1205 | */ | |
1206 | ath10k_spectral_destroy(ar); | |
1207 | ||
5e3dd157 KV |
1208 | /* We must unregister from mac80211 before we stop HTC and HIF. |
1209 | * Otherwise we will fail to submit commands to FW and mac80211 will be | |
1210 | * unhappy about callback failures. */ | |
1211 | ath10k_mac_unregister(ar); | |
db66ea04 | 1212 | |
43d2a30f KV |
1213 | ath10k_testmode_destroy(ar); |
1214 | ||
29385057 | 1215 | ath10k_core_free_firmware_files(ar); |
6f1f56ea | 1216 | |
e13cf7a3 | 1217 | ath10k_debug_unregister(ar); |
5e3dd157 KV |
1218 | } |
1219 | EXPORT_SYMBOL(ath10k_core_unregister); | |
1220 | ||
e7b54194 | 1221 | struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, |
e07db352 | 1222 | enum ath10k_bus bus, |
0d0a6939 MK |
1223 | const struct ath10k_hif_ops *hif_ops) |
1224 | { | |
1225 | struct ath10k *ar; | |
e13cf7a3 | 1226 | int ret; |
0d0a6939 | 1227 | |
e7b54194 | 1228 | ar = ath10k_mac_create(priv_size); |
0d0a6939 MK |
1229 | if (!ar) |
1230 | return NULL; | |
1231 | ||
1232 | ar->ath_common.priv = ar; | |
1233 | ar->ath_common.hw = ar->hw; | |
1234 | ||
1235 | ar->p2p = !!ath10k_p2p; | |
1236 | ar->dev = dev; | |
1237 | ||
0d0a6939 | 1238 | ar->hif.ops = hif_ops; |
e07db352 | 1239 | ar->hif.bus = bus; |
0d0a6939 MK |
1240 | |
1241 | init_completion(&ar->scan.started); | |
1242 | init_completion(&ar->scan.completed); | |
1243 | init_completion(&ar->scan.on_channel); | |
1244 | init_completion(&ar->target_suspend); | |
1245 | ||
1246 | init_completion(&ar->install_key_done); | |
1247 | init_completion(&ar->vdev_setup_done); | |
1248 | ||
5c81c7fd | 1249 | INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); |
0d0a6939 MK |
1250 | |
1251 | ar->workqueue = create_singlethread_workqueue("ath10k_wq"); | |
1252 | if (!ar->workqueue) | |
e13cf7a3 | 1253 | goto err_free_mac; |
0d0a6939 MK |
1254 | |
1255 | mutex_init(&ar->conf_mutex); | |
1256 | spin_lock_init(&ar->data_lock); | |
1257 | ||
1258 | INIT_LIST_HEAD(&ar->peers); | |
1259 | init_waitqueue_head(&ar->peer_mapping_wq); | |
7962b0d8 MK |
1260 | init_waitqueue_head(&ar->htt.empty_tx_wq); |
1261 | init_waitqueue_head(&ar->wmi.tx_credits_wq); | |
0d0a6939 MK |
1262 | |
1263 | init_completion(&ar->offchan_tx_completed); | |
1264 | INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); | |
1265 | skb_queue_head_init(&ar->offchan_tx_queue); | |
1266 | ||
1267 | INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); | |
1268 | skb_queue_head_init(&ar->wmi_mgmt_tx_queue); | |
1269 | ||
6782cb69 | 1270 | INIT_WORK(&ar->register_work, ath10k_core_register_work); |
0d0a6939 MK |
1271 | INIT_WORK(&ar->restart_work, ath10k_core_restart); |
1272 | ||
e13cf7a3 MK |
1273 | ret = ath10k_debug_create(ar); |
1274 | if (ret) | |
1275 | goto err_free_wq; | |
1276 | ||
0d0a6939 MK |
1277 | return ar; |
1278 | ||
e13cf7a3 MK |
1279 | err_free_wq: |
1280 | destroy_workqueue(ar->workqueue); | |
1281 | ||
1282 | err_free_mac: | |
0d0a6939 | 1283 | ath10k_mac_destroy(ar); |
e13cf7a3 | 1284 | |
0d0a6939 MK |
1285 | return NULL; |
1286 | } | |
1287 | EXPORT_SYMBOL(ath10k_core_create); | |
1288 | ||
1289 | void ath10k_core_destroy(struct ath10k *ar) | |
1290 | { | |
1291 | flush_workqueue(ar->workqueue); | |
1292 | destroy_workqueue(ar->workqueue); | |
1293 | ||
e13cf7a3 | 1294 | ath10k_debug_destroy(ar); |
0d0a6939 MK |
1295 | ath10k_mac_destroy(ar); |
1296 | } | |
1297 | EXPORT_SYMBOL(ath10k_core_destroy); | |
1298 | ||
5e3dd157 KV |
1299 | MODULE_AUTHOR("Qualcomm Atheros"); |
1300 | MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); | |
1301 | MODULE_LICENSE("Dual BSD/GPL"); |