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ath10k: suppress warnings when getting wmi peer_rate_code_list event
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
CommitLineData
5e3dd157
KV		 1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/skbuff.h>
2fe5288c 19#include <linux/ctype.h>
5e3dd157
KV		 20
21#include "core.h"
22#include "htc.h"
23#include "debug.h"
24#include "wmi.h"
ca996ec5 25#include "wmi-tlv.h"
5e3dd157 26#include "mac.h"
43d2a30f 27#include "testmode.h"
d7579d12 28#include "wmi-ops.h"
6a94888f 29#include "p2p.h"
587f7031 30#include "hw.h"
5e3dd157 31
ce42870e
BM		 32/* MAIN WMI cmd track */
33static struct wmi_cmd_map wmi_cmd_map = {
34 .init_cmdid = WMI_INIT_CMDID,
35 .start_scan_cmdid = WMI_START_SCAN_CMDID,
36 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
37 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
38 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
39 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
40 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
41 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
42 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
43 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
44 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
45 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
46 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
47 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
48 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
49 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
50 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
51 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
52 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
53 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
54 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
55 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
56 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
57 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
58 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
59 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
60 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
61 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
62 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
63 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
64 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
65 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
66 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
67 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
68 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
69 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
70 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
71 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
72 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
73 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
74 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
75 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
76 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
77 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
78 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
79 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
80 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
81 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
82 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
83 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
84 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
85 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
86 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
87 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
88 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
89 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
90 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
91 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
92 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
93 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
94 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
95 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
96 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
97 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
98 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
99 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
100 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
101 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
102 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
103 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
104 .wlan_profile_set_hist_intvl_cmdid =
105 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
106 .wlan_profile_get_profile_data_cmdid =
107 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
108 .wlan_profile_enable_profile_id_cmdid =
109 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
110 .wlan_profile_list_profile_id_cmdid =
111 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
112 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
113 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
114 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
115 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
116 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
117 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
118 .wow_enable_disable_wake_event_cmdid =
119 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
120 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
121 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
122 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
123 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
124 .vdev_spectral_scan_configure_cmdid =
125 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
126 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
127 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
128 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
129 .network_list_offload_config_cmdid =
130 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
131 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
132 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
133 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
134 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
135 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
136 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
137 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
138 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
139 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
140 .echo_cmdid = WMI_ECHO_CMDID,
141 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
142 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
143 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
144 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
145 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
146 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
147 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
148 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
149 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
a57a6a27 150 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
62f77f09 151 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
772b4aee
RM		 152 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
153 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
154 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
155 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
156 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
157 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
158 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
159 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
160 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
161 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
162 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
163 .nan_cmdid = WMI_CMD_UNSUPPORTED,
164 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
165 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
166 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
167 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
168 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
169 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
170 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
171 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
172 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
173 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
174 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
175 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
176 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
177 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
178 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
179 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
180 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
181 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
182 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
183 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
184 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
185 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
186 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
187 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
188 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
189 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
190 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
191 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
192 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
193 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
ce42870e
BM		 194};
195
b7e3adf9
BM		 196/* 10.X WMI cmd track */
197static struct wmi_cmd_map wmi_10x_cmd_map = {
198 .init_cmdid = WMI_10X_INIT_CMDID,
199 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
200 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
201 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
34957b25 202 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 203 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
204 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
205 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
206 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
207 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
208 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
209 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
210 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
211 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
212 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
213 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
214 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
215 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
216 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
217 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
218 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
219 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
220 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
221 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
222 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
223 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
224 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
225 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
226 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
227 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
228 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
229 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
230 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
231 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
232 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
233 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
234 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
34957b25 235 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 236 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
237 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
238 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
34957b25 239 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 240 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
241 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
242 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
243 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
244 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
245 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
246 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
247 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
248 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
249 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
250 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
251 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
252 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
253 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
254 .roam_scan_rssi_change_threshold =
255 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
256 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
257 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
258 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
259 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
260 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
261 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
262 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
263 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
34957b25 264 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
542fb174 265 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
34957b25 266 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 267 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
268 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
269 .wlan_profile_set_hist_intvl_cmdid =
270 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
271 .wlan_profile_get_profile_data_cmdid =
272 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
273 .wlan_profile_enable_profile_id_cmdid =
274 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
275 .wlan_profile_list_profile_id_cmdid =
276 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
277 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
278 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
279 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
280 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
281 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
282 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
283 .wow_enable_disable_wake_event_cmdid =
284 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
285 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
286 .wow_hostwakeup_from_sleep_cmdid =
287 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
288 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
289 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
290 .vdev_spectral_scan_configure_cmdid =
291 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
292 .vdev_spectral_scan_enable_cmdid =
293 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
294 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
34957b25
BM		 295 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
296 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
297 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
298 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
299 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
300 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
301 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
302 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
303 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
304 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
305 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 306 .echo_cmdid = WMI_10X_ECHO_CMDID,
307 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
308 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
309 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
34957b25
BM		 310 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
311 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
312 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
313 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 314 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
315 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
a57a6a27 316 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
62f77f09 317 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
772b4aee
RM		 318 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
319 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
320 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
321 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
322 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
323 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
324 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
325 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
326 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
327 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
328 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
329 .nan_cmdid = WMI_CMD_UNSUPPORTED,
330 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
331 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
332 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
333 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
334 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
335 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
336 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
337 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
338 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
339 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
340 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
341 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
342 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
343 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
344 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
345 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
346 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
347 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
348 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
349 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
350 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
351 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
352 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
353 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
354 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
355 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
356 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
357 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
358 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
359 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9 360};
ce42870e 361
4a16fbec
RM		 362/* 10.2.4 WMI cmd track */
363static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
364 .init_cmdid = WMI_10_2_INIT_CMDID,
365 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
366 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
367 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
368 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
369 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
370 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
371 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
372 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
373 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
374 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
375 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
376 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
377 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
378 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
379 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
380 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
381 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
382 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
383 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
384 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
385 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
386 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
387 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
388 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
389 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
390 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
391 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
392 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
393 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
394 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
395 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
396 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
397 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
398 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
399 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
400 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
401 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
402 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
403 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
404 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
405 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
406 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
407 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
408 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
409 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
410 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
411 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
412 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
413 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
414 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
415 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
416 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
417 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
418 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
419 .roam_scan_rssi_change_threshold =
420 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
421 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
422 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
423 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
424 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
425 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
426 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
427 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
428 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
429 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
430 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
431 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
432 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
433 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
434 .wlan_profile_set_hist_intvl_cmdid =
435 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
436 .wlan_profile_get_profile_data_cmdid =
437 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
438 .wlan_profile_enable_profile_id_cmdid =
439 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
440 .wlan_profile_list_profile_id_cmdid =
441 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
442 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
443 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
444 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
445 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
446 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
447 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
448 .wow_enable_disable_wake_event_cmdid =
449 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
450 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
451 .wow_hostwakeup_from_sleep_cmdid =
452 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
453 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
454 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
455 .vdev_spectral_scan_configure_cmdid =
456 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
457 .vdev_spectral_scan_enable_cmdid =
458 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
459 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
460 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
461 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
462 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
463 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
464 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
465 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
466 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
467 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
468 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
469 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
470 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
471 .echo_cmdid = WMI_10_2_ECHO_CMDID,
472 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
473 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
474 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
475 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
476 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
477 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
478 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
479 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
480 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
a57a6a27 481 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
62f77f09 482 .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
772b4aee
RM		 483 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
484 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
485 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
486 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
487 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
488 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
489 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
490 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
491 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
492 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
493 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
494 .nan_cmdid = WMI_CMD_UNSUPPORTED,
495 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
496 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
497 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
498 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
499 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
500 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
501 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
502 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
503 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
504 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
505 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
506 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
507 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
508 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
509 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
510 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
511 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
512 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
513 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
514 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
515 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
516 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
517 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
518 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
519 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
520 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
521 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
522 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
523 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
8a0b459e
RM		 524 .pdev_bss_chan_info_request_cmdid =
525 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
4a16fbec
RM		 526};
527
2d491e69
RM		 528/* 10.4 WMI cmd track */
529static struct wmi_cmd_map wmi_10_4_cmd_map = {
530 .init_cmdid = WMI_10_4_INIT_CMDID,
531 .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
532 .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
533 .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
534 .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
535 .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
536 .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
537 .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
538 .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
539 .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
540 .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
541 .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
542 .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
543 .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
544 .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
545 .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
546 .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
547 .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
548 .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
549 .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
550 .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
551 .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
552 .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
553 .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
554 .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
555 .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
556 .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
557 .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
558 .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
559 .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
560 .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
561 .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
562 .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
563 .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
564 .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
565 .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
566 .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
567 .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
568 .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
569 .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
570 .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
571 .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
572 .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
573 .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
574 .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
575 .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
576 .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
577 .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
578 .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
579 .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
580 .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
581 .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
582 .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
583 .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
584 .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
585 .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
586 .roam_scan_rssi_change_threshold =
587 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
588 .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
589 .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
590 .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
591 .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
592 .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
593 .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
594 .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
595 .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
596 .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
597 .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
598 .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
599 .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
600 .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
601 .wlan_profile_set_hist_intvl_cmdid =
602 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
603 .wlan_profile_get_profile_data_cmdid =
604 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
605 .wlan_profile_enable_profile_id_cmdid =
606 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
607 .wlan_profile_list_profile_id_cmdid =
608 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
609 .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
610 .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
611 .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
612 .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
613 .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
614 .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
615 .wow_enable_disable_wake_event_cmdid =
616 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
617 .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
618 .wow_hostwakeup_from_sleep_cmdid =
619 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
620 .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
621 .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
622 .vdev_spectral_scan_configure_cmdid =
623 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
624 .vdev_spectral_scan_enable_cmdid =
625 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
626 .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
627 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
628 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
629 .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
630 .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
631 .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
632 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
633 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
634 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
635 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
636 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
637 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
638 .echo_cmdid = WMI_10_4_ECHO_CMDID,
639 .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
640 .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
641 .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
642 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
643 .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
644 .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
645 .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
646 .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
647 .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
648 .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
649 .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
650 .tdls_set_state_cmdid = WMI_CMD_UNSUPPORTED,
651 .tdls_peer_update_cmdid = WMI_CMD_UNSUPPORTED,
652 .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
653 .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
654 .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
655 .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
656 .wlan_peer_caching_add_peer_cmdid =
657 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
658 .wlan_peer_caching_evict_peer_cmdid =
659 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
660 .wlan_peer_caching_restore_peer_cmdid =
661 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
662 .wlan_peer_caching_print_all_peers_info_cmdid =
663 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
664 .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
665 .peer_add_proxy_sta_entry_cmdid =
666 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
667 .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
668 .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
669 .nan_cmdid = WMI_10_4_NAN_CMDID,
670 .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
671 .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
672 .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
673 .pdev_smart_ant_set_rx_antenna_cmdid =
674 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
675 .peer_smart_ant_set_tx_antenna_cmdid =
676 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
677 .peer_smart_ant_set_train_info_cmdid =
678 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
679 .peer_smart_ant_set_node_config_ops_cmdid =
680 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
681 .pdev_set_antenna_switch_table_cmdid =
682 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
683 .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
684 .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
685 .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
686 .pdev_ratepwr_chainmsk_table_cmdid =
687 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
688 .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
689 .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
690 .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
691 .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
692 .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
693 .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
694 .pdev_get_ani_ofdm_config_cmdid =
695 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
696 .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
697 .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
698 .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
699 .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
700 .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
701 .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
702 .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
703 .vdev_filter_neighbor_rx_packets_cmdid =
704 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
705 .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
706 .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
707 .pdev_bss_chan_info_request_cmdid =
708 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
47771902 709 .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
2d491e69
RM		 710};
711
6d1506e7
BM		 712/* MAIN WMI VDEV param map */
713static struct wmi_vdev_param_map wmi_vdev_param_map = {
714 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
715 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
716 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
717 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
718 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
719 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
720 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
721 .preamble = WMI_VDEV_PARAM_PREAMBLE,
722 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
723 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
724 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
725 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
726 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
727 .wmi_vdev_oc_scheduler_air_time_limit =
728 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
729 .wds = WMI_VDEV_PARAM_WDS,
730 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
731 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
732 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
733 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
734 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
735 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
736 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
737 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
738 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
739 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
740 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
741 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
742 .sgi = WMI_VDEV_PARAM_SGI,
743 .ldpc = WMI_VDEV_PARAM_LDPC,
744 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
745 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
746 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
747 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
748 .nss = WMI_VDEV_PARAM_NSS,
749 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
750 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
751 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
752 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
753 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
754 .ap_keepalive_min_idle_inactive_time_secs =
755 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
756 .ap_keepalive_max_idle_inactive_time_secs =
757 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
758 .ap_keepalive_max_unresponsive_time_secs =
759 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
760 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
761 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
762 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
763 .txbf = WMI_VDEV_PARAM_TXBF,
764 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
765 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
766 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
767 .ap_detect_out_of_sync_sleeping_sta_time_secs =
768 WMI_VDEV_PARAM_UNSUPPORTED,
93841a15
RM		 769 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
770 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
771 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
772 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
773 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
774 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
775 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
776 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
777 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
778 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
779 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
780 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
781 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
782 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
783 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
784 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
9f0b7e7d 785 .set_tsf = WMI_VDEV_PARAM_UNSUPPORTED,
6d1506e7
BM		 786};
787
788/* 10.X WMI VDEV param map */
789static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
790 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
791 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
792 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
793 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
794 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
795 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
796 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
797 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
798 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
799 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
800 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
801 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
802 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
803 .wmi_vdev_oc_scheduler_air_time_limit =
804 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
805 .wds = WMI_10X_VDEV_PARAM_WDS,
806 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
807 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
808 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
809 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
810 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
811 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
812 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
813 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
814 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
815 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
816 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
817 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
818 .sgi = WMI_10X_VDEV_PARAM_SGI,
819 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
820 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
821 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
822 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
823 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
824 .nss = WMI_10X_VDEV_PARAM_NSS,
825 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
826 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
827 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
828 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
829 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
830 .ap_keepalive_min_idle_inactive_time_secs =
831 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
832 .ap_keepalive_max_idle_inactive_time_secs =
833 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
834 .ap_keepalive_max_unresponsive_time_secs =
835 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
836 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
837 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
838 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
839 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
840 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
841 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
842 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
843 .ap_detect_out_of_sync_sleeping_sta_time_secs =
844 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
93841a15
RM		 845 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
846 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
847 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
848 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
849 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
850 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
851 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
852 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
853 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
854 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
855 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
856 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
857 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
858 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
859 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
860 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
9f0b7e7d 861 .set_tsf = WMI_VDEV_PARAM_UNSUPPORTED,
6d1506e7
BM		 862};
863
4a16fbec
RM		 864static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
865 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
866 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
867 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
868 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
869 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
870 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
871 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
872 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
873 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
874 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
875 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
876 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
877 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
878 .wmi_vdev_oc_scheduler_air_time_limit =
879 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
880 .wds = WMI_10X_VDEV_PARAM_WDS,
881 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
882 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
883 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
884 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
885 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
886 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
887 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
888 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
889 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
890 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
891 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
892 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
893 .sgi = WMI_10X_VDEV_PARAM_SGI,
894 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
895 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
896 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
897 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
898 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
899 .nss = WMI_10X_VDEV_PARAM_NSS,
900 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
901 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
902 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
903 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
904 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
905 .ap_keepalive_min_idle_inactive_time_secs =
906 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
907 .ap_keepalive_max_idle_inactive_time_secs =
908 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
909 .ap_keepalive_max_unresponsive_time_secs =
910 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
911 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
912 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
913 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
914 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
915 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
916 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
917 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
918 .ap_detect_out_of_sync_sleeping_sta_time_secs =
919 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
93841a15
RM		 920 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
921 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
922 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
923 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
924 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
925 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
926 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
927 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
928 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
929 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
930 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
931 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
932 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
933 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
934 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
935 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
9f0b7e7d 936 .set_tsf = WMI_10X_VDEV_PARAM_TSF_INCREMENT,
93841a15
RM		 937};
938
939static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
940 .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
941 .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
942 .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
943 .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
944 .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
945 .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
946 .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
947 .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
948 .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
949 .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
950 .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
951 .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
952 .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
953 .wmi_vdev_oc_scheduler_air_time_limit =
954 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
955 .wds = WMI_10_4_VDEV_PARAM_WDS,
956 .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
957 .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
958 .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
959 .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
960 .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
961 .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
962 .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
963 .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
964 .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
965 .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
966 .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
967 .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
968 .sgi = WMI_10_4_VDEV_PARAM_SGI,
969 .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
970 .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
971 .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
972 .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
973 .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
974 .nss = WMI_10_4_VDEV_PARAM_NSS,
975 .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
976 .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
977 .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
978 .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
979 .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
980 .ap_keepalive_min_idle_inactive_time_secs =
981 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
982 .ap_keepalive_max_idle_inactive_time_secs =
983 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
984 .ap_keepalive_max_unresponsive_time_secs =
985 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
986 .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
987 .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
988 .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
989 .txbf = WMI_10_4_VDEV_PARAM_TXBF,
990 .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
991 .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
992 .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
993 .ap_detect_out_of_sync_sleeping_sta_time_secs =
994 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
995 .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
996 .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
997 .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
998 .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
999 .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
1000 .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
1001 .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1002 .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1003 .early_rx_bmiss_sample_cycle =
1004 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1005 .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1006 .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1007 .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1008 .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
1009 .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
1010 .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
1011 .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
a606c0ee 1012 .set_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
4a16fbec
RM		 1013};
1014
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BM		 1015static struct wmi_pdev_param_map wmi_pdev_param_map = {
1016 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
1017 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
1018 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
1019 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
1020 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
1021 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
1022 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
1023 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1024 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
1025 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
1026 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1027 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
1028 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
1029 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1030 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
1031 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
1032 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
1033 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
1034 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
1035 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1036 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1037 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
1038 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1039 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
1040 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
1041 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1042 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1043 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1044 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1045 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1046 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1047 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1048 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1049 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
1050 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
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BM		 1051 .dcs = WMI_PDEV_PARAM_DCS,
1052 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
1053 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
1054 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
1055 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
1056 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
1057 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
1058 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
1059 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
1060 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
1061 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1062 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
1063 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
a7bd3e99 1064 .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
d86561ff
RM		 1065 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1066 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1067 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1068 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1069 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1070 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1071 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1072 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1073 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1074 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1075 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1076 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1077 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1078 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1079 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1080 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1081 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1082 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1083 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1084 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1085 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1086 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1087 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1088 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1089 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1090 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1091 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1092 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1093 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1094 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1095 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1096 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1097 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1098 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1099 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1100 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1101 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1102 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1103 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1104 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1105 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1106 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
226a339b
BM		 1107};
1108
1109static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
1110 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1111 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1112 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1113 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1114 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1115 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1116 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1117 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1118 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1119 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1120 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1121 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1122 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1123 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1124 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1125 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1126 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1127 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1128 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1129 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1130 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1131 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1132 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1133 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1134 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1135 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1136 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1137 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1138 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1139 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1140 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1141 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1142 .bcnflt_stats_update_period =
1143 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1144 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
ab6258ed 1145 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
226a339b
BM		 1146 .dcs = WMI_10X_PDEV_PARAM_DCS,
1147 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1148 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1149 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1150 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1151 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1152 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1153 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1154 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1155 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1156 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1157 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1158 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
a7bd3e99 1159 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
d86561ff
RM		 1160 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1161 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1162 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1163 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1164 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1165 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1166 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1167 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1168 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1169 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1170 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1171 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1172 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1173 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1174 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1175 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1176 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1177 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1178 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1179 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1180 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1181 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1182 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1183 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1184 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1185 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1186 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1187 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1188 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1189 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1190 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1191 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1192 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1193 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1194 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1195 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1196 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1197 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1198 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1199 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1200 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1201 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
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BM		 1202};
1203
4a16fbec
RM		 1204static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
1205 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1206 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1207 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1208 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1209 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1210 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1211 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1212 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1213 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1214 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1215 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1216 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1217 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1218 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1219 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1220 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1221 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1222 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1223 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1224 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1225 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1226 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1227 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1228 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1229 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1230 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1231 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1232 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1233 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1234 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1235 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1236 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1237 .bcnflt_stats_update_period =
1238 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1239 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1240 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1241 .dcs = WMI_10X_PDEV_PARAM_DCS,
1242 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1243 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1244 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1245 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1246 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1247 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1248 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1249 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1250 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1251 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1252 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1253 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1254 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
d86561ff
RM		 1255 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1256 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1257 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1258 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1259 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1260 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1261 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1262 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1263 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1264 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1265 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1266 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1267 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1268 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1269 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1270 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1271 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1272 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1273 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1274 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1275 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1276 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1277 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1278 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1279 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1280 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1281 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1282 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1283 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1284 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1285 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1286 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1287 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1288 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1289 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1290 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1291 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1292 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1293 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1294 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1295 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1296 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
4a16fbec
RM		 1297};
1298
24c88f78
MK		 1299/* firmware 10.2 specific mappings */
1300static struct wmi_cmd_map wmi_10_2_cmd_map = {
1301 .init_cmdid = WMI_10_2_INIT_CMDID,
1302 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
1303 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
1304 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
1305 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
1306 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1307 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1308 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
1309 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1310 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1311 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1312 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1313 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1314 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1315 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1316 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1317 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1318 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
1319 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
1320 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
1321 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1322 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
1323 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
1324 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
1325 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
1326 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1327 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
1328 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
1329 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1330 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
1331 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
1332 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1333 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1334 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
1335 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
1336 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
1337 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1338 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
1339 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1340 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
1341 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1342 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1343 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
1344 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
1345 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
1346 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
1347 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1348 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1349 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1350 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1351 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1352 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1353 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
1354 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1355 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
1356 .roam_scan_rssi_change_threshold =
1357 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1358 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
1359 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1360 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1361 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
1362 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1363 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1364 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
1365 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1366 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
1367 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1368 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
1369 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1370 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1371 .wlan_profile_set_hist_intvl_cmdid =
1372 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1373 .wlan_profile_get_profile_data_cmdid =
1374 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1375 .wlan_profile_enable_profile_id_cmdid =
1376 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1377 .wlan_profile_list_profile_id_cmdid =
1378 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1379 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
1380 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
1381 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
1382 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
1383 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1384 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1385 .wow_enable_disable_wake_event_cmdid =
1386 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1387 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
1388 .wow_hostwakeup_from_sleep_cmdid =
1389 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1390 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
1391 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
1392 .vdev_spectral_scan_configure_cmdid =
1393 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1394 .vdev_spectral_scan_enable_cmdid =
1395 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1396 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
1397 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
1398 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
1399 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
1400 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
1401 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
1402 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
1403 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
1404 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
1405 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
1406 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
1407 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
1408 .echo_cmdid = WMI_10_2_ECHO_CMDID,
1409 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
1410 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
1411 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
1412 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
1413 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1414 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1415 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
1416 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
1417 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
a57a6a27 1418 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
62f77f09 1419 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
772b4aee
RM		 1420 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
1421 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
1422 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
1423 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
1424 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
1425 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
1426 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
1427 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
1428 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
1429 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1430 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
1431 .nan_cmdid = WMI_CMD_UNSUPPORTED,
1432 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
1433 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
1434 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
1435 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1436 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1437 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
1438 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
1439 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
1440 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
1441 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
1442 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
1443 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
1444 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
1445 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
1446 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
1447 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1448 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1449 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
1450 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
1451 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
24c88f78
MK		 1452};
1453
d86561ff
RM		 1454static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
1455 .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
1456 .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
1457 .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
1458 .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
1459 .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
1460 .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
1461 .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
1462 .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1463 .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
1464 .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
1465 .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1466 .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
1467 .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
1468 .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1469 .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
1470 .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
1471 .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
1472 .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
1473 .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
1474 .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1475 .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1476 .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
1477 .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1478 .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
1479 .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
1480 .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1481 .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
1482 .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1483 .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1484 .pdev_stats_update_period =
1485 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1486 .vdev_stats_update_period =
1487 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1488 .peer_stats_update_period =
1489 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1490 .bcnflt_stats_update_period =
1491 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1492 .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
1493 .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
1494 .dcs = WMI_10_4_PDEV_PARAM_DCS,
1495 .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
1496 .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
1497 .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
1498 .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
1499 .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
1500 .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
1501 .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
1502 .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
1503 .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
1504 .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
1505 .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
1506 .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
1507 .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
1508 .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
1509 .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
1510 .smart_antenna_default_antenna =
1511 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
1512 .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
1513 .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
1514 .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
1515 .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
1516 .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
1517 .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
1518 .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
1519 .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
1520 .remove_mcast2ucast_buffer =
1521 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
1522 .peer_sta_ps_statechg_enable =
1523 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
1524 .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
1525 .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
1526 .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
1527 .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
1528 .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
1529 .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
1530 .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
1531 .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
1532 .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
1533 .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
1534 .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
1535 .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
1536 .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
1537 .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
1538 .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
1539 .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
1540 .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
1541 .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
1542 .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
1543 .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
1544 .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
1545 .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
1546 .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
1547 .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
1548 .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
1549 .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
1550 .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
1551 .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
1552 .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
1553};
1554
3fab30f7
T		 1555static const struct wmi_peer_flags_map wmi_peer_flags_map = {
1556 .auth = WMI_PEER_AUTH,
1557 .qos = WMI_PEER_QOS,
1558 .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
1559 .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
1560 .apsd = WMI_PEER_APSD,
1561 .ht = WMI_PEER_HT,
1562 .bw40 = WMI_PEER_40MHZ,
1563 .stbc = WMI_PEER_STBC,
1564 .ldbc = WMI_PEER_LDPC,
1565 .dyn_mimops = WMI_PEER_DYN_MIMOPS,
1566 .static_mimops = WMI_PEER_STATIC_MIMOPS,
1567 .spatial_mux = WMI_PEER_SPATIAL_MUX,
1568 .vht = WMI_PEER_VHT,
1569 .bw80 = WMI_PEER_80MHZ,
1570 .vht_2g = WMI_PEER_VHT_2G,
1571 .pmf = WMI_PEER_PMF,
1572};
1573
1574static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
1575 .auth = WMI_10X_PEER_AUTH,
1576 .qos = WMI_10X_PEER_QOS,
1577 .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
1578 .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
1579 .apsd = WMI_10X_PEER_APSD,
1580 .ht = WMI_10X_PEER_HT,
1581 .bw40 = WMI_10X_PEER_40MHZ,
1582 .stbc = WMI_10X_PEER_STBC,
1583 .ldbc = WMI_10X_PEER_LDPC,
1584 .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
1585 .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
1586 .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
1587 .vht = WMI_10X_PEER_VHT,
1588 .bw80 = WMI_10X_PEER_80MHZ,
1589};
1590
1591static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
1592 .auth = WMI_10_2_PEER_AUTH,
1593 .qos = WMI_10_2_PEER_QOS,
1594 .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
1595 .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
1596 .apsd = WMI_10_2_PEER_APSD,
1597 .ht = WMI_10_2_PEER_HT,
1598 .bw40 = WMI_10_2_PEER_40MHZ,
1599 .stbc = WMI_10_2_PEER_STBC,
1600 .ldbc = WMI_10_2_PEER_LDPC,
1601 .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
1602 .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
1603 .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
1604 .vht = WMI_10_2_PEER_VHT,
1605 .bw80 = WMI_10_2_PEER_80MHZ,
1606 .vht_2g = WMI_10_2_PEER_VHT_2G,
1607 .pmf = WMI_10_2_PEER_PMF,
1608};
1609
0226d602
MK		 1610void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
1611 const struct wmi_channel_arg *arg)
2d66721c
MK		 1612{
1613 u32 flags = 0;
1614
1615 memset(ch, 0, sizeof(*ch));
1616
1617 if (arg->passive)
1618 flags |= WMI_CHAN_FLAG_PASSIVE;
1619 if (arg->allow_ibss)
1620 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
1621 if (arg->allow_ht)
1622 flags |= WMI_CHAN_FLAG_ALLOW_HT;
1623 if (arg->allow_vht)
1624 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
1625 if (arg->ht40plus)
1626 flags |= WMI_CHAN_FLAG_HT40_PLUS;
1627 if (arg->chan_radar)
1628 flags |= WMI_CHAN_FLAG_DFS;
1629
1630 ch->mhz = __cpu_to_le32(arg->freq);
1631 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
1632 ch->band_center_freq2 = 0;
1633 ch->min_power = arg->min_power;
1634 ch->max_power = arg->max_power;
1635 ch->reg_power = arg->max_reg_power;
1636 ch->antenna_max = arg->max_antenna_gain;
513527c8 1637 ch->max_tx_power = arg->max_power;
2d66721c
MK		 1638
1639 /* mode & flags share storage */
1640 ch->mode = arg->mode;
1641 ch->flags |= __cpu_to_le32(flags);
1642}
1643
5e3dd157
KV		 1644int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
1645{
9eea5689 1646 unsigned long time_left;
af762c0b 1647
9eea5689
NMG		 1648 time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
1649 WMI_SERVICE_READY_TIMEOUT_HZ);
1650 if (!time_left)
1651 return -ETIMEDOUT;
1652 return 0;
5e3dd157
KV		 1653}
1654
1655int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
1656{
9eea5689 1657 unsigned long time_left;
af762c0b 1658
9eea5689
NMG		 1659 time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
1660 WMI_UNIFIED_READY_TIMEOUT_HZ);
1661 if (!time_left)
1662 return -ETIMEDOUT;
1663 return 0;
5e3dd157
KV		 1664}
1665
666a73f3 1666struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
5e3dd157
KV		 1667{
1668 struct sk_buff *skb;
1669 u32 round_len = roundup(len, 4);
1670
7aa7a72a 1671 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
5e3dd157
KV		 1672 if (!skb)
1673 return NULL;
1674
1675 skb_reserve(skb, WMI_SKB_HEADROOM);
1676 if (!IS_ALIGNED((unsigned long)skb->data, 4))
7aa7a72a 1677 ath10k_warn(ar, "Unaligned WMI skb\n");
5e3dd157
KV		 1678
1679 skb_put(skb, round_len);
1680 memset(skb->data, 0, round_len);
1681
1682 return skb;
1683}
1684
1685static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
1686{
1687 dev_kfree_skb(skb);
5e3dd157
KV		 1688}
1689
d7579d12
MK		 1690int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
1691 u32 cmd_id)
5e3dd157
KV		 1692{
1693 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
1694 struct wmi_cmd_hdr *cmd_hdr;
be8b3943 1695 int ret;
5e3dd157
KV		 1696 u32 cmd = 0;
1697
1698 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
1699 return -ENOMEM;
1700
1701 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
1702
1703 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
1704 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
1705
5e3dd157 1706 memset(skb_cb, 0, sizeof(*skb_cb));
be8b3943 1707 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
d35a6c18 1708 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
5e3dd157 1709
be8b3943
MK		 1710 if (ret)
1711 goto err_pull;
5e3dd157 1712
be8b3943
MK		 1713 return 0;
1714
1715err_pull:
1716 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
1717 return ret;
1718}
1719
ed54388a
MK		 1720static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
1721{
af21319f 1722 struct ath10k *ar = arvif->ar;
9ad50182 1723 struct ath10k_skb_cb *cb;
af21319f 1724 struct sk_buff *bcn;
66b8a010
MK		 1725 bool dtim_zero;
1726 bool deliver_cab;
ed54388a
MK		 1727 int ret;
1728
af21319f 1729 spin_lock_bh(&ar->data_lock);
ed54388a 1730
af21319f 1731 bcn = arvif->beacon;
ed54388a 1732
af21319f
MK		 1733 if (!bcn)
1734 goto unlock;
ed54388a 1735
9ad50182 1736 cb = ATH10K_SKB_CB(bcn);
ed54388a 1737
af21319f
MK		 1738 switch (arvif->beacon_state) {
1739 case ATH10K_BEACON_SENDING:
1740 case ATH10K_BEACON_SENT:
1741 break;
1742 case ATH10K_BEACON_SCHEDULED:
1743 arvif->beacon_state = ATH10K_BEACON_SENDING;
1744 spin_unlock_bh(&ar->data_lock);
1745
66b8a010
MK		 1746 dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
1747 deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
af21319f
MK		 1748 ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
1749 arvif->vdev_id,
1750 bcn->data, bcn->len,
1751 cb->paddr,
66b8a010
MK		 1752 dtim_zero,
1753 deliver_cab);
af21319f
MK		 1754
1755 spin_lock_bh(&ar->data_lock);
1756
1757 if (ret == 0)
1758 arvif->beacon_state = ATH10K_BEACON_SENT;
1759 else
1760 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
1761 }
ed54388a 1762
af21319f
MK		 1763unlock:
1764 spin_unlock_bh(&ar->data_lock);
ed54388a
MK		 1765}
1766
1767static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
1768 struct ieee80211_vif *vif)
1769{
1770 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
1771
1772 ath10k_wmi_tx_beacon_nowait(arvif);
1773}
1774
1775static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
1776{
ed54388a
MK		 1777 ieee80211_iterate_active_interfaces_atomic(ar->hw,
1778 IEEE80211_IFACE_ITER_NORMAL,
1779 ath10k_wmi_tx_beacons_iter,
1780 NULL);
ed54388a
MK		 1781}
1782
12acbc43 1783static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
be8b3943 1784{
ed54388a
MK		 1785 /* try to send pending beacons first. they take priority */
1786 ath10k_wmi_tx_beacons_nowait(ar);
1787
be8b3943
MK		 1788 wake_up(&ar->wmi.tx_credits_wq);
1789}
1790
666a73f3 1791int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
be8b3943 1792{
34957b25 1793 int ret = -EOPNOTSUPP;
be8b3943 1794
56b84287
KV		 1795 might_sleep();
1796
34957b25 1797 if (cmd_id == WMI_CMD_UNSUPPORTED) {
7aa7a72a 1798 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
55321559
BM		 1799 cmd_id);
1800 return ret;
1801 }
be8b3943
MK		 1802
1803 wait_event_timeout(ar->wmi.tx_credits_wq, ({
ed54388a
MK		 1804 /* try to send pending beacons first. they take priority */
1805 ath10k_wmi_tx_beacons_nowait(ar);
1806
be8b3943 1807 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
7962b0d8
MK		 1808
1809 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
1810 ret = -ESHUTDOWN;
1811
be8b3943 1812 (ret != -EAGAIN);
14e105cd 1813 }), 3 * HZ);
be8b3943
MK		 1814
1815 if (ret)
5e3dd157 1816 dev_kfree_skb_any(skb);
5e3dd157 1817
be8b3943 1818 return ret;
5e3dd157
KV		 1819}
1820
d7579d12
MK		 1821static struct sk_buff *
1822ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
5e00d31a 1823{
609db229
MK		 1824 struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
1825 struct ath10k_vif *arvif = (void *)cb->vif->drv_priv;
5e00d31a
BM		 1826 struct wmi_mgmt_tx_cmd *cmd;
1827 struct ieee80211_hdr *hdr;
d7579d12 1828 struct sk_buff *skb;
5e00d31a 1829 int len;
609db229 1830 u32 vdev_id;
d7579d12 1831 u32 buf_len = msdu->len;
5e00d31a
BM		 1832 u16 fc;
1833
d7579d12 1834 hdr = (struct ieee80211_hdr *)msdu->data;
5e00d31a
BM		 1835 fc = le16_to_cpu(hdr->frame_control);
1836
609db229
MK		 1837 if (cb->vif)
1838 vdev_id = arvif->vdev_id;
1839 else
1840 vdev_id = 0;
1841
5e00d31a 1842 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
d7579d12 1843 return ERR_PTR(-EINVAL);
5e00d31a 1844
d7579d12 1845 len = sizeof(cmd->hdr) + msdu->len;
eeab266c
MK		 1846
1847 if ((ieee80211_is_action(hdr->frame_control) ||
1848 ieee80211_is_deauth(hdr->frame_control) ||
1849 ieee80211_is_disassoc(hdr->frame_control)) &&
1850 ieee80211_has_protected(hdr->frame_control)) {
1851 len += IEEE80211_CCMP_MIC_LEN;
1852 buf_len += IEEE80211_CCMP_MIC_LEN;
1853 }
1854
5e00d31a
BM		 1855 len = round_up(len, 4);
1856
d7579d12
MK		 1857 skb = ath10k_wmi_alloc_skb(ar, len);
1858 if (!skb)
1859 return ERR_PTR(-ENOMEM);
5e00d31a 1860
d7579d12 1861 cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
5e00d31a 1862
609db229 1863 cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
5e00d31a
BM		 1864 cmd->hdr.tx_rate = 0;
1865 cmd->hdr.tx_power = 0;
eeab266c 1866 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
5e00d31a 1867
b25f32cb 1868 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
d7579d12 1869 memcpy(cmd->buf, msdu->data, msdu->len);
5e00d31a 1870
7aa7a72a 1871 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
d7579d12 1872 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
5e00d31a 1873 fc & IEEE80211_FCTL_STYPE);
5ce8e7fd
RM		 1874 trace_ath10k_tx_hdr(ar, skb->data, skb->len);
1875 trace_ath10k_tx_payload(ar, skb->data, skb->len);
5e00d31a 1876
d7579d12 1877 return skb;
5e00d31a
BM		 1878}
1879
5c81c7fd
MK		 1880static void ath10k_wmi_event_scan_started(struct ath10k *ar)
1881{
1882 lockdep_assert_held(&ar->data_lock);
1883
1884 switch (ar->scan.state) {
1885 case ATH10K_SCAN_IDLE:
1886 case ATH10K_SCAN_RUNNING:
1887 case ATH10K_SCAN_ABORTING:
7aa7a72a 1888 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1889 ath10k_scan_state_str(ar->scan.state),
1890 ar->scan.state);
1891 break;
1892 case ATH10K_SCAN_STARTING:
1893 ar->scan.state = ATH10K_SCAN_RUNNING;
1894
1895 if (ar->scan.is_roc)
1896 ieee80211_ready_on_channel(ar->hw);
1897
1898 complete(&ar->scan.started);
1899 break;
1900 }
1901}
1902
2f9eec0b
BG		 1903static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
1904{
1905 lockdep_assert_held(&ar->data_lock);
1906
1907 switch (ar->scan.state) {
1908 case ATH10K_SCAN_IDLE:
1909 case ATH10K_SCAN_RUNNING:
1910 case ATH10K_SCAN_ABORTING:
1911 ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
1912 ath10k_scan_state_str(ar->scan.state),
1913 ar->scan.state);
1914 break;
1915 case ATH10K_SCAN_STARTING:
1916 complete(&ar->scan.started);
1917 __ath10k_scan_finish(ar);
1918 break;
1919 }
1920}
1921
5c81c7fd
MK		 1922static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
1923{
1924 lockdep_assert_held(&ar->data_lock);
1925
1926 switch (ar->scan.state) {
1927 case ATH10K_SCAN_IDLE:
1928 case ATH10K_SCAN_STARTING:
1929 /* One suspected reason scan can be completed while starting is
1930 * if firmware fails to deliver all scan events to the host,
1931 * e.g. when transport pipe is full. This has been observed
1932 * with spectral scan phyerr events starving wmi transport
1933 * pipe. In such case the "scan completed" event should be (and
1934 * is) ignored by the host as it may be just firmware's scan
1935 * state machine recovering.
1936 */
7aa7a72a 1937 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1938 ath10k_scan_state_str(ar->scan.state),
1939 ar->scan.state);
1940 break;
1941 case ATH10K_SCAN_RUNNING:
1942 case ATH10K_SCAN_ABORTING:
1943 __ath10k_scan_finish(ar);
1944 break;
1945 }
1946}
1947
1948static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
1949{
1950 lockdep_assert_held(&ar->data_lock);
1951
1952 switch (ar->scan.state) {
1953 case ATH10K_SCAN_IDLE:
1954 case ATH10K_SCAN_STARTING:
7aa7a72a 1955 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1956 ath10k_scan_state_str(ar->scan.state),
1957 ar->scan.state);
1958 break;
1959 case ATH10K_SCAN_RUNNING:
1960 case ATH10K_SCAN_ABORTING:
1961 ar->scan_channel = NULL;
1962 break;
1963 }
1964}
1965
1966static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
1967{
1968 lockdep_assert_held(&ar->data_lock);
1969
1970 switch (ar->scan.state) {
1971 case ATH10K_SCAN_IDLE:
1972 case ATH10K_SCAN_STARTING:
7aa7a72a 1973 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1974 ath10k_scan_state_str(ar->scan.state),
1975 ar->scan.state);
1976 break;
1977 case ATH10K_SCAN_RUNNING:
1978 case ATH10K_SCAN_ABORTING:
1979 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
1980
1981 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
1982 complete(&ar->scan.on_channel);
1983 break;
1984 }
1985}
1986
9ff8b724
MK		 1987static const char *
1988ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
1989 enum wmi_scan_completion_reason reason)
1990{
1991 switch (type) {
1992 case WMI_SCAN_EVENT_STARTED:
1993 return "started";
1994 case WMI_SCAN_EVENT_COMPLETED:
1995 switch (reason) {
1996 case WMI_SCAN_REASON_COMPLETED:
1997 return "completed";
1998 case WMI_SCAN_REASON_CANCELLED:
1999 return "completed [cancelled]";
2000 case WMI_SCAN_REASON_PREEMPTED:
2001 return "completed [preempted]";
2002 case WMI_SCAN_REASON_TIMEDOUT:
2003 return "completed [timedout]";
b2297baa
RM		 2004 case WMI_SCAN_REASON_INTERNAL_FAILURE:
2005 return "completed [internal err]";
9ff8b724
MK		 2006 case WMI_SCAN_REASON_MAX:
2007 break;
2008 }
2009 return "completed [unknown]";
2010 case WMI_SCAN_EVENT_BSS_CHANNEL:
2011 return "bss channel";
2012 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2013 return "foreign channel";
2014 case WMI_SCAN_EVENT_DEQUEUED:
2015 return "dequeued";
2016 case WMI_SCAN_EVENT_PREEMPTED:
2017 return "preempted";
2018 case WMI_SCAN_EVENT_START_FAILED:
2019 return "start failed";
b2297baa
RM		 2020 case WMI_SCAN_EVENT_RESTARTED:
2021 return "restarted";
2022 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2023 return "foreign channel exit";
9ff8b724
MK		 2024 default:
2025 return "unknown";
2026 }
2027}
2028
d7579d12
MK		 2029static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
2030 struct wmi_scan_ev_arg *arg)
32653cf1
MK		 2031{
2032 struct wmi_scan_event *ev = (void *)skb->data;
2033
2034 if (skb->len < sizeof(*ev))
2035 return -EPROTO;
2036
2037 skb_pull(skb, sizeof(*ev));
2038 arg->event_type = ev->event_type;
2039 arg->reason = ev->reason;
2040 arg->channel_freq = ev->channel_freq;
2041 arg->scan_req_id = ev->scan_req_id;
2042 arg->scan_id = ev->scan_id;
2043 arg->vdev_id = ev->vdev_id;
2044
2045 return 0;
2046}
2047
0226d602 2048int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2049{
32653cf1 2050 struct wmi_scan_ev_arg arg = {};
5e3dd157
KV		 2051 enum wmi_scan_event_type event_type;
2052 enum wmi_scan_completion_reason reason;
2053 u32 freq;
2054 u32 req_id;
2055 u32 scan_id;
2056 u32 vdev_id;
32653cf1 2057 int ret;
5e3dd157 2058
d7579d12 2059 ret = ath10k_wmi_pull_scan(ar, skb, &arg);
32653cf1
MK		 2060 if (ret) {
2061 ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
2062 return ret;
2063 }
2064
2065 event_type = __le32_to_cpu(arg.event_type);
2066 reason = __le32_to_cpu(arg.reason);
2067 freq = __le32_to_cpu(arg.channel_freq);
2068 req_id = __le32_to_cpu(arg.scan_req_id);
2069 scan_id = __le32_to_cpu(arg.scan_id);
2070 vdev_id = __le32_to_cpu(arg.vdev_id);
5e3dd157 2071
5c81c7fd
MK		 2072 spin_lock_bh(&ar->data_lock);
2073
7aa7a72a 2074 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c81c7fd 2075 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
9ff8b724 2076 ath10k_wmi_event_scan_type_str(event_type, reason),
5c81c7fd
MK		 2077 event_type, reason, freq, req_id, scan_id, vdev_id,
2078 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
5e3dd157
KV		 2079
2080 switch (event_type) {
2081 case WMI_SCAN_EVENT_STARTED:
5c81c7fd 2082 ath10k_wmi_event_scan_started(ar);
5e3dd157
KV		 2083 break;
2084 case WMI_SCAN_EVENT_COMPLETED:
5c81c7fd 2085 ath10k_wmi_event_scan_completed(ar);
5e3dd157
KV		 2086 break;
2087 case WMI_SCAN_EVENT_BSS_CHANNEL:
5c81c7fd 2088 ath10k_wmi_event_scan_bss_chan(ar);
5e3dd157
KV		 2089 break;
2090 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
5c81c7fd
MK		 2091 ath10k_wmi_event_scan_foreign_chan(ar, freq);
2092 break;
2093 case WMI_SCAN_EVENT_START_FAILED:
7aa7a72a 2094 ath10k_warn(ar, "received scan start failure event\n");
2f9eec0b 2095 ath10k_wmi_event_scan_start_failed(ar);
5e3dd157
KV		 2096 break;
2097 case WMI_SCAN_EVENT_DEQUEUED:
5e3dd157 2098 case WMI_SCAN_EVENT_PREEMPTED:
b2297baa
RM		 2099 case WMI_SCAN_EVENT_RESTARTED:
2100 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
5e3dd157
KV		 2101 default:
2102 break;
2103 }
2104
2105 spin_unlock_bh(&ar->data_lock);
2106 return 0;
2107}
2108
504f6cdf
SM		 2109/* If keys are configured, HW decrypts all frames
2110 * with protected bit set. Mark such frames as decrypted.
2111 */
2112static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
2113 struct sk_buff *skb,
2114 struct ieee80211_rx_status *status)
2115{
2116 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2117 unsigned int hdrlen;
2118 bool peer_key;
2119 u8 *addr, keyidx;
2120
2121 if (!ieee80211_is_auth(hdr->frame_control) ||
2122 !ieee80211_has_protected(hdr->frame_control))
2123 return;
2124
2125 hdrlen = ieee80211_hdrlen(hdr->frame_control);
2126 if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
2127 return;
2128
2129 keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
2130 addr = ieee80211_get_SA(hdr);
2131
2132 spin_lock_bh(&ar->data_lock);
2133 peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
2134 spin_unlock_bh(&ar->data_lock);
2135
2136 if (peer_key) {
2137 ath10k_dbg(ar, ATH10K_DBG_MAC,
2138 "mac wep key present for peer %pM\n", addr);
2139 status->flag |= RX_FLAG_DECRYPTED;
2140 }
2141}
2142
d7579d12
MK		 2143static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
2144 struct wmi_mgmt_rx_ev_arg *arg)
5e3dd157 2145{
0d9b0438
MK		 2146 struct wmi_mgmt_rx_event_v1 *ev_v1;
2147 struct wmi_mgmt_rx_event_v2 *ev_v2;
2148 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
8d130963 2149 struct wmi_mgmt_rx_ext_info *ext_info;
32653cf1
MK		 2150 size_t pull_len;
2151 u32 msdu_len;
8d130963 2152 u32 len;
32653cf1 2153
c4cdf753
KV		 2154 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
2155 ar->running_fw->fw_file.fw_features)) {
32653cf1
MK		 2156 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
2157 ev_hdr = &ev_v2->hdr.v1;
2158 pull_len = sizeof(*ev_v2);
2159 } else {
2160 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
2161 ev_hdr = &ev_v1->hdr;
2162 pull_len = sizeof(*ev_v1);
2163 }
2164
2165 if (skb->len < pull_len)
2166 return -EPROTO;
2167
2168 skb_pull(skb, pull_len);
2169 arg->channel = ev_hdr->channel;
2170 arg->buf_len = ev_hdr->buf_len;
2171 arg->status = ev_hdr->status;
2172 arg->snr = ev_hdr->snr;
2173 arg->phy_mode = ev_hdr->phy_mode;
2174 arg->rate = ev_hdr->rate;
2175
2176 msdu_len = __le32_to_cpu(arg->buf_len);
2177 if (skb->len < msdu_len)
2178 return -EPROTO;
2179
8d130963
PO		 2180 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2181 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2182 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2183 memcpy(&arg->ext_info, ext_info,
2184 sizeof(struct wmi_mgmt_rx_ext_info));
2185 }
32653cf1
MK		 2186 /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
2187 * trailer with credit update. Trim the excess garbage.
2188 */
2189 skb_trim(skb, msdu_len);
2190
2191 return 0;
2192}
2193
1c092961
RM		 2194static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
2195 struct sk_buff *skb,
2196 struct wmi_mgmt_rx_ev_arg *arg)
2197{
2198 struct wmi_10_4_mgmt_rx_event *ev;
2199 struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
2200 size_t pull_len;
2201 u32 msdu_len;
7d5efd08
PO		 2202 struct wmi_mgmt_rx_ext_info *ext_info;
2203 u32 len;
1c092961
RM		 2204
2205 ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
2206 ev_hdr = &ev->hdr;
2207 pull_len = sizeof(*ev);
2208
2209 if (skb->len < pull_len)
2210 return -EPROTO;
2211
2212 skb_pull(skb, pull_len);
2213 arg->channel = ev_hdr->channel;
2214 arg->buf_len = ev_hdr->buf_len;
2215 arg->status = ev_hdr->status;
2216 arg->snr = ev_hdr->snr;
2217 arg->phy_mode = ev_hdr->phy_mode;
2218 arg->rate = ev_hdr->rate;
2219
2220 msdu_len = __le32_to_cpu(arg->buf_len);
2221 if (skb->len < msdu_len)
2222 return -EPROTO;
2223
7d5efd08
PO		 2224 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2225 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2226 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2227 memcpy(&arg->ext_info, ext_info,
2228 sizeof(struct wmi_mgmt_rx_ext_info));
2229 }
2230
1c092961
RM		 2231 /* Make sure bytes added for padding are removed. */
2232 skb_trim(skb, msdu_len);
2233
2234 return 0;
2235}
2236
0226d602 2237int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
32653cf1
MK		 2238{
2239 struct wmi_mgmt_rx_ev_arg arg = {};
5e3dd157
KV		 2240 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
2241 struct ieee80211_hdr *hdr;
01cebe1c 2242 struct ieee80211_supported_band *sband;
5e3dd157
KV		 2243 u32 rx_status;
2244 u32 channel;
2245 u32 phy_mode;
2246 u32 snr;
2247 u32 rate;
2248 u32 buf_len;
2249 u16 fc;
32653cf1 2250 int ret;
0d9b0438 2251
d7579d12 2252 ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
32653cf1
MK		 2253 if (ret) {
2254 ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
08603f2e 2255 dev_kfree_skb(skb);
32653cf1 2256 return ret;
0d9b0438 2257 }
5e3dd157 2258
32653cf1
MK		 2259 channel = __le32_to_cpu(arg.channel);
2260 buf_len = __le32_to_cpu(arg.buf_len);
2261 rx_status = __le32_to_cpu(arg.status);
2262 snr = __le32_to_cpu(arg.snr);
2263 phy_mode = __le32_to_cpu(arg.phy_mode);
2264 rate = __le32_to_cpu(arg.rate);
5e3dd157
KV		 2265
2266 memset(status, 0, sizeof(*status));
2267
7aa7a72a 2268 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 2269 "event mgmt rx status %08x\n", rx_status);
2270
2c9bcece
MP		 2271 if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
2272 (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
2273 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
d67d0a02
MK		 2274 dev_kfree_skb(skb);
2275 return 0;
2276 }
2277
5e3dd157
KV		 2278 if (rx_status & WMI_RX_STATUS_ERR_MIC)
2279 status->flag |= RX_FLAG_MMIC_ERROR;
2280
8d130963
PO		 2281 if (rx_status & WMI_RX_STATUS_EXT_INFO) {
2282 status->mactime =
2283 __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
2284 status->flag |= RX_FLAG_MACTIME_END;
2285 }
21040bf9 2286 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
453cdb61 2287 * MODE_11B. This means phy_mode is not a reliable source for the band
21040bf9
MK		 2288 * of mgmt rx.
2289 */
2290 if (channel >= 1 && channel <= 14) {
57fbcce3 2291 status->band = NL80211_BAND_2GHZ;
21040bf9 2292 } else if (channel >= 36 && channel <= 165) {
57fbcce3 2293 status->band = NL80211_BAND_5GHZ;
453cdb61 2294 } else {
21040bf9
MK		 2295 /* Shouldn't happen unless list of advertised channels to
2296 * mac80211 has been changed.
2297 */
2298 WARN_ON_ONCE(1);
2299 dev_kfree_skb(skb);
2300 return 0;
453cdb61
MK		 2301 }
2302
57fbcce3 2303 if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
21040bf9
MK		 2304 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
2305
01cebe1c
MK		 2306 sband = &ar->mac.sbands[status->band];
2307
5e3dd157
KV		 2308 status->freq = ieee80211_channel_to_frequency(channel, status->band);
2309 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
01cebe1c 2310 status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
5e3dd157 2311
5e3dd157
KV		 2312 hdr = (struct ieee80211_hdr *)skb->data;
2313 fc = le16_to_cpu(hdr->frame_control);
2314
60549cab
GB		 2315 /* Firmware is guaranteed to report all essential management frames via
2316 * WMI while it can deliver some extra via HTT. Since there can be
2317 * duplicates split the reporting wrt monitor/sniffing.
2318 */
2319 status->flag |= RX_FLAG_SKIP_MONITOR;
2320
504f6cdf
SM		 2321 ath10k_wmi_handle_wep_reauth(ar, skb, status);
2322
2b6a6a90
MK		 2323 /* FW delivers WEP Shared Auth frame with Protected Bit set and
2324 * encrypted payload. However in case of PMF it delivers decrypted
2325 * frames with Protected Bit set. */
2326 if (ieee80211_has_protected(hdr->frame_control) &&
2327 !ieee80211_is_auth(hdr->frame_control)) {
eeab266c
MK		 2328 status->flag |= RX_FLAG_DECRYPTED;
2329
2330 if (!ieee80211_is_action(hdr->frame_control) &&
2331 !ieee80211_is_deauth(hdr->frame_control) &&
2332 !ieee80211_is_disassoc(hdr->frame_control)) {
2333 status->flag |= RX_FLAG_IV_STRIPPED |
2334 RX_FLAG_MMIC_STRIPPED;
2335 hdr->frame_control = __cpu_to_le16(fc &
5e3dd157 2336 ~IEEE80211_FCTL_PROTECTED);
eeab266c 2337 }
5e3dd157
KV		 2338 }
2339
cc9904e6
MK		 2340 if (ieee80211_is_beacon(hdr->frame_control))
2341 ath10k_mac_handle_beacon(ar, skb);
2342
7aa7a72a 2343 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 2344 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
2345 skb, skb->len,
2346 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
2347
7aa7a72a 2348 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 2349 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
2350 status->freq, status->band, status->signal,
2351 status->rate_idx);
2352
5e3dd157
KV		 2353 ieee80211_rx(ar->hw, skb);
2354 return 0;
2355}
2356
2e1dea40
MK		 2357static int freq_to_idx(struct ath10k *ar, int freq)
2358{
2359 struct ieee80211_supported_band *sband;
2360 int band, ch, idx = 0;
2361
57fbcce3 2362 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
2e1dea40
MK		 2363 sband = ar->hw->wiphy->bands[band];
2364 if (!sband)
2365 continue;
2366
2367 for (ch = 0; ch < sband->n_channels; ch++, idx++)
2368 if (sband->channels[ch].center_freq == freq)
2369 goto exit;
2370 }
2371
2372exit:
2373 return idx;
2374}
2375
d7579d12
MK		 2376static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
2377 struct wmi_ch_info_ev_arg *arg)
32653cf1
MK		 2378{
2379 struct wmi_chan_info_event *ev = (void *)skb->data;
2380
2381 if (skb->len < sizeof(*ev))
2382 return -EPROTO;
2383
2384 skb_pull(skb, sizeof(*ev));
2385 arg->err_code = ev->err_code;
2386 arg->freq = ev->freq;
2387 arg->cmd_flags = ev->cmd_flags;
2388 arg->noise_floor = ev->noise_floor;
2389 arg->rx_clear_count = ev->rx_clear_count;
2390 arg->cycle_count = ev->cycle_count;
2391
2392 return 0;
2393}
2394
b2297baa
RM		 2395static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
2396 struct sk_buff *skb,
2397 struct wmi_ch_info_ev_arg *arg)
2398{
2399 struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
2400
2401 if (skb->len < sizeof(*ev))
2402 return -EPROTO;
2403
2404 skb_pull(skb, sizeof(*ev));
2405 arg->err_code = ev->err_code;
2406 arg->freq = ev->freq;
2407 arg->cmd_flags = ev->cmd_flags;
2408 arg->noise_floor = ev->noise_floor;
2409 arg->rx_clear_count = ev->rx_clear_count;
2410 arg->cycle_count = ev->cycle_count;
2411 arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
2412 arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
2413 arg->rx_frame_count = ev->rx_frame_count;
2414
2415 return 0;
2416}
2417
0226d602 2418void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2419{
32653cf1 2420 struct wmi_ch_info_ev_arg arg = {};
2e1dea40
MK		 2421 struct survey_info *survey;
2422 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
32653cf1 2423 int idx, ret;
2e1dea40 2424
d7579d12 2425 ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
32653cf1
MK		 2426 if (ret) {
2427 ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
2428 return;
2429 }
2e1dea40 2430
32653cf1
MK		 2431 err_code = __le32_to_cpu(arg.err_code);
2432 freq = __le32_to_cpu(arg.freq);
2433 cmd_flags = __le32_to_cpu(arg.cmd_flags);
2434 noise_floor = __le32_to_cpu(arg.noise_floor);
2435 rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
2436 cycle_count = __le32_to_cpu(arg.cycle_count);
2e1dea40 2437
7aa7a72a 2438 ath10k_dbg(ar, ATH10K_DBG_WMI,
2e1dea40
MK		 2439 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
2440 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
2441 cycle_count);
2442
2443 spin_lock_bh(&ar->data_lock);
2444
5c81c7fd
MK		 2445 switch (ar->scan.state) {
2446 case ATH10K_SCAN_IDLE:
2447 case ATH10K_SCAN_STARTING:
7aa7a72a 2448 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
2e1dea40 2449 goto exit;
5c81c7fd
MK		 2450 case ATH10K_SCAN_RUNNING:
2451 case ATH10K_SCAN_ABORTING:
2452 break;
2e1dea40
MK		 2453 }
2454
2455 idx = freq_to_idx(ar, freq);
2456 if (idx >= ARRAY_SIZE(ar->survey)) {
7aa7a72a 2457 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2e1dea40
MK		 2458 freq, idx);
2459 goto exit;
2460 }
2461
2462 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
44b7d483
MK		 2463 if (ar->ch_info_can_report_survey) {
2464 survey = &ar->survey[idx];
2465 survey->noise = noise_floor;
2466 survey->filled = SURVEY_INFO_NOISE_DBM;
2467
2468 ath10k_hw_fill_survey_time(ar,
2469 survey,
2470 cycle_count,
2471 rx_clear_count,
2472 ar->survey_last_cycle_count,
2473 ar->survey_last_rx_clear_count);
2474 }
2475
2476 ar->ch_info_can_report_survey = false;
2477 } else {
2478 ar->ch_info_can_report_survey = true;
2e1dea40
MK		 2479 }
2480
3d2a2e29
VT		 2481 if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
2482 ar->survey_last_rx_clear_count = rx_clear_count;
2483 ar->survey_last_cycle_count = cycle_count;
2484 }
2e1dea40
MK		 2485
2486exit:
2487 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 2488}
2489
0226d602 2490void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2491{
7aa7a72a 2492 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
5e3dd157
KV		 2493}
2494
0226d602 2495int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2496{
7aa7a72a 2497 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
869526b9
KV		 2498 skb->len);
2499
d35a6c18 2500 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
869526b9
KV		 2501
2502 return 0;
5e3dd157
KV		 2503}
2504
b91251fb
MK		 2505void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
2506 struct ath10k_fw_stats_pdev *dst)
d15fb520 2507{
d15fb520
MK		 2508 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
2509 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
2510 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
2511 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
2512 dst->cycle_count = __le32_to_cpu(src->cycle_count);
2513 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
2514 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
b91251fb 2515}
d15fb520 2516
b91251fb
MK		 2517void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
2518 struct ath10k_fw_stats_pdev *dst)
2519{
2520 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2521 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2522 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2523 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2524 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2525 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2526 dst->local_freed = __le32_to_cpu(src->local_freed);
2527 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2528 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2529 dst->underrun = __le32_to_cpu(src->underrun);
2530 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2531 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
2532 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2533 dst->data_rc = __le32_to_cpu(src->data_rc);
2534 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2535 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2536 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2537 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2538 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2539 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2540 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2541 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2542}
d15fb520 2543
98dd2b92
MP		 2544static void
2545ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
2546 struct ath10k_fw_stats_pdev *dst)
2547{
2548 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2549 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2550 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2551 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2552 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2553 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2554 dst->local_freed = __le32_to_cpu(src->local_freed);
2555 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2556 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2557 dst->underrun = __le32_to_cpu(src->underrun);
2558 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2559 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
2560 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2561 dst->data_rc = __le32_to_cpu(src->data_rc);
2562 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2563 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2564 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2565 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2566 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2567 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2568 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2569 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2570 dst->hw_paused = __le32_to_cpu(src->hw_paused);
2571 dst->seq_posted = __le32_to_cpu(src->seq_posted);
2572 dst->seq_failed_queueing =
2573 __le32_to_cpu(src->seq_failed_queueing);
2574 dst->seq_completed = __le32_to_cpu(src->seq_completed);
2575 dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
2576 dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
2577 dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
2578 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2579 dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
2580 dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
2581 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2582 dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
2583}
2584
b91251fb
MK		 2585void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
2586 struct ath10k_fw_stats_pdev *dst)
2587{
2588 dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
2589 dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
2590 dst->r0_frags = __le32_to_cpu(src->r0_frags);
2591 dst->r1_frags = __le32_to_cpu(src->r1_frags);
2592 dst->r2_frags = __le32_to_cpu(src->r2_frags);
2593 dst->r3_frags = __le32_to_cpu(src->r3_frags);
2594 dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
2595 dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
2596 dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
2597 dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
2598 dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
2599 dst->phy_errs = __le32_to_cpu(src->phy_errs);
2600 dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
2601 dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
2602}
2603
2604void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
2605 struct ath10k_fw_stats_pdev *dst)
2606{
2607 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
2608 dst->rts_bad = __le32_to_cpu(src->rts_bad);
2609 dst->rts_good = __le32_to_cpu(src->rts_good);
2610 dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
2611 dst->no_beacons = __le32_to_cpu(src->no_beacons);
2612 dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
d15fb520
MK		 2613}
2614
0226d602
MK		 2615void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
2616 struct ath10k_fw_stats_peer *dst)
d15fb520
MK		 2617{
2618 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2619 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2620 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2621}
2622
f9575793
MSS		 2623static void
2624ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
2625 struct ath10k_fw_stats_peer *dst)
2626{
2627 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2628 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2629 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2630 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
2631}
2632
d7579d12
MK		 2633static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
2634 struct sk_buff *skb,
2635 struct ath10k_fw_stats *stats)
d15fb520
MK		 2636{
2637 const struct wmi_stats_event *ev = (void *)skb->data;
2638 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
2639 int i;
2640
2641 if (!skb_pull(skb, sizeof(*ev)))
2642 return -EPROTO;
2643
2644 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2645 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2646 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2647
5326849a 2648 for (i = 0; i < num_pdev_stats; i++) {
d15fb520 2649 const struct wmi_pdev_stats *src;
5326849a 2650 struct ath10k_fw_stats_pdev *dst;
d15fb520
MK		 2651
2652 src = (void *)skb->data;
2653 if (!skb_pull(skb, sizeof(*src)))
2654 return -EPROTO;
2655
5326849a
MK		 2656 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2657 if (!dst)
2658 continue;
2659
b91251fb
MK		 2660 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2661 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2662 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2663
5326849a 2664 list_add_tail(&dst->list, &stats->pdevs);
d15fb520
MK		 2665 }
2666
2667 /* fw doesn't implement vdev stats */
2668
2669 for (i = 0; i < num_peer_stats; i++) {
2670 const struct wmi_peer_stats *src;
5326849a 2671 struct ath10k_fw_stats_peer *dst;
d15fb520
MK		 2672
2673 src = (void *)skb->data;
2674 if (!skb_pull(skb, sizeof(*src)))
2675 return -EPROTO;
2676
5326849a
MK		 2677 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2678 if (!dst)
2679 continue;
2680
2681 ath10k_wmi_pull_peer_stats(src, dst);
2682 list_add_tail(&dst->list, &stats->peers);
d15fb520
MK		 2683 }
2684
2685 return 0;
2686}
2687
d7579d12
MK		 2688static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
2689 struct sk_buff *skb,
2690 struct ath10k_fw_stats *stats)
d15fb520
MK		 2691{
2692 const struct wmi_stats_event *ev = (void *)skb->data;
2693 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
2694 int i;
2695
2696 if (!skb_pull(skb, sizeof(*ev)))
2697 return -EPROTO;
2698
2699 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2700 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2701 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2702
5326849a 2703 for (i = 0; i < num_pdev_stats; i++) {
d15fb520 2704 const struct wmi_10x_pdev_stats *src;
5326849a 2705 struct ath10k_fw_stats_pdev *dst;
d15fb520
MK		 2706
2707 src = (void *)skb->data;
2708 if (!skb_pull(skb, sizeof(*src)))
2709 return -EPROTO;
2710
5326849a
MK		 2711 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2712 if (!dst)
2713 continue;
2714
b91251fb
MK		 2715 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2716 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2717 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2718 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
d15fb520 2719
5326849a 2720 list_add_tail(&dst->list, &stats->pdevs);
d15fb520
MK		 2721 }
2722
2723 /* fw doesn't implement vdev stats */
2724
2725 for (i = 0; i < num_peer_stats; i++) {
2726 const struct wmi_10x_peer_stats *src;
5326849a 2727 struct ath10k_fw_stats_peer *dst;
d15fb520
MK		 2728
2729 src = (void *)skb->data;
2730 if (!skb_pull(skb, sizeof(*src)))
2731 return -EPROTO;
2732
5326849a
MK		 2733 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2734 if (!dst)
2735 continue;
2736
2737 ath10k_wmi_pull_peer_stats(&src->old, dst);
2738
2739 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
d15fb520 2740
5326849a 2741 list_add_tail(&dst->list, &stats->peers);
d15fb520
MK		 2742 }
2743
2744 return 0;
2745}
2746
20de2229
MK		 2747static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
2748 struct sk_buff *skb,
2749 struct ath10k_fw_stats *stats)
2750{
2751 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
2752 u32 num_pdev_stats;
2753 u32 num_pdev_ext_stats;
2754 u32 num_vdev_stats;
2755 u32 num_peer_stats;
2756 int i;
2757
2758 if (!skb_pull(skb, sizeof(*ev)))
2759 return -EPROTO;
2760
2761 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2762 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2763 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2764 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2765
2766 for (i = 0; i < num_pdev_stats; i++) {
2767 const struct wmi_10_2_pdev_stats *src;
2768 struct ath10k_fw_stats_pdev *dst;
2769
2770 src = (void *)skb->data;
2771 if (!skb_pull(skb, sizeof(*src)))
2772 return -EPROTO;
2773
2774 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2775 if (!dst)
2776 continue;
2777
2778 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2779 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2780 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2781 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2782 /* FIXME: expose 10.2 specific values */
2783
2784 list_add_tail(&dst->list, &stats->pdevs);
2785 }
2786
2787 for (i = 0; i < num_pdev_ext_stats; i++) {
2788 const struct wmi_10_2_pdev_ext_stats *src;
2789
2790 src = (void *)skb->data;
2791 if (!skb_pull(skb, sizeof(*src)))
2792 return -EPROTO;
2793
2794 /* FIXME: expose values to userspace
2795 *
2796 * Note: Even though this loop seems to do nothing it is
2797 * required to parse following sub-structures properly.
2798 */
2799 }
2800
2801 /* fw doesn't implement vdev stats */
2802
2803 for (i = 0; i < num_peer_stats; i++) {
2804 const struct wmi_10_2_peer_stats *src;
2805 struct ath10k_fw_stats_peer *dst;
2806
2807 src = (void *)skb->data;
2808 if (!skb_pull(skb, sizeof(*src)))
2809 return -EPROTO;
2810
2811 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2812 if (!dst)
2813 continue;
2814
2815 ath10k_wmi_pull_peer_stats(&src->old, dst);
2816
2817 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
2818 /* FIXME: expose 10.2 specific values */
2819
2820 list_add_tail(&dst->list, &stats->peers);
2821 }
2822
2823 return 0;
2824}
2825
2826static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
2827 struct sk_buff *skb,
2828 struct ath10k_fw_stats *stats)
2829{
2830 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
2831 u32 num_pdev_stats;
2832 u32 num_pdev_ext_stats;
2833 u32 num_vdev_stats;
2834 u32 num_peer_stats;
2835 int i;
2836
2837 if (!skb_pull(skb, sizeof(*ev)))
2838 return -EPROTO;
2839
2840 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2841 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2842 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2843 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2844
2845 for (i = 0; i < num_pdev_stats; i++) {
2846 const struct wmi_10_2_pdev_stats *src;
2847 struct ath10k_fw_stats_pdev *dst;
2848
2849 src = (void *)skb->data;
2850 if (!skb_pull(skb, sizeof(*src)))
2851 return -EPROTO;
2852
2853 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2854 if (!dst)
2855 continue;
2856
2857 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2858 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2859 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2860 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2861 /* FIXME: expose 10.2 specific values */
2862
2863 list_add_tail(&dst->list, &stats->pdevs);
2864 }
2865
2866 for (i = 0; i < num_pdev_ext_stats; i++) {
2867 const struct wmi_10_2_pdev_ext_stats *src;
2868
2869 src = (void *)skb->data;
2870 if (!skb_pull(skb, sizeof(*src)))
2871 return -EPROTO;
2872
2873 /* FIXME: expose values to userspace
2874 *
2875 * Note: Even though this loop seems to do nothing it is
2876 * required to parse following sub-structures properly.
2877 */
2878 }
2879
2880 /* fw doesn't implement vdev stats */
2881
2882 for (i = 0; i < num_peer_stats; i++) {
de46c015 2883 const struct wmi_10_2_4_ext_peer_stats *src;
20de2229 2884 struct ath10k_fw_stats_peer *dst;
de46c015 2885 int stats_len;
de46c015 2886
cc61a1bb 2887 if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
de46c015
MSS		 2888 stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
2889 else
2890 stats_len = sizeof(struct wmi_10_2_4_peer_stats);
20de2229
MK		 2891
2892 src = (void *)skb->data;
de46c015 2893 if (!skb_pull(skb, stats_len))
20de2229
MK		 2894 return -EPROTO;
2895
2896 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2897 if (!dst)
2898 continue;
2899
2900 ath10k_wmi_pull_peer_stats(&src->common.old, dst);
2901
2902 dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
de46c015 2903
cc61a1bb 2904 if (ath10k_peer_stats_enabled(ar))
de46c015 2905 dst->rx_duration = __le32_to_cpu(src->rx_duration);
20de2229
MK		 2906 /* FIXME: expose 10.2 specific values */
2907
2908 list_add_tail(&dst->list, &stats->peers);
2909 }
2910
2911 return 0;
2912}
2913
98dd2b92
MP		 2914static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
2915 struct sk_buff *skb,
2916 struct ath10k_fw_stats *stats)
2917{
2918 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
2919 u32 num_pdev_stats;
2920 u32 num_pdev_ext_stats;
2921 u32 num_vdev_stats;
2922 u32 num_peer_stats;
f9575793 2923 u32 stats_id;
98dd2b92
MP		 2924 int i;
2925
2926 if (!skb_pull(skb, sizeof(*ev)))
2927 return -EPROTO;
2928
2929 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2930 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2931 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2932 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
f9575793 2933 stats_id = __le32_to_cpu(ev->stats_id);
98dd2b92
MP		 2934
2935 for (i = 0; i < num_pdev_stats; i++) {
2936 const struct wmi_10_4_pdev_stats *src;
2937 struct ath10k_fw_stats_pdev *dst;
2938
2939 src = (void *)skb->data;
2940 if (!skb_pull(skb, sizeof(*src)))
2941 return -EPROTO;
2942
2943 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2944 if (!dst)
2945 continue;
2946
2947 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2948 ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
2949 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2950 dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
2951 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2952
2953 list_add_tail(&dst->list, &stats->pdevs);
2954 }
2955
2956 for (i = 0; i < num_pdev_ext_stats; i++) {
2957 const struct wmi_10_2_pdev_ext_stats *src;
2958
2959 src = (void *)skb->data;
2960 if (!skb_pull(skb, sizeof(*src)))
2961 return -EPROTO;
2962
2963 /* FIXME: expose values to userspace
2964 *
2965 * Note: Even though this loop seems to do nothing it is
2966 * required to parse following sub-structures properly.
2967 */
2968 }
2969
2970 /* fw doesn't implement vdev stats */
2971
2972 for (i = 0; i < num_peer_stats; i++) {
f9575793 2973 const struct wmi_10_4_peer_extd_stats *src;
98dd2b92 2974 struct ath10k_fw_stats_peer *dst;
f9575793
MSS		 2975 int stats_len;
2976 bool extd_peer_stats = !!(stats_id & WMI_10_4_STAT_PEER_EXTD);
2977
2978 if (extd_peer_stats)
2979 stats_len = sizeof(struct wmi_10_4_peer_extd_stats);
2980 else
2981 stats_len = sizeof(struct wmi_10_4_peer_stats);
98dd2b92
MP		 2982
2983 src = (void *)skb->data;
f9575793 2984 if (!skb_pull(skb, stats_len))
98dd2b92
MP		 2985 return -EPROTO;
2986
2987 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2988 if (!dst)
2989 continue;
2990
f9575793 2991 ath10k_wmi_10_4_pull_peer_stats(&src->common, dst);
98dd2b92 2992 /* FIXME: expose 10.4 specific values */
f9575793
MSS		 2993 if (extd_peer_stats)
2994 dst->rx_duration = __le32_to_cpu(src->rx_duration);
98dd2b92
MP		 2995
2996 list_add_tail(&dst->list, &stats->peers);
2997 }
2998
2999 return 0;
3000}
3001
0226d602 3002void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3003{
7aa7a72a 3004 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
60ef401a 3005 ath10k_debug_fw_stats_process(ar, skb);
5e3dd157
KV		 3006}
3007
d7579d12
MK		 3008static int
3009ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
3010 struct wmi_vdev_start_ev_arg *arg)
32653cf1
MK		 3011{
3012 struct wmi_vdev_start_response_event *ev = (void *)skb->data;
3013
3014 if (skb->len < sizeof(*ev))
3015 return -EPROTO;
3016
3017 skb_pull(skb, sizeof(*ev));
3018 arg->vdev_id = ev->vdev_id;
3019 arg->req_id = ev->req_id;
3020 arg->resp_type = ev->resp_type;
3021 arg->status = ev->status;
3022
3023 return 0;
3024}
3025
0226d602 3026void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3027{
32653cf1
MK		 3028 struct wmi_vdev_start_ev_arg arg = {};
3029 int ret;
5e3dd157 3030
7aa7a72a 3031 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
5e3dd157 3032
d7579d12 3033 ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
32653cf1
MK		 3034 if (ret) {
3035 ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
3036 return;
3037 }
5e3dd157 3038
32653cf1 3039 if (WARN_ON(__le32_to_cpu(arg.status)))
5e3dd157
KV		 3040 return;
3041
3042 complete(&ar->vdev_setup_done);
3043}
3044
0226d602 3045void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3046{
7aa7a72a 3047 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
5e3dd157
KV		 3048 complete(&ar->vdev_setup_done);
3049}
3050
d7579d12
MK		 3051static int
3052ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
3053 struct wmi_peer_kick_ev_arg *arg)
32653cf1
MK		 3054{
3055 struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
3056
3057 if (skb->len < sizeof(*ev))
3058 return -EPROTO;
3059
3060 skb_pull(skb, sizeof(*ev));
3061 arg->mac_addr = ev->peer_macaddr.addr;
3062
3063 return 0;
3064}
3065
0226d602 3066void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3067{
32653cf1 3068 struct wmi_peer_kick_ev_arg arg = {};
5a13e76e 3069 struct ieee80211_sta *sta;
32653cf1 3070 int ret;
5a13e76e 3071
d7579d12 3072 ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
32653cf1
MK		 3073 if (ret) {
3074 ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
3075 ret);
3076 return;
3077 }
5a13e76e 3078
7aa7a72a 3079 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
32653cf1 3080 arg.mac_addr);
5a13e76e
KV		 3081
3082 rcu_read_lock();
3083
32653cf1 3084 sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
5a13e76e 3085 if (!sta) {
7aa7a72a 3086 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
32653cf1 3087 arg.mac_addr);
5a13e76e
KV		 3088 goto exit;
3089 }
3090
3091 ieee80211_report_low_ack(sta, 10);
3092
3093exit:
3094 rcu_read_unlock();
5e3dd157
KV		 3095}
3096
3097/*
3098 * FIXME
3099 *
3100 * We don't report to mac80211 sleep state of connected
3101 * stations. Due to this mac80211 can't fill in TIM IE
3102 * correctly.
3103 *
3104 * I know of no way of getting nullfunc frames that contain
3105 * sleep transition from connected stations - these do not
3106 * seem to be sent from the target to the host. There also
3107 * doesn't seem to be a dedicated event for that. So the
3108 * only way left to do this would be to read tim_bitmap
3109 * during SWBA.
3110 *
3111 * We could probably try using tim_bitmap from SWBA to tell
3112 * mac80211 which stations are asleep and which are not. The
3113 * problem here is calling mac80211 functions so many times
3114 * could take too long and make us miss the time to submit
3115 * the beacon to the target.
3116 *
3117 * So as a workaround we try to extend the TIM IE if there
3118 * is unicast buffered for stations with aid > 7 and fill it
3119 * in ourselves.
3120 */
3121static void ath10k_wmi_update_tim(struct ath10k *ar,
3122 struct ath10k_vif *arvif,
3123 struct sk_buff *bcn,
a03fee34 3124 const struct wmi_tim_info_arg *tim_info)
5e3dd157
KV		 3125{
3126 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
3127 struct ieee80211_tim_ie *tim;
3128 u8 *ies, *ie;
3129 u8 ie_len, pvm_len;
af762c0b 3130 __le32 t;
a03fee34
RM		 3131 u32 v, tim_len;
3132
3133 /* When FW reports 0 in tim_len, ensure atleast first byte
3134 * in tim_bitmap is considered for pvm calculation.
3135 */
3136 tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
5e3dd157
KV		 3137
3138 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
3139 * we must copy the bitmap upon change and reuse it later */
32653cf1 3140 if (__le32_to_cpu(tim_info->tim_changed)) {
5e3dd157
KV		 3141 int i;
3142
a03fee34
RM		 3143 if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
3144 ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
3145 tim_len, sizeof(arvif->u.ap.tim_bitmap));
3146 tim_len = sizeof(arvif->u.ap.tim_bitmap);
3147 }
5e3dd157 3148
a03fee34 3149 for (i = 0; i < tim_len; i++) {
32653cf1 3150 t = tim_info->tim_bitmap[i / 4];
af762c0b 3151 v = __le32_to_cpu(t);
5e3dd157
KV		 3152 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
3153 }
3154
a03fee34
RM		 3155 /* FW reports either length 0 or length based on max supported
3156 * station. so we calculate this on our own
3157 */
5e3dd157 3158 arvif->u.ap.tim_len = 0;
a03fee34 3159 for (i = 0; i < tim_len; i++)
5e3dd157
KV		 3160 if (arvif->u.ap.tim_bitmap[i])
3161 arvif->u.ap.tim_len = i;
3162
3163 arvif->u.ap.tim_len++;
3164 }
3165
3166 ies = bcn->data;
3167 ies += ieee80211_hdrlen(hdr->frame_control);
3168 ies += 12; /* fixed parameters */
3169
3170 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
3171 (u8 *)skb_tail_pointer(bcn) - ies);
3172 if (!ie) {
09af8f85 3173 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
7aa7a72a 3174 ath10k_warn(ar, "no tim ie found;\n");
5e3dd157
KV		 3175 return;
3176 }
3177
3178 tim = (void *)ie + 2;
3179 ie_len = ie[1];
3180 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
3181
3182 if (pvm_len < arvif->u.ap.tim_len) {
a03fee34 3183 int expand_size = tim_len - pvm_len;
5e3dd157
KV		 3184 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
3185 void *next_ie = ie + 2 + ie_len;
3186
3187 if (skb_put(bcn, expand_size)) {
3188 memmove(next_ie + expand_size, next_ie, move_size);
3189
3190 ie[1] += expand_size;
3191 ie_len += expand_size;
3192 pvm_len += expand_size;
3193 } else {
7aa7a72a 3194 ath10k_warn(ar, "tim expansion failed\n");
5e3dd157
KV		 3195 }
3196 }
3197
a03fee34 3198 if (pvm_len > tim_len) {
7aa7a72a 3199 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
5e3dd157
KV		 3200 return;
3201 }
3202
32653cf1 3203 tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
5e3dd157
KV		 3204 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
3205
748afc47 3206 if (tim->dtim_count == 0) {
66b8a010 3207 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
748afc47 3208
32653cf1 3209 if (__le32_to_cpu(tim_info->tim_mcast) == 1)
66b8a010 3210 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
748afc47
MK		 3211 }
3212
7aa7a72a 3213 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
5e3dd157
KV		 3214 tim->dtim_count, tim->dtim_period,
3215 tim->bitmap_ctrl, pvm_len);
3216}
3217
5e3dd157
KV		 3218static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
3219 struct sk_buff *bcn,
32653cf1 3220 const struct wmi_p2p_noa_info *noa)
5e3dd157 3221{
08c27be1 3222 if (!arvif->vif->p2p)
5e3dd157
KV		 3223 return;
3224
7aa7a72a 3225 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
5e3dd157 3226
6a94888f
MK		 3227 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
3228 ath10k_p2p_noa_update(arvif, noa);
5e3dd157
KV		 3229
3230 if (arvif->u.ap.noa_data)
3231 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
3232 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
3233 arvif->u.ap.noa_data,
3234 arvif->u.ap.noa_len);
5e3dd157
KV		 3235}
3236
d7579d12
MK		 3237static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
3238 struct wmi_swba_ev_arg *arg)
32653cf1
MK		 3239{
3240 struct wmi_host_swba_event *ev = (void *)skb->data;
3241 u32 map;
3242 size_t i;
3243
3244 if (skb->len < sizeof(*ev))
3245 return -EPROTO;
3246
3247 skb_pull(skb, sizeof(*ev));
3248 arg->vdev_map = ev->vdev_map;
3249
3250 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3251 if (!(map & BIT(0)))
3252 continue;
3253
3254 /* If this happens there were some changes in firmware and
3255 * ath10k should update the max size of tim_info array.
3256 */
3257 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3258 break;
3259
a03fee34
RM		 3260 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3261 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3262 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3263 return -EPROTO;
3264 }
3265
3266 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3267 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3268 arg->tim_info[i].tim_bitmap =
3269 ev->bcn_info[i].tim_info.tim_bitmap;
3270 arg->tim_info[i].tim_changed =
3271 ev->bcn_info[i].tim_info.tim_changed;
3272 arg->tim_info[i].tim_num_ps_pending =
3273 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3274
32653cf1
MK		 3275 arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
3276 i++;
3277 }
3278
3279 return 0;
3280}
3281
8b019fb0
YL		 3282static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
3283 struct sk_buff *skb,
3284 struct wmi_swba_ev_arg *arg)
3285{
3286 struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
3287 u32 map;
3288 size_t i;
3289
3290 if (skb->len < sizeof(*ev))
3291 return -EPROTO;
3292
3293 skb_pull(skb, sizeof(*ev));
3294 arg->vdev_map = ev->vdev_map;
3295
3296 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3297 if (!(map & BIT(0)))
3298 continue;
3299
3300 /* If this happens there were some changes in firmware and
3301 * ath10k should update the max size of tim_info array.
3302 */
3303 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3304 break;
3305
3306 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3307 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3308 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3309 return -EPROTO;
3310 }
3311
3312 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3313 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3314 arg->tim_info[i].tim_bitmap =
3315 ev->bcn_info[i].tim_info.tim_bitmap;
3316 arg->tim_info[i].tim_changed =
3317 ev->bcn_info[i].tim_info.tim_changed;
3318 arg->tim_info[i].tim_num_ps_pending =
3319 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3320 i++;
3321 }
3322
3323 return 0;
3324}
3325
3cec3be3
RM		 3326static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
3327 struct sk_buff *skb,
3328 struct wmi_swba_ev_arg *arg)
3329{
3330 struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
3331 u32 map, tim_len;
3332 size_t i;
3333
3334 if (skb->len < sizeof(*ev))
3335 return -EPROTO;
3336
3337 skb_pull(skb, sizeof(*ev));
3338 arg->vdev_map = ev->vdev_map;
3339
3340 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3341 if (!(map & BIT(0)))
3342 continue;
3343
3344 /* If this happens there were some changes in firmware and
3345 * ath10k should update the max size of tim_info array.
3346 */
3347 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3348 break;
3349
3350 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3351 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3352 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3353 return -EPROTO;
3354 }
3355
3356 tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
3357 if (tim_len) {
3358 /* Exclude 4 byte guard length */
3359 tim_len -= 4;
3360 arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
3361 } else {
3362 arg->tim_info[i].tim_len = 0;
3363 }
3364
3365 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3366 arg->tim_info[i].tim_bitmap =
3367 ev->bcn_info[i].tim_info.tim_bitmap;
3368 arg->tim_info[i].tim_changed =
3369 ev->bcn_info[i].tim_info.tim_changed;
3370 arg->tim_info[i].tim_num_ps_pending =
3371 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3372
3373 /* 10.4 firmware doesn't have p2p support. notice of absence
3374 * info can be ignored for now.
3375 */
3376
3377 i++;
3378 }
3379
3380 return 0;
3381}
3382
08e75ea8
VN		 3383static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
3384{
3385 return WMI_TXBF_CONF_BEFORE_ASSOC;
3386}
3387
0226d602 3388void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3389{
32653cf1 3390 struct wmi_swba_ev_arg arg = {};
5e3dd157
KV		 3391 u32 map;
3392 int i = -1;
a03fee34 3393 const struct wmi_tim_info_arg *tim_info;
32653cf1 3394 const struct wmi_p2p_noa_info *noa_info;
5e3dd157 3395 struct ath10k_vif *arvif;
5e3dd157 3396 struct sk_buff *bcn;
64badcb6 3397 dma_addr_t paddr;
767d34fc 3398 int ret, vdev_id = 0;
5e3dd157 3399
d7579d12 3400 ret = ath10k_wmi_pull_swba(ar, skb, &arg);
32653cf1
MK		 3401 if (ret) {
3402 ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
3403 return;
3404 }
3405
3406 map = __le32_to_cpu(arg.vdev_map);
5e3dd157 3407
7aa7a72a 3408 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
32653cf1 3409 map);
5e3dd157
KV		 3410
3411 for (; map; map >>= 1, vdev_id++) {
3412 if (!(map & 0x1))
3413 continue;
3414
3415 i++;
3416
3417 if (i >= WMI_MAX_AP_VDEV) {
7aa7a72a 3418 ath10k_warn(ar, "swba has corrupted vdev map\n");
5e3dd157
KV		 3419 break;
3420 }
3421
a03fee34 3422 tim_info = &arg.tim_info[i];
32653cf1 3423 noa_info = arg.noa_info[i];
5e3dd157 3424
7aa7a72a 3425 ath10k_dbg(ar, ATH10K_DBG_MGMT,
7a8a396b 3426 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
5e3dd157 3427 i,
32653cf1
MK		 3428 __le32_to_cpu(tim_info->tim_len),
3429 __le32_to_cpu(tim_info->tim_mcast),
3430 __le32_to_cpu(tim_info->tim_changed),
3431 __le32_to_cpu(tim_info->tim_num_ps_pending),
3432 __le32_to_cpu(tim_info->tim_bitmap[3]),
3433 __le32_to_cpu(tim_info->tim_bitmap[2]),
3434 __le32_to_cpu(tim_info->tim_bitmap[1]),
3435 __le32_to_cpu(tim_info->tim_bitmap[0]));
5e3dd157 3436
a03fee34
RM		 3437 /* TODO: Only first 4 word from tim_bitmap is dumped.
3438 * Extend debug code to dump full tim_bitmap.
3439 */
3440
5e3dd157
KV		 3441 arvif = ath10k_get_arvif(ar, vdev_id);
3442 if (arvif == NULL) {
7aa7a72a
MK		 3443 ath10k_warn(ar, "no vif for vdev_id %d found\n",
3444 vdev_id);
5e3dd157
KV		 3445 continue;
3446 }
3447
c2df44b3
MK		 3448 /* There are no completions for beacons so wait for next SWBA
3449 * before telling mac80211 to decrement CSA counter
3450 *
3451 * Once CSA counter is completed stop sending beacons until
3452 * actual channel switch is done */
3453 if (arvif->vif->csa_active &&
3454 ieee80211_csa_is_complete(arvif->vif)) {
3455 ieee80211_csa_finish(arvif->vif);
3456 continue;
3457 }
3458
5e3dd157
KV		 3459 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
3460 if (!bcn) {
7aa7a72a 3461 ath10k_warn(ar, "could not get mac80211 beacon\n");
5e3dd157
KV		 3462 continue;
3463 }
3464
4b604558 3465 ath10k_tx_h_seq_no(arvif->vif, bcn);
32653cf1
MK		 3466 ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
3467 ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
5e3dd157 3468
ed54388a 3469 spin_lock_bh(&ar->data_lock);
748afc47 3470
ed54388a 3471 if (arvif->beacon) {
af21319f
MK		 3472 switch (arvif->beacon_state) {
3473 case ATH10K_BEACON_SENT:
3474 break;
3475 case ATH10K_BEACON_SCHEDULED:
3476 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
3477 arvif->vdev_id);
3478 break;
3479 case ATH10K_BEACON_SENDING:
3480 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
748afc47 3481 arvif->vdev_id);
af21319f
MK		 3482 dev_kfree_skb(bcn);
3483 goto skip;
3484 }
748afc47 3485
64badcb6 3486 ath10k_mac_vif_beacon_free(arvif);
ed54388a 3487 }
5e3dd157 3488
64badcb6
MK		 3489 if (!arvif->beacon_buf) {
3490 paddr = dma_map_single(arvif->ar->dev, bcn->data,
3491 bcn->len, DMA_TO_DEVICE);
3492 ret = dma_mapping_error(arvif->ar->dev, paddr);
3493 if (ret) {
3494 ath10k_warn(ar, "failed to map beacon: %d\n",
3495 ret);
3496 dev_kfree_skb_any(bcn);
5e55e3cb 3497 ret = -EIO;
64badcb6
MK		 3498 goto skip;
3499 }
3500
3501 ATH10K_SKB_CB(bcn)->paddr = paddr;
3502 } else {
3503 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
3504 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
3505 bcn->len, IEEE80211_MAX_FRAME_LEN);
3506 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
3507 }
3508 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
3509 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
767d34fc 3510 }
748afc47 3511
ed54388a 3512 arvif->beacon = bcn;
af21319f 3513 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
5e3dd157 3514
5ce8e7fd
RM		 3515 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
3516 trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
3517
767d34fc 3518skip:
ed54388a 3519 spin_unlock_bh(&ar->data_lock);
5e3dd157 3520 }
af21319f
MK		 3521
3522 ath10k_wmi_tx_beacons_nowait(ar);
5e3dd157
KV		 3523}
3524
0226d602 3525void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3526{
7aa7a72a 3527 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
5e3dd157
KV		 3528}
3529
9702c686 3530static void ath10k_dfs_radar_report(struct ath10k *ar,
991adf71 3531 struct wmi_phyerr_ev_arg *phyerr,
2332d0ae 3532 const struct phyerr_radar_report *rr,
9702c686
JD		 3533 u64 tsf)
3534{
3535 u32 reg0, reg1, tsf32l;
500ff9f9 3536 struct ieee80211_channel *ch;
9702c686
JD		 3537 struct pulse_event pe;
3538 u64 tsf64;
3539 u8 rssi, width;
3540
3541 reg0 = __le32_to_cpu(rr->reg0);
3542 reg1 = __le32_to_cpu(rr->reg1);
3543
7aa7a72a 3544 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3545 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
3546 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
3547 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
3548 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
3549 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
7aa7a72a 3550 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3551 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
3552 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
3553 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
3554 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
3555 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
3556 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
7aa7a72a 3557 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3558 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
3559 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
3560 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
3561
3562 if (!ar->dfs_detector)
3563 return;
3564
500ff9f9
MK		 3565 spin_lock_bh(&ar->data_lock);
3566 ch = ar->rx_channel;
3567 spin_unlock_bh(&ar->data_lock);
3568
3569 if (!ch) {
3570 ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
3571 goto radar_detected;
3572 }
3573
9702c686 3574 /* report event to DFS pattern detector */
991adf71 3575 tsf32l = phyerr->tsf_timestamp;
9702c686
JD		 3576 tsf64 = tsf & (~0xFFFFFFFFULL);
3577 tsf64 |= tsf32l;
3578
3579 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
2332d0ae 3580 rssi = phyerr->rssi_combined;
9702c686
JD		 3581
3582 /* hardware store this as 8 bit signed value,
3583 * set to zero if negative number
3584 */
3585 if (rssi & 0x80)
3586 rssi = 0;
3587
3588 pe.ts = tsf64;
500ff9f9 3589 pe.freq = ch->center_freq;
9702c686
JD		 3590 pe.width = width;
3591 pe.rssi = rssi;
2c3f26a0 3592 pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
7aa7a72a 3593 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3594 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
3595 pe.freq, pe.width, pe.rssi, pe.ts);
3596
3597 ATH10K_DFS_STAT_INC(ar, pulses_detected);
3598
3599 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
7aa7a72a 3600 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3601 "dfs no pulse pattern detected, yet\n");
3602 return;
3603 }
3604
500ff9f9 3605radar_detected:
7aa7a72a 3606 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
9702c686 3607 ATH10K_DFS_STAT_INC(ar, radar_detected);
7d9b40b4
MP		 3608
3609 /* Control radar events reporting in debugfs file
3610 dfs_block_radar_events */
3611 if (ar->dfs_block_radar_events) {
7aa7a72a 3612 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
7d9b40b4
MP		 3613 return;
3614 }
3615
9702c686
JD		 3616 ieee80211_radar_detected(ar->hw);
3617}
3618
3619static int ath10k_dfs_fft_report(struct ath10k *ar,
991adf71 3620 struct wmi_phyerr_ev_arg *phyerr,
2332d0ae 3621 const struct phyerr_fft_report *fftr,
9702c686
JD		 3622 u64 tsf)
3623{
3624 u32 reg0, reg1;
3625 u8 rssi, peak_mag;
3626
3627 reg0 = __le32_to_cpu(fftr->reg0);
3628 reg1 = __le32_to_cpu(fftr->reg1);
2332d0ae 3629 rssi = phyerr->rssi_combined;
9702c686 3630
7aa7a72a 3631 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3632 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
3633 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
3634 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
3635 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
3636 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
7aa7a72a 3637 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3638 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
3639 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
3640 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
3641 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
3642 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
3643
3644 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
3645
3646 /* false event detection */
3647 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
3648 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
7aa7a72a 3649 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
9702c686
JD		 3650 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
3651 return -EINVAL;
3652 }
3653
3654 return 0;
3655}
3656
0226d602 3657void ath10k_wmi_event_dfs(struct ath10k *ar,
991adf71 3658 struct wmi_phyerr_ev_arg *phyerr,
0226d602 3659 u64 tsf)
9702c686
JD		 3660{
3661 int buf_len, tlv_len, res, i = 0;
2332d0ae
MK		 3662 const struct phyerr_tlv *tlv;
3663 const struct phyerr_radar_report *rr;
3664 const struct phyerr_fft_report *fftr;
3665 const u8 *tlv_buf;
9702c686 3666
991adf71 3667 buf_len = phyerr->buf_len;
7aa7a72a 3668 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686 3669 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
2332d0ae 3670 phyerr->phy_err_code, phyerr->rssi_combined,
991adf71 3671 phyerr->tsf_timestamp, tsf, buf_len);
9702c686
JD		 3672
3673 /* Skip event if DFS disabled */
3674 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
3675 return;
3676
3677 ATH10K_DFS_STAT_INC(ar, pulses_total);
3678
3679 while (i < buf_len) {
3680 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a
MK		 3681 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
3682 i);
9702c686
JD		 3683 return;
3684 }
3685
2332d0ae 3686 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
9702c686 3687 tlv_len = __le16_to_cpu(tlv->len);
2332d0ae 3688 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
7aa7a72a 3689 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 3690 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
3691 tlv_len, tlv->tag, tlv->sig);
3692
3693 switch (tlv->tag) {
3694 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
3695 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
7aa7a72a 3696 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
9702c686
JD		 3697 i);
3698 return;
3699 }
3700
3701 rr = (struct phyerr_radar_report *)tlv_buf;
2332d0ae 3702 ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
9702c686
JD		 3703 break;
3704 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
3705 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
7aa7a72a
MK		 3706 ath10k_warn(ar, "too short fft report (%d)\n",
3707 i);
9702c686
JD		 3708 return;
3709 }
3710
3711 fftr = (struct phyerr_fft_report *)tlv_buf;
2332d0ae 3712 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
9702c686
JD		 3713 if (res)
3714 return;
3715 break;
3716 }
3717
3718 i += sizeof(*tlv) + tlv_len;
3719 }
3720}
3721
0226d602 3722void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
991adf71 3723 struct wmi_phyerr_ev_arg *phyerr,
0226d602 3724 u64 tsf)
9702c686 3725{
855aed12
SW		 3726 int buf_len, tlv_len, res, i = 0;
3727 struct phyerr_tlv *tlv;
2332d0ae
MK		 3728 const void *tlv_buf;
3729 const struct phyerr_fft_report *fftr;
855aed12
SW		 3730 size_t fftr_len;
3731
991adf71 3732 buf_len = phyerr->buf_len;
855aed12
SW		 3733
3734 while (i < buf_len) {
3735 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a 3736 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
855aed12
SW		 3737 i);
3738 return;
3739 }
3740
2332d0ae 3741 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
855aed12 3742 tlv_len = __le16_to_cpu(tlv->len);
2332d0ae 3743 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
855aed12
SW		 3744
3745 if (i + sizeof(*tlv) + tlv_len > buf_len) {
7aa7a72a 3746 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
855aed12
SW		 3747 i);
3748 return;
3749 }
3750
3751 switch (tlv->tag) {
3752 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
3753 if (sizeof(*fftr) > tlv_len) {
7aa7a72a 3754 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
855aed12
SW		 3755 i);
3756 return;
3757 }
3758
3759 fftr_len = tlv_len - sizeof(*fftr);
2332d0ae
MK		 3760 fftr = tlv_buf;
3761 res = ath10k_spectral_process_fft(ar, phyerr,
855aed12
SW		 3762 fftr, fftr_len,
3763 tsf);
3764 if (res < 0) {
3413e97d 3765 ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
617b0f4d 3766 res);
855aed12
SW		 3767 return;
3768 }
3769 break;
3770 }
3771
3772 i += sizeof(*tlv) + tlv_len;
3773 }
9702c686
JD		 3774}
3775
991adf71
RM		 3776static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
3777 struct sk_buff *skb,
3778 struct wmi_phyerr_hdr_arg *arg)
32653cf1
MK		 3779{
3780 struct wmi_phyerr_event *ev = (void *)skb->data;
3781
3782 if (skb->len < sizeof(*ev))
3783 return -EPROTO;
3784
991adf71
RM		 3785 arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
3786 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
3787 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
3788 arg->buf_len = skb->len - sizeof(*ev);
32653cf1
MK		 3789 arg->phyerrs = ev->phyerrs;
3790
3791 return 0;
3792}
3793
2b0a2e0d
RM		 3794static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
3795 struct sk_buff *skb,
3796 struct wmi_phyerr_hdr_arg *arg)
3797{
3798 struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
3799
3800 if (skb->len < sizeof(*ev))
3801 return -EPROTO;
3802
3803 /* 10.4 firmware always reports only one phyerr */
3804 arg->num_phyerrs = 1;
3805
3806 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
3807 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
3808 arg->buf_len = skb->len;
3809 arg->phyerrs = skb->data;
3810
3811 return 0;
3812}
3813
991adf71
RM		 3814int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
3815 const void *phyerr_buf,
3816 int left_len,
3817 struct wmi_phyerr_ev_arg *arg)
3818{
3819 const struct wmi_phyerr *phyerr = phyerr_buf;
3820 int i;
3821
3822 if (left_len < sizeof(*phyerr)) {
ee92a209 3823 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
991adf71
RM		 3824 left_len, sizeof(*phyerr));
3825 return -EINVAL;
3826 }
3827
3828 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
3829 arg->freq1 = __le16_to_cpu(phyerr->freq1);
3830 arg->freq2 = __le16_to_cpu(phyerr->freq2);
3831 arg->rssi_combined = phyerr->rssi_combined;
3832 arg->chan_width_mhz = phyerr->chan_width_mhz;
3833 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
3834 arg->buf = phyerr->buf;
3835 arg->hdr_len = sizeof(*phyerr);
3836
3837 for (i = 0; i < 4; i++)
3838 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
3839
3840 switch (phyerr->phy_err_code) {
3841 case PHY_ERROR_GEN_SPECTRAL_SCAN:
3842 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
3843 break;
3844 case PHY_ERROR_GEN_FALSE_RADAR_EXT:
3845 arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
3846 break;
3847 case PHY_ERROR_GEN_RADAR:
3848 arg->phy_err_code = PHY_ERROR_RADAR;
3849 break;
3850 default:
3851 arg->phy_err_code = PHY_ERROR_UNKNOWN;
3852 break;
3853 }
3854
3855 return 0;
3856}
3857
2b0a2e0d
RM		 3858static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
3859 const void *phyerr_buf,
3860 int left_len,
3861 struct wmi_phyerr_ev_arg *arg)
3862{
3863 const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
3864 u32 phy_err_mask;
3865 int i;
3866
3867 if (left_len < sizeof(*phyerr)) {
ee92a209 3868 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
2b0a2e0d
RM		 3869 left_len, sizeof(*phyerr));
3870 return -EINVAL;
3871 }
3872
3873 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
3874 arg->freq1 = __le16_to_cpu(phyerr->freq1);
3875 arg->freq2 = __le16_to_cpu(phyerr->freq2);
3876 arg->rssi_combined = phyerr->rssi_combined;
3877 arg->chan_width_mhz = phyerr->chan_width_mhz;
3878 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
3879 arg->buf = phyerr->buf;
3880 arg->hdr_len = sizeof(*phyerr);
3881
3882 for (i = 0; i < 4; i++)
3883 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
3884
3885 phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
3886
3887 if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
3888 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
3889 else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
3890 arg->phy_err_code = PHY_ERROR_RADAR;
3891 else
3892 arg->phy_err_code = PHY_ERROR_UNKNOWN;
3893
3894 return 0;
3895}
3896
0226d602 3897void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3898{
991adf71
RM		 3899 struct wmi_phyerr_hdr_arg hdr_arg = {};
3900 struct wmi_phyerr_ev_arg phyerr_arg = {};
3901 const void *phyerr;
9702c686
JD		 3902 u32 count, i, buf_len, phy_err_code;
3903 u64 tsf;
32653cf1 3904 int left_len, ret;
9702c686
JD		 3905
3906 ATH10K_DFS_STAT_INC(ar, phy_errors);
3907
991adf71 3908 ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
32653cf1 3909 if (ret) {
991adf71 3910 ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
9702c686
JD		 3911 return;
3912 }
3913
9702c686 3914 /* Check number of included events */
991adf71 3915 count = hdr_arg.num_phyerrs;
9702c686 3916
991adf71
RM		 3917 left_len = hdr_arg.buf_len;
3918
3919 tsf = hdr_arg.tsf_u32;
9702c686 3920 tsf <<= 32;
991adf71 3921 tsf |= hdr_arg.tsf_l32;
9702c686 3922
7aa7a72a 3923 ath10k_dbg(ar, ATH10K_DBG_WMI,
9702c686
JD		 3924 "wmi event phyerr count %d tsf64 0x%llX\n",
3925 count, tsf);
3926
991adf71 3927 phyerr = hdr_arg.phyerrs;
9702c686 3928 for (i = 0; i < count; i++) {
991adf71
RM		 3929 ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
3930 if (ret) {
3931 ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
7aa7a72a 3932 i);
9702c686
JD		 3933 return;
3934 }
3935
991adf71
RM		 3936 left_len -= phyerr_arg.hdr_len;
3937 buf_len = phyerr_arg.buf_len;
3938 phy_err_code = phyerr_arg.phy_err_code;
9702c686
JD		 3939
3940 if (left_len < buf_len) {
7aa7a72a 3941 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
9702c686
JD		 3942 return;
3943 }
3944
3945 left_len -= buf_len;
3946
3947 switch (phy_err_code) {
3948 case PHY_ERROR_RADAR:
991adf71 3949 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
9702c686
JD		 3950 break;
3951 case PHY_ERROR_SPECTRAL_SCAN:
991adf71 3952 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
9702c686
JD		 3953 break;
3954 case PHY_ERROR_FALSE_RADAR_EXT:
991adf71
RM		 3955 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
3956 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
9702c686
JD		 3957 break;
3958 default:
3959 break;
3960 }
3961
991adf71 3962 phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
9702c686 3963 }
5e3dd157
KV		 3964}
3965
0226d602 3966void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3967{
c1a4654a
MK		 3968 struct wmi_roam_ev_arg arg = {};
3969 int ret;
3970 u32 vdev_id;
3971 u32 reason;
3972 s32 rssi;
3973
3974 ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
3975 if (ret) {
3976 ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
3977 return;
3978 }
3979
3980 vdev_id = __le32_to_cpu(arg.vdev_id);
3981 reason = __le32_to_cpu(arg.reason);
3982 rssi = __le32_to_cpu(arg.rssi);
3983 rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
3984
3985 ath10k_dbg(ar, ATH10K_DBG_WMI,
3986 "wmi roam event vdev %u reason 0x%08x rssi %d\n",
3987 vdev_id, reason, rssi);
3988
3989 if (reason >= WMI_ROAM_REASON_MAX)
3990 ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
3991 reason, vdev_id);
3992
3993 switch (reason) {
c1a4654a 3994 case WMI_ROAM_REASON_BEACON_MISS:
cc9904e6
MK		 3995 ath10k_mac_handle_beacon_miss(ar, vdev_id);
3996 break;
3997 case WMI_ROAM_REASON_BETTER_AP:
c1a4654a
MK		 3998 case WMI_ROAM_REASON_LOW_RSSI:
3999 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
4000 case WMI_ROAM_REASON_HO_FAILED:
4001 ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
4002 reason, vdev_id);
4003 break;
4004 }
5e3dd157
KV		 4005}
4006
0226d602 4007void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4008{
7aa7a72a 4009 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
5e3dd157
KV		 4010}
4011
0226d602 4012void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4013{
2fe5288c
KV		 4014 char buf[101], c;
4015 int i;
4016
4017 for (i = 0; i < sizeof(buf) - 1; i++) {
4018 if (i >= skb->len)
4019 break;
4020
4021 c = skb->data[i];
4022
4023 if (c == '\0')
4024 break;
4025
4026 if (isascii(c) && isprint(c))
4027 buf[i] = c;
4028 else
4029 buf[i] = '.';
4030 }
4031
4032 if (i == sizeof(buf) - 1)
7aa7a72a 4033 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
2fe5288c
KV		 4034
4035 /* for some reason the debug prints end with \n, remove that */
4036 if (skb->data[i - 1] == '\n')
4037 i--;
4038
4039 /* the last byte is always reserved for the null character */
4040 buf[i] = '\0';
4041
3be004c3 4042 ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
5e3dd157
KV		 4043}
4044
0226d602 4045void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4046{
7aa7a72a 4047 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
5e3dd157
KV		 4048}
4049
0226d602 4050void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4051{
7aa7a72a 4052 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
5e3dd157
KV		 4053}
4054
0226d602
MK		 4055void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
4056 struct sk_buff *skb)
5e3dd157 4057{
7aa7a72a 4058 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 4059}
4060
0226d602
MK		 4061void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
4062 struct sk_buff *skb)
5e3dd157 4063{
7aa7a72a 4064 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 4065}
4066
0226d602 4067void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4068{
7aa7a72a 4069 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
5e3dd157
KV		 4070}
4071
0226d602 4072void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4073{
5fd3ac3c
JD		 4074 struct wmi_wow_ev_arg ev = {};
4075 int ret;
4076
4077 complete(&ar->wow.wakeup_completed);
4078
4079 ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
4080 if (ret) {
4081 ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
4082 return;
4083 }
4084
4085 ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
4086 wow_reason(ev.wake_reason));
5e3dd157
KV		 4087}
4088
0226d602 4089void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4090{
7aa7a72a 4091 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
5e3dd157
KV		 4092}
4093
29542666
MK		 4094static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
4095 struct wmi_pdev_tpc_config_event *ev,
4096 u32 rate_idx, u32 num_chains,
4097 u32 rate_code, u8 type)
4098{
4099 u8 tpc, num_streams, preamble, ch, stm_idx;
4100
4101 num_streams = ATH10K_HW_NSS(rate_code);
4102 preamble = ATH10K_HW_PREAMBLE(rate_code);
4103 ch = num_chains - 1;
4104
4105 tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
4106
4107 if (__le32_to_cpu(ev->num_tx_chain) <= 1)
4108 goto out;
4109
4110 if (preamble == WMI_RATE_PREAMBLE_CCK)
4111 goto out;
4112
4113 stm_idx = num_streams - 1;
4114 if (num_chains <= num_streams)
4115 goto out;
4116
4117 switch (type) {
4118 case WMI_TPC_TABLE_TYPE_STBC:
4119 tpc = min_t(u8, tpc,
4120 ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
4121 break;
4122 case WMI_TPC_TABLE_TYPE_TXBF:
4123 tpc = min_t(u8, tpc,
4124 ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
4125 break;
4126 case WMI_TPC_TABLE_TYPE_CDD:
4127 tpc = min_t(u8, tpc,
4128 ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
4129 break;
4130 default:
4131 ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
4132 tpc = 0;
4133 break;
4134 }
4135
4136out:
4137 return tpc;
4138}
4139
4140static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
4141 struct wmi_pdev_tpc_config_event *ev,
4142 struct ath10k_tpc_stats *tpc_stats,
4143 u8 *rate_code, u16 *pream_table, u8 type)
4144{
4145 u32 i, j, pream_idx, flags;
4146 u8 tpc[WMI_TPC_TX_N_CHAIN];
4147 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
4148 char buff[WMI_TPC_BUF_SIZE];
4149
4150 flags = __le32_to_cpu(ev->flags);
4151
4152 switch (type) {
4153 case WMI_TPC_TABLE_TYPE_CDD:
4154 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
4155 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
4156 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4157 return;
4158 }
4159 break;
4160 case WMI_TPC_TABLE_TYPE_STBC:
4161 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
4162 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
4163 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4164 return;
4165 }
4166 break;
4167 case WMI_TPC_TABLE_TYPE_TXBF:
4168 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
4169 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
4170 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4171 return;
4172 }
4173 break;
4174 default:
4175 ath10k_dbg(ar, ATH10K_DBG_WMI,
4176 "invalid table type in wmi tpc event: %d\n", type);
4177 return;
4178 }
4179
4180 pream_idx = 0;
4181 for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
4182 memset(tpc_value, 0, sizeof(tpc_value));
4183 memset(buff, 0, sizeof(buff));
4184 if (i == pream_table[pream_idx])
4185 pream_idx++;
4186
4187 for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
4188 if (j >= __le32_to_cpu(ev->num_tx_chain))
4189 break;
4190
4191 tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
4192 rate_code[i],
4193 type);
4194 snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
4195 strncat(tpc_value, buff, strlen(buff));
4196 }
4197 tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
4198 tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
4199 memcpy(tpc_stats->tpc_table[type].tpc_value[i],
4200 tpc_value, sizeof(tpc_value));
4201 }
4202}
4203
0226d602 4204void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4205{
29542666
MK		 4206 u32 i, j, pream_idx, num_tx_chain;
4207 u8 rate_code[WMI_TPC_RATE_MAX], rate_idx;
4208 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
4209 struct wmi_pdev_tpc_config_event *ev;
4210 struct ath10k_tpc_stats *tpc_stats;
4211
4212 ev = (struct wmi_pdev_tpc_config_event *)skb->data;
4213
4214 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
4215 if (!tpc_stats)
4216 return;
4217
4218 /* Create the rate code table based on the chains supported */
4219 rate_idx = 0;
4220 pream_idx = 0;
4221
4222 /* Fill CCK rate code */
4223 for (i = 0; i < 4; i++) {
4224 rate_code[rate_idx] =
4225 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
4226 rate_idx++;
4227 }
4228 pream_table[pream_idx] = rate_idx;
4229 pream_idx++;
4230
4231 /* Fill OFDM rate code */
4232 for (i = 0; i < 8; i++) {
4233 rate_code[rate_idx] =
4234 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
4235 rate_idx++;
4236 }
4237 pream_table[pream_idx] = rate_idx;
4238 pream_idx++;
4239
4240 num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4241
4242 /* Fill HT20 rate code */
4243 for (i = 0; i < num_tx_chain; i++) {
4244 for (j = 0; j < 8; j++) {
4245 rate_code[rate_idx] =
4246 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4247 rate_idx++;
4248 }
4249 }
4250 pream_table[pream_idx] = rate_idx;
4251 pream_idx++;
4252
4253 /* Fill HT40 rate code */
4254 for (i = 0; i < num_tx_chain; i++) {
4255 for (j = 0; j < 8; j++) {
4256 rate_code[rate_idx] =
4257 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4258 rate_idx++;
4259 }
4260 }
4261 pream_table[pream_idx] = rate_idx;
4262 pream_idx++;
4263
4264 /* Fill VHT20 rate code */
4265 for (i = 0; i < __le32_to_cpu(ev->num_tx_chain); i++) {
4266 for (j = 0; j < 10; j++) {
4267 rate_code[rate_idx] =
4268 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4269 rate_idx++;
4270 }
4271 }
4272 pream_table[pream_idx] = rate_idx;
4273 pream_idx++;
4274
4275 /* Fill VHT40 rate code */
4276 for (i = 0; i < num_tx_chain; i++) {
4277 for (j = 0; j < 10; j++) {
4278 rate_code[rate_idx] =
4279 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4280 rate_idx++;
4281 }
4282 }
4283 pream_table[pream_idx] = rate_idx;
4284 pream_idx++;
4285
4286 /* Fill VHT80 rate code */
4287 for (i = 0; i < num_tx_chain; i++) {
4288 for (j = 0; j < 10; j++) {
4289 rate_code[rate_idx] =
4290 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4291 rate_idx++;
4292 }
4293 }
4294 pream_table[pream_idx] = rate_idx;
4295 pream_idx++;
4296
4297 rate_code[rate_idx++] =
4298 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4299 rate_code[rate_idx++] =
4300 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4301 rate_code[rate_idx++] =
4302 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4303 rate_code[rate_idx++] =
4304 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4305 rate_code[rate_idx++] =
4306 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4307
4308 pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
4309
4310 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
4311 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
4312 tpc_stats->ctl = __le32_to_cpu(ev->ctl);
4313 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
4314 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
4315 tpc_stats->twice_antenna_reduction =
4316 __le32_to_cpu(ev->twice_antenna_reduction);
4317 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
4318 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
4319 tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4320 tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
4321
4322 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4323 rate_code, pream_table,
4324 WMI_TPC_TABLE_TYPE_CDD);
4325 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4326 rate_code, pream_table,
4327 WMI_TPC_TABLE_TYPE_STBC);
4328 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4329 rate_code, pream_table,
4330 WMI_TPC_TABLE_TYPE_TXBF);
4331
4332 ath10k_debug_tpc_stats_process(ar, tpc_stats);
4333
4334 ath10k_dbg(ar, ATH10K_DBG_WMI,
4335 "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
4336 __le32_to_cpu(ev->chan_freq),
4337 __le32_to_cpu(ev->phy_mode),
4338 __le32_to_cpu(ev->ctl),
4339 __le32_to_cpu(ev->reg_domain),
4340 a_sle32_to_cpu(ev->twice_antenna_gain),
4341 __le32_to_cpu(ev->twice_antenna_reduction),
4342 __le32_to_cpu(ev->power_limit),
4343 __le32_to_cpu(ev->twice_max_rd_power) / 2,
4344 __le32_to_cpu(ev->num_tx_chain),
4345 __le32_to_cpu(ev->rate_max));
5e3dd157
KV		 4346}
4347
0226d602 4348void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4349{
7aa7a72a 4350 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5e3dd157
KV		 4351}
4352
0226d602 4353void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4354{
7aa7a72a 4355 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5e3dd157
KV		 4356}
4357
0226d602 4358void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4359{
7aa7a72a 4360 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5e3dd157
KV		 4361}
4362
0226d602 4363void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4364{
7aa7a72a 4365 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 4366}
4367
0226d602 4368void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 4369{
7aa7a72a 4370 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 4371}
4372
0226d602
MK		 4373void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
4374 struct sk_buff *skb)
5e3dd157 4375{
7aa7a72a 4376 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5e3dd157
KV		 4377}
4378
0226d602 4379void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 4380{
7aa7a72a 4381 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
8a6618b0
BM		 4382}
4383
0226d602 4384void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 4385{
7aa7a72a 4386 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
8a6618b0
BM		 4387}
4388
0226d602 4389void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 4390{
7aa7a72a 4391 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
8a6618b0
BM		 4392}
4393
b0578865
FF		 4394static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
4395 u32 num_units, u32 unit_len)
b3effe61
BM		 4396{
4397 dma_addr_t paddr;
b0578865 4398 u32 pool_size = 0;
b3effe61 4399 int idx = ar->wmi.num_mem_chunks;
b0578865 4400 void *vaddr = NULL;
b3effe61 4401
b0578865
FF		 4402 if (ar->wmi.num_mem_chunks == ARRAY_SIZE(ar->wmi.mem_chunks))
4403 return -ENOMEM;
b3effe61 4404
b0578865
FF		 4405 while (!vaddr && num_units) {
4406 pool_size = num_units * round_up(unit_len, 4);
4407 if (!pool_size)
4408 return -EINVAL;
b3effe61 4409
b0578865
FF		 4410 vaddr = kzalloc(pool_size, GFP_KERNEL | __GFP_NOWARN);
4411 if (!vaddr)
4412 num_units /= 2;
b3effe61
BM		 4413 }
4414
b0578865
FF		 4415 if (!num_units)
4416 return -ENOMEM;
4417
4418 paddr = dma_map_single(ar->dev, vaddr, pool_size, DMA_TO_DEVICE);
4419 if (dma_mapping_error(ar->dev, paddr)) {
4420 kfree(vaddr);
4421 return -ENOMEM;
4422 }
b3effe61 4423
b0578865 4424 ar->wmi.mem_chunks[idx].vaddr = vaddr;
b3effe61
BM		 4425 ar->wmi.mem_chunks[idx].paddr = paddr;
4426 ar->wmi.mem_chunks[idx].len = pool_size;
4427 ar->wmi.mem_chunks[idx].req_id = req_id;
4428 ar->wmi.num_mem_chunks++;
4429
b0578865
FF		 4430 return num_units;
4431}
4432
4433static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
4434 u32 num_units, u32 unit_len)
4435{
4436 int ret;
4437
4438 while (num_units) {
4439 ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
4440 if (ret < 0)
4441 return ret;
4442
4443 num_units -= ret;
4444 }
4445
b3effe61
BM		 4446 return 0;
4447}
4448
a925a376
VT		 4449static bool
4450ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
4451 const struct wlan_host_mem_req **mem_reqs,
4452 u32 num_mem_reqs)
4453{
4454 u32 req_id, num_units, unit_size, num_unit_info;
4455 u32 pool_size;
4456 int i, j;
4457 bool found;
4458
4459 if (ar->wmi.num_mem_chunks != num_mem_reqs)
4460 return false;
4461
4462 for (i = 0; i < num_mem_reqs; ++i) {
4463 req_id = __le32_to_cpu(mem_reqs[i]->req_id);
4464 num_units = __le32_to_cpu(mem_reqs[i]->num_units);
4465 unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
4466 num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
4467
4468 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
4469 if (ar->num_active_peers)
4470 num_units = ar->num_active_peers + 1;
4471 else
4472 num_units = ar->max_num_peers + 1;
4473 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
4474 num_units = ar->max_num_peers + 1;
4475 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
4476 num_units = ar->max_num_vdevs + 1;
4477 }
4478
4479 found = false;
4480 for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
4481 if (ar->wmi.mem_chunks[j].req_id == req_id) {
4482 pool_size = num_units * round_up(unit_size, 4);
4483 if (ar->wmi.mem_chunks[j].len == pool_size) {
4484 found = true;
4485 break;
4486 }
4487 }
4488 }
4489 if (!found)
4490 return false;
4491 }
4492
4493 return true;
4494}
4495
d7579d12
MK		 4496static int
4497ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
4498 struct wmi_svc_rdy_ev_arg *arg)
5c01aa3d
MK		 4499{
4500 struct wmi_service_ready_event *ev;
4501 size_t i, n;
4502
4503 if (skb->len < sizeof(*ev))
4504 return -EPROTO;
4505
4506 ev = (void *)skb->data;
4507 skb_pull(skb, sizeof(*ev));
4508 arg->min_tx_power = ev->hw_min_tx_power;
4509 arg->max_tx_power = ev->hw_max_tx_power;
4510 arg->ht_cap = ev->ht_cap_info;
4511 arg->vht_cap = ev->vht_cap_info;
4512 arg->sw_ver0 = ev->sw_version;
4513 arg->sw_ver1 = ev->sw_version_1;
4514 arg->phy_capab = ev->phy_capability;
4515 arg->num_rf_chains = ev->num_rf_chains;
4516 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
4517 arg->num_mem_reqs = ev->num_mem_reqs;
4518 arg->service_map = ev->wmi_service_bitmap;
2a3e60d3 4519 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5c01aa3d
MK		 4520
4521 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
4522 ARRAY_SIZE(arg->mem_reqs));
4523 for (i = 0; i < n; i++)
4524 arg->mem_reqs[i] = &ev->mem_reqs[i];
4525
4526 if (skb->len <
4527 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
4528 return -EPROTO;
4529
4530 return 0;
4531}
4532
d7579d12
MK		 4533static int
4534ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
4535 struct wmi_svc_rdy_ev_arg *arg)
5c01aa3d
MK		 4536{
4537 struct wmi_10x_service_ready_event *ev;
4538 int i, n;
4539
4540 if (skb->len < sizeof(*ev))
4541 return -EPROTO;
4542
4543 ev = (void *)skb->data;
4544 skb_pull(skb, sizeof(*ev));
4545 arg->min_tx_power = ev->hw_min_tx_power;
4546 arg->max_tx_power = ev->hw_max_tx_power;
4547 arg->ht_cap = ev->ht_cap_info;
4548 arg->vht_cap = ev->vht_cap_info;
4549 arg->sw_ver0 = ev->sw_version;
4550 arg->phy_capab = ev->phy_capability;
4551 arg->num_rf_chains = ev->num_rf_chains;
4552 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
4553 arg->num_mem_reqs = ev->num_mem_reqs;
4554 arg->service_map = ev->wmi_service_bitmap;
2a3e60d3 4555 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5c01aa3d
MK		 4556
4557 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
4558 ARRAY_SIZE(arg->mem_reqs));
4559 for (i = 0; i < n; i++)
4560 arg->mem_reqs[i] = &ev->mem_reqs[i];
4561
4562 if (skb->len <
4563 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
4564 return -EPROTO;
4565
4566 return 0;
4567}
4568
c8ecfc1c 4569static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
5e3dd157 4570{
c8ecfc1c
RM		 4571 struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
4572 struct sk_buff *skb = ar->svc_rdy_skb;
5c01aa3d
MK		 4573 struct wmi_svc_rdy_ev_arg arg = {};
4574 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
5c01aa3d 4575 int ret;
a925a376 4576 bool allocated;
5c01aa3d 4577
c8ecfc1c
RM		 4578 if (!skb) {
4579 ath10k_warn(ar, "invalid service ready event skb\n");
4580 return;
4581 }
4582
d7579d12 4583 ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
5c01aa3d
MK		 4584 if (ret) {
4585 ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
5e3dd157
KV		 4586 return;
4587 }
4588
d7579d12
MK		 4589 memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
4590 ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
4591 arg.service_map_len);
4592
5c01aa3d
MK		 4593 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
4594 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
4595 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
4596 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
5e3dd157 4597 ar->fw_version_major =
5c01aa3d
MK		 4598 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
4599 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
5e3dd157 4600 ar->fw_version_release =
5c01aa3d
MK		 4601 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
4602 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
4603 ar->phy_capability = __le32_to_cpu(arg.phy_capab);
4604 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
4605 ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd);
4606
5c01aa3d 4607 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
2a3e60d3 4608 arg.service_map, arg.service_map_len);
8865bee4 4609
5c8726ec 4610 if (ar->num_rf_chains > ar->max_spatial_stream) {
7aa7a72a 4611 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
5c8726ec
RM		 4612 ar->num_rf_chains, ar->max_spatial_stream);
4613 ar->num_rf_chains = ar->max_spatial_stream;
8865bee4 4614 }
5e3dd157 4615
166de3f1
RM		 4616 if (!ar->cfg_tx_chainmask) {
4617 ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
4618 ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
4619 }
fdb959c7 4620
5e3dd157
KV		 4621 if (strlen(ar->hw->wiphy->fw_version) == 0) {
4622 snprintf(ar->hw->wiphy->fw_version,
4623 sizeof(ar->hw->wiphy->fw_version),
4624 "%u.%u.%u.%u",
4625 ar->fw_version_major,
4626 ar->fw_version_minor,
4627 ar->fw_version_release,
4628 ar->fw_version_build);
4629 }
4630
5c01aa3d
MK		 4631 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
4632 if (num_mem_reqs > WMI_MAX_MEM_REQS) {
7aa7a72a 4633 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
b3effe61
BM		 4634 num_mem_reqs);
4635 return;
6f97d256
BM		 4636 }
4637
b0399417 4638 if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
99ad1cba 4639 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
c4cdf753 4640 ar->running_fw->fw_file.fw_features))
99ad1cba
MK		 4641 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
4642 ar->max_num_vdevs;
4643 else
4644 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
4645 ar->max_num_vdevs;
4646
b0399417 4647 ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
5699a6f2 4648 ar->max_num_vdevs;
b0399417
RM		 4649 ar->num_tids = ar->num_active_peers * 2;
4650 ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
4651 }
4652
4653 /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
4654 * and WMI_SERVICE_IRAM_TIDS, etc.
4655 */
4656
a925a376
VT		 4657 allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
4658 num_mem_reqs);
4659 if (allocated)
4660 goto skip_mem_alloc;
4661
4662 /* Either this event is received during boot time or there is a change
4663 * in memory requirement from firmware when compared to last request.
4664 * Free any old memory and do a fresh allocation based on the current
4665 * memory requirement.
4666 */
4667 ath10k_wmi_free_host_mem(ar);
4668
b3effe61 4669 for (i = 0; i < num_mem_reqs; ++i) {
5c01aa3d
MK		 4670 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
4671 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
4672 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
4673 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
b3effe61 4674
b0399417
RM		 4675 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
4676 if (ar->num_active_peers)
4677 num_units = ar->num_active_peers + 1;
4678 else
4679 num_units = ar->max_num_peers + 1;
4680 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
b3effe61
BM		 4681 /* number of units to allocate is number of
4682 * peers, 1 extra for self peer on target */
4683 /* this needs to be tied, host and target
4684 * can get out of sync */
b0399417
RM		 4685 num_units = ar->max_num_peers + 1;
4686 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
4687 num_units = ar->max_num_vdevs + 1;
4688 }
b3effe61 4689
7aa7a72a 4690 ath10k_dbg(ar, ATH10K_DBG_WMI,
b3effe61
BM		 4691 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
4692 req_id,
5c01aa3d 4693 __le32_to_cpu(arg.mem_reqs[i]->num_units),
b3effe61
BM		 4694 num_unit_info,
4695 unit_size,
4696 num_units);
4697
4698 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
4699 unit_size);
4700 if (ret)
4701 return;
4702 }
4703
a925a376 4704skip_mem_alloc:
7aa7a72a 4705 ath10k_dbg(ar, ATH10K_DBG_WMI,
ca996ec5 4706 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
5c01aa3d
MK		 4707 __le32_to_cpu(arg.min_tx_power),
4708 __le32_to_cpu(arg.max_tx_power),
4709 __le32_to_cpu(arg.ht_cap),
4710 __le32_to_cpu(arg.vht_cap),
4711 __le32_to_cpu(arg.sw_ver0),
4712 __le32_to_cpu(arg.sw_ver1),
ca996ec5 4713 __le32_to_cpu(arg.fw_build),
5c01aa3d
MK		 4714 __le32_to_cpu(arg.phy_capab),
4715 __le32_to_cpu(arg.num_rf_chains),
4716 __le32_to_cpu(arg.eeprom_rd),
4717 __le32_to_cpu(arg.num_mem_reqs));
6f97d256 4718
c8ecfc1c
RM		 4719 dev_kfree_skb(skb);
4720 ar->svc_rdy_skb = NULL;
6f97d256
BM		 4721 complete(&ar->wmi.service_ready);
4722}
4723
c8ecfc1c
RM		 4724void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
4725{
4726 ar->svc_rdy_skb = skb;
4727 queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
4728}
4729
d7579d12
MK		 4730static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
4731 struct wmi_rdy_ev_arg *arg)
5e3dd157 4732{
32653cf1 4733 struct wmi_ready_event *ev = (void *)skb->data;
5e3dd157 4734
32653cf1
MK		 4735 if (skb->len < sizeof(*ev))
4736 return -EPROTO;
4737
4738 skb_pull(skb, sizeof(*ev));
4739 arg->sw_version = ev->sw_version;
4740 arg->abi_version = ev->abi_version;
4741 arg->status = ev->status;
4742 arg->mac_addr = ev->mac_addr.addr;
4743
4744 return 0;
4745}
5e3dd157 4746
c1a4654a
MK		 4747static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
4748 struct wmi_roam_ev_arg *arg)
4749{
4750 struct wmi_roam_ev *ev = (void *)skb->data;
4751
4752 if (skb->len < sizeof(*ev))
4753 return -EPROTO;
4754
4755 skb_pull(skb, sizeof(*ev));
4756 arg->vdev_id = ev->vdev_id;
4757 arg->reason = ev->reason;
4758
4759 return 0;
4760}
4761
0226d602 4762int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
32653cf1
MK		 4763{
4764 struct wmi_rdy_ev_arg arg = {};
4765 int ret;
4766
d7579d12 4767 ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
32653cf1
MK		 4768 if (ret) {
4769 ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
4770 return ret;
4771 }
5e3dd157 4772
7aa7a72a 4773 ath10k_dbg(ar, ATH10K_DBG_WMI,
32653cf1
MK		 4774 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
4775 __le32_to_cpu(arg.sw_version),
4776 __le32_to_cpu(arg.abi_version),
4777 arg.mac_addr,
4778 __le32_to_cpu(arg.status));
5e3dd157 4779
32653cf1 4780 ether_addr_copy(ar->mac_addr, arg.mac_addr);
5e3dd157
KV		 4781 complete(&ar->wmi.unified_ready);
4782 return 0;
4783}
4784
a57a6a27
RM		 4785static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
4786{
4787 const struct wmi_pdev_temperature_event *ev;
4788
4789 ev = (struct wmi_pdev_temperature_event *)skb->data;
4790 if (WARN_ON(skb->len < sizeof(*ev)))
4791 return -EPROTO;
4792
ac2953fc 4793 ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
a57a6a27
RM		 4794 return 0;
4795}
4796
89d2d183
RM		 4797static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
4798 struct sk_buff *skb)
4799{
4800 struct wmi_pdev_bss_chan_info_event *ev;
fa7937e3 4801 struct survey_info *survey;
89d2d183
RM		 4802 u64 busy, total, tx, rx, rx_bss;
4803 u32 freq, noise_floor;
fa7937e3
RM		 4804 u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
4805 int idx;
89d2d183
RM		 4806
4807 ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
4808 if (WARN_ON(skb->len < sizeof(*ev)))
4809 return -EPROTO;
4810
4811 freq = __le32_to_cpu(ev->freq);
4812 noise_floor = __le32_to_cpu(ev->noise_floor);
4813 busy = __le64_to_cpu(ev->cycle_busy);
4814 total = __le64_to_cpu(ev->cycle_total);
4815 tx = __le64_to_cpu(ev->cycle_tx);
4816 rx = __le64_to_cpu(ev->cycle_rx);
4817 rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
4818
4819 ath10k_dbg(ar, ATH10K_DBG_WMI,
4820 "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
4821 freq, noise_floor, busy, total, tx, rx, rx_bss);
4822
fa7937e3
RM		 4823 spin_lock_bh(&ar->data_lock);
4824 idx = freq_to_idx(ar, freq);
4825 if (idx >= ARRAY_SIZE(ar->survey)) {
4826 ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
4827 freq, idx);
4828 goto exit;
4829 }
4830
4831 survey = &ar->survey[idx];
4832
4833 survey->noise = noise_floor;
4834 survey->time = div_u64(total, cc_freq_hz);
4835 survey->time_busy = div_u64(busy, cc_freq_hz);
4836 survey->time_rx = div_u64(rx_bss, cc_freq_hz);
4837 survey->time_tx = div_u64(tx, cc_freq_hz);
4838 survey->filled |= (SURVEY_INFO_NOISE_DBM |
4839 SURVEY_INFO_TIME |
4840 SURVEY_INFO_TIME_BUSY |
4841 SURVEY_INFO_TIME_RX |
4842 SURVEY_INFO_TIME_TX);
4843exit:
4844 spin_unlock_bh(&ar->data_lock);
4845 complete(&ar->bss_survey_done);
89d2d183
RM		 4846 return 0;
4847}
4848
d7579d12 4849static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
5e3dd157
KV		 4850{
4851 struct wmi_cmd_hdr *cmd_hdr;
4852 enum wmi_event_id id;
5e3dd157
KV		 4853
4854 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
4855 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
4856
4857 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
469d479f 4858 goto out;
5e3dd157 4859
d35a6c18 4860 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5e3dd157
KV		 4861
4862 switch (id) {
4863 case WMI_MGMT_RX_EVENTID:
4864 ath10k_wmi_event_mgmt_rx(ar, skb);
4865 /* mgmt_rx() owns the skb now! */
4866 return;
4867 case WMI_SCAN_EVENTID:
4868 ath10k_wmi_event_scan(ar, skb);
4869 break;
4870 case WMI_CHAN_INFO_EVENTID:
4871 ath10k_wmi_event_chan_info(ar, skb);
4872 break;
4873 case WMI_ECHO_EVENTID:
4874 ath10k_wmi_event_echo(ar, skb);
4875 break;
4876 case WMI_DEBUG_MESG_EVENTID:
4877 ath10k_wmi_event_debug_mesg(ar, skb);
4878 break;
4879 case WMI_UPDATE_STATS_EVENTID:
4880 ath10k_wmi_event_update_stats(ar, skb);
4881 break;
4882 case WMI_VDEV_START_RESP_EVENTID:
4883 ath10k_wmi_event_vdev_start_resp(ar, skb);
4884 break;
4885 case WMI_VDEV_STOPPED_EVENTID:
4886 ath10k_wmi_event_vdev_stopped(ar, skb);
4887 break;
4888 case WMI_PEER_STA_KICKOUT_EVENTID:
4889 ath10k_wmi_event_peer_sta_kickout(ar, skb);
4890 break;
4891 case WMI_HOST_SWBA_EVENTID:
4892 ath10k_wmi_event_host_swba(ar, skb);
4893 break;
4894 case WMI_TBTTOFFSET_UPDATE_EVENTID:
4895 ath10k_wmi_event_tbttoffset_update(ar, skb);
4896 break;
4897 case WMI_PHYERR_EVENTID:
4898 ath10k_wmi_event_phyerr(ar, skb);
4899 break;
4900 case WMI_ROAM_EVENTID:
4901 ath10k_wmi_event_roam(ar, skb);
4902 break;
4903 case WMI_PROFILE_MATCH:
4904 ath10k_wmi_event_profile_match(ar, skb);
4905 break;
4906 case WMI_DEBUG_PRINT_EVENTID:
4907 ath10k_wmi_event_debug_print(ar, skb);
4908 break;
4909 case WMI_PDEV_QVIT_EVENTID:
4910 ath10k_wmi_event_pdev_qvit(ar, skb);
4911 break;
4912 case WMI_WLAN_PROFILE_DATA_EVENTID:
4913 ath10k_wmi_event_wlan_profile_data(ar, skb);
4914 break;
4915 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
4916 ath10k_wmi_event_rtt_measurement_report(ar, skb);
4917 break;
4918 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
4919 ath10k_wmi_event_tsf_measurement_report(ar, skb);
4920 break;
4921 case WMI_RTT_ERROR_REPORT_EVENTID:
4922 ath10k_wmi_event_rtt_error_report(ar, skb);
4923 break;
4924 case WMI_WOW_WAKEUP_HOST_EVENTID:
4925 ath10k_wmi_event_wow_wakeup_host(ar, skb);
4926 break;
4927 case WMI_DCS_INTERFERENCE_EVENTID:
4928 ath10k_wmi_event_dcs_interference(ar, skb);
4929 break;
4930 case WMI_PDEV_TPC_CONFIG_EVENTID:
4931 ath10k_wmi_event_pdev_tpc_config(ar, skb);
4932 break;
4933 case WMI_PDEV_FTM_INTG_EVENTID:
4934 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
4935 break;
4936 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
4937 ath10k_wmi_event_gtk_offload_status(ar, skb);
4938 break;
4939 case WMI_GTK_REKEY_FAIL_EVENTID:
4940 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
4941 break;
4942 case WMI_TX_DELBA_COMPLETE_EVENTID:
4943 ath10k_wmi_event_delba_complete(ar, skb);
4944 break;
4945 case WMI_TX_ADDBA_COMPLETE_EVENTID:
4946 ath10k_wmi_event_addba_complete(ar, skb);
4947 break;
4948 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
4949 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
4950 break;
4951 case WMI_SERVICE_READY_EVENTID:
b34d2b3d 4952 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 4953 return;
5e3dd157 4954 case WMI_READY_EVENTID:
b34d2b3d 4955 ath10k_wmi_event_ready(ar, skb);
5e3dd157
KV		 4956 break;
4957 default:
7aa7a72a 4958 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5e3dd157
KV		 4959 break;
4960 }
4961
469d479f 4962out:
5e3dd157
KV		 4963 dev_kfree_skb(skb);
4964}
4965
d7579d12 4966static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
8a6618b0
BM		 4967{
4968 struct wmi_cmd_hdr *cmd_hdr;
4969 enum wmi_10x_event_id id;
43d2a30f 4970 bool consumed;
8a6618b0
BM		 4971
4972 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
4973 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
4974
4975 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
469d479f 4976 goto out;
8a6618b0 4977
d35a6c18 4978 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
8a6618b0 4979
43d2a30f
KV		 4980 consumed = ath10k_tm_event_wmi(ar, id, skb);
4981
4982 /* Ready event must be handled normally also in UTF mode so that we
4983 * know the UTF firmware has booted, others we are just bypass WMI
4984 * events to testmode.
4985 */
4986 if (consumed && id != WMI_10X_READY_EVENTID) {
4987 ath10k_dbg(ar, ATH10K_DBG_WMI,
4988 "wmi testmode consumed 0x%x\n", id);
4989 goto out;
4990 }
4991
8a6618b0
BM		 4992 switch (id) {
4993 case WMI_10X_MGMT_RX_EVENTID:
4994 ath10k_wmi_event_mgmt_rx(ar, skb);
4995 /* mgmt_rx() owns the skb now! */
4996 return;
4997 case WMI_10X_SCAN_EVENTID:
4998 ath10k_wmi_event_scan(ar, skb);
4999 break;
5000 case WMI_10X_CHAN_INFO_EVENTID:
5001 ath10k_wmi_event_chan_info(ar, skb);
5002 break;
5003 case WMI_10X_ECHO_EVENTID:
5004 ath10k_wmi_event_echo(ar, skb);
5005 break;
5006 case WMI_10X_DEBUG_MESG_EVENTID:
5007 ath10k_wmi_event_debug_mesg(ar, skb);
5008 break;
5009 case WMI_10X_UPDATE_STATS_EVENTID:
5010 ath10k_wmi_event_update_stats(ar, skb);
5011 break;
5012 case WMI_10X_VDEV_START_RESP_EVENTID:
5013 ath10k_wmi_event_vdev_start_resp(ar, skb);
5014 break;
5015 case WMI_10X_VDEV_STOPPED_EVENTID:
5016 ath10k_wmi_event_vdev_stopped(ar, skb);
5017 break;
5018 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
5019 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5020 break;
5021 case WMI_10X_HOST_SWBA_EVENTID:
5022 ath10k_wmi_event_host_swba(ar, skb);
5023 break;
5024 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
5025 ath10k_wmi_event_tbttoffset_update(ar, skb);
5026 break;
5027 case WMI_10X_PHYERR_EVENTID:
5028 ath10k_wmi_event_phyerr(ar, skb);
5029 break;
5030 case WMI_10X_ROAM_EVENTID:
5031 ath10k_wmi_event_roam(ar, skb);
5032 break;
5033 case WMI_10X_PROFILE_MATCH:
5034 ath10k_wmi_event_profile_match(ar, skb);
5035 break;
5036 case WMI_10X_DEBUG_PRINT_EVENTID:
5037 ath10k_wmi_event_debug_print(ar, skb);
5038 break;
5039 case WMI_10X_PDEV_QVIT_EVENTID:
5040 ath10k_wmi_event_pdev_qvit(ar, skb);
5041 break;
5042 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
5043 ath10k_wmi_event_wlan_profile_data(ar, skb);
5044 break;
5045 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
5046 ath10k_wmi_event_rtt_measurement_report(ar, skb);
5047 break;
5048 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
5049 ath10k_wmi_event_tsf_measurement_report(ar, skb);
5050 break;
5051 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
5052 ath10k_wmi_event_rtt_error_report(ar, skb);
5053 break;
5054 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
5055 ath10k_wmi_event_wow_wakeup_host(ar, skb);
5056 break;
5057 case WMI_10X_DCS_INTERFERENCE_EVENTID:
5058 ath10k_wmi_event_dcs_interference(ar, skb);
5059 break;
5060 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
5061 ath10k_wmi_event_pdev_tpc_config(ar, skb);
5062 break;
5063 case WMI_10X_INST_RSSI_STATS_EVENTID:
5064 ath10k_wmi_event_inst_rssi_stats(ar, skb);
5065 break;
5066 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
5067 ath10k_wmi_event_vdev_standby_req(ar, skb);
5068 break;
5069 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
5070 ath10k_wmi_event_vdev_resume_req(ar, skb);
5071 break;
5072 case WMI_10X_SERVICE_READY_EVENTID:
b34d2b3d 5073 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 5074 return;
8a6618b0 5075 case WMI_10X_READY_EVENTID:
b34d2b3d 5076 ath10k_wmi_event_ready(ar, skb);
8a6618b0 5077 break;
43d2a30f
KV		 5078 case WMI_10X_PDEV_UTF_EVENTID:
5079 /* ignore utf events */
5080 break;
8a6618b0 5081 default:
7aa7a72a 5082 ath10k_warn(ar, "Unknown eventid: %d\n", id);
8a6618b0
BM		 5083 break;
5084 }
5085
43d2a30f 5086out:
8a6618b0
BM		 5087 dev_kfree_skb(skb);
5088}
5089
d7579d12 5090static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
24c88f78
MK		 5091{
5092 struct wmi_cmd_hdr *cmd_hdr;
5093 enum wmi_10_2_event_id id;
5094
5095 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5096 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5097
5098 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
469d479f 5099 goto out;
24c88f78 5100
d35a6c18 5101 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
24c88f78
MK		 5102
5103 switch (id) {
5104 case WMI_10_2_MGMT_RX_EVENTID:
5105 ath10k_wmi_event_mgmt_rx(ar, skb);
5106 /* mgmt_rx() owns the skb now! */
5107 return;
5108 case WMI_10_2_SCAN_EVENTID:
5109 ath10k_wmi_event_scan(ar, skb);
5110 break;
5111 case WMI_10_2_CHAN_INFO_EVENTID:
5112 ath10k_wmi_event_chan_info(ar, skb);
5113 break;
5114 case WMI_10_2_ECHO_EVENTID:
5115 ath10k_wmi_event_echo(ar, skb);
5116 break;
5117 case WMI_10_2_DEBUG_MESG_EVENTID:
5118 ath10k_wmi_event_debug_mesg(ar, skb);
5119 break;
5120 case WMI_10_2_UPDATE_STATS_EVENTID:
5121 ath10k_wmi_event_update_stats(ar, skb);
5122 break;
5123 case WMI_10_2_VDEV_START_RESP_EVENTID:
5124 ath10k_wmi_event_vdev_start_resp(ar, skb);
5125 break;
5126 case WMI_10_2_VDEV_STOPPED_EVENTID:
5127 ath10k_wmi_event_vdev_stopped(ar, skb);
5128 break;
5129 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
5130 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5131 break;
5132 case WMI_10_2_HOST_SWBA_EVENTID:
5133 ath10k_wmi_event_host_swba(ar, skb);
5134 break;
5135 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
5136 ath10k_wmi_event_tbttoffset_update(ar, skb);
5137 break;
5138 case WMI_10_2_PHYERR_EVENTID:
5139 ath10k_wmi_event_phyerr(ar, skb);
5140 break;
5141 case WMI_10_2_ROAM_EVENTID:
5142 ath10k_wmi_event_roam(ar, skb);
5143 break;
5144 case WMI_10_2_PROFILE_MATCH:
5145 ath10k_wmi_event_profile_match(ar, skb);
5146 break;
5147 case WMI_10_2_DEBUG_PRINT_EVENTID:
5148 ath10k_wmi_event_debug_print(ar, skb);
5149 break;
5150 case WMI_10_2_PDEV_QVIT_EVENTID:
5151 ath10k_wmi_event_pdev_qvit(ar, skb);
5152 break;
5153 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
5154 ath10k_wmi_event_wlan_profile_data(ar, skb);
5155 break;
5156 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
5157 ath10k_wmi_event_rtt_measurement_report(ar, skb);
5158 break;
5159 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
5160 ath10k_wmi_event_tsf_measurement_report(ar, skb);
5161 break;
5162 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
5163 ath10k_wmi_event_rtt_error_report(ar, skb);
5164 break;
5165 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
5166 ath10k_wmi_event_wow_wakeup_host(ar, skb);
5167 break;
5168 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
5169 ath10k_wmi_event_dcs_interference(ar, skb);
5170 break;
5171 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
5172 ath10k_wmi_event_pdev_tpc_config(ar, skb);
5173 break;
5174 case WMI_10_2_INST_RSSI_STATS_EVENTID:
5175 ath10k_wmi_event_inst_rssi_stats(ar, skb);
5176 break;
5177 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
5178 ath10k_wmi_event_vdev_standby_req(ar, skb);
5179 break;
5180 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
5181 ath10k_wmi_event_vdev_resume_req(ar, skb);
5182 break;
5183 case WMI_10_2_SERVICE_READY_EVENTID:
b34d2b3d 5184 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 5185 return;
24c88f78 5186 case WMI_10_2_READY_EVENTID:
b34d2b3d 5187 ath10k_wmi_event_ready(ar, skb);
24c88f78 5188 break;
a57a6a27
RM		 5189 case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
5190 ath10k_wmi_event_temperature(ar, skb);
5191 break;
89d2d183
RM		 5192 case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
5193 ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
5194 break;
24c88f78
MK		 5195 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
5196 case WMI_10_2_GPIO_INPUT_EVENTID:
5197 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
5198 case WMI_10_2_GENERIC_BUFFER_EVENTID:
5199 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
5200 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
5201 case WMI_10_2_WDS_PEER_EVENTID:
7aa7a72a 5202 ath10k_dbg(ar, ATH10K_DBG_WMI,
24c88f78
MK		 5203 "received event id %d not implemented\n", id);
5204 break;
5205 default:
7aa7a72a 5206 ath10k_warn(ar, "Unknown eventid: %d\n", id);
24c88f78
MK		 5207 break;
5208 }
5209
469d479f 5210out:
24c88f78
MK		 5211 dev_kfree_skb(skb);
5212}
8a6618b0 5213
1c092961
RM		 5214static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
5215{
5216 struct wmi_cmd_hdr *cmd_hdr;
5217 enum wmi_10_4_event_id id;
5218
5219 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5220 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5221
5222 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
5223 goto out;
5224
5225 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5226
5227 switch (id) {
5228 case WMI_10_4_MGMT_RX_EVENTID:
5229 ath10k_wmi_event_mgmt_rx(ar, skb);
5230 /* mgmt_rx() owns the skb now! */
5231 return;
373b48cf
RM		 5232 case WMI_10_4_ECHO_EVENTID:
5233 ath10k_wmi_event_echo(ar, skb);
5234 break;
5235 case WMI_10_4_DEBUG_MESG_EVENTID:
5236 ath10k_wmi_event_debug_mesg(ar, skb);
5237 break;
5238 case WMI_10_4_SERVICE_READY_EVENTID:
5239 ath10k_wmi_event_service_ready(ar, skb);
c8ecfc1c 5240 return;
b2297baa
RM		 5241 case WMI_10_4_SCAN_EVENTID:
5242 ath10k_wmi_event_scan(ar, skb);
5243 break;
5244 case WMI_10_4_CHAN_INFO_EVENTID:
5245 ath10k_wmi_event_chan_info(ar, skb);
5246 break;
2b0a2e0d
RM		 5247 case WMI_10_4_PHYERR_EVENTID:
5248 ath10k_wmi_event_phyerr(ar, skb);
5249 break;
d02e752f
RM		 5250 case WMI_10_4_READY_EVENTID:
5251 ath10k_wmi_event_ready(ar, skb);
5252 break;
373b48cf
RM		 5253 case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
5254 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5255 break;
3cec3be3
RM		 5256 case WMI_10_4_HOST_SWBA_EVENTID:
5257 ath10k_wmi_event_host_swba(ar, skb);
5258 break;
373b48cf
RM		 5259 case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
5260 ath10k_wmi_event_tbttoffset_update(ar, skb);
5261 break;
5262 case WMI_10_4_DEBUG_PRINT_EVENTID:
5263 ath10k_wmi_event_debug_print(ar, skb);
5264 break;
5265 case WMI_10_4_VDEV_START_RESP_EVENTID:
5266 ath10k_wmi_event_vdev_start_resp(ar, skb);
5267 break;
5268 case WMI_10_4_VDEV_STOPPED_EVENTID:
5269 ath10k_wmi_event_vdev_stopped(ar, skb);
5270 break;
5271 case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
36bd39bb 5272 case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
373b48cf
RM		 5273 ath10k_dbg(ar, ATH10K_DBG_WMI,
5274 "received event id %d not implemented\n", id);
5275 break;
98dd2b92
MP		 5276 case WMI_10_4_UPDATE_STATS_EVENTID:
5277 ath10k_wmi_event_update_stats(ar, skb);
5278 break;
6dd46348
T		 5279 case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
5280 ath10k_wmi_event_temperature(ar, skb);
5281 break;
89d2d183
RM		 5282 case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
5283 ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
5284 break;
1c092961
RM		 5285 default:
5286 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5287 break;
5288 }
5289
5290out:
5291 dev_kfree_skb(skb);
5292}
5293
ce42870e
BM		 5294static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
5295{
d7579d12
MK		 5296 int ret;
5297
5298 ret = ath10k_wmi_rx(ar, skb);
5299 if (ret)
5300 ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
ce42870e
BM		 5301}
5302
95bf21f9 5303int ath10k_wmi_connect(struct ath10k *ar)
5e3dd157
KV		 5304{
5305 int status;
5306 struct ath10k_htc_svc_conn_req conn_req;
5307 struct ath10k_htc_svc_conn_resp conn_resp;
5308
5309 memset(&conn_req, 0, sizeof(conn_req));
5310 memset(&conn_resp, 0, sizeof(conn_resp));
5311
5312 /* these fields are the same for all service endpoints */
5313 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
5314 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
be8b3943 5315 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
5e3dd157
KV		 5316
5317 /* connect to control service */
5318 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
5319
cd003fad 5320 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
5e3dd157 5321 if (status) {
7aa7a72a 5322 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
5e3dd157
KV		 5323 status);
5324 return status;
5325 }
5326
5327 ar->wmi.eid = conn_resp.eid;
5328 return 0;
5329}
5330
d7579d12
MK		 5331static struct sk_buff *
5332ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
5333 u16 ctl2g, u16 ctl5g,
5334 enum wmi_dfs_region dfs_reg)
5e3dd157
KV		 5335{
5336 struct wmi_pdev_set_regdomain_cmd *cmd;
5337 struct sk_buff *skb;
5338
7aa7a72a 5339 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5340 if (!skb)
d7579d12 5341 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5342
5343 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
5344 cmd->reg_domain = __cpu_to_le32(rd);
5345 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
5346 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
5347 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
5348 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
5349
7aa7a72a 5350 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 5351 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
5352 rd, rd2g, rd5g, ctl2g, ctl5g);
d7579d12 5353 return skb;
5e3dd157
KV		 5354}
5355
d7579d12
MK		 5356static struct sk_buff *
5357ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
5358 rd5g, u16 ctl2g, u16 ctl5g,
5359 enum wmi_dfs_region dfs_reg)
821af6ae
MP		 5360{
5361 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
5362 struct sk_buff *skb;
5363
7aa7a72a 5364 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
821af6ae 5365 if (!skb)
d7579d12 5366 return ERR_PTR(-ENOMEM);
821af6ae
MP		 5367
5368 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
5369 cmd->reg_domain = __cpu_to_le32(rd);
5370 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
5371 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
5372 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
5373 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
5374 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
5375
7aa7a72a 5376 ath10k_dbg(ar, ATH10K_DBG_WMI,
821af6ae
MP		 5377 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
5378 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
d7579d12 5379 return skb;
821af6ae
MP		 5380}
5381
d7579d12
MK		 5382static struct sk_buff *
5383ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
5e3dd157
KV		 5384{
5385 struct wmi_pdev_suspend_cmd *cmd;
5386 struct sk_buff *skb;
5387
7aa7a72a 5388 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5389 if (!skb)
d7579d12 5390 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5391
5392 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
00f5482b 5393 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
5e3dd157 5394
d7579d12 5395 return skb;
5e3dd157
KV		 5396}
5397
d7579d12
MK		 5398static struct sk_buff *
5399ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
5e3dd157
KV		 5400{
5401 struct sk_buff *skb;
5402
7aa7a72a 5403 skb = ath10k_wmi_alloc_skb(ar, 0);
d7579d12
MK		 5404 if (!skb)
5405 return ERR_PTR(-ENOMEM);
5e3dd157 5406
d7579d12 5407 return skb;
5e3dd157
KV		 5408}
5409
d7579d12
MK		 5410static struct sk_buff *
5411ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
5e3dd157
KV		 5412{
5413 struct wmi_pdev_set_param_cmd *cmd;
5414 struct sk_buff *skb;
5415
226a339b 5416 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
7aa7a72a
MK		 5417 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
5418 id);
d7579d12 5419 return ERR_PTR(-EOPNOTSUPP);
226a339b
BM		 5420 }
5421
7aa7a72a 5422 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 5423 if (!skb)
d7579d12 5424 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5425
5426 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
5427 cmd->param_id = __cpu_to_le32(id);
5428 cmd->param_value = __cpu_to_le32(value);
5429
7aa7a72a 5430 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
5e3dd157 5431 id, value);
d7579d12 5432 return skb;
5e3dd157
KV		 5433}
5434
0226d602
MK		 5435void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
5436 struct wmi_host_mem_chunks *chunks)
cf9fca8f
MK		 5437{
5438 struct host_memory_chunk *chunk;
5439 int i;
5440
5441 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
5442
5443 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
5444 chunk = &chunks->items[i];
5445 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
5446 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
5447 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
5448
5449 ath10k_dbg(ar, ATH10K_DBG_WMI,
5450 "wmi chunk %d len %d requested, addr 0x%llx\n",
5451 i,
5452 ar->wmi.mem_chunks[i].len,
5453 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
5454 }
5455}
5456
d7579d12 5457static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
5e3dd157
KV		 5458{
5459 struct wmi_init_cmd *cmd;
5460 struct sk_buff *buf;
5461 struct wmi_resource_config config = {};
b3effe61 5462 u32 len, val;
5e3dd157
KV		 5463
5464 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
cfd1061e 5465 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
5e3dd157
KV		 5466 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
5467
5468 config.num_offload_reorder_bufs =
5469 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
5470
5471 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
5472 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
5473 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
5474 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
5475 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
5476 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
5477 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
5478 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
5479 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
ccec9038 5480 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
5e3dd157
KV		 5481 config.scan_max_pending_reqs =
5482 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
5483
5484 config.bmiss_offload_max_vdev =
5485 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
5486
5487 config.roam_offload_max_vdev =
5488 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
5489
5490 config.roam_offload_max_ap_profiles =
5491 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
5492
5493 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
5494 config.num_mcast_table_elems =
5495 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
5496
5497 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
5498 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
5499 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
5500 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
5501 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
5502
5503 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
5504 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
5505
5506 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
5507
5508 config.gtk_offload_max_vdev =
5509 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
5510
5511 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
5512 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
5513
b3effe61
BM		 5514 len = sizeof(*cmd) +
5515 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5516
7aa7a72a 5517 buf = ath10k_wmi_alloc_skb(ar, len);
5e3dd157 5518 if (!buf)
d7579d12 5519 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 5520
5521 cmd = (struct wmi_init_cmd *)buf->data;
b3effe61 5522
5e3dd157 5523 memcpy(&cmd->resource_config, &config, sizeof(config));
cf9fca8f 5524 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
5e3dd157 5525
7aa7a72a 5526 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
d7579d12 5527 return buf;
5e3dd157
KV		 5528}
5529
d7579d12 5530static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
12b2b9e3
BM		 5531{
5532 struct wmi_init_cmd_10x *cmd;
5533 struct sk_buff *buf;
5534 struct wmi_resource_config_10x config = {};
5535 u32 len, val;
12b2b9e3 5536
ec6a73f0
BM		 5537 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
5538 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
5539 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
5540 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
5541 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
5542 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
5543 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
5544 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5545 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5546 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5547 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
ccec9038 5548 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
12b2b9e3 5549 config.scan_max_pending_reqs =
ec6a73f0 5550 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
12b2b9e3
BM		 5551
5552 config.bmiss_offload_max_vdev =
ec6a73f0 5553 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 5554
5555 config.roam_offload_max_vdev =
ec6a73f0 5556 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 5557
5558 config.roam_offload_max_ap_profiles =
ec6a73f0 5559 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
12b2b9e3 5560
ec6a73f0 5561 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
12b2b9e3 5562 config.num_mcast_table_elems =
ec6a73f0 5563 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
12b2b9e3 5564
ec6a73f0
BM		 5565 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
5566 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
5567 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
5568 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
5569 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
12b2b9e3 5570
ec6a73f0 5571 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
12b2b9e3
BM		 5572 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
5573
ec6a73f0 5574 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
12b2b9e3 5575
ec6a73f0
BM		 5576 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
5577 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
12b2b9e3
BM		 5578
5579 len = sizeof(*cmd) +
5580 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5581
7aa7a72a 5582 buf = ath10k_wmi_alloc_skb(ar, len);
12b2b9e3 5583 if (!buf)
d7579d12 5584 return ERR_PTR(-ENOMEM);
12b2b9e3
BM		 5585
5586 cmd = (struct wmi_init_cmd_10x *)buf->data;
5587
12b2b9e3 5588 memcpy(&cmd->resource_config, &config, sizeof(config));
cf9fca8f 5589 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
12b2b9e3 5590
7aa7a72a 5591 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
d7579d12 5592 return buf;
12b2b9e3
BM		 5593}
5594
d7579d12 5595static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
24c88f78
MK		 5596{
5597 struct wmi_init_cmd_10_2 *cmd;
5598 struct sk_buff *buf;
5599 struct wmi_resource_config_10x config = {};
b6c8e287 5600 u32 len, val, features;
24c88f78
MK		 5601
5602 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
24c88f78 5603 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
cc61a1bb
MSS		 5604
5605 if (ath10k_peer_stats_enabled(ar)) {
af9a6a3a
AK		 5606 config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
5607 config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
5608 } else {
5609 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
5610 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
5611 }
5612
24c88f78
MK		 5613 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
5614 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
5615 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
5616 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5617 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5618 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
5619 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
ccec9038 5620 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
24c88f78
MK		 5621
5622 config.scan_max_pending_reqs =
5623 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
5624
5625 config.bmiss_offload_max_vdev =
5626 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
5627
5628 config.roam_offload_max_vdev =
5629 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
5630
5631 config.roam_offload_max_ap_profiles =
5632 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
5633
5634 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
5635 config.num_mcast_table_elems =
5636 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
5637
5638 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
5639 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
5640 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
f6603ff2 5641 config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
24c88f78
MK		 5642 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
5643
5644 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
5645 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
5646
5647 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
5648
5649 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
5650 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
5651
5652 len = sizeof(*cmd) +
5653 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5654
7aa7a72a 5655 buf = ath10k_wmi_alloc_skb(ar, len);
24c88f78 5656 if (!buf)
d7579d12 5657 return ERR_PTR(-ENOMEM);
24c88f78
MK		 5658
5659 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
5660
b6c8e287 5661 features = WMI_10_2_RX_BATCH_MODE;
844fa572
YL		 5662
5663 if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
5664 test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
de0c789b 5665 features |= WMI_10_2_COEX_GPIO;
844fa572 5666
cc61a1bb 5667 if (ath10k_peer_stats_enabled(ar))
de46c015
MSS		 5668 features |= WMI_10_2_PEER_STATS;
5669
fa7937e3
RM		 5670 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
5671 features |= WMI_10_2_BSS_CHAN_INFO;
5672
b6c8e287
SM		 5673 cmd->resource_config.feature_mask = __cpu_to_le32(features);
5674
24c88f78 5675 memcpy(&cmd->resource_config.common, &config, sizeof(config));
cf9fca8f 5676 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
24c88f78 5677
7aa7a72a 5678 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
d7579d12 5679 return buf;
5e3dd157
KV		 5680}
5681
d1e52a8e
RM		 5682static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
5683{
5684 struct wmi_init_cmd_10_4 *cmd;
5685 struct sk_buff *buf;
5686 struct wmi_resource_config_10_4 config = {};
5687 u32 len;
5688
5689 config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
5690 config.num_peers = __cpu_to_le32(ar->max_num_peers);
5691 config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
5692 config.num_tids = __cpu_to_le32(ar->num_tids);
5693
5694 config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
5695 config.num_offload_reorder_buffs =
5696 __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
5697 config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
5698 config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
5699a6f2
RM		 5699 config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
5700 config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
d1e52a8e
RM		 5701
5702 config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
5703 config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
5704 config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
5705 config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
5706
bc27e8cd 5707 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
d1e52a8e
RM		 5708 config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
5709 config.bmiss_offload_max_vdev =
5710 __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
5711 config.roam_offload_max_vdev =
5712 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
5713 config.roam_offload_max_ap_profiles =
5714 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
5715 config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
5716 config.num_mcast_table_elems =
5717 __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
5718
5719 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
5720 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
5721 config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
5722 config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
5723 config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
5724
5725 config.rx_skip_defrag_timeout_dup_detection_check =
5726 __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
5727
5728 config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
5729 config.gtk_offload_max_vdev =
5730 __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
5699a6f2 5731 config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
d1e52a8e
RM		 5732 config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
5733 config.max_peer_ext_stats =
5734 __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
5735 config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
5736
5737 config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
5738 config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
5739 config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
5740 config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
5741
5742 config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
5743 config.tt_support =
5744 __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
5745 config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
5746 config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
5747 config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
5748
5749 len = sizeof(*cmd) +
5750 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
5751
5752 buf = ath10k_wmi_alloc_skb(ar, len);
5753 if (!buf)
5754 return ERR_PTR(-ENOMEM);
5755
5756 cmd = (struct wmi_init_cmd_10_4 *)buf->data;
5757 memcpy(&cmd->resource_config, &config, sizeof(config));
5758 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
5759
5760 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
5761 return buf;
5762}
5763
0226d602 5764int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
5e3dd157 5765{
a6aa5da3
MK		 5766 if (arg->ie_len && !arg->ie)
5767 return -EINVAL;
5768 if (arg->n_channels && !arg->channels)
5769 return -EINVAL;
5770 if (arg->n_ssids && !arg->ssids)
5771 return -EINVAL;
5772 if (arg->n_bssids && !arg->bssids)
5773 return -EINVAL;
5e3dd157 5774
a6aa5da3
MK		 5775 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
5776 return -EINVAL;
5777 if (arg->n_channels > ARRAY_SIZE(arg->channels))
5778 return -EINVAL;
5779 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
5780 return -EINVAL;
5781 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
5782 return -EINVAL;
5e3dd157 5783
a6aa5da3
MK		 5784 return 0;
5785}
5e3dd157 5786
a6aa5da3
MK		 5787static size_t
5788ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
5789{
5790 int len = 0;
5791
5792 if (arg->ie_len) {
5e3dd157
KV		 5793 len += sizeof(struct wmi_ie_data);
5794 len += roundup(arg->ie_len, 4);
5795 }
5796
5797 if (arg->n_channels) {
5e3dd157
KV		 5798 len += sizeof(struct wmi_chan_list);
5799 len += sizeof(__le32) * arg->n_channels;
5800 }
5801
5802 if (arg->n_ssids) {
5e3dd157
KV		 5803 len += sizeof(struct wmi_ssid_list);
5804 len += sizeof(struct wmi_ssid) * arg->n_ssids;
5805 }
5806
5807 if (arg->n_bssids) {
5e3dd157
KV		 5808 len += sizeof(struct wmi_bssid_list);
5809 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
5810 }
5811
5812 return len;
5813}
5814
0226d602
MK		 5815void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
5816 const struct wmi_start_scan_arg *arg)
5e3dd157 5817{
5e3dd157
KV		 5818 u32 scan_id;
5819 u32 scan_req_id;
5e3dd157
KV		 5820
5821 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
5822 scan_id |= arg->scan_id;
5823
5824 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
5825 scan_req_id |= arg->scan_req_id;
5826
a6aa5da3
MK		 5827 cmn->scan_id = __cpu_to_le32(scan_id);
5828 cmn->scan_req_id = __cpu_to_le32(scan_req_id);
5829 cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
5830 cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
5831 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
5832 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
5833 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
5834 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
5835 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
5836 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
5837 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
5838 cmn->idle_time = __cpu_to_le32(arg->idle_time);
5839 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
5840 cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
5841 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
5842}
5843
5844static void
5845ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
5846 const struct wmi_start_scan_arg *arg)
5847{
5848 struct wmi_ie_data *ie;
5849 struct wmi_chan_list *channels;
5850 struct wmi_ssid_list *ssids;
5851 struct wmi_bssid_list *bssids;
5852 void *ptr = tlvs->tlvs;
5853 int i;
5e3dd157
KV		 5854
5855 if (arg->n_channels) {
a6aa5da3 5856 channels = ptr;
5e3dd157
KV		 5857 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
5858 channels->num_chan = __cpu_to_le32(arg->n_channels);
5859
5860 for (i = 0; i < arg->n_channels; i++)
24c88f78
MK		 5861 channels->channel_list[i].freq =
5862 __cpu_to_le16(arg->channels[i]);
5e3dd157 5863
a6aa5da3
MK		 5864 ptr += sizeof(*channels);
5865 ptr += sizeof(__le32) * arg->n_channels;
5e3dd157
KV		 5866 }
5867
5868 if (arg->n_ssids) {
a6aa5da3 5869 ssids = ptr;
5e3dd157
KV		 5870 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
5871 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
5872
5873 for (i = 0; i < arg->n_ssids; i++) {
5874 ssids->ssids[i].ssid_len =
5875 __cpu_to_le32(arg->ssids[i].len);
5876 memcpy(&ssids->ssids[i].ssid,
5877 arg->ssids[i].ssid,
5878 arg->ssids[i].len);
5879 }
5880
a6aa5da3
MK		 5881 ptr += sizeof(*ssids);
5882 ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
5e3dd157
KV		 5883 }
5884
5885 if (arg->n_bssids) {
a6aa5da3 5886 bssids = ptr;
5e3dd157
KV		 5887 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
5888 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
5889
5890 for (i = 0; i < arg->n_bssids; i++)
8f4ffb7d
KV		 5891 ether_addr_copy(bssids->bssid_list[i].addr,
5892 arg->bssids[i].bssid);
5e3dd157 5893
a6aa5da3
MK		 5894 ptr += sizeof(*bssids);
5895 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
5e3dd157
KV		 5896 }
5897
5898 if (arg->ie_len) {
a6aa5da3 5899 ie = ptr;
5e3dd157
KV		 5900 ie->tag = __cpu_to_le32(WMI_IE_TAG);
5901 ie->ie_len = __cpu_to_le32(arg->ie_len);
5902 memcpy(ie->ie_data, arg->ie, arg->ie_len);
5903
a6aa5da3
MK		 5904 ptr += sizeof(*ie);
5905 ptr += roundup(arg->ie_len, 4);
5e3dd157 5906 }
a6aa5da3 5907}
5e3dd157 5908
d7579d12
MK		 5909static struct sk_buff *
5910ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
5911 const struct wmi_start_scan_arg *arg)
a6aa5da3 5912{
d7579d12 5913 struct wmi_start_scan_cmd *cmd;
a6aa5da3
MK		 5914 struct sk_buff *skb;
5915 size_t len;
5916 int ret;
5917
5918 ret = ath10k_wmi_start_scan_verify(arg);
5919 if (ret)
d7579d12 5920 return ERR_PTR(ret);
a6aa5da3 5921
d7579d12 5922 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
a6aa5da3
MK		 5923 skb = ath10k_wmi_alloc_skb(ar, len);
5924 if (!skb)
d7579d12 5925 return ERR_PTR(-ENOMEM);
a6aa5da3 5926
d7579d12 5927 cmd = (struct wmi_start_scan_cmd *)skb->data;
a6aa5da3 5928
d7579d12
MK		 5929 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
5930 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
a6aa5da3 5931
d7579d12 5932 cmd->burst_duration_ms = __cpu_to_le32(0);
5e3dd157 5933
7aa7a72a 5934 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
d7579d12
MK		 5935 return skb;
5936}
5937
5938static struct sk_buff *
5939ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
5940 const struct wmi_start_scan_arg *arg)
5941{
5942 struct wmi_10x_start_scan_cmd *cmd;
5943 struct sk_buff *skb;
5944 size_t len;
5945 int ret;
5946
5947 ret = ath10k_wmi_start_scan_verify(arg);
5948 if (ret)
5949 return ERR_PTR(ret);
5950
5951 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
5952 skb = ath10k_wmi_alloc_skb(ar, len);
5953 if (!skb)
5954 return ERR_PTR(-ENOMEM);
5955
5956 cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
5957
5958 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
5959 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
5960
5961 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
5962 return skb;
5e3dd157
KV		 5963}
5964
5965void ath10k_wmi_start_scan_init(struct ath10k *ar,
5966 struct wmi_start_scan_arg *arg)
5967{
5968 /* setup commonly used values */
5969 arg->scan_req_id = 1;
5970 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
5971 arg->dwell_time_active = 50;
5972 arg->dwell_time_passive = 150;
5973 arg->min_rest_time = 50;
5974 arg->max_rest_time = 500;
5975 arg->repeat_probe_time = 0;
5976 arg->probe_spacing_time = 0;
5977 arg->idle_time = 0;
c322892f 5978 arg->max_scan_time = 20000;
5e3dd157
KV		 5979 arg->probe_delay = 5;
5980 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
5981 | WMI_SCAN_EVENT_COMPLETED
5982 | WMI_SCAN_EVENT_BSS_CHANNEL
5983 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
5984 | WMI_SCAN_EVENT_DEQUEUED;
5e3dd157
KV		 5985 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
5986 arg->n_bssids = 1;
5987 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
5988}
5989
d7579d12
MK		 5990static struct sk_buff *
5991ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
5992 const struct wmi_stop_scan_arg *arg)
5e3dd157
KV		 5993{
5994 struct wmi_stop_scan_cmd *cmd;
5995 struct sk_buff *skb;
5996 u32 scan_id;
5997 u32 req_id;
5998
5999 if (arg->req_id > 0xFFF)
d7579d12 6000 return ERR_PTR(-EINVAL);
5e3dd157 6001 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
d7579d12 6002 return ERR_PTR(-EINVAL);
5e3dd157 6003
7aa7a72a 6004 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6005 if (!skb)
d7579d12 6006 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6007
6008 scan_id = arg->u.scan_id;
6009 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
6010
6011 req_id = arg->req_id;
6012 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
6013
6014 cmd = (struct wmi_stop_scan_cmd *)skb->data;
6015 cmd->req_type = __cpu_to_le32(arg->req_type);
6016 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
6017 cmd->scan_id = __cpu_to_le32(scan_id);
6018 cmd->scan_req_id = __cpu_to_le32(req_id);
6019
7aa7a72a 6020 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6021 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
6022 arg->req_id, arg->req_type, arg->u.scan_id);
d7579d12 6023 return skb;
5e3dd157
KV		 6024}
6025
d7579d12
MK		 6026static struct sk_buff *
6027ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
6028 enum wmi_vdev_type type,
6029 enum wmi_vdev_subtype subtype,
6030 const u8 macaddr[ETH_ALEN])
5e3dd157
KV		 6031{
6032 struct wmi_vdev_create_cmd *cmd;
6033 struct sk_buff *skb;
6034
7aa7a72a 6035 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6036 if (!skb)
d7579d12 6037 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6038
6039 cmd = (struct wmi_vdev_create_cmd *)skb->data;
6040 cmd->vdev_id = __cpu_to_le32(vdev_id);
6041 cmd->vdev_type = __cpu_to_le32(type);
6042 cmd->vdev_subtype = __cpu_to_le32(subtype);
b25f32cb 6043 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
5e3dd157 6044
7aa7a72a 6045 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6046 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
6047 vdev_id, type, subtype, macaddr);
d7579d12 6048 return skb;
5e3dd157
KV		 6049}
6050
d7579d12
MK		 6051static struct sk_buff *
6052ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV		 6053{
6054 struct wmi_vdev_delete_cmd *cmd;
6055 struct sk_buff *skb;
6056
7aa7a72a 6057 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6058 if (!skb)
d7579d12 6059 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6060
6061 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
6062 cmd->vdev_id = __cpu_to_le32(vdev_id);
6063
7aa7a72a 6064 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157 6065 "WMI vdev delete id %d\n", vdev_id);
d7579d12 6066 return skb;
5e3dd157
KV		 6067}
6068
d7579d12
MK		 6069static struct sk_buff *
6070ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
6071 const struct wmi_vdev_start_request_arg *arg,
6072 bool restart)
5e3dd157
KV		 6073{
6074 struct wmi_vdev_start_request_cmd *cmd;
6075 struct sk_buff *skb;
6076 const char *cmdname;
6077 u32 flags = 0;
6078
5e3dd157 6079 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
d7579d12 6080 return ERR_PTR(-EINVAL);
5e3dd157 6081 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
d7579d12 6082 return ERR_PTR(-EINVAL);
5e3dd157 6083
d7579d12 6084 if (restart)
5e3dd157
KV		 6085 cmdname = "restart";
6086 else
d7579d12 6087 cmdname = "start";
5e3dd157 6088
7aa7a72a 6089 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6090 if (!skb)
d7579d12 6091 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6092
6093 if (arg->hidden_ssid)
6094 flags |= WMI_VDEV_START_HIDDEN_SSID;
6095 if (arg->pmf_enabled)
6096 flags |= WMI_VDEV_START_PMF_ENABLED;
6097
6098 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
6099 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6100 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
6101 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
6102 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
6103 cmd->flags = __cpu_to_le32(flags);
6104 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
6105 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
6106
6107 if (arg->ssid) {
6108 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
6109 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
6110 }
6111
2d66721c 6112 ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
5e3dd157 6113
7aa7a72a 6114 ath10k_dbg(ar, ATH10K_DBG_WMI,
8cc7f26c
KV		 6115 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
6116 cmdname, arg->vdev_id,
e8a50f8b
MP		 6117 flags, arg->channel.freq, arg->channel.mode,
6118 cmd->chan.flags, arg->channel.max_power);
5e3dd157 6119
d7579d12 6120 return skb;
5e3dd157
KV		 6121}
6122
d7579d12
MK		 6123static struct sk_buff *
6124ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV		 6125{
6126 struct wmi_vdev_stop_cmd *cmd;
6127 struct sk_buff *skb;
6128
7aa7a72a 6129 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6130 if (!skb)
d7579d12 6131 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6132
6133 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
6134 cmd->vdev_id = __cpu_to_le32(vdev_id);
6135
7aa7a72a 6136 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
d7579d12 6137 return skb;
5e3dd157
KV		 6138}
6139
d7579d12
MK		 6140static struct sk_buff *
6141ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
6142 const u8 *bssid)
5e3dd157
KV		 6143{
6144 struct wmi_vdev_up_cmd *cmd;
6145 struct sk_buff *skb;
6146
7aa7a72a 6147 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6148 if (!skb)
d7579d12 6149 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6150
6151 cmd = (struct wmi_vdev_up_cmd *)skb->data;
6152 cmd->vdev_id = __cpu_to_le32(vdev_id);
6153 cmd->vdev_assoc_id = __cpu_to_le32(aid);
b25f32cb 6154 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
5e3dd157 6155
7aa7a72a 6156 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6157 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
6158 vdev_id, aid, bssid);
d7579d12 6159 return skb;
5e3dd157
KV		 6160}
6161
d7579d12
MK		 6162static struct sk_buff *
6163ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV		 6164{
6165 struct wmi_vdev_down_cmd *cmd;
6166 struct sk_buff *skb;
6167
7aa7a72a 6168 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6169 if (!skb)
d7579d12 6170 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6171
6172 cmd = (struct wmi_vdev_down_cmd *)skb->data;
6173 cmd->vdev_id = __cpu_to_le32(vdev_id);
6174
7aa7a72a 6175 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157 6176 "wmi mgmt vdev down id 0x%x\n", vdev_id);
d7579d12 6177 return skb;
5e3dd157
KV		 6178}
6179
d7579d12
MK		 6180static struct sk_buff *
6181ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
6182 u32 param_id, u32 param_value)
5e3dd157
KV		 6183{
6184 struct wmi_vdev_set_param_cmd *cmd;
6185 struct sk_buff *skb;
6186
6d1506e7 6187 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7aa7a72a 6188 ath10k_dbg(ar, ATH10K_DBG_WMI,
6d1506e7
BM		 6189 "vdev param %d not supported by firmware\n",
6190 param_id);
d7579d12 6191 return ERR_PTR(-EOPNOTSUPP);
6d1506e7
BM		 6192 }
6193
7aa7a72a 6194 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6195 if (!skb)
d7579d12 6196 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6197
6198 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
6199 cmd->vdev_id = __cpu_to_le32(vdev_id);
6200 cmd->param_id = __cpu_to_le32(param_id);
6201 cmd->param_value = __cpu_to_le32(param_value);
6202
7aa7a72a 6203 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6204 "wmi vdev id 0x%x set param %d value %d\n",
6205 vdev_id, param_id, param_value);
d7579d12 6206 return skb;
5e3dd157
KV		 6207}
6208
d7579d12
MK		 6209static struct sk_buff *
6210ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
6211 const struct wmi_vdev_install_key_arg *arg)
5e3dd157
KV		 6212{
6213 struct wmi_vdev_install_key_cmd *cmd;
6214 struct sk_buff *skb;
6215
6216 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
d7579d12 6217 return ERR_PTR(-EINVAL);
5e3dd157 6218 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
d7579d12 6219 return ERR_PTR(-EINVAL);
5e3dd157 6220
7aa7a72a 6221 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
5e3dd157 6222 if (!skb)
d7579d12 6223 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6224
6225 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
6226 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6227 cmd->key_idx = __cpu_to_le32(arg->key_idx);
6228 cmd->key_flags = __cpu_to_le32(arg->key_flags);
6229 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
6230 cmd->key_len = __cpu_to_le32(arg->key_len);
6231 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
6232 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
6233
6234 if (arg->macaddr)
b25f32cb 6235 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
5e3dd157
KV		 6236 if (arg->key_data)
6237 memcpy(cmd->key_data, arg->key_data, arg->key_len);
6238
7aa7a72a 6239 ath10k_dbg(ar, ATH10K_DBG_WMI,
e0c508ab
MK		 6240 "wmi vdev install key idx %d cipher %d len %d\n",
6241 arg->key_idx, arg->key_cipher, arg->key_len);
d7579d12 6242 return skb;
5e3dd157
KV		 6243}
6244
d7579d12
MK		 6245static struct sk_buff *
6246ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
6247 const struct wmi_vdev_spectral_conf_arg *arg)
855aed12
SW		 6248{
6249 struct wmi_vdev_spectral_conf_cmd *cmd;
6250 struct sk_buff *skb;
855aed12 6251
7aa7a72a 6252 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12 6253 if (!skb)
d7579d12 6254 return ERR_PTR(-ENOMEM);
855aed12
SW		 6255
6256 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
6257 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6258 cmd->scan_count = __cpu_to_le32(arg->scan_count);
6259 cmd->scan_period = __cpu_to_le32(arg->scan_period);
6260 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
6261 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
6262 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
6263 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
6264 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
6265 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
6266 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
6267 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
6268 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
6269 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
6270 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
6271 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
6272 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
6273 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
6274 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
6275 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
6276
d7579d12 6277 return skb;
855aed12
SW		 6278}
6279
d7579d12
MK		 6280static struct sk_buff *
6281ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
6282 u32 trigger, u32 enable)
855aed12
SW		 6283{
6284 struct wmi_vdev_spectral_enable_cmd *cmd;
6285 struct sk_buff *skb;
855aed12 6286
7aa7a72a 6287 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12 6288 if (!skb)
d7579d12 6289 return ERR_PTR(-ENOMEM);
855aed12
SW		 6290
6291 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
6292 cmd->vdev_id = __cpu_to_le32(vdev_id);
6293 cmd->trigger_cmd = __cpu_to_le32(trigger);
6294 cmd->enable_cmd = __cpu_to_le32(enable);
6295
d7579d12 6296 return skb;
855aed12
SW		 6297}
6298
d7579d12
MK		 6299static struct sk_buff *
6300ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
7390ed34
MP		 6301 const u8 peer_addr[ETH_ALEN],
6302 enum wmi_peer_type peer_type)
5e3dd157
KV		 6303{
6304 struct wmi_peer_create_cmd *cmd;
6305 struct sk_buff *skb;
6306
7aa7a72a 6307 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6308 if (!skb)
d7579d12 6309 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6310
6311 cmd = (struct wmi_peer_create_cmd *)skb->data;
6312 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 6313 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6314
7aa7a72a 6315 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6316 "wmi peer create vdev_id %d peer_addr %pM\n",
6317 vdev_id, peer_addr);
d7579d12 6318 return skb;
5e3dd157
KV		 6319}
6320
d7579d12
MK		 6321static struct sk_buff *
6322ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
6323 const u8 peer_addr[ETH_ALEN])
5e3dd157
KV		 6324{
6325 struct wmi_peer_delete_cmd *cmd;
6326 struct sk_buff *skb;
6327
7aa7a72a 6328 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6329 if (!skb)
d7579d12 6330 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6331
6332 cmd = (struct wmi_peer_delete_cmd *)skb->data;
6333 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 6334 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6335
7aa7a72a 6336 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6337 "wmi peer delete vdev_id %d peer_addr %pM\n",
6338 vdev_id, peer_addr);
d7579d12 6339 return skb;
5e3dd157
KV		 6340}
6341
d7579d12
MK		 6342static struct sk_buff *
6343ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
6344 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
5e3dd157
KV		 6345{
6346 struct wmi_peer_flush_tids_cmd *cmd;
6347 struct sk_buff *skb;
6348
7aa7a72a 6349 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6350 if (!skb)
d7579d12 6351 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6352
6353 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
6354 cmd->vdev_id = __cpu_to_le32(vdev_id);
6355 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
b25f32cb 6356 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6357
7aa7a72a 6358 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6359 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
6360 vdev_id, peer_addr, tid_bitmap);
d7579d12 6361 return skb;
5e3dd157
KV		 6362}
6363
d7579d12
MK		 6364static struct sk_buff *
6365ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
6366 const u8 *peer_addr,
6367 enum wmi_peer_param param_id,
6368 u32 param_value)
5e3dd157
KV		 6369{
6370 struct wmi_peer_set_param_cmd *cmd;
6371 struct sk_buff *skb;
6372
7aa7a72a 6373 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6374 if (!skb)
d7579d12 6375 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6376
6377 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
6378 cmd->vdev_id = __cpu_to_le32(vdev_id);
6379 cmd->param_id = __cpu_to_le32(param_id);
6380 cmd->param_value = __cpu_to_le32(param_value);
b25f32cb 6381 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 6382
7aa7a72a 6383 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6384 "wmi vdev %d peer 0x%pM set param %d value %d\n",
6385 vdev_id, peer_addr, param_id, param_value);
d7579d12 6386 return skb;
5e3dd157
KV		 6387}
6388
d7579d12
MK		 6389static struct sk_buff *
6390ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
6391 enum wmi_sta_ps_mode psmode)
5e3dd157
KV		 6392{
6393 struct wmi_sta_powersave_mode_cmd *cmd;
6394 struct sk_buff *skb;
6395
7aa7a72a 6396 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6397 if (!skb)
d7579d12 6398 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6399
6400 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
6401 cmd->vdev_id = __cpu_to_le32(vdev_id);
6402 cmd->sta_ps_mode = __cpu_to_le32(psmode);
6403
7aa7a72a 6404 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6405 "wmi set powersave id 0x%x mode %d\n",
6406 vdev_id, psmode);
d7579d12 6407 return skb;
5e3dd157
KV		 6408}
6409
d7579d12
MK		 6410static struct sk_buff *
6411ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
6412 enum wmi_sta_powersave_param param_id,
6413 u32 value)
5e3dd157
KV		 6414{
6415 struct wmi_sta_powersave_param_cmd *cmd;
6416 struct sk_buff *skb;
6417
7aa7a72a 6418 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6419 if (!skb)
d7579d12 6420 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6421
6422 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
6423 cmd->vdev_id = __cpu_to_le32(vdev_id);
6424 cmd->param_id = __cpu_to_le32(param_id);
6425 cmd->param_value = __cpu_to_le32(value);
6426
7aa7a72a 6427 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6428 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
6429 vdev_id, param_id, value);
d7579d12 6430 return skb;
5e3dd157
KV		 6431}
6432
d7579d12
MK		 6433static struct sk_buff *
6434ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6435 enum wmi_ap_ps_peer_param param_id, u32 value)
5e3dd157
KV		 6436{
6437 struct wmi_ap_ps_peer_cmd *cmd;
6438 struct sk_buff *skb;
6439
6440 if (!mac)
d7579d12 6441 return ERR_PTR(-EINVAL);
5e3dd157 6442
7aa7a72a 6443 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6444 if (!skb)
d7579d12 6445 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6446
6447 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
6448 cmd->vdev_id = __cpu_to_le32(vdev_id);
6449 cmd->param_id = __cpu_to_le32(param_id);
6450 cmd->param_value = __cpu_to_le32(value);
b25f32cb 6451 ether_addr_copy(cmd->peer_macaddr.addr, mac);
5e3dd157 6452
7aa7a72a 6453 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 6454 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
6455 vdev_id, param_id, value, mac);
d7579d12 6456 return skb;
5e3dd157
KV		 6457}
6458
d7579d12
MK		 6459static struct sk_buff *
6460ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
6461 const struct wmi_scan_chan_list_arg *arg)
5e3dd157
KV		 6462{
6463 struct wmi_scan_chan_list_cmd *cmd;
6464 struct sk_buff *skb;
6465 struct wmi_channel_arg *ch;
6466 struct wmi_channel *ci;
6467 int len;
6468 int i;
6469
6470 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
6471
7aa7a72a 6472 skb = ath10k_wmi_alloc_skb(ar, len);
5e3dd157 6473 if (!skb)
d7579d12 6474 return ERR_PTR(-EINVAL);
5e3dd157
KV		 6475
6476 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
6477 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
6478
6479 for (i = 0; i < arg->n_channels; i++) {
5e3dd157
KV		 6480 ch = &arg->channels[i];
6481 ci = &cmd->chan_info[i];
6482
2d66721c 6483 ath10k_wmi_put_wmi_channel(ci, ch);
5e3dd157
KV		 6484 }
6485
d7579d12 6486 return skb;
5e3dd157
KV		 6487}
6488
24c88f78
MK		 6489static void
6490ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
6491 const struct wmi_peer_assoc_complete_arg *arg)
5e3dd157 6492{
24c88f78 6493 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
5e3dd157 6494
5e3dd157
KV		 6495 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
6496 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
6497 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
6498 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
6499 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
6500 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
6501 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
6502 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
6503 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
6504 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
6505 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
6506 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
6507 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
6508
b25f32cb 6509 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
5e3dd157
KV		 6510
6511 cmd->peer_legacy_rates.num_rates =
6512 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
6513 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
6514 arg->peer_legacy_rates.num_rates);
6515
6516 cmd->peer_ht_rates.num_rates =
6517 __cpu_to_le32(arg->peer_ht_rates.num_rates);
6518 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
6519 arg->peer_ht_rates.num_rates);
6520
6521 cmd->peer_vht_rates.rx_max_rate =
6522 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
6523 cmd->peer_vht_rates.rx_mcs_set =
6524 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
6525 cmd->peer_vht_rates.tx_max_rate =
6526 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
6527 cmd->peer_vht_rates.tx_mcs_set =
6528 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
24c88f78
MK		 6529}
6530
6531static void
6532ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
6533 const struct wmi_peer_assoc_complete_arg *arg)
6534{
6535 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
6536
6537 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
6538 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
6539}
6540
6541static void
6542ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
6543 const struct wmi_peer_assoc_complete_arg *arg)
6544{
6545 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
6546}
6547
6548static void
6549ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
6550 const struct wmi_peer_assoc_complete_arg *arg)
6551{
6552 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
6553 int max_mcs, max_nss;
6554 u32 info0;
6555
6556 /* TODO: Is using max values okay with firmware? */
6557 max_mcs = 0xf;
6558 max_nss = 0xf;
6559
6560 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
6561 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
6562
6563 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
6564 cmd->info0 = __cpu_to_le32(info0);
6565}
6566
b54e16f1
VT		 6567static void
6568ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
6569 const struct wmi_peer_assoc_complete_arg *arg)
6570{
6571 struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
6572
6573 ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
6574 cmd->peer_bw_rxnss_override = 0;
6575}
6576
d7579d12
MK		 6577static int
6578ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
24c88f78 6579{
24c88f78
MK		 6580 if (arg->peer_mpdu_density > 16)
6581 return -EINVAL;
6582 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
6583 return -EINVAL;
6584 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
6585 return -EINVAL;
6586
d7579d12
MK		 6587 return 0;
6588}
6589
6590static struct sk_buff *
6591ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
6592 const struct wmi_peer_assoc_complete_arg *arg)
6593{
6594 size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
6595 struct sk_buff *skb;
6596 int ret;
6597
6598 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6599 if (ret)
6600 return ERR_PTR(ret);
24c88f78 6601
7aa7a72a 6602 skb = ath10k_wmi_alloc_skb(ar, len);
24c88f78 6603 if (!skb)
d7579d12 6604 return ERR_PTR(-ENOMEM);
24c88f78 6605
d7579d12
MK		 6606 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
6607
6608 ath10k_dbg(ar, ATH10K_DBG_WMI,
6609 "wmi peer assoc vdev %d addr %pM (%s)\n",
6610 arg->vdev_id, arg->addr,
6611 arg->peer_reassoc ? "reassociate" : "new");
6612 return skb;
6613}
6614
6615static struct sk_buff *
6616ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
6617 const struct wmi_peer_assoc_complete_arg *arg)
6618{
6619 size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
6620 struct sk_buff *skb;
6621 int ret;
6622
6623 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6624 if (ret)
6625 return ERR_PTR(ret);
6626
6627 skb = ath10k_wmi_alloc_skb(ar, len);
6628 if (!skb)
6629 return ERR_PTR(-ENOMEM);
6630
6631 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
6632
6633 ath10k_dbg(ar, ATH10K_DBG_WMI,
6634 "wmi peer assoc vdev %d addr %pM (%s)\n",
6635 arg->vdev_id, arg->addr,
6636 arg->peer_reassoc ? "reassociate" : "new");
6637 return skb;
6638}
6639
6640static struct sk_buff *
6641ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
6642 const struct wmi_peer_assoc_complete_arg *arg)
6643{
6644 size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
6645 struct sk_buff *skb;
6646 int ret;
6647
6648 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6649 if (ret)
6650 return ERR_PTR(ret);
6651
6652 skb = ath10k_wmi_alloc_skb(ar, len);
6653 if (!skb)
6654 return ERR_PTR(-ENOMEM);
6655
6656 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
5e3dd157 6657
7aa7a72a 6658 ath10k_dbg(ar, ATH10K_DBG_WMI,
44d6fa90
CYY		 6659 "wmi peer assoc vdev %d addr %pM (%s)\n",
6660 arg->vdev_id, arg->addr,
6661 arg->peer_reassoc ? "reassociate" : "new");
d7579d12 6662 return skb;
5e3dd157
KV		 6663}
6664
b54e16f1
VT		 6665static struct sk_buff *
6666ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
6667 const struct wmi_peer_assoc_complete_arg *arg)
6668{
6669 size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
6670 struct sk_buff *skb;
6671 int ret;
6672
6673 ret = ath10k_wmi_peer_assoc_check_arg(arg);
6674 if (ret)
6675 return ERR_PTR(ret);
6676
6677 skb = ath10k_wmi_alloc_skb(ar, len);
6678 if (!skb)
6679 return ERR_PTR(-ENOMEM);
6680
6681 ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
6682
6683 ath10k_dbg(ar, ATH10K_DBG_WMI,
6684 "wmi peer assoc vdev %d addr %pM (%s)\n",
6685 arg->vdev_id, arg->addr,
6686 arg->peer_reassoc ? "reassociate" : "new");
6687 return skb;
6688}
6689
a57a6a27
RM		 6690static struct sk_buff *
6691ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
6692{
6693 struct sk_buff *skb;
6694
6695 skb = ath10k_wmi_alloc_skb(ar, 0);
6696 if (!skb)
6697 return ERR_PTR(-ENOMEM);
6698
6699 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
6700 return skb;
6701}
6702
8a0b459e
RM		 6703static struct sk_buff *
6704ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
6705 enum wmi_bss_survey_req_type type)
6706{
6707 struct wmi_pdev_chan_info_req_cmd *cmd;
6708 struct sk_buff *skb;
6709
6710 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6711 if (!skb)
6712 return ERR_PTR(-ENOMEM);
6713
6714 cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
6715 cmd->type = __cpu_to_le32(type);
6716
6717 ath10k_dbg(ar, ATH10K_DBG_WMI,
6718 "wmi pdev bss info request type %d\n", type);
6719
6720 return skb;
6721}
6722
748afc47 6723/* This function assumes the beacon is already DMA mapped */
d7579d12 6724static struct sk_buff *
9ad50182
MK		 6725ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
6726 size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
6727 bool deliver_cab)
5e3dd157 6728{
748afc47 6729 struct wmi_bcn_tx_ref_cmd *cmd;
5e3dd157 6730 struct sk_buff *skb;
748afc47 6731 struct ieee80211_hdr *hdr;
748afc47 6732 u16 fc;
5e3dd157 6733
7aa7a72a 6734 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6735 if (!skb)
d7579d12 6736 return ERR_PTR(-ENOMEM);
5e3dd157 6737
9ad50182 6738 hdr = (struct ieee80211_hdr *)bcn;
748afc47
MK		 6739 fc = le16_to_cpu(hdr->frame_control);
6740
6741 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
9ad50182
MK		 6742 cmd->vdev_id = __cpu_to_le32(vdev_id);
6743 cmd->data_len = __cpu_to_le32(bcn_len);
6744 cmd->data_ptr = __cpu_to_le32(bcn_paddr);
748afc47
MK		 6745 cmd->msdu_id = 0;
6746 cmd->frame_control = __cpu_to_le32(fc);
6747 cmd->flags = 0;
24c88f78 6748 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
748afc47 6749
9ad50182 6750 if (dtim_zero)
748afc47
MK		 6751 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
6752
9ad50182 6753 if (deliver_cab)
748afc47
MK		 6754 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
6755
d7579d12 6756 return skb;
5e3dd157
KV		 6757}
6758
5e752e42
MK		 6759void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
6760 const struct wmi_wmm_params_arg *arg)
5e3dd157
KV		 6761{
6762 params->cwmin = __cpu_to_le32(arg->cwmin);
6763 params->cwmax = __cpu_to_le32(arg->cwmax);
6764 params->aifs = __cpu_to_le32(arg->aifs);
6765 params->txop = __cpu_to_le32(arg->txop);
6766 params->acm = __cpu_to_le32(arg->acm);
6767 params->no_ack = __cpu_to_le32(arg->no_ack);
6768}
6769
d7579d12
MK		 6770static struct sk_buff *
6771ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
5e752e42 6772 const struct wmi_wmm_params_all_arg *arg)
5e3dd157
KV		 6773{
6774 struct wmi_pdev_set_wmm_params *cmd;
6775 struct sk_buff *skb;
6776
7aa7a72a 6777 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6778 if (!skb)
d7579d12 6779 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6780
6781 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
5e752e42
MK		 6782 ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
6783 ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
6784 ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
6785 ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
5e3dd157 6786
7aa7a72a 6787 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
d7579d12 6788 return skb;
5e3dd157
KV		 6789}
6790
d7579d12 6791static struct sk_buff *
de23d3ef 6792ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
5e3dd157
KV		 6793{
6794 struct wmi_request_stats_cmd *cmd;
6795 struct sk_buff *skb;
6796
7aa7a72a 6797 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 6798 if (!skb)
d7579d12 6799 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 6800
6801 cmd = (struct wmi_request_stats_cmd *)skb->data;
de23d3ef 6802 cmd->stats_id = __cpu_to_le32(stats_mask);
5e3dd157 6803
de23d3ef
MK		 6804 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
6805 stats_mask);
d7579d12 6806 return skb;
5e3dd157 6807}
9cfbce75 6808
d7579d12
MK		 6809static struct sk_buff *
6810ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
6811 enum wmi_force_fw_hang_type type, u32 delay_ms)
9cfbce75
MK		 6812{
6813 struct wmi_force_fw_hang_cmd *cmd;
6814 struct sk_buff *skb;
6815
7aa7a72a 6816 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9cfbce75 6817 if (!skb)
d7579d12 6818 return ERR_PTR(-ENOMEM);
9cfbce75
MK		 6819
6820 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
6821 cmd->type = __cpu_to_le32(type);
6822 cmd->delay_ms = __cpu_to_le32(delay_ms);
6823
7aa7a72a 6824 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
9cfbce75 6825 type, delay_ms);
d7579d12 6826 return skb;
9cfbce75 6827}
f118a3e5 6828
d7579d12 6829static struct sk_buff *
467210a6
SJ		 6830ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable,
6831 u32 log_level)
f118a3e5
KV		 6832{
6833 struct wmi_dbglog_cfg_cmd *cmd;
6834 struct sk_buff *skb;
6835 u32 cfg;
6836
7aa7a72a 6837 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
f118a3e5 6838 if (!skb)
d7579d12 6839 return ERR_PTR(-ENOMEM);
f118a3e5
KV		 6840
6841 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
6842
6843 if (module_enable) {
467210a6 6844 cfg = SM(log_level,
f118a3e5
KV		 6845 ATH10K_DBGLOG_CFG_LOG_LVL);
6846 } else {
6847 /* set back defaults, all modules with WARN level */
6848 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
6849 ATH10K_DBGLOG_CFG_LOG_LVL);
6850 module_enable = ~0;
6851 }
6852
6853 cmd->module_enable = __cpu_to_le32(module_enable);
6854 cmd->module_valid = __cpu_to_le32(~0);
6855 cmd->config_enable = __cpu_to_le32(cfg);
6856 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
6857
7aa7a72a 6858 ath10k_dbg(ar, ATH10K_DBG_WMI,
f118a3e5
KV		 6859 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
6860 __le32_to_cpu(cmd->module_enable),
6861 __le32_to_cpu(cmd->module_valid),
6862 __le32_to_cpu(cmd->config_enable),
6863 __le32_to_cpu(cmd->config_valid));
d7579d12 6864 return skb;
f118a3e5 6865}
b79b9baa 6866
d7579d12
MK		 6867static struct sk_buff *
6868ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
90174455
RM		 6869{
6870 struct wmi_pdev_pktlog_enable_cmd *cmd;
6871 struct sk_buff *skb;
6872
6873 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6874 if (!skb)
d7579d12 6875 return ERR_PTR(-ENOMEM);
90174455
RM		 6876
6877 ev_bitmap &= ATH10K_PKTLOG_ANY;
90174455
RM		 6878
6879 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
6880 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
d7579d12
MK		 6881
6882 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
6883 ev_bitmap);
6884 return skb;
90174455
RM		 6885}
6886
d7579d12
MK		 6887static struct sk_buff *
6888ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
90174455
RM		 6889{
6890 struct sk_buff *skb;
6891
6892 skb = ath10k_wmi_alloc_skb(ar, 0);
6893 if (!skb)
d7579d12 6894 return ERR_PTR(-ENOMEM);
90174455
RM		 6895
6896 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
d7579d12 6897 return skb;
90174455
RM		 6898}
6899
ffdd738d
RM		 6900static struct sk_buff *
6901ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
6902 u32 duration, u32 next_offset,
6903 u32 enabled)
6904{
6905 struct wmi_pdev_set_quiet_cmd *cmd;
6906 struct sk_buff *skb;
6907
6908 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6909 if (!skb)
6910 return ERR_PTR(-ENOMEM);
6911
6912 cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
6913 cmd->period = __cpu_to_le32(period);
6914 cmd->duration = __cpu_to_le32(duration);
6915 cmd->next_start = __cpu_to_le32(next_offset);
6916 cmd->enabled = __cpu_to_le32(enabled);
6917
6918 ath10k_dbg(ar, ATH10K_DBG_WMI,
6919 "wmi quiet param: period %u duration %u enabled %d\n",
6920 period, duration, enabled);
6921 return skb;
6922}
6923
dc8ab278
RM		 6924static struct sk_buff *
6925ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
6926 const u8 *mac)
6927{
6928 struct wmi_addba_clear_resp_cmd *cmd;
6929 struct sk_buff *skb;
6930
6931 if (!mac)
6932 return ERR_PTR(-EINVAL);
6933
6934 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6935 if (!skb)
6936 return ERR_PTR(-ENOMEM);
6937
6938 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
6939 cmd->vdev_id = __cpu_to_le32(vdev_id);
6940 ether_addr_copy(cmd->peer_macaddr.addr, mac);
6941
6942 ath10k_dbg(ar, ATH10K_DBG_WMI,
6943 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
6944 vdev_id, mac);
6945 return skb;
6946}
6947
65c0893d
RM		 6948static struct sk_buff *
6949ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6950 u32 tid, u32 buf_size)
6951{
6952 struct wmi_addba_send_cmd *cmd;
6953 struct sk_buff *skb;
6954
6955 if (!mac)
6956 return ERR_PTR(-EINVAL);
6957
6958 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6959 if (!skb)
6960 return ERR_PTR(-ENOMEM);
6961
6962 cmd = (struct wmi_addba_send_cmd *)skb->data;
6963 cmd->vdev_id = __cpu_to_le32(vdev_id);
6964 ether_addr_copy(cmd->peer_macaddr.addr, mac);
6965 cmd->tid = __cpu_to_le32(tid);
6966 cmd->buffersize = __cpu_to_le32(buf_size);
6967
6968 ath10k_dbg(ar, ATH10K_DBG_WMI,
6969 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
6970 vdev_id, mac, tid, buf_size);
6971 return skb;
6972}
6973
11597413
RM		 6974static struct sk_buff *
6975ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
6976 u32 tid, u32 status)
6977{
6978 struct wmi_addba_setresponse_cmd *cmd;
6979 struct sk_buff *skb;
6980
6981 if (!mac)
6982 return ERR_PTR(-EINVAL);
6983
6984 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6985 if (!skb)
6986 return ERR_PTR(-ENOMEM);
6987
6988 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
6989 cmd->vdev_id = __cpu_to_le32(vdev_id);
6990 ether_addr_copy(cmd->peer_macaddr.addr, mac);
6991 cmd->tid = __cpu_to_le32(tid);
6992 cmd->statuscode = __cpu_to_le32(status);
6993
6994 ath10k_dbg(ar, ATH10K_DBG_WMI,
6995 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
6996 vdev_id, mac, tid, status);
6997 return skb;
6998}
6999
50abef85
RM		 7000static struct sk_buff *
7001ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
7002 u32 tid, u32 initiator, u32 reason)
7003{
7004 struct wmi_delba_send_cmd *cmd;
7005 struct sk_buff *skb;
7006
7007 if (!mac)
7008 return ERR_PTR(-EINVAL);
7009
7010 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7011 if (!skb)
7012 return ERR_PTR(-ENOMEM);
7013
7014 cmd = (struct wmi_delba_send_cmd *)skb->data;
7015 cmd->vdev_id = __cpu_to_le32(vdev_id);
7016 ether_addr_copy(cmd->peer_macaddr.addr, mac);
7017 cmd->tid = __cpu_to_le32(tid);
7018 cmd->initiator = __cpu_to_le32(initiator);
7019 cmd->reasoncode = __cpu_to_le32(reason);
7020
7021 ath10k_dbg(ar, ATH10K_DBG_WMI,
7022 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
7023 vdev_id, mac, tid, initiator, reason);
7024 return skb;
7025}
7026
29542666
MK		 7027static struct sk_buff *
7028ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
7029{
7030 struct wmi_pdev_get_tpc_config_cmd *cmd;
7031 struct sk_buff *skb;
7032
7033 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7034 if (!skb)
7035 return ERR_PTR(-ENOMEM);
7036
7037 cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
7038 cmd->param = __cpu_to_le32(param);
7039
7040 ath10k_dbg(ar, ATH10K_DBG_WMI,
7041 "wmi pdev get tcp config param:%d\n", param);
7042 return skb;
7043}
7044
bc6f9ae6
MP		 7045size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
7046{
7047 struct ath10k_fw_stats_peer *i;
7048 size_t num = 0;
7049
7050 list_for_each_entry(i, head, list)
7051 ++num;
7052
7053 return num;
7054}
7055
7056size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
7057{
7058 struct ath10k_fw_stats_vdev *i;
7059 size_t num = 0;
7060
7061 list_for_each_entry(i, head, list)
7062 ++num;
7063
7064 return num;
7065}
7066
7067static void
7068ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7069 char *buf, u32 *length)
7070{
7071 u32 len = *length;
7072 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7073
7074 len += scnprintf(buf + len, buf_len - len, "\n");
7075 len += scnprintf(buf + len, buf_len - len, "%30s\n",
7076 "ath10k PDEV stats");
7077 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7078 "=================");
7079
7080 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7081 "Channel noise floor", pdev->ch_noise_floor);
7082 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7083 "Channel TX power", pdev->chan_tx_power);
7084 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7085 "TX frame count", pdev->tx_frame_count);
7086 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7087 "RX frame count", pdev->rx_frame_count);
7088 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7089 "RX clear count", pdev->rx_clear_count);
7090 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7091 "Cycle count", pdev->cycle_count);
7092 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7093 "PHY error count", pdev->phy_err_count);
7094
7095 *length = len;
7096}
7097
7098static void
7099ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7100 char *buf, u32 *length)
7101{
7102 u32 len = *length;
7103 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7104
7105 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7106 "RTS bad count", pdev->rts_bad);
7107 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7108 "RTS good count", pdev->rts_good);
7109 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7110 "FCS bad count", pdev->fcs_bad);
7111 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7112 "No beacon count", pdev->no_beacons);
7113 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
7114 "MIB int count", pdev->mib_int_count);
7115
7116 len += scnprintf(buf + len, buf_len - len, "\n");
7117 *length = len;
7118}
7119
7120static void
7121ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7122 char *buf, u32 *length)
7123{
7124 u32 len = *length;
7125 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7126
7127 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7128 "ath10k PDEV TX stats");
7129 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7130 "=================");
7131
7132 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7133 "HTT cookies queued", pdev->comp_queued);
7134 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7135 "HTT cookies disp.", pdev->comp_delivered);
7136 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7137 "MSDU queued", pdev->msdu_enqued);
7138 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7139 "MPDU queued", pdev->mpdu_enqued);
7140 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7141 "MSDUs dropped", pdev->wmm_drop);
7142 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7143 "Local enqued", pdev->local_enqued);
7144 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7145 "Local freed", pdev->local_freed);
7146 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7147 "HW queued", pdev->hw_queued);
7148 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7149 "PPDUs reaped", pdev->hw_reaped);
7150 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7151 "Num underruns", pdev->underrun);
7152 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7153 "PPDUs cleaned", pdev->tx_abort);
7154 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7155 "MPDUs requed", pdev->mpdus_requed);
7156 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7157 "Excessive retries", pdev->tx_ko);
7158 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7159 "HW rate", pdev->data_rc);
7160 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7161 "Sched self tiggers", pdev->self_triggers);
7162 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7163 "Dropped due to SW retries",
7164 pdev->sw_retry_failure);
7165 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7166 "Illegal rate phy errors",
7167 pdev->illgl_rate_phy_err);
7168 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7169 "Pdev continuous xretry", pdev->pdev_cont_xretry);
7170 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7171 "TX timeout", pdev->pdev_tx_timeout);
7172 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7173 "PDEV resets", pdev->pdev_resets);
7174 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7175 "PHY underrun", pdev->phy_underrun);
7176 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7177 "MPDU is more than txop limit", pdev->txop_ovf);
7178 *length = len;
7179}
7180
7181static void
7182ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
7183 char *buf, u32 *length)
7184{
7185 u32 len = *length;
7186 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7187
7188 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
7189 "ath10k PDEV RX stats");
7190 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7191 "=================");
7192
7193 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7194 "Mid PPDU route change",
7195 pdev->mid_ppdu_route_change);
7196 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7197 "Tot. number of statuses", pdev->status_rcvd);
7198 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7199 "Extra frags on rings 0", pdev->r0_frags);
7200 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7201 "Extra frags on rings 1", pdev->r1_frags);
7202 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7203 "Extra frags on rings 2", pdev->r2_frags);
7204 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7205 "Extra frags on rings 3", pdev->r3_frags);
7206 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7207 "MSDUs delivered to HTT", pdev->htt_msdus);
7208 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7209 "MPDUs delivered to HTT", pdev->htt_mpdus);
7210 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7211 "MSDUs delivered to stack", pdev->loc_msdus);
7212 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7213 "MPDUs delivered to stack", pdev->loc_mpdus);
7214 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7215 "Oversized AMSUs", pdev->oversize_amsdu);
7216 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7217 "PHY errors", pdev->phy_errs);
7218 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7219 "PHY errors drops", pdev->phy_err_drop);
7220 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7221 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
7222 *length = len;
7223}
7224
7225static void
7226ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
7227 char *buf, u32 *length)
7228{
7229 u32 len = *length;
7230 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7231 int i;
7232
7233 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7234 "vdev id", vdev->vdev_id);
7235 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7236 "beacon snr", vdev->beacon_snr);
7237 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7238 "data snr", vdev->data_snr);
7239 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7240 "num rx frames", vdev->num_rx_frames);
7241 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7242 "num rts fail", vdev->num_rts_fail);
7243 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7244 "num rts success", vdev->num_rts_success);
7245 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7246 "num rx err", vdev->num_rx_err);
7247 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7248 "num rx discard", vdev->num_rx_discard);
7249 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7250 "num tx not acked", vdev->num_tx_not_acked);
7251
7252 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
7253 len += scnprintf(buf + len, buf_len - len,
7254 "%25s [%02d] %u\n",
7255 "num tx frames", i,
7256 vdev->num_tx_frames[i]);
7257
7258 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
7259 len += scnprintf(buf + len, buf_len - len,
7260 "%25s [%02d] %u\n",
7261 "num tx frames retries", i,
7262 vdev->num_tx_frames_retries[i]);
7263
7264 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
7265 len += scnprintf(buf + len, buf_len - len,
7266 "%25s [%02d] %u\n",
7267 "num tx frames failures", i,
7268 vdev->num_tx_frames_failures[i]);
7269
7270 for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
7271 len += scnprintf(buf + len, buf_len - len,
7272 "%25s [%02d] 0x%08x\n",
7273 "tx rate history", i,
7274 vdev->tx_rate_history[i]);
7275
7276 for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
7277 len += scnprintf(buf + len, buf_len - len,
7278 "%25s [%02d] %u\n",
7279 "beacon rssi history", i,
7280 vdev->beacon_rssi_history[i]);
7281
7282 len += scnprintf(buf + len, buf_len - len, "\n");
7283 *length = len;
7284}
7285
7286static void
7287ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
7288 char *buf, u32 *length)
7289{
7290 u32 len = *length;
7291 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7292
7293 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
7294 "Peer MAC address", peer->peer_macaddr);
7295 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7296 "Peer RSSI", peer->peer_rssi);
7297 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7298 "Peer TX rate", peer->peer_tx_rate);
7299 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7300 "Peer RX rate", peer->peer_rx_rate);
de46c015
MSS		 7301 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7302 "Peer RX duration", peer->rx_duration);
7303
bc6f9ae6
MP		 7304 len += scnprintf(buf + len, buf_len - len, "\n");
7305 *length = len;
7306}
7307
7308void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
7309 struct ath10k_fw_stats *fw_stats,
7310 char *buf)
7311{
7312 u32 len = 0;
7313 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7314 const struct ath10k_fw_stats_pdev *pdev;
7315 const struct ath10k_fw_stats_vdev *vdev;
7316 const struct ath10k_fw_stats_peer *peer;
7317 size_t num_peers;
7318 size_t num_vdevs;
7319
7320 spin_lock_bh(&ar->data_lock);
7321
7322 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7323 struct ath10k_fw_stats_pdev, list);
7324 if (!pdev) {
7325 ath10k_warn(ar, "failed to get pdev stats\n");
7326 goto unlock;
7327 }
7328
7329 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
7330 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
7331
7332 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
7333 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
7334 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
7335
7336 len += scnprintf(buf + len, buf_len - len, "\n");
7337 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7338 "ath10k VDEV stats", num_vdevs);
7339 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7340 "=================");
7341
7342 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7343 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
7344 }
7345
7346 len += scnprintf(buf + len, buf_len - len, "\n");
7347 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7348 "ath10k PEER stats", num_peers);
7349 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7350 "=================");
7351
7352 list_for_each_entry(peer, &fw_stats->peers, list) {
7353 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
7354 }
7355
7356unlock:
7357 spin_unlock_bh(&ar->data_lock);
7358
7359 if (len >= buf_len)
7360 buf[len - 1] = 0;
7361 else
7362 buf[len] = 0;
7363}
7364
7365void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
7366 struct ath10k_fw_stats *fw_stats,
7367 char *buf)
7368{
7369 unsigned int len = 0;
7370 unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
7371 const struct ath10k_fw_stats_pdev *pdev;
7372 const struct ath10k_fw_stats_vdev *vdev;
7373 const struct ath10k_fw_stats_peer *peer;
7374 size_t num_peers;
7375 size_t num_vdevs;
7376
7377 spin_lock_bh(&ar->data_lock);
7378
7379 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7380 struct ath10k_fw_stats_pdev, list);
7381 if (!pdev) {
7382 ath10k_warn(ar, "failed to get pdev stats\n");
7383 goto unlock;
7384 }
7385
7386 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
7387 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
7388
7389 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
7390 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
7391 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
7392 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
7393
7394 len += scnprintf(buf + len, buf_len - len, "\n");
7395 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7396 "ath10k VDEV stats", num_vdevs);
7397 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7398 "=================");
7399
7400 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7401 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
7402 }
7403
7404 len += scnprintf(buf + len, buf_len - len, "\n");
7405 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7406 "ath10k PEER stats", num_peers);
7407 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7408 "=================");
7409
7410 list_for_each_entry(peer, &fw_stats->peers, list) {
7411 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
7412 }
7413
7414unlock:
7415 spin_unlock_bh(&ar->data_lock);
7416
7417 if (len >= buf_len)
7418 buf[len - 1] = 0;
7419 else
7420 buf[len] = 0;
7421}
7422
62f77f09
M		 7423static struct sk_buff *
7424ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
7425 u32 detect_level, u32 detect_margin)
7426{
7427 struct wmi_pdev_set_adaptive_cca_params *cmd;
7428 struct sk_buff *skb;
7429
7430 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7431 if (!skb)
7432 return ERR_PTR(-ENOMEM);
7433
7434 cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
7435 cmd->enable = __cpu_to_le32(enable);
7436 cmd->cca_detect_level = __cpu_to_le32(detect_level);
7437 cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
7438
7439 ath10k_dbg(ar, ATH10K_DBG_WMI,
7440 "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
7441 enable, detect_level, detect_margin);
7442 return skb;
7443}
7444
98dd2b92
MP		 7445void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
7446 struct ath10k_fw_stats *fw_stats,
7447 char *buf)
7448{
7449 u32 len = 0;
7450 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
7451 const struct ath10k_fw_stats_pdev *pdev;
7452 const struct ath10k_fw_stats_vdev *vdev;
7453 const struct ath10k_fw_stats_peer *peer;
7454 size_t num_peers;
7455 size_t num_vdevs;
7456
7457 spin_lock_bh(&ar->data_lock);
7458
7459 pdev = list_first_entry_or_null(&fw_stats->pdevs,
7460 struct ath10k_fw_stats_pdev, list);
7461 if (!pdev) {
7462 ath10k_warn(ar, "failed to get pdev stats\n");
7463 goto unlock;
7464 }
7465
7466 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
7467 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
7468
7469 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
7470 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
7471 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
7472
7473 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7474 "HW paused", pdev->hw_paused);
7475 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7476 "Seqs posted", pdev->seq_posted);
7477 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7478 "Seqs failed queueing", pdev->seq_failed_queueing);
7479 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7480 "Seqs completed", pdev->seq_completed);
7481 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7482 "Seqs restarted", pdev->seq_restarted);
7483 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7484 "MU Seqs posted", pdev->mu_seq_posted);
7485 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7486 "MPDUs SW flushed", pdev->mpdus_sw_flush);
7487 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7488 "MPDUs HW filtered", pdev->mpdus_hw_filter);
7489 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7490 "MPDUs truncated", pdev->mpdus_truncated);
7491 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7492 "MPDUs receive no ACK", pdev->mpdus_ack_failed);
7493 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7494 "MPDUs expired", pdev->mpdus_expired);
7495
7496 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
7497 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
7498 "Num Rx Overflow errors", pdev->rx_ovfl_errs);
7499
7500 len += scnprintf(buf + len, buf_len - len, "\n");
7501 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7502 "ath10k VDEV stats", num_vdevs);
7503 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7504 "=================");
7505
7506 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7507 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
7508 }
7509
7510 len += scnprintf(buf + len, buf_len - len, "\n");
7511 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
7512 "ath10k PEER stats", num_peers);
7513 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7514 "=================");
7515
7516 list_for_each_entry(peer, &fw_stats->peers, list) {
7517 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
7518 }
7519
7520unlock:
7521 spin_unlock_bh(&ar->data_lock);
7522
7523 if (len >= buf_len)
7524 buf[len - 1] = 0;
7525 else
7526 buf[len] = 0;
7527}
7528
6e4de1a4
PO		 7529int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
7530 enum wmi_vdev_subtype subtype)
7531{
7532 switch (subtype) {
7533 case WMI_VDEV_SUBTYPE_NONE:
7534 return WMI_VDEV_SUBTYPE_LEGACY_NONE;
7535 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
7536 return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
7537 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
7538 return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
7539 case WMI_VDEV_SUBTYPE_P2P_GO:
7540 return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
7541 case WMI_VDEV_SUBTYPE_PROXY_STA:
7542 return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
7543 case WMI_VDEV_SUBTYPE_MESH_11S:
7544 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
7545 return -ENOTSUPP;
7546 }
7547 return -ENOTSUPP;
7548}
7549
7550static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
7551 enum wmi_vdev_subtype subtype)
7552{
7553 switch (subtype) {
7554 case WMI_VDEV_SUBTYPE_NONE:
7555 return WMI_VDEV_SUBTYPE_10_2_4_NONE;
7556 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
7557 return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
7558 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
7559 return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
7560 case WMI_VDEV_SUBTYPE_P2P_GO:
7561 return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
7562 case WMI_VDEV_SUBTYPE_PROXY_STA:
7563 return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
7564 case WMI_VDEV_SUBTYPE_MESH_11S:
7565 return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
7566 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
7567 return -ENOTSUPP;
7568 }
7569 return -ENOTSUPP;
7570}
7571
7572static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
7573 enum wmi_vdev_subtype subtype)
7574{
7575 switch (subtype) {
7576 case WMI_VDEV_SUBTYPE_NONE:
7577 return WMI_VDEV_SUBTYPE_10_4_NONE;
7578 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
7579 return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
7580 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
7581 return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
7582 case WMI_VDEV_SUBTYPE_P2P_GO:
7583 return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
7584 case WMI_VDEV_SUBTYPE_PROXY_STA:
7585 return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
7586 case WMI_VDEV_SUBTYPE_MESH_11S:
7587 return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
7588 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
7589 return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
7590 }
7591 return -ENOTSUPP;
7592}
7593
47771902
RM		 7594static struct sk_buff *
7595ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
7596 enum wmi_host_platform_type type,
7597 u32 fw_feature_bitmap)
7598{
7599 struct wmi_ext_resource_config_10_4_cmd *cmd;
7600 struct sk_buff *skb;
7601
7602 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7603 if (!skb)
7604 return ERR_PTR(-ENOMEM);
7605
7606 cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
7607 cmd->host_platform_config = __cpu_to_le32(type);
7608 cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
7609
7610 ath10k_dbg(ar, ATH10K_DBG_WMI,
7611 "wmi ext resource config host type %d firmware feature bitmap %08x\n",
7612 type, fw_feature_bitmap);
7613 return skb;
7614}
7615
d7579d12
MK		 7616static const struct wmi_ops wmi_ops = {
7617 .rx = ath10k_wmi_op_rx,
7618 .map_svc = wmi_main_svc_map,
7619
7620 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7621 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7622 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7623 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7624 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
7625 .pull_swba = ath10k_wmi_op_pull_swba_ev,
991adf71 7626 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
d7579d12
MK		 7627 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7628 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
7629 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
7630 .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
c1a4654a 7631 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
d7579d12
MK		 7632
7633 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7634 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7635 .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
7636 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7637 .gen_init = ath10k_wmi_op_gen_init,
7638 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
7639 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7640 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7641 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7642 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7643 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7644 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7645 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7646 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7647 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7648 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7649 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 7650 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK		 7651 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7652 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7653 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7654 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7655 .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
7656 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7657 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7658 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7659 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7660 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7661 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7662 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7663 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7664 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7665 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7666 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7667 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7668 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
a57a6a27 7669 /* .gen_pdev_get_temperature not implemented */
dc8ab278 7670 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7671 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7672 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7673 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
bc6f9ae6 7674 .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
6e4de1a4 7675 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
be9ce9d8 7676 /* .gen_bcn_tmpl not implemented */
4c4955fe 7677 /* .gen_prb_tmpl not implemented */
369242b4 7678 /* .gen_p2p_go_bcn_ie not implemented */
5b272e30 7679 /* .gen_adaptive_qcs not implemented */
62f77f09 7680 /* .gen_pdev_enable_adaptive_cca not implemented */
d7579d12
MK		 7681};
7682
7683static const struct wmi_ops wmi_10_1_ops = {
7684 .rx = ath10k_wmi_10_1_op_rx,
7685 .map_svc = wmi_10x_svc_map,
7686 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
7687 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
7688 .gen_init = ath10k_wmi_10_1_op_gen_init,
7689 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7690 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
7691 .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
a57a6a27 7692 /* .gen_pdev_get_temperature not implemented */
d7579d12
MK		 7693
7694 /* shared with main branch */
7695 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7696 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7697 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7698 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7699 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
7700 .pull_swba = ath10k_wmi_op_pull_swba_ev,
991adf71 7701 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
d7579d12
MK		 7702 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7703 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
c1a4654a 7704 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
d7579d12
MK		 7705
7706 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7707 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7708 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7709 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7710 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7711 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7712 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7713 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7714 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7715 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7716 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7717 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7718 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7719 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 7720 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK		 7721 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7722 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7723 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7724 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7725 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7726 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7727 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7728 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7729 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7730 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7731 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7732 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7733 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7734 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7735 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7736 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7737 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 7738 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7739 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7740 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7741 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
bc6f9ae6 7742 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
6e4de1a4 7743 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
be9ce9d8 7744 /* .gen_bcn_tmpl not implemented */
4c4955fe 7745 /* .gen_prb_tmpl not implemented */
369242b4 7746 /* .gen_p2p_go_bcn_ie not implemented */
5b272e30 7747 /* .gen_adaptive_qcs not implemented */
62f77f09 7748 /* .gen_pdev_enable_adaptive_cca not implemented */
d7579d12
MK		 7749};
7750
7751static const struct wmi_ops wmi_10_2_ops = {
7752 .rx = ath10k_wmi_10_2_op_rx,
20de2229 7753 .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
d7579d12
MK		 7754 .gen_init = ath10k_wmi_10_2_op_gen_init,
7755 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
a57a6a27 7756 /* .gen_pdev_get_temperature not implemented */
d7579d12
MK		 7757
7758 /* shared with 10.1 */
7759 .map_svc = wmi_10x_svc_map,
7760 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
d7579d12
MK		 7761 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7762 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
7763
7764 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7765 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7766 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7767 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7768 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
7769 .pull_swba = ath10k_wmi_op_pull_swba_ev,
991adf71 7770 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
d7579d12
MK		 7771 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7772 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
c1a4654a 7773 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
d7579d12
MK		 7774
7775 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7776 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7777 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7778 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7779 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7780 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7781 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7782 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7783 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7784 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7785 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7786 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7787 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7788 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 7789 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK		 7790 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7791 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7792 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7793 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7794 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7795 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7796 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7797 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7798 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7799 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7800 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7801 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7802 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7803 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7804 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7805 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7806 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 7807 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7808 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7809 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7810 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
bc6f9ae6 7811 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
6e4de1a4 7812 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
62f77f09 7813 /* .gen_pdev_enable_adaptive_cca not implemented */
d7579d12
MK		 7814};
7815
4a16fbec
RM		 7816static const struct wmi_ops wmi_10_2_4_ops = {
7817 .rx = ath10k_wmi_10_2_op_rx,
20de2229 7818 .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
4a16fbec
RM		 7819 .gen_init = ath10k_wmi_10_2_op_gen_init,
7820 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
a57a6a27 7821 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
8a0b459e 7822 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
4a16fbec
RM		 7823
7824 /* shared with 10.1 */
7825 .map_svc = wmi_10x_svc_map,
7826 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
4a16fbec
RM		 7827 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7828 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
7829
7830 .pull_scan = ath10k_wmi_op_pull_scan_ev,
7831 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
7832 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
7833 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7834 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
8b019fb0 7835 .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
991adf71 7836 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
4a16fbec
RM		 7837 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
7838 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
c1a4654a 7839 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
4a16fbec
RM		 7840
7841 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7842 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7843 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
7844 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
7845 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7846 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7847 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7848 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7849 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7850 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7851 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7852 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
7853 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7854 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
7855 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7856 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7857 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7858 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
7859 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7860 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7861 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7862 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7863 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7864 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7865 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
7866 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7867 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7868 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7869 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7870 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 7871 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 7872 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 7873 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 7874 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 7875 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
29542666 7876 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
bc6f9ae6 7877 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
62f77f09
M		 7878 .gen_pdev_enable_adaptive_cca =
7879 ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
6e4de1a4 7880 .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
be9ce9d8 7881 /* .gen_bcn_tmpl not implemented */
4c4955fe 7882 /* .gen_prb_tmpl not implemented */
369242b4 7883 /* .gen_p2p_go_bcn_ie not implemented */
5b272e30 7884 /* .gen_adaptive_qcs not implemented */
4a16fbec
RM		 7885};
7886
840357cc 7887static const struct wmi_ops wmi_10_4_ops = {
1c092961 7888 .rx = ath10k_wmi_10_4_op_rx,
840357cc 7889 .map_svc = wmi_10_4_svc_map,
b2297baa 7890
98dd2b92 7891 .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
b2297baa 7892 .pull_scan = ath10k_wmi_op_pull_scan_ev,
1c092961 7893 .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
b2297baa 7894 .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
373b48cf
RM		 7895 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
7896 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
3cec3be3 7897 .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
2b0a2e0d
RM		 7898 .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
7899 .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
1c092961 7900 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
d02e752f 7901 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
08e75ea8 7902 .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
373b48cf
RM		 7903
7904 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
7905 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
7906 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
7907 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
d1e52a8e 7908 .gen_init = ath10k_wmi_10_4_op_gen_init,
b2297baa
RM		 7909 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
7910 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
373b48cf
RM		 7911 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
7912 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
7913 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
7914 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
7915 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
7916 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
7917 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
7918 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
4535edbd
RM		 7919 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
7920 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
373b48cf
RM		 7921 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
7922 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
7923 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
7924 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
b54e16f1 7925 .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
373b48cf
RM		 7926 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
7927 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
7928 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
7929 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
7930 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
7931 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
7932 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
7933 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
7934 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
7935 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
7936 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
7937 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
b2887410
VT		 7938 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
7939 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
7940 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
7941 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
98dd2b92 7942 .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
47771902 7943 .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
373b48cf
RM		 7944
7945 /* shared with 10.2 */
98dd2b92 7946 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
6dd46348 7947 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
6e4de1a4 7948 .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
8a0b459e 7949 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
840357cc
RM		 7950};
7951
b79b9baa
MK		 7952int ath10k_wmi_attach(struct ath10k *ar)
7953{
bf3c13ab 7954 switch (ar->running_fw->fw_file.wmi_op_version) {
9bd21322 7955 case ATH10K_FW_WMI_OP_VERSION_10_4:
840357cc 7956 ar->wmi.ops = &wmi_10_4_ops;
2d491e69 7957 ar->wmi.cmd = &wmi_10_4_cmd_map;
93841a15 7958 ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
d86561ff 7959 ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
3fab30f7 7960 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9bd21322 7961 break;
4a16fbec
RM		 7962 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
7963 ar->wmi.cmd = &wmi_10_2_4_cmd_map;
7964 ar->wmi.ops = &wmi_10_2_4_ops;
7965 ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
7966 ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
3fab30f7 7967 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
4a16fbec 7968 break;
d7579d12
MK		 7969 case ATH10K_FW_WMI_OP_VERSION_10_2:
7970 ar->wmi.cmd = &wmi_10_2_cmd_map;
7971 ar->wmi.ops = &wmi_10_2_ops;
b79b9baa
MK		 7972 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
7973 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
3fab30f7 7974 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
d7579d12
MK		 7975 break;
7976 case ATH10K_FW_WMI_OP_VERSION_10_1:
7977 ar->wmi.cmd = &wmi_10x_cmd_map;
7978 ar->wmi.ops = &wmi_10_1_ops;
7979 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
7980 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
3fab30f7 7981 ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
d7579d12
MK		 7982 break;
7983 case ATH10K_FW_WMI_OP_VERSION_MAIN:
b79b9baa 7984 ar->wmi.cmd = &wmi_cmd_map;
d7579d12 7985 ar->wmi.ops = &wmi_ops;
b79b9baa
MK		 7986 ar->wmi.vdev_param = &wmi_vdev_param_map;
7987 ar->wmi.pdev_param = &wmi_pdev_param_map;
3fab30f7 7988 ar->wmi.peer_flags = &wmi_peer_flags_map;
d7579d12 7989 break;
ca996ec5
MK		 7990 case ATH10K_FW_WMI_OP_VERSION_TLV:
7991 ath10k_wmi_tlv_attach(ar);
7992 break;
d7579d12
MK		 7993 case ATH10K_FW_WMI_OP_VERSION_UNSET:
7994 case ATH10K_FW_WMI_OP_VERSION_MAX:
7995 ath10k_err(ar, "unsupported WMI op version: %d\n",
bf3c13ab 7996 ar->running_fw->fw_file.wmi_op_version);
d7579d12 7997 return -EINVAL;
b79b9baa
MK		 7998 }
7999
8000 init_completion(&ar->wmi.service_ready);
8001 init_completion(&ar->wmi.unified_ready);
b79b9baa 8002
c8ecfc1c
RM		 8003 INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
8004
b79b9baa
MK		 8005 return 0;
8006}
8007
a925a376 8008void ath10k_wmi_free_host_mem(struct ath10k *ar)
b79b9baa
MK		 8009{
8010 int i;
8011
8012 /* free the host memory chunks requested by firmware */
8013 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
b0578865
FF		 8014 dma_unmap_single(ar->dev,
8015 ar->wmi.mem_chunks[i].paddr,
8016 ar->wmi.mem_chunks[i].len,
8017 DMA_TO_DEVICE);
8018 kfree(ar->wmi.mem_chunks[i].vaddr);
b79b9baa
MK		 8019 }
8020
8021 ar->wmi.num_mem_chunks = 0;
8022}
a925a376
VT		 8023
8024void ath10k_wmi_detach(struct ath10k *ar)
8025{
8026 cancel_work_sync(&ar->svc_rdy_work);
8027
8028 if (ar->svc_rdy_skb)
8029 dev_kfree_skb(ar->svc_rdy_skb);
8030}
Linux kernel - Deliverables
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