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ath10k: refactor p2p noa code
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
CommitLineData
5e3dd157
KV		 1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/skbuff.h>
2fe5288c 19#include <linux/ctype.h>
5e3dd157
KV		 20
21#include "core.h"
22#include "htc.h"
23#include "debug.h"
24#include "wmi.h"
ca996ec5 25#include "wmi-tlv.h"
5e3dd157 26#include "mac.h"
43d2a30f 27#include "testmode.h"
d7579d12 28#include "wmi-ops.h"
6a94888f 29#include "p2p.h"
5e3dd157 30
ce42870e
BM		 31/* MAIN WMI cmd track */
32static struct wmi_cmd_map wmi_cmd_map = {
33 .init_cmdid = WMI_INIT_CMDID,
34 .start_scan_cmdid = WMI_START_SCAN_CMDID,
35 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
36 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
37 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
38 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
39 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
40 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
41 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
42 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
43 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
44 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
45 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
46 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
47 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
48 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
49 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
50 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
51 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
52 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
53 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
54 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
55 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
56 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
57 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
58 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
59 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
60 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
61 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
62 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
63 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
64 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
65 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
66 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
67 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
68 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
69 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
70 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
71 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
72 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
73 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
74 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
75 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
76 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
77 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
78 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
79 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
80 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
81 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
82 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
83 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
84 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
85 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
86 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
87 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
88 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
89 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
90 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
91 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
92 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
93 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
94 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
95 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
96 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
97 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
98 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
99 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
100 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
101 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
102 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
103 .wlan_profile_set_hist_intvl_cmdid =
104 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
105 .wlan_profile_get_profile_data_cmdid =
106 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
107 .wlan_profile_enable_profile_id_cmdid =
108 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
109 .wlan_profile_list_profile_id_cmdid =
110 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
111 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
112 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
113 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
114 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
115 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
116 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
117 .wow_enable_disable_wake_event_cmdid =
118 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
119 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
120 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
121 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
122 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
123 .vdev_spectral_scan_configure_cmdid =
124 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
125 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
126 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
127 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
128 .network_list_offload_config_cmdid =
129 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
130 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
131 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
132 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
133 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
134 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
135 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
136 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
137 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
138 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
139 .echo_cmdid = WMI_ECHO_CMDID,
140 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
141 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
142 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
143 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
144 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
145 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
146 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
147 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
148 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
a57a6a27 149 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
ce42870e
BM		 150};
151
b7e3adf9
BM		 152/* 10.X WMI cmd track */
153static struct wmi_cmd_map wmi_10x_cmd_map = {
154 .init_cmdid = WMI_10X_INIT_CMDID,
155 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
156 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
157 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
34957b25 158 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 159 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
160 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
161 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
162 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
163 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
164 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
165 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
166 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
167 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
168 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
169 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
170 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
171 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
172 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
173 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
174 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
175 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
176 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
177 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
178 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
179 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
180 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
181 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
182 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
183 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
184 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
185 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
186 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
187 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
188 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
189 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
190 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
34957b25 191 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 192 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
193 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
194 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
34957b25 195 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 196 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
197 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
198 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
199 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
200 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
201 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
202 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
203 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
204 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
205 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
206 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
207 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
208 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
209 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
210 .roam_scan_rssi_change_threshold =
211 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
212 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
213 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
214 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
215 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
216 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
217 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
218 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
219 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
34957b25 220 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
542fb174 221 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
34957b25 222 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 223 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
224 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
225 .wlan_profile_set_hist_intvl_cmdid =
226 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
227 .wlan_profile_get_profile_data_cmdid =
228 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
229 .wlan_profile_enable_profile_id_cmdid =
230 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
231 .wlan_profile_list_profile_id_cmdid =
232 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
233 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
234 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
235 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
236 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
237 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
238 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
239 .wow_enable_disable_wake_event_cmdid =
240 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
241 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
242 .wow_hostwakeup_from_sleep_cmdid =
243 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
244 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
245 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
246 .vdev_spectral_scan_configure_cmdid =
247 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
248 .vdev_spectral_scan_enable_cmdid =
249 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
250 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
34957b25
BM		 251 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
252 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
253 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
254 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
255 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
256 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
257 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
258 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
259 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
260 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
261 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 262 .echo_cmdid = WMI_10X_ECHO_CMDID,
263 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
264 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
265 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
34957b25
BM		 266 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
267 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
268 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
269 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9
BM		 270 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
271 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
a57a6a27 272 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
b7e3adf9 273};
ce42870e 274
4a16fbec
RM		 275/* 10.2.4 WMI cmd track */
276static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
277 .init_cmdid = WMI_10_2_INIT_CMDID,
278 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
279 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
280 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
281 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
282 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
283 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
284 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
285 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
286 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
287 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
288 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
289 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
290 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
291 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
292 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
293 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
294 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
295 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
296 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
297 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
298 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
299 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
300 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
301 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
302 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
303 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
304 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
305 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
306 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
307 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
308 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
309 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
310 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
311 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
312 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
313 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
314 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
315 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
316 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
317 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
318 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
319 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
320 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
321 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
322 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
323 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
324 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
325 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
326 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
327 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
328 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
329 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
330 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
331 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
332 .roam_scan_rssi_change_threshold =
333 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
334 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
335 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
336 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
337 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
338 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
339 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
340 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
341 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
342 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
343 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
344 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
345 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
346 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
347 .wlan_profile_set_hist_intvl_cmdid =
348 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
349 .wlan_profile_get_profile_data_cmdid =
350 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
351 .wlan_profile_enable_profile_id_cmdid =
352 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
353 .wlan_profile_list_profile_id_cmdid =
354 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
355 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
356 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
357 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
358 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
359 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
360 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
361 .wow_enable_disable_wake_event_cmdid =
362 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
363 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
364 .wow_hostwakeup_from_sleep_cmdid =
365 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
366 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
367 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
368 .vdev_spectral_scan_configure_cmdid =
369 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
370 .vdev_spectral_scan_enable_cmdid =
371 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
372 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
373 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
374 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
375 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
376 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
377 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
378 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
379 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
380 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
381 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
382 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
383 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
384 .echo_cmdid = WMI_10_2_ECHO_CMDID,
385 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
386 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
387 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
388 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
389 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
390 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
391 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
392 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
393 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
a57a6a27 394 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
4a16fbec
RM		 395};
396
6d1506e7
BM		 397/* MAIN WMI VDEV param map */
398static struct wmi_vdev_param_map wmi_vdev_param_map = {
399 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
400 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
401 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
402 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
403 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
404 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
405 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
406 .preamble = WMI_VDEV_PARAM_PREAMBLE,
407 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
408 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
409 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
410 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
411 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
412 .wmi_vdev_oc_scheduler_air_time_limit =
413 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
414 .wds = WMI_VDEV_PARAM_WDS,
415 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
416 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
417 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
418 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
419 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
420 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
421 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
422 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
423 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
424 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
425 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
426 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
427 .sgi = WMI_VDEV_PARAM_SGI,
428 .ldpc = WMI_VDEV_PARAM_LDPC,
429 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
430 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
431 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
432 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
433 .nss = WMI_VDEV_PARAM_NSS,
434 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
435 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
436 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
437 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
438 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
439 .ap_keepalive_min_idle_inactive_time_secs =
440 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
441 .ap_keepalive_max_idle_inactive_time_secs =
442 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
443 .ap_keepalive_max_unresponsive_time_secs =
444 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
445 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
446 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
447 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
448 .txbf = WMI_VDEV_PARAM_TXBF,
449 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
450 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
451 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
452 .ap_detect_out_of_sync_sleeping_sta_time_secs =
453 WMI_VDEV_PARAM_UNSUPPORTED,
454};
455
456/* 10.X WMI VDEV param map */
457static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
458 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
459 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
460 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
461 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
462 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
463 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
464 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
465 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
466 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
467 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
468 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
469 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
470 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
471 .wmi_vdev_oc_scheduler_air_time_limit =
472 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
473 .wds = WMI_10X_VDEV_PARAM_WDS,
474 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
475 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
476 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
477 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
478 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
479 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
480 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
481 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
482 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
483 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
484 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
485 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
486 .sgi = WMI_10X_VDEV_PARAM_SGI,
487 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
488 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
489 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
490 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
491 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
492 .nss = WMI_10X_VDEV_PARAM_NSS,
493 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
494 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
495 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
496 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
497 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
498 .ap_keepalive_min_idle_inactive_time_secs =
499 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
500 .ap_keepalive_max_idle_inactive_time_secs =
501 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
502 .ap_keepalive_max_unresponsive_time_secs =
503 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
504 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
505 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
506 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
507 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
508 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
509 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
510 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
511 .ap_detect_out_of_sync_sleeping_sta_time_secs =
512 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
513};
514
4a16fbec
RM		 515static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
516 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
517 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
518 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
519 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
520 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
521 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
522 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
523 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
524 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
525 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
526 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
527 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
528 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
529 .wmi_vdev_oc_scheduler_air_time_limit =
530 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
531 .wds = WMI_10X_VDEV_PARAM_WDS,
532 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
533 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
534 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
535 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
536 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
537 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
538 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
539 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
540 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
541 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
542 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
543 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
544 .sgi = WMI_10X_VDEV_PARAM_SGI,
545 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
546 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
547 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
548 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
549 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
550 .nss = WMI_10X_VDEV_PARAM_NSS,
551 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
552 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
553 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
554 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
555 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
556 .ap_keepalive_min_idle_inactive_time_secs =
557 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
558 .ap_keepalive_max_idle_inactive_time_secs =
559 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
560 .ap_keepalive_max_unresponsive_time_secs =
561 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
562 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
563 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
564 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
565 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
566 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
567 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
568 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
569 .ap_detect_out_of_sync_sleeping_sta_time_secs =
570 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
571};
572
226a339b
BM		 573static struct wmi_pdev_param_map wmi_pdev_param_map = {
574 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
575 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
576 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
577 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
578 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
579 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
580 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
581 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
582 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
583 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
584 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
585 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
586 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
587 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
588 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
589 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
590 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
591 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
592 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
593 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
594 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
595 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
596 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
597 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
598 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
599 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
600 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
601 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
602 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
603 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
604 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
605 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
606 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
607 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
608 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
226a339b
BM		 609 .dcs = WMI_PDEV_PARAM_DCS,
610 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
611 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
612 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
613 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
614 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
615 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
616 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
617 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
618 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
619 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
620 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
621 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
a7bd3e99 622 .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
226a339b
BM		 623};
624
625static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
626 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
627 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
628 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
629 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
630 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
631 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
632 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
633 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
634 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
635 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
636 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
637 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
638 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
639 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
640 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
641 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
642 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
643 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
644 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
645 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
646 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
647 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
648 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
649 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
650 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
651 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
652 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
653 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
654 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
655 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
656 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
657 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
658 .bcnflt_stats_update_period =
659 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
660 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
ab6258ed 661 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
226a339b
BM		 662 .dcs = WMI_10X_PDEV_PARAM_DCS,
663 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
664 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
665 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
666 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
667 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
668 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
669 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
670 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
671 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
672 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
673 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
674 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
a7bd3e99 675 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
226a339b
BM		 676};
677
4a16fbec
RM		 678static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
679 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
680 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
681 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
682 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
683 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
684 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
685 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
686 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
687 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
688 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
689 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
690 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
691 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
692 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
693 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
694 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
695 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
696 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
697 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
698 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
699 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
700 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
701 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
702 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
703 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
704 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
705 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
706 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
707 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
708 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
709 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
710 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
711 .bcnflt_stats_update_period =
712 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
713 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
714 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
715 .dcs = WMI_10X_PDEV_PARAM_DCS,
716 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
717 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
718 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
719 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
720 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
721 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
722 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
723 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
724 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
725 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
726 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
727 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
728 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
729};
730
24c88f78
MK		 731/* firmware 10.2 specific mappings */
732static struct wmi_cmd_map wmi_10_2_cmd_map = {
733 .init_cmdid = WMI_10_2_INIT_CMDID,
734 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
735 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
736 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
737 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
738 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
739 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
740 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
741 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
742 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
743 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
744 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
745 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
746 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
747 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
748 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
749 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
750 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
751 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
752 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
753 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
754 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
755 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
756 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
757 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
758 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
759 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
760 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
761 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
762 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
763 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
764 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
765 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
766 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
767 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
768 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
769 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
770 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
771 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
772 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
773 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
774 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
775 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
776 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
777 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
778 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
779 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
780 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
781 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
782 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
783 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
784 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
785 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
786 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
787 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
788 .roam_scan_rssi_change_threshold =
789 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
790 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
791 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
792 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
793 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
794 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
795 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
796 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
797 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
798 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
799 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
800 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
801 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
802 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
803 .wlan_profile_set_hist_intvl_cmdid =
804 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
805 .wlan_profile_get_profile_data_cmdid =
806 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
807 .wlan_profile_enable_profile_id_cmdid =
808 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
809 .wlan_profile_list_profile_id_cmdid =
810 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
811 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
812 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
813 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
814 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
815 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
816 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
817 .wow_enable_disable_wake_event_cmdid =
818 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
819 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
820 .wow_hostwakeup_from_sleep_cmdid =
821 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
822 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
823 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
824 .vdev_spectral_scan_configure_cmdid =
825 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
826 .vdev_spectral_scan_enable_cmdid =
827 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
828 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
829 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
830 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
831 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
832 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
833 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
834 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
835 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
836 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
837 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
838 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
839 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
840 .echo_cmdid = WMI_10_2_ECHO_CMDID,
841 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
842 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
843 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
844 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
845 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
846 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
847 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
848 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
849 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
a57a6a27 850 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
24c88f78
MK		 851};
852
0226d602
MK		 853void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
854 const struct wmi_channel_arg *arg)
2d66721c
MK		 855{
856 u32 flags = 0;
857
858 memset(ch, 0, sizeof(*ch));
859
860 if (arg->passive)
861 flags |= WMI_CHAN_FLAG_PASSIVE;
862 if (arg->allow_ibss)
863 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
864 if (arg->allow_ht)
865 flags |= WMI_CHAN_FLAG_ALLOW_HT;
866 if (arg->allow_vht)
867 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
868 if (arg->ht40plus)
869 flags |= WMI_CHAN_FLAG_HT40_PLUS;
870 if (arg->chan_radar)
871 flags |= WMI_CHAN_FLAG_DFS;
872
873 ch->mhz = __cpu_to_le32(arg->freq);
874 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
875 ch->band_center_freq2 = 0;
876 ch->min_power = arg->min_power;
877 ch->max_power = arg->max_power;
878 ch->reg_power = arg->max_reg_power;
879 ch->antenna_max = arg->max_antenna_gain;
880
881 /* mode & flags share storage */
882 ch->mode = arg->mode;
883 ch->flags |= __cpu_to_le32(flags);
884}
885
5e3dd157
KV		 886int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
887{
888 int ret;
af762c0b 889
5e3dd157
KV		 890 ret = wait_for_completion_timeout(&ar->wmi.service_ready,
891 WMI_SERVICE_READY_TIMEOUT_HZ);
892 return ret;
893}
894
895int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
896{
897 int ret;
af762c0b 898
5e3dd157
KV		 899 ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
900 WMI_UNIFIED_READY_TIMEOUT_HZ);
901 return ret;
902}
903
666a73f3 904struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
5e3dd157
KV		 905{
906 struct sk_buff *skb;
907 u32 round_len = roundup(len, 4);
908
7aa7a72a 909 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
5e3dd157
KV		 910 if (!skb)
911 return NULL;
912
913 skb_reserve(skb, WMI_SKB_HEADROOM);
914 if (!IS_ALIGNED((unsigned long)skb->data, 4))
7aa7a72a 915 ath10k_warn(ar, "Unaligned WMI skb\n");
5e3dd157
KV		 916
917 skb_put(skb, round_len);
918 memset(skb->data, 0, round_len);
919
920 return skb;
921}
922
923static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
924{
925 dev_kfree_skb(skb);
5e3dd157
KV		 926}
927
d7579d12
MK		 928int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
929 u32 cmd_id)
5e3dd157
KV		 930{
931 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
932 struct wmi_cmd_hdr *cmd_hdr;
be8b3943 933 int ret;
5e3dd157
KV		 934 u32 cmd = 0;
935
936 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
937 return -ENOMEM;
938
939 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
940
941 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
942 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
943
5e3dd157 944 memset(skb_cb, 0, sizeof(*skb_cb));
be8b3943 945 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
d35a6c18 946 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
5e3dd157 947
be8b3943
MK		 948 if (ret)
949 goto err_pull;
5e3dd157 950
be8b3943
MK		 951 return 0;
952
953err_pull:
954 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
955 return ret;
956}
957
ed54388a
MK		 958static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
959{
af21319f 960 struct ath10k *ar = arvif->ar;
9ad50182 961 struct ath10k_skb_cb *cb;
af21319f 962 struct sk_buff *bcn;
ed54388a
MK		 963 int ret;
964
af21319f 965 spin_lock_bh(&ar->data_lock);
ed54388a 966
af21319f 967 bcn = arvif->beacon;
ed54388a 968
af21319f
MK		 969 if (!bcn)
970 goto unlock;
ed54388a 971
9ad50182 972 cb = ATH10K_SKB_CB(bcn);
ed54388a 973
af21319f
MK		 974 switch (arvif->beacon_state) {
975 case ATH10K_BEACON_SENDING:
976 case ATH10K_BEACON_SENT:
977 break;
978 case ATH10K_BEACON_SCHEDULED:
979 arvif->beacon_state = ATH10K_BEACON_SENDING;
980 spin_unlock_bh(&ar->data_lock);
981
982 ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
983 arvif->vdev_id,
984 bcn->data, bcn->len,
985 cb->paddr,
986 cb->bcn.dtim_zero,
987 cb->bcn.deliver_cab);
988
989 spin_lock_bh(&ar->data_lock);
990
991 if (ret == 0)
992 arvif->beacon_state = ATH10K_BEACON_SENT;
993 else
994 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
995 }
ed54388a 996
af21319f
MK		 997unlock:
998 spin_unlock_bh(&ar->data_lock);
ed54388a
MK		 999}
1000
1001static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
1002 struct ieee80211_vif *vif)
1003{
1004 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
1005
1006 ath10k_wmi_tx_beacon_nowait(arvif);
1007}
1008
1009static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
1010{
ed54388a
MK		 1011 ieee80211_iterate_active_interfaces_atomic(ar->hw,
1012 IEEE80211_IFACE_ITER_NORMAL,
1013 ath10k_wmi_tx_beacons_iter,
1014 NULL);
ed54388a
MK		 1015}
1016
12acbc43 1017static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
be8b3943 1018{
ed54388a
MK		 1019 /* try to send pending beacons first. they take priority */
1020 ath10k_wmi_tx_beacons_nowait(ar);
1021
be8b3943
MK		 1022 wake_up(&ar->wmi.tx_credits_wq);
1023}
1024
666a73f3 1025int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
be8b3943 1026{
34957b25 1027 int ret = -EOPNOTSUPP;
be8b3943 1028
56b84287
KV		 1029 might_sleep();
1030
34957b25 1031 if (cmd_id == WMI_CMD_UNSUPPORTED) {
7aa7a72a 1032 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
55321559
BM		 1033 cmd_id);
1034 return ret;
1035 }
be8b3943
MK		 1036
1037 wait_event_timeout(ar->wmi.tx_credits_wq, ({
ed54388a
MK		 1038 /* try to send pending beacons first. they take priority */
1039 ath10k_wmi_tx_beacons_nowait(ar);
1040
be8b3943 1041 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
7962b0d8
MK		 1042
1043 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
1044 ret = -ESHUTDOWN;
1045
be8b3943
MK		 1046 (ret != -EAGAIN);
1047 }), 3*HZ);
1048
1049 if (ret)
5e3dd157 1050 dev_kfree_skb_any(skb);
5e3dd157 1051
be8b3943 1052 return ret;
5e3dd157
KV		 1053}
1054
d7579d12
MK		 1055static struct sk_buff *
1056ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
5e00d31a 1057{
5e00d31a
BM		 1058 struct wmi_mgmt_tx_cmd *cmd;
1059 struct ieee80211_hdr *hdr;
d7579d12 1060 struct sk_buff *skb;
5e00d31a 1061 int len;
d7579d12 1062 u32 buf_len = msdu->len;
5e00d31a
BM		 1063 u16 fc;
1064
d7579d12 1065 hdr = (struct ieee80211_hdr *)msdu->data;
5e00d31a
BM		 1066 fc = le16_to_cpu(hdr->frame_control);
1067
1068 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
d7579d12 1069 return ERR_PTR(-EINVAL);
5e00d31a 1070
d7579d12 1071 len = sizeof(cmd->hdr) + msdu->len;
eeab266c
MK		 1072
1073 if ((ieee80211_is_action(hdr->frame_control) ||
1074 ieee80211_is_deauth(hdr->frame_control) ||
1075 ieee80211_is_disassoc(hdr->frame_control)) &&
1076 ieee80211_has_protected(hdr->frame_control)) {
1077 len += IEEE80211_CCMP_MIC_LEN;
1078 buf_len += IEEE80211_CCMP_MIC_LEN;
1079 }
1080
5e00d31a
BM		 1081 len = round_up(len, 4);
1082
d7579d12
MK		 1083 skb = ath10k_wmi_alloc_skb(ar, len);
1084 if (!skb)
1085 return ERR_PTR(-ENOMEM);
5e00d31a 1086
d7579d12 1087 cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
5e00d31a 1088
d7579d12 1089 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(msdu)->vdev_id);
5e00d31a
BM		 1090 cmd->hdr.tx_rate = 0;
1091 cmd->hdr.tx_power = 0;
eeab266c 1092 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
5e00d31a 1093
b25f32cb 1094 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
d7579d12 1095 memcpy(cmd->buf, msdu->data, msdu->len);
5e00d31a 1096
7aa7a72a 1097 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
d7579d12 1098 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
5e00d31a 1099 fc & IEEE80211_FCTL_STYPE);
5ce8e7fd
RM		 1100 trace_ath10k_tx_hdr(ar, skb->data, skb->len);
1101 trace_ath10k_tx_payload(ar, skb->data, skb->len);
5e00d31a 1102
d7579d12 1103 return skb;
5e00d31a
BM		 1104}
1105
5c81c7fd
MK		 1106static void ath10k_wmi_event_scan_started(struct ath10k *ar)
1107{
1108 lockdep_assert_held(&ar->data_lock);
1109
1110 switch (ar->scan.state) {
1111 case ATH10K_SCAN_IDLE:
1112 case ATH10K_SCAN_RUNNING:
1113 case ATH10K_SCAN_ABORTING:
7aa7a72a 1114 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1115 ath10k_scan_state_str(ar->scan.state),
1116 ar->scan.state);
1117 break;
1118 case ATH10K_SCAN_STARTING:
1119 ar->scan.state = ATH10K_SCAN_RUNNING;
1120
1121 if (ar->scan.is_roc)
1122 ieee80211_ready_on_channel(ar->hw);
1123
1124 complete(&ar->scan.started);
1125 break;
1126 }
1127}
1128
2f9eec0b
BG		 1129static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
1130{
1131 lockdep_assert_held(&ar->data_lock);
1132
1133 switch (ar->scan.state) {
1134 case ATH10K_SCAN_IDLE:
1135 case ATH10K_SCAN_RUNNING:
1136 case ATH10K_SCAN_ABORTING:
1137 ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
1138 ath10k_scan_state_str(ar->scan.state),
1139 ar->scan.state);
1140 break;
1141 case ATH10K_SCAN_STARTING:
1142 complete(&ar->scan.started);
1143 __ath10k_scan_finish(ar);
1144 break;
1145 }
1146}
1147
5c81c7fd
MK		 1148static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
1149{
1150 lockdep_assert_held(&ar->data_lock);
1151
1152 switch (ar->scan.state) {
1153 case ATH10K_SCAN_IDLE:
1154 case ATH10K_SCAN_STARTING:
1155 /* One suspected reason scan can be completed while starting is
1156 * if firmware fails to deliver all scan events to the host,
1157 * e.g. when transport pipe is full. This has been observed
1158 * with spectral scan phyerr events starving wmi transport
1159 * pipe. In such case the "scan completed" event should be (and
1160 * is) ignored by the host as it may be just firmware's scan
1161 * state machine recovering.
1162 */
7aa7a72a 1163 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1164 ath10k_scan_state_str(ar->scan.state),
1165 ar->scan.state);
1166 break;
1167 case ATH10K_SCAN_RUNNING:
1168 case ATH10K_SCAN_ABORTING:
1169 __ath10k_scan_finish(ar);
1170 break;
1171 }
1172}
1173
1174static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
1175{
1176 lockdep_assert_held(&ar->data_lock);
1177
1178 switch (ar->scan.state) {
1179 case ATH10K_SCAN_IDLE:
1180 case ATH10K_SCAN_STARTING:
7aa7a72a 1181 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1182 ath10k_scan_state_str(ar->scan.state),
1183 ar->scan.state);
1184 break;
1185 case ATH10K_SCAN_RUNNING:
1186 case ATH10K_SCAN_ABORTING:
1187 ar->scan_channel = NULL;
1188 break;
1189 }
1190}
1191
1192static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
1193{
1194 lockdep_assert_held(&ar->data_lock);
1195
1196 switch (ar->scan.state) {
1197 case ATH10K_SCAN_IDLE:
1198 case ATH10K_SCAN_STARTING:
7aa7a72a 1199 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
5c81c7fd
MK		 1200 ath10k_scan_state_str(ar->scan.state),
1201 ar->scan.state);
1202 break;
1203 case ATH10K_SCAN_RUNNING:
1204 case ATH10K_SCAN_ABORTING:
1205 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
1206
1207 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
1208 complete(&ar->scan.on_channel);
1209 break;
1210 }
1211}
1212
9ff8b724
MK		 1213static const char *
1214ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
1215 enum wmi_scan_completion_reason reason)
1216{
1217 switch (type) {
1218 case WMI_SCAN_EVENT_STARTED:
1219 return "started";
1220 case WMI_SCAN_EVENT_COMPLETED:
1221 switch (reason) {
1222 case WMI_SCAN_REASON_COMPLETED:
1223 return "completed";
1224 case WMI_SCAN_REASON_CANCELLED:
1225 return "completed [cancelled]";
1226 case WMI_SCAN_REASON_PREEMPTED:
1227 return "completed [preempted]";
1228 case WMI_SCAN_REASON_TIMEDOUT:
1229 return "completed [timedout]";
1230 case WMI_SCAN_REASON_MAX:
1231 break;
1232 }
1233 return "completed [unknown]";
1234 case WMI_SCAN_EVENT_BSS_CHANNEL:
1235 return "bss channel";
1236 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
1237 return "foreign channel";
1238 case WMI_SCAN_EVENT_DEQUEUED:
1239 return "dequeued";
1240 case WMI_SCAN_EVENT_PREEMPTED:
1241 return "preempted";
1242 case WMI_SCAN_EVENT_START_FAILED:
1243 return "start failed";
1244 default:
1245 return "unknown";
1246 }
1247}
1248
d7579d12
MK		 1249static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
1250 struct wmi_scan_ev_arg *arg)
32653cf1
MK		 1251{
1252 struct wmi_scan_event *ev = (void *)skb->data;
1253
1254 if (skb->len < sizeof(*ev))
1255 return -EPROTO;
1256
1257 skb_pull(skb, sizeof(*ev));
1258 arg->event_type = ev->event_type;
1259 arg->reason = ev->reason;
1260 arg->channel_freq = ev->channel_freq;
1261 arg->scan_req_id = ev->scan_req_id;
1262 arg->scan_id = ev->scan_id;
1263 arg->vdev_id = ev->vdev_id;
1264
1265 return 0;
1266}
1267
0226d602 1268int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 1269{
32653cf1 1270 struct wmi_scan_ev_arg arg = {};
5e3dd157
KV		 1271 enum wmi_scan_event_type event_type;
1272 enum wmi_scan_completion_reason reason;
1273 u32 freq;
1274 u32 req_id;
1275 u32 scan_id;
1276 u32 vdev_id;
32653cf1 1277 int ret;
5e3dd157 1278
d7579d12 1279 ret = ath10k_wmi_pull_scan(ar, skb, &arg);
32653cf1
MK		 1280 if (ret) {
1281 ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
1282 return ret;
1283 }
1284
1285 event_type = __le32_to_cpu(arg.event_type);
1286 reason = __le32_to_cpu(arg.reason);
1287 freq = __le32_to_cpu(arg.channel_freq);
1288 req_id = __le32_to_cpu(arg.scan_req_id);
1289 scan_id = __le32_to_cpu(arg.scan_id);
1290 vdev_id = __le32_to_cpu(arg.vdev_id);
5e3dd157 1291
5c81c7fd
MK		 1292 spin_lock_bh(&ar->data_lock);
1293
7aa7a72a 1294 ath10k_dbg(ar, ATH10K_DBG_WMI,
5c81c7fd 1295 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
9ff8b724 1296 ath10k_wmi_event_scan_type_str(event_type, reason),
5c81c7fd
MK		 1297 event_type, reason, freq, req_id, scan_id, vdev_id,
1298 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
5e3dd157
KV		 1299
1300 switch (event_type) {
1301 case WMI_SCAN_EVENT_STARTED:
5c81c7fd 1302 ath10k_wmi_event_scan_started(ar);
5e3dd157
KV		 1303 break;
1304 case WMI_SCAN_EVENT_COMPLETED:
5c81c7fd 1305 ath10k_wmi_event_scan_completed(ar);
5e3dd157
KV		 1306 break;
1307 case WMI_SCAN_EVENT_BSS_CHANNEL:
5c81c7fd 1308 ath10k_wmi_event_scan_bss_chan(ar);
5e3dd157
KV		 1309 break;
1310 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
5c81c7fd
MK		 1311 ath10k_wmi_event_scan_foreign_chan(ar, freq);
1312 break;
1313 case WMI_SCAN_EVENT_START_FAILED:
7aa7a72a 1314 ath10k_warn(ar, "received scan start failure event\n");
2f9eec0b 1315 ath10k_wmi_event_scan_start_failed(ar);
5e3dd157
KV		 1316 break;
1317 case WMI_SCAN_EVENT_DEQUEUED:
5e3dd157 1318 case WMI_SCAN_EVENT_PREEMPTED:
5e3dd157
KV		 1319 default:
1320 break;
1321 }
1322
1323 spin_unlock_bh(&ar->data_lock);
1324 return 0;
1325}
1326
1327static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
1328{
1329 enum ieee80211_band band;
1330
1331 switch (phy_mode) {
1332 case MODE_11A:
1333 case MODE_11NA_HT20:
1334 case MODE_11NA_HT40:
1335 case MODE_11AC_VHT20:
1336 case MODE_11AC_VHT40:
1337 case MODE_11AC_VHT80:
1338 band = IEEE80211_BAND_5GHZ;
1339 break;
1340 case MODE_11G:
1341 case MODE_11B:
1342 case MODE_11GONLY:
1343 case MODE_11NG_HT20:
1344 case MODE_11NG_HT40:
1345 case MODE_11AC_VHT20_2G:
1346 case MODE_11AC_VHT40_2G:
1347 case MODE_11AC_VHT80_2G:
1348 default:
1349 band = IEEE80211_BAND_2GHZ;
1350 }
1351
1352 return band;
1353}
1354
1355static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
1356{
1357 u8 rate_idx = 0;
1358
1359 /* rate in Kbps */
1360 switch (rate) {
1361 case 1000:
1362 rate_idx = 0;
1363 break;
1364 case 2000:
1365 rate_idx = 1;
1366 break;
1367 case 5500:
1368 rate_idx = 2;
1369 break;
1370 case 11000:
1371 rate_idx = 3;
1372 break;
1373 case 6000:
1374 rate_idx = 4;
1375 break;
1376 case 9000:
1377 rate_idx = 5;
1378 break;
1379 case 12000:
1380 rate_idx = 6;
1381 break;
1382 case 18000:
1383 rate_idx = 7;
1384 break;
1385 case 24000:
1386 rate_idx = 8;
1387 break;
1388 case 36000:
1389 rate_idx = 9;
1390 break;
1391 case 48000:
1392 rate_idx = 10;
1393 break;
1394 case 54000:
1395 rate_idx = 11;
1396 break;
1397 default:
1398 break;
1399 }
1400
1401 if (band == IEEE80211_BAND_5GHZ) {
1402 if (rate_idx > 3)
1403 /* Omit CCK rates */
1404 rate_idx -= 4;
1405 else
1406 rate_idx = 0;
1407 }
1408
1409 return rate_idx;
1410}
1411
504f6cdf
SM		 1412/* If keys are configured, HW decrypts all frames
1413 * with protected bit set. Mark such frames as decrypted.
1414 */
1415static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
1416 struct sk_buff *skb,
1417 struct ieee80211_rx_status *status)
1418{
1419 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1420 unsigned int hdrlen;
1421 bool peer_key;
1422 u8 *addr, keyidx;
1423
1424 if (!ieee80211_is_auth(hdr->frame_control) ||
1425 !ieee80211_has_protected(hdr->frame_control))
1426 return;
1427
1428 hdrlen = ieee80211_hdrlen(hdr->frame_control);
1429 if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
1430 return;
1431
1432 keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
1433 addr = ieee80211_get_SA(hdr);
1434
1435 spin_lock_bh(&ar->data_lock);
1436 peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
1437 spin_unlock_bh(&ar->data_lock);
1438
1439 if (peer_key) {
1440 ath10k_dbg(ar, ATH10K_DBG_MAC,
1441 "mac wep key present for peer %pM\n", addr);
1442 status->flag |= RX_FLAG_DECRYPTED;
1443 }
1444}
1445
d7579d12
MK		 1446static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
1447 struct wmi_mgmt_rx_ev_arg *arg)
5e3dd157 1448{
0d9b0438
MK		 1449 struct wmi_mgmt_rx_event_v1 *ev_v1;
1450 struct wmi_mgmt_rx_event_v2 *ev_v2;
1451 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
32653cf1
MK		 1452 size_t pull_len;
1453 u32 msdu_len;
1454
1455 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
1456 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
1457 ev_hdr = &ev_v2->hdr.v1;
1458 pull_len = sizeof(*ev_v2);
1459 } else {
1460 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
1461 ev_hdr = &ev_v1->hdr;
1462 pull_len = sizeof(*ev_v1);
1463 }
1464
1465 if (skb->len < pull_len)
1466 return -EPROTO;
1467
1468 skb_pull(skb, pull_len);
1469 arg->channel = ev_hdr->channel;
1470 arg->buf_len = ev_hdr->buf_len;
1471 arg->status = ev_hdr->status;
1472 arg->snr = ev_hdr->snr;
1473 arg->phy_mode = ev_hdr->phy_mode;
1474 arg->rate = ev_hdr->rate;
1475
1476 msdu_len = __le32_to_cpu(arg->buf_len);
1477 if (skb->len < msdu_len)
1478 return -EPROTO;
1479
1480 /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
1481 * trailer with credit update. Trim the excess garbage.
1482 */
1483 skb_trim(skb, msdu_len);
1484
1485 return 0;
1486}
1487
0226d602 1488int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
32653cf1
MK		 1489{
1490 struct wmi_mgmt_rx_ev_arg arg = {};
5e3dd157
KV		 1491 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
1492 struct ieee80211_hdr *hdr;
1493 u32 rx_status;
1494 u32 channel;
1495 u32 phy_mode;
1496 u32 snr;
1497 u32 rate;
1498 u32 buf_len;
1499 u16 fc;
32653cf1 1500 int ret;
0d9b0438 1501
d7579d12 1502 ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
32653cf1
MK		 1503 if (ret) {
1504 ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
1505 return ret;
0d9b0438 1506 }
5e3dd157 1507
32653cf1
MK		 1508 channel = __le32_to_cpu(arg.channel);
1509 buf_len = __le32_to_cpu(arg.buf_len);
1510 rx_status = __le32_to_cpu(arg.status);
1511 snr = __le32_to_cpu(arg.snr);
1512 phy_mode = __le32_to_cpu(arg.phy_mode);
1513 rate = __le32_to_cpu(arg.rate);
5e3dd157
KV		 1514
1515 memset(status, 0, sizeof(*status));
1516
7aa7a72a 1517 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 1518 "event mgmt rx status %08x\n", rx_status);
1519
e8a50f8b
MP		 1520 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1521 dev_kfree_skb(skb);
1522 return 0;
1523 }
1524
5e3dd157
KV		 1525 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
1526 dev_kfree_skb(skb);
1527 return 0;
1528 }
1529
1530 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
1531 dev_kfree_skb(skb);
1532 return 0;
1533 }
1534
d67d0a02
MK		 1535 if (rx_status & WMI_RX_STATUS_ERR_CRC) {
1536 dev_kfree_skb(skb);
1537 return 0;
1538 }
1539
5e3dd157
KV		 1540 if (rx_status & WMI_RX_STATUS_ERR_MIC)
1541 status->flag |= RX_FLAG_MMIC_ERROR;
1542
21040bf9 1543 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
453cdb61 1544 * MODE_11B. This means phy_mode is not a reliable source for the band
21040bf9
MK		 1545 * of mgmt rx.
1546 */
1547 if (channel >= 1 && channel <= 14) {
1548 status->band = IEEE80211_BAND_2GHZ;
1549 } else if (channel >= 36 && channel <= 165) {
1550 status->band = IEEE80211_BAND_5GHZ;
453cdb61 1551 } else {
21040bf9
MK		 1552 /* Shouldn't happen unless list of advertised channels to
1553 * mac80211 has been changed.
1554 */
1555 WARN_ON_ONCE(1);
1556 dev_kfree_skb(skb);
1557 return 0;
453cdb61
MK		 1558 }
1559
21040bf9
MK		 1560 if (phy_mode == MODE_11B && status->band == IEEE80211_BAND_5GHZ)
1561 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
1562
5e3dd157
KV		 1563 status->freq = ieee80211_channel_to_frequency(channel, status->band);
1564 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
1565 status->rate_idx = get_rate_idx(rate, status->band);
1566
5e3dd157
KV		 1567 hdr = (struct ieee80211_hdr *)skb->data;
1568 fc = le16_to_cpu(hdr->frame_control);
1569
504f6cdf
SM		 1570 ath10k_wmi_handle_wep_reauth(ar, skb, status);
1571
2b6a6a90
MK		 1572 /* FW delivers WEP Shared Auth frame with Protected Bit set and
1573 * encrypted payload. However in case of PMF it delivers decrypted
1574 * frames with Protected Bit set. */
1575 if (ieee80211_has_protected(hdr->frame_control) &&
1576 !ieee80211_is_auth(hdr->frame_control)) {
eeab266c
MK		 1577 status->flag |= RX_FLAG_DECRYPTED;
1578
1579 if (!ieee80211_is_action(hdr->frame_control) &&
1580 !ieee80211_is_deauth(hdr->frame_control) &&
1581 !ieee80211_is_disassoc(hdr->frame_control)) {
1582 status->flag |= RX_FLAG_IV_STRIPPED |
1583 RX_FLAG_MMIC_STRIPPED;
1584 hdr->frame_control = __cpu_to_le16(fc &
5e3dd157 1585 ~IEEE80211_FCTL_PROTECTED);
eeab266c 1586 }
5e3dd157
KV		 1587 }
1588
7aa7a72a 1589 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 1590 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
1591 skb, skb->len,
1592 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
1593
7aa7a72a 1594 ath10k_dbg(ar, ATH10K_DBG_MGMT,
5e3dd157
KV		 1595 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
1596 status->freq, status->band, status->signal,
1597 status->rate_idx);
1598
5e3dd157
KV		 1599 ieee80211_rx(ar->hw, skb);
1600 return 0;
1601}
1602
2e1dea40
MK		 1603static int freq_to_idx(struct ath10k *ar, int freq)
1604{
1605 struct ieee80211_supported_band *sband;
1606 int band, ch, idx = 0;
1607
1608 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
1609 sband = ar->hw->wiphy->bands[band];
1610 if (!sband)
1611 continue;
1612
1613 for (ch = 0; ch < sband->n_channels; ch++, idx++)
1614 if (sband->channels[ch].center_freq == freq)
1615 goto exit;
1616 }
1617
1618exit:
1619 return idx;
1620}
1621
d7579d12
MK		 1622static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
1623 struct wmi_ch_info_ev_arg *arg)
32653cf1
MK		 1624{
1625 struct wmi_chan_info_event *ev = (void *)skb->data;
1626
1627 if (skb->len < sizeof(*ev))
1628 return -EPROTO;
1629
1630 skb_pull(skb, sizeof(*ev));
1631 arg->err_code = ev->err_code;
1632 arg->freq = ev->freq;
1633 arg->cmd_flags = ev->cmd_flags;
1634 arg->noise_floor = ev->noise_floor;
1635 arg->rx_clear_count = ev->rx_clear_count;
1636 arg->cycle_count = ev->cycle_count;
1637
1638 return 0;
1639}
1640
0226d602 1641void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 1642{
32653cf1 1643 struct wmi_ch_info_ev_arg arg = {};
2e1dea40
MK		 1644 struct survey_info *survey;
1645 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
32653cf1 1646 int idx, ret;
2e1dea40 1647
d7579d12 1648 ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
32653cf1
MK		 1649 if (ret) {
1650 ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
1651 return;
1652 }
2e1dea40 1653
32653cf1
MK		 1654 err_code = __le32_to_cpu(arg.err_code);
1655 freq = __le32_to_cpu(arg.freq);
1656 cmd_flags = __le32_to_cpu(arg.cmd_flags);
1657 noise_floor = __le32_to_cpu(arg.noise_floor);
1658 rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
1659 cycle_count = __le32_to_cpu(arg.cycle_count);
2e1dea40 1660
7aa7a72a 1661 ath10k_dbg(ar, ATH10K_DBG_WMI,
2e1dea40
MK		 1662 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
1663 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
1664 cycle_count);
1665
1666 spin_lock_bh(&ar->data_lock);
1667
5c81c7fd
MK		 1668 switch (ar->scan.state) {
1669 case ATH10K_SCAN_IDLE:
1670 case ATH10K_SCAN_STARTING:
7aa7a72a 1671 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
2e1dea40 1672 goto exit;
5c81c7fd
MK		 1673 case ATH10K_SCAN_RUNNING:
1674 case ATH10K_SCAN_ABORTING:
1675 break;
2e1dea40
MK		 1676 }
1677
1678 idx = freq_to_idx(ar, freq);
1679 if (idx >= ARRAY_SIZE(ar->survey)) {
7aa7a72a 1680 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2e1dea40
MK		 1681 freq, idx);
1682 goto exit;
1683 }
1684
1685 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
1686 /* During scanning chan info is reported twice for each
1687 * visited channel. The reported cycle count is global
1688 * and per-channel cycle count must be calculated */
1689
1690 cycle_count -= ar->survey_last_cycle_count;
1691 rx_clear_count -= ar->survey_last_rx_clear_count;
1692
1693 survey = &ar->survey[idx];
4ed20beb
JB		 1694 survey->time = WMI_CHAN_INFO_MSEC(cycle_count);
1695 survey->time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
2e1dea40 1696 survey->noise = noise_floor;
4ed20beb
JB		 1697 survey->filled = SURVEY_INFO_TIME |
1698 SURVEY_INFO_TIME_RX |
2e1dea40
MK		 1699 SURVEY_INFO_NOISE_DBM;
1700 }
1701
1702 ar->survey_last_rx_clear_count = rx_clear_count;
1703 ar->survey_last_cycle_count = cycle_count;
1704
1705exit:
1706 spin_unlock_bh(&ar->data_lock);
5e3dd157
KV		 1707}
1708
0226d602 1709void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 1710{
7aa7a72a 1711 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
5e3dd157
KV		 1712}
1713
0226d602 1714int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 1715{
7aa7a72a 1716 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
869526b9
KV		 1717 skb->len);
1718
d35a6c18 1719 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
869526b9
KV		 1720
1721 return 0;
5e3dd157
KV		 1722}
1723
b91251fb
MK		 1724void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
1725 struct ath10k_fw_stats_pdev *dst)
d15fb520 1726{
d15fb520
MK		 1727 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
1728 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
1729 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
1730 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
1731 dst->cycle_count = __le32_to_cpu(src->cycle_count);
1732 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
1733 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
b91251fb 1734}
d15fb520 1735
b91251fb
MK		 1736void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
1737 struct ath10k_fw_stats_pdev *dst)
1738{
1739 dst->comp_queued = __le32_to_cpu(src->comp_queued);
1740 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
1741 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
1742 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
1743 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
1744 dst->local_enqued = __le32_to_cpu(src->local_enqued);
1745 dst->local_freed = __le32_to_cpu(src->local_freed);
1746 dst->hw_queued = __le32_to_cpu(src->hw_queued);
1747 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
1748 dst->underrun = __le32_to_cpu(src->underrun);
1749 dst->tx_abort = __le32_to_cpu(src->tx_abort);
1750 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
1751 dst->tx_ko = __le32_to_cpu(src->tx_ko);
1752 dst->data_rc = __le32_to_cpu(src->data_rc);
1753 dst->self_triggers = __le32_to_cpu(src->self_triggers);
1754 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
1755 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
1756 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
1757 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
1758 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
1759 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
1760 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
1761}
d15fb520 1762
b91251fb
MK		 1763void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
1764 struct ath10k_fw_stats_pdev *dst)
1765{
1766 dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
1767 dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
1768 dst->r0_frags = __le32_to_cpu(src->r0_frags);
1769 dst->r1_frags = __le32_to_cpu(src->r1_frags);
1770 dst->r2_frags = __le32_to_cpu(src->r2_frags);
1771 dst->r3_frags = __le32_to_cpu(src->r3_frags);
1772 dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
1773 dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
1774 dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
1775 dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
1776 dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
1777 dst->phy_errs = __le32_to_cpu(src->phy_errs);
1778 dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
1779 dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
1780}
1781
1782void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
1783 struct ath10k_fw_stats_pdev *dst)
1784{
1785 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
1786 dst->rts_bad = __le32_to_cpu(src->rts_bad);
1787 dst->rts_good = __le32_to_cpu(src->rts_good);
1788 dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
1789 dst->no_beacons = __le32_to_cpu(src->no_beacons);
1790 dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
d15fb520
MK		 1791}
1792
0226d602
MK		 1793void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
1794 struct ath10k_fw_stats_peer *dst)
d15fb520
MK		 1795{
1796 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
1797 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
1798 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
1799}
1800
d7579d12
MK		 1801static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
1802 struct sk_buff *skb,
1803 struct ath10k_fw_stats *stats)
d15fb520
MK		 1804{
1805 const struct wmi_stats_event *ev = (void *)skb->data;
1806 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
1807 int i;
1808
1809 if (!skb_pull(skb, sizeof(*ev)))
1810 return -EPROTO;
1811
1812 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
1813 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
1814 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
1815
5326849a 1816 for (i = 0; i < num_pdev_stats; i++) {
d15fb520 1817 const struct wmi_pdev_stats *src;
5326849a 1818 struct ath10k_fw_stats_pdev *dst;
d15fb520
MK		 1819
1820 src = (void *)skb->data;
1821 if (!skb_pull(skb, sizeof(*src)))
1822 return -EPROTO;
1823
5326849a
MK		 1824 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1825 if (!dst)
1826 continue;
1827
b91251fb
MK		 1828 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
1829 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
1830 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
1831
5326849a 1832 list_add_tail(&dst->list, &stats->pdevs);
d15fb520
MK		 1833 }
1834
1835 /* fw doesn't implement vdev stats */
1836
1837 for (i = 0; i < num_peer_stats; i++) {
1838 const struct wmi_peer_stats *src;
5326849a 1839 struct ath10k_fw_stats_peer *dst;
d15fb520
MK		 1840
1841 src = (void *)skb->data;
1842 if (!skb_pull(skb, sizeof(*src)))
1843 return -EPROTO;
1844
5326849a
MK		 1845 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1846 if (!dst)
1847 continue;
1848
1849 ath10k_wmi_pull_peer_stats(src, dst);
1850 list_add_tail(&dst->list, &stats->peers);
d15fb520
MK		 1851 }
1852
1853 return 0;
1854}
1855
d7579d12
MK		 1856static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
1857 struct sk_buff *skb,
1858 struct ath10k_fw_stats *stats)
d15fb520
MK		 1859{
1860 const struct wmi_stats_event *ev = (void *)skb->data;
1861 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
1862 int i;
1863
1864 if (!skb_pull(skb, sizeof(*ev)))
1865 return -EPROTO;
1866
1867 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
1868 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
1869 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
1870
5326849a 1871 for (i = 0; i < num_pdev_stats; i++) {
d15fb520 1872 const struct wmi_10x_pdev_stats *src;
5326849a 1873 struct ath10k_fw_stats_pdev *dst;
d15fb520
MK		 1874
1875 src = (void *)skb->data;
1876 if (!skb_pull(skb, sizeof(*src)))
1877 return -EPROTO;
1878
5326849a
MK		 1879 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1880 if (!dst)
1881 continue;
1882
b91251fb
MK		 1883 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
1884 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
1885 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
1886 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
d15fb520 1887
5326849a 1888 list_add_tail(&dst->list, &stats->pdevs);
d15fb520
MK		 1889 }
1890
1891 /* fw doesn't implement vdev stats */
1892
1893 for (i = 0; i < num_peer_stats; i++) {
1894 const struct wmi_10x_peer_stats *src;
5326849a 1895 struct ath10k_fw_stats_peer *dst;
d15fb520
MK		 1896
1897 src = (void *)skb->data;
1898 if (!skb_pull(skb, sizeof(*src)))
1899 return -EPROTO;
1900
5326849a
MK		 1901 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1902 if (!dst)
1903 continue;
1904
1905 ath10k_wmi_pull_peer_stats(&src->old, dst);
1906
1907 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
d15fb520 1908
5326849a 1909 list_add_tail(&dst->list, &stats->peers);
d15fb520
MK		 1910 }
1911
1912 return 0;
1913}
1914
20de2229
MK		 1915static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
1916 struct sk_buff *skb,
1917 struct ath10k_fw_stats *stats)
1918{
1919 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
1920 u32 num_pdev_stats;
1921 u32 num_pdev_ext_stats;
1922 u32 num_vdev_stats;
1923 u32 num_peer_stats;
1924 int i;
1925
1926 if (!skb_pull(skb, sizeof(*ev)))
1927 return -EPROTO;
1928
1929 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
1930 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
1931 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
1932 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
1933
1934 for (i = 0; i < num_pdev_stats; i++) {
1935 const struct wmi_10_2_pdev_stats *src;
1936 struct ath10k_fw_stats_pdev *dst;
1937
1938 src = (void *)skb->data;
1939 if (!skb_pull(skb, sizeof(*src)))
1940 return -EPROTO;
1941
1942 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1943 if (!dst)
1944 continue;
1945
1946 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
1947 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
1948 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
1949 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
1950 /* FIXME: expose 10.2 specific values */
1951
1952 list_add_tail(&dst->list, &stats->pdevs);
1953 }
1954
1955 for (i = 0; i < num_pdev_ext_stats; i++) {
1956 const struct wmi_10_2_pdev_ext_stats *src;
1957
1958 src = (void *)skb->data;
1959 if (!skb_pull(skb, sizeof(*src)))
1960 return -EPROTO;
1961
1962 /* FIXME: expose values to userspace
1963 *
1964 * Note: Even though this loop seems to do nothing it is
1965 * required to parse following sub-structures properly.
1966 */
1967 }
1968
1969 /* fw doesn't implement vdev stats */
1970
1971 for (i = 0; i < num_peer_stats; i++) {
1972 const struct wmi_10_2_peer_stats *src;
1973 struct ath10k_fw_stats_peer *dst;
1974
1975 src = (void *)skb->data;
1976 if (!skb_pull(skb, sizeof(*src)))
1977 return -EPROTO;
1978
1979 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1980 if (!dst)
1981 continue;
1982
1983 ath10k_wmi_pull_peer_stats(&src->old, dst);
1984
1985 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
1986 /* FIXME: expose 10.2 specific values */
1987
1988 list_add_tail(&dst->list, &stats->peers);
1989 }
1990
1991 return 0;
1992}
1993
1994static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
1995 struct sk_buff *skb,
1996 struct ath10k_fw_stats *stats)
1997{
1998 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
1999 u32 num_pdev_stats;
2000 u32 num_pdev_ext_stats;
2001 u32 num_vdev_stats;
2002 u32 num_peer_stats;
2003 int i;
2004
2005 if (!skb_pull(skb, sizeof(*ev)))
2006 return -EPROTO;
2007
2008 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
2009 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
2010 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
2011 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
2012
2013 for (i = 0; i < num_pdev_stats; i++) {
2014 const struct wmi_10_2_pdev_stats *src;
2015 struct ath10k_fw_stats_pdev *dst;
2016
2017 src = (void *)skb->data;
2018 if (!skb_pull(skb, sizeof(*src)))
2019 return -EPROTO;
2020
2021 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2022 if (!dst)
2023 continue;
2024
2025 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
2026 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
2027 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
2028 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
2029 /* FIXME: expose 10.2 specific values */
2030
2031 list_add_tail(&dst->list, &stats->pdevs);
2032 }
2033
2034 for (i = 0; i < num_pdev_ext_stats; i++) {
2035 const struct wmi_10_2_pdev_ext_stats *src;
2036
2037 src = (void *)skb->data;
2038 if (!skb_pull(skb, sizeof(*src)))
2039 return -EPROTO;
2040
2041 /* FIXME: expose values to userspace
2042 *
2043 * Note: Even though this loop seems to do nothing it is
2044 * required to parse following sub-structures properly.
2045 */
2046 }
2047
2048 /* fw doesn't implement vdev stats */
2049
2050 for (i = 0; i < num_peer_stats; i++) {
2051 const struct wmi_10_2_4_peer_stats *src;
2052 struct ath10k_fw_stats_peer *dst;
2053
2054 src = (void *)skb->data;
2055 if (!skb_pull(skb, sizeof(*src)))
2056 return -EPROTO;
2057
2058 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
2059 if (!dst)
2060 continue;
2061
2062 ath10k_wmi_pull_peer_stats(&src->common.old, dst);
2063
2064 dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
2065 /* FIXME: expose 10.2 specific values */
2066
2067 list_add_tail(&dst->list, &stats->peers);
2068 }
2069
2070 return 0;
2071}
2072
0226d602 2073void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2074{
7aa7a72a 2075 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
60ef401a 2076 ath10k_debug_fw_stats_process(ar, skb);
5e3dd157
KV		 2077}
2078
d7579d12
MK		 2079static int
2080ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
2081 struct wmi_vdev_start_ev_arg *arg)
32653cf1
MK		 2082{
2083 struct wmi_vdev_start_response_event *ev = (void *)skb->data;
2084
2085 if (skb->len < sizeof(*ev))
2086 return -EPROTO;
2087
2088 skb_pull(skb, sizeof(*ev));
2089 arg->vdev_id = ev->vdev_id;
2090 arg->req_id = ev->req_id;
2091 arg->resp_type = ev->resp_type;
2092 arg->status = ev->status;
2093
2094 return 0;
2095}
2096
0226d602 2097void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2098{
32653cf1
MK		 2099 struct wmi_vdev_start_ev_arg arg = {};
2100 int ret;
5e3dd157 2101
7aa7a72a 2102 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
5e3dd157 2103
d7579d12 2104 ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
32653cf1
MK		 2105 if (ret) {
2106 ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
2107 return;
2108 }
5e3dd157 2109
32653cf1 2110 if (WARN_ON(__le32_to_cpu(arg.status)))
5e3dd157
KV		 2111 return;
2112
2113 complete(&ar->vdev_setup_done);
2114}
2115
0226d602 2116void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2117{
7aa7a72a 2118 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
5e3dd157
KV		 2119 complete(&ar->vdev_setup_done);
2120}
2121
d7579d12
MK		 2122static int
2123ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
2124 struct wmi_peer_kick_ev_arg *arg)
32653cf1
MK		 2125{
2126 struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
2127
2128 if (skb->len < sizeof(*ev))
2129 return -EPROTO;
2130
2131 skb_pull(skb, sizeof(*ev));
2132 arg->mac_addr = ev->peer_macaddr.addr;
2133
2134 return 0;
2135}
2136
0226d602 2137void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2138{
32653cf1 2139 struct wmi_peer_kick_ev_arg arg = {};
5a13e76e 2140 struct ieee80211_sta *sta;
32653cf1 2141 int ret;
5a13e76e 2142
d7579d12 2143 ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
32653cf1
MK		 2144 if (ret) {
2145 ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
2146 ret);
2147 return;
2148 }
5a13e76e 2149
7aa7a72a 2150 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
32653cf1 2151 arg.mac_addr);
5a13e76e
KV		 2152
2153 rcu_read_lock();
2154
32653cf1 2155 sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
5a13e76e 2156 if (!sta) {
7aa7a72a 2157 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
32653cf1 2158 arg.mac_addr);
5a13e76e
KV		 2159 goto exit;
2160 }
2161
2162 ieee80211_report_low_ack(sta, 10);
2163
2164exit:
2165 rcu_read_unlock();
5e3dd157
KV		 2166}
2167
2168/*
2169 * FIXME
2170 *
2171 * We don't report to mac80211 sleep state of connected
2172 * stations. Due to this mac80211 can't fill in TIM IE
2173 * correctly.
2174 *
2175 * I know of no way of getting nullfunc frames that contain
2176 * sleep transition from connected stations - these do not
2177 * seem to be sent from the target to the host. There also
2178 * doesn't seem to be a dedicated event for that. So the
2179 * only way left to do this would be to read tim_bitmap
2180 * during SWBA.
2181 *
2182 * We could probably try using tim_bitmap from SWBA to tell
2183 * mac80211 which stations are asleep and which are not. The
2184 * problem here is calling mac80211 functions so many times
2185 * could take too long and make us miss the time to submit
2186 * the beacon to the target.
2187 *
2188 * So as a workaround we try to extend the TIM IE if there
2189 * is unicast buffered for stations with aid > 7 and fill it
2190 * in ourselves.
2191 */
2192static void ath10k_wmi_update_tim(struct ath10k *ar,
2193 struct ath10k_vif *arvif,
2194 struct sk_buff *bcn,
32653cf1 2195 const struct wmi_tim_info *tim_info)
5e3dd157
KV		 2196{
2197 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
2198 struct ieee80211_tim_ie *tim;
2199 u8 *ies, *ie;
2200 u8 ie_len, pvm_len;
af762c0b
KV		 2201 __le32 t;
2202 u32 v;
5e3dd157
KV		 2203
2204 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
2205 * we must copy the bitmap upon change and reuse it later */
32653cf1 2206 if (__le32_to_cpu(tim_info->tim_changed)) {
5e3dd157
KV		 2207 int i;
2208
2209 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
32653cf1 2210 sizeof(tim_info->tim_bitmap));
5e3dd157
KV		 2211
2212 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
32653cf1 2213 t = tim_info->tim_bitmap[i / 4];
af762c0b 2214 v = __le32_to_cpu(t);
5e3dd157
KV		 2215 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
2216 }
2217
2218 /* FW reports either length 0 or 16
2219 * so we calculate this on our own */
2220 arvif->u.ap.tim_len = 0;
2221 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
2222 if (arvif->u.ap.tim_bitmap[i])
2223 arvif->u.ap.tim_len = i;
2224
2225 arvif->u.ap.tim_len++;
2226 }
2227
2228 ies = bcn->data;
2229 ies += ieee80211_hdrlen(hdr->frame_control);
2230 ies += 12; /* fixed parameters */
2231
2232 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
2233 (u8 *)skb_tail_pointer(bcn) - ies);
2234 if (!ie) {
09af8f85 2235 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
7aa7a72a 2236 ath10k_warn(ar, "no tim ie found;\n");
5e3dd157
KV		 2237 return;
2238 }
2239
2240 tim = (void *)ie + 2;
2241 ie_len = ie[1];
2242 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
2243
2244 if (pvm_len < arvif->u.ap.tim_len) {
2245 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
2246 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
2247 void *next_ie = ie + 2 + ie_len;
2248
2249 if (skb_put(bcn, expand_size)) {
2250 memmove(next_ie + expand_size, next_ie, move_size);
2251
2252 ie[1] += expand_size;
2253 ie_len += expand_size;
2254 pvm_len += expand_size;
2255 } else {
7aa7a72a 2256 ath10k_warn(ar, "tim expansion failed\n");
5e3dd157
KV		 2257 }
2258 }
2259
2260 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
7aa7a72a 2261 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
5e3dd157
KV		 2262 return;
2263 }
2264
32653cf1 2265 tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
5e3dd157
KV		 2266 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
2267
748afc47
MK		 2268 if (tim->dtim_count == 0) {
2269 ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true;
2270
32653cf1 2271 if (__le32_to_cpu(tim_info->tim_mcast) == 1)
748afc47
MK		 2272 ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true;
2273 }
2274
7aa7a72a 2275 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
5e3dd157
KV		 2276 tim->dtim_count, tim->dtim_period,
2277 tim->bitmap_ctrl, pvm_len);
2278}
2279
5e3dd157
KV		 2280static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
2281 struct sk_buff *bcn,
32653cf1 2282 const struct wmi_p2p_noa_info *noa)
5e3dd157 2283{
5e3dd157
KV		 2284 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
2285 return;
2286
7aa7a72a 2287 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
5e3dd157 2288
6a94888f
MK		 2289 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
2290 ath10k_p2p_noa_update(arvif, noa);
5e3dd157
KV		 2291
2292 if (arvif->u.ap.noa_data)
2293 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
2294 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
2295 arvif->u.ap.noa_data,
2296 arvif->u.ap.noa_len);
5e3dd157 2297
6a94888f 2298 return;
5e3dd157
KV		 2299}
2300
d7579d12
MK		 2301static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
2302 struct wmi_swba_ev_arg *arg)
32653cf1
MK		 2303{
2304 struct wmi_host_swba_event *ev = (void *)skb->data;
2305 u32 map;
2306 size_t i;
2307
2308 if (skb->len < sizeof(*ev))
2309 return -EPROTO;
2310
2311 skb_pull(skb, sizeof(*ev));
2312 arg->vdev_map = ev->vdev_map;
2313
2314 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
2315 if (!(map & BIT(0)))
2316 continue;
2317
2318 /* If this happens there were some changes in firmware and
2319 * ath10k should update the max size of tim_info array.
2320 */
2321 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
2322 break;
2323
2324 arg->tim_info[i] = &ev->bcn_info[i].tim_info;
2325 arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
2326 i++;
2327 }
2328
2329 return 0;
2330}
2331
0226d602 2332void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2333{
32653cf1 2334 struct wmi_swba_ev_arg arg = {};
5e3dd157
KV		 2335 u32 map;
2336 int i = -1;
32653cf1
MK		 2337 const struct wmi_tim_info *tim_info;
2338 const struct wmi_p2p_noa_info *noa_info;
5e3dd157 2339 struct ath10k_vif *arvif;
5e3dd157 2340 struct sk_buff *bcn;
64badcb6 2341 dma_addr_t paddr;
767d34fc 2342 int ret, vdev_id = 0;
5e3dd157 2343
d7579d12 2344 ret = ath10k_wmi_pull_swba(ar, skb, &arg);
32653cf1
MK		 2345 if (ret) {
2346 ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
2347 return;
2348 }
2349
2350 map = __le32_to_cpu(arg.vdev_map);
5e3dd157 2351
7aa7a72a 2352 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
32653cf1 2353 map);
5e3dd157
KV		 2354
2355 for (; map; map >>= 1, vdev_id++) {
2356 if (!(map & 0x1))
2357 continue;
2358
2359 i++;
2360
2361 if (i >= WMI_MAX_AP_VDEV) {
7aa7a72a 2362 ath10k_warn(ar, "swba has corrupted vdev map\n");
5e3dd157
KV		 2363 break;
2364 }
2365
32653cf1
MK		 2366 tim_info = arg.tim_info[i];
2367 noa_info = arg.noa_info[i];
5e3dd157 2368
7aa7a72a 2369 ath10k_dbg(ar, ATH10K_DBG_MGMT,
7a8a396b 2370 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
5e3dd157 2371 i,
32653cf1
MK		 2372 __le32_to_cpu(tim_info->tim_len),
2373 __le32_to_cpu(tim_info->tim_mcast),
2374 __le32_to_cpu(tim_info->tim_changed),
2375 __le32_to_cpu(tim_info->tim_num_ps_pending),
2376 __le32_to_cpu(tim_info->tim_bitmap[3]),
2377 __le32_to_cpu(tim_info->tim_bitmap[2]),
2378 __le32_to_cpu(tim_info->tim_bitmap[1]),
2379 __le32_to_cpu(tim_info->tim_bitmap[0]));
5e3dd157
KV		 2380
2381 arvif = ath10k_get_arvif(ar, vdev_id);
2382 if (arvif == NULL) {
7aa7a72a
MK		 2383 ath10k_warn(ar, "no vif for vdev_id %d found\n",
2384 vdev_id);
5e3dd157
KV		 2385 continue;
2386 }
2387
c2df44b3
MK		 2388 /* There are no completions for beacons so wait for next SWBA
2389 * before telling mac80211 to decrement CSA counter
2390 *
2391 * Once CSA counter is completed stop sending beacons until
2392 * actual channel switch is done */
2393 if (arvif->vif->csa_active &&
2394 ieee80211_csa_is_complete(arvif->vif)) {
2395 ieee80211_csa_finish(arvif->vif);
2396 continue;
2397 }
2398
5e3dd157
KV		 2399 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
2400 if (!bcn) {
7aa7a72a 2401 ath10k_warn(ar, "could not get mac80211 beacon\n");
5e3dd157
KV		 2402 continue;
2403 }
2404
4b604558 2405 ath10k_tx_h_seq_no(arvif->vif, bcn);
32653cf1
MK		 2406 ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
2407 ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
5e3dd157 2408
ed54388a 2409 spin_lock_bh(&ar->data_lock);
748afc47 2410
ed54388a 2411 if (arvif->beacon) {
af21319f
MK		 2412 switch (arvif->beacon_state) {
2413 case ATH10K_BEACON_SENT:
2414 break;
2415 case ATH10K_BEACON_SCHEDULED:
2416 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
2417 arvif->vdev_id);
2418 break;
2419 case ATH10K_BEACON_SENDING:
2420 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
748afc47 2421 arvif->vdev_id);
af21319f
MK		 2422 dev_kfree_skb(bcn);
2423 goto skip;
2424 }
748afc47 2425
64badcb6 2426 ath10k_mac_vif_beacon_free(arvif);
ed54388a 2427 }
5e3dd157 2428
64badcb6
MK		 2429 if (!arvif->beacon_buf) {
2430 paddr = dma_map_single(arvif->ar->dev, bcn->data,
2431 bcn->len, DMA_TO_DEVICE);
2432 ret = dma_mapping_error(arvif->ar->dev, paddr);
2433 if (ret) {
2434 ath10k_warn(ar, "failed to map beacon: %d\n",
2435 ret);
2436 dev_kfree_skb_any(bcn);
2437 goto skip;
2438 }
2439
2440 ATH10K_SKB_CB(bcn)->paddr = paddr;
2441 } else {
2442 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
2443 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
2444 bcn->len, IEEE80211_MAX_FRAME_LEN);
2445 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
2446 }
2447 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
2448 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
767d34fc 2449 }
748afc47 2450
ed54388a 2451 arvif->beacon = bcn;
af21319f 2452 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
5e3dd157 2453
5ce8e7fd
RM		 2454 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
2455 trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
2456
767d34fc 2457skip:
ed54388a 2458 spin_unlock_bh(&ar->data_lock);
5e3dd157 2459 }
af21319f
MK		 2460
2461 ath10k_wmi_tx_beacons_nowait(ar);
5e3dd157
KV		 2462}
2463
0226d602 2464void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2465{
7aa7a72a 2466 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
5e3dd157
KV		 2467}
2468
9702c686 2469static void ath10k_dfs_radar_report(struct ath10k *ar,
2332d0ae
MK		 2470 const struct wmi_phyerr *phyerr,
2471 const struct phyerr_radar_report *rr,
9702c686
JD		 2472 u64 tsf)
2473{
2474 u32 reg0, reg1, tsf32l;
2475 struct pulse_event pe;
2476 u64 tsf64;
2477 u8 rssi, width;
2478
2479 reg0 = __le32_to_cpu(rr->reg0);
2480 reg1 = __le32_to_cpu(rr->reg1);
2481
7aa7a72a 2482 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 2483 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
2484 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
2485 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
2486 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
2487 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
7aa7a72a 2488 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 2489 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
2490 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
2491 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
2492 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
2493 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
2494 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
7aa7a72a 2495 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 2496 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
2497 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
2498 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
2499
2500 if (!ar->dfs_detector)
2501 return;
2502
2503 /* report event to DFS pattern detector */
2332d0ae 2504 tsf32l = __le32_to_cpu(phyerr->tsf_timestamp);
9702c686
JD		 2505 tsf64 = tsf & (~0xFFFFFFFFULL);
2506 tsf64 |= tsf32l;
2507
2508 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
2332d0ae 2509 rssi = phyerr->rssi_combined;
9702c686
JD		 2510
2511 /* hardware store this as 8 bit signed value,
2512 * set to zero if negative number
2513 */
2514 if (rssi & 0x80)
2515 rssi = 0;
2516
2517 pe.ts = tsf64;
2518 pe.freq = ar->hw->conf.chandef.chan->center_freq;
2519 pe.width = width;
2520 pe.rssi = rssi;
2c3f26a0 2521 pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
7aa7a72a 2522 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 2523 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
2524 pe.freq, pe.width, pe.rssi, pe.ts);
2525
2526 ATH10K_DFS_STAT_INC(ar, pulses_detected);
2527
2528 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
7aa7a72a 2529 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 2530 "dfs no pulse pattern detected, yet\n");
2531 return;
2532 }
2533
7aa7a72a 2534 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
9702c686 2535 ATH10K_DFS_STAT_INC(ar, radar_detected);
7d9b40b4
MP		 2536
2537 /* Control radar events reporting in debugfs file
2538 dfs_block_radar_events */
2539 if (ar->dfs_block_radar_events) {
7aa7a72a 2540 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
7d9b40b4
MP		 2541 return;
2542 }
2543
9702c686
JD		 2544 ieee80211_radar_detected(ar->hw);
2545}
2546
2547static int ath10k_dfs_fft_report(struct ath10k *ar,
2332d0ae
MK		 2548 const struct wmi_phyerr *phyerr,
2549 const struct phyerr_fft_report *fftr,
9702c686
JD		 2550 u64 tsf)
2551{
2552 u32 reg0, reg1;
2553 u8 rssi, peak_mag;
2554
2555 reg0 = __le32_to_cpu(fftr->reg0);
2556 reg1 = __le32_to_cpu(fftr->reg1);
2332d0ae 2557 rssi = phyerr->rssi_combined;
9702c686 2558
7aa7a72a 2559 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 2560 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
2561 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
2562 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
2563 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
2564 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
7aa7a72a 2565 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 2566 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
2567 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
2568 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
2569 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
2570 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
2571
2572 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
2573
2574 /* false event detection */
2575 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
2576 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
7aa7a72a 2577 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
9702c686
JD		 2578 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
2579 return -EINVAL;
2580 }
2581
2582 return 0;
2583}
2584
0226d602
MK		 2585void ath10k_wmi_event_dfs(struct ath10k *ar,
2586 const struct wmi_phyerr *phyerr,
2587 u64 tsf)
9702c686
JD		 2588{
2589 int buf_len, tlv_len, res, i = 0;
2332d0ae
MK		 2590 const struct phyerr_tlv *tlv;
2591 const struct phyerr_radar_report *rr;
2592 const struct phyerr_fft_report *fftr;
2593 const u8 *tlv_buf;
9702c686 2594
2332d0ae 2595 buf_len = __le32_to_cpu(phyerr->buf_len);
7aa7a72a 2596 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686 2597 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
2332d0ae
MK		 2598 phyerr->phy_err_code, phyerr->rssi_combined,
2599 __le32_to_cpu(phyerr->tsf_timestamp), tsf, buf_len);
9702c686
JD		 2600
2601 /* Skip event if DFS disabled */
2602 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
2603 return;
2604
2605 ATH10K_DFS_STAT_INC(ar, pulses_total);
2606
2607 while (i < buf_len) {
2608 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a
MK		 2609 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
2610 i);
9702c686
JD		 2611 return;
2612 }
2613
2332d0ae 2614 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
9702c686 2615 tlv_len = __le16_to_cpu(tlv->len);
2332d0ae 2616 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
7aa7a72a 2617 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
9702c686
JD		 2618 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
2619 tlv_len, tlv->tag, tlv->sig);
2620
2621 switch (tlv->tag) {
2622 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
2623 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
7aa7a72a 2624 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
9702c686
JD		 2625 i);
2626 return;
2627 }
2628
2629 rr = (struct phyerr_radar_report *)tlv_buf;
2332d0ae 2630 ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
9702c686
JD		 2631 break;
2632 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
2633 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
7aa7a72a
MK		 2634 ath10k_warn(ar, "too short fft report (%d)\n",
2635 i);
9702c686
JD		 2636 return;
2637 }
2638
2639 fftr = (struct phyerr_fft_report *)tlv_buf;
2332d0ae 2640 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
9702c686
JD		 2641 if (res)
2642 return;
2643 break;
2644 }
2645
2646 i += sizeof(*tlv) + tlv_len;
2647 }
2648}
2649
0226d602
MK		 2650void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
2651 const struct wmi_phyerr *phyerr,
2652 u64 tsf)
9702c686 2653{
855aed12
SW		 2654 int buf_len, tlv_len, res, i = 0;
2655 struct phyerr_tlv *tlv;
2332d0ae
MK		 2656 const void *tlv_buf;
2657 const struct phyerr_fft_report *fftr;
855aed12
SW		 2658 size_t fftr_len;
2659
2332d0ae 2660 buf_len = __le32_to_cpu(phyerr->buf_len);
855aed12
SW		 2661
2662 while (i < buf_len) {
2663 if (i + sizeof(*tlv) > buf_len) {
7aa7a72a 2664 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
855aed12
SW		 2665 i);
2666 return;
2667 }
2668
2332d0ae 2669 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
855aed12 2670 tlv_len = __le16_to_cpu(tlv->len);
2332d0ae 2671 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
855aed12
SW		 2672
2673 if (i + sizeof(*tlv) + tlv_len > buf_len) {
7aa7a72a 2674 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
855aed12
SW		 2675 i);
2676 return;
2677 }
2678
2679 switch (tlv->tag) {
2680 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
2681 if (sizeof(*fftr) > tlv_len) {
7aa7a72a 2682 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
855aed12
SW		 2683 i);
2684 return;
2685 }
2686
2687 fftr_len = tlv_len - sizeof(*fftr);
2332d0ae
MK		 2688 fftr = tlv_buf;
2689 res = ath10k_spectral_process_fft(ar, phyerr,
855aed12
SW		 2690 fftr, fftr_len,
2691 tsf);
2692 if (res < 0) {
7aa7a72a 2693 ath10k_warn(ar, "failed to process fft report: %d\n",
855aed12
SW		 2694 res);
2695 return;
2696 }
2697 break;
2698 }
2699
2700 i += sizeof(*tlv) + tlv_len;
2701 }
9702c686
JD		 2702}
2703
d7579d12
MK		 2704static int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, struct sk_buff *skb,
2705 struct wmi_phyerr_ev_arg *arg)
32653cf1
MK		 2706{
2707 struct wmi_phyerr_event *ev = (void *)skb->data;
2708
2709 if (skb->len < sizeof(*ev))
2710 return -EPROTO;
2711
2712 arg->num_phyerrs = ev->num_phyerrs;
2713 arg->tsf_l32 = ev->tsf_l32;
2714 arg->tsf_u32 = ev->tsf_u32;
2715 arg->buf_len = __cpu_to_le32(skb->len - sizeof(*ev));
2716 arg->phyerrs = ev->phyerrs;
2717
2718 return 0;
2719}
2720
0226d602 2721void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2722{
32653cf1 2723 struct wmi_phyerr_ev_arg arg = {};
2332d0ae 2724 const struct wmi_phyerr *phyerr;
9702c686
JD		 2725 u32 count, i, buf_len, phy_err_code;
2726 u64 tsf;
32653cf1 2727 int left_len, ret;
9702c686
JD		 2728
2729 ATH10K_DFS_STAT_INC(ar, phy_errors);
2730
d7579d12 2731 ret = ath10k_wmi_pull_phyerr(ar, skb, &arg);
32653cf1
MK		 2732 if (ret) {
2733 ath10k_warn(ar, "failed to parse phyerr event: %d\n", ret);
9702c686
JD		 2734 return;
2735 }
2736
32653cf1 2737 left_len = __le32_to_cpu(arg.buf_len);
9702c686
JD		 2738
2739 /* Check number of included events */
32653cf1 2740 count = __le32_to_cpu(arg.num_phyerrs);
9702c686 2741
32653cf1 2742 tsf = __le32_to_cpu(arg.tsf_u32);
9702c686 2743 tsf <<= 32;
32653cf1 2744 tsf |= __le32_to_cpu(arg.tsf_l32);
9702c686 2745
7aa7a72a 2746 ath10k_dbg(ar, ATH10K_DBG_WMI,
9702c686
JD		 2747 "wmi event phyerr count %d tsf64 0x%llX\n",
2748 count, tsf);
2749
32653cf1 2750 phyerr = arg.phyerrs;
9702c686
JD		 2751 for (i = 0; i < count; i++) {
2752 /* Check if we can read event header */
2332d0ae 2753 if (left_len < sizeof(*phyerr)) {
7aa7a72a
MK		 2754 ath10k_warn(ar, "single event (%d) wrong head len\n",
2755 i);
9702c686
JD		 2756 return;
2757 }
2758
2332d0ae 2759 left_len -= sizeof(*phyerr);
9702c686 2760
2332d0ae
MK		 2761 buf_len = __le32_to_cpu(phyerr->buf_len);
2762 phy_err_code = phyerr->phy_err_code;
9702c686
JD		 2763
2764 if (left_len < buf_len) {
7aa7a72a 2765 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
9702c686
JD		 2766 return;
2767 }
2768
2769 left_len -= buf_len;
2770
2771 switch (phy_err_code) {
2772 case PHY_ERROR_RADAR:
2332d0ae 2773 ath10k_wmi_event_dfs(ar, phyerr, tsf);
9702c686
JD		 2774 break;
2775 case PHY_ERROR_SPECTRAL_SCAN:
2332d0ae 2776 ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
9702c686
JD		 2777 break;
2778 case PHY_ERROR_FALSE_RADAR_EXT:
2332d0ae
MK		 2779 ath10k_wmi_event_dfs(ar, phyerr, tsf);
2780 ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
9702c686
JD		 2781 break;
2782 default:
2783 break;
2784 }
2785
2332d0ae 2786 phyerr = (void *)phyerr + sizeof(*phyerr) + buf_len;
9702c686 2787 }
5e3dd157
KV		 2788}
2789
0226d602 2790void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2791{
7aa7a72a 2792 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
5e3dd157
KV		 2793}
2794
0226d602 2795void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2796{
7aa7a72a 2797 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
5e3dd157
KV		 2798}
2799
0226d602 2800void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2801{
2fe5288c
KV		 2802 char buf[101], c;
2803 int i;
2804
2805 for (i = 0; i < sizeof(buf) - 1; i++) {
2806 if (i >= skb->len)
2807 break;
2808
2809 c = skb->data[i];
2810
2811 if (c == '\0')
2812 break;
2813
2814 if (isascii(c) && isprint(c))
2815 buf[i] = c;
2816 else
2817 buf[i] = '.';
2818 }
2819
2820 if (i == sizeof(buf) - 1)
7aa7a72a 2821 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
2fe5288c
KV		 2822
2823 /* for some reason the debug prints end with \n, remove that */
2824 if (skb->data[i - 1] == '\n')
2825 i--;
2826
2827 /* the last byte is always reserved for the null character */
2828 buf[i] = '\0';
2829
3be004c3 2830 ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
5e3dd157
KV		 2831}
2832
0226d602 2833void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2834{
7aa7a72a 2835 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
5e3dd157
KV		 2836}
2837
0226d602 2838void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2839{
7aa7a72a 2840 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
5e3dd157
KV		 2841}
2842
0226d602
MK		 2843void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
2844 struct sk_buff *skb)
5e3dd157 2845{
7aa7a72a 2846 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 2847}
2848
0226d602
MK		 2849void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
2850 struct sk_buff *skb)
5e3dd157 2851{
7aa7a72a 2852 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
5e3dd157
KV		 2853}
2854
0226d602 2855void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2856{
7aa7a72a 2857 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
5e3dd157
KV		 2858}
2859
0226d602 2860void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2861{
7aa7a72a 2862 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
5e3dd157
KV		 2863}
2864
0226d602 2865void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2866{
7aa7a72a 2867 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
5e3dd157
KV		 2868}
2869
0226d602 2870void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2871{
7aa7a72a 2872 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
5e3dd157
KV		 2873}
2874
0226d602 2875void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2876{
7aa7a72a 2877 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5e3dd157
KV		 2878}
2879
0226d602 2880void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2881{
7aa7a72a 2882 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5e3dd157
KV		 2883}
2884
0226d602 2885void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2886{
7aa7a72a 2887 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5e3dd157
KV		 2888}
2889
0226d602 2890void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2891{
7aa7a72a 2892 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 2893}
2894
0226d602 2895void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 2896{
7aa7a72a 2897 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5e3dd157
KV		 2898}
2899
0226d602
MK		 2900void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
2901 struct sk_buff *skb)
5e3dd157 2902{
7aa7a72a 2903 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5e3dd157
KV		 2904}
2905
0226d602 2906void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 2907{
7aa7a72a 2908 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
8a6618b0
BM		 2909}
2910
0226d602 2911void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 2912{
7aa7a72a 2913 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
8a6618b0
BM		 2914}
2915
0226d602 2916void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
8a6618b0 2917{
7aa7a72a 2918 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
8a6618b0
BM		 2919}
2920
b3effe61 2921static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
5b07e07f 2922 u32 num_units, u32 unit_len)
b3effe61
BM		 2923{
2924 dma_addr_t paddr;
2925 u32 pool_size;
2926 int idx = ar->wmi.num_mem_chunks;
2927
2928 pool_size = num_units * round_up(unit_len, 4);
2929
2930 if (!pool_size)
2931 return -EINVAL;
2932
2933 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
2934 pool_size,
2935 &paddr,
2936 GFP_ATOMIC);
2937 if (!ar->wmi.mem_chunks[idx].vaddr) {
7aa7a72a 2938 ath10k_warn(ar, "failed to allocate memory chunk\n");
b3effe61
BM		 2939 return -ENOMEM;
2940 }
2941
2942 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
2943
2944 ar->wmi.mem_chunks[idx].paddr = paddr;
2945 ar->wmi.mem_chunks[idx].len = pool_size;
2946 ar->wmi.mem_chunks[idx].req_id = req_id;
2947 ar->wmi.num_mem_chunks++;
2948
2949 return 0;
2950}
2951
d7579d12
MK		 2952static int
2953ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
2954 struct wmi_svc_rdy_ev_arg *arg)
5c01aa3d
MK		 2955{
2956 struct wmi_service_ready_event *ev;
2957 size_t i, n;
2958
2959 if (skb->len < sizeof(*ev))
2960 return -EPROTO;
2961
2962 ev = (void *)skb->data;
2963 skb_pull(skb, sizeof(*ev));
2964 arg->min_tx_power = ev->hw_min_tx_power;
2965 arg->max_tx_power = ev->hw_max_tx_power;
2966 arg->ht_cap = ev->ht_cap_info;
2967 arg->vht_cap = ev->vht_cap_info;
2968 arg->sw_ver0 = ev->sw_version;
2969 arg->sw_ver1 = ev->sw_version_1;
2970 arg->phy_capab = ev->phy_capability;
2971 arg->num_rf_chains = ev->num_rf_chains;
2972 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
2973 arg->num_mem_reqs = ev->num_mem_reqs;
2974 arg->service_map = ev->wmi_service_bitmap;
2a3e60d3 2975 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5c01aa3d
MK		 2976
2977 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
2978 ARRAY_SIZE(arg->mem_reqs));
2979 for (i = 0; i < n; i++)
2980 arg->mem_reqs[i] = &ev->mem_reqs[i];
2981
2982 if (skb->len <
2983 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
2984 return -EPROTO;
2985
2986 return 0;
2987}
2988
d7579d12
MK		 2989static int
2990ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
2991 struct wmi_svc_rdy_ev_arg *arg)
5c01aa3d
MK		 2992{
2993 struct wmi_10x_service_ready_event *ev;
2994 int i, n;
2995
2996 if (skb->len < sizeof(*ev))
2997 return -EPROTO;
2998
2999 ev = (void *)skb->data;
3000 skb_pull(skb, sizeof(*ev));
3001 arg->min_tx_power = ev->hw_min_tx_power;
3002 arg->max_tx_power = ev->hw_max_tx_power;
3003 arg->ht_cap = ev->ht_cap_info;
3004 arg->vht_cap = ev->vht_cap_info;
3005 arg->sw_ver0 = ev->sw_version;
3006 arg->phy_capab = ev->phy_capability;
3007 arg->num_rf_chains = ev->num_rf_chains;
3008 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
3009 arg->num_mem_reqs = ev->num_mem_reqs;
3010 arg->service_map = ev->wmi_service_bitmap;
2a3e60d3 3011 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5c01aa3d
MK		 3012
3013 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
3014 ARRAY_SIZE(arg->mem_reqs));
3015 for (i = 0; i < n; i++)
3016 arg->mem_reqs[i] = &ev->mem_reqs[i];
3017
3018 if (skb->len <
3019 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
3020 return -EPROTO;
3021
3022 return 0;
3023}
3024
0226d602 3025void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
5e3dd157 3026{
5c01aa3d
MK		 3027 struct wmi_svc_rdy_ev_arg arg = {};
3028 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
5c01aa3d
MK		 3029 int ret;
3030
d7579d12 3031 ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
5c01aa3d
MK		 3032 if (ret) {
3033 ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
5e3dd157
KV		 3034 return;
3035 }
3036
d7579d12
MK		 3037 memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
3038 ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
3039 arg.service_map_len);
3040
5c01aa3d
MK		 3041 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
3042 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
3043 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
3044 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
5e3dd157 3045 ar->fw_version_major =
5c01aa3d
MK		 3046 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
3047 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
5e3dd157 3048 ar->fw_version_release =
5c01aa3d
MK		 3049 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
3050 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
3051 ar->phy_capability = __le32_to_cpu(arg.phy_capab);
3052 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
3053 ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd);
3054
5c01aa3d 3055 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
2a3e60d3 3056 arg.service_map, arg.service_map_len);
8865bee4 3057
1a222435
KV		 3058 /* only manually set fw features when not using FW IE format */
3059 if (ar->fw_api == 1 && ar->fw_version_build > 636)
0d9b0438
MK		 3060 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
3061
8865bee4 3062 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
7aa7a72a 3063 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
8865bee4
MK		 3064 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
3065 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
3066 }
5e3dd157 3067
fdb959c7
MK		 3068 ar->supp_tx_chainmask = (1 << ar->num_rf_chains) - 1;
3069 ar->supp_rx_chainmask = (1 << ar->num_rf_chains) - 1;
3070
5e3dd157
KV		 3071 if (strlen(ar->hw->wiphy->fw_version) == 0) {
3072 snprintf(ar->hw->wiphy->fw_version,
3073 sizeof(ar->hw->wiphy->fw_version),
3074 "%u.%u.%u.%u",
3075 ar->fw_version_major,
3076 ar->fw_version_minor,
3077 ar->fw_version_release,
3078 ar->fw_version_build);
3079 }
3080
5c01aa3d
MK		 3081 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
3082 if (num_mem_reqs > WMI_MAX_MEM_REQS) {
7aa7a72a 3083 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
b3effe61
BM		 3084 num_mem_reqs);
3085 return;
6f97d256
BM		 3086 }
3087
b3effe61 3088 for (i = 0; i < num_mem_reqs; ++i) {
5c01aa3d
MK		 3089 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
3090 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
3091 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
3092 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
b3effe61
BM		 3093
3094 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
3095 /* number of units to allocate is number of
3096 * peers, 1 extra for self peer on target */
3097 /* this needs to be tied, host and target
3098 * can get out of sync */
ec6a73f0 3099 num_units = TARGET_10X_NUM_PEERS + 1;
b3effe61 3100 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
ec6a73f0 3101 num_units = TARGET_10X_NUM_VDEVS + 1;
b3effe61 3102
7aa7a72a 3103 ath10k_dbg(ar, ATH10K_DBG_WMI,
b3effe61
BM		 3104 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
3105 req_id,
5c01aa3d 3106 __le32_to_cpu(arg.mem_reqs[i]->num_units),
b3effe61
BM		 3107 num_unit_info,
3108 unit_size,
3109 num_units);
3110
3111 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
3112 unit_size);
3113 if (ret)
3114 return;
3115 }
3116
7aa7a72a 3117 ath10k_dbg(ar, ATH10K_DBG_WMI,
ca996ec5 3118 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
5c01aa3d
MK		 3119 __le32_to_cpu(arg.min_tx_power),
3120 __le32_to_cpu(arg.max_tx_power),
3121 __le32_to_cpu(arg.ht_cap),
3122 __le32_to_cpu(arg.vht_cap),
3123 __le32_to_cpu(arg.sw_ver0),
3124 __le32_to_cpu(arg.sw_ver1),
ca996ec5 3125 __le32_to_cpu(arg.fw_build),
5c01aa3d
MK		 3126 __le32_to_cpu(arg.phy_capab),
3127 __le32_to_cpu(arg.num_rf_chains),
3128 __le32_to_cpu(arg.eeprom_rd),
3129 __le32_to_cpu(arg.num_mem_reqs));
6f97d256
BM		 3130
3131 complete(&ar->wmi.service_ready);
3132}
3133
d7579d12
MK		 3134static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
3135 struct wmi_rdy_ev_arg *arg)
5e3dd157 3136{
32653cf1 3137 struct wmi_ready_event *ev = (void *)skb->data;
5e3dd157 3138
32653cf1
MK		 3139 if (skb->len < sizeof(*ev))
3140 return -EPROTO;
3141
3142 skb_pull(skb, sizeof(*ev));
3143 arg->sw_version = ev->sw_version;
3144 arg->abi_version = ev->abi_version;
3145 arg->status = ev->status;
3146 arg->mac_addr = ev->mac_addr.addr;
3147
3148 return 0;
3149}
5e3dd157 3150
0226d602 3151int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
32653cf1
MK		 3152{
3153 struct wmi_rdy_ev_arg arg = {};
3154 int ret;
3155
d7579d12 3156 ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
32653cf1
MK		 3157 if (ret) {
3158 ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
3159 return ret;
3160 }
5e3dd157 3161
7aa7a72a 3162 ath10k_dbg(ar, ATH10K_DBG_WMI,
32653cf1
MK		 3163 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
3164 __le32_to_cpu(arg.sw_version),
3165 __le32_to_cpu(arg.abi_version),
3166 arg.mac_addr,
3167 __le32_to_cpu(arg.status));
5e3dd157 3168
32653cf1 3169 ether_addr_copy(ar->mac_addr, arg.mac_addr);
5e3dd157
KV		 3170 complete(&ar->wmi.unified_ready);
3171 return 0;
3172}
3173
a57a6a27
RM		 3174static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
3175{
3176 const struct wmi_pdev_temperature_event *ev;
3177
3178 ev = (struct wmi_pdev_temperature_event *)skb->data;
3179 if (WARN_ON(skb->len < sizeof(*ev)))
3180 return -EPROTO;
3181
ac2953fc 3182 ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
a57a6a27
RM		 3183 return 0;
3184}
3185
d7579d12 3186static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
5e3dd157
KV		 3187{
3188 struct wmi_cmd_hdr *cmd_hdr;
3189 enum wmi_event_id id;
5e3dd157
KV		 3190
3191 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
3192 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
3193
3194 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
3195 return;
3196
d35a6c18 3197 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5e3dd157
KV		 3198
3199 switch (id) {
3200 case WMI_MGMT_RX_EVENTID:
3201 ath10k_wmi_event_mgmt_rx(ar, skb);
3202 /* mgmt_rx() owns the skb now! */
3203 return;
3204 case WMI_SCAN_EVENTID:
3205 ath10k_wmi_event_scan(ar, skb);
3206 break;
3207 case WMI_CHAN_INFO_EVENTID:
3208 ath10k_wmi_event_chan_info(ar, skb);
3209 break;
3210 case WMI_ECHO_EVENTID:
3211 ath10k_wmi_event_echo(ar, skb);
3212 break;
3213 case WMI_DEBUG_MESG_EVENTID:
3214 ath10k_wmi_event_debug_mesg(ar, skb);
3215 break;
3216 case WMI_UPDATE_STATS_EVENTID:
3217 ath10k_wmi_event_update_stats(ar, skb);
3218 break;
3219 case WMI_VDEV_START_RESP_EVENTID:
3220 ath10k_wmi_event_vdev_start_resp(ar, skb);
3221 break;
3222 case WMI_VDEV_STOPPED_EVENTID:
3223 ath10k_wmi_event_vdev_stopped(ar, skb);
3224 break;
3225 case WMI_PEER_STA_KICKOUT_EVENTID:
3226 ath10k_wmi_event_peer_sta_kickout(ar, skb);
3227 break;
3228 case WMI_HOST_SWBA_EVENTID:
3229 ath10k_wmi_event_host_swba(ar, skb);
3230 break;
3231 case WMI_TBTTOFFSET_UPDATE_EVENTID:
3232 ath10k_wmi_event_tbttoffset_update(ar, skb);
3233 break;
3234 case WMI_PHYERR_EVENTID:
3235 ath10k_wmi_event_phyerr(ar, skb);
3236 break;
3237 case WMI_ROAM_EVENTID:
3238 ath10k_wmi_event_roam(ar, skb);
3239 break;
3240 case WMI_PROFILE_MATCH:
3241 ath10k_wmi_event_profile_match(ar, skb);
3242 break;
3243 case WMI_DEBUG_PRINT_EVENTID:
3244 ath10k_wmi_event_debug_print(ar, skb);
3245 break;
3246 case WMI_PDEV_QVIT_EVENTID:
3247 ath10k_wmi_event_pdev_qvit(ar, skb);
3248 break;
3249 case WMI_WLAN_PROFILE_DATA_EVENTID:
3250 ath10k_wmi_event_wlan_profile_data(ar, skb);
3251 break;
3252 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
3253 ath10k_wmi_event_rtt_measurement_report(ar, skb);
3254 break;
3255 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
3256 ath10k_wmi_event_tsf_measurement_report(ar, skb);
3257 break;
3258 case WMI_RTT_ERROR_REPORT_EVENTID:
3259 ath10k_wmi_event_rtt_error_report(ar, skb);
3260 break;
3261 case WMI_WOW_WAKEUP_HOST_EVENTID:
3262 ath10k_wmi_event_wow_wakeup_host(ar, skb);
3263 break;
3264 case WMI_DCS_INTERFERENCE_EVENTID:
3265 ath10k_wmi_event_dcs_interference(ar, skb);
3266 break;
3267 case WMI_PDEV_TPC_CONFIG_EVENTID:
3268 ath10k_wmi_event_pdev_tpc_config(ar, skb);
3269 break;
3270 case WMI_PDEV_FTM_INTG_EVENTID:
3271 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
3272 break;
3273 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
3274 ath10k_wmi_event_gtk_offload_status(ar, skb);
3275 break;
3276 case WMI_GTK_REKEY_FAIL_EVENTID:
3277 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
3278 break;
3279 case WMI_TX_DELBA_COMPLETE_EVENTID:
3280 ath10k_wmi_event_delba_complete(ar, skb);
3281 break;
3282 case WMI_TX_ADDBA_COMPLETE_EVENTID:
3283 ath10k_wmi_event_addba_complete(ar, skb);
3284 break;
3285 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
3286 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
3287 break;
3288 case WMI_SERVICE_READY_EVENTID:
b34d2b3d 3289 ath10k_wmi_event_service_ready(ar, skb);
5e3dd157
KV		 3290 break;
3291 case WMI_READY_EVENTID:
b34d2b3d 3292 ath10k_wmi_event_ready(ar, skb);
5e3dd157
KV		 3293 break;
3294 default:
7aa7a72a 3295 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5e3dd157
KV		 3296 break;
3297 }
3298
3299 dev_kfree_skb(skb);
3300}
3301
d7579d12 3302static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
8a6618b0
BM		 3303{
3304 struct wmi_cmd_hdr *cmd_hdr;
3305 enum wmi_10x_event_id id;
43d2a30f 3306 bool consumed;
8a6618b0
BM		 3307
3308 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
3309 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
3310
3311 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
3312 return;
3313
d35a6c18 3314 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
8a6618b0 3315
43d2a30f
KV		 3316 consumed = ath10k_tm_event_wmi(ar, id, skb);
3317
3318 /* Ready event must be handled normally also in UTF mode so that we
3319 * know the UTF firmware has booted, others we are just bypass WMI
3320 * events to testmode.
3321 */
3322 if (consumed && id != WMI_10X_READY_EVENTID) {
3323 ath10k_dbg(ar, ATH10K_DBG_WMI,
3324 "wmi testmode consumed 0x%x\n", id);
3325 goto out;
3326 }
3327
8a6618b0
BM		 3328 switch (id) {
3329 case WMI_10X_MGMT_RX_EVENTID:
3330 ath10k_wmi_event_mgmt_rx(ar, skb);
3331 /* mgmt_rx() owns the skb now! */
3332 return;
3333 case WMI_10X_SCAN_EVENTID:
3334 ath10k_wmi_event_scan(ar, skb);
3335 break;
3336 case WMI_10X_CHAN_INFO_EVENTID:
3337 ath10k_wmi_event_chan_info(ar, skb);
3338 break;
3339 case WMI_10X_ECHO_EVENTID:
3340 ath10k_wmi_event_echo(ar, skb);
3341 break;
3342 case WMI_10X_DEBUG_MESG_EVENTID:
3343 ath10k_wmi_event_debug_mesg(ar, skb);
3344 break;
3345 case WMI_10X_UPDATE_STATS_EVENTID:
3346 ath10k_wmi_event_update_stats(ar, skb);
3347 break;
3348 case WMI_10X_VDEV_START_RESP_EVENTID:
3349 ath10k_wmi_event_vdev_start_resp(ar, skb);
3350 break;
3351 case WMI_10X_VDEV_STOPPED_EVENTID:
3352 ath10k_wmi_event_vdev_stopped(ar, skb);
3353 break;
3354 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
3355 ath10k_wmi_event_peer_sta_kickout(ar, skb);
3356 break;
3357 case WMI_10X_HOST_SWBA_EVENTID:
3358 ath10k_wmi_event_host_swba(ar, skb);
3359 break;
3360 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
3361 ath10k_wmi_event_tbttoffset_update(ar, skb);
3362 break;
3363 case WMI_10X_PHYERR_EVENTID:
3364 ath10k_wmi_event_phyerr(ar, skb);
3365 break;
3366 case WMI_10X_ROAM_EVENTID:
3367 ath10k_wmi_event_roam(ar, skb);
3368 break;
3369 case WMI_10X_PROFILE_MATCH:
3370 ath10k_wmi_event_profile_match(ar, skb);
3371 break;
3372 case WMI_10X_DEBUG_PRINT_EVENTID:
3373 ath10k_wmi_event_debug_print(ar, skb);
3374 break;
3375 case WMI_10X_PDEV_QVIT_EVENTID:
3376 ath10k_wmi_event_pdev_qvit(ar, skb);
3377 break;
3378 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
3379 ath10k_wmi_event_wlan_profile_data(ar, skb);
3380 break;
3381 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
3382 ath10k_wmi_event_rtt_measurement_report(ar, skb);
3383 break;
3384 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
3385 ath10k_wmi_event_tsf_measurement_report(ar, skb);
3386 break;
3387 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
3388 ath10k_wmi_event_rtt_error_report(ar, skb);
3389 break;
3390 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
3391 ath10k_wmi_event_wow_wakeup_host(ar, skb);
3392 break;
3393 case WMI_10X_DCS_INTERFERENCE_EVENTID:
3394 ath10k_wmi_event_dcs_interference(ar, skb);
3395 break;
3396 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
3397 ath10k_wmi_event_pdev_tpc_config(ar, skb);
3398 break;
3399 case WMI_10X_INST_RSSI_STATS_EVENTID:
3400 ath10k_wmi_event_inst_rssi_stats(ar, skb);
3401 break;
3402 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
3403 ath10k_wmi_event_vdev_standby_req(ar, skb);
3404 break;
3405 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
3406 ath10k_wmi_event_vdev_resume_req(ar, skb);
3407 break;
3408 case WMI_10X_SERVICE_READY_EVENTID:
b34d2b3d 3409 ath10k_wmi_event_service_ready(ar, skb);
8a6618b0
BM		 3410 break;
3411 case WMI_10X_READY_EVENTID:
b34d2b3d 3412 ath10k_wmi_event_ready(ar, skb);
8a6618b0 3413 break;
43d2a30f
KV		 3414 case WMI_10X_PDEV_UTF_EVENTID:
3415 /* ignore utf events */
3416 break;
8a6618b0 3417 default:
7aa7a72a 3418 ath10k_warn(ar, "Unknown eventid: %d\n", id);
8a6618b0
BM		 3419 break;
3420 }
3421
43d2a30f 3422out:
8a6618b0
BM		 3423 dev_kfree_skb(skb);
3424}
3425
d7579d12 3426static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
24c88f78
MK		 3427{
3428 struct wmi_cmd_hdr *cmd_hdr;
3429 enum wmi_10_2_event_id id;
3430
3431 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
3432 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
3433
3434 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
3435 return;
3436
d35a6c18 3437 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
24c88f78
MK		 3438
3439 switch (id) {
3440 case WMI_10_2_MGMT_RX_EVENTID:
3441 ath10k_wmi_event_mgmt_rx(ar, skb);
3442 /* mgmt_rx() owns the skb now! */
3443 return;
3444 case WMI_10_2_SCAN_EVENTID:
3445 ath10k_wmi_event_scan(ar, skb);
3446 break;
3447 case WMI_10_2_CHAN_INFO_EVENTID:
3448 ath10k_wmi_event_chan_info(ar, skb);
3449 break;
3450 case WMI_10_2_ECHO_EVENTID:
3451 ath10k_wmi_event_echo(ar, skb);
3452 break;
3453 case WMI_10_2_DEBUG_MESG_EVENTID:
3454 ath10k_wmi_event_debug_mesg(ar, skb);
3455 break;
3456 case WMI_10_2_UPDATE_STATS_EVENTID:
3457 ath10k_wmi_event_update_stats(ar, skb);
3458 break;
3459 case WMI_10_2_VDEV_START_RESP_EVENTID:
3460 ath10k_wmi_event_vdev_start_resp(ar, skb);
3461 break;
3462 case WMI_10_2_VDEV_STOPPED_EVENTID:
3463 ath10k_wmi_event_vdev_stopped(ar, skb);
3464 break;
3465 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
3466 ath10k_wmi_event_peer_sta_kickout(ar, skb);
3467 break;
3468 case WMI_10_2_HOST_SWBA_EVENTID:
3469 ath10k_wmi_event_host_swba(ar, skb);
3470 break;
3471 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
3472 ath10k_wmi_event_tbttoffset_update(ar, skb);
3473 break;
3474 case WMI_10_2_PHYERR_EVENTID:
3475 ath10k_wmi_event_phyerr(ar, skb);
3476 break;
3477 case WMI_10_2_ROAM_EVENTID:
3478 ath10k_wmi_event_roam(ar, skb);
3479 break;
3480 case WMI_10_2_PROFILE_MATCH:
3481 ath10k_wmi_event_profile_match(ar, skb);
3482 break;
3483 case WMI_10_2_DEBUG_PRINT_EVENTID:
3484 ath10k_wmi_event_debug_print(ar, skb);
3485 break;
3486 case WMI_10_2_PDEV_QVIT_EVENTID:
3487 ath10k_wmi_event_pdev_qvit(ar, skb);
3488 break;
3489 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
3490 ath10k_wmi_event_wlan_profile_data(ar, skb);
3491 break;
3492 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
3493 ath10k_wmi_event_rtt_measurement_report(ar, skb);
3494 break;
3495 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
3496 ath10k_wmi_event_tsf_measurement_report(ar, skb);
3497 break;
3498 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
3499 ath10k_wmi_event_rtt_error_report(ar, skb);
3500 break;
3501 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
3502 ath10k_wmi_event_wow_wakeup_host(ar, skb);
3503 break;
3504 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
3505 ath10k_wmi_event_dcs_interference(ar, skb);
3506 break;
3507 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
3508 ath10k_wmi_event_pdev_tpc_config(ar, skb);
3509 break;
3510 case WMI_10_2_INST_RSSI_STATS_EVENTID:
3511 ath10k_wmi_event_inst_rssi_stats(ar, skb);
3512 break;
3513 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
3514 ath10k_wmi_event_vdev_standby_req(ar, skb);
3515 break;
3516 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
3517 ath10k_wmi_event_vdev_resume_req(ar, skb);
3518 break;
3519 case WMI_10_2_SERVICE_READY_EVENTID:
b34d2b3d 3520 ath10k_wmi_event_service_ready(ar, skb);
24c88f78
MK		 3521 break;
3522 case WMI_10_2_READY_EVENTID:
b34d2b3d 3523 ath10k_wmi_event_ready(ar, skb);
24c88f78 3524 break;
a57a6a27
RM		 3525 case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
3526 ath10k_wmi_event_temperature(ar, skb);
3527 break;
24c88f78
MK		 3528 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
3529 case WMI_10_2_GPIO_INPUT_EVENTID:
3530 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
3531 case WMI_10_2_GENERIC_BUFFER_EVENTID:
3532 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
3533 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
3534 case WMI_10_2_WDS_PEER_EVENTID:
7aa7a72a 3535 ath10k_dbg(ar, ATH10K_DBG_WMI,
24c88f78
MK		 3536 "received event id %d not implemented\n", id);
3537 break;
3538 default:
7aa7a72a 3539 ath10k_warn(ar, "Unknown eventid: %d\n", id);
24c88f78
MK		 3540 break;
3541 }
3542
3543 dev_kfree_skb(skb);
3544}
8a6618b0 3545
ce42870e
BM		 3546static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
3547{
d7579d12
MK		 3548 int ret;
3549
3550 ret = ath10k_wmi_rx(ar, skb);
3551 if (ret)
3552 ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
ce42870e
BM		 3553}
3554
95bf21f9 3555int ath10k_wmi_connect(struct ath10k *ar)
5e3dd157
KV		 3556{
3557 int status;
3558 struct ath10k_htc_svc_conn_req conn_req;
3559 struct ath10k_htc_svc_conn_resp conn_resp;
3560
3561 memset(&conn_req, 0, sizeof(conn_req));
3562 memset(&conn_resp, 0, sizeof(conn_resp));
3563
3564 /* these fields are the same for all service endpoints */
3565 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
3566 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
be8b3943 3567 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
5e3dd157
KV		 3568
3569 /* connect to control service */
3570 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
3571
cd003fad 3572 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
5e3dd157 3573 if (status) {
7aa7a72a 3574 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
5e3dd157
KV		 3575 status);
3576 return status;
3577 }
3578
3579 ar->wmi.eid = conn_resp.eid;
3580 return 0;
3581}
3582
d7579d12
MK		 3583static struct sk_buff *
3584ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
3585 u16 ctl2g, u16 ctl5g,
3586 enum wmi_dfs_region dfs_reg)
5e3dd157
KV		 3587{
3588 struct wmi_pdev_set_regdomain_cmd *cmd;
3589 struct sk_buff *skb;
3590
7aa7a72a 3591 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 3592 if (!skb)
d7579d12 3593 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 3594
3595 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
3596 cmd->reg_domain = __cpu_to_le32(rd);
3597 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
3598 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
3599 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
3600 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
3601
7aa7a72a 3602 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 3603 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
3604 rd, rd2g, rd5g, ctl2g, ctl5g);
d7579d12 3605 return skb;
5e3dd157
KV		 3606}
3607
d7579d12
MK		 3608static struct sk_buff *
3609ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
3610 rd5g, u16 ctl2g, u16 ctl5g,
3611 enum wmi_dfs_region dfs_reg)
821af6ae
MP		 3612{
3613 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
3614 struct sk_buff *skb;
3615
7aa7a72a 3616 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
821af6ae 3617 if (!skb)
d7579d12 3618 return ERR_PTR(-ENOMEM);
821af6ae
MP		 3619
3620 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
3621 cmd->reg_domain = __cpu_to_le32(rd);
3622 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
3623 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
3624 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
3625 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
3626 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
3627
7aa7a72a 3628 ath10k_dbg(ar, ATH10K_DBG_WMI,
821af6ae
MP		 3629 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
3630 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
d7579d12 3631 return skb;
821af6ae
MP		 3632}
3633
d7579d12
MK		 3634static struct sk_buff *
3635ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
5e3dd157
KV		 3636{
3637 struct wmi_pdev_suspend_cmd *cmd;
3638 struct sk_buff *skb;
3639
7aa7a72a 3640 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 3641 if (!skb)
d7579d12 3642 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 3643
3644 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
00f5482b 3645 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
5e3dd157 3646
d7579d12 3647 return skb;
5e3dd157
KV		 3648}
3649
d7579d12
MK		 3650static struct sk_buff *
3651ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
5e3dd157
KV		 3652{
3653 struct sk_buff *skb;
3654
7aa7a72a 3655 skb = ath10k_wmi_alloc_skb(ar, 0);
d7579d12
MK		 3656 if (!skb)
3657 return ERR_PTR(-ENOMEM);
5e3dd157 3658
d7579d12 3659 return skb;
5e3dd157
KV		 3660}
3661
d7579d12
MK		 3662static struct sk_buff *
3663ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
5e3dd157
KV		 3664{
3665 struct wmi_pdev_set_param_cmd *cmd;
3666 struct sk_buff *skb;
3667
226a339b 3668 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
7aa7a72a
MK		 3669 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
3670 id);
d7579d12 3671 return ERR_PTR(-EOPNOTSUPP);
226a339b
BM		 3672 }
3673
7aa7a72a 3674 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 3675 if (!skb)
d7579d12 3676 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 3677
3678 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
3679 cmd->param_id = __cpu_to_le32(id);
3680 cmd->param_value = __cpu_to_le32(value);
3681
7aa7a72a 3682 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
5e3dd157 3683 id, value);
d7579d12 3684 return skb;
5e3dd157
KV		 3685}
3686
0226d602
MK		 3687void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
3688 struct wmi_host_mem_chunks *chunks)
cf9fca8f
MK		 3689{
3690 struct host_memory_chunk *chunk;
3691 int i;
3692
3693 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
3694
3695 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3696 chunk = &chunks->items[i];
3697 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3698 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3699 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3700
3701 ath10k_dbg(ar, ATH10K_DBG_WMI,
3702 "wmi chunk %d len %d requested, addr 0x%llx\n",
3703 i,
3704 ar->wmi.mem_chunks[i].len,
3705 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
3706 }
3707}
3708
d7579d12 3709static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
5e3dd157
KV		 3710{
3711 struct wmi_init_cmd *cmd;
3712 struct sk_buff *buf;
3713 struct wmi_resource_config config = {};
b3effe61 3714 u32 len, val;
5e3dd157
KV		 3715
3716 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
cfd1061e 3717 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
5e3dd157
KV		 3718 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
3719
3720 config.num_offload_reorder_bufs =
3721 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
3722
3723 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
3724 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
3725 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
3726 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
3727 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
3728 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
3729 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
3730 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
3731 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
3732 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
3733
3734 config.scan_max_pending_reqs =
3735 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
3736
3737 config.bmiss_offload_max_vdev =
3738 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
3739
3740 config.roam_offload_max_vdev =
3741 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
3742
3743 config.roam_offload_max_ap_profiles =
3744 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
3745
3746 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
3747 config.num_mcast_table_elems =
3748 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
3749
3750 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
3751 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
3752 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
3753 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
3754 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
3755
3756 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3757 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3758
3759 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
3760
3761 config.gtk_offload_max_vdev =
3762 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
3763
3764 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
3765 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
3766
b3effe61
BM		 3767 len = sizeof(*cmd) +
3768 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3769
7aa7a72a 3770 buf = ath10k_wmi_alloc_skb(ar, len);
5e3dd157 3771 if (!buf)
d7579d12 3772 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 3773
3774 cmd = (struct wmi_init_cmd *)buf->data;
b3effe61 3775
5e3dd157 3776 memcpy(&cmd->resource_config, &config, sizeof(config));
cf9fca8f 3777 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
5e3dd157 3778
7aa7a72a 3779 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
d7579d12 3780 return buf;
5e3dd157
KV		 3781}
3782
d7579d12 3783static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
12b2b9e3
BM		 3784{
3785 struct wmi_init_cmd_10x *cmd;
3786 struct sk_buff *buf;
3787 struct wmi_resource_config_10x config = {};
3788 u32 len, val;
12b2b9e3 3789
ec6a73f0
BM		 3790 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3791 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3792 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3793 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3794 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3795 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3796 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3797 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3798 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3799 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3800 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3801 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
12b2b9e3
BM		 3802
3803 config.scan_max_pending_reqs =
ec6a73f0 3804 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
12b2b9e3
BM		 3805
3806 config.bmiss_offload_max_vdev =
ec6a73f0 3807 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 3808
3809 config.roam_offload_max_vdev =
ec6a73f0 3810 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
12b2b9e3
BM		 3811
3812 config.roam_offload_max_ap_profiles =
ec6a73f0 3813 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
12b2b9e3 3814
ec6a73f0 3815 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
12b2b9e3 3816 config.num_mcast_table_elems =
ec6a73f0 3817 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
12b2b9e3 3818
ec6a73f0
BM		 3819 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3820 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3821 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3822 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
3823 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
12b2b9e3 3824
ec6a73f0 3825 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
12b2b9e3
BM		 3826 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3827
ec6a73f0 3828 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
12b2b9e3 3829
ec6a73f0
BM		 3830 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3831 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
12b2b9e3
BM		 3832
3833 len = sizeof(*cmd) +
3834 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3835
7aa7a72a 3836 buf = ath10k_wmi_alloc_skb(ar, len);
12b2b9e3 3837 if (!buf)
d7579d12 3838 return ERR_PTR(-ENOMEM);
12b2b9e3
BM		 3839
3840 cmd = (struct wmi_init_cmd_10x *)buf->data;
3841
12b2b9e3 3842 memcpy(&cmd->resource_config, &config, sizeof(config));
cf9fca8f 3843 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
12b2b9e3 3844
7aa7a72a 3845 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
d7579d12 3846 return buf;
12b2b9e3
BM		 3847}
3848
d7579d12 3849static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
24c88f78
MK		 3850{
3851 struct wmi_init_cmd_10_2 *cmd;
3852 struct sk_buff *buf;
3853 struct wmi_resource_config_10x config = {};
b6c8e287 3854 u32 len, val, features;
24c88f78
MK		 3855
3856 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3857 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3858 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3859 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3860 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3861 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3862 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3863 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3864 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3865 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3866 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3867 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
3868
3869 config.scan_max_pending_reqs =
3870 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
3871
3872 config.bmiss_offload_max_vdev =
3873 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
3874
3875 config.roam_offload_max_vdev =
3876 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
3877
3878 config.roam_offload_max_ap_profiles =
3879 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
3880
3881 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
3882 config.num_mcast_table_elems =
3883 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
3884
3885 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3886 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3887 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
f6603ff2 3888 config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
24c88f78
MK		 3889 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
3890
3891 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3892 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3893
3894 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
3895
3896 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3897 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
3898
3899 len = sizeof(*cmd) +
3900 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3901
7aa7a72a 3902 buf = ath10k_wmi_alloc_skb(ar, len);
24c88f78 3903 if (!buf)
d7579d12 3904 return ERR_PTR(-ENOMEM);
24c88f78
MK		 3905
3906 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
3907
b6c8e287
SM		 3908 features = WMI_10_2_RX_BATCH_MODE;
3909 cmd->resource_config.feature_mask = __cpu_to_le32(features);
3910
24c88f78 3911 memcpy(&cmd->resource_config.common, &config, sizeof(config));
cf9fca8f 3912 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
24c88f78 3913
7aa7a72a 3914 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
d7579d12 3915 return buf;
5e3dd157
KV		 3916}
3917
0226d602 3918int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
5e3dd157 3919{
a6aa5da3
MK		 3920 if (arg->ie_len && !arg->ie)
3921 return -EINVAL;
3922 if (arg->n_channels && !arg->channels)
3923 return -EINVAL;
3924 if (arg->n_ssids && !arg->ssids)
3925 return -EINVAL;
3926 if (arg->n_bssids && !arg->bssids)
3927 return -EINVAL;
5e3dd157 3928
a6aa5da3
MK		 3929 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
3930 return -EINVAL;
3931 if (arg->n_channels > ARRAY_SIZE(arg->channels))
3932 return -EINVAL;
3933 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
3934 return -EINVAL;
3935 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
3936 return -EINVAL;
5e3dd157 3937
a6aa5da3
MK		 3938 return 0;
3939}
5e3dd157 3940
a6aa5da3
MK		 3941static size_t
3942ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
3943{
3944 int len = 0;
3945
3946 if (arg->ie_len) {
5e3dd157
KV		 3947 len += sizeof(struct wmi_ie_data);
3948 len += roundup(arg->ie_len, 4);
3949 }
3950
3951 if (arg->n_channels) {
5e3dd157
KV		 3952 len += sizeof(struct wmi_chan_list);
3953 len += sizeof(__le32) * arg->n_channels;
3954 }
3955
3956 if (arg->n_ssids) {
5e3dd157
KV		 3957 len += sizeof(struct wmi_ssid_list);
3958 len += sizeof(struct wmi_ssid) * arg->n_ssids;
3959 }
3960
3961 if (arg->n_bssids) {
5e3dd157
KV		 3962 len += sizeof(struct wmi_bssid_list);
3963 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
3964 }
3965
3966 return len;
3967}
3968
0226d602
MK		 3969void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
3970 const struct wmi_start_scan_arg *arg)
5e3dd157 3971{
5e3dd157
KV		 3972 u32 scan_id;
3973 u32 scan_req_id;
5e3dd157
KV		 3974
3975 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
3976 scan_id |= arg->scan_id;
3977
3978 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
3979 scan_req_id |= arg->scan_req_id;
3980
a6aa5da3
MK		 3981 cmn->scan_id = __cpu_to_le32(scan_id);
3982 cmn->scan_req_id = __cpu_to_le32(scan_req_id);
3983 cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
3984 cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
3985 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
3986 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
3987 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
3988 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
3989 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
3990 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
3991 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
3992 cmn->idle_time = __cpu_to_le32(arg->idle_time);
3993 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
3994 cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
3995 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
3996}
3997
3998static void
3999ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
4000 const struct wmi_start_scan_arg *arg)
4001{
4002 struct wmi_ie_data *ie;
4003 struct wmi_chan_list *channels;
4004 struct wmi_ssid_list *ssids;
4005 struct wmi_bssid_list *bssids;
4006 void *ptr = tlvs->tlvs;
4007 int i;
5e3dd157
KV		 4008
4009 if (arg->n_channels) {
a6aa5da3 4010 channels = ptr;
5e3dd157
KV		 4011 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
4012 channels->num_chan = __cpu_to_le32(arg->n_channels);
4013
4014 for (i = 0; i < arg->n_channels; i++)
24c88f78
MK		 4015 channels->channel_list[i].freq =
4016 __cpu_to_le16(arg->channels[i]);
5e3dd157 4017
a6aa5da3
MK		 4018 ptr += sizeof(*channels);
4019 ptr += sizeof(__le32) * arg->n_channels;
5e3dd157
KV		 4020 }
4021
4022 if (arg->n_ssids) {
a6aa5da3 4023 ssids = ptr;
5e3dd157
KV		 4024 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
4025 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
4026
4027 for (i = 0; i < arg->n_ssids; i++) {
4028 ssids->ssids[i].ssid_len =
4029 __cpu_to_le32(arg->ssids[i].len);
4030 memcpy(&ssids->ssids[i].ssid,
4031 arg->ssids[i].ssid,
4032 arg->ssids[i].len);
4033 }
4034
a6aa5da3
MK		 4035 ptr += sizeof(*ssids);
4036 ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
5e3dd157
KV		 4037 }
4038
4039 if (arg->n_bssids) {
a6aa5da3 4040 bssids = ptr;
5e3dd157
KV		 4041 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
4042 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
4043
4044 for (i = 0; i < arg->n_bssids; i++)
4045 memcpy(&bssids->bssid_list[i],
4046 arg->bssids[i].bssid,
4047 ETH_ALEN);
4048
a6aa5da3
MK		 4049 ptr += sizeof(*bssids);
4050 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
5e3dd157
KV		 4051 }
4052
4053 if (arg->ie_len) {
a6aa5da3 4054 ie = ptr;
5e3dd157
KV		 4055 ie->tag = __cpu_to_le32(WMI_IE_TAG);
4056 ie->ie_len = __cpu_to_le32(arg->ie_len);
4057 memcpy(ie->ie_data, arg->ie, arg->ie_len);
4058
a6aa5da3
MK		 4059 ptr += sizeof(*ie);
4060 ptr += roundup(arg->ie_len, 4);
5e3dd157 4061 }
a6aa5da3 4062}
5e3dd157 4063
d7579d12
MK		 4064static struct sk_buff *
4065ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
4066 const struct wmi_start_scan_arg *arg)
a6aa5da3 4067{
d7579d12 4068 struct wmi_start_scan_cmd *cmd;
a6aa5da3
MK		 4069 struct sk_buff *skb;
4070 size_t len;
4071 int ret;
4072
4073 ret = ath10k_wmi_start_scan_verify(arg);
4074 if (ret)
d7579d12 4075 return ERR_PTR(ret);
a6aa5da3 4076
d7579d12 4077 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
a6aa5da3
MK		 4078 skb = ath10k_wmi_alloc_skb(ar, len);
4079 if (!skb)
d7579d12 4080 return ERR_PTR(-ENOMEM);
a6aa5da3 4081
d7579d12 4082 cmd = (struct wmi_start_scan_cmd *)skb->data;
a6aa5da3 4083
d7579d12
MK		 4084 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
4085 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
a6aa5da3 4086
d7579d12 4087 cmd->burst_duration_ms = __cpu_to_le32(0);
5e3dd157 4088
7aa7a72a 4089 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
d7579d12
MK		 4090 return skb;
4091}
4092
4093static struct sk_buff *
4094ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
4095 const struct wmi_start_scan_arg *arg)
4096{
4097 struct wmi_10x_start_scan_cmd *cmd;
4098 struct sk_buff *skb;
4099 size_t len;
4100 int ret;
4101
4102 ret = ath10k_wmi_start_scan_verify(arg);
4103 if (ret)
4104 return ERR_PTR(ret);
4105
4106 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
4107 skb = ath10k_wmi_alloc_skb(ar, len);
4108 if (!skb)
4109 return ERR_PTR(-ENOMEM);
4110
4111 cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
4112
4113 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
4114 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
4115
4116 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
4117 return skb;
5e3dd157
KV		 4118}
4119
4120void ath10k_wmi_start_scan_init(struct ath10k *ar,
4121 struct wmi_start_scan_arg *arg)
4122{
4123 /* setup commonly used values */
4124 arg->scan_req_id = 1;
4125 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
4126 arg->dwell_time_active = 50;
4127 arg->dwell_time_passive = 150;
4128 arg->min_rest_time = 50;
4129 arg->max_rest_time = 500;
4130 arg->repeat_probe_time = 0;
4131 arg->probe_spacing_time = 0;
4132 arg->idle_time = 0;
c322892f 4133 arg->max_scan_time = 20000;
5e3dd157
KV		 4134 arg->probe_delay = 5;
4135 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
4136 | WMI_SCAN_EVENT_COMPLETED
4137 | WMI_SCAN_EVENT_BSS_CHANNEL
4138 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
4139 | WMI_SCAN_EVENT_DEQUEUED;
4140 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
4141 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
4142 arg->n_bssids = 1;
4143 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
4144}
4145
d7579d12
MK		 4146static struct sk_buff *
4147ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
4148 const struct wmi_stop_scan_arg *arg)
5e3dd157
KV		 4149{
4150 struct wmi_stop_scan_cmd *cmd;
4151 struct sk_buff *skb;
4152 u32 scan_id;
4153 u32 req_id;
4154
4155 if (arg->req_id > 0xFFF)
d7579d12 4156 return ERR_PTR(-EINVAL);
5e3dd157 4157 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
d7579d12 4158 return ERR_PTR(-EINVAL);
5e3dd157 4159
7aa7a72a 4160 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4161 if (!skb)
d7579d12 4162 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4163
4164 scan_id = arg->u.scan_id;
4165 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
4166
4167 req_id = arg->req_id;
4168 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
4169
4170 cmd = (struct wmi_stop_scan_cmd *)skb->data;
4171 cmd->req_type = __cpu_to_le32(arg->req_type);
4172 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
4173 cmd->scan_id = __cpu_to_le32(scan_id);
4174 cmd->scan_req_id = __cpu_to_le32(req_id);
4175
7aa7a72a 4176 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4177 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
4178 arg->req_id, arg->req_type, arg->u.scan_id);
d7579d12 4179 return skb;
5e3dd157
KV		 4180}
4181
d7579d12
MK		 4182static struct sk_buff *
4183ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
4184 enum wmi_vdev_type type,
4185 enum wmi_vdev_subtype subtype,
4186 const u8 macaddr[ETH_ALEN])
5e3dd157
KV		 4187{
4188 struct wmi_vdev_create_cmd *cmd;
4189 struct sk_buff *skb;
4190
7aa7a72a 4191 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4192 if (!skb)
d7579d12 4193 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4194
4195 cmd = (struct wmi_vdev_create_cmd *)skb->data;
4196 cmd->vdev_id = __cpu_to_le32(vdev_id);
4197 cmd->vdev_type = __cpu_to_le32(type);
4198 cmd->vdev_subtype = __cpu_to_le32(subtype);
b25f32cb 4199 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
5e3dd157 4200
7aa7a72a 4201 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4202 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
4203 vdev_id, type, subtype, macaddr);
d7579d12 4204 return skb;
5e3dd157
KV		 4205}
4206
d7579d12
MK		 4207static struct sk_buff *
4208ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV		 4209{
4210 struct wmi_vdev_delete_cmd *cmd;
4211 struct sk_buff *skb;
4212
7aa7a72a 4213 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4214 if (!skb)
d7579d12 4215 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4216
4217 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
4218 cmd->vdev_id = __cpu_to_le32(vdev_id);
4219
7aa7a72a 4220 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157 4221 "WMI vdev delete id %d\n", vdev_id);
d7579d12 4222 return skb;
5e3dd157
KV		 4223}
4224
d7579d12
MK		 4225static struct sk_buff *
4226ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
4227 const struct wmi_vdev_start_request_arg *arg,
4228 bool restart)
5e3dd157
KV		 4229{
4230 struct wmi_vdev_start_request_cmd *cmd;
4231 struct sk_buff *skb;
4232 const char *cmdname;
4233 u32 flags = 0;
4234
5e3dd157 4235 if (WARN_ON(arg->ssid && arg->ssid_len == 0))
d7579d12 4236 return ERR_PTR(-EINVAL);
5e3dd157 4237 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
d7579d12 4238 return ERR_PTR(-EINVAL);
5e3dd157 4239 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
d7579d12 4240 return ERR_PTR(-EINVAL);
5e3dd157 4241
d7579d12 4242 if (restart)
5e3dd157
KV		 4243 cmdname = "restart";
4244 else
d7579d12 4245 cmdname = "start";
5e3dd157 4246
7aa7a72a 4247 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4248 if (!skb)
d7579d12 4249 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4250
4251 if (arg->hidden_ssid)
4252 flags |= WMI_VDEV_START_HIDDEN_SSID;
4253 if (arg->pmf_enabled)
4254 flags |= WMI_VDEV_START_PMF_ENABLED;
4255
4256 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
4257 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
4258 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
4259 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
4260 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
4261 cmd->flags = __cpu_to_le32(flags);
4262 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
4263 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
4264
4265 if (arg->ssid) {
4266 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
4267 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
4268 }
4269
2d66721c 4270 ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
5e3dd157 4271
7aa7a72a 4272 ath10k_dbg(ar, ATH10K_DBG_WMI,
8cc7f26c
KV		 4273 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
4274 cmdname, arg->vdev_id,
e8a50f8b
MP		 4275 flags, arg->channel.freq, arg->channel.mode,
4276 cmd->chan.flags, arg->channel.max_power);
5e3dd157 4277
d7579d12 4278 return skb;
5e3dd157
KV		 4279}
4280
d7579d12
MK		 4281static struct sk_buff *
4282ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV		 4283{
4284 struct wmi_vdev_stop_cmd *cmd;
4285 struct sk_buff *skb;
4286
7aa7a72a 4287 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4288 if (!skb)
d7579d12 4289 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4290
4291 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
4292 cmd->vdev_id = __cpu_to_le32(vdev_id);
4293
7aa7a72a 4294 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
d7579d12 4295 return skb;
5e3dd157
KV		 4296}
4297
d7579d12
MK		 4298static struct sk_buff *
4299ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
4300 const u8 *bssid)
5e3dd157
KV		 4301{
4302 struct wmi_vdev_up_cmd *cmd;
4303 struct sk_buff *skb;
4304
7aa7a72a 4305 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4306 if (!skb)
d7579d12 4307 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4308
4309 cmd = (struct wmi_vdev_up_cmd *)skb->data;
4310 cmd->vdev_id = __cpu_to_le32(vdev_id);
4311 cmd->vdev_assoc_id = __cpu_to_le32(aid);
b25f32cb 4312 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
5e3dd157 4313
7aa7a72a 4314 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4315 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
4316 vdev_id, aid, bssid);
d7579d12 4317 return skb;
5e3dd157
KV		 4318}
4319
d7579d12
MK		 4320static struct sk_buff *
4321ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
5e3dd157
KV		 4322{
4323 struct wmi_vdev_down_cmd *cmd;
4324 struct sk_buff *skb;
4325
7aa7a72a 4326 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4327 if (!skb)
d7579d12 4328 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4329
4330 cmd = (struct wmi_vdev_down_cmd *)skb->data;
4331 cmd->vdev_id = __cpu_to_le32(vdev_id);
4332
7aa7a72a 4333 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157 4334 "wmi mgmt vdev down id 0x%x\n", vdev_id);
d7579d12 4335 return skb;
5e3dd157
KV		 4336}
4337
d7579d12
MK		 4338static struct sk_buff *
4339ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
4340 u32 param_id, u32 param_value)
5e3dd157
KV		 4341{
4342 struct wmi_vdev_set_param_cmd *cmd;
4343 struct sk_buff *skb;
4344
6d1506e7 4345 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7aa7a72a 4346 ath10k_dbg(ar, ATH10K_DBG_WMI,
6d1506e7
BM		 4347 "vdev param %d not supported by firmware\n",
4348 param_id);
d7579d12 4349 return ERR_PTR(-EOPNOTSUPP);
6d1506e7
BM		 4350 }
4351
7aa7a72a 4352 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4353 if (!skb)
d7579d12 4354 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4355
4356 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
4357 cmd->vdev_id = __cpu_to_le32(vdev_id);
4358 cmd->param_id = __cpu_to_le32(param_id);
4359 cmd->param_value = __cpu_to_le32(param_value);
4360
7aa7a72a 4361 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4362 "wmi vdev id 0x%x set param %d value %d\n",
4363 vdev_id, param_id, param_value);
d7579d12 4364 return skb;
5e3dd157
KV		 4365}
4366
d7579d12
MK		 4367static struct sk_buff *
4368ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
4369 const struct wmi_vdev_install_key_arg *arg)
5e3dd157
KV		 4370{
4371 struct wmi_vdev_install_key_cmd *cmd;
4372 struct sk_buff *skb;
4373
4374 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
d7579d12 4375 return ERR_PTR(-EINVAL);
5e3dd157 4376 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
d7579d12 4377 return ERR_PTR(-EINVAL);
5e3dd157 4378
7aa7a72a 4379 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
5e3dd157 4380 if (!skb)
d7579d12 4381 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4382
4383 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
4384 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
4385 cmd->key_idx = __cpu_to_le32(arg->key_idx);
4386 cmd->key_flags = __cpu_to_le32(arg->key_flags);
4387 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
4388 cmd->key_len = __cpu_to_le32(arg->key_len);
4389 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
4390 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
4391
4392 if (arg->macaddr)
b25f32cb 4393 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
5e3dd157
KV		 4394 if (arg->key_data)
4395 memcpy(cmd->key_data, arg->key_data, arg->key_len);
4396
7aa7a72a 4397 ath10k_dbg(ar, ATH10K_DBG_WMI,
e0c508ab
MK		 4398 "wmi vdev install key idx %d cipher %d len %d\n",
4399 arg->key_idx, arg->key_cipher, arg->key_len);
d7579d12 4400 return skb;
5e3dd157
KV		 4401}
4402
d7579d12
MK		 4403static struct sk_buff *
4404ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
4405 const struct wmi_vdev_spectral_conf_arg *arg)
855aed12
SW		 4406{
4407 struct wmi_vdev_spectral_conf_cmd *cmd;
4408 struct sk_buff *skb;
855aed12 4409
7aa7a72a 4410 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12 4411 if (!skb)
d7579d12 4412 return ERR_PTR(-ENOMEM);
855aed12
SW		 4413
4414 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
4415 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
4416 cmd->scan_count = __cpu_to_le32(arg->scan_count);
4417 cmd->scan_period = __cpu_to_le32(arg->scan_period);
4418 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
4419 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
4420 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
4421 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
4422 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
4423 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
4424 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
4425 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
4426 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
4427 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
4428 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
4429 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
4430 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
4431 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
4432 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
4433 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
4434
d7579d12 4435 return skb;
855aed12
SW		 4436}
4437
d7579d12
MK		 4438static struct sk_buff *
4439ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
4440 u32 trigger, u32 enable)
855aed12
SW		 4441{
4442 struct wmi_vdev_spectral_enable_cmd *cmd;
4443 struct sk_buff *skb;
855aed12 4444
7aa7a72a 4445 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
855aed12 4446 if (!skb)
d7579d12 4447 return ERR_PTR(-ENOMEM);
855aed12
SW		 4448
4449 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
4450 cmd->vdev_id = __cpu_to_le32(vdev_id);
4451 cmd->trigger_cmd = __cpu_to_le32(trigger);
4452 cmd->enable_cmd = __cpu_to_le32(enable);
4453
d7579d12 4454 return skb;
855aed12
SW		 4455}
4456
d7579d12
MK		 4457static struct sk_buff *
4458ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
4459 const u8 peer_addr[ETH_ALEN])
5e3dd157
KV		 4460{
4461 struct wmi_peer_create_cmd *cmd;
4462 struct sk_buff *skb;
4463
7aa7a72a 4464 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4465 if (!skb)
d7579d12 4466 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4467
4468 cmd = (struct wmi_peer_create_cmd *)skb->data;
4469 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 4470 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 4471
7aa7a72a 4472 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4473 "wmi peer create vdev_id %d peer_addr %pM\n",
4474 vdev_id, peer_addr);
d7579d12 4475 return skb;
5e3dd157
KV		 4476}
4477
d7579d12
MK		 4478static struct sk_buff *
4479ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
4480 const u8 peer_addr[ETH_ALEN])
5e3dd157
KV		 4481{
4482 struct wmi_peer_delete_cmd *cmd;
4483 struct sk_buff *skb;
4484
7aa7a72a 4485 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4486 if (!skb)
d7579d12 4487 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4488
4489 cmd = (struct wmi_peer_delete_cmd *)skb->data;
4490 cmd->vdev_id = __cpu_to_le32(vdev_id);
b25f32cb 4491 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 4492
7aa7a72a 4493 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4494 "wmi peer delete vdev_id %d peer_addr %pM\n",
4495 vdev_id, peer_addr);
d7579d12 4496 return skb;
5e3dd157
KV		 4497}
4498
d7579d12
MK		 4499static struct sk_buff *
4500ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
4501 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
5e3dd157
KV		 4502{
4503 struct wmi_peer_flush_tids_cmd *cmd;
4504 struct sk_buff *skb;
4505
7aa7a72a 4506 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4507 if (!skb)
d7579d12 4508 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4509
4510 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
4511 cmd->vdev_id = __cpu_to_le32(vdev_id);
4512 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
b25f32cb 4513 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 4514
7aa7a72a 4515 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4516 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
4517 vdev_id, peer_addr, tid_bitmap);
d7579d12 4518 return skb;
5e3dd157
KV		 4519}
4520
d7579d12
MK		 4521static struct sk_buff *
4522ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
4523 const u8 *peer_addr,
4524 enum wmi_peer_param param_id,
4525 u32 param_value)
5e3dd157
KV		 4526{
4527 struct wmi_peer_set_param_cmd *cmd;
4528 struct sk_buff *skb;
4529
7aa7a72a 4530 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4531 if (!skb)
d7579d12 4532 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4533
4534 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
4535 cmd->vdev_id = __cpu_to_le32(vdev_id);
4536 cmd->param_id = __cpu_to_le32(param_id);
4537 cmd->param_value = __cpu_to_le32(param_value);
b25f32cb 4538 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
5e3dd157 4539
7aa7a72a 4540 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4541 "wmi vdev %d peer 0x%pM set param %d value %d\n",
4542 vdev_id, peer_addr, param_id, param_value);
d7579d12 4543 return skb;
5e3dd157
KV		 4544}
4545
d7579d12
MK		 4546static struct sk_buff *
4547ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
4548 enum wmi_sta_ps_mode psmode)
5e3dd157
KV		 4549{
4550 struct wmi_sta_powersave_mode_cmd *cmd;
4551 struct sk_buff *skb;
4552
7aa7a72a 4553 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4554 if (!skb)
d7579d12 4555 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4556
4557 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
4558 cmd->vdev_id = __cpu_to_le32(vdev_id);
4559 cmd->sta_ps_mode = __cpu_to_le32(psmode);
4560
7aa7a72a 4561 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4562 "wmi set powersave id 0x%x mode %d\n",
4563 vdev_id, psmode);
d7579d12 4564 return skb;
5e3dd157
KV		 4565}
4566
d7579d12
MK		 4567static struct sk_buff *
4568ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
4569 enum wmi_sta_powersave_param param_id,
4570 u32 value)
5e3dd157
KV		 4571{
4572 struct wmi_sta_powersave_param_cmd *cmd;
4573 struct sk_buff *skb;
4574
7aa7a72a 4575 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4576 if (!skb)
d7579d12 4577 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4578
4579 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
4580 cmd->vdev_id = __cpu_to_le32(vdev_id);
4581 cmd->param_id = __cpu_to_le32(param_id);
4582 cmd->param_value = __cpu_to_le32(value);
4583
7aa7a72a 4584 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4585 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
4586 vdev_id, param_id, value);
d7579d12 4587 return skb;
5e3dd157
KV		 4588}
4589
d7579d12
MK		 4590static struct sk_buff *
4591ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
4592 enum wmi_ap_ps_peer_param param_id, u32 value)
5e3dd157
KV		 4593{
4594 struct wmi_ap_ps_peer_cmd *cmd;
4595 struct sk_buff *skb;
4596
4597 if (!mac)
d7579d12 4598 return ERR_PTR(-EINVAL);
5e3dd157 4599
7aa7a72a 4600 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4601 if (!skb)
d7579d12 4602 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4603
4604 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
4605 cmd->vdev_id = __cpu_to_le32(vdev_id);
4606 cmd->param_id = __cpu_to_le32(param_id);
4607 cmd->param_value = __cpu_to_le32(value);
b25f32cb 4608 ether_addr_copy(cmd->peer_macaddr.addr, mac);
5e3dd157 4609
7aa7a72a 4610 ath10k_dbg(ar, ATH10K_DBG_WMI,
5e3dd157
KV		 4611 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
4612 vdev_id, param_id, value, mac);
d7579d12 4613 return skb;
5e3dd157
KV		 4614}
4615
d7579d12
MK		 4616static struct sk_buff *
4617ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
4618 const struct wmi_scan_chan_list_arg *arg)
5e3dd157
KV		 4619{
4620 struct wmi_scan_chan_list_cmd *cmd;
4621 struct sk_buff *skb;
4622 struct wmi_channel_arg *ch;
4623 struct wmi_channel *ci;
4624 int len;
4625 int i;
4626
4627 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
4628
7aa7a72a 4629 skb = ath10k_wmi_alloc_skb(ar, len);
5e3dd157 4630 if (!skb)
d7579d12 4631 return ERR_PTR(-EINVAL);
5e3dd157
KV		 4632
4633 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
4634 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
4635
4636 for (i = 0; i < arg->n_channels; i++) {
5e3dd157
KV		 4637 ch = &arg->channels[i];
4638 ci = &cmd->chan_info[i];
4639
2d66721c 4640 ath10k_wmi_put_wmi_channel(ci, ch);
5e3dd157
KV		 4641 }
4642
d7579d12 4643 return skb;
5e3dd157
KV		 4644}
4645
24c88f78
MK		 4646static void
4647ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
4648 const struct wmi_peer_assoc_complete_arg *arg)
5e3dd157 4649{
24c88f78 4650 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
5e3dd157 4651
5e3dd157
KV		 4652 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
4653 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
4654 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
4655 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
4656 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
4657 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
4658 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
4659 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
4660 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
4661 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
4662 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
4663 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
4664 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
4665
b25f32cb 4666 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
5e3dd157
KV		 4667
4668 cmd->peer_legacy_rates.num_rates =
4669 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
4670 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
4671 arg->peer_legacy_rates.num_rates);
4672
4673 cmd->peer_ht_rates.num_rates =
4674 __cpu_to_le32(arg->peer_ht_rates.num_rates);
4675 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
4676 arg->peer_ht_rates.num_rates);
4677
4678 cmd->peer_vht_rates.rx_max_rate =
4679 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
4680 cmd->peer_vht_rates.rx_mcs_set =
4681 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
4682 cmd->peer_vht_rates.tx_max_rate =
4683 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
4684 cmd->peer_vht_rates.tx_mcs_set =
4685 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
24c88f78
MK		 4686}
4687
4688static void
4689ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
4690 const struct wmi_peer_assoc_complete_arg *arg)
4691{
4692 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
4693
4694 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4695 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
4696}
4697
4698static void
4699ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
4700 const struct wmi_peer_assoc_complete_arg *arg)
4701{
4702 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4703}
4704
4705static void
4706ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
4707 const struct wmi_peer_assoc_complete_arg *arg)
4708{
4709 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
4710 int max_mcs, max_nss;
4711 u32 info0;
4712
4713 /* TODO: Is using max values okay with firmware? */
4714 max_mcs = 0xf;
4715 max_nss = 0xf;
4716
4717 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
4718 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
4719
4720 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4721 cmd->info0 = __cpu_to_le32(info0);
4722}
4723
d7579d12
MK		 4724static int
4725ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
24c88f78 4726{
24c88f78
MK		 4727 if (arg->peer_mpdu_density > 16)
4728 return -EINVAL;
4729 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
4730 return -EINVAL;
4731 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
4732 return -EINVAL;
4733
d7579d12
MK		 4734 return 0;
4735}
4736
4737static struct sk_buff *
4738ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
4739 const struct wmi_peer_assoc_complete_arg *arg)
4740{
4741 size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
4742 struct sk_buff *skb;
4743 int ret;
4744
4745 ret = ath10k_wmi_peer_assoc_check_arg(arg);
4746 if (ret)
4747 return ERR_PTR(ret);
24c88f78 4748
7aa7a72a 4749 skb = ath10k_wmi_alloc_skb(ar, len);
24c88f78 4750 if (!skb)
d7579d12 4751 return ERR_PTR(-ENOMEM);
24c88f78 4752
d7579d12
MK		 4753 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
4754
4755 ath10k_dbg(ar, ATH10K_DBG_WMI,
4756 "wmi peer assoc vdev %d addr %pM (%s)\n",
4757 arg->vdev_id, arg->addr,
4758 arg->peer_reassoc ? "reassociate" : "new");
4759 return skb;
4760}
4761
4762static struct sk_buff *
4763ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
4764 const struct wmi_peer_assoc_complete_arg *arg)
4765{
4766 size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
4767 struct sk_buff *skb;
4768 int ret;
4769
4770 ret = ath10k_wmi_peer_assoc_check_arg(arg);
4771 if (ret)
4772 return ERR_PTR(ret);
4773
4774 skb = ath10k_wmi_alloc_skb(ar, len);
4775 if (!skb)
4776 return ERR_PTR(-ENOMEM);
4777
4778 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
4779
4780 ath10k_dbg(ar, ATH10K_DBG_WMI,
4781 "wmi peer assoc vdev %d addr %pM (%s)\n",
4782 arg->vdev_id, arg->addr,
4783 arg->peer_reassoc ? "reassociate" : "new");
4784 return skb;
4785}
4786
4787static struct sk_buff *
4788ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
4789 const struct wmi_peer_assoc_complete_arg *arg)
4790{
4791 size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
4792 struct sk_buff *skb;
4793 int ret;
4794
4795 ret = ath10k_wmi_peer_assoc_check_arg(arg);
4796 if (ret)
4797 return ERR_PTR(ret);
4798
4799 skb = ath10k_wmi_alloc_skb(ar, len);
4800 if (!skb)
4801 return ERR_PTR(-ENOMEM);
4802
4803 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
5e3dd157 4804
7aa7a72a 4805 ath10k_dbg(ar, ATH10K_DBG_WMI,
44d6fa90
CYY		 4806 "wmi peer assoc vdev %d addr %pM (%s)\n",
4807 arg->vdev_id, arg->addr,
4808 arg->peer_reassoc ? "reassociate" : "new");
d7579d12 4809 return skb;
5e3dd157
KV		 4810}
4811
a57a6a27
RM		 4812static struct sk_buff *
4813ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
4814{
4815 struct sk_buff *skb;
4816
4817 skb = ath10k_wmi_alloc_skb(ar, 0);
4818 if (!skb)
4819 return ERR_PTR(-ENOMEM);
4820
4821 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
4822 return skb;
4823}
4824
748afc47 4825/* This function assumes the beacon is already DMA mapped */
d7579d12 4826static struct sk_buff *
9ad50182
MK		 4827ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
4828 size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
4829 bool deliver_cab)
5e3dd157 4830{
748afc47 4831 struct wmi_bcn_tx_ref_cmd *cmd;
5e3dd157 4832 struct sk_buff *skb;
748afc47 4833 struct ieee80211_hdr *hdr;
748afc47 4834 u16 fc;
5e3dd157 4835
7aa7a72a 4836 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4837 if (!skb)
d7579d12 4838 return ERR_PTR(-ENOMEM);
5e3dd157 4839
9ad50182 4840 hdr = (struct ieee80211_hdr *)bcn;
748afc47
MK		 4841 fc = le16_to_cpu(hdr->frame_control);
4842
4843 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
9ad50182
MK		 4844 cmd->vdev_id = __cpu_to_le32(vdev_id);
4845 cmd->data_len = __cpu_to_le32(bcn_len);
4846 cmd->data_ptr = __cpu_to_le32(bcn_paddr);
748afc47
MK		 4847 cmd->msdu_id = 0;
4848 cmd->frame_control = __cpu_to_le32(fc);
4849 cmd->flags = 0;
24c88f78 4850 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
748afc47 4851
9ad50182 4852 if (dtim_zero)
748afc47
MK		 4853 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
4854
9ad50182 4855 if (deliver_cab)
748afc47
MK		 4856 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
4857
d7579d12 4858 return skb;
5e3dd157
KV		 4859}
4860
5e752e42
MK		 4861void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
4862 const struct wmi_wmm_params_arg *arg)
5e3dd157
KV		 4863{
4864 params->cwmin = __cpu_to_le32(arg->cwmin);
4865 params->cwmax = __cpu_to_le32(arg->cwmax);
4866 params->aifs = __cpu_to_le32(arg->aifs);
4867 params->txop = __cpu_to_le32(arg->txop);
4868 params->acm = __cpu_to_le32(arg->acm);
4869 params->no_ack = __cpu_to_le32(arg->no_ack);
4870}
4871
d7579d12
MK		 4872static struct sk_buff *
4873ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
5e752e42 4874 const struct wmi_wmm_params_all_arg *arg)
5e3dd157
KV		 4875{
4876 struct wmi_pdev_set_wmm_params *cmd;
4877 struct sk_buff *skb;
4878
7aa7a72a 4879 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4880 if (!skb)
d7579d12 4881 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4882
4883 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
5e752e42
MK		 4884 ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
4885 ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
4886 ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
4887 ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
5e3dd157 4888
7aa7a72a 4889 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
d7579d12 4890 return skb;
5e3dd157
KV		 4891}
4892
d7579d12 4893static struct sk_buff *
de23d3ef 4894ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
5e3dd157
KV		 4895{
4896 struct wmi_request_stats_cmd *cmd;
4897 struct sk_buff *skb;
4898
7aa7a72a 4899 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5e3dd157 4900 if (!skb)
d7579d12 4901 return ERR_PTR(-ENOMEM);
5e3dd157
KV		 4902
4903 cmd = (struct wmi_request_stats_cmd *)skb->data;
de23d3ef 4904 cmd->stats_id = __cpu_to_le32(stats_mask);
5e3dd157 4905
de23d3ef
MK		 4906 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
4907 stats_mask);
d7579d12 4908 return skb;
5e3dd157 4909}
9cfbce75 4910
d7579d12
MK		 4911static struct sk_buff *
4912ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
4913 enum wmi_force_fw_hang_type type, u32 delay_ms)
9cfbce75
MK		 4914{
4915 struct wmi_force_fw_hang_cmd *cmd;
4916 struct sk_buff *skb;
4917
7aa7a72a 4918 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9cfbce75 4919 if (!skb)
d7579d12 4920 return ERR_PTR(-ENOMEM);
9cfbce75
MK		 4921
4922 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
4923 cmd->type = __cpu_to_le32(type);
4924 cmd->delay_ms = __cpu_to_le32(delay_ms);
4925
7aa7a72a 4926 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
9cfbce75 4927 type, delay_ms);
d7579d12 4928 return skb;
9cfbce75 4929}
f118a3e5 4930
d7579d12 4931static struct sk_buff *
467210a6
SJ		 4932ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable,
4933 u32 log_level)
f118a3e5
KV		 4934{
4935 struct wmi_dbglog_cfg_cmd *cmd;
4936 struct sk_buff *skb;
4937 u32 cfg;
4938
7aa7a72a 4939 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
f118a3e5 4940 if (!skb)
d7579d12 4941 return ERR_PTR(-ENOMEM);
f118a3e5
KV		 4942
4943 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
4944
4945 if (module_enable) {
467210a6 4946 cfg = SM(log_level,
f118a3e5
KV		 4947 ATH10K_DBGLOG_CFG_LOG_LVL);
4948 } else {
4949 /* set back defaults, all modules with WARN level */
4950 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
4951 ATH10K_DBGLOG_CFG_LOG_LVL);
4952 module_enable = ~0;
4953 }
4954
4955 cmd->module_enable = __cpu_to_le32(module_enable);
4956 cmd->module_valid = __cpu_to_le32(~0);
4957 cmd->config_enable = __cpu_to_le32(cfg);
4958 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
4959
7aa7a72a 4960 ath10k_dbg(ar, ATH10K_DBG_WMI,
f118a3e5
KV		 4961 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
4962 __le32_to_cpu(cmd->module_enable),
4963 __le32_to_cpu(cmd->module_valid),
4964 __le32_to_cpu(cmd->config_enable),
4965 __le32_to_cpu(cmd->config_valid));
d7579d12 4966 return skb;
f118a3e5 4967}
b79b9baa 4968
d7579d12
MK		 4969static struct sk_buff *
4970ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
90174455
RM		 4971{
4972 struct wmi_pdev_pktlog_enable_cmd *cmd;
4973 struct sk_buff *skb;
4974
4975 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4976 if (!skb)
d7579d12 4977 return ERR_PTR(-ENOMEM);
90174455
RM		 4978
4979 ev_bitmap &= ATH10K_PKTLOG_ANY;
90174455
RM		 4980
4981 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
4982 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
d7579d12
MK		 4983
4984 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
4985 ev_bitmap);
4986 return skb;
90174455
RM		 4987}
4988
d7579d12
MK		 4989static struct sk_buff *
4990ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
90174455
RM		 4991{
4992 struct sk_buff *skb;
4993
4994 skb = ath10k_wmi_alloc_skb(ar, 0);
4995 if (!skb)
d7579d12 4996 return ERR_PTR(-ENOMEM);
90174455
RM		 4997
4998 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
d7579d12 4999 return skb;
90174455
RM		 5000}
5001
ffdd738d
RM		 5002static struct sk_buff *
5003ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
5004 u32 duration, u32 next_offset,
5005 u32 enabled)
5006{
5007 struct wmi_pdev_set_quiet_cmd *cmd;
5008 struct sk_buff *skb;
5009
5010 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5011 if (!skb)
5012 return ERR_PTR(-ENOMEM);
5013
5014 cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
5015 cmd->period = __cpu_to_le32(period);
5016 cmd->duration = __cpu_to_le32(duration);
5017 cmd->next_start = __cpu_to_le32(next_offset);
5018 cmd->enabled = __cpu_to_le32(enabled);
5019
5020 ath10k_dbg(ar, ATH10K_DBG_WMI,
5021 "wmi quiet param: period %u duration %u enabled %d\n",
5022 period, duration, enabled);
5023 return skb;
5024}
5025
dc8ab278
RM		 5026static struct sk_buff *
5027ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
5028 const u8 *mac)
5029{
5030 struct wmi_addba_clear_resp_cmd *cmd;
5031 struct sk_buff *skb;
5032
5033 if (!mac)
5034 return ERR_PTR(-EINVAL);
5035
5036 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5037 if (!skb)
5038 return ERR_PTR(-ENOMEM);
5039
5040 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
5041 cmd->vdev_id = __cpu_to_le32(vdev_id);
5042 ether_addr_copy(cmd->peer_macaddr.addr, mac);
5043
5044 ath10k_dbg(ar, ATH10K_DBG_WMI,
5045 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
5046 vdev_id, mac);
5047 return skb;
5048}
5049
65c0893d
RM		 5050static struct sk_buff *
5051ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
5052 u32 tid, u32 buf_size)
5053{
5054 struct wmi_addba_send_cmd *cmd;
5055 struct sk_buff *skb;
5056
5057 if (!mac)
5058 return ERR_PTR(-EINVAL);
5059
5060 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5061 if (!skb)
5062 return ERR_PTR(-ENOMEM);
5063
5064 cmd = (struct wmi_addba_send_cmd *)skb->data;
5065 cmd->vdev_id = __cpu_to_le32(vdev_id);
5066 ether_addr_copy(cmd->peer_macaddr.addr, mac);
5067 cmd->tid = __cpu_to_le32(tid);
5068 cmd->buffersize = __cpu_to_le32(buf_size);
5069
5070 ath10k_dbg(ar, ATH10K_DBG_WMI,
5071 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
5072 vdev_id, mac, tid, buf_size);
5073 return skb;
5074}
5075
11597413
RM		 5076static struct sk_buff *
5077ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
5078 u32 tid, u32 status)
5079{
5080 struct wmi_addba_setresponse_cmd *cmd;
5081 struct sk_buff *skb;
5082
5083 if (!mac)
5084 return ERR_PTR(-EINVAL);
5085
5086 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5087 if (!skb)
5088 return ERR_PTR(-ENOMEM);
5089
5090 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
5091 cmd->vdev_id = __cpu_to_le32(vdev_id);
5092 ether_addr_copy(cmd->peer_macaddr.addr, mac);
5093 cmd->tid = __cpu_to_le32(tid);
5094 cmd->statuscode = __cpu_to_le32(status);
5095
5096 ath10k_dbg(ar, ATH10K_DBG_WMI,
5097 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
5098 vdev_id, mac, tid, status);
5099 return skb;
5100}
5101
50abef85
RM		 5102static struct sk_buff *
5103ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
5104 u32 tid, u32 initiator, u32 reason)
5105{
5106 struct wmi_delba_send_cmd *cmd;
5107 struct sk_buff *skb;
5108
5109 if (!mac)
5110 return ERR_PTR(-EINVAL);
5111
5112 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
5113 if (!skb)
5114 return ERR_PTR(-ENOMEM);
5115
5116 cmd = (struct wmi_delba_send_cmd *)skb->data;
5117 cmd->vdev_id = __cpu_to_le32(vdev_id);
5118 ether_addr_copy(cmd->peer_macaddr.addr, mac);
5119 cmd->tid = __cpu_to_le32(tid);
5120 cmd->initiator = __cpu_to_le32(initiator);
5121 cmd->reasoncode = __cpu_to_le32(reason);
5122
5123 ath10k_dbg(ar, ATH10K_DBG_WMI,
5124 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
5125 vdev_id, mac, tid, initiator, reason);
5126 return skb;
5127}
5128
d7579d12
MK		 5129static const struct wmi_ops wmi_ops = {
5130 .rx = ath10k_wmi_op_rx,
5131 .map_svc = wmi_main_svc_map,
5132
5133 .pull_scan = ath10k_wmi_op_pull_scan_ev,
5134 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
5135 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
5136 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
5137 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
5138 .pull_swba = ath10k_wmi_op_pull_swba_ev,
5139 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
5140 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
5141 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
5142 .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
5143
5144 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
5145 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
5146 .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
5147 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
5148 .gen_init = ath10k_wmi_op_gen_init,
5149 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
5150 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
5151 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
5152 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
5153 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
5154 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
5155 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
5156 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
5157 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
5158 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
5159 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
5160 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 5161 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK		 5162 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
5163 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
5164 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
5165 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
5166 .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
5167 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
5168 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
5169 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
5170 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
5171 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
5172 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
5173 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
5174 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
5175 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
5176 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
5177 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
5178 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 5179 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
a57a6a27 5180 /* .gen_pdev_get_temperature not implemented */
dc8ab278 5181 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 5182 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 5183 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 5184 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
be9ce9d8 5185 /* .gen_bcn_tmpl not implemented */
4c4955fe 5186 /* .gen_prb_tmpl not implemented */
369242b4 5187 /* .gen_p2p_go_bcn_ie not implemented */
d7579d12
MK		 5188};
5189
5190static const struct wmi_ops wmi_10_1_ops = {
5191 .rx = ath10k_wmi_10_1_op_rx,
5192 .map_svc = wmi_10x_svc_map,
5193 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
5194 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
5195 .gen_init = ath10k_wmi_10_1_op_gen_init,
5196 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
5197 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
5198 .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
a57a6a27 5199 /* .gen_pdev_get_temperature not implemented */
d7579d12
MK		 5200
5201 /* shared with main branch */
5202 .pull_scan = ath10k_wmi_op_pull_scan_ev,
5203 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
5204 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
5205 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
5206 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
5207 .pull_swba = ath10k_wmi_op_pull_swba_ev,
5208 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
5209 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
5210
5211 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
5212 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
5213 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
5214 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
5215 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
5216 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
5217 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
5218 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
5219 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
5220 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
5221 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
5222 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
5223 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
5224 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 5225 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK		 5226 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
5227 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
5228 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
5229 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
5230 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
5231 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
5232 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
5233 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
5234 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
5235 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
5236 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
5237 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
5238 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
5239 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
5240 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
5241 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 5242 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 5243 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 5244 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 5245 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 5246 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
be9ce9d8 5247 /* .gen_bcn_tmpl not implemented */
4c4955fe 5248 /* .gen_prb_tmpl not implemented */
369242b4 5249 /* .gen_p2p_go_bcn_ie not implemented */
d7579d12
MK		 5250};
5251
5252static const struct wmi_ops wmi_10_2_ops = {
5253 .rx = ath10k_wmi_10_2_op_rx,
20de2229 5254 .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
d7579d12
MK		 5255 .gen_init = ath10k_wmi_10_2_op_gen_init,
5256 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
a57a6a27 5257 /* .gen_pdev_get_temperature not implemented */
d7579d12
MK		 5258
5259 /* shared with 10.1 */
5260 .map_svc = wmi_10x_svc_map,
5261 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
d7579d12
MK		 5262 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
5263 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
5264
5265 .pull_scan = ath10k_wmi_op_pull_scan_ev,
5266 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
5267 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
5268 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
5269 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
5270 .pull_swba = ath10k_wmi_op_pull_swba_ev,
5271 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
5272 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
5273
5274 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
5275 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
5276 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
5277 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
5278 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
5279 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
5280 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
5281 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
5282 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
5283 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
5284 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
5285 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
5286 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
5287 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
6d492fe2 5288 /* .gen_vdev_wmm_conf not implemented */
d7579d12
MK		 5289 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
5290 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
5291 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
5292 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
5293 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
5294 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
5295 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
5296 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
5297 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
5298 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
5299 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
5300 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
5301 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
5302 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
5303 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
5304 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 5305 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 5306 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 5307 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 5308 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 5309 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
d7579d12
MK		 5310};
5311
4a16fbec
RM		 5312static const struct wmi_ops wmi_10_2_4_ops = {
5313 .rx = ath10k_wmi_10_2_op_rx,
20de2229 5314 .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
4a16fbec
RM		 5315 .gen_init = ath10k_wmi_10_2_op_gen_init,
5316 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
a57a6a27 5317 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
4a16fbec
RM		 5318
5319 /* shared with 10.1 */
5320 .map_svc = wmi_10x_svc_map,
5321 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
4a16fbec
RM		 5322 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
5323 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
5324
5325 .pull_scan = ath10k_wmi_op_pull_scan_ev,
5326 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
5327 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
5328 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
5329 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
5330 .pull_swba = ath10k_wmi_op_pull_swba_ev,
5331 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
5332 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
5333
5334 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
5335 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
5336 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
5337 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
5338 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
5339 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
5340 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
5341 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
5342 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
5343 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
5344 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
5345 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
5346 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
5347 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
5348 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
5349 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
5350 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
5351 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
5352 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
5353 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
5354 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
5355 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
5356 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
5357 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
5358 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
5359 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
5360 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
5361 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
5362 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
5363 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
ffdd738d 5364 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
dc8ab278 5365 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
65c0893d 5366 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
11597413 5367 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
50abef85 5368 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
be9ce9d8 5369 /* .gen_bcn_tmpl not implemented */
4c4955fe 5370 /* .gen_prb_tmpl not implemented */
369242b4 5371 /* .gen_p2p_go_bcn_ie not implemented */
4a16fbec
RM		 5372};
5373
b79b9baa
MK		 5374int ath10k_wmi_attach(struct ath10k *ar)
5375{
d7579d12 5376 switch (ar->wmi.op_version) {
4a16fbec
RM		 5377 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
5378 ar->wmi.cmd = &wmi_10_2_4_cmd_map;
5379 ar->wmi.ops = &wmi_10_2_4_ops;
5380 ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
5381 ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
5382 break;
d7579d12
MK		 5383 case ATH10K_FW_WMI_OP_VERSION_10_2:
5384 ar->wmi.cmd = &wmi_10_2_cmd_map;
5385 ar->wmi.ops = &wmi_10_2_ops;
b79b9baa
MK		 5386 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
5387 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
d7579d12
MK		 5388 break;
5389 case ATH10K_FW_WMI_OP_VERSION_10_1:
5390 ar->wmi.cmd = &wmi_10x_cmd_map;
5391 ar->wmi.ops = &wmi_10_1_ops;
5392 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
5393 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
5394 break;
5395 case ATH10K_FW_WMI_OP_VERSION_MAIN:
b79b9baa 5396 ar->wmi.cmd = &wmi_cmd_map;
d7579d12 5397 ar->wmi.ops = &wmi_ops;
b79b9baa
MK		 5398 ar->wmi.vdev_param = &wmi_vdev_param_map;
5399 ar->wmi.pdev_param = &wmi_pdev_param_map;
d7579d12 5400 break;
ca996ec5
MK		 5401 case ATH10K_FW_WMI_OP_VERSION_TLV:
5402 ath10k_wmi_tlv_attach(ar);
5403 break;
d7579d12
MK		 5404 case ATH10K_FW_WMI_OP_VERSION_UNSET:
5405 case ATH10K_FW_WMI_OP_VERSION_MAX:
5406 ath10k_err(ar, "unsupported WMI op version: %d\n",
5407 ar->wmi.op_version);
5408 return -EINVAL;
b79b9baa
MK		 5409 }
5410
5411 init_completion(&ar->wmi.service_ready);
5412 init_completion(&ar->wmi.unified_ready);
b79b9baa
MK		 5413
5414 return 0;
5415}
5416
5417void ath10k_wmi_detach(struct ath10k *ar)
5418{
5419 int i;
5420
5421 /* free the host memory chunks requested by firmware */
5422 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
5423 dma_free_coherent(ar->dev,
5424 ar->wmi.mem_chunks[i].len,
5425 ar->wmi.mem_chunks[i].vaddr,
5426 ar->wmi.mem_chunks[i].paddr);
5427 }
5428
5429 ar->wmi.num_mem_chunks = 0;
5430}
Linux kernel - Deliverables
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