Commit | Line | Data |
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bdcd8170 KV |
1 | /* |
2 | * Copyright (c) 2010-2011 Atheros Communications Inc. | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #ifndef CORE_H | |
18 | #define CORE_H | |
19 | ||
20 | #include <linux/etherdevice.h> | |
21 | #include <linux/rtnetlink.h> | |
22 | #include <linux/firmware.h> | |
23 | #include <linux/sched.h> | |
bdf5396b | 24 | #include <linux/circ_buf.h> |
bdcd8170 KV |
25 | #include <net/cfg80211.h> |
26 | #include "htc.h" | |
27 | #include "wmi.h" | |
28 | #include "bmi.h" | |
bc07ddb2 | 29 | #include "target.h" |
bdcd8170 KV |
30 | |
31 | #define MAX_ATH6KL 1 | |
32 | #define ATH6KL_MAX_RX_BUFFERS 16 | |
33 | #define ATH6KL_BUFFER_SIZE 1664 | |
34 | #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4 | |
35 | #define ATH6KL_AMSDU_REFILL_THRESHOLD 3 | |
36 | #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128) | |
37 | #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508 | |
38 | #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46 | |
39 | ||
40 | #define USER_SAVEDKEYS_STAT_INIT 0 | |
41 | #define USER_SAVEDKEYS_STAT_RUN 1 | |
42 | ||
43 | #define ATH6KL_TX_TIMEOUT 10 | |
44 | #define ATH6KL_MAX_ENDPOINTS 4 | |
45 | #define MAX_NODE_NUM 15 | |
46 | ||
1df94a85 VT |
47 | /* Extra bytes for htc header alignment */ |
48 | #define ATH6KL_HTC_ALIGN_BYTES 3 | |
49 | ||
bdcd8170 KV |
50 | /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */ |
51 | #define MAX_DEF_COOKIE_NUM 180 | |
52 | #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */ | |
53 | #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM) | |
54 | ||
55 | #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC) | |
56 | ||
57 | #define DISCON_TIMER_INTVAL 10000 /* in msec */ | |
58 | #define A_DEFAULT_LISTEN_INTERVAL 100 | |
59 | #define A_MAX_WOW_LISTEN_INTERVAL 1000 | |
60 | ||
50d41234 KV |
61 | /* includes also the null byte */ |
62 | #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL" | |
63 | ||
64 | enum ath6kl_fw_ie_type { | |
65 | ATH6KL_FW_IE_FW_VERSION = 0, | |
66 | ATH6KL_FW_IE_TIMESTAMP = 1, | |
67 | ATH6KL_FW_IE_OTP_IMAGE = 2, | |
68 | ATH6KL_FW_IE_FW_IMAGE = 3, | |
69 | ATH6KL_FW_IE_PATCH_IMAGE = 4, | |
8a137480 | 70 | ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5, |
97e0496d | 71 | ATH6KL_FW_IE_CAPABILITIES = 6, |
1b4304da | 72 | ATH6KL_FW_IE_PATCH_ADDR = 7, |
03ef0250 | 73 | ATH6KL_FW_IE_BOARD_ADDR = 8, |
368b1b0f | 74 | ATH6KL_FW_IE_VIF_MAX = 9, |
50d41234 KV |
75 | }; |
76 | ||
97e0496d KV |
77 | enum ath6kl_fw_capability { |
78 | ATH6KL_FW_CAPABILITY_HOST_P2P = 0, | |
10509f90 | 79 | ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1, |
97e0496d KV |
80 | |
81 | /* this needs to be last */ | |
82 | ATH6KL_FW_CAPABILITY_MAX, | |
83 | }; | |
84 | ||
85 | #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32) | |
86 | ||
50d41234 KV |
87 | struct ath6kl_fw_ie { |
88 | __le32 id; | |
89 | __le32 len; | |
90 | u8 data[0]; | |
91 | }; | |
92 | ||
bdcd8170 | 93 | /* AR6003 1.0 definitions */ |
0d0192ba | 94 | #define AR6003_HW_1_0_VERSION 0x300002ba |
bdcd8170 KV |
95 | |
96 | /* AR6003 2.0 definitions */ | |
0d0192ba KV |
97 | #define AR6003_HW_2_0_VERSION 0x30000384 |
98 | #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910 | |
99 | #define AR6003_HW_2_0_OTP_FILE "ath6k/AR6003/hw2.0/otp.bin.z77" | |
100 | #define AR6003_HW_2_0_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athwlan.bin.z77" | |
101 | #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athtcmd_ram.bin" | |
102 | #define AR6003_HW_2_0_PATCH_FILE "ath6k/AR6003/hw2.0/data.patch.bin" | |
103 | #define AR6003_HW_2_0_FIRMWARE_2_FILE "ath6k/AR6003/hw2.0/fw-2.bin" | |
104 | #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin" | |
105 | #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \ | |
106 | "ath6k/AR6003/hw2.0/bdata.SD31.bin" | |
bdcd8170 KV |
107 | |
108 | /* AR6003 3.0 definitions */ | |
0d0192ba KV |
109 | #define AR6003_HW_2_1_1_VERSION 0x30000582 |
110 | #define AR6003_HW_2_1_1_OTP_FILE "ath6k/AR6003/hw2.1.1/otp.bin" | |
111 | #define AR6003_HW_2_1_1_FIRMWARE_FILE "ath6k/AR6003/hw2.1.1/athwlan.bin" | |
112 | #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE \ | |
113 | "ath6k/AR6003/hw2.1.1/athtcmd_ram.bin" | |
114 | #define AR6003_HW_2_1_1_PATCH_FILE "ath6k/AR6003/hw2.1.1/data.patch.bin" | |
115 | #define AR6003_HW_2_1_1_FIRMWARE_2_FILE "ath6k/AR6003/hw2.1.1/fw-2.bin" | |
116 | #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin" | |
117 | #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \ | |
118 | "ath6k/AR6003/hw2.1.1/bdata.SD31.bin" | |
bdcd8170 | 119 | |
31024d99 | 120 | /* AR6004 1.0 definitions */ |
0d0192ba KV |
121 | #define AR6004_HW_1_0_VERSION 0x30000623 |
122 | #define AR6004_HW_1_0_FIRMWARE_2_FILE "ath6k/AR6004/hw1.0/fw-2.bin" | |
123 | #define AR6004_HW_1_0_FIRMWARE_FILE "ath6k/AR6004/hw1.0/fw.ram.bin" | |
124 | #define AR6004_HW_1_0_BOARD_DATA_FILE "ath6k/AR6004/hw1.0/bdata.bin" | |
125 | #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \ | |
d5720e59 KV |
126 | "ath6k/AR6004/hw1.0/bdata.DB132.bin" |
127 | ||
128 | /* AR6004 1.1 definitions */ | |
0d0192ba KV |
129 | #define AR6004_HW_1_1_VERSION 0x30000001 |
130 | #define AR6004_HW_1_1_FIRMWARE_2_FILE "ath6k/AR6004/hw1.1/fw-2.bin" | |
131 | #define AR6004_HW_1_1_FIRMWARE_FILE "ath6k/AR6004/hw1.1/fw.ram.bin" | |
132 | #define AR6004_HW_1_1_BOARD_DATA_FILE "ath6k/AR6004/hw1.1/bdata.bin" | |
133 | #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \ | |
d5720e59 | 134 | "ath6k/AR6004/hw1.1/bdata.DB132.bin" |
31024d99 | 135 | |
bdcd8170 KV |
136 | /* Per STA data, used in AP mode */ |
137 | #define STA_PS_AWAKE BIT(0) | |
138 | #define STA_PS_SLEEP BIT(1) | |
139 | #define STA_PS_POLLED BIT(2) | |
140 | ||
141 | /* HTC TX packet tagging definitions */ | |
142 | #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED | |
143 | #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1) | |
144 | ||
145 | #define AR6003_CUST_DATA_SIZE 16 | |
146 | ||
147 | #define AGGR_WIN_IDX(x, y) ((x) % (y)) | |
148 | #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y)) | |
149 | #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y)) | |
150 | #define ATH6KL_MAX_SEQ_NO 0xFFF | |
151 | #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO) | |
152 | ||
153 | #define NUM_OF_TIDS 8 | |
154 | #define AGGR_SZ_DEFAULT 8 | |
155 | ||
156 | #define AGGR_WIN_SZ_MIN 2 | |
157 | #define AGGR_WIN_SZ_MAX 8 | |
158 | ||
159 | #define TID_WINDOW_SZ(_x) ((_x) << 1) | |
160 | ||
161 | #define AGGR_NUM_OF_FREE_NETBUFS 16 | |
162 | ||
163 | #define AGGR_RX_TIMEOUT 400 /* in ms */ | |
164 | ||
165 | #define WMI_TIMEOUT (2 * HZ) | |
166 | ||
167 | #define MBOX_YIELD_LIMIT 99 | |
168 | ||
169 | /* configuration lags */ | |
170 | /* | |
171 | * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in | |
172 | * ERP IE of beacon to determine the short premable support when | |
173 | * sending (Re)Assoc req. | |
174 | * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power | |
175 | * module state transition failure events which happen during | |
176 | * scan, to the host. | |
177 | */ | |
178 | #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0) | |
179 | #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1) | |
180 | #define ATH6KL_CONF_ENABLE_11N BIT(2) | |
181 | #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3) | |
8277de15 | 182 | #define ATH6KL_CONF_SUSPEND_CUTPOWER BIT(4) |
bdcd8170 KV |
183 | |
184 | enum wlan_low_pwr_state { | |
185 | WLAN_POWER_STATE_ON, | |
186 | WLAN_POWER_STATE_CUT_PWR, | |
187 | WLAN_POWER_STATE_DEEP_SLEEP, | |
188 | WLAN_POWER_STATE_WOW | |
189 | }; | |
190 | ||
191 | enum sme_state { | |
192 | SME_DISCONNECTED, | |
193 | SME_CONNECTING, | |
194 | SME_CONNECTED | |
195 | }; | |
196 | ||
bdcd8170 KV |
197 | struct skb_hold_q { |
198 | struct sk_buff *skb; | |
199 | bool is_amsdu; | |
200 | u16 seq_no; | |
201 | }; | |
202 | ||
203 | struct rxtid { | |
204 | bool aggr; | |
205 | bool progress; | |
206 | bool timer_mon; | |
207 | u16 win_sz; | |
208 | u16 seq_next; | |
209 | u32 hold_q_sz; | |
210 | struct skb_hold_q *hold_q; | |
211 | struct sk_buff_head q; | |
212 | spinlock_t lock; | |
213 | }; | |
214 | ||
215 | struct rxtid_stats { | |
216 | u32 num_into_aggr; | |
217 | u32 num_dups; | |
218 | u32 num_oow; | |
219 | u32 num_mpdu; | |
220 | u32 num_amsdu; | |
221 | u32 num_delivered; | |
222 | u32 num_timeouts; | |
223 | u32 num_hole; | |
224 | u32 num_bar; | |
225 | }; | |
226 | ||
227 | struct aggr_info { | |
228 | u8 aggr_sz; | |
229 | u8 timer_scheduled; | |
230 | struct timer_list timer; | |
231 | struct net_device *dev; | |
232 | struct rxtid rx_tid[NUM_OF_TIDS]; | |
233 | struct sk_buff_head free_q; | |
234 | struct rxtid_stats stat[NUM_OF_TIDS]; | |
235 | }; | |
236 | ||
237 | struct ath6kl_wep_key { | |
238 | u8 key_index; | |
239 | u8 key_len; | |
240 | u8 key[64]; | |
241 | }; | |
242 | ||
243 | #define ATH6KL_KEY_SEQ_LEN 8 | |
244 | ||
245 | struct ath6kl_key { | |
246 | u8 key[WLAN_MAX_KEY_LEN]; | |
247 | u8 key_len; | |
248 | u8 seq[ATH6KL_KEY_SEQ_LEN]; | |
249 | u8 seq_len; | |
250 | u32 cipher; | |
251 | }; | |
252 | ||
253 | struct ath6kl_node_mapping { | |
254 | u8 mac_addr[ETH_ALEN]; | |
255 | u8 ep_id; | |
256 | u8 tx_pend; | |
257 | }; | |
258 | ||
259 | struct ath6kl_cookie { | |
260 | struct sk_buff *skb; | |
261 | u32 map_no; | |
262 | struct htc_packet htc_pkt; | |
263 | struct ath6kl_cookie *arc_list_next; | |
264 | }; | |
265 | ||
266 | struct ath6kl_sta { | |
267 | u16 sta_flags; | |
268 | u8 mac[ETH_ALEN]; | |
269 | u8 aid; | |
270 | u8 keymgmt; | |
271 | u8 ucipher; | |
272 | u8 auth; | |
273 | u8 wpa_ie[ATH6KL_MAX_IE]; | |
274 | struct sk_buff_head psq; | |
275 | spinlock_t psq_lock; | |
276 | }; | |
277 | ||
278 | struct ath6kl_version { | |
279 | u32 target_ver; | |
280 | u32 wlan_ver; | |
281 | u32 abi_ver; | |
282 | }; | |
283 | ||
284 | struct ath6kl_bmi { | |
285 | u32 cmd_credits; | |
286 | bool done_sent; | |
287 | u8 *cmd_buf; | |
1f4c894d KV |
288 | u32 max_data_size; |
289 | u32 max_cmd_size; | |
bdcd8170 KV |
290 | }; |
291 | ||
292 | struct target_stats { | |
293 | u64 tx_pkt; | |
294 | u64 tx_byte; | |
295 | u64 tx_ucast_pkt; | |
296 | u64 tx_ucast_byte; | |
297 | u64 tx_mcast_pkt; | |
298 | u64 tx_mcast_byte; | |
299 | u64 tx_bcast_pkt; | |
300 | u64 tx_bcast_byte; | |
301 | u64 tx_rts_success_cnt; | |
302 | u64 tx_pkt_per_ac[4]; | |
303 | ||
304 | u64 tx_err; | |
305 | u64 tx_fail_cnt; | |
306 | u64 tx_retry_cnt; | |
307 | u64 tx_mult_retry_cnt; | |
308 | u64 tx_rts_fail_cnt; | |
309 | ||
310 | u64 rx_pkt; | |
311 | u64 rx_byte; | |
312 | u64 rx_ucast_pkt; | |
313 | u64 rx_ucast_byte; | |
314 | u64 rx_mcast_pkt; | |
315 | u64 rx_mcast_byte; | |
316 | u64 rx_bcast_pkt; | |
317 | u64 rx_bcast_byte; | |
318 | u64 rx_frgment_pkt; | |
319 | ||
320 | u64 rx_err; | |
321 | u64 rx_crc_err; | |
322 | u64 rx_key_cache_miss; | |
323 | u64 rx_decrypt_err; | |
324 | u64 rx_dupl_frame; | |
325 | ||
326 | u64 tkip_local_mic_fail; | |
327 | u64 tkip_cnter_measures_invoked; | |
328 | u64 tkip_replays; | |
329 | u64 tkip_fmt_err; | |
330 | u64 ccmp_fmt_err; | |
331 | u64 ccmp_replays; | |
332 | ||
333 | u64 pwr_save_fail_cnt; | |
334 | ||
335 | u64 cs_bmiss_cnt; | |
336 | u64 cs_low_rssi_cnt; | |
337 | u64 cs_connect_cnt; | |
338 | u64 cs_discon_cnt; | |
339 | ||
340 | s32 tx_ucast_rate; | |
341 | s32 rx_ucast_rate; | |
342 | ||
343 | u32 lq_val; | |
344 | ||
345 | u32 wow_pkt_dropped; | |
346 | u16 wow_evt_discarded; | |
347 | ||
348 | s16 noise_floor_calib; | |
349 | s16 cs_rssi; | |
350 | s16 cs_ave_beacon_rssi; | |
351 | u8 cs_ave_beacon_snr; | |
352 | u8 cs_last_roam_msec; | |
353 | u8 cs_snr; | |
354 | ||
355 | u8 wow_host_pkt_wakeups; | |
356 | u8 wow_host_evt_wakeups; | |
357 | ||
358 | u32 arp_received; | |
359 | u32 arp_matched; | |
360 | u32 arp_replied; | |
361 | }; | |
362 | ||
363 | struct ath6kl_mbox_info { | |
364 | u32 htc_addr; | |
365 | u32 htc_ext_addr; | |
366 | u32 htc_ext_sz; | |
367 | ||
368 | u32 block_size; | |
369 | ||
370 | u32 gmbox_addr; | |
371 | ||
372 | u32 gmbox_sz; | |
373 | }; | |
374 | ||
375 | /* | |
376 | * 802.11i defines an extended IV for use with non-WEP ciphers. | |
377 | * When the EXTIV bit is set in the key id byte an additional | |
378 | * 4 bytes immediately follow the IV for TKIP. For CCMP the | |
379 | * EXTIV bit is likewise set but the 8 bytes represent the | |
380 | * CCMP header rather than IV+extended-IV. | |
381 | */ | |
382 | ||
383 | #define ATH6KL_KEYBUF_SIZE 16 | |
384 | #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */ | |
385 | ||
386 | #define ATH6KL_KEY_XMIT 0x01 | |
387 | #define ATH6KL_KEY_RECV 0x02 | |
388 | #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */ | |
389 | ||
9a5b1318 | 390 | /* Initial group key for AP mode */ |
bdcd8170 | 391 | struct ath6kl_req_key { |
9a5b1318 JM |
392 | bool valid; |
393 | u8 key_index; | |
394 | int key_type; | |
395 | u8 key[WLAN_MAX_KEY_LEN]; | |
396 | u8 key_len; | |
bdcd8170 KV |
397 | }; |
398 | ||
77eab1e9 KV |
399 | enum ath6kl_hif_type { |
400 | ATH6KL_HIF_TYPE_SDIO, | |
401 | ATH6KL_HIF_TYPE_USB, | |
402 | }; | |
403 | ||
71f96ee6 KV |
404 | /* |
405 | * Driver's maximum limit, note that some firmwares support only one vif | |
406 | * and the runtime (current) limit must be checked from ar->vif_max. | |
407 | */ | |
b64de356 | 408 | #define ATH6KL_VIF_MAX 3 |
334234b5 | 409 | |
59c98449 VT |
410 | /* vif flags info */ |
411 | enum ath6kl_vif_state { | |
412 | CONNECTED, | |
413 | CONNECT_PEND, | |
414 | WMM_ENABLED, | |
415 | NETQ_STOPPED, | |
416 | DTIM_EXPIRED, | |
417 | NETDEV_REGISTERED, | |
418 | CLEAR_BSSFILTER_ON_BEACON, | |
419 | DTIM_PERIOD_AVAIL, | |
420 | WLAN_ENABLED, | |
b95907a7 | 421 | STATS_UPDATE_PEND, |
59c98449 VT |
422 | }; |
423 | ||
108438bc | 424 | struct ath6kl_vif { |
990bd915 | 425 | struct list_head list; |
108438bc VT |
426 | struct wireless_dev wdev; |
427 | struct net_device *ndev; | |
428 | struct ath6kl *ar; | |
478ac027 VT |
429 | /* Lock to protect vif specific net_stats and flags */ |
430 | spinlock_t if_lock; | |
334234b5 | 431 | u8 fw_vif_idx; |
59c98449 | 432 | unsigned long flags; |
3450334f VT |
433 | int ssid_len; |
434 | u8 ssid[IEEE80211_MAX_SSID_LEN]; | |
435 | u8 dot11_auth_mode; | |
436 | u8 auth_mode; | |
437 | u8 prwise_crypto; | |
438 | u8 prwise_crypto_len; | |
439 | u8 grp_crypto; | |
440 | u8 grp_crypto_len; | |
441 | u8 def_txkey_index; | |
f5938f24 VT |
442 | u8 next_mode; |
443 | u8 nw_type; | |
8c8b65e3 VT |
444 | u8 bssid[ETH_ALEN]; |
445 | u8 req_bssid[ETH_ALEN]; | |
f74bac54 VT |
446 | u16 ch_hint; |
447 | u16 bss_ch; | |
6f2a73f9 VT |
448 | struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1]; |
449 | struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1]; | |
2132c69c | 450 | struct aggr_info *aggr_cntxt; |
10509f90 | 451 | |
de3ad713 | 452 | struct timer_list disconnect_timer; |
10509f90 KV |
453 | struct timer_list sched_scan_timer; |
454 | ||
14ee6f6b VT |
455 | struct cfg80211_scan_request *scan_req; |
456 | enum sme_state sme_state; | |
cf5333d7 | 457 | int reconnect_flag; |
1052261e JM |
458 | u32 last_roc_id; |
459 | u32 last_cancel_roc_id; | |
cf5333d7 VT |
460 | u32 send_action_id; |
461 | bool probe_req_report; | |
462 | u16 next_chan; | |
463 | u16 assoc_bss_beacon_int; | |
464 | u8 assoc_bss_dtim_period; | |
b95907a7 VT |
465 | struct net_device_stats net_stats; |
466 | struct target_stats target_stats; | |
108438bc VT |
467 | }; |
468 | ||
6cb3c714 RM |
469 | #define WOW_LIST_ID 0 |
470 | #define WOW_HOST_REQ_DELAY 500 /* ms */ | |
471 | ||
10509f90 KV |
472 | #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */ |
473 | ||
bdcd8170 | 474 | /* Flag info */ |
59c98449 VT |
475 | enum ath6kl_dev_state { |
476 | WMI_ENABLED, | |
477 | WMI_READY, | |
478 | WMI_CTRL_EP_FULL, | |
479 | TESTMODE, | |
480 | DESTROY_IN_PROGRESS, | |
481 | SKIP_SCAN, | |
59c98449 | 482 | ROAM_TBL_PEND, |
5fe4dffb | 483 | FIRST_BOOT, |
59c98449 | 484 | }; |
bdcd8170 | 485 | |
76a9fbe2 KV |
486 | enum ath6kl_state { |
487 | ATH6KL_STATE_OFF, | |
488 | ATH6KL_STATE_ON, | |
489 | ATH6KL_STATE_DEEPSLEEP, | |
b4b2a0b1 | 490 | ATH6KL_STATE_CUTPOWER, |
dd6c0c63 | 491 | ATH6KL_STATE_WOW, |
10509f90 | 492 | ATH6KL_STATE_SCHED_SCAN, |
76a9fbe2 KV |
493 | }; |
494 | ||
bdcd8170 KV |
495 | struct ath6kl { |
496 | struct device *dev; | |
be98e3a4 | 497 | struct wiphy *wiphy; |
76a9fbe2 KV |
498 | |
499 | enum ath6kl_state state; | |
500 | ||
bdcd8170 KV |
501 | struct ath6kl_bmi bmi; |
502 | const struct ath6kl_hif_ops *hif_ops; | |
503 | struct wmi *wmi; | |
504 | int tx_pending[ENDPOINT_MAX]; | |
505 | int total_tx_data_pend; | |
506 | struct htc_target *htc_target; | |
77eab1e9 | 507 | enum ath6kl_hif_type hif_type; |
bdcd8170 | 508 | void *hif_priv; |
990bd915 VT |
509 | struct list_head vif_list; |
510 | /* Lock to avoid race in vif_list entries among add/del/traverse */ | |
511 | spinlock_t list_lock; | |
55055976 | 512 | u8 num_vif; |
368b1b0f | 513 | unsigned int vif_max; |
3226f68a | 514 | u8 max_norm_iface; |
55055976 | 515 | u8 avail_idx_map; |
bdcd8170 KV |
516 | spinlock_t lock; |
517 | struct semaphore sem; | |
bdcd8170 KV |
518 | u16 listen_intvl_b; |
519 | u16 listen_intvl_t; | |
e5090444 | 520 | u8 lrssi_roam_threshold; |
bdcd8170 KV |
521 | struct ath6kl_version version; |
522 | u32 target_type; | |
523 | u8 tx_pwr; | |
bdcd8170 KV |
524 | struct ath6kl_node_mapping node_map[MAX_NODE_NUM]; |
525 | u8 ibss_ps_enable; | |
55055976 | 526 | bool ibss_if_active; |
bdcd8170 KV |
527 | u8 node_num; |
528 | u8 next_ep_id; | |
529 | struct ath6kl_cookie *cookie_list; | |
530 | u32 cookie_count; | |
531 | enum htc_endpoint_id ac2ep_map[WMM_NUM_AC]; | |
532 | bool ac_stream_active[WMM_NUM_AC]; | |
533 | u8 ac_stream_pri_map[WMM_NUM_AC]; | |
534 | u8 hiac_stream_active_pri; | |
535 | u8 ep2ac_map[ENDPOINT_MAX]; | |
536 | enum htc_endpoint_id ctrl_ep; | |
3c370398 | 537 | struct ath6kl_htc_credit_info credit_state_info; |
bdcd8170 KV |
538 | u32 connect_ctrl_flags; |
539 | u32 user_key_ctrl; | |
540 | u8 usr_bss_filter; | |
541 | struct ath6kl_sta sta_list[AP_MAX_NUM_STA]; | |
542 | u8 sta_list_index; | |
543 | struct ath6kl_req_key ap_mode_bkey; | |
544 | struct sk_buff_head mcastpsq; | |
545 | spinlock_t mcastpsq_lock; | |
546 | u8 intra_bss; | |
bdcd8170 KV |
547 | struct wmi_ap_mode_stat ap_stats; |
548 | u8 ap_country_code[3]; | |
549 | struct list_head amsdu_rx_buffer_queue; | |
bdcd8170 | 550 | u8 rx_meta_ver; |
bdcd8170 | 551 | enum wlan_low_pwr_state wlan_pwr_state; |
d66ea4f9 | 552 | u8 mac_addr[ETH_ALEN]; |
bdcd8170 | 553 | #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4 |
003353b0 KV |
554 | struct { |
555 | void *rx_report; | |
556 | size_t rx_report_len; | |
557 | } tm; | |
558 | ||
856f4b31 KV |
559 | struct ath6kl_hw { |
560 | u32 id; | |
293badf4 | 561 | const char *name; |
a01ac414 KV |
562 | u32 dataset_patch_addr; |
563 | u32 app_load_addr; | |
564 | u32 app_start_override_addr; | |
991b27ea KV |
565 | u32 board_ext_data_addr; |
566 | u32 reserved_ram_size; | |
0d4d72bf | 567 | u32 board_addr; |
39586bf2 RH |
568 | u32 refclk_hz; |
569 | u32 uarttx_pin; | |
d1a9421d KV |
570 | |
571 | const char *fw_otp; | |
572 | const char *fw; | |
573 | const char *fw_tcmd; | |
574 | const char *fw_patch; | |
575 | const char *fw_api2; | |
576 | const char *fw_board; | |
577 | const char *fw_default_board; | |
a01ac414 KV |
578 | } hw; |
579 | ||
bdcd8170 KV |
580 | u16 conf_flags; |
581 | wait_queue_head_t event_wq; | |
582 | struct ath6kl_mbox_info mbox_info; | |
583 | ||
584 | struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM]; | |
bdcd8170 KV |
585 | unsigned long flag; |
586 | ||
587 | u8 *fw_board; | |
588 | size_t fw_board_len; | |
589 | ||
590 | u8 *fw_otp; | |
591 | size_t fw_otp_len; | |
592 | ||
593 | u8 *fw; | |
594 | size_t fw_len; | |
595 | ||
596 | u8 *fw_patch; | |
597 | size_t fw_patch_len; | |
598 | ||
97e0496d KV |
599 | unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN]; |
600 | ||
bdcd8170 | 601 | struct workqueue_struct *ath6kl_wq; |
7c3075e9 | 602 | |
d999ba3e | 603 | struct dentry *debugfs_phy; |
6a7c9bad | 604 | |
6bbc7c35 JM |
605 | bool p2p; |
606 | ||
bdf5396b KV |
607 | #ifdef CONFIG_ATH6KL_DEBUG |
608 | struct { | |
609 | struct circ_buf fwlog_buf; | |
610 | spinlock_t fwlog_lock; | |
611 | void *fwlog_tmp; | |
939f1cce | 612 | u32 fwlog_mask; |
91d57de5 | 613 | unsigned int dbgfs_diag_reg; |
252c068b VT |
614 | u32 diag_reg_addr_wr; |
615 | u32 diag_reg_val_wr; | |
9a730834 KV |
616 | |
617 | struct { | |
618 | unsigned int invalid_rate; | |
619 | } war_stats; | |
4b28a80d JM |
620 | |
621 | u8 *roam_tbl; | |
622 | unsigned int roam_tbl_len; | |
ff0b0075 JM |
623 | |
624 | u8 keepalive; | |
625 | u8 disc_timeout; | |
bdf5396b KV |
626 | } debug; |
627 | #endif /* CONFIG_ATH6KL_DEBUG */ | |
bdcd8170 KV |
628 | }; |
629 | ||
d6d5c06c | 630 | static inline struct ath6kl *ath6kl_priv(struct net_device *dev) |
bdcd8170 | 631 | { |
108438bc | 632 | return ((struct ath6kl_vif *) netdev_priv(dev))->ar; |
bdcd8170 KV |
633 | } |
634 | ||
bc07ddb2 KV |
635 | static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar, |
636 | u32 item_offset) | |
637 | { | |
638 | u32 addr = 0; | |
639 | ||
640 | if (ar->target_type == TARGET_TYPE_AR6003) | |
641 | addr = ATH6KL_AR6003_HI_START_ADDR + item_offset; | |
642 | else if (ar->target_type == TARGET_TYPE_AR6004) | |
643 | addr = ATH6KL_AR6004_HI_START_ADDR + item_offset; | |
644 | ||
645 | return addr; | |
646 | } | |
647 | ||
bdcd8170 KV |
648 | int ath6kl_configure_target(struct ath6kl *ar); |
649 | void ath6kl_detect_error(unsigned long ptr); | |
650 | void disconnect_timer_handler(unsigned long ptr); | |
651 | void init_netdev(struct net_device *dev); | |
652 | void ath6kl_cookie_init(struct ath6kl *ar); | |
653 | void ath6kl_cookie_cleanup(struct ath6kl *ar); | |
654 | void ath6kl_rx(struct htc_target *target, struct htc_packet *packet); | |
655 | void ath6kl_tx_complete(void *context, struct list_head *packet_queue); | |
656 | enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target, | |
657 | struct htc_packet *packet); | |
658 | void ath6kl_stop_txrx(struct ath6kl *ar); | |
659 | void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar); | |
f9ea0753 | 660 | int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value); |
addb44be KV |
661 | int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length); |
662 | int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value); | |
663 | int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length); | |
bc07ddb2 | 664 | int ath6kl_read_fwlogs(struct ath6kl *ar); |
e29f25f5 | 665 | void ath6kl_init_profile_info(struct ath6kl_vif *vif); |
bdcd8170 | 666 | void ath6kl_tx_data_cleanup(struct ath6kl *ar); |
bdcd8170 KV |
667 | |
668 | struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar); | |
669 | void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie); | |
670 | int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev); | |
671 | ||
672 | struct aggr_info *aggr_init(struct net_device *dev); | |
673 | void ath6kl_rx_refill(struct htc_target *target, | |
674 | enum htc_endpoint_id endpoint); | |
675 | void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count); | |
676 | struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target, | |
677 | enum htc_endpoint_id endpoint, | |
678 | int len); | |
679 | void aggr_module_destroy(struct aggr_info *aggr_info); | |
680 | void aggr_reset_state(struct aggr_info *aggr_info); | |
681 | ||
6765d0aa | 682 | struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 * node_addr); |
bdcd8170 KV |
683 | struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid); |
684 | ||
685 | void ath6kl_ready_event(void *devt, u8 * datap, u32 sw_ver, u32 abi_ver); | |
686 | int ath6kl_control_tx(void *devt, struct sk_buff *skb, | |
687 | enum htc_endpoint_id eid); | |
240d2799 | 688 | void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel, |
bdcd8170 KV |
689 | u8 *bssid, u16 listen_int, |
690 | u16 beacon_int, enum network_type net_type, | |
691 | u8 beacon_ie_len, u8 assoc_req_len, | |
692 | u8 assoc_resp_len, u8 *assoc_info); | |
240d2799 VT |
693 | void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel); |
694 | void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr, | |
572e27c0 JM |
695 | u8 keymgmt, u8 ucipher, u8 auth, |
696 | u8 assoc_req_len, u8 *assoc_info); | |
240d2799 | 697 | void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason, |
bdcd8170 KV |
698 | u8 *bssid, u8 assoc_resp_len, |
699 | u8 *assoc_info, u16 prot_reason_status); | |
240d2799 | 700 | void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast); |
bdcd8170 | 701 | void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr); |
240d2799 VT |
702 | void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status); |
703 | void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len); | |
bdcd8170 KV |
704 | void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active); |
705 | enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac); | |
706 | ||
240d2799 | 707 | void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid); |
bdcd8170 | 708 | |
240d2799 VT |
709 | void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif); |
710 | void ath6kl_disconnect(struct ath6kl_vif *vif); | |
240d2799 VT |
711 | void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid); |
712 | void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no, | |
bdcd8170 KV |
713 | u8 win_sz); |
714 | void ath6kl_wakeup_event(void *dev); | |
bdcd8170 | 715 | |
6db8fa53 VT |
716 | void ath6kl_reset_device(struct ath6kl *ar, u32 target_type, |
717 | bool wait_fot_compltn, bool cold_reset); | |
e29f25f5 | 718 | void ath6kl_init_control_info(struct ath6kl_vif *vif); |
108438bc | 719 | void ath6kl_deinit_if_data(struct ath6kl_vif *vif); |
8dafb70e | 720 | void ath6kl_core_free(struct ath6kl *ar); |
990bd915 | 721 | struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar); |
55055976 | 722 | void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready); |
5fe4dffb KV |
723 | int ath6kl_init_hw_start(struct ath6kl *ar); |
724 | int ath6kl_init_hw_stop(struct ath6kl *ar); | |
a918fb3c | 725 | void ath6kl_check_wow_status(struct ath6kl *ar); |
5fe4dffb | 726 | |
bdcd8170 | 727 | #endif /* CORE_H */ |