Commit | Line | Data |
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bdcd8170 KV |
1 | /* |
2 | * Copyright (c) 2010-2011 Atheros Communications Inc. | |
1b2df407 | 3 | * Copyright (c) 2011-2012 Qualcomm Atheros, Inc. |
bdcd8170 KV |
4 | * |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #ifndef CORE_H | |
19 | #define CORE_H | |
20 | ||
21 | #include <linux/etherdevice.h> | |
22 | #include <linux/rtnetlink.h> | |
23 | #include <linux/firmware.h> | |
24 | #include <linux/sched.h> | |
bdf5396b | 25 | #include <linux/circ_buf.h> |
bdcd8170 KV |
26 | #include <net/cfg80211.h> |
27 | #include "htc.h" | |
28 | #include "wmi.h" | |
29 | #include "bmi.h" | |
bc07ddb2 | 30 | #include "target.h" |
bdcd8170 KV |
31 | |
32 | #define MAX_ATH6KL 1 | |
33 | #define ATH6KL_MAX_RX_BUFFERS 16 | |
34 | #define ATH6KL_BUFFER_SIZE 1664 | |
35 | #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4 | |
36 | #define ATH6KL_AMSDU_REFILL_THRESHOLD 3 | |
37 | #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128) | |
38 | #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508 | |
39 | #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46 | |
40 | ||
41 | #define USER_SAVEDKEYS_STAT_INIT 0 | |
42 | #define USER_SAVEDKEYS_STAT_RUN 1 | |
43 | ||
44 | #define ATH6KL_TX_TIMEOUT 10 | |
45 | #define ATH6KL_MAX_ENDPOINTS 4 | |
46 | #define MAX_NODE_NUM 15 | |
47 | ||
c1762a3f TP |
48 | #define ATH6KL_APSD_ALL_FRAME 0xFFFF |
49 | #define ATH6KL_APSD_NUM_OF_AC 0x4 | |
50 | #define ATH6KL_APSD_FRAME_MASK 0xF | |
51 | ||
1df94a85 VT |
52 | /* Extra bytes for htc header alignment */ |
53 | #define ATH6KL_HTC_ALIGN_BYTES 3 | |
54 | ||
bdcd8170 KV |
55 | /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */ |
56 | #define MAX_DEF_COOKIE_NUM 180 | |
57 | #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */ | |
58 | #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM) | |
59 | ||
60 | #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC) | |
61 | ||
62 | #define DISCON_TIMER_INTVAL 10000 /* in msec */ | |
bdcd8170 | 63 | |
13423c31 VT |
64 | /* Channel dwell time in fg scan */ |
65 | #define ATH6KL_FG_SCAN_INTERVAL 50 /* in ms */ | |
66 | ||
50d41234 KV |
67 | /* includes also the null byte */ |
68 | #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL" | |
69 | ||
70 | enum ath6kl_fw_ie_type { | |
71 | ATH6KL_FW_IE_FW_VERSION = 0, | |
72 | ATH6KL_FW_IE_TIMESTAMP = 1, | |
73 | ATH6KL_FW_IE_OTP_IMAGE = 2, | |
74 | ATH6KL_FW_IE_FW_IMAGE = 3, | |
75 | ATH6KL_FW_IE_PATCH_IMAGE = 4, | |
8a137480 | 76 | ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5, |
97e0496d | 77 | ATH6KL_FW_IE_CAPABILITIES = 6, |
1b4304da | 78 | ATH6KL_FW_IE_PATCH_ADDR = 7, |
03ef0250 | 79 | ATH6KL_FW_IE_BOARD_ADDR = 8, |
368b1b0f | 80 | ATH6KL_FW_IE_VIF_MAX = 9, |
50d41234 KV |
81 | }; |
82 | ||
97e0496d KV |
83 | enum ath6kl_fw_capability { |
84 | ATH6KL_FW_CAPABILITY_HOST_P2P = 0, | |
10509f90 | 85 | ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1, |
97e0496d | 86 | |
3ca9d1fc AT |
87 | /* |
88 | * Firmware is capable of supporting P2P mgmt operations on a | |
89 | * station interface. After group formation, the station | |
90 | * interface will become a P2P client/GO interface as the case may be | |
91 | */ | |
92 | ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, | |
93 | ||
97e0496d KV |
94 | /* this needs to be last */ |
95 | ATH6KL_FW_CAPABILITY_MAX, | |
96 | }; | |
97 | ||
98 | #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32) | |
99 | ||
50d41234 KV |
100 | struct ath6kl_fw_ie { |
101 | __le32 id; | |
102 | __le32 len; | |
103 | u8 data[0]; | |
104 | }; | |
105 | ||
c0038972 | 106 | #define ATH6KL_FW_API2_FILE "fw-2.bin" |
65a8b4cc | 107 | #define ATH6KL_FW_API3_FILE "fw-3.bin" |
c0038972 | 108 | |
bdcd8170 | 109 | /* AR6003 1.0 definitions */ |
0d0192ba | 110 | #define AR6003_HW_1_0_VERSION 0x300002ba |
bdcd8170 KV |
111 | |
112 | /* AR6003 2.0 definitions */ | |
0d0192ba KV |
113 | #define AR6003_HW_2_0_VERSION 0x30000384 |
114 | #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910 | |
c0038972 KV |
115 | #define AR6003_HW_2_0_FW_DIR "ath6k/AR6003/hw2.0" |
116 | #define AR6003_HW_2_0_OTP_FILE "otp.bin.z77" | |
117 | #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77" | |
118 | #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" | |
119 | #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin" | |
0d0192ba KV |
120 | #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin" |
121 | #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \ | |
122 | "ath6k/AR6003/hw2.0/bdata.SD31.bin" | |
bdcd8170 KV |
123 | |
124 | /* AR6003 3.0 definitions */ | |
0d0192ba | 125 | #define AR6003_HW_2_1_1_VERSION 0x30000582 |
c0038972 KV |
126 | #define AR6003_HW_2_1_1_FW_DIR "ath6k/AR6003/hw2.1.1" |
127 | #define AR6003_HW_2_1_1_OTP_FILE "otp.bin" | |
128 | #define AR6003_HW_2_1_1_FIRMWARE_FILE "athwlan.bin" | |
129 | #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" | |
cd23c1c9 AY |
130 | #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE "utf.bin" |
131 | #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin" | |
c0038972 | 132 | #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin" |
0d0192ba KV |
133 | #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin" |
134 | #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \ | |
135 | "ath6k/AR6003/hw2.1.1/bdata.SD31.bin" | |
bdcd8170 | 136 | |
31024d99 | 137 | /* AR6004 1.0 definitions */ |
0d0192ba | 138 | #define AR6004_HW_1_0_VERSION 0x30000623 |
c0038972 KV |
139 | #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0" |
140 | #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin" | |
0d0192ba KV |
141 | #define AR6004_HW_1_0_BOARD_DATA_FILE "ath6k/AR6004/hw1.0/bdata.bin" |
142 | #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \ | |
d5720e59 KV |
143 | "ath6k/AR6004/hw1.0/bdata.DB132.bin" |
144 | ||
145 | /* AR6004 1.1 definitions */ | |
0d0192ba | 146 | #define AR6004_HW_1_1_VERSION 0x30000001 |
c0038972 KV |
147 | #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1" |
148 | #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin" | |
0d0192ba KV |
149 | #define AR6004_HW_1_1_BOARD_DATA_FILE "ath6k/AR6004/hw1.1/bdata.bin" |
150 | #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \ | |
d5720e59 | 151 | "ath6k/AR6004/hw1.1/bdata.DB132.bin" |
31024d99 | 152 | |
bdcd8170 KV |
153 | /* Per STA data, used in AP mode */ |
154 | #define STA_PS_AWAKE BIT(0) | |
155 | #define STA_PS_SLEEP BIT(1) | |
156 | #define STA_PS_POLLED BIT(2) | |
c1762a3f TP |
157 | #define STA_PS_APSD_TRIGGER BIT(3) |
158 | #define STA_PS_APSD_EOSP BIT(4) | |
bdcd8170 KV |
159 | |
160 | /* HTC TX packet tagging definitions */ | |
161 | #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED | |
162 | #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1) | |
163 | ||
164 | #define AR6003_CUST_DATA_SIZE 16 | |
165 | ||
166 | #define AGGR_WIN_IDX(x, y) ((x) % (y)) | |
167 | #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y)) | |
168 | #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y)) | |
169 | #define ATH6KL_MAX_SEQ_NO 0xFFF | |
170 | #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO) | |
171 | ||
172 | #define NUM_OF_TIDS 8 | |
173 | #define AGGR_SZ_DEFAULT 8 | |
174 | ||
175 | #define AGGR_WIN_SZ_MIN 2 | |
176 | #define AGGR_WIN_SZ_MAX 8 | |
177 | ||
178 | #define TID_WINDOW_SZ(_x) ((_x) << 1) | |
179 | ||
180 | #define AGGR_NUM_OF_FREE_NETBUFS 16 | |
181 | ||
182 | #define AGGR_RX_TIMEOUT 400 /* in ms */ | |
183 | ||
184 | #define WMI_TIMEOUT (2 * HZ) | |
185 | ||
186 | #define MBOX_YIELD_LIMIT 99 | |
187 | ||
8f46fccd RM |
188 | #define ATH6KL_DEFAULT_LISTEN_INTVAL 100 /* in TUs */ |
189 | ||
bdcd8170 KV |
190 | /* configuration lags */ |
191 | /* | |
192 | * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in | |
193 | * ERP IE of beacon to determine the short premable support when | |
194 | * sending (Re)Assoc req. | |
195 | * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power | |
196 | * module state transition failure events which happen during | |
197 | * scan, to the host. | |
198 | */ | |
199 | #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0) | |
200 | #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1) | |
201 | #define ATH6KL_CONF_ENABLE_11N BIT(2) | |
202 | #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3) | |
e390af77 | 203 | #define ATH6KL_CONF_UART_DEBUG BIT(4) |
bdcd8170 KV |
204 | |
205 | enum wlan_low_pwr_state { | |
206 | WLAN_POWER_STATE_ON, | |
207 | WLAN_POWER_STATE_CUT_PWR, | |
208 | WLAN_POWER_STATE_DEEP_SLEEP, | |
209 | WLAN_POWER_STATE_WOW | |
210 | }; | |
211 | ||
212 | enum sme_state { | |
213 | SME_DISCONNECTED, | |
214 | SME_CONNECTING, | |
215 | SME_CONNECTED | |
216 | }; | |
217 | ||
bdcd8170 KV |
218 | struct skb_hold_q { |
219 | struct sk_buff *skb; | |
220 | bool is_amsdu; | |
221 | u16 seq_no; | |
222 | }; | |
223 | ||
224 | struct rxtid { | |
225 | bool aggr; | |
226 | bool progress; | |
227 | bool timer_mon; | |
228 | u16 win_sz; | |
229 | u16 seq_next; | |
230 | u32 hold_q_sz; | |
231 | struct skb_hold_q *hold_q; | |
232 | struct sk_buff_head q; | |
233 | spinlock_t lock; | |
234 | }; | |
235 | ||
236 | struct rxtid_stats { | |
237 | u32 num_into_aggr; | |
238 | u32 num_dups; | |
239 | u32 num_oow; | |
240 | u32 num_mpdu; | |
241 | u32 num_amsdu; | |
242 | u32 num_delivered; | |
243 | u32 num_timeouts; | |
244 | u32 num_hole; | |
245 | u32 num_bar; | |
246 | }; | |
247 | ||
7baef812 | 248 | struct aggr_info_conn { |
bdcd8170 KV |
249 | u8 aggr_sz; |
250 | u8 timer_scheduled; | |
251 | struct timer_list timer; | |
252 | struct net_device *dev; | |
253 | struct rxtid rx_tid[NUM_OF_TIDS]; | |
bdcd8170 | 254 | struct rxtid_stats stat[NUM_OF_TIDS]; |
7baef812 VT |
255 | struct aggr_info *aggr_info; |
256 | }; | |
257 | ||
258 | struct aggr_info { | |
259 | struct aggr_info_conn *aggr_conn; | |
260 | struct sk_buff_head rx_amsdu_freeq; | |
bdcd8170 KV |
261 | }; |
262 | ||
263 | struct ath6kl_wep_key { | |
264 | u8 key_index; | |
265 | u8 key_len; | |
266 | u8 key[64]; | |
267 | }; | |
268 | ||
269 | #define ATH6KL_KEY_SEQ_LEN 8 | |
270 | ||
271 | struct ath6kl_key { | |
272 | u8 key[WLAN_MAX_KEY_LEN]; | |
273 | u8 key_len; | |
274 | u8 seq[ATH6KL_KEY_SEQ_LEN]; | |
275 | u8 seq_len; | |
276 | u32 cipher; | |
277 | }; | |
278 | ||
279 | struct ath6kl_node_mapping { | |
280 | u8 mac_addr[ETH_ALEN]; | |
281 | u8 ep_id; | |
282 | u8 tx_pend; | |
283 | }; | |
284 | ||
285 | struct ath6kl_cookie { | |
286 | struct sk_buff *skb; | |
287 | u32 map_no; | |
288 | struct htc_packet htc_pkt; | |
289 | struct ath6kl_cookie *arc_list_next; | |
290 | }; | |
291 | ||
d0ff7383 NG |
292 | struct ath6kl_mgmt_buff { |
293 | struct list_head list; | |
294 | u32 freq; | |
295 | u32 wait; | |
296 | u32 id; | |
297 | bool no_cck; | |
298 | size_t len; | |
299 | u8 buf[0]; | |
300 | }; | |
301 | ||
bdcd8170 KV |
302 | struct ath6kl_sta { |
303 | u16 sta_flags; | |
304 | u8 mac[ETH_ALEN]; | |
305 | u8 aid; | |
306 | u8 keymgmt; | |
307 | u8 ucipher; | |
308 | u8 auth; | |
309 | u8 wpa_ie[ATH6KL_MAX_IE]; | |
310 | struct sk_buff_head psq; | |
311 | spinlock_t psq_lock; | |
d0ff7383 NG |
312 | struct list_head mgmt_psq; |
313 | size_t mgmt_psq_len; | |
c1762a3f TP |
314 | u8 apsd_info; |
315 | struct sk_buff_head apsdq; | |
1d2a4456 | 316 | struct aggr_info_conn *aggr_conn; |
bdcd8170 KV |
317 | }; |
318 | ||
319 | struct ath6kl_version { | |
320 | u32 target_ver; | |
321 | u32 wlan_ver; | |
322 | u32 abi_ver; | |
323 | }; | |
324 | ||
325 | struct ath6kl_bmi { | |
326 | u32 cmd_credits; | |
327 | bool done_sent; | |
328 | u8 *cmd_buf; | |
1f4c894d KV |
329 | u32 max_data_size; |
330 | u32 max_cmd_size; | |
bdcd8170 KV |
331 | }; |
332 | ||
333 | struct target_stats { | |
334 | u64 tx_pkt; | |
335 | u64 tx_byte; | |
336 | u64 tx_ucast_pkt; | |
337 | u64 tx_ucast_byte; | |
338 | u64 tx_mcast_pkt; | |
339 | u64 tx_mcast_byte; | |
340 | u64 tx_bcast_pkt; | |
341 | u64 tx_bcast_byte; | |
342 | u64 tx_rts_success_cnt; | |
343 | u64 tx_pkt_per_ac[4]; | |
344 | ||
345 | u64 tx_err; | |
346 | u64 tx_fail_cnt; | |
347 | u64 tx_retry_cnt; | |
348 | u64 tx_mult_retry_cnt; | |
349 | u64 tx_rts_fail_cnt; | |
350 | ||
351 | u64 rx_pkt; | |
352 | u64 rx_byte; | |
353 | u64 rx_ucast_pkt; | |
354 | u64 rx_ucast_byte; | |
355 | u64 rx_mcast_pkt; | |
356 | u64 rx_mcast_byte; | |
357 | u64 rx_bcast_pkt; | |
358 | u64 rx_bcast_byte; | |
359 | u64 rx_frgment_pkt; | |
360 | ||
361 | u64 rx_err; | |
362 | u64 rx_crc_err; | |
363 | u64 rx_key_cache_miss; | |
364 | u64 rx_decrypt_err; | |
365 | u64 rx_dupl_frame; | |
366 | ||
367 | u64 tkip_local_mic_fail; | |
368 | u64 tkip_cnter_measures_invoked; | |
369 | u64 tkip_replays; | |
370 | u64 tkip_fmt_err; | |
371 | u64 ccmp_fmt_err; | |
372 | u64 ccmp_replays; | |
373 | ||
374 | u64 pwr_save_fail_cnt; | |
375 | ||
376 | u64 cs_bmiss_cnt; | |
377 | u64 cs_low_rssi_cnt; | |
378 | u64 cs_connect_cnt; | |
379 | u64 cs_discon_cnt; | |
380 | ||
381 | s32 tx_ucast_rate; | |
382 | s32 rx_ucast_rate; | |
383 | ||
384 | u32 lq_val; | |
385 | ||
386 | u32 wow_pkt_dropped; | |
387 | u16 wow_evt_discarded; | |
388 | ||
389 | s16 noise_floor_calib; | |
390 | s16 cs_rssi; | |
391 | s16 cs_ave_beacon_rssi; | |
392 | u8 cs_ave_beacon_snr; | |
393 | u8 cs_last_roam_msec; | |
394 | u8 cs_snr; | |
395 | ||
396 | u8 wow_host_pkt_wakeups; | |
397 | u8 wow_host_evt_wakeups; | |
398 | ||
399 | u32 arp_received; | |
400 | u32 arp_matched; | |
401 | u32 arp_replied; | |
402 | }; | |
403 | ||
404 | struct ath6kl_mbox_info { | |
405 | u32 htc_addr; | |
406 | u32 htc_ext_addr; | |
407 | u32 htc_ext_sz; | |
408 | ||
409 | u32 block_size; | |
410 | ||
411 | u32 gmbox_addr; | |
412 | ||
413 | u32 gmbox_sz; | |
414 | }; | |
415 | ||
416 | /* | |
417 | * 802.11i defines an extended IV for use with non-WEP ciphers. | |
418 | * When the EXTIV bit is set in the key id byte an additional | |
419 | * 4 bytes immediately follow the IV for TKIP. For CCMP the | |
420 | * EXTIV bit is likewise set but the 8 bytes represent the | |
421 | * CCMP header rather than IV+extended-IV. | |
422 | */ | |
423 | ||
424 | #define ATH6KL_KEYBUF_SIZE 16 | |
425 | #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */ | |
426 | ||
427 | #define ATH6KL_KEY_XMIT 0x01 | |
428 | #define ATH6KL_KEY_RECV 0x02 | |
429 | #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */ | |
430 | ||
9a5b1318 | 431 | /* Initial group key for AP mode */ |
bdcd8170 | 432 | struct ath6kl_req_key { |
9a5b1318 JM |
433 | bool valid; |
434 | u8 key_index; | |
435 | int key_type; | |
436 | u8 key[WLAN_MAX_KEY_LEN]; | |
437 | u8 key_len; | |
bdcd8170 KV |
438 | }; |
439 | ||
77eab1e9 KV |
440 | enum ath6kl_hif_type { |
441 | ATH6KL_HIF_TYPE_SDIO, | |
442 | ATH6KL_HIF_TYPE_USB, | |
443 | }; | |
444 | ||
80abaf9b VT |
445 | /* Max number of filters that hw supports */ |
446 | #define ATH6K_MAX_MC_FILTERS_PER_LIST 7 | |
447 | struct ath6kl_mc_filter { | |
448 | struct list_head list; | |
449 | char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE]; | |
450 | }; | |
451 | ||
71f96ee6 KV |
452 | /* |
453 | * Driver's maximum limit, note that some firmwares support only one vif | |
454 | * and the runtime (current) limit must be checked from ar->vif_max. | |
455 | */ | |
b64de356 | 456 | #define ATH6KL_VIF_MAX 3 |
334234b5 | 457 | |
59c98449 VT |
458 | /* vif flags info */ |
459 | enum ath6kl_vif_state { | |
460 | CONNECTED, | |
461 | CONNECT_PEND, | |
462 | WMM_ENABLED, | |
463 | NETQ_STOPPED, | |
464 | DTIM_EXPIRED, | |
465 | NETDEV_REGISTERED, | |
466 | CLEAR_BSSFILTER_ON_BEACON, | |
467 | DTIM_PERIOD_AVAIL, | |
468 | WLAN_ENABLED, | |
b95907a7 | 469 | STATS_UPDATE_PEND, |
081c7a84 | 470 | HOST_SLEEP_MODE_CMD_PROCESSED, |
59c98449 VT |
471 | }; |
472 | ||
108438bc | 473 | struct ath6kl_vif { |
990bd915 | 474 | struct list_head list; |
108438bc VT |
475 | struct wireless_dev wdev; |
476 | struct net_device *ndev; | |
477 | struct ath6kl *ar; | |
478ac027 VT |
478 | /* Lock to protect vif specific net_stats and flags */ |
479 | spinlock_t if_lock; | |
334234b5 | 480 | u8 fw_vif_idx; |
59c98449 | 481 | unsigned long flags; |
3450334f VT |
482 | int ssid_len; |
483 | u8 ssid[IEEE80211_MAX_SSID_LEN]; | |
484 | u8 dot11_auth_mode; | |
485 | u8 auth_mode; | |
486 | u8 prwise_crypto; | |
487 | u8 prwise_crypto_len; | |
488 | u8 grp_crypto; | |
489 | u8 grp_crypto_len; | |
490 | u8 def_txkey_index; | |
f5938f24 VT |
491 | u8 next_mode; |
492 | u8 nw_type; | |
8c8b65e3 VT |
493 | u8 bssid[ETH_ALEN]; |
494 | u8 req_bssid[ETH_ALEN]; | |
f74bac54 VT |
495 | u16 ch_hint; |
496 | u16 bss_ch; | |
6f2a73f9 VT |
497 | struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1]; |
498 | struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1]; | |
2132c69c | 499 | struct aggr_info *aggr_cntxt; |
10509f90 | 500 | |
de3ad713 | 501 | struct timer_list disconnect_timer; |
10509f90 KV |
502 | struct timer_list sched_scan_timer; |
503 | ||
14ee6f6b VT |
504 | struct cfg80211_scan_request *scan_req; |
505 | enum sme_state sme_state; | |
cf5333d7 | 506 | int reconnect_flag; |
1052261e JM |
507 | u32 last_roc_id; |
508 | u32 last_cancel_roc_id; | |
cf5333d7 VT |
509 | u32 send_action_id; |
510 | bool probe_req_report; | |
511 | u16 next_chan; | |
512 | u16 assoc_bss_beacon_int; | |
8f46fccd | 513 | u16 listen_intvl_t; |
cf5333d7 | 514 | u8 assoc_bss_dtim_period; |
b95907a7 VT |
515 | struct net_device_stats net_stats; |
516 | struct target_stats target_stats; | |
80abaf9b VT |
517 | |
518 | struct list_head mc_filter; | |
108438bc VT |
519 | }; |
520 | ||
6cb3c714 RM |
521 | #define WOW_LIST_ID 0 |
522 | #define WOW_HOST_REQ_DELAY 500 /* ms */ | |
523 | ||
10509f90 KV |
524 | #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */ |
525 | ||
bdcd8170 | 526 | /* Flag info */ |
59c98449 VT |
527 | enum ath6kl_dev_state { |
528 | WMI_ENABLED, | |
529 | WMI_READY, | |
530 | WMI_CTRL_EP_FULL, | |
531 | TESTMODE, | |
532 | DESTROY_IN_PROGRESS, | |
533 | SKIP_SCAN, | |
59c98449 | 534 | ROAM_TBL_PEND, |
5fe4dffb | 535 | FIRST_BOOT, |
59c98449 | 536 | }; |
bdcd8170 | 537 | |
76a9fbe2 KV |
538 | enum ath6kl_state { |
539 | ATH6KL_STATE_OFF, | |
540 | ATH6KL_STATE_ON, | |
390a8c8f RM |
541 | ATH6KL_STATE_SUSPENDING, |
542 | ATH6KL_STATE_RESUMING, | |
76a9fbe2 | 543 | ATH6KL_STATE_DEEPSLEEP, |
b4b2a0b1 | 544 | ATH6KL_STATE_CUTPOWER, |
dd6c0c63 | 545 | ATH6KL_STATE_WOW, |
10509f90 | 546 | ATH6KL_STATE_SCHED_SCAN, |
76a9fbe2 KV |
547 | }; |
548 | ||
bdcd8170 KV |
549 | struct ath6kl { |
550 | struct device *dev; | |
be98e3a4 | 551 | struct wiphy *wiphy; |
76a9fbe2 KV |
552 | |
553 | enum ath6kl_state state; | |
5f1127ff | 554 | unsigned int testmode; |
76a9fbe2 | 555 | |
bdcd8170 KV |
556 | struct ath6kl_bmi bmi; |
557 | const struct ath6kl_hif_ops *hif_ops; | |
558 | struct wmi *wmi; | |
559 | int tx_pending[ENDPOINT_MAX]; | |
560 | int total_tx_data_pend; | |
561 | struct htc_target *htc_target; | |
77eab1e9 | 562 | enum ath6kl_hif_type hif_type; |
bdcd8170 | 563 | void *hif_priv; |
990bd915 VT |
564 | struct list_head vif_list; |
565 | /* Lock to avoid race in vif_list entries among add/del/traverse */ | |
566 | spinlock_t list_lock; | |
55055976 | 567 | u8 num_vif; |
368b1b0f | 568 | unsigned int vif_max; |
3226f68a | 569 | u8 max_norm_iface; |
55055976 | 570 | u8 avail_idx_map; |
bdcd8170 KV |
571 | spinlock_t lock; |
572 | struct semaphore sem; | |
e5090444 | 573 | u8 lrssi_roam_threshold; |
bdcd8170 KV |
574 | struct ath6kl_version version; |
575 | u32 target_type; | |
576 | u8 tx_pwr; | |
bdcd8170 KV |
577 | struct ath6kl_node_mapping node_map[MAX_NODE_NUM]; |
578 | u8 ibss_ps_enable; | |
55055976 | 579 | bool ibss_if_active; |
bdcd8170 KV |
580 | u8 node_num; |
581 | u8 next_ep_id; | |
582 | struct ath6kl_cookie *cookie_list; | |
583 | u32 cookie_count; | |
584 | enum htc_endpoint_id ac2ep_map[WMM_NUM_AC]; | |
585 | bool ac_stream_active[WMM_NUM_AC]; | |
586 | u8 ac_stream_pri_map[WMM_NUM_AC]; | |
587 | u8 hiac_stream_active_pri; | |
588 | u8 ep2ac_map[ENDPOINT_MAX]; | |
589 | enum htc_endpoint_id ctrl_ep; | |
3c370398 | 590 | struct ath6kl_htc_credit_info credit_state_info; |
bdcd8170 KV |
591 | u32 connect_ctrl_flags; |
592 | u32 user_key_ctrl; | |
593 | u8 usr_bss_filter; | |
594 | struct ath6kl_sta sta_list[AP_MAX_NUM_STA]; | |
595 | u8 sta_list_index; | |
596 | struct ath6kl_req_key ap_mode_bkey; | |
597 | struct sk_buff_head mcastpsq; | |
598 | spinlock_t mcastpsq_lock; | |
599 | u8 intra_bss; | |
bdcd8170 KV |
600 | struct wmi_ap_mode_stat ap_stats; |
601 | u8 ap_country_code[3]; | |
602 | struct list_head amsdu_rx_buffer_queue; | |
bdcd8170 | 603 | u8 rx_meta_ver; |
bdcd8170 | 604 | enum wlan_low_pwr_state wlan_pwr_state; |
d66ea4f9 | 605 | u8 mac_addr[ETH_ALEN]; |
bdcd8170 | 606 | #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4 |
003353b0 KV |
607 | struct { |
608 | void *rx_report; | |
609 | size_t rx_report_len; | |
610 | } tm; | |
611 | ||
856f4b31 KV |
612 | struct ath6kl_hw { |
613 | u32 id; | |
293badf4 | 614 | const char *name; |
a01ac414 KV |
615 | u32 dataset_patch_addr; |
616 | u32 app_load_addr; | |
617 | u32 app_start_override_addr; | |
991b27ea KV |
618 | u32 board_ext_data_addr; |
619 | u32 reserved_ram_size; | |
0d4d72bf | 620 | u32 board_addr; |
39586bf2 RH |
621 | u32 refclk_hz; |
622 | u32 uarttx_pin; | |
cd23c1c9 | 623 | u32 testscript_addr; |
d1a9421d | 624 | |
c0038972 KV |
625 | struct ath6kl_hw_fw { |
626 | const char *dir; | |
627 | const char *otp; | |
628 | const char *fw; | |
629 | const char *tcmd; | |
630 | const char *patch; | |
cd23c1c9 AY |
631 | const char *utf; |
632 | const char *testscript; | |
c0038972 KV |
633 | } fw; |
634 | ||
d1a9421d KV |
635 | const char *fw_board; |
636 | const char *fw_default_board; | |
a01ac414 KV |
637 | } hw; |
638 | ||
bdcd8170 | 639 | u16 conf_flags; |
e390af77 | 640 | u16 suspend_mode; |
1e9a905d | 641 | u16 wow_suspend_mode; |
bdcd8170 KV |
642 | wait_queue_head_t event_wq; |
643 | struct ath6kl_mbox_info mbox_info; | |
644 | ||
645 | struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM]; | |
bdcd8170 KV |
646 | unsigned long flag; |
647 | ||
648 | u8 *fw_board; | |
649 | size_t fw_board_len; | |
650 | ||
651 | u8 *fw_otp; | |
652 | size_t fw_otp_len; | |
653 | ||
654 | u8 *fw; | |
655 | size_t fw_len; | |
656 | ||
657 | u8 *fw_patch; | |
658 | size_t fw_patch_len; | |
659 | ||
cd23c1c9 AY |
660 | u8 *fw_testscript; |
661 | size_t fw_testscript_len; | |
662 | ||
65a8b4cc | 663 | unsigned int fw_api; |
97e0496d KV |
664 | unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN]; |
665 | ||
bdcd8170 | 666 | struct workqueue_struct *ath6kl_wq; |
7c3075e9 | 667 | |
d999ba3e | 668 | struct dentry *debugfs_phy; |
6a7c9bad | 669 | |
6bbc7c35 JM |
670 | bool p2p; |
671 | ||
e5348a1e VT |
672 | bool wiphy_registered; |
673 | ||
bdf5396b KV |
674 | #ifdef CONFIG_ATH6KL_DEBUG |
675 | struct { | |
9b9a4f2a | 676 | struct sk_buff_head fwlog_queue; |
c807b30d KV |
677 | struct completion fwlog_completion; |
678 | bool fwlog_open; | |
679 | ||
939f1cce | 680 | u32 fwlog_mask; |
9b9a4f2a | 681 | |
91d57de5 | 682 | unsigned int dbgfs_diag_reg; |
252c068b VT |
683 | u32 diag_reg_addr_wr; |
684 | u32 diag_reg_val_wr; | |
9a730834 KV |
685 | |
686 | struct { | |
687 | unsigned int invalid_rate; | |
688 | } war_stats; | |
4b28a80d JM |
689 | |
690 | u8 *roam_tbl; | |
691 | unsigned int roam_tbl_len; | |
ff0b0075 JM |
692 | |
693 | u8 keepalive; | |
694 | u8 disc_timeout; | |
bdf5396b KV |
695 | } debug; |
696 | #endif /* CONFIG_ATH6KL_DEBUG */ | |
bdcd8170 KV |
697 | }; |
698 | ||
d6d5c06c | 699 | static inline struct ath6kl *ath6kl_priv(struct net_device *dev) |
bdcd8170 | 700 | { |
108438bc | 701 | return ((struct ath6kl_vif *) netdev_priv(dev))->ar; |
bdcd8170 KV |
702 | } |
703 | ||
bc07ddb2 KV |
704 | static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar, |
705 | u32 item_offset) | |
706 | { | |
707 | u32 addr = 0; | |
708 | ||
709 | if (ar->target_type == TARGET_TYPE_AR6003) | |
710 | addr = ATH6KL_AR6003_HI_START_ADDR + item_offset; | |
711 | else if (ar->target_type == TARGET_TYPE_AR6004) | |
712 | addr = ATH6KL_AR6004_HI_START_ADDR + item_offset; | |
713 | ||
714 | return addr; | |
715 | } | |
716 | ||
bdcd8170 KV |
717 | int ath6kl_configure_target(struct ath6kl *ar); |
718 | void ath6kl_detect_error(unsigned long ptr); | |
719 | void disconnect_timer_handler(unsigned long ptr); | |
720 | void init_netdev(struct net_device *dev); | |
721 | void ath6kl_cookie_init(struct ath6kl *ar); | |
722 | void ath6kl_cookie_cleanup(struct ath6kl *ar); | |
723 | void ath6kl_rx(struct htc_target *target, struct htc_packet *packet); | |
724 | void ath6kl_tx_complete(void *context, struct list_head *packet_queue); | |
725 | enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target, | |
726 | struct htc_packet *packet); | |
727 | void ath6kl_stop_txrx(struct ath6kl *ar); | |
728 | void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar); | |
f9ea0753 | 729 | int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value); |
addb44be KV |
730 | int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length); |
731 | int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value); | |
732 | int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length); | |
bc07ddb2 | 733 | int ath6kl_read_fwlogs(struct ath6kl *ar); |
e29f25f5 | 734 | void ath6kl_init_profile_info(struct ath6kl_vif *vif); |
bdcd8170 | 735 | void ath6kl_tx_data_cleanup(struct ath6kl *ar); |
bdcd8170 KV |
736 | |
737 | struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar); | |
738 | void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie); | |
739 | int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev); | |
740 | ||
7baef812 | 741 | struct aggr_info *aggr_init(struct ath6kl_vif *vif); |
c8651541 VT |
742 | void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info, |
743 | struct aggr_info_conn *aggr_conn); | |
bdcd8170 KV |
744 | void ath6kl_rx_refill(struct htc_target *target, |
745 | enum htc_endpoint_id endpoint); | |
746 | void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count); | |
747 | struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target, | |
748 | enum htc_endpoint_id endpoint, | |
749 | int len); | |
750 | void aggr_module_destroy(struct aggr_info *aggr_info); | |
1d2a4456 | 751 | void aggr_reset_state(struct aggr_info_conn *aggr_conn); |
bdcd8170 | 752 | |
6765d0aa | 753 | struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 * node_addr); |
bdcd8170 KV |
754 | struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid); |
755 | ||
756 | void ath6kl_ready_event(void *devt, u8 * datap, u32 sw_ver, u32 abi_ver); | |
757 | int ath6kl_control_tx(void *devt, struct sk_buff *skb, | |
758 | enum htc_endpoint_id eid); | |
240d2799 | 759 | void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel, |
bdcd8170 KV |
760 | u8 *bssid, u16 listen_int, |
761 | u16 beacon_int, enum network_type net_type, | |
762 | u8 beacon_ie_len, u8 assoc_req_len, | |
763 | u8 assoc_resp_len, u8 *assoc_info); | |
240d2799 VT |
764 | void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel); |
765 | void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr, | |
572e27c0 | 766 | u8 keymgmt, u8 ucipher, u8 auth, |
c1762a3f | 767 | u8 assoc_req_len, u8 *assoc_info, u8 apsd_info); |
240d2799 | 768 | void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason, |
bdcd8170 KV |
769 | u8 *bssid, u8 assoc_resp_len, |
770 | u8 *assoc_info, u16 prot_reason_status); | |
240d2799 | 771 | void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast); |
bdcd8170 | 772 | void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr); |
240d2799 VT |
773 | void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status); |
774 | void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len); | |
bdcd8170 KV |
775 | void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active); |
776 | enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac); | |
777 | ||
240d2799 | 778 | void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid); |
bdcd8170 | 779 | |
240d2799 VT |
780 | void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif); |
781 | void ath6kl_disconnect(struct ath6kl_vif *vif); | |
240d2799 VT |
782 | void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid); |
783 | void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no, | |
bdcd8170 KV |
784 | u8 win_sz); |
785 | void ath6kl_wakeup_event(void *dev); | |
bdcd8170 | 786 | |
6db8fa53 VT |
787 | void ath6kl_reset_device(struct ath6kl *ar, u32 target_type, |
788 | bool wait_fot_compltn, bool cold_reset); | |
e29f25f5 | 789 | void ath6kl_init_control_info(struct ath6kl_vif *vif); |
990bd915 | 790 | struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar); |
55055976 | 791 | void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready); |
5fe4dffb KV |
792 | int ath6kl_init_hw_start(struct ath6kl *ar); |
793 | int ath6kl_init_hw_stop(struct ath6kl *ar); | |
45eaa78f KV |
794 | int ath6kl_init_fetch_firmwares(struct ath6kl *ar); |
795 | int ath6kl_init_hw_params(struct ath6kl *ar); | |
796 | ||
a918fb3c | 797 | void ath6kl_check_wow_status(struct ath6kl *ar); |
5fe4dffb | 798 | |
45eaa78f KV |
799 | struct ath6kl *ath6kl_core_create(struct device *dev); |
800 | int ath6kl_core_init(struct ath6kl *ar); | |
801 | void ath6kl_core_cleanup(struct ath6kl *ar); | |
802 | void ath6kl_core_destroy(struct ath6kl *ar); | |
803 | ||
bdcd8170 | 804 | #endif /* CORE_H */ |