Commit | Line | Data |
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bdcd8170 KV |
1 | |
2 | /* | |
3 | * Copyright (c) 2011 Atheros Communications Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
c6efe578 | 18 | #include <linux/moduleparam.h> |
f7830202 | 19 | #include <linux/errno.h> |
92ecbff4 | 20 | #include <linux/of.h> |
bdcd8170 KV |
21 | #include <linux/mmc/sdio_func.h> |
22 | #include "core.h" | |
23 | #include "cfg80211.h" | |
24 | #include "target.h" | |
25 | #include "debug.h" | |
26 | #include "hif-ops.h" | |
27 | ||
28 | unsigned int debug_mask; | |
003353b0 | 29 | static unsigned int testmode; |
8277de15 | 30 | static bool suspend_cutpower; |
bdcd8170 KV |
31 | |
32 | module_param(debug_mask, uint, 0644); | |
003353b0 | 33 | module_param(testmode, uint, 0644); |
8277de15 | 34 | module_param(suspend_cutpower, bool, 0444); |
bdcd8170 | 35 | |
856f4b31 KV |
36 | static const struct ath6kl_hw hw_list[] = { |
37 | { | |
0d0192ba | 38 | .id = AR6003_HW_2_0_VERSION, |
293badf4 | 39 | .name = "ar6003 hw 2.0", |
856f4b31 KV |
40 | .dataset_patch_addr = 0x57e884, |
41 | .app_load_addr = 0x543180, | |
42 | .board_ext_data_addr = 0x57e500, | |
43 | .reserved_ram_size = 6912, | |
39586bf2 RH |
44 | .refclk_hz = 26000000, |
45 | .uarttx_pin = 8, | |
856f4b31 KV |
46 | |
47 | /* hw2.0 needs override address hardcoded */ | |
48 | .app_start_override_addr = 0x944C00, | |
d1a9421d | 49 | |
c0038972 KV |
50 | .fw = { |
51 | .dir = AR6003_HW_2_0_FW_DIR, | |
52 | .otp = AR6003_HW_2_0_OTP_FILE, | |
53 | .fw = AR6003_HW_2_0_FIRMWARE_FILE, | |
54 | .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, | |
55 | .patch = AR6003_HW_2_0_PATCH_FILE, | |
c0038972 KV |
56 | }, |
57 | ||
d1a9421d KV |
58 | .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, |
59 | .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, | |
856f4b31 KV |
60 | }, |
61 | { | |
0d0192ba | 62 | .id = AR6003_HW_2_1_1_VERSION, |
293badf4 | 63 | .name = "ar6003 hw 2.1.1", |
856f4b31 KV |
64 | .dataset_patch_addr = 0x57ff74, |
65 | .app_load_addr = 0x1234, | |
66 | .board_ext_data_addr = 0x542330, | |
67 | .reserved_ram_size = 512, | |
39586bf2 RH |
68 | .refclk_hz = 26000000, |
69 | .uarttx_pin = 8, | |
d1a9421d | 70 | |
c0038972 KV |
71 | .fw = { |
72 | .dir = AR6003_HW_2_1_1_FW_DIR, | |
73 | .otp = AR6003_HW_2_1_1_OTP_FILE, | |
74 | .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, | |
75 | .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, | |
76 | .patch = AR6003_HW_2_1_1_PATCH_FILE, | |
c0038972 KV |
77 | }, |
78 | ||
d1a9421d KV |
79 | .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, |
80 | .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, | |
856f4b31 KV |
81 | }, |
82 | { | |
0d0192ba | 83 | .id = AR6004_HW_1_0_VERSION, |
293badf4 | 84 | .name = "ar6004 hw 1.0", |
856f4b31 KV |
85 | .dataset_patch_addr = 0x57e884, |
86 | .app_load_addr = 0x1234, | |
87 | .board_ext_data_addr = 0x437000, | |
88 | .reserved_ram_size = 19456, | |
0d4d72bf | 89 | .board_addr = 0x433900, |
39586bf2 RH |
90 | .refclk_hz = 26000000, |
91 | .uarttx_pin = 11, | |
d1a9421d | 92 | |
c0038972 KV |
93 | .fw = { |
94 | .dir = AR6004_HW_1_0_FW_DIR, | |
95 | .fw = AR6004_HW_1_0_FIRMWARE_FILE, | |
c0038972 KV |
96 | }, |
97 | ||
d1a9421d KV |
98 | .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, |
99 | .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, | |
856f4b31 KV |
100 | }, |
101 | { | |
0d0192ba | 102 | .id = AR6004_HW_1_1_VERSION, |
293badf4 | 103 | .name = "ar6004 hw 1.1", |
856f4b31 KV |
104 | .dataset_patch_addr = 0x57e884, |
105 | .app_load_addr = 0x1234, | |
106 | .board_ext_data_addr = 0x437000, | |
107 | .reserved_ram_size = 11264, | |
0d4d72bf | 108 | .board_addr = 0x43d400, |
39586bf2 RH |
109 | .refclk_hz = 40000000, |
110 | .uarttx_pin = 11, | |
d1a9421d | 111 | |
c0038972 KV |
112 | .fw = { |
113 | .dir = AR6004_HW_1_1_FW_DIR, | |
114 | .fw = AR6004_HW_1_1_FIRMWARE_FILE, | |
c0038972 KV |
115 | }, |
116 | ||
d1a9421d KV |
117 | .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, |
118 | .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, | |
856f4b31 KV |
119 | }, |
120 | }; | |
121 | ||
bdcd8170 KV |
122 | /* |
123 | * Include definitions here that can be used to tune the WLAN module | |
124 | * behavior. Different customers can tune the behavior as per their needs, | |
125 | * here. | |
126 | */ | |
127 | ||
128 | /* | |
129 | * This configuration item enable/disable keepalive support. | |
130 | * Keepalive support: In the absence of any data traffic to AP, null | |
131 | * frames will be sent to the AP at periodic interval, to keep the association | |
132 | * active. This configuration item defines the periodic interval. | |
133 | * Use value of zero to disable keepalive support | |
134 | * Default: 60 seconds | |
135 | */ | |
136 | #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 | |
137 | ||
138 | /* | |
139 | * This configuration item sets the value of disconnect timeout | |
140 | * Firmware delays sending the disconnec event to the host for this | |
141 | * timeout after is gets disconnected from the current AP. | |
142 | * If the firmware successly roams within the disconnect timeout | |
143 | * it sends a new connect event | |
144 | */ | |
145 | #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 | |
146 | ||
bdcd8170 | 147 | |
bdcd8170 KV |
148 | #define ATH6KL_DATA_OFFSET 64 |
149 | struct sk_buff *ath6kl_buf_alloc(int size) | |
150 | { | |
151 | struct sk_buff *skb; | |
152 | u16 reserved; | |
153 | ||
154 | /* Add chacheline space at front and back of buffer */ | |
155 | reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + | |
1df94a85 | 156 | sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; |
bdcd8170 KV |
157 | skb = dev_alloc_skb(size + reserved); |
158 | ||
159 | if (skb) | |
160 | skb_reserve(skb, reserved - L1_CACHE_BYTES); | |
161 | return skb; | |
162 | } | |
163 | ||
e29f25f5 | 164 | void ath6kl_init_profile_info(struct ath6kl_vif *vif) |
bdcd8170 | 165 | { |
3450334f VT |
166 | vif->ssid_len = 0; |
167 | memset(vif->ssid, 0, sizeof(vif->ssid)); | |
168 | ||
169 | vif->dot11_auth_mode = OPEN_AUTH; | |
170 | vif->auth_mode = NONE_AUTH; | |
171 | vif->prwise_crypto = NONE_CRYPT; | |
172 | vif->prwise_crypto_len = 0; | |
173 | vif->grp_crypto = NONE_CRYPT; | |
174 | vif->grp_crypto_len = 0; | |
6f2a73f9 | 175 | memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); |
8c8b65e3 VT |
176 | memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); |
177 | memset(vif->bssid, 0, sizeof(vif->bssid)); | |
f74bac54 | 178 | vif->bss_ch = 0; |
bdcd8170 KV |
179 | } |
180 | ||
bdcd8170 KV |
181 | static int ath6kl_set_host_app_area(struct ath6kl *ar) |
182 | { | |
183 | u32 address, data; | |
184 | struct host_app_area host_app_area; | |
185 | ||
186 | /* Fetch the address of the host_app_area_s | |
187 | * instance in the host interest area */ | |
188 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); | |
31024d99 | 189 | address = TARG_VTOP(ar->target_type, address); |
bdcd8170 | 190 | |
addb44be | 191 | if (ath6kl_diag_read32(ar, address, &data)) |
bdcd8170 KV |
192 | return -EIO; |
193 | ||
31024d99 | 194 | address = TARG_VTOP(ar->target_type, data); |
cbf49a6f | 195 | host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); |
addb44be KV |
196 | if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, |
197 | sizeof(struct host_app_area))) | |
bdcd8170 KV |
198 | return -EIO; |
199 | ||
200 | return 0; | |
201 | } | |
202 | ||
203 | static inline void set_ac2_ep_map(struct ath6kl *ar, | |
204 | u8 ac, | |
205 | enum htc_endpoint_id ep) | |
206 | { | |
207 | ar->ac2ep_map[ac] = ep; | |
208 | ar->ep2ac_map[ep] = ac; | |
209 | } | |
210 | ||
211 | /* connect to a service */ | |
212 | static int ath6kl_connectservice(struct ath6kl *ar, | |
213 | struct htc_service_connect_req *con_req, | |
214 | char *desc) | |
215 | { | |
216 | int status; | |
217 | struct htc_service_connect_resp response; | |
218 | ||
219 | memset(&response, 0, sizeof(response)); | |
220 | ||
ad226ec2 | 221 | status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); |
bdcd8170 KV |
222 | if (status) { |
223 | ath6kl_err("failed to connect to %s service status:%d\n", | |
224 | desc, status); | |
225 | return status; | |
226 | } | |
227 | ||
228 | switch (con_req->svc_id) { | |
229 | case WMI_CONTROL_SVC: | |
230 | if (test_bit(WMI_ENABLED, &ar->flag)) | |
231 | ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); | |
232 | ar->ctrl_ep = response.endpoint; | |
233 | break; | |
234 | case WMI_DATA_BE_SVC: | |
235 | set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); | |
236 | break; | |
237 | case WMI_DATA_BK_SVC: | |
238 | set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); | |
239 | break; | |
240 | case WMI_DATA_VI_SVC: | |
241 | set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); | |
242 | break; | |
243 | case WMI_DATA_VO_SVC: | |
244 | set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); | |
245 | break; | |
246 | default: | |
247 | ath6kl_err("service id is not mapped %d\n", con_req->svc_id); | |
248 | return -EINVAL; | |
249 | } | |
250 | ||
251 | return 0; | |
252 | } | |
253 | ||
254 | static int ath6kl_init_service_ep(struct ath6kl *ar) | |
255 | { | |
256 | struct htc_service_connect_req connect; | |
257 | ||
258 | memset(&connect, 0, sizeof(connect)); | |
259 | ||
260 | /* these fields are the same for all service endpoints */ | |
261 | connect.ep_cb.rx = ath6kl_rx; | |
262 | connect.ep_cb.rx_refill = ath6kl_rx_refill; | |
263 | connect.ep_cb.tx_full = ath6kl_tx_queue_full; | |
264 | ||
265 | /* | |
266 | * Set the max queue depth so that our ath6kl_tx_queue_full handler | |
267 | * gets called. | |
268 | */ | |
269 | connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; | |
270 | connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; | |
271 | if (!connect.ep_cb.rx_refill_thresh) | |
272 | connect.ep_cb.rx_refill_thresh++; | |
273 | ||
274 | /* connect to control service */ | |
275 | connect.svc_id = WMI_CONTROL_SVC; | |
276 | if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) | |
277 | return -EIO; | |
278 | ||
279 | connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; | |
280 | ||
281 | /* | |
282 | * Limit the HTC message size on the send path, although e can | |
283 | * receive A-MSDU frames of 4K, we will only send ethernet-sized | |
284 | * (802.3) frames on the send path. | |
285 | */ | |
286 | connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; | |
287 | ||
288 | /* | |
289 | * To reduce the amount of committed memory for larger A_MSDU | |
290 | * frames, use the recv-alloc threshold mechanism for larger | |
291 | * packets. | |
292 | */ | |
293 | connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; | |
294 | connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; | |
295 | ||
296 | /* | |
297 | * For the remaining data services set the connection flag to | |
298 | * reduce dribbling, if configured to do so. | |
299 | */ | |
300 | connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; | |
301 | connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; | |
302 | connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; | |
303 | ||
304 | connect.svc_id = WMI_DATA_BE_SVC; | |
305 | ||
306 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) | |
307 | return -EIO; | |
308 | ||
309 | /* connect to back-ground map this to WMI LOW_PRI */ | |
310 | connect.svc_id = WMI_DATA_BK_SVC; | |
311 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) | |
312 | return -EIO; | |
313 | ||
314 | /* connect to Video service, map this to to HI PRI */ | |
315 | connect.svc_id = WMI_DATA_VI_SVC; | |
316 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) | |
317 | return -EIO; | |
318 | ||
319 | /* | |
320 | * Connect to VO service, this is currently not mapped to a WMI | |
321 | * priority stream due to historical reasons. WMI originally | |
322 | * defined 3 priorities over 3 mailboxes We can change this when | |
323 | * WMI is reworked so that priorities are not dependent on | |
324 | * mailboxes. | |
325 | */ | |
326 | connect.svc_id = WMI_DATA_VO_SVC; | |
327 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) | |
328 | return -EIO; | |
329 | ||
330 | return 0; | |
331 | } | |
332 | ||
e29f25f5 | 333 | void ath6kl_init_control_info(struct ath6kl_vif *vif) |
bdcd8170 | 334 | { |
e29f25f5 | 335 | ath6kl_init_profile_info(vif); |
3450334f | 336 | vif->def_txkey_index = 0; |
6f2a73f9 | 337 | memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); |
f74bac54 | 338 | vif->ch_hint = 0; |
bdcd8170 KV |
339 | } |
340 | ||
341 | /* | |
342 | * Set HTC/Mbox operational parameters, this can only be called when the | |
343 | * target is in the BMI phase. | |
344 | */ | |
345 | static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, | |
346 | u8 htc_ctrl_buf) | |
347 | { | |
348 | int status; | |
349 | u32 blk_size; | |
350 | ||
351 | blk_size = ar->mbox_info.block_size; | |
352 | ||
353 | if (htc_ctrl_buf) | |
354 | blk_size |= ((u32)htc_ctrl_buf) << 16; | |
355 | ||
356 | /* set the host interest area for the block size */ | |
357 | status = ath6kl_bmi_write(ar, | |
358 | ath6kl_get_hi_item_addr(ar, | |
359 | HI_ITEM(hi_mbox_io_block_sz)), | |
360 | (u8 *)&blk_size, | |
361 | 4); | |
362 | if (status) { | |
363 | ath6kl_err("bmi_write_memory for IO block size failed\n"); | |
364 | goto out; | |
365 | } | |
366 | ||
367 | ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", | |
368 | blk_size, | |
369 | ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); | |
370 | ||
371 | if (mbox_isr_yield_val) { | |
372 | /* set the host interest area for the mbox ISR yield limit */ | |
373 | status = ath6kl_bmi_write(ar, | |
374 | ath6kl_get_hi_item_addr(ar, | |
375 | HI_ITEM(hi_mbox_isr_yield_limit)), | |
376 | (u8 *)&mbox_isr_yield_val, | |
377 | 4); | |
378 | if (status) { | |
379 | ath6kl_err("bmi_write_memory for yield limit failed\n"); | |
380 | goto out; | |
381 | } | |
382 | } | |
383 | ||
384 | out: | |
385 | return status; | |
386 | } | |
387 | ||
0ce59445 | 388 | static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) |
bdcd8170 KV |
389 | { |
390 | int status = 0; | |
4dea08e0 | 391 | int ret; |
bdcd8170 KV |
392 | |
393 | /* | |
394 | * Configure the device for rx dot11 header rules. "0,0" are the | |
395 | * default values. Required if checksum offload is needed. Set | |
396 | * RxMetaVersion to 2. | |
397 | */ | |
0ce59445 | 398 | if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, |
bdcd8170 KV |
399 | ar->rx_meta_ver, 0, 0)) { |
400 | ath6kl_err("unable to set the rx frame format\n"); | |
401 | status = -EIO; | |
402 | } | |
403 | ||
404 | if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) | |
0ce59445 | 405 | if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, |
bdcd8170 KV |
406 | IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { |
407 | ath6kl_err("unable to set power save fail event policy\n"); | |
408 | status = -EIO; | |
409 | } | |
410 | ||
411 | if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) | |
0ce59445 | 412 | if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, |
bdcd8170 KV |
413 | WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { |
414 | ath6kl_err("unable to set barker preamble policy\n"); | |
415 | status = -EIO; | |
416 | } | |
417 | ||
0ce59445 | 418 | if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, |
bdcd8170 KV |
419 | WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { |
420 | ath6kl_err("unable to set keep alive interval\n"); | |
421 | status = -EIO; | |
422 | } | |
423 | ||
0ce59445 | 424 | if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, |
bdcd8170 KV |
425 | WLAN_CONFIG_DISCONNECT_TIMEOUT)) { |
426 | ath6kl_err("unable to set disconnect timeout\n"); | |
427 | status = -EIO; | |
428 | } | |
429 | ||
430 | if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) | |
0ce59445 | 431 | if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) { |
bdcd8170 KV |
432 | ath6kl_err("unable to set txop bursting\n"); |
433 | status = -EIO; | |
434 | } | |
435 | ||
b64de356 | 436 | if (ar->p2p && (ar->vif_max == 1 || idx)) { |
0ce59445 | 437 | ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, |
6bbc7c35 JM |
438 | P2P_FLAG_CAPABILITIES_REQ | |
439 | P2P_FLAG_MACADDR_REQ | | |
440 | P2P_FLAG_HMODEL_REQ); | |
441 | if (ret) { | |
442 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " | |
443 | "capabilities (%d) - assuming P2P not " | |
444 | "supported\n", ret); | |
445 | ar->p2p = 0; | |
446 | } | |
447 | } | |
448 | ||
b64de356 | 449 | if (ar->p2p && (ar->vif_max == 1 || idx)) { |
6bbc7c35 | 450 | /* Enable Probe Request reporting for P2P */ |
0ce59445 | 451 | ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); |
6bbc7c35 JM |
452 | if (ret) { |
453 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " | |
454 | "Request reporting (%d)\n", ret); | |
455 | } | |
4dea08e0 JM |
456 | } |
457 | ||
bdcd8170 KV |
458 | return status; |
459 | } | |
460 | ||
461 | int ath6kl_configure_target(struct ath6kl *ar) | |
462 | { | |
463 | u32 param, ram_reserved_size; | |
3226f68a | 464 | u8 fw_iftype, fw_mode = 0, fw_submode = 0; |
39586bf2 | 465 | int i, status; |
bdcd8170 | 466 | |
7b85832d VT |
467 | /* |
468 | * Note: Even though the firmware interface type is | |
469 | * chosen as BSS_STA for all three interfaces, can | |
470 | * be configured to IBSS/AP as long as the fw submode | |
471 | * remains normal mode (0 - AP, STA and IBSS). But | |
472 | * due to an target assert in firmware only one interface is | |
473 | * configured for now. | |
474 | */ | |
dd3751f7 | 475 | fw_iftype = HI_OPTION_FW_MODE_BSS_STA; |
bdcd8170 | 476 | |
71f96ee6 | 477 | for (i = 0; i < ar->vif_max; i++) |
7b85832d VT |
478 | fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); |
479 | ||
480 | /* | |
3226f68a VT |
481 | * By default, submodes : |
482 | * vif[0] - AP/STA/IBSS | |
483 | * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" | |
484 | * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" | |
7b85832d | 485 | */ |
3226f68a VT |
486 | |
487 | for (i = 0; i < ar->max_norm_iface; i++) | |
488 | fw_submode |= HI_OPTION_FW_SUBMODE_NONE << | |
489 | (i * HI_OPTION_FW_SUBMODE_BITS); | |
490 | ||
71f96ee6 | 491 | for (i = ar->max_norm_iface; i < ar->vif_max; i++) |
3226f68a VT |
492 | fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << |
493 | (i * HI_OPTION_FW_SUBMODE_BITS); | |
7b85832d | 494 | |
b64de356 | 495 | if (ar->p2p && ar->vif_max == 1) |
7b85832d | 496 | fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; |
7b85832d | 497 | |
bdcd8170 KV |
498 | param = HTC_PROTOCOL_VERSION; |
499 | if (ath6kl_bmi_write(ar, | |
500 | ath6kl_get_hi_item_addr(ar, | |
501 | HI_ITEM(hi_app_host_interest)), | |
502 | (u8 *)¶m, 4) != 0) { | |
503 | ath6kl_err("bmi_write_memory for htc version failed\n"); | |
504 | return -EIO; | |
505 | } | |
506 | ||
507 | /* set the firmware mode to STA/IBSS/AP */ | |
508 | param = 0; | |
509 | ||
510 | if (ath6kl_bmi_read(ar, | |
511 | ath6kl_get_hi_item_addr(ar, | |
512 | HI_ITEM(hi_option_flag)), | |
513 | (u8 *)¶m, 4) != 0) { | |
514 | ath6kl_err("bmi_read_memory for setting fwmode failed\n"); | |
515 | return -EIO; | |
516 | } | |
517 | ||
71f96ee6 | 518 | param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); |
7b85832d VT |
519 | param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; |
520 | param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; | |
521 | ||
bdcd8170 KV |
522 | param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); |
523 | param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
524 | ||
525 | if (ath6kl_bmi_write(ar, | |
526 | ath6kl_get_hi_item_addr(ar, | |
527 | HI_ITEM(hi_option_flag)), | |
528 | (u8 *)¶m, | |
529 | 4) != 0) { | |
530 | ath6kl_err("bmi_write_memory for setting fwmode failed\n"); | |
531 | return -EIO; | |
532 | } | |
533 | ||
534 | ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); | |
535 | ||
536 | /* | |
537 | * Hardcode the address use for the extended board data | |
538 | * Ideally this should be pre-allocate by the OS at boot time | |
539 | * But since it is a new feature and board data is loaded | |
540 | * at init time, we have to workaround this from host. | |
541 | * It is difficult to patch the firmware boot code, | |
542 | * but possible in theory. | |
543 | */ | |
544 | ||
991b27ea KV |
545 | param = ar->hw.board_ext_data_addr; |
546 | ram_reserved_size = ar->hw.reserved_ram_size; | |
bdcd8170 | 547 | |
991b27ea KV |
548 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, |
549 | HI_ITEM(hi_board_ext_data)), | |
550 | (u8 *)¶m, 4) != 0) { | |
551 | ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); | |
552 | return -EIO; | |
553 | } | |
554 | ||
555 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, | |
556 | HI_ITEM(hi_end_ram_reserve_sz)), | |
557 | (u8 *)&ram_reserved_size, 4) != 0) { | |
558 | ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); | |
559 | return -EIO; | |
bdcd8170 KV |
560 | } |
561 | ||
562 | /* set the block size for the target */ | |
563 | if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) | |
564 | /* use default number of control buffers */ | |
565 | return -EIO; | |
566 | ||
39586bf2 RH |
567 | /* Configure GPIO AR600x UART */ |
568 | param = ar->hw.uarttx_pin; | |
569 | status = ath6kl_bmi_write(ar, | |
570 | ath6kl_get_hi_item_addr(ar, | |
571 | HI_ITEM(hi_dbg_uart_txpin)), | |
572 | (u8 *)¶m, 4); | |
573 | if (status) | |
574 | return status; | |
575 | ||
576 | /* Configure target refclk_hz */ | |
577 | param = ar->hw.refclk_hz; | |
578 | status = ath6kl_bmi_write(ar, | |
579 | ath6kl_get_hi_item_addr(ar, | |
580 | HI_ITEM(hi_refclk_hz)), | |
581 | (u8 *)¶m, 4); | |
582 | if (status) | |
583 | return status; | |
584 | ||
bdcd8170 KV |
585 | return 0; |
586 | } | |
587 | ||
8dafb70e | 588 | void ath6kl_core_free(struct ath6kl *ar) |
bdcd8170 | 589 | { |
8dafb70e | 590 | wiphy_free(ar->wiphy); |
bdcd8170 KV |
591 | } |
592 | ||
6db8fa53 | 593 | void ath6kl_core_cleanup(struct ath6kl *ar) |
bdcd8170 | 594 | { |
b2e75698 KV |
595 | ath6kl_hif_power_off(ar); |
596 | ||
6db8fa53 | 597 | destroy_workqueue(ar->ath6kl_wq); |
bdcd8170 | 598 | |
6db8fa53 VT |
599 | if (ar->htc_target) |
600 | ath6kl_htc_cleanup(ar->htc_target); | |
601 | ||
602 | ath6kl_cookie_cleanup(ar); | |
603 | ||
604 | ath6kl_cleanup_amsdu_rxbufs(ar); | |
605 | ||
606 | ath6kl_bmi_cleanup(ar); | |
607 | ||
608 | ath6kl_debug_cleanup(ar); | |
609 | ||
610 | kfree(ar->fw_board); | |
611 | kfree(ar->fw_otp); | |
612 | kfree(ar->fw); | |
613 | kfree(ar->fw_patch); | |
614 | ||
615 | ath6kl_deinit_ieee80211_hw(ar); | |
bdcd8170 KV |
616 | } |
617 | ||
618 | /* firmware upload */ | |
bdcd8170 KV |
619 | static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, |
620 | u8 **fw, size_t *fw_len) | |
621 | { | |
622 | const struct firmware *fw_entry; | |
623 | int ret; | |
624 | ||
625 | ret = request_firmware(&fw_entry, filename, ar->dev); | |
626 | if (ret) | |
627 | return ret; | |
628 | ||
629 | *fw_len = fw_entry->size; | |
630 | *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); | |
631 | ||
632 | if (*fw == NULL) | |
633 | ret = -ENOMEM; | |
634 | ||
635 | release_firmware(fw_entry); | |
636 | ||
637 | return ret; | |
638 | } | |
639 | ||
92ecbff4 | 640 | #ifdef CONFIG_OF |
92ecbff4 SL |
641 | /* |
642 | * Check the device tree for a board-id and use it to construct | |
643 | * the pathname to the firmware file. Used (for now) to find a | |
644 | * fallback to the "bdata.bin" file--typically a symlink to the | |
645 | * appropriate board-specific file. | |
646 | */ | |
647 | static bool check_device_tree(struct ath6kl *ar) | |
648 | { | |
649 | static const char *board_id_prop = "atheros,board-id"; | |
650 | struct device_node *node; | |
651 | char board_filename[64]; | |
652 | const char *board_id; | |
653 | int ret; | |
654 | ||
655 | for_each_compatible_node(node, NULL, "atheros,ath6kl") { | |
656 | board_id = of_get_property(node, board_id_prop, NULL); | |
657 | if (board_id == NULL) { | |
658 | ath6kl_warn("No \"%s\" property on %s node.\n", | |
659 | board_id_prop, node->name); | |
660 | continue; | |
661 | } | |
662 | snprintf(board_filename, sizeof(board_filename), | |
c0038972 | 663 | "%s/bdata.%s.bin", ar->hw.fw.dir, board_id); |
92ecbff4 SL |
664 | |
665 | ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, | |
666 | &ar->fw_board_len); | |
667 | if (ret) { | |
668 | ath6kl_err("Failed to get DT board file %s: %d\n", | |
669 | board_filename, ret); | |
670 | continue; | |
671 | } | |
672 | return true; | |
673 | } | |
674 | return false; | |
675 | } | |
676 | #else | |
677 | static bool check_device_tree(struct ath6kl *ar) | |
678 | { | |
679 | return false; | |
680 | } | |
681 | #endif /* CONFIG_OF */ | |
682 | ||
bdcd8170 KV |
683 | static int ath6kl_fetch_board_file(struct ath6kl *ar) |
684 | { | |
685 | const char *filename; | |
686 | int ret; | |
687 | ||
772c31ee KV |
688 | if (ar->fw_board != NULL) |
689 | return 0; | |
690 | ||
d1a9421d KV |
691 | if (WARN_ON(ar->hw.fw_board == NULL)) |
692 | return -EINVAL; | |
693 | ||
694 | filename = ar->hw.fw_board; | |
bdcd8170 KV |
695 | |
696 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, | |
697 | &ar->fw_board_len); | |
698 | if (ret == 0) { | |
699 | /* managed to get proper board file */ | |
700 | return 0; | |
701 | } | |
702 | ||
92ecbff4 SL |
703 | if (check_device_tree(ar)) { |
704 | /* got board file from device tree */ | |
705 | return 0; | |
706 | } | |
707 | ||
bdcd8170 KV |
708 | /* there was no proper board file, try to use default instead */ |
709 | ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", | |
710 | filename, ret); | |
711 | ||
d1a9421d | 712 | filename = ar->hw.fw_default_board; |
bdcd8170 KV |
713 | |
714 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, | |
715 | &ar->fw_board_len); | |
716 | if (ret) { | |
717 | ath6kl_err("Failed to get default board file %s: %d\n", | |
718 | filename, ret); | |
719 | return ret; | |
720 | } | |
721 | ||
722 | ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); | |
723 | ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); | |
724 | ||
725 | return 0; | |
726 | } | |
727 | ||
772c31ee KV |
728 | static int ath6kl_fetch_otp_file(struct ath6kl *ar) |
729 | { | |
c0038972 | 730 | char filename[100]; |
772c31ee KV |
731 | int ret; |
732 | ||
733 | if (ar->fw_otp != NULL) | |
734 | return 0; | |
735 | ||
c0038972 | 736 | if (ar->hw.fw.otp == NULL) { |
d1a9421d KV |
737 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
738 | "no OTP file configured for this hw\n"); | |
772c31ee | 739 | return 0; |
772c31ee KV |
740 | } |
741 | ||
c0038972 KV |
742 | snprintf(filename, sizeof(filename), "%s/%s", |
743 | ar->hw.fw.dir, ar->hw.fw.otp); | |
d1a9421d | 744 | |
772c31ee KV |
745 | ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, |
746 | &ar->fw_otp_len); | |
747 | if (ret) { | |
748 | ath6kl_err("Failed to get OTP file %s: %d\n", | |
749 | filename, ret); | |
750 | return ret; | |
751 | } | |
752 | ||
753 | return 0; | |
754 | } | |
755 | ||
756 | static int ath6kl_fetch_fw_file(struct ath6kl *ar) | |
757 | { | |
c0038972 | 758 | char filename[100]; |
772c31ee KV |
759 | int ret; |
760 | ||
761 | if (ar->fw != NULL) | |
762 | return 0; | |
763 | ||
764 | if (testmode) { | |
c0038972 | 765 | if (ar->hw.fw.tcmd == NULL) { |
d1a9421d | 766 | ath6kl_warn("testmode not supported\n"); |
772c31ee | 767 | return -EOPNOTSUPP; |
772c31ee KV |
768 | } |
769 | ||
c0038972 KV |
770 | snprintf(filename, sizeof(filename), "%s/%s", |
771 | ar->hw.fw.dir, ar->hw.fw.tcmd); | |
d1a9421d | 772 | |
772c31ee KV |
773 | set_bit(TESTMODE, &ar->flag); |
774 | ||
775 | goto get_fw; | |
776 | } | |
777 | ||
c0038972 KV |
778 | /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */ |
779 | if (WARN_ON(ar->hw.fw.fw == NULL)) | |
d1a9421d KV |
780 | return -EINVAL; |
781 | ||
c0038972 KV |
782 | snprintf(filename, sizeof(filename), "%s/%s", |
783 | ar->hw.fw.dir, ar->hw.fw.fw); | |
772c31ee KV |
784 | |
785 | get_fw: | |
786 | ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); | |
787 | if (ret) { | |
788 | ath6kl_err("Failed to get firmware file %s: %d\n", | |
789 | filename, ret); | |
790 | return ret; | |
791 | } | |
792 | ||
793 | return 0; | |
794 | } | |
795 | ||
796 | static int ath6kl_fetch_patch_file(struct ath6kl *ar) | |
797 | { | |
c0038972 | 798 | char filename[100]; |
772c31ee KV |
799 | int ret; |
800 | ||
d1a9421d | 801 | if (ar->fw_patch != NULL) |
772c31ee | 802 | return 0; |
772c31ee | 803 | |
c0038972 | 804 | if (ar->hw.fw.patch == NULL) |
d1a9421d KV |
805 | return 0; |
806 | ||
c0038972 KV |
807 | snprintf(filename, sizeof(filename), "%s/%s", |
808 | ar->hw.fw.dir, ar->hw.fw.patch); | |
d1a9421d KV |
809 | |
810 | ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, | |
811 | &ar->fw_patch_len); | |
812 | if (ret) { | |
813 | ath6kl_err("Failed to get patch file %s: %d\n", | |
814 | filename, ret); | |
815 | return ret; | |
772c31ee KV |
816 | } |
817 | ||
818 | return 0; | |
819 | } | |
820 | ||
50d41234 | 821 | static int ath6kl_fetch_fw_api1(struct ath6kl *ar) |
772c31ee KV |
822 | { |
823 | int ret; | |
824 | ||
772c31ee KV |
825 | ret = ath6kl_fetch_otp_file(ar); |
826 | if (ret) | |
827 | return ret; | |
828 | ||
829 | ret = ath6kl_fetch_fw_file(ar); | |
830 | if (ret) | |
831 | return ret; | |
832 | ||
833 | ret = ath6kl_fetch_patch_file(ar); | |
834 | if (ret) | |
835 | return ret; | |
836 | ||
837 | return 0; | |
838 | } | |
bdcd8170 | 839 | |
65a8b4cc | 840 | static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name) |
50d41234 KV |
841 | { |
842 | size_t magic_len, len, ie_len; | |
843 | const struct firmware *fw; | |
844 | struct ath6kl_fw_ie *hdr; | |
c0038972 | 845 | char filename[100]; |
50d41234 | 846 | const u8 *data; |
97e0496d | 847 | int ret, ie_id, i, index, bit; |
8a137480 | 848 | __le32 *val; |
50d41234 | 849 | |
65a8b4cc | 850 | snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name); |
50d41234 KV |
851 | |
852 | ret = request_firmware(&fw, filename, ar->dev); | |
853 | if (ret) | |
854 | return ret; | |
855 | ||
856 | data = fw->data; | |
857 | len = fw->size; | |
858 | ||
859 | /* magic also includes the null byte, check that as well */ | |
860 | magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; | |
861 | ||
862 | if (len < magic_len) { | |
863 | ret = -EINVAL; | |
864 | goto out; | |
865 | } | |
866 | ||
867 | if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { | |
868 | ret = -EINVAL; | |
869 | goto out; | |
870 | } | |
871 | ||
872 | len -= magic_len; | |
873 | data += magic_len; | |
874 | ||
875 | /* loop elements */ | |
876 | while (len > sizeof(struct ath6kl_fw_ie)) { | |
877 | /* hdr is unaligned! */ | |
878 | hdr = (struct ath6kl_fw_ie *) data; | |
879 | ||
880 | ie_id = le32_to_cpup(&hdr->id); | |
881 | ie_len = le32_to_cpup(&hdr->len); | |
882 | ||
883 | len -= sizeof(*hdr); | |
884 | data += sizeof(*hdr); | |
885 | ||
886 | if (len < ie_len) { | |
887 | ret = -EINVAL; | |
888 | goto out; | |
889 | } | |
890 | ||
891 | switch (ie_id) { | |
892 | case ATH6KL_FW_IE_OTP_IMAGE: | |
ef548626 | 893 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", |
6bc36431 KV |
894 | ie_len); |
895 | ||
50d41234 KV |
896 | ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); |
897 | ||
898 | if (ar->fw_otp == NULL) { | |
899 | ret = -ENOMEM; | |
900 | goto out; | |
901 | } | |
902 | ||
903 | ar->fw_otp_len = ie_len; | |
904 | break; | |
905 | case ATH6KL_FW_IE_FW_IMAGE: | |
ef548626 | 906 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", |
6bc36431 KV |
907 | ie_len); |
908 | ||
50d41234 KV |
909 | ar->fw = kmemdup(data, ie_len, GFP_KERNEL); |
910 | ||
911 | if (ar->fw == NULL) { | |
912 | ret = -ENOMEM; | |
913 | goto out; | |
914 | } | |
915 | ||
916 | ar->fw_len = ie_len; | |
917 | break; | |
918 | case ATH6KL_FW_IE_PATCH_IMAGE: | |
ef548626 | 919 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", |
6bc36431 KV |
920 | ie_len); |
921 | ||
50d41234 KV |
922 | ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); |
923 | ||
924 | if (ar->fw_patch == NULL) { | |
925 | ret = -ENOMEM; | |
926 | goto out; | |
927 | } | |
928 | ||
929 | ar->fw_patch_len = ie_len; | |
930 | break; | |
8a137480 KV |
931 | case ATH6KL_FW_IE_RESERVED_RAM_SIZE: |
932 | val = (__le32 *) data; | |
933 | ar->hw.reserved_ram_size = le32_to_cpup(val); | |
6bc36431 KV |
934 | |
935 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
936 | "found reserved ram size ie 0x%d\n", | |
937 | ar->hw.reserved_ram_size); | |
8a137480 | 938 | break; |
97e0496d | 939 | case ATH6KL_FW_IE_CAPABILITIES: |
277d90f4 KV |
940 | if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8)) |
941 | break; | |
942 | ||
6bc36431 | 943 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
ef548626 | 944 | "found firmware capabilities ie (%zd B)\n", |
6bc36431 KV |
945 | ie_len); |
946 | ||
97e0496d | 947 | for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { |
277d90f4 | 948 | index = i / 8; |
97e0496d KV |
949 | bit = i % 8; |
950 | ||
951 | if (data[index] & (1 << bit)) | |
952 | __set_bit(i, ar->fw_capabilities); | |
953 | } | |
6bc36431 KV |
954 | |
955 | ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", | |
956 | ar->fw_capabilities, | |
957 | sizeof(ar->fw_capabilities)); | |
97e0496d | 958 | break; |
1b4304da KV |
959 | case ATH6KL_FW_IE_PATCH_ADDR: |
960 | if (ie_len != sizeof(*val)) | |
961 | break; | |
962 | ||
963 | val = (__le32 *) data; | |
964 | ar->hw.dataset_patch_addr = le32_to_cpup(val); | |
6bc36431 KV |
965 | |
966 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
03ef0250 | 967 | "found patch address ie 0x%x\n", |
6bc36431 | 968 | ar->hw.dataset_patch_addr); |
1b4304da | 969 | break; |
03ef0250 KV |
970 | case ATH6KL_FW_IE_BOARD_ADDR: |
971 | if (ie_len != sizeof(*val)) | |
972 | break; | |
973 | ||
974 | val = (__le32 *) data; | |
975 | ar->hw.board_addr = le32_to_cpup(val); | |
976 | ||
977 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
978 | "found board address ie 0x%x\n", | |
979 | ar->hw.board_addr); | |
980 | break; | |
368b1b0f KV |
981 | case ATH6KL_FW_IE_VIF_MAX: |
982 | if (ie_len != sizeof(*val)) | |
983 | break; | |
984 | ||
985 | val = (__le32 *) data; | |
986 | ar->vif_max = min_t(unsigned int, le32_to_cpup(val), | |
987 | ATH6KL_VIF_MAX); | |
988 | ||
f143379d VT |
989 | if (ar->vif_max > 1 && !ar->p2p) |
990 | ar->max_norm_iface = 2; | |
991 | ||
368b1b0f KV |
992 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
993 | "found vif max ie %d\n", ar->vif_max); | |
994 | break; | |
50d41234 | 995 | default: |
6bc36431 | 996 | ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", |
50d41234 KV |
997 | le32_to_cpup(&hdr->id)); |
998 | break; | |
999 | } | |
1000 | ||
1001 | len -= ie_len; | |
1002 | data += ie_len; | |
1003 | }; | |
1004 | ||
1005 | ret = 0; | |
1006 | out: | |
1007 | release_firmware(fw); | |
1008 | ||
1009 | return ret; | |
1010 | } | |
1011 | ||
1012 | static int ath6kl_fetch_firmwares(struct ath6kl *ar) | |
1013 | { | |
1014 | int ret; | |
1015 | ||
1016 | ret = ath6kl_fetch_board_file(ar); | |
1017 | if (ret) | |
1018 | return ret; | |
1019 | ||
65a8b4cc | 1020 | ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE); |
6bc36431 | 1021 | if (ret == 0) { |
65a8b4cc KV |
1022 | ar->fw_api = 3; |
1023 | goto out; | |
1024 | } | |
1025 | ||
1026 | ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE); | |
1027 | if (ret == 0) { | |
1028 | ar->fw_api = 2; | |
1029 | goto out; | |
6bc36431 | 1030 | } |
50d41234 KV |
1031 | |
1032 | ret = ath6kl_fetch_fw_api1(ar); | |
1033 | if (ret) | |
1034 | return ret; | |
1035 | ||
65a8b4cc KV |
1036 | ar->fw_api = 1; |
1037 | ||
1038 | out: | |
1039 | ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api); | |
6bc36431 | 1040 | |
50d41234 KV |
1041 | return 0; |
1042 | } | |
1043 | ||
bdcd8170 KV |
1044 | static int ath6kl_upload_board_file(struct ath6kl *ar) |
1045 | { | |
1046 | u32 board_address, board_ext_address, param; | |
31024d99 | 1047 | u32 board_data_size, board_ext_data_size; |
bdcd8170 KV |
1048 | int ret; |
1049 | ||
772c31ee KV |
1050 | if (WARN_ON(ar->fw_board == NULL)) |
1051 | return -ENOENT; | |
bdcd8170 | 1052 | |
31024d99 KF |
1053 | /* |
1054 | * Determine where in Target RAM to write Board Data. | |
1055 | * For AR6004, host determine Target RAM address for | |
1056 | * writing board data. | |
1057 | */ | |
0d4d72bf KV |
1058 | if (ar->hw.board_addr != 0) { |
1059 | board_address = ar->hw.board_addr; | |
31024d99 KF |
1060 | ath6kl_bmi_write(ar, |
1061 | ath6kl_get_hi_item_addr(ar, | |
1062 | HI_ITEM(hi_board_data)), | |
1063 | (u8 *) &board_address, 4); | |
1064 | } else { | |
1065 | ath6kl_bmi_read(ar, | |
1066 | ath6kl_get_hi_item_addr(ar, | |
1067 | HI_ITEM(hi_board_data)), | |
1068 | (u8 *) &board_address, 4); | |
1069 | } | |
1070 | ||
bdcd8170 KV |
1071 | /* determine where in target ram to write extended board data */ |
1072 | ath6kl_bmi_read(ar, | |
1073 | ath6kl_get_hi_item_addr(ar, | |
1074 | HI_ITEM(hi_board_ext_data)), | |
1075 | (u8 *) &board_ext_address, 4); | |
1076 | ||
50e2740b KV |
1077 | if (ar->target_type == TARGET_TYPE_AR6003 && |
1078 | board_ext_address == 0) { | |
bdcd8170 KV |
1079 | ath6kl_err("Failed to get board file target address.\n"); |
1080 | return -EINVAL; | |
1081 | } | |
1082 | ||
31024d99 KF |
1083 | switch (ar->target_type) { |
1084 | case TARGET_TYPE_AR6003: | |
1085 | board_data_size = AR6003_BOARD_DATA_SZ; | |
1086 | board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; | |
1087 | break; | |
1088 | case TARGET_TYPE_AR6004: | |
1089 | board_data_size = AR6004_BOARD_DATA_SZ; | |
1090 | board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; | |
1091 | break; | |
1092 | default: | |
1093 | WARN_ON(1); | |
1094 | return -EINVAL; | |
1095 | break; | |
1096 | } | |
1097 | ||
50e2740b KV |
1098 | if (board_ext_address && |
1099 | ar->fw_board_len == (board_data_size + board_ext_data_size)) { | |
31024d99 | 1100 | |
bdcd8170 | 1101 | /* write extended board data */ |
6bc36431 KV |
1102 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
1103 | "writing extended board data to 0x%x (%d B)\n", | |
1104 | board_ext_address, board_ext_data_size); | |
1105 | ||
bdcd8170 | 1106 | ret = ath6kl_bmi_write(ar, board_ext_address, |
31024d99 KF |
1107 | ar->fw_board + board_data_size, |
1108 | board_ext_data_size); | |
bdcd8170 KV |
1109 | if (ret) { |
1110 | ath6kl_err("Failed to write extended board data: %d\n", | |
1111 | ret); | |
1112 | return ret; | |
1113 | } | |
1114 | ||
1115 | /* record that extended board data is initialized */ | |
31024d99 KF |
1116 | param = (board_ext_data_size << 16) | 1; |
1117 | ||
bdcd8170 KV |
1118 | ath6kl_bmi_write(ar, |
1119 | ath6kl_get_hi_item_addr(ar, | |
1120 | HI_ITEM(hi_board_ext_data_config)), | |
1121 | (unsigned char *) ¶m, 4); | |
1122 | } | |
1123 | ||
31024d99 | 1124 | if (ar->fw_board_len < board_data_size) { |
bdcd8170 KV |
1125 | ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); |
1126 | ret = -EINVAL; | |
1127 | return ret; | |
1128 | } | |
1129 | ||
6bc36431 KV |
1130 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", |
1131 | board_address, board_data_size); | |
1132 | ||
bdcd8170 | 1133 | ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, |
31024d99 | 1134 | board_data_size); |
bdcd8170 KV |
1135 | |
1136 | if (ret) { | |
1137 | ath6kl_err("Board file bmi write failed: %d\n", ret); | |
1138 | return ret; | |
1139 | } | |
1140 | ||
1141 | /* record the fact that Board Data IS initialized */ | |
1142 | param = 1; | |
1143 | ath6kl_bmi_write(ar, | |
1144 | ath6kl_get_hi_item_addr(ar, | |
1145 | HI_ITEM(hi_board_data_initialized)), | |
1146 | (u8 *)¶m, 4); | |
1147 | ||
1148 | return ret; | |
1149 | } | |
1150 | ||
1151 | static int ath6kl_upload_otp(struct ath6kl *ar) | |
1152 | { | |
bdcd8170 | 1153 | u32 address, param; |
bef26a7f | 1154 | bool from_hw = false; |
bdcd8170 KV |
1155 | int ret; |
1156 | ||
50e2740b KV |
1157 | if (ar->fw_otp == NULL) |
1158 | return 0; | |
bdcd8170 | 1159 | |
a01ac414 | 1160 | address = ar->hw.app_load_addr; |
bdcd8170 | 1161 | |
ef548626 | 1162 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, |
6bc36431 KV |
1163 | ar->fw_otp_len); |
1164 | ||
bdcd8170 KV |
1165 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, |
1166 | ar->fw_otp_len); | |
1167 | if (ret) { | |
1168 | ath6kl_err("Failed to upload OTP file: %d\n", ret); | |
1169 | return ret; | |
1170 | } | |
1171 | ||
639d0b89 KV |
1172 | /* read firmware start address */ |
1173 | ret = ath6kl_bmi_read(ar, | |
1174 | ath6kl_get_hi_item_addr(ar, | |
1175 | HI_ITEM(hi_app_start)), | |
1176 | (u8 *) &address, sizeof(address)); | |
1177 | ||
1178 | if (ret) { | |
1179 | ath6kl_err("Failed to read hi_app_start: %d\n", ret); | |
1180 | return ret; | |
1181 | } | |
1182 | ||
bef26a7f KV |
1183 | if (ar->hw.app_start_override_addr == 0) { |
1184 | ar->hw.app_start_override_addr = address; | |
1185 | from_hw = true; | |
1186 | } | |
639d0b89 | 1187 | |
bef26a7f KV |
1188 | ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", |
1189 | from_hw ? " (from hw)" : "", | |
6bc36431 KV |
1190 | ar->hw.app_start_override_addr); |
1191 | ||
bdcd8170 | 1192 | /* execute the OTP code */ |
bef26a7f KV |
1193 | ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", |
1194 | ar->hw.app_start_override_addr); | |
bdcd8170 | 1195 | param = 0; |
bef26a7f | 1196 | ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); |
bdcd8170 KV |
1197 | |
1198 | return ret; | |
1199 | } | |
1200 | ||
1201 | static int ath6kl_upload_firmware(struct ath6kl *ar) | |
1202 | { | |
bdcd8170 KV |
1203 | u32 address; |
1204 | int ret; | |
1205 | ||
772c31ee | 1206 | if (WARN_ON(ar->fw == NULL)) |
50e2740b | 1207 | return 0; |
bdcd8170 | 1208 | |
a01ac414 | 1209 | address = ar->hw.app_load_addr; |
bdcd8170 | 1210 | |
ef548626 | 1211 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", |
6bc36431 KV |
1212 | address, ar->fw_len); |
1213 | ||
bdcd8170 KV |
1214 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); |
1215 | ||
1216 | if (ret) { | |
1217 | ath6kl_err("Failed to write firmware: %d\n", ret); | |
1218 | return ret; | |
1219 | } | |
1220 | ||
31024d99 KF |
1221 | /* |
1222 | * Set starting address for firmware | |
1223 | * Don't need to setup app_start override addr on AR6004 | |
1224 | */ | |
1225 | if (ar->target_type != TARGET_TYPE_AR6004) { | |
a01ac414 | 1226 | address = ar->hw.app_start_override_addr; |
31024d99 KF |
1227 | ath6kl_bmi_set_app_start(ar, address); |
1228 | } | |
bdcd8170 KV |
1229 | return ret; |
1230 | } | |
1231 | ||
1232 | static int ath6kl_upload_patch(struct ath6kl *ar) | |
1233 | { | |
bdcd8170 KV |
1234 | u32 address, param; |
1235 | int ret; | |
1236 | ||
50e2740b KV |
1237 | if (ar->fw_patch == NULL) |
1238 | return 0; | |
bdcd8170 | 1239 | |
a01ac414 | 1240 | address = ar->hw.dataset_patch_addr; |
bdcd8170 | 1241 | |
ef548626 | 1242 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", |
6bc36431 KV |
1243 | address, ar->fw_patch_len); |
1244 | ||
bdcd8170 KV |
1245 | ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); |
1246 | if (ret) { | |
1247 | ath6kl_err("Failed to write patch file: %d\n", ret); | |
1248 | return ret; | |
1249 | } | |
1250 | ||
1251 | param = address; | |
1252 | ath6kl_bmi_write(ar, | |
1253 | ath6kl_get_hi_item_addr(ar, | |
1254 | HI_ITEM(hi_dset_list_head)), | |
1255 | (unsigned char *) ¶m, 4); | |
1256 | ||
1257 | return 0; | |
1258 | } | |
1259 | ||
1260 | static int ath6kl_init_upload(struct ath6kl *ar) | |
1261 | { | |
1262 | u32 param, options, sleep, address; | |
1263 | int status = 0; | |
1264 | ||
31024d99 KF |
1265 | if (ar->target_type != TARGET_TYPE_AR6003 && |
1266 | ar->target_type != TARGET_TYPE_AR6004) | |
bdcd8170 KV |
1267 | return -EINVAL; |
1268 | ||
1269 | /* temporarily disable system sleep */ | |
1270 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; | |
1271 | status = ath6kl_bmi_reg_read(ar, address, ¶m); | |
1272 | if (status) | |
1273 | return status; | |
1274 | ||
1275 | options = param; | |
1276 | ||
1277 | param |= ATH6KL_OPTION_SLEEP_DISABLE; | |
1278 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1279 | if (status) | |
1280 | return status; | |
1281 | ||
1282 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; | |
1283 | status = ath6kl_bmi_reg_read(ar, address, ¶m); | |
1284 | if (status) | |
1285 | return status; | |
1286 | ||
1287 | sleep = param; | |
1288 | ||
1289 | param |= SM(SYSTEM_SLEEP_DISABLE, 1); | |
1290 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1291 | if (status) | |
1292 | return status; | |
1293 | ||
1294 | ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", | |
1295 | options, sleep); | |
1296 | ||
1297 | /* program analog PLL register */ | |
31024d99 KF |
1298 | /* no need to control 40/44MHz clock on AR6004 */ |
1299 | if (ar->target_type != TARGET_TYPE_AR6004) { | |
1300 | status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, | |
1301 | 0xF9104001); | |
bdcd8170 | 1302 | |
31024d99 KF |
1303 | if (status) |
1304 | return status; | |
bdcd8170 | 1305 | |
31024d99 KF |
1306 | /* Run at 80/88MHz by default */ |
1307 | param = SM(CPU_CLOCK_STANDARD, 1); | |
1308 | ||
1309 | address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; | |
1310 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1311 | if (status) | |
1312 | return status; | |
1313 | } | |
bdcd8170 KV |
1314 | |
1315 | param = 0; | |
1316 | address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; | |
1317 | param = SM(LPO_CAL_ENABLE, 1); | |
1318 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1319 | if (status) | |
1320 | return status; | |
1321 | ||
1322 | /* WAR to avoid SDIO CRC err */ | |
0d0192ba | 1323 | if (ar->version.target_ver == AR6003_HW_2_0_VERSION) { |
bdcd8170 KV |
1324 | ath6kl_err("temporary war to avoid sdio crc error\n"); |
1325 | ||
1326 | param = 0x20; | |
1327 | ||
1328 | address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; | |
1329 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1330 | if (status) | |
1331 | return status; | |
1332 | ||
1333 | address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; | |
1334 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1335 | if (status) | |
1336 | return status; | |
1337 | ||
1338 | address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; | |
1339 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1340 | if (status) | |
1341 | return status; | |
1342 | ||
1343 | address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; | |
1344 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1345 | if (status) | |
1346 | return status; | |
1347 | } | |
1348 | ||
1349 | /* write EEPROM data to Target RAM */ | |
1350 | status = ath6kl_upload_board_file(ar); | |
1351 | if (status) | |
1352 | return status; | |
1353 | ||
1354 | /* transfer One time Programmable data */ | |
1355 | status = ath6kl_upload_otp(ar); | |
1356 | if (status) | |
1357 | return status; | |
1358 | ||
1359 | /* Download Target firmware */ | |
1360 | status = ath6kl_upload_firmware(ar); | |
1361 | if (status) | |
1362 | return status; | |
1363 | ||
1364 | status = ath6kl_upload_patch(ar); | |
1365 | if (status) | |
1366 | return status; | |
1367 | ||
1368 | /* Restore system sleep */ | |
1369 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; | |
1370 | status = ath6kl_bmi_reg_write(ar, address, sleep); | |
1371 | if (status) | |
1372 | return status; | |
1373 | ||
1374 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; | |
1375 | param = options | 0x20; | |
1376 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1377 | if (status) | |
1378 | return status; | |
1379 | ||
bdcd8170 KV |
1380 | return status; |
1381 | } | |
1382 | ||
a01ac414 KV |
1383 | static int ath6kl_init_hw_params(struct ath6kl *ar) |
1384 | { | |
856f4b31 KV |
1385 | const struct ath6kl_hw *hw; |
1386 | int i; | |
bef26a7f | 1387 | |
856f4b31 KV |
1388 | for (i = 0; i < ARRAY_SIZE(hw_list); i++) { |
1389 | hw = &hw_list[i]; | |
bef26a7f | 1390 | |
856f4b31 KV |
1391 | if (hw->id == ar->version.target_ver) |
1392 | break; | |
1393 | } | |
1394 | ||
1395 | if (i == ARRAY_SIZE(hw_list)) { | |
a01ac414 KV |
1396 | ath6kl_err("Unsupported hardware version: 0x%x\n", |
1397 | ar->version.target_ver); | |
1398 | return -EINVAL; | |
1399 | } | |
1400 | ||
856f4b31 KV |
1401 | ar->hw = *hw; |
1402 | ||
6bc36431 KV |
1403 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
1404 | "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", | |
1405 | ar->version.target_ver, ar->target_type, | |
1406 | ar->hw.dataset_patch_addr, ar->hw.app_load_addr); | |
1407 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
1408 | "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", | |
1409 | ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, | |
1410 | ar->hw.reserved_ram_size); | |
39586bf2 RH |
1411 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
1412 | "refclk_hz %d uarttx_pin %d", | |
1413 | ar->hw.refclk_hz, ar->hw.uarttx_pin); | |
6bc36431 | 1414 | |
a01ac414 KV |
1415 | return 0; |
1416 | } | |
1417 | ||
293badf4 KV |
1418 | static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) |
1419 | { | |
1420 | switch (type) { | |
1421 | case ATH6KL_HIF_TYPE_SDIO: | |
1422 | return "sdio"; | |
1423 | case ATH6KL_HIF_TYPE_USB: | |
1424 | return "usb"; | |
1425 | } | |
1426 | ||
1427 | return NULL; | |
1428 | } | |
1429 | ||
5fe4dffb | 1430 | int ath6kl_init_hw_start(struct ath6kl *ar) |
20459ee2 KV |
1431 | { |
1432 | long timeleft; | |
1433 | int ret, i; | |
1434 | ||
5fe4dffb KV |
1435 | ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); |
1436 | ||
20459ee2 KV |
1437 | ret = ath6kl_hif_power_on(ar); |
1438 | if (ret) | |
1439 | return ret; | |
1440 | ||
1441 | ret = ath6kl_configure_target(ar); | |
1442 | if (ret) | |
1443 | goto err_power_off; | |
1444 | ||
1445 | ret = ath6kl_init_upload(ar); | |
1446 | if (ret) | |
1447 | goto err_power_off; | |
1448 | ||
1449 | /* Do we need to finish the BMI phase */ | |
1450 | /* FIXME: return error from ath6kl_bmi_done() */ | |
1451 | if (ath6kl_bmi_done(ar)) { | |
1452 | ret = -EIO; | |
1453 | goto err_power_off; | |
1454 | } | |
1455 | ||
1456 | /* | |
1457 | * The reason we have to wait for the target here is that the | |
1458 | * driver layer has to init BMI in order to set the host block | |
1459 | * size. | |
1460 | */ | |
1461 | if (ath6kl_htc_wait_target(ar->htc_target)) { | |
1462 | ret = -EIO; | |
1463 | goto err_power_off; | |
1464 | } | |
1465 | ||
1466 | if (ath6kl_init_service_ep(ar)) { | |
1467 | ret = -EIO; | |
1468 | goto err_cleanup_scatter; | |
1469 | } | |
1470 | ||
1471 | /* setup credit distribution */ | |
1472 | ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info); | |
1473 | ||
1474 | /* start HTC */ | |
1475 | ret = ath6kl_htc_start(ar->htc_target); | |
1476 | if (ret) { | |
1477 | /* FIXME: call this */ | |
1478 | ath6kl_cookie_cleanup(ar); | |
1479 | goto err_cleanup_scatter; | |
1480 | } | |
1481 | ||
1482 | /* Wait for Wmi event to be ready */ | |
1483 | timeleft = wait_event_interruptible_timeout(ar->event_wq, | |
1484 | test_bit(WMI_READY, | |
1485 | &ar->flag), | |
1486 | WMI_TIMEOUT); | |
1487 | ||
1488 | ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); | |
1489 | ||
293badf4 KV |
1490 | |
1491 | if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { | |
65a8b4cc | 1492 | ath6kl_info("%s %s fw %s api %d%s\n", |
293badf4 KV |
1493 | ar->hw.name, |
1494 | ath6kl_init_get_hif_name(ar->hif_type), | |
1495 | ar->wiphy->fw_version, | |
65a8b4cc | 1496 | ar->fw_api, |
293badf4 KV |
1497 | test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); |
1498 | } | |
1499 | ||
20459ee2 KV |
1500 | if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { |
1501 | ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", | |
1502 | ATH6KL_ABI_VERSION, ar->version.abi_ver); | |
1503 | ret = -EIO; | |
1504 | goto err_htc_stop; | |
1505 | } | |
1506 | ||
1507 | if (!timeleft || signal_pending(current)) { | |
1508 | ath6kl_err("wmi is not ready or wait was interrupted\n"); | |
1509 | ret = -EIO; | |
1510 | goto err_htc_stop; | |
1511 | } | |
1512 | ||
1513 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); | |
1514 | ||
1515 | /* communicate the wmi protocol verision to the target */ | |
1516 | /* FIXME: return error */ | |
1517 | if ((ath6kl_set_host_app_area(ar)) != 0) | |
1518 | ath6kl_err("unable to set the host app area\n"); | |
1519 | ||
71f96ee6 | 1520 | for (i = 0; i < ar->vif_max; i++) { |
20459ee2 KV |
1521 | ret = ath6kl_target_config_wlan_params(ar, i); |
1522 | if (ret) | |
1523 | goto err_htc_stop; | |
1524 | } | |
1525 | ||
76a9fbe2 KV |
1526 | ar->state = ATH6KL_STATE_ON; |
1527 | ||
20459ee2 KV |
1528 | return 0; |
1529 | ||
1530 | err_htc_stop: | |
1531 | ath6kl_htc_stop(ar->htc_target); | |
1532 | err_cleanup_scatter: | |
1533 | ath6kl_hif_cleanup_scatter(ar); | |
1534 | err_power_off: | |
1535 | ath6kl_hif_power_off(ar); | |
1536 | ||
1537 | return ret; | |
1538 | } | |
1539 | ||
5fe4dffb KV |
1540 | int ath6kl_init_hw_stop(struct ath6kl *ar) |
1541 | { | |
1542 | int ret; | |
1543 | ||
1544 | ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); | |
1545 | ||
1546 | ath6kl_htc_stop(ar->htc_target); | |
1547 | ||
1548 | ath6kl_hif_stop(ar); | |
1549 | ||
1550 | ath6kl_bmi_reset(ar); | |
1551 | ||
1552 | ret = ath6kl_hif_power_off(ar); | |
1553 | if (ret) | |
1554 | ath6kl_warn("failed to power off hif: %d\n", ret); | |
1555 | ||
76a9fbe2 KV |
1556 | ar->state = ATH6KL_STATE_OFF; |
1557 | ||
5fe4dffb KV |
1558 | return 0; |
1559 | } | |
1560 | ||
61448a93 | 1561 | int ath6kl_core_init(struct ath6kl *ar) |
bdcd8170 | 1562 | { |
61448a93 | 1563 | struct ath6kl_bmi_target_info targ_info; |
8dafb70e | 1564 | struct net_device *ndev; |
20459ee2 | 1565 | int ret = 0, i; |
bdcd8170 | 1566 | |
61448a93 KV |
1567 | ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); |
1568 | if (!ar->ath6kl_wq) | |
1569 | return -ENOMEM; | |
1570 | ||
1571 | ret = ath6kl_bmi_init(ar); | |
1572 | if (ret) | |
1573 | goto err_wq; | |
1574 | ||
20459ee2 KV |
1575 | /* |
1576 | * Turn on power to get hardware (target) version and leave power | |
1577 | * on delibrately as we will boot the hardware anyway within few | |
1578 | * seconds. | |
1579 | */ | |
61448a93 KV |
1580 | ret = ath6kl_hif_power_on(ar); |
1581 | if (ret) | |
1582 | goto err_bmi_cleanup; | |
1583 | ||
1584 | ret = ath6kl_bmi_get_target_info(ar, &targ_info); | |
1585 | if (ret) | |
1586 | goto err_power_off; | |
1587 | ||
1588 | ar->version.target_ver = le32_to_cpu(targ_info.version); | |
1589 | ar->target_type = le32_to_cpu(targ_info.type); | |
1590 | ar->wiphy->hw_version = le32_to_cpu(targ_info.version); | |
1591 | ||
1592 | ret = ath6kl_init_hw_params(ar); | |
1593 | if (ret) | |
1594 | goto err_power_off; | |
1595 | ||
61448a93 KV |
1596 | ar->htc_target = ath6kl_htc_create(ar); |
1597 | ||
1598 | if (!ar->htc_target) { | |
1599 | ret = -ENOMEM; | |
1600 | goto err_power_off; | |
1601 | } | |
1602 | ||
1603 | ret = ath6kl_fetch_firmwares(ar); | |
1604 | if (ret) | |
1605 | goto err_htc_cleanup; | |
1606 | ||
1607 | /* FIXME: we should free all firmwares in the error cases below */ | |
1608 | ||
bdcd8170 KV |
1609 | /* Indicate that WMI is enabled (although not ready yet) */ |
1610 | set_bit(WMI_ENABLED, &ar->flag); | |
2865785e | 1611 | ar->wmi = ath6kl_wmi_init(ar); |
bdcd8170 KV |
1612 | if (!ar->wmi) { |
1613 | ath6kl_err("failed to initialize wmi\n"); | |
61448a93 KV |
1614 | ret = -EIO; |
1615 | goto err_htc_cleanup; | |
bdcd8170 KV |
1616 | } |
1617 | ||
1618 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); | |
1619 | ||
61448a93 KV |
1620 | ret = ath6kl_register_ieee80211_hw(ar); |
1621 | if (ret) | |
8dafb70e VT |
1622 | goto err_node_cleanup; |
1623 | ||
61448a93 KV |
1624 | ret = ath6kl_debug_init(ar); |
1625 | if (ret) { | |
8dafb70e VT |
1626 | wiphy_unregister(ar->wiphy); |
1627 | goto err_node_cleanup; | |
1628 | } | |
1629 | ||
71f96ee6 | 1630 | for (i = 0; i < ar->vif_max; i++) |
55055976 VT |
1631 | ar->avail_idx_map |= BIT(i); |
1632 | ||
27929723 VT |
1633 | rtnl_lock(); |
1634 | ||
8dafb70e | 1635 | /* Add an initial station interface */ |
55055976 VT |
1636 | ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0, |
1637 | INFRA_NETWORK); | |
27929723 VT |
1638 | |
1639 | rtnl_unlock(); | |
1640 | ||
8dafb70e VT |
1641 | if (!ndev) { |
1642 | ath6kl_err("Failed to instantiate a network device\n"); | |
61448a93 | 1643 | ret = -ENOMEM; |
8dafb70e VT |
1644 | wiphy_unregister(ar->wiphy); |
1645 | goto err_debug_init; | |
1646 | } | |
1647 | ||
1648 | ||
1649 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", | |
28ae58dd | 1650 | __func__, ndev->name, ndev, ar); |
8dafb70e | 1651 | |
bdcd8170 KV |
1652 | /* setup access class priority mappings */ |
1653 | ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ | |
1654 | ar->ac_stream_pri_map[WMM_AC_BE] = 1; | |
1655 | ar->ac_stream_pri_map[WMM_AC_VI] = 2; | |
1656 | ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ | |
1657 | ||
1658 | /* give our connected endpoints some buffers */ | |
1659 | ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); | |
1660 | ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); | |
1661 | ||
1662 | /* allocate some buffers that handle larger AMSDU frames */ | |
1663 | ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); | |
1664 | ||
bdcd8170 KV |
1665 | ath6kl_cookie_init(ar); |
1666 | ||
bdcd8170 KV |
1667 | ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | |
1668 | ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; | |
1669 | ||
8277de15 KV |
1670 | if (suspend_cutpower) |
1671 | ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER; | |
1672 | ||
be98e3a4 | 1673 | ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | |
fb94333a | 1674 | WIPHY_FLAG_HAVE_AP_SME | |
7e95e365 | 1675 | WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL | |
fb94333a AN |
1676 | WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD; |
1677 | ||
10509f90 KV |
1678 | if (test_bit(ATH6KL_FW_CAPABILITY_SCHED_SCAN, ar->fw_capabilities)) |
1679 | ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN; | |
1680 | ||
fb94333a AN |
1681 | ar->wiphy->probe_resp_offload = |
1682 | NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS | | |
1683 | NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 | | |
1684 | NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P | | |
1685 | NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U; | |
011a36e1 | 1686 | |
5fe4dffb KV |
1687 | set_bit(FIRST_BOOT, &ar->flag); |
1688 | ||
bc48ad31 RP |
1689 | ndev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_RXCSUM; |
1690 | ||
5fe4dffb | 1691 | ret = ath6kl_init_hw_start(ar); |
20459ee2 | 1692 | if (ret) { |
5fe4dffb | 1693 | ath6kl_err("Failed to start hardware: %d\n", ret); |
20459ee2 | 1694 | goto err_rxbuf_cleanup; |
0ce59445 | 1695 | } |
d66ea4f9 VT |
1696 | |
1697 | /* | |
1698 | * Set mac address which is received in ready event | |
1699 | * FIXME: Move to ath6kl_interface_add() | |
1700 | */ | |
1701 | memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN); | |
1702 | ||
61448a93 | 1703 | return ret; |
bdcd8170 | 1704 | |
bdcd8170 | 1705 | err_rxbuf_cleanup: |
ad226ec2 | 1706 | ath6kl_htc_flush_rx_buf(ar->htc_target); |
bdcd8170 | 1707 | ath6kl_cleanup_amsdu_rxbufs(ar); |
27929723 | 1708 | rtnl_lock(); |
108438bc | 1709 | ath6kl_deinit_if_data(netdev_priv(ndev)); |
27929723 | 1710 | rtnl_unlock(); |
8dafb70e VT |
1711 | wiphy_unregister(ar->wiphy); |
1712 | err_debug_init: | |
1713 | ath6kl_debug_cleanup(ar); | |
852bd9d9 | 1714 | err_node_cleanup: |
bdcd8170 KV |
1715 | ath6kl_wmi_shutdown(ar->wmi); |
1716 | clear_bit(WMI_ENABLED, &ar->flag); | |
1717 | ar->wmi = NULL; | |
bdcd8170 | 1718 | err_htc_cleanup: |
ad226ec2 | 1719 | ath6kl_htc_cleanup(ar->htc_target); |
b2e75698 KV |
1720 | err_power_off: |
1721 | ath6kl_hif_power_off(ar); | |
bdcd8170 KV |
1722 | err_bmi_cleanup: |
1723 | ath6kl_bmi_cleanup(ar); | |
1724 | err_wq: | |
1725 | destroy_workqueue(ar->ath6kl_wq); | |
8dafb70e | 1726 | |
bdcd8170 KV |
1727 | return ret; |
1728 | } | |
1729 | ||
55055976 | 1730 | void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) |
6db8fa53 VT |
1731 | { |
1732 | static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; | |
1733 | bool discon_issued; | |
1734 | ||
1735 | netif_stop_queue(vif->ndev); | |
1736 | ||
1737 | clear_bit(WLAN_ENABLED, &vif->flags); | |
1738 | ||
1739 | if (wmi_ready) { | |
1740 | discon_issued = test_bit(CONNECTED, &vif->flags) || | |
1741 | test_bit(CONNECT_PEND, &vif->flags); | |
1742 | ath6kl_disconnect(vif); | |
1743 | del_timer(&vif->disconnect_timer); | |
1744 | ||
1745 | if (discon_issued) | |
1746 | ath6kl_disconnect_event(vif, DISCONNECT_CMD, | |
1747 | (vif->nw_type & AP_NETWORK) ? | |
1748 | bcast_mac : vif->bssid, | |
1749 | 0, NULL, 0); | |
1750 | } | |
1751 | ||
1752 | if (vif->scan_req) { | |
1753 | cfg80211_scan_done(vif->scan_req, true); | |
1754 | vif->scan_req = NULL; | |
1755 | } | |
6db8fa53 VT |
1756 | } |
1757 | ||
bdcd8170 KV |
1758 | void ath6kl_stop_txrx(struct ath6kl *ar) |
1759 | { | |
990bd915 | 1760 | struct ath6kl_vif *vif, *tmp_vif; |
bdcd8170 KV |
1761 | |
1762 | set_bit(DESTROY_IN_PROGRESS, &ar->flag); | |
1763 | ||
1764 | if (down_interruptible(&ar->sem)) { | |
1765 | ath6kl_err("down_interruptible failed\n"); | |
1766 | return; | |
1767 | } | |
1768 | ||
11f6e40d | 1769 | spin_lock_bh(&ar->list_lock); |
990bd915 VT |
1770 | list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { |
1771 | list_del(&vif->list); | |
11f6e40d | 1772 | spin_unlock_bh(&ar->list_lock); |
990bd915 | 1773 | ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); |
27929723 VT |
1774 | rtnl_lock(); |
1775 | ath6kl_deinit_if_data(vif); | |
1776 | rtnl_unlock(); | |
11f6e40d | 1777 | spin_lock_bh(&ar->list_lock); |
990bd915 | 1778 | } |
11f6e40d | 1779 | spin_unlock_bh(&ar->list_lock); |
bdcd8170 | 1780 | |
6db8fa53 | 1781 | clear_bit(WMI_READY, &ar->flag); |
bdcd8170 | 1782 | |
6db8fa53 VT |
1783 | /* |
1784 | * After wmi_shudown all WMI events will be dropped. We | |
1785 | * need to cleanup the buffers allocated in AP mode and | |
1786 | * give disconnect notification to stack, which usually | |
1787 | * happens in the disconnect_event. Simulate the disconnect | |
1788 | * event by calling the function directly. Sometimes | |
1789 | * disconnect_event will be received when the debug logs | |
1790 | * are collected. | |
1791 | */ | |
1792 | ath6kl_wmi_shutdown(ar->wmi); | |
bdcd8170 | 1793 | |
6db8fa53 VT |
1794 | clear_bit(WMI_ENABLED, &ar->flag); |
1795 | if (ar->htc_target) { | |
1796 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); | |
1797 | ath6kl_htc_stop(ar->htc_target); | |
bdcd8170 KV |
1798 | } |
1799 | ||
6db8fa53 VT |
1800 | /* |
1801 | * Try to reset the device if we can. The driver may have been | |
1802 | * configure NOT to reset the target during a debug session. | |
1803 | */ | |
1804 | ath6kl_dbg(ATH6KL_DBG_TRC, | |
1805 | "attempting to reset target on instance destroy\n"); | |
1806 | ath6kl_reset_device(ar, ar->target_type, true, true); | |
19703573 | 1807 | |
6db8fa53 | 1808 | clear_bit(WLAN_ENABLED, &ar->flag); |
bdcd8170 | 1809 | } |