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bdcd8170 KV |
1 | |
2 | /* | |
3 | * Copyright (c) 2011 Atheros Communications Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
18 | #include <linux/mmc/sdio_func.h> | |
19 | #include "core.h" | |
20 | #include "cfg80211.h" | |
21 | #include "target.h" | |
22 | #include "debug.h" | |
23 | #include "hif-ops.h" | |
24 | ||
25 | unsigned int debug_mask; | |
003353b0 | 26 | static unsigned int testmode; |
bdcd8170 KV |
27 | |
28 | module_param(debug_mask, uint, 0644); | |
003353b0 | 29 | module_param(testmode, uint, 0644); |
bdcd8170 KV |
30 | |
31 | /* | |
32 | * Include definitions here that can be used to tune the WLAN module | |
33 | * behavior. Different customers can tune the behavior as per their needs, | |
34 | * here. | |
35 | */ | |
36 | ||
37 | /* | |
38 | * This configuration item enable/disable keepalive support. | |
39 | * Keepalive support: In the absence of any data traffic to AP, null | |
40 | * frames will be sent to the AP at periodic interval, to keep the association | |
41 | * active. This configuration item defines the periodic interval. | |
42 | * Use value of zero to disable keepalive support | |
43 | * Default: 60 seconds | |
44 | */ | |
45 | #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 | |
46 | ||
47 | /* | |
48 | * This configuration item sets the value of disconnect timeout | |
49 | * Firmware delays sending the disconnec event to the host for this | |
50 | * timeout after is gets disconnected from the current AP. | |
51 | * If the firmware successly roams within the disconnect timeout | |
52 | * it sends a new connect event | |
53 | */ | |
54 | #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 | |
55 | ||
56 | #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8 | |
57 | ||
58 | enum addr_type { | |
59 | DATASET_PATCH_ADDR, | |
60 | APP_LOAD_ADDR, | |
61 | APP_START_OVERRIDE_ADDR, | |
62 | }; | |
63 | ||
64 | #define ATH6KL_DATA_OFFSET 64 | |
65 | struct sk_buff *ath6kl_buf_alloc(int size) | |
66 | { | |
67 | struct sk_buff *skb; | |
68 | u16 reserved; | |
69 | ||
70 | /* Add chacheline space at front and back of buffer */ | |
71 | reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + | |
1df94a85 | 72 | sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; |
bdcd8170 KV |
73 | skb = dev_alloc_skb(size + reserved); |
74 | ||
75 | if (skb) | |
76 | skb_reserve(skb, reserved - L1_CACHE_BYTES); | |
77 | return skb; | |
78 | } | |
79 | ||
80 | void ath6kl_init_profile_info(struct ath6kl *ar) | |
81 | { | |
82 | ar->ssid_len = 0; | |
83 | memset(ar->ssid, 0, sizeof(ar->ssid)); | |
84 | ||
85 | ar->dot11_auth_mode = OPEN_AUTH; | |
86 | ar->auth_mode = NONE_AUTH; | |
87 | ar->prwise_crypto = NONE_CRYPT; | |
88 | ar->prwise_crypto_len = 0; | |
89 | ar->grp_crypto = NONE_CRYPT; | |
38acde3c | 90 | ar->grp_crypto_len = 0; |
bdcd8170 KV |
91 | memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list)); |
92 | memset(ar->req_bssid, 0, sizeof(ar->req_bssid)); | |
93 | memset(ar->bssid, 0, sizeof(ar->bssid)); | |
94 | ar->bss_ch = 0; | |
95 | ar->nw_type = ar->next_mode = INFRA_NETWORK; | |
96 | } | |
97 | ||
98 | static u8 ath6kl_get_fw_iftype(struct ath6kl *ar) | |
99 | { | |
100 | switch (ar->nw_type) { | |
101 | case INFRA_NETWORK: | |
102 | return HI_OPTION_FW_MODE_BSS_STA; | |
103 | case ADHOC_NETWORK: | |
104 | return HI_OPTION_FW_MODE_IBSS; | |
105 | case AP_NETWORK: | |
106 | return HI_OPTION_FW_MODE_AP; | |
107 | default: | |
108 | ath6kl_err("Unsupported interface type :%d\n", ar->nw_type); | |
109 | return 0xff; | |
110 | } | |
111 | } | |
112 | ||
bdcd8170 KV |
113 | static int ath6kl_set_host_app_area(struct ath6kl *ar) |
114 | { | |
115 | u32 address, data; | |
116 | struct host_app_area host_app_area; | |
117 | ||
118 | /* Fetch the address of the host_app_area_s | |
119 | * instance in the host interest area */ | |
120 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); | |
31024d99 | 121 | address = TARG_VTOP(ar->target_type, address); |
bdcd8170 | 122 | |
addb44be | 123 | if (ath6kl_diag_read32(ar, address, &data)) |
bdcd8170 KV |
124 | return -EIO; |
125 | ||
31024d99 | 126 | address = TARG_VTOP(ar->target_type, data); |
bdcd8170 | 127 | host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION; |
addb44be KV |
128 | if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, |
129 | sizeof(struct host_app_area))) | |
bdcd8170 KV |
130 | return -EIO; |
131 | ||
132 | return 0; | |
133 | } | |
134 | ||
135 | static inline void set_ac2_ep_map(struct ath6kl *ar, | |
136 | u8 ac, | |
137 | enum htc_endpoint_id ep) | |
138 | { | |
139 | ar->ac2ep_map[ac] = ep; | |
140 | ar->ep2ac_map[ep] = ac; | |
141 | } | |
142 | ||
143 | /* connect to a service */ | |
144 | static int ath6kl_connectservice(struct ath6kl *ar, | |
145 | struct htc_service_connect_req *con_req, | |
146 | char *desc) | |
147 | { | |
148 | int status; | |
149 | struct htc_service_connect_resp response; | |
150 | ||
151 | memset(&response, 0, sizeof(response)); | |
152 | ||
ad226ec2 | 153 | status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); |
bdcd8170 KV |
154 | if (status) { |
155 | ath6kl_err("failed to connect to %s service status:%d\n", | |
156 | desc, status); | |
157 | return status; | |
158 | } | |
159 | ||
160 | switch (con_req->svc_id) { | |
161 | case WMI_CONTROL_SVC: | |
162 | if (test_bit(WMI_ENABLED, &ar->flag)) | |
163 | ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); | |
164 | ar->ctrl_ep = response.endpoint; | |
165 | break; | |
166 | case WMI_DATA_BE_SVC: | |
167 | set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); | |
168 | break; | |
169 | case WMI_DATA_BK_SVC: | |
170 | set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); | |
171 | break; | |
172 | case WMI_DATA_VI_SVC: | |
173 | set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); | |
174 | break; | |
175 | case WMI_DATA_VO_SVC: | |
176 | set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); | |
177 | break; | |
178 | default: | |
179 | ath6kl_err("service id is not mapped %d\n", con_req->svc_id); | |
180 | return -EINVAL; | |
181 | } | |
182 | ||
183 | return 0; | |
184 | } | |
185 | ||
186 | static int ath6kl_init_service_ep(struct ath6kl *ar) | |
187 | { | |
188 | struct htc_service_connect_req connect; | |
189 | ||
190 | memset(&connect, 0, sizeof(connect)); | |
191 | ||
192 | /* these fields are the same for all service endpoints */ | |
193 | connect.ep_cb.rx = ath6kl_rx; | |
194 | connect.ep_cb.rx_refill = ath6kl_rx_refill; | |
195 | connect.ep_cb.tx_full = ath6kl_tx_queue_full; | |
196 | ||
197 | /* | |
198 | * Set the max queue depth so that our ath6kl_tx_queue_full handler | |
199 | * gets called. | |
200 | */ | |
201 | connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; | |
202 | connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; | |
203 | if (!connect.ep_cb.rx_refill_thresh) | |
204 | connect.ep_cb.rx_refill_thresh++; | |
205 | ||
206 | /* connect to control service */ | |
207 | connect.svc_id = WMI_CONTROL_SVC; | |
208 | if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) | |
209 | return -EIO; | |
210 | ||
211 | connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; | |
212 | ||
213 | /* | |
214 | * Limit the HTC message size on the send path, although e can | |
215 | * receive A-MSDU frames of 4K, we will only send ethernet-sized | |
216 | * (802.3) frames on the send path. | |
217 | */ | |
218 | connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; | |
219 | ||
220 | /* | |
221 | * To reduce the amount of committed memory for larger A_MSDU | |
222 | * frames, use the recv-alloc threshold mechanism for larger | |
223 | * packets. | |
224 | */ | |
225 | connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; | |
226 | connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; | |
227 | ||
228 | /* | |
229 | * For the remaining data services set the connection flag to | |
230 | * reduce dribbling, if configured to do so. | |
231 | */ | |
232 | connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; | |
233 | connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; | |
234 | connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; | |
235 | ||
236 | connect.svc_id = WMI_DATA_BE_SVC; | |
237 | ||
238 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) | |
239 | return -EIO; | |
240 | ||
241 | /* connect to back-ground map this to WMI LOW_PRI */ | |
242 | connect.svc_id = WMI_DATA_BK_SVC; | |
243 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) | |
244 | return -EIO; | |
245 | ||
246 | /* connect to Video service, map this to to HI PRI */ | |
247 | connect.svc_id = WMI_DATA_VI_SVC; | |
248 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) | |
249 | return -EIO; | |
250 | ||
251 | /* | |
252 | * Connect to VO service, this is currently not mapped to a WMI | |
253 | * priority stream due to historical reasons. WMI originally | |
254 | * defined 3 priorities over 3 mailboxes We can change this when | |
255 | * WMI is reworked so that priorities are not dependent on | |
256 | * mailboxes. | |
257 | */ | |
258 | connect.svc_id = WMI_DATA_VO_SVC; | |
259 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) | |
260 | return -EIO; | |
261 | ||
262 | return 0; | |
263 | } | |
264 | ||
265 | static void ath6kl_init_control_info(struct ath6kl *ar) | |
266 | { | |
267 | u8 ctr; | |
268 | ||
269 | clear_bit(WMI_ENABLED, &ar->flag); | |
270 | ath6kl_init_profile_info(ar); | |
271 | ar->def_txkey_index = 0; | |
272 | memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list)); | |
273 | ar->ch_hint = 0; | |
274 | ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL; | |
275 | ar->listen_intvl_b = 0; | |
276 | ar->tx_pwr = 0; | |
277 | clear_bit(SKIP_SCAN, &ar->flag); | |
278 | set_bit(WMM_ENABLED, &ar->flag); | |
279 | ar->intra_bss = 1; | |
280 | memset(&ar->sc_params, 0, sizeof(ar->sc_params)); | |
281 | ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT; | |
282 | ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS; | |
e5090444 | 283 | ar->lrssi_roam_threshold = DEF_LRSSI_ROAM_THRESHOLD; |
bdcd8170 KV |
284 | |
285 | memset((u8 *)ar->sta_list, 0, | |
286 | AP_MAX_NUM_STA * sizeof(struct ath6kl_sta)); | |
287 | ||
288 | spin_lock_init(&ar->mcastpsq_lock); | |
289 | ||
290 | /* Init the PS queues */ | |
291 | for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) { | |
292 | spin_lock_init(&ar->sta_list[ctr].psq_lock); | |
293 | skb_queue_head_init(&ar->sta_list[ctr].psq); | |
294 | } | |
295 | ||
296 | skb_queue_head_init(&ar->mcastpsq); | |
297 | ||
298 | memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3); | |
299 | } | |
300 | ||
301 | /* | |
302 | * Set HTC/Mbox operational parameters, this can only be called when the | |
303 | * target is in the BMI phase. | |
304 | */ | |
305 | static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, | |
306 | u8 htc_ctrl_buf) | |
307 | { | |
308 | int status; | |
309 | u32 blk_size; | |
310 | ||
311 | blk_size = ar->mbox_info.block_size; | |
312 | ||
313 | if (htc_ctrl_buf) | |
314 | blk_size |= ((u32)htc_ctrl_buf) << 16; | |
315 | ||
316 | /* set the host interest area for the block size */ | |
317 | status = ath6kl_bmi_write(ar, | |
318 | ath6kl_get_hi_item_addr(ar, | |
319 | HI_ITEM(hi_mbox_io_block_sz)), | |
320 | (u8 *)&blk_size, | |
321 | 4); | |
322 | if (status) { | |
323 | ath6kl_err("bmi_write_memory for IO block size failed\n"); | |
324 | goto out; | |
325 | } | |
326 | ||
327 | ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", | |
328 | blk_size, | |
329 | ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); | |
330 | ||
331 | if (mbox_isr_yield_val) { | |
332 | /* set the host interest area for the mbox ISR yield limit */ | |
333 | status = ath6kl_bmi_write(ar, | |
334 | ath6kl_get_hi_item_addr(ar, | |
335 | HI_ITEM(hi_mbox_isr_yield_limit)), | |
336 | (u8 *)&mbox_isr_yield_val, | |
337 | 4); | |
338 | if (status) { | |
339 | ath6kl_err("bmi_write_memory for yield limit failed\n"); | |
340 | goto out; | |
341 | } | |
342 | } | |
343 | ||
344 | out: | |
345 | return status; | |
346 | } | |
347 | ||
348 | #define REG_DUMP_COUNT_AR6003 60 | |
349 | #define REGISTER_DUMP_LEN_MAX 60 | |
350 | ||
351 | static void ath6kl_dump_target_assert_info(struct ath6kl *ar) | |
352 | { | |
353 | u32 address; | |
354 | u32 regdump_loc = 0; | |
355 | int status; | |
356 | u32 regdump_val[REGISTER_DUMP_LEN_MAX]; | |
357 | u32 i; | |
358 | ||
359 | if (ar->target_type != TARGET_TYPE_AR6003) | |
360 | return; | |
361 | ||
362 | /* the reg dump pointer is copied to the host interest area */ | |
363 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state)); | |
31024d99 | 364 | address = TARG_VTOP(ar->target_type, address); |
bdcd8170 KV |
365 | |
366 | /* read RAM location through diagnostic window */ | |
addb44be | 367 | status = ath6kl_diag_read32(ar, address, ®dump_loc); |
bdcd8170 KV |
368 | |
369 | if (status || !regdump_loc) { | |
370 | ath6kl_err("failed to get ptr to register dump area\n"); | |
371 | return; | |
372 | } | |
373 | ||
374 | ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n", | |
375 | regdump_loc); | |
31024d99 | 376 | regdump_loc = TARG_VTOP(ar->target_type, regdump_loc); |
bdcd8170 KV |
377 | |
378 | /* fetch register dump data */ | |
addb44be KV |
379 | status = ath6kl_diag_read(ar, regdump_loc, (u8 *)®dump_val[0], |
380 | REG_DUMP_COUNT_AR6003 * (sizeof(u32))); | |
bdcd8170 KV |
381 | |
382 | if (status) { | |
383 | ath6kl_err("failed to get register dump\n"); | |
384 | return; | |
385 | } | |
386 | ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n"); | |
387 | ||
388 | for (i = 0; i < REG_DUMP_COUNT_AR6003; i++) | |
389 | ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n", | |
390 | i, regdump_val[i]); | |
391 | ||
392 | } | |
393 | ||
394 | void ath6kl_target_failure(struct ath6kl *ar) | |
395 | { | |
396 | ath6kl_err("target asserted\n"); | |
397 | ||
398 | /* try dumping target assertion information (if any) */ | |
399 | ath6kl_dump_target_assert_info(ar); | |
400 | ||
401 | } | |
402 | ||
403 | static int ath6kl_target_config_wlan_params(struct ath6kl *ar) | |
404 | { | |
405 | int status = 0; | |
4dea08e0 | 406 | int ret; |
bdcd8170 KV |
407 | |
408 | /* | |
409 | * Configure the device for rx dot11 header rules. "0,0" are the | |
410 | * default values. Required if checksum offload is needed. Set | |
411 | * RxMetaVersion to 2. | |
412 | */ | |
413 | if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, | |
414 | ar->rx_meta_ver, 0, 0)) { | |
415 | ath6kl_err("unable to set the rx frame format\n"); | |
416 | status = -EIO; | |
417 | } | |
418 | ||
419 | if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) | |
420 | if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1, | |
421 | IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { | |
422 | ath6kl_err("unable to set power save fail event policy\n"); | |
423 | status = -EIO; | |
424 | } | |
425 | ||
426 | if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) | |
427 | if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0, | |
428 | WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { | |
429 | ath6kl_err("unable to set barker preamble policy\n"); | |
430 | status = -EIO; | |
431 | } | |
432 | ||
433 | if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, | |
434 | WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { | |
435 | ath6kl_err("unable to set keep alive interval\n"); | |
436 | status = -EIO; | |
437 | } | |
438 | ||
439 | if (ath6kl_wmi_disctimeout_cmd(ar->wmi, | |
440 | WLAN_CONFIG_DISCONNECT_TIMEOUT)) { | |
441 | ath6kl_err("unable to set disconnect timeout\n"); | |
442 | status = -EIO; | |
443 | } | |
444 | ||
445 | if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) | |
446 | if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) { | |
447 | ath6kl_err("unable to set txop bursting\n"); | |
448 | status = -EIO; | |
449 | } | |
450 | ||
6bbc7c35 JM |
451 | if (ar->p2p) { |
452 | ret = ath6kl_wmi_info_req_cmd(ar->wmi, | |
453 | P2P_FLAG_CAPABILITIES_REQ | | |
454 | P2P_FLAG_MACADDR_REQ | | |
455 | P2P_FLAG_HMODEL_REQ); | |
456 | if (ret) { | |
457 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " | |
458 | "capabilities (%d) - assuming P2P not " | |
459 | "supported\n", ret); | |
460 | ar->p2p = 0; | |
461 | } | |
462 | } | |
463 | ||
464 | if (ar->p2p) { | |
465 | /* Enable Probe Request reporting for P2P */ | |
466 | ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true); | |
467 | if (ret) { | |
468 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " | |
469 | "Request reporting (%d)\n", ret); | |
470 | } | |
4dea08e0 JM |
471 | } |
472 | ||
bdcd8170 KV |
473 | return status; |
474 | } | |
475 | ||
476 | int ath6kl_configure_target(struct ath6kl *ar) | |
477 | { | |
478 | u32 param, ram_reserved_size; | |
479 | u8 fw_iftype; | |
480 | ||
481 | fw_iftype = ath6kl_get_fw_iftype(ar); | |
482 | if (fw_iftype == 0xff) | |
483 | return -EINVAL; | |
484 | ||
485 | /* Tell target which HTC version it is used*/ | |
486 | param = HTC_PROTOCOL_VERSION; | |
487 | if (ath6kl_bmi_write(ar, | |
488 | ath6kl_get_hi_item_addr(ar, | |
489 | HI_ITEM(hi_app_host_interest)), | |
490 | (u8 *)¶m, 4) != 0) { | |
491 | ath6kl_err("bmi_write_memory for htc version failed\n"); | |
492 | return -EIO; | |
493 | } | |
494 | ||
495 | /* set the firmware mode to STA/IBSS/AP */ | |
496 | param = 0; | |
497 | ||
498 | if (ath6kl_bmi_read(ar, | |
499 | ath6kl_get_hi_item_addr(ar, | |
500 | HI_ITEM(hi_option_flag)), | |
501 | (u8 *)¶m, 4) != 0) { | |
502 | ath6kl_err("bmi_read_memory for setting fwmode failed\n"); | |
503 | return -EIO; | |
504 | } | |
505 | ||
506 | param |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
507 | param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT); | |
6bbc7c35 JM |
508 | if (ar->p2p && fw_iftype == HI_OPTION_FW_MODE_BSS_STA) { |
509 | param |= HI_OPTION_FW_SUBMODE_P2PDEV << | |
510 | HI_OPTION_FW_SUBMODE_SHIFT; | |
511 | } | |
bdcd8170 KV |
512 | param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); |
513 | param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
514 | ||
515 | if (ath6kl_bmi_write(ar, | |
516 | ath6kl_get_hi_item_addr(ar, | |
517 | HI_ITEM(hi_option_flag)), | |
518 | (u8 *)¶m, | |
519 | 4) != 0) { | |
520 | ath6kl_err("bmi_write_memory for setting fwmode failed\n"); | |
521 | return -EIO; | |
522 | } | |
523 | ||
524 | ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); | |
525 | ||
526 | /* | |
527 | * Hardcode the address use for the extended board data | |
528 | * Ideally this should be pre-allocate by the OS at boot time | |
529 | * But since it is a new feature and board data is loaded | |
530 | * at init time, we have to workaround this from host. | |
531 | * It is difficult to patch the firmware boot code, | |
532 | * but possible in theory. | |
533 | */ | |
534 | ||
31024d99 KF |
535 | if (ar->target_type == TARGET_TYPE_AR6003 || |
536 | ar->target_type == TARGET_TYPE_AR6004) { | |
bdcd8170 KV |
537 | if (ar->version.target_ver == AR6003_REV2_VERSION) { |
538 | param = AR6003_REV2_BOARD_EXT_DATA_ADDRESS; | |
539 | ram_reserved_size = AR6003_REV2_RAM_RESERVE_SIZE; | |
31024d99 KF |
540 | } else if (ar->version.target_ver == AR6004_REV1_VERSION) { |
541 | param = AR6004_REV1_BOARD_EXT_DATA_ADDRESS; | |
542 | ram_reserved_size = AR6004_REV1_RAM_RESERVE_SIZE; | |
bdcd8170 KV |
543 | } else { |
544 | param = AR6003_REV3_BOARD_EXT_DATA_ADDRESS; | |
545 | ram_reserved_size = AR6003_REV3_RAM_RESERVE_SIZE; | |
546 | } | |
547 | ||
548 | if (ath6kl_bmi_write(ar, | |
549 | ath6kl_get_hi_item_addr(ar, | |
550 | HI_ITEM(hi_board_ext_data)), | |
551 | (u8 *)¶m, 4) != 0) { | |
552 | ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); | |
553 | return -EIO; | |
554 | } | |
555 | if (ath6kl_bmi_write(ar, | |
556 | ath6kl_get_hi_item_addr(ar, | |
557 | HI_ITEM(hi_end_ram_reserve_sz)), | |
558 | (u8 *)&ram_reserved_size, 4) != 0) { | |
559 | ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); | |
560 | return -EIO; | |
561 | } | |
562 | } | |
563 | ||
564 | /* set the block size for the target */ | |
565 | if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) | |
566 | /* use default number of control buffers */ | |
567 | return -EIO; | |
568 | ||
569 | return 0; | |
570 | } | |
571 | ||
572 | struct ath6kl *ath6kl_core_alloc(struct device *sdev) | |
573 | { | |
574 | struct net_device *dev; | |
575 | struct ath6kl *ar; | |
576 | struct wireless_dev *wdev; | |
577 | ||
578 | wdev = ath6kl_cfg80211_init(sdev); | |
579 | if (!wdev) { | |
580 | ath6kl_err("ath6kl_cfg80211_init failed\n"); | |
581 | return NULL; | |
582 | } | |
583 | ||
584 | ar = wdev_priv(wdev); | |
585 | ar->dev = sdev; | |
586 | ar->wdev = wdev; | |
587 | wdev->iftype = NL80211_IFTYPE_STATION; | |
588 | ||
d999ba3e VT |
589 | if (ath6kl_debug_init(ar)) { |
590 | ath6kl_err("Failed to initialize debugfs\n"); | |
591 | ath6kl_cfg80211_deinit(ar); | |
592 | return NULL; | |
593 | } | |
594 | ||
bdcd8170 KV |
595 | dev = alloc_netdev(0, "wlan%d", ether_setup); |
596 | if (!dev) { | |
597 | ath6kl_err("no memory for network device instance\n"); | |
598 | ath6kl_cfg80211_deinit(ar); | |
599 | return NULL; | |
600 | } | |
601 | ||
602 | dev->ieee80211_ptr = wdev; | |
603 | SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy)); | |
604 | wdev->netdev = dev; | |
605 | ar->sme_state = SME_DISCONNECTED; | |
606 | ar->auto_auth_stage = AUTH_IDLE; | |
607 | ||
608 | init_netdev(dev); | |
609 | ||
610 | ar->net_dev = dev; | |
575b5f34 | 611 | set_bit(WLAN_ENABLED, &ar->flag); |
bdcd8170 KV |
612 | |
613 | ar->wlan_pwr_state = WLAN_POWER_STATE_ON; | |
614 | ||
615 | spin_lock_init(&ar->lock); | |
616 | ||
617 | ath6kl_init_control_info(ar); | |
618 | init_waitqueue_head(&ar->event_wq); | |
619 | sema_init(&ar->sem, 1); | |
620 | clear_bit(DESTROY_IN_PROGRESS, &ar->flag); | |
621 | ||
622 | INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue); | |
623 | ||
624 | setup_timer(&ar->disconnect_timer, disconnect_timer_handler, | |
625 | (unsigned long) dev); | |
626 | ||
627 | return ar; | |
628 | } | |
629 | ||
630 | int ath6kl_unavail_ev(struct ath6kl *ar) | |
631 | { | |
632 | ath6kl_destroy(ar->net_dev, 1); | |
633 | ||
634 | return 0; | |
635 | } | |
636 | ||
637 | /* firmware upload */ | |
638 | static u32 ath6kl_get_load_address(u32 target_ver, enum addr_type type) | |
639 | { | |
640 | WARN_ON(target_ver != AR6003_REV2_VERSION && | |
31024d99 KF |
641 | target_ver != AR6003_REV3_VERSION && |
642 | target_ver != AR6004_REV1_VERSION); | |
bdcd8170 KV |
643 | |
644 | switch (type) { | |
645 | case DATASET_PATCH_ADDR: | |
646 | return (target_ver == AR6003_REV2_VERSION) ? | |
647 | AR6003_REV2_DATASET_PATCH_ADDRESS : | |
648 | AR6003_REV3_DATASET_PATCH_ADDRESS; | |
649 | case APP_LOAD_ADDR: | |
650 | return (target_ver == AR6003_REV2_VERSION) ? | |
651 | AR6003_REV2_APP_LOAD_ADDRESS : | |
652 | 0x1234; | |
653 | case APP_START_OVERRIDE_ADDR: | |
654 | return (target_ver == AR6003_REV2_VERSION) ? | |
655 | AR6003_REV2_APP_START_OVERRIDE : | |
656 | AR6003_REV3_APP_START_OVERRIDE; | |
657 | default: | |
658 | return 0; | |
659 | } | |
660 | } | |
661 | ||
662 | static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, | |
663 | u8 **fw, size_t *fw_len) | |
664 | { | |
665 | const struct firmware *fw_entry; | |
666 | int ret; | |
667 | ||
668 | ret = request_firmware(&fw_entry, filename, ar->dev); | |
669 | if (ret) | |
670 | return ret; | |
671 | ||
672 | *fw_len = fw_entry->size; | |
673 | *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); | |
674 | ||
675 | if (*fw == NULL) | |
676 | ret = -ENOMEM; | |
677 | ||
678 | release_firmware(fw_entry); | |
679 | ||
680 | return ret; | |
681 | } | |
682 | ||
683 | static int ath6kl_fetch_board_file(struct ath6kl *ar) | |
684 | { | |
685 | const char *filename; | |
686 | int ret; | |
687 | ||
688 | switch (ar->version.target_ver) { | |
689 | case AR6003_REV2_VERSION: | |
690 | filename = AR6003_REV2_BOARD_DATA_FILE; | |
691 | break; | |
31024d99 KF |
692 | case AR6004_REV1_VERSION: |
693 | filename = AR6004_REV1_BOARD_DATA_FILE; | |
694 | break; | |
bdcd8170 KV |
695 | default: |
696 | filename = AR6003_REV3_BOARD_DATA_FILE; | |
697 | break; | |
698 | } | |
699 | ||
700 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, | |
701 | &ar->fw_board_len); | |
702 | if (ret == 0) { | |
703 | /* managed to get proper board file */ | |
704 | return 0; | |
705 | } | |
706 | ||
707 | /* there was no proper board file, try to use default instead */ | |
708 | ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", | |
709 | filename, ret); | |
710 | ||
711 | switch (ar->version.target_ver) { | |
712 | case AR6003_REV2_VERSION: | |
713 | filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE; | |
714 | break; | |
31024d99 KF |
715 | case AR6004_REV1_VERSION: |
716 | filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE; | |
717 | break; | |
bdcd8170 KV |
718 | default: |
719 | filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE; | |
720 | break; | |
721 | } | |
722 | ||
723 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, | |
724 | &ar->fw_board_len); | |
725 | if (ret) { | |
726 | ath6kl_err("Failed to get default board file %s: %d\n", | |
727 | filename, ret); | |
728 | return ret; | |
729 | } | |
730 | ||
731 | ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); | |
732 | ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); | |
733 | ||
734 | return 0; | |
735 | } | |
736 | ||
737 | ||
738 | static int ath6kl_upload_board_file(struct ath6kl *ar) | |
739 | { | |
740 | u32 board_address, board_ext_address, param; | |
31024d99 | 741 | u32 board_data_size, board_ext_data_size; |
bdcd8170 KV |
742 | int ret; |
743 | ||
744 | if (ar->fw_board == NULL) { | |
745 | ret = ath6kl_fetch_board_file(ar); | |
746 | if (ret) | |
747 | return ret; | |
748 | } | |
749 | ||
31024d99 KF |
750 | /* |
751 | * Determine where in Target RAM to write Board Data. | |
752 | * For AR6004, host determine Target RAM address for | |
753 | * writing board data. | |
754 | */ | |
755 | if (ar->target_type == TARGET_TYPE_AR6004) { | |
756 | board_address = AR6004_REV1_BOARD_DATA_ADDRESS; | |
757 | ath6kl_bmi_write(ar, | |
758 | ath6kl_get_hi_item_addr(ar, | |
759 | HI_ITEM(hi_board_data)), | |
760 | (u8 *) &board_address, 4); | |
761 | } else { | |
762 | ath6kl_bmi_read(ar, | |
763 | ath6kl_get_hi_item_addr(ar, | |
764 | HI_ITEM(hi_board_data)), | |
765 | (u8 *) &board_address, 4); | |
766 | } | |
767 | ||
bdcd8170 KV |
768 | ath6kl_dbg(ATH6KL_DBG_TRC, "board data download addr: 0x%x\n", |
769 | board_address); | |
770 | ||
771 | /* determine where in target ram to write extended board data */ | |
772 | ath6kl_bmi_read(ar, | |
773 | ath6kl_get_hi_item_addr(ar, | |
774 | HI_ITEM(hi_board_ext_data)), | |
775 | (u8 *) &board_ext_address, 4); | |
776 | ||
777 | ath6kl_dbg(ATH6KL_DBG_TRC, "board file download addr: 0x%x\n", | |
778 | board_ext_address); | |
779 | ||
780 | if (board_ext_address == 0) { | |
781 | ath6kl_err("Failed to get board file target address.\n"); | |
782 | return -EINVAL; | |
783 | } | |
784 | ||
31024d99 KF |
785 | switch (ar->target_type) { |
786 | case TARGET_TYPE_AR6003: | |
787 | board_data_size = AR6003_BOARD_DATA_SZ; | |
788 | board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; | |
789 | break; | |
790 | case TARGET_TYPE_AR6004: | |
791 | board_data_size = AR6004_BOARD_DATA_SZ; | |
792 | board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; | |
793 | break; | |
794 | default: | |
795 | WARN_ON(1); | |
796 | return -EINVAL; | |
797 | break; | |
798 | } | |
799 | ||
800 | if (ar->fw_board_len == (board_data_size + | |
801 | board_ext_data_size)) { | |
802 | ||
bdcd8170 KV |
803 | /* write extended board data */ |
804 | ret = ath6kl_bmi_write(ar, board_ext_address, | |
31024d99 KF |
805 | ar->fw_board + board_data_size, |
806 | board_ext_data_size); | |
bdcd8170 KV |
807 | if (ret) { |
808 | ath6kl_err("Failed to write extended board data: %d\n", | |
809 | ret); | |
810 | return ret; | |
811 | } | |
812 | ||
813 | /* record that extended board data is initialized */ | |
31024d99 KF |
814 | param = (board_ext_data_size << 16) | 1; |
815 | ||
bdcd8170 KV |
816 | ath6kl_bmi_write(ar, |
817 | ath6kl_get_hi_item_addr(ar, | |
818 | HI_ITEM(hi_board_ext_data_config)), | |
819 | (unsigned char *) ¶m, 4); | |
820 | } | |
821 | ||
31024d99 | 822 | if (ar->fw_board_len < board_data_size) { |
bdcd8170 KV |
823 | ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); |
824 | ret = -EINVAL; | |
825 | return ret; | |
826 | } | |
827 | ||
828 | ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, | |
31024d99 | 829 | board_data_size); |
bdcd8170 KV |
830 | |
831 | if (ret) { | |
832 | ath6kl_err("Board file bmi write failed: %d\n", ret); | |
833 | return ret; | |
834 | } | |
835 | ||
836 | /* record the fact that Board Data IS initialized */ | |
837 | param = 1; | |
838 | ath6kl_bmi_write(ar, | |
839 | ath6kl_get_hi_item_addr(ar, | |
840 | HI_ITEM(hi_board_data_initialized)), | |
841 | (u8 *)¶m, 4); | |
842 | ||
843 | return ret; | |
844 | } | |
845 | ||
846 | static int ath6kl_upload_otp(struct ath6kl *ar) | |
847 | { | |
848 | const char *filename; | |
849 | u32 address, param; | |
850 | int ret; | |
851 | ||
852 | switch (ar->version.target_ver) { | |
853 | case AR6003_REV2_VERSION: | |
854 | filename = AR6003_REV2_OTP_FILE; | |
855 | break; | |
31024d99 KF |
856 | case AR6004_REV1_VERSION: |
857 | ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n"); | |
858 | return 0; | |
859 | break; | |
bdcd8170 KV |
860 | default: |
861 | filename = AR6003_REV3_OTP_FILE; | |
862 | break; | |
863 | } | |
864 | ||
865 | if (ar->fw_otp == NULL) { | |
866 | ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, | |
867 | &ar->fw_otp_len); | |
868 | if (ret) { | |
869 | ath6kl_err("Failed to get OTP file %s: %d\n", | |
870 | filename, ret); | |
871 | return ret; | |
872 | } | |
873 | } | |
874 | ||
875 | address = ath6kl_get_load_address(ar->version.target_ver, | |
876 | APP_LOAD_ADDR); | |
877 | ||
878 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, | |
879 | ar->fw_otp_len); | |
880 | if (ret) { | |
881 | ath6kl_err("Failed to upload OTP file: %d\n", ret); | |
882 | return ret; | |
883 | } | |
884 | ||
885 | /* execute the OTP code */ | |
886 | param = 0; | |
887 | address = ath6kl_get_load_address(ar->version.target_ver, | |
888 | APP_START_OVERRIDE_ADDR); | |
889 | ath6kl_bmi_execute(ar, address, ¶m); | |
890 | ||
891 | return ret; | |
892 | } | |
893 | ||
894 | static int ath6kl_upload_firmware(struct ath6kl *ar) | |
895 | { | |
896 | const char *filename; | |
897 | u32 address; | |
898 | int ret; | |
899 | ||
003353b0 KV |
900 | if (testmode) { |
901 | switch (ar->version.target_ver) { | |
902 | case AR6003_REV2_VERSION: | |
903 | filename = AR6003_REV2_TCMD_FIRMWARE_FILE; | |
904 | break; | |
905 | case AR6003_REV3_VERSION: | |
906 | filename = AR6003_REV3_TCMD_FIRMWARE_FILE; | |
907 | break; | |
908 | case AR6004_REV1_VERSION: | |
909 | ath6kl_warn("testmode not supported with ar6004\n"); | |
910 | return -EOPNOTSUPP; | |
911 | default: | |
912 | ath6kl_warn("unknown target version: 0x%x\n", | |
913 | ar->version.target_ver); | |
914 | return -EINVAL; | |
915 | } | |
916 | ||
917 | set_bit(TESTMODE, &ar->flag); | |
918 | ||
919 | goto get_fw; | |
920 | } | |
921 | ||
bdcd8170 KV |
922 | switch (ar->version.target_ver) { |
923 | case AR6003_REV2_VERSION: | |
924 | filename = AR6003_REV2_FIRMWARE_FILE; | |
925 | break; | |
31024d99 KF |
926 | case AR6004_REV1_VERSION: |
927 | filename = AR6004_REV1_FIRMWARE_FILE; | |
928 | break; | |
bdcd8170 KV |
929 | default: |
930 | filename = AR6003_REV3_FIRMWARE_FILE; | |
931 | break; | |
932 | } | |
933 | ||
003353b0 KV |
934 | get_fw: |
935 | ||
bdcd8170 KV |
936 | if (ar->fw == NULL) { |
937 | ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); | |
938 | if (ret) { | |
939 | ath6kl_err("Failed to get firmware file %s: %d\n", | |
940 | filename, ret); | |
941 | return ret; | |
942 | } | |
943 | } | |
944 | ||
945 | address = ath6kl_get_load_address(ar->version.target_ver, | |
946 | APP_LOAD_ADDR); | |
947 | ||
948 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); | |
949 | ||
950 | if (ret) { | |
951 | ath6kl_err("Failed to write firmware: %d\n", ret); | |
952 | return ret; | |
953 | } | |
954 | ||
31024d99 KF |
955 | /* |
956 | * Set starting address for firmware | |
957 | * Don't need to setup app_start override addr on AR6004 | |
958 | */ | |
959 | if (ar->target_type != TARGET_TYPE_AR6004) { | |
960 | address = ath6kl_get_load_address(ar->version.target_ver, | |
961 | APP_START_OVERRIDE_ADDR); | |
962 | ath6kl_bmi_set_app_start(ar, address); | |
963 | } | |
bdcd8170 KV |
964 | return ret; |
965 | } | |
966 | ||
967 | static int ath6kl_upload_patch(struct ath6kl *ar) | |
968 | { | |
969 | const char *filename; | |
970 | u32 address, param; | |
971 | int ret; | |
972 | ||
973 | switch (ar->version.target_ver) { | |
974 | case AR6003_REV2_VERSION: | |
975 | filename = AR6003_REV2_PATCH_FILE; | |
976 | break; | |
31024d99 KF |
977 | case AR6004_REV1_VERSION: |
978 | /* FIXME: implement for AR6004 */ | |
979 | return 0; | |
980 | break; | |
bdcd8170 KV |
981 | default: |
982 | filename = AR6003_REV3_PATCH_FILE; | |
983 | break; | |
984 | } | |
985 | ||
986 | if (ar->fw_patch == NULL) { | |
987 | ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, | |
988 | &ar->fw_patch_len); | |
989 | if (ret) { | |
990 | ath6kl_err("Failed to get patch file %s: %d\n", | |
991 | filename, ret); | |
992 | return ret; | |
993 | } | |
994 | } | |
995 | ||
996 | address = ath6kl_get_load_address(ar->version.target_ver, | |
997 | DATASET_PATCH_ADDR); | |
998 | ||
999 | ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); | |
1000 | if (ret) { | |
1001 | ath6kl_err("Failed to write patch file: %d\n", ret); | |
1002 | return ret; | |
1003 | } | |
1004 | ||
1005 | param = address; | |
1006 | ath6kl_bmi_write(ar, | |
1007 | ath6kl_get_hi_item_addr(ar, | |
1008 | HI_ITEM(hi_dset_list_head)), | |
1009 | (unsigned char *) ¶m, 4); | |
1010 | ||
1011 | return 0; | |
1012 | } | |
1013 | ||
1014 | static int ath6kl_init_upload(struct ath6kl *ar) | |
1015 | { | |
1016 | u32 param, options, sleep, address; | |
1017 | int status = 0; | |
1018 | ||
31024d99 KF |
1019 | if (ar->target_type != TARGET_TYPE_AR6003 && |
1020 | ar->target_type != TARGET_TYPE_AR6004) | |
bdcd8170 KV |
1021 | return -EINVAL; |
1022 | ||
1023 | /* temporarily disable system sleep */ | |
1024 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; | |
1025 | status = ath6kl_bmi_reg_read(ar, address, ¶m); | |
1026 | if (status) | |
1027 | return status; | |
1028 | ||
1029 | options = param; | |
1030 | ||
1031 | param |= ATH6KL_OPTION_SLEEP_DISABLE; | |
1032 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1033 | if (status) | |
1034 | return status; | |
1035 | ||
1036 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; | |
1037 | status = ath6kl_bmi_reg_read(ar, address, ¶m); | |
1038 | if (status) | |
1039 | return status; | |
1040 | ||
1041 | sleep = param; | |
1042 | ||
1043 | param |= SM(SYSTEM_SLEEP_DISABLE, 1); | |
1044 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1045 | if (status) | |
1046 | return status; | |
1047 | ||
1048 | ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", | |
1049 | options, sleep); | |
1050 | ||
1051 | /* program analog PLL register */ | |
31024d99 KF |
1052 | /* no need to control 40/44MHz clock on AR6004 */ |
1053 | if (ar->target_type != TARGET_TYPE_AR6004) { | |
1054 | status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, | |
1055 | 0xF9104001); | |
bdcd8170 | 1056 | |
31024d99 KF |
1057 | if (status) |
1058 | return status; | |
bdcd8170 | 1059 | |
31024d99 KF |
1060 | /* Run at 80/88MHz by default */ |
1061 | param = SM(CPU_CLOCK_STANDARD, 1); | |
1062 | ||
1063 | address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; | |
1064 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1065 | if (status) | |
1066 | return status; | |
1067 | } | |
bdcd8170 KV |
1068 | |
1069 | param = 0; | |
1070 | address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; | |
1071 | param = SM(LPO_CAL_ENABLE, 1); | |
1072 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1073 | if (status) | |
1074 | return status; | |
1075 | ||
1076 | /* WAR to avoid SDIO CRC err */ | |
1077 | if (ar->version.target_ver == AR6003_REV2_VERSION) { | |
1078 | ath6kl_err("temporary war to avoid sdio crc error\n"); | |
1079 | ||
1080 | param = 0x20; | |
1081 | ||
1082 | address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; | |
1083 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1084 | if (status) | |
1085 | return status; | |
1086 | ||
1087 | address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; | |
1088 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1089 | if (status) | |
1090 | return status; | |
1091 | ||
1092 | address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; | |
1093 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1094 | if (status) | |
1095 | return status; | |
1096 | ||
1097 | address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; | |
1098 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1099 | if (status) | |
1100 | return status; | |
1101 | } | |
1102 | ||
1103 | /* write EEPROM data to Target RAM */ | |
1104 | status = ath6kl_upload_board_file(ar); | |
1105 | if (status) | |
1106 | return status; | |
1107 | ||
1108 | /* transfer One time Programmable data */ | |
1109 | status = ath6kl_upload_otp(ar); | |
1110 | if (status) | |
1111 | return status; | |
1112 | ||
1113 | /* Download Target firmware */ | |
1114 | status = ath6kl_upload_firmware(ar); | |
1115 | if (status) | |
1116 | return status; | |
1117 | ||
1118 | status = ath6kl_upload_patch(ar); | |
1119 | if (status) | |
1120 | return status; | |
1121 | ||
1122 | /* Restore system sleep */ | |
1123 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; | |
1124 | status = ath6kl_bmi_reg_write(ar, address, sleep); | |
1125 | if (status) | |
1126 | return status; | |
1127 | ||
1128 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; | |
1129 | param = options | 0x20; | |
1130 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1131 | if (status) | |
1132 | return status; | |
1133 | ||
1134 | /* Configure GPIO AR6003 UART */ | |
1135 | param = CONFIG_AR600x_DEBUG_UART_TX_PIN; | |
1136 | status = ath6kl_bmi_write(ar, | |
1137 | ath6kl_get_hi_item_addr(ar, | |
1138 | HI_ITEM(hi_dbg_uart_txpin)), | |
1139 | (u8 *)¶m, 4); | |
1140 | ||
1141 | return status; | |
1142 | } | |
1143 | ||
1144 | static int ath6kl_init(struct net_device *dev) | |
1145 | { | |
1146 | struct ath6kl *ar = ath6kl_priv(dev); | |
1147 | int status = 0; | |
1148 | s32 timeleft; | |
1149 | ||
1150 | if (!ar) | |
1151 | return -EIO; | |
1152 | ||
1153 | /* Do we need to finish the BMI phase */ | |
1154 | if (ath6kl_bmi_done(ar)) { | |
1155 | status = -EIO; | |
1156 | goto ath6kl_init_done; | |
1157 | } | |
1158 | ||
1159 | /* Indicate that WMI is enabled (although not ready yet) */ | |
1160 | set_bit(WMI_ENABLED, &ar->flag); | |
2865785e | 1161 | ar->wmi = ath6kl_wmi_init(ar); |
bdcd8170 KV |
1162 | if (!ar->wmi) { |
1163 | ath6kl_err("failed to initialize wmi\n"); | |
1164 | status = -EIO; | |
1165 | goto ath6kl_init_done; | |
1166 | } | |
1167 | ||
1168 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); | |
1169 | ||
852bd9d9 VT |
1170 | wlan_node_table_init(&ar->scan_table); |
1171 | ||
bdcd8170 KV |
1172 | /* |
1173 | * The reason we have to wait for the target here is that the | |
1174 | * driver layer has to init BMI in order to set the host block | |
1175 | * size. | |
1176 | */ | |
ad226ec2 | 1177 | if (ath6kl_htc_wait_target(ar->htc_target)) { |
bdcd8170 | 1178 | status = -EIO; |
852bd9d9 | 1179 | goto err_node_cleanup; |
bdcd8170 KV |
1180 | } |
1181 | ||
1182 | if (ath6kl_init_service_ep(ar)) { | |
1183 | status = -EIO; | |
1184 | goto err_cleanup_scatter; | |
1185 | } | |
1186 | ||
1187 | /* setup access class priority mappings */ | |
1188 | ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ | |
1189 | ar->ac_stream_pri_map[WMM_AC_BE] = 1; | |
1190 | ar->ac_stream_pri_map[WMM_AC_VI] = 2; | |
1191 | ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ | |
1192 | ||
1193 | /* give our connected endpoints some buffers */ | |
1194 | ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); | |
1195 | ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); | |
1196 | ||
1197 | /* allocate some buffers that handle larger AMSDU frames */ | |
1198 | ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); | |
1199 | ||
1200 | /* setup credit distribution */ | |
1201 | ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info); | |
1202 | ||
1203 | ath6kl_cookie_init(ar); | |
1204 | ||
1205 | /* start HTC */ | |
ad226ec2 | 1206 | status = ath6kl_htc_start(ar->htc_target); |
bdcd8170 KV |
1207 | |
1208 | if (status) { | |
1209 | ath6kl_cookie_cleanup(ar); | |
1210 | goto err_rxbuf_cleanup; | |
1211 | } | |
1212 | ||
1213 | /* Wait for Wmi event to be ready */ | |
1214 | timeleft = wait_event_interruptible_timeout(ar->event_wq, | |
1215 | test_bit(WMI_READY, | |
1216 | &ar->flag), | |
1217 | WMI_TIMEOUT); | |
1218 | ||
1219 | if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { | |
1220 | ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", | |
1221 | ATH6KL_ABI_VERSION, ar->version.abi_ver); | |
1222 | status = -EIO; | |
1223 | goto err_htc_stop; | |
1224 | } | |
1225 | ||
1226 | if (!timeleft || signal_pending(current)) { | |
1227 | ath6kl_err("wmi is not ready or wait was interrupted\n"); | |
1228 | status = -EIO; | |
1229 | goto err_htc_stop; | |
1230 | } | |
1231 | ||
1232 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); | |
1233 | ||
1234 | /* communicate the wmi protocol verision to the target */ | |
1235 | if ((ath6kl_set_host_app_area(ar)) != 0) | |
1236 | ath6kl_err("unable to set the host app area\n"); | |
1237 | ||
1238 | ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | | |
1239 | ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; | |
1240 | ||
1241 | status = ath6kl_target_config_wlan_params(ar); | |
1242 | if (!status) | |
1243 | goto ath6kl_init_done; | |
1244 | ||
1245 | err_htc_stop: | |
ad226ec2 | 1246 | ath6kl_htc_stop(ar->htc_target); |
bdcd8170 | 1247 | err_rxbuf_cleanup: |
ad226ec2 | 1248 | ath6kl_htc_flush_rx_buf(ar->htc_target); |
bdcd8170 KV |
1249 | ath6kl_cleanup_amsdu_rxbufs(ar); |
1250 | err_cleanup_scatter: | |
1251 | ath6kl_hif_cleanup_scatter(ar); | |
852bd9d9 VT |
1252 | err_node_cleanup: |
1253 | wlan_node_table_cleanup(&ar->scan_table); | |
bdcd8170 KV |
1254 | ath6kl_wmi_shutdown(ar->wmi); |
1255 | clear_bit(WMI_ENABLED, &ar->flag); | |
1256 | ar->wmi = NULL; | |
1257 | ||
1258 | ath6kl_init_done: | |
1259 | return status; | |
1260 | } | |
1261 | ||
1262 | int ath6kl_core_init(struct ath6kl *ar) | |
1263 | { | |
1264 | int ret = 0; | |
1265 | struct ath6kl_bmi_target_info targ_info; | |
1266 | ||
1267 | ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); | |
1268 | if (!ar->ath6kl_wq) | |
1269 | return -ENOMEM; | |
1270 | ||
1271 | ret = ath6kl_bmi_init(ar); | |
1272 | if (ret) | |
1273 | goto err_wq; | |
1274 | ||
1275 | ret = ath6kl_bmi_get_target_info(ar, &targ_info); | |
1276 | if (ret) | |
1277 | goto err_bmi_cleanup; | |
1278 | ||
1279 | ar->version.target_ver = le32_to_cpu(targ_info.version); | |
1280 | ar->target_type = le32_to_cpu(targ_info.type); | |
1281 | ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version); | |
1282 | ||
1283 | ret = ath6kl_configure_target(ar); | |
1284 | if (ret) | |
1285 | goto err_bmi_cleanup; | |
1286 | ||
ad226ec2 | 1287 | ar->htc_target = ath6kl_htc_create(ar); |
bdcd8170 KV |
1288 | |
1289 | if (!ar->htc_target) { | |
1290 | ret = -ENOMEM; | |
1291 | goto err_bmi_cleanup; | |
1292 | } | |
1293 | ||
1294 | ar->aggr_cntxt = aggr_init(ar->net_dev); | |
1295 | if (!ar->aggr_cntxt) { | |
1296 | ath6kl_err("failed to initialize aggr\n"); | |
1297 | ret = -ENOMEM; | |
1298 | goto err_htc_cleanup; | |
1299 | } | |
1300 | ||
1301 | ret = ath6kl_init_upload(ar); | |
1302 | if (ret) | |
1303 | goto err_htc_cleanup; | |
1304 | ||
1305 | ret = ath6kl_init(ar->net_dev); | |
1306 | if (ret) | |
1307 | goto err_htc_cleanup; | |
1308 | ||
1309 | /* This runs the init function if registered */ | |
1310 | ret = register_netdev(ar->net_dev); | |
1311 | if (ret) { | |
1312 | ath6kl_err("register_netdev failed\n"); | |
1313 | ath6kl_destroy(ar->net_dev, 0); | |
1314 | return ret; | |
1315 | } | |
1316 | ||
1317 | set_bit(NETDEV_REGISTERED, &ar->flag); | |
1318 | ||
1319 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", | |
1320 | __func__, ar->net_dev->name, ar->net_dev, ar); | |
1321 | ||
1322 | return ret; | |
1323 | ||
1324 | err_htc_cleanup: | |
ad226ec2 | 1325 | ath6kl_htc_cleanup(ar->htc_target); |
bdcd8170 KV |
1326 | err_bmi_cleanup: |
1327 | ath6kl_bmi_cleanup(ar); | |
1328 | err_wq: | |
1329 | destroy_workqueue(ar->ath6kl_wq); | |
1330 | return ret; | |
1331 | } | |
1332 | ||
1333 | void ath6kl_stop_txrx(struct ath6kl *ar) | |
1334 | { | |
1335 | struct net_device *ndev = ar->net_dev; | |
1336 | ||
1337 | if (!ndev) | |
1338 | return; | |
1339 | ||
1340 | set_bit(DESTROY_IN_PROGRESS, &ar->flag); | |
1341 | ||
1342 | if (down_interruptible(&ar->sem)) { | |
1343 | ath6kl_err("down_interruptible failed\n"); | |
1344 | return; | |
1345 | } | |
1346 | ||
1347 | if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR) | |
1348 | ath6kl_stop_endpoint(ndev, false, true); | |
1349 | ||
575b5f34 | 1350 | clear_bit(WLAN_ENABLED, &ar->flag); |
bdcd8170 KV |
1351 | } |
1352 | ||
1353 | /* | |
1354 | * We need to differentiate between the surprise and planned removal of the | |
1355 | * device because of the following consideration: | |
1356 | * | |
1357 | * - In case of surprise removal, the hcd already frees up the pending | |
1358 | * for the device and hence there is no need to unregister the function | |
1359 | * driver inorder to get these requests. For planned removal, the function | |
1360 | * driver has to explicitly unregister itself to have the hcd return all the | |
1361 | * pending requests before the data structures for the devices are freed up. | |
1362 | * Note that as per the current implementation, the function driver will | |
1363 | * end up releasing all the devices since there is no API to selectively | |
1364 | * release a particular device. | |
1365 | * | |
1366 | * - Certain commands issued to the target can be skipped for surprise | |
1367 | * removal since they will anyway not go through. | |
1368 | */ | |
1369 | void ath6kl_destroy(struct net_device *dev, unsigned int unregister) | |
1370 | { | |
1371 | struct ath6kl *ar; | |
1372 | ||
1373 | if (!dev || !ath6kl_priv(dev)) { | |
1374 | ath6kl_err("failed to get device structure\n"); | |
1375 | return; | |
1376 | } | |
1377 | ||
1378 | ar = ath6kl_priv(dev); | |
1379 | ||
1380 | destroy_workqueue(ar->ath6kl_wq); | |
1381 | ||
1382 | if (ar->htc_target) | |
ad226ec2 | 1383 | ath6kl_htc_cleanup(ar->htc_target); |
bdcd8170 KV |
1384 | |
1385 | aggr_module_destroy(ar->aggr_cntxt); | |
1386 | ||
1387 | ath6kl_cookie_cleanup(ar); | |
1388 | ||
1389 | ath6kl_cleanup_amsdu_rxbufs(ar); | |
1390 | ||
1391 | ath6kl_bmi_cleanup(ar); | |
1392 | ||
bdf5396b KV |
1393 | ath6kl_debug_cleanup(ar); |
1394 | ||
bdcd8170 KV |
1395 | if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) { |
1396 | unregister_netdev(dev); | |
1397 | clear_bit(NETDEV_REGISTERED, &ar->flag); | |
1398 | } | |
1399 | ||
1400 | free_netdev(dev); | |
1401 | ||
852bd9d9 VT |
1402 | wlan_node_table_cleanup(&ar->scan_table); |
1403 | ||
19703573 RM |
1404 | kfree(ar->fw_board); |
1405 | kfree(ar->fw_otp); | |
1406 | kfree(ar->fw); | |
1407 | kfree(ar->fw_patch); | |
1408 | ||
bdcd8170 KV |
1409 | ath6kl_cfg80211_deinit(ar); |
1410 | } |