Commit | Line | Data |
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bdcd8170 KV |
1 | |
2 | /* | |
3 | * Copyright (c) 2011 Atheros Communications Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
c6efe578 | 18 | #include <linux/moduleparam.h> |
f7830202 | 19 | #include <linux/errno.h> |
92ecbff4 | 20 | #include <linux/of.h> |
bdcd8170 KV |
21 | #include <linux/mmc/sdio_func.h> |
22 | #include "core.h" | |
23 | #include "cfg80211.h" | |
24 | #include "target.h" | |
25 | #include "debug.h" | |
26 | #include "hif-ops.h" | |
27 | ||
28 | unsigned int debug_mask; | |
003353b0 | 29 | static unsigned int testmode; |
8277de15 | 30 | static bool suspend_cutpower; |
bdcd8170 KV |
31 | |
32 | module_param(debug_mask, uint, 0644); | |
003353b0 | 33 | module_param(testmode, uint, 0644); |
8277de15 | 34 | module_param(suspend_cutpower, bool, 0444); |
bdcd8170 | 35 | |
856f4b31 KV |
36 | static const struct ath6kl_hw hw_list[] = { |
37 | { | |
0d0192ba | 38 | .id = AR6003_HW_2_0_VERSION, |
293badf4 | 39 | .name = "ar6003 hw 2.0", |
856f4b31 KV |
40 | .dataset_patch_addr = 0x57e884, |
41 | .app_load_addr = 0x543180, | |
42 | .board_ext_data_addr = 0x57e500, | |
43 | .reserved_ram_size = 6912, | |
44 | ||
45 | /* hw2.0 needs override address hardcoded */ | |
46 | .app_start_override_addr = 0x944C00, | |
d1a9421d KV |
47 | |
48 | .fw_otp = AR6003_HW_2_0_OTP_FILE, | |
49 | .fw = AR6003_HW_2_0_FIRMWARE_FILE, | |
50 | .fw_tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE, | |
51 | .fw_patch = AR6003_HW_2_0_PATCH_FILE, | |
52 | .fw_api2 = AR6003_HW_2_0_FIRMWARE_2_FILE, | |
53 | .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE, | |
54 | .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE, | |
856f4b31 KV |
55 | }, |
56 | { | |
0d0192ba | 57 | .id = AR6003_HW_2_1_1_VERSION, |
293badf4 | 58 | .name = "ar6003 hw 2.1.1", |
856f4b31 KV |
59 | .dataset_patch_addr = 0x57ff74, |
60 | .app_load_addr = 0x1234, | |
61 | .board_ext_data_addr = 0x542330, | |
62 | .reserved_ram_size = 512, | |
d1a9421d KV |
63 | |
64 | .fw_otp = AR6003_HW_2_1_1_OTP_FILE, | |
65 | .fw = AR6003_HW_2_1_1_FIRMWARE_FILE, | |
66 | .fw_tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE, | |
67 | .fw_patch = AR6003_HW_2_1_1_PATCH_FILE, | |
68 | .fw_api2 = AR6003_HW_2_1_1_FIRMWARE_2_FILE, | |
69 | .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE, | |
70 | .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE, | |
856f4b31 KV |
71 | }, |
72 | { | |
0d0192ba | 73 | .id = AR6004_HW_1_0_VERSION, |
293badf4 | 74 | .name = "ar6004 hw 1.0", |
856f4b31 KV |
75 | .dataset_patch_addr = 0x57e884, |
76 | .app_load_addr = 0x1234, | |
77 | .board_ext_data_addr = 0x437000, | |
78 | .reserved_ram_size = 19456, | |
0d4d72bf | 79 | .board_addr = 0x433900, |
d1a9421d KV |
80 | |
81 | .fw = AR6004_HW_1_0_FIRMWARE_FILE, | |
82 | .fw_api2 = AR6004_HW_1_0_FIRMWARE_2_FILE, | |
83 | .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE, | |
84 | .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE, | |
856f4b31 KV |
85 | }, |
86 | { | |
0d0192ba | 87 | .id = AR6004_HW_1_1_VERSION, |
293badf4 | 88 | .name = "ar6004 hw 1.1", |
856f4b31 KV |
89 | .dataset_patch_addr = 0x57e884, |
90 | .app_load_addr = 0x1234, | |
91 | .board_ext_data_addr = 0x437000, | |
92 | .reserved_ram_size = 11264, | |
0d4d72bf | 93 | .board_addr = 0x43d400, |
d1a9421d KV |
94 | |
95 | .fw = AR6004_HW_1_1_FIRMWARE_FILE, | |
96 | .fw_api2 = AR6004_HW_1_1_FIRMWARE_2_FILE, | |
97 | .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, | |
98 | .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, | |
856f4b31 KV |
99 | }, |
100 | }; | |
101 | ||
bdcd8170 KV |
102 | /* |
103 | * Include definitions here that can be used to tune the WLAN module | |
104 | * behavior. Different customers can tune the behavior as per their needs, | |
105 | * here. | |
106 | */ | |
107 | ||
108 | /* | |
109 | * This configuration item enable/disable keepalive support. | |
110 | * Keepalive support: In the absence of any data traffic to AP, null | |
111 | * frames will be sent to the AP at periodic interval, to keep the association | |
112 | * active. This configuration item defines the periodic interval. | |
113 | * Use value of zero to disable keepalive support | |
114 | * Default: 60 seconds | |
115 | */ | |
116 | #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 | |
117 | ||
118 | /* | |
119 | * This configuration item sets the value of disconnect timeout | |
120 | * Firmware delays sending the disconnec event to the host for this | |
121 | * timeout after is gets disconnected from the current AP. | |
122 | * If the firmware successly roams within the disconnect timeout | |
123 | * it sends a new connect event | |
124 | */ | |
125 | #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 | |
126 | ||
127 | #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8 | |
128 | ||
bdcd8170 KV |
129 | #define ATH6KL_DATA_OFFSET 64 |
130 | struct sk_buff *ath6kl_buf_alloc(int size) | |
131 | { | |
132 | struct sk_buff *skb; | |
133 | u16 reserved; | |
134 | ||
135 | /* Add chacheline space at front and back of buffer */ | |
136 | reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + | |
1df94a85 | 137 | sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; |
bdcd8170 KV |
138 | skb = dev_alloc_skb(size + reserved); |
139 | ||
140 | if (skb) | |
141 | skb_reserve(skb, reserved - L1_CACHE_BYTES); | |
142 | return skb; | |
143 | } | |
144 | ||
e29f25f5 | 145 | void ath6kl_init_profile_info(struct ath6kl_vif *vif) |
bdcd8170 | 146 | { |
3450334f VT |
147 | vif->ssid_len = 0; |
148 | memset(vif->ssid, 0, sizeof(vif->ssid)); | |
149 | ||
150 | vif->dot11_auth_mode = OPEN_AUTH; | |
151 | vif->auth_mode = NONE_AUTH; | |
152 | vif->prwise_crypto = NONE_CRYPT; | |
153 | vif->prwise_crypto_len = 0; | |
154 | vif->grp_crypto = NONE_CRYPT; | |
155 | vif->grp_crypto_len = 0; | |
6f2a73f9 | 156 | memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); |
8c8b65e3 VT |
157 | memset(vif->req_bssid, 0, sizeof(vif->req_bssid)); |
158 | memset(vif->bssid, 0, sizeof(vif->bssid)); | |
f74bac54 | 159 | vif->bss_ch = 0; |
bdcd8170 KV |
160 | } |
161 | ||
bdcd8170 KV |
162 | static int ath6kl_set_host_app_area(struct ath6kl *ar) |
163 | { | |
164 | u32 address, data; | |
165 | struct host_app_area host_app_area; | |
166 | ||
167 | /* Fetch the address of the host_app_area_s | |
168 | * instance in the host interest area */ | |
169 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); | |
31024d99 | 170 | address = TARG_VTOP(ar->target_type, address); |
bdcd8170 | 171 | |
addb44be | 172 | if (ath6kl_diag_read32(ar, address, &data)) |
bdcd8170 KV |
173 | return -EIO; |
174 | ||
31024d99 | 175 | address = TARG_VTOP(ar->target_type, data); |
cbf49a6f | 176 | host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); |
addb44be KV |
177 | if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, |
178 | sizeof(struct host_app_area))) | |
bdcd8170 KV |
179 | return -EIO; |
180 | ||
181 | return 0; | |
182 | } | |
183 | ||
184 | static inline void set_ac2_ep_map(struct ath6kl *ar, | |
185 | u8 ac, | |
186 | enum htc_endpoint_id ep) | |
187 | { | |
188 | ar->ac2ep_map[ac] = ep; | |
189 | ar->ep2ac_map[ep] = ac; | |
190 | } | |
191 | ||
192 | /* connect to a service */ | |
193 | static int ath6kl_connectservice(struct ath6kl *ar, | |
194 | struct htc_service_connect_req *con_req, | |
195 | char *desc) | |
196 | { | |
197 | int status; | |
198 | struct htc_service_connect_resp response; | |
199 | ||
200 | memset(&response, 0, sizeof(response)); | |
201 | ||
ad226ec2 | 202 | status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); |
bdcd8170 KV |
203 | if (status) { |
204 | ath6kl_err("failed to connect to %s service status:%d\n", | |
205 | desc, status); | |
206 | return status; | |
207 | } | |
208 | ||
209 | switch (con_req->svc_id) { | |
210 | case WMI_CONTROL_SVC: | |
211 | if (test_bit(WMI_ENABLED, &ar->flag)) | |
212 | ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); | |
213 | ar->ctrl_ep = response.endpoint; | |
214 | break; | |
215 | case WMI_DATA_BE_SVC: | |
216 | set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); | |
217 | break; | |
218 | case WMI_DATA_BK_SVC: | |
219 | set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); | |
220 | break; | |
221 | case WMI_DATA_VI_SVC: | |
222 | set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); | |
223 | break; | |
224 | case WMI_DATA_VO_SVC: | |
225 | set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); | |
226 | break; | |
227 | default: | |
228 | ath6kl_err("service id is not mapped %d\n", con_req->svc_id); | |
229 | return -EINVAL; | |
230 | } | |
231 | ||
232 | return 0; | |
233 | } | |
234 | ||
235 | static int ath6kl_init_service_ep(struct ath6kl *ar) | |
236 | { | |
237 | struct htc_service_connect_req connect; | |
238 | ||
239 | memset(&connect, 0, sizeof(connect)); | |
240 | ||
241 | /* these fields are the same for all service endpoints */ | |
242 | connect.ep_cb.rx = ath6kl_rx; | |
243 | connect.ep_cb.rx_refill = ath6kl_rx_refill; | |
244 | connect.ep_cb.tx_full = ath6kl_tx_queue_full; | |
245 | ||
246 | /* | |
247 | * Set the max queue depth so that our ath6kl_tx_queue_full handler | |
248 | * gets called. | |
249 | */ | |
250 | connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; | |
251 | connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; | |
252 | if (!connect.ep_cb.rx_refill_thresh) | |
253 | connect.ep_cb.rx_refill_thresh++; | |
254 | ||
255 | /* connect to control service */ | |
256 | connect.svc_id = WMI_CONTROL_SVC; | |
257 | if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) | |
258 | return -EIO; | |
259 | ||
260 | connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; | |
261 | ||
262 | /* | |
263 | * Limit the HTC message size on the send path, although e can | |
264 | * receive A-MSDU frames of 4K, we will only send ethernet-sized | |
265 | * (802.3) frames on the send path. | |
266 | */ | |
267 | connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; | |
268 | ||
269 | /* | |
270 | * To reduce the amount of committed memory for larger A_MSDU | |
271 | * frames, use the recv-alloc threshold mechanism for larger | |
272 | * packets. | |
273 | */ | |
274 | connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; | |
275 | connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; | |
276 | ||
277 | /* | |
278 | * For the remaining data services set the connection flag to | |
279 | * reduce dribbling, if configured to do so. | |
280 | */ | |
281 | connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; | |
282 | connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; | |
283 | connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; | |
284 | ||
285 | connect.svc_id = WMI_DATA_BE_SVC; | |
286 | ||
287 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) | |
288 | return -EIO; | |
289 | ||
290 | /* connect to back-ground map this to WMI LOW_PRI */ | |
291 | connect.svc_id = WMI_DATA_BK_SVC; | |
292 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) | |
293 | return -EIO; | |
294 | ||
295 | /* connect to Video service, map this to to HI PRI */ | |
296 | connect.svc_id = WMI_DATA_VI_SVC; | |
297 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) | |
298 | return -EIO; | |
299 | ||
300 | /* | |
301 | * Connect to VO service, this is currently not mapped to a WMI | |
302 | * priority stream due to historical reasons. WMI originally | |
303 | * defined 3 priorities over 3 mailboxes We can change this when | |
304 | * WMI is reworked so that priorities are not dependent on | |
305 | * mailboxes. | |
306 | */ | |
307 | connect.svc_id = WMI_DATA_VO_SVC; | |
308 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) | |
309 | return -EIO; | |
310 | ||
311 | return 0; | |
312 | } | |
313 | ||
e29f25f5 | 314 | void ath6kl_init_control_info(struct ath6kl_vif *vif) |
bdcd8170 | 315 | { |
e29f25f5 | 316 | ath6kl_init_profile_info(vif); |
3450334f | 317 | vif->def_txkey_index = 0; |
6f2a73f9 | 318 | memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list)); |
f74bac54 | 319 | vif->ch_hint = 0; |
bdcd8170 KV |
320 | } |
321 | ||
322 | /* | |
323 | * Set HTC/Mbox operational parameters, this can only be called when the | |
324 | * target is in the BMI phase. | |
325 | */ | |
326 | static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, | |
327 | u8 htc_ctrl_buf) | |
328 | { | |
329 | int status; | |
330 | u32 blk_size; | |
331 | ||
332 | blk_size = ar->mbox_info.block_size; | |
333 | ||
334 | if (htc_ctrl_buf) | |
335 | blk_size |= ((u32)htc_ctrl_buf) << 16; | |
336 | ||
337 | /* set the host interest area for the block size */ | |
338 | status = ath6kl_bmi_write(ar, | |
339 | ath6kl_get_hi_item_addr(ar, | |
340 | HI_ITEM(hi_mbox_io_block_sz)), | |
341 | (u8 *)&blk_size, | |
342 | 4); | |
343 | if (status) { | |
344 | ath6kl_err("bmi_write_memory for IO block size failed\n"); | |
345 | goto out; | |
346 | } | |
347 | ||
348 | ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", | |
349 | blk_size, | |
350 | ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); | |
351 | ||
352 | if (mbox_isr_yield_val) { | |
353 | /* set the host interest area for the mbox ISR yield limit */ | |
354 | status = ath6kl_bmi_write(ar, | |
355 | ath6kl_get_hi_item_addr(ar, | |
356 | HI_ITEM(hi_mbox_isr_yield_limit)), | |
357 | (u8 *)&mbox_isr_yield_val, | |
358 | 4); | |
359 | if (status) { | |
360 | ath6kl_err("bmi_write_memory for yield limit failed\n"); | |
361 | goto out; | |
362 | } | |
363 | } | |
364 | ||
365 | out: | |
366 | return status; | |
367 | } | |
368 | ||
0ce59445 | 369 | static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx) |
bdcd8170 KV |
370 | { |
371 | int status = 0; | |
4dea08e0 | 372 | int ret; |
bdcd8170 KV |
373 | |
374 | /* | |
375 | * Configure the device for rx dot11 header rules. "0,0" are the | |
376 | * default values. Required if checksum offload is needed. Set | |
377 | * RxMetaVersion to 2. | |
378 | */ | |
0ce59445 | 379 | if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx, |
bdcd8170 KV |
380 | ar->rx_meta_ver, 0, 0)) { |
381 | ath6kl_err("unable to set the rx frame format\n"); | |
382 | status = -EIO; | |
383 | } | |
384 | ||
385 | if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) | |
0ce59445 | 386 | if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1, |
bdcd8170 KV |
387 | IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { |
388 | ath6kl_err("unable to set power save fail event policy\n"); | |
389 | status = -EIO; | |
390 | } | |
391 | ||
392 | if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) | |
0ce59445 | 393 | if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0, |
bdcd8170 KV |
394 | WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { |
395 | ath6kl_err("unable to set barker preamble policy\n"); | |
396 | status = -EIO; | |
397 | } | |
398 | ||
0ce59445 | 399 | if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx, |
bdcd8170 KV |
400 | WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { |
401 | ath6kl_err("unable to set keep alive interval\n"); | |
402 | status = -EIO; | |
403 | } | |
404 | ||
0ce59445 | 405 | if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx, |
bdcd8170 KV |
406 | WLAN_CONFIG_DISCONNECT_TIMEOUT)) { |
407 | ath6kl_err("unable to set disconnect timeout\n"); | |
408 | status = -EIO; | |
409 | } | |
410 | ||
411 | if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) | |
0ce59445 | 412 | if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) { |
bdcd8170 KV |
413 | ath6kl_err("unable to set txop bursting\n"); |
414 | status = -EIO; | |
415 | } | |
416 | ||
b64de356 | 417 | if (ar->p2p && (ar->vif_max == 1 || idx)) { |
0ce59445 | 418 | ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx, |
6bbc7c35 JM |
419 | P2P_FLAG_CAPABILITIES_REQ | |
420 | P2P_FLAG_MACADDR_REQ | | |
421 | P2P_FLAG_HMODEL_REQ); | |
422 | if (ret) { | |
423 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " | |
424 | "capabilities (%d) - assuming P2P not " | |
425 | "supported\n", ret); | |
426 | ar->p2p = 0; | |
427 | } | |
428 | } | |
429 | ||
b64de356 | 430 | if (ar->p2p && (ar->vif_max == 1 || idx)) { |
6bbc7c35 | 431 | /* Enable Probe Request reporting for P2P */ |
0ce59445 | 432 | ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); |
6bbc7c35 JM |
433 | if (ret) { |
434 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " | |
435 | "Request reporting (%d)\n", ret); | |
436 | } | |
4dea08e0 JM |
437 | } |
438 | ||
bdcd8170 KV |
439 | return status; |
440 | } | |
441 | ||
442 | int ath6kl_configure_target(struct ath6kl *ar) | |
443 | { | |
444 | u32 param, ram_reserved_size; | |
3226f68a | 445 | u8 fw_iftype, fw_mode = 0, fw_submode = 0; |
7b85832d | 446 | int i; |
bdcd8170 | 447 | |
7b85832d VT |
448 | /* |
449 | * Note: Even though the firmware interface type is | |
450 | * chosen as BSS_STA for all three interfaces, can | |
451 | * be configured to IBSS/AP as long as the fw submode | |
452 | * remains normal mode (0 - AP, STA and IBSS). But | |
453 | * due to an target assert in firmware only one interface is | |
454 | * configured for now. | |
455 | */ | |
dd3751f7 | 456 | fw_iftype = HI_OPTION_FW_MODE_BSS_STA; |
bdcd8170 | 457 | |
71f96ee6 | 458 | for (i = 0; i < ar->vif_max; i++) |
7b85832d VT |
459 | fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS); |
460 | ||
461 | /* | |
3226f68a VT |
462 | * By default, submodes : |
463 | * vif[0] - AP/STA/IBSS | |
464 | * vif[1] - "P2P dev"/"P2P GO"/"P2P Client" | |
465 | * vif[2] - "P2P dev"/"P2P GO"/"P2P Client" | |
7b85832d | 466 | */ |
3226f68a VT |
467 | |
468 | for (i = 0; i < ar->max_norm_iface; i++) | |
469 | fw_submode |= HI_OPTION_FW_SUBMODE_NONE << | |
470 | (i * HI_OPTION_FW_SUBMODE_BITS); | |
471 | ||
71f96ee6 | 472 | for (i = ar->max_norm_iface; i < ar->vif_max; i++) |
3226f68a VT |
473 | fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV << |
474 | (i * HI_OPTION_FW_SUBMODE_BITS); | |
7b85832d | 475 | |
b64de356 | 476 | if (ar->p2p && ar->vif_max == 1) |
7b85832d | 477 | fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; |
7b85832d | 478 | |
bdcd8170 KV |
479 | param = HTC_PROTOCOL_VERSION; |
480 | if (ath6kl_bmi_write(ar, | |
481 | ath6kl_get_hi_item_addr(ar, | |
482 | HI_ITEM(hi_app_host_interest)), | |
483 | (u8 *)¶m, 4) != 0) { | |
484 | ath6kl_err("bmi_write_memory for htc version failed\n"); | |
485 | return -EIO; | |
486 | } | |
487 | ||
488 | /* set the firmware mode to STA/IBSS/AP */ | |
489 | param = 0; | |
490 | ||
491 | if (ath6kl_bmi_read(ar, | |
492 | ath6kl_get_hi_item_addr(ar, | |
493 | HI_ITEM(hi_option_flag)), | |
494 | (u8 *)¶m, 4) != 0) { | |
495 | ath6kl_err("bmi_read_memory for setting fwmode failed\n"); | |
496 | return -EIO; | |
497 | } | |
498 | ||
71f96ee6 | 499 | param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT); |
7b85832d VT |
500 | param |= fw_mode << HI_OPTION_FW_MODE_SHIFT; |
501 | param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT; | |
502 | ||
bdcd8170 KV |
503 | param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); |
504 | param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
505 | ||
506 | if (ath6kl_bmi_write(ar, | |
507 | ath6kl_get_hi_item_addr(ar, | |
508 | HI_ITEM(hi_option_flag)), | |
509 | (u8 *)¶m, | |
510 | 4) != 0) { | |
511 | ath6kl_err("bmi_write_memory for setting fwmode failed\n"); | |
512 | return -EIO; | |
513 | } | |
514 | ||
515 | ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); | |
516 | ||
517 | /* | |
518 | * Hardcode the address use for the extended board data | |
519 | * Ideally this should be pre-allocate by the OS at boot time | |
520 | * But since it is a new feature and board data is loaded | |
521 | * at init time, we have to workaround this from host. | |
522 | * It is difficult to patch the firmware boot code, | |
523 | * but possible in theory. | |
524 | */ | |
525 | ||
991b27ea KV |
526 | param = ar->hw.board_ext_data_addr; |
527 | ram_reserved_size = ar->hw.reserved_ram_size; | |
bdcd8170 | 528 | |
991b27ea KV |
529 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, |
530 | HI_ITEM(hi_board_ext_data)), | |
531 | (u8 *)¶m, 4) != 0) { | |
532 | ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); | |
533 | return -EIO; | |
534 | } | |
535 | ||
536 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, | |
537 | HI_ITEM(hi_end_ram_reserve_sz)), | |
538 | (u8 *)&ram_reserved_size, 4) != 0) { | |
539 | ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); | |
540 | return -EIO; | |
bdcd8170 KV |
541 | } |
542 | ||
543 | /* set the block size for the target */ | |
544 | if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) | |
545 | /* use default number of control buffers */ | |
546 | return -EIO; | |
547 | ||
548 | return 0; | |
549 | } | |
550 | ||
8dafb70e | 551 | void ath6kl_core_free(struct ath6kl *ar) |
bdcd8170 | 552 | { |
8dafb70e | 553 | wiphy_free(ar->wiphy); |
bdcd8170 KV |
554 | } |
555 | ||
6db8fa53 | 556 | void ath6kl_core_cleanup(struct ath6kl *ar) |
bdcd8170 | 557 | { |
b2e75698 KV |
558 | ath6kl_hif_power_off(ar); |
559 | ||
6db8fa53 | 560 | destroy_workqueue(ar->ath6kl_wq); |
bdcd8170 | 561 | |
6db8fa53 VT |
562 | if (ar->htc_target) |
563 | ath6kl_htc_cleanup(ar->htc_target); | |
564 | ||
565 | ath6kl_cookie_cleanup(ar); | |
566 | ||
567 | ath6kl_cleanup_amsdu_rxbufs(ar); | |
568 | ||
569 | ath6kl_bmi_cleanup(ar); | |
570 | ||
571 | ath6kl_debug_cleanup(ar); | |
572 | ||
573 | kfree(ar->fw_board); | |
574 | kfree(ar->fw_otp); | |
575 | kfree(ar->fw); | |
576 | kfree(ar->fw_patch); | |
577 | ||
578 | ath6kl_deinit_ieee80211_hw(ar); | |
bdcd8170 KV |
579 | } |
580 | ||
581 | /* firmware upload */ | |
bdcd8170 KV |
582 | static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, |
583 | u8 **fw, size_t *fw_len) | |
584 | { | |
585 | const struct firmware *fw_entry; | |
586 | int ret; | |
587 | ||
588 | ret = request_firmware(&fw_entry, filename, ar->dev); | |
589 | if (ret) | |
590 | return ret; | |
591 | ||
592 | *fw_len = fw_entry->size; | |
593 | *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); | |
594 | ||
595 | if (*fw == NULL) | |
596 | ret = -ENOMEM; | |
597 | ||
598 | release_firmware(fw_entry); | |
599 | ||
600 | return ret; | |
601 | } | |
602 | ||
92ecbff4 SL |
603 | #ifdef CONFIG_OF |
604 | static const char *get_target_ver_dir(const struct ath6kl *ar) | |
605 | { | |
606 | switch (ar->version.target_ver) { | |
0d0192ba | 607 | case AR6003_HW_1_0_VERSION: |
92ecbff4 | 608 | return "ath6k/AR6003/hw1.0"; |
0d0192ba | 609 | case AR6003_HW_2_0_VERSION: |
92ecbff4 | 610 | return "ath6k/AR6003/hw2.0"; |
0d0192ba | 611 | case AR6003_HW_2_1_1_VERSION: |
92ecbff4 SL |
612 | return "ath6k/AR6003/hw2.1.1"; |
613 | } | |
614 | ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__, | |
615 | ar->version.target_ver); | |
616 | return NULL; | |
617 | } | |
618 | ||
619 | /* | |
620 | * Check the device tree for a board-id and use it to construct | |
621 | * the pathname to the firmware file. Used (for now) to find a | |
622 | * fallback to the "bdata.bin" file--typically a symlink to the | |
623 | * appropriate board-specific file. | |
624 | */ | |
625 | static bool check_device_tree(struct ath6kl *ar) | |
626 | { | |
627 | static const char *board_id_prop = "atheros,board-id"; | |
628 | struct device_node *node; | |
629 | char board_filename[64]; | |
630 | const char *board_id; | |
631 | int ret; | |
632 | ||
633 | for_each_compatible_node(node, NULL, "atheros,ath6kl") { | |
634 | board_id = of_get_property(node, board_id_prop, NULL); | |
635 | if (board_id == NULL) { | |
636 | ath6kl_warn("No \"%s\" property on %s node.\n", | |
637 | board_id_prop, node->name); | |
638 | continue; | |
639 | } | |
640 | snprintf(board_filename, sizeof(board_filename), | |
641 | "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id); | |
642 | ||
643 | ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, | |
644 | &ar->fw_board_len); | |
645 | if (ret) { | |
646 | ath6kl_err("Failed to get DT board file %s: %d\n", | |
647 | board_filename, ret); | |
648 | continue; | |
649 | } | |
650 | return true; | |
651 | } | |
652 | return false; | |
653 | } | |
654 | #else | |
655 | static bool check_device_tree(struct ath6kl *ar) | |
656 | { | |
657 | return false; | |
658 | } | |
659 | #endif /* CONFIG_OF */ | |
660 | ||
bdcd8170 KV |
661 | static int ath6kl_fetch_board_file(struct ath6kl *ar) |
662 | { | |
663 | const char *filename; | |
664 | int ret; | |
665 | ||
772c31ee KV |
666 | if (ar->fw_board != NULL) |
667 | return 0; | |
668 | ||
d1a9421d KV |
669 | if (WARN_ON(ar->hw.fw_board == NULL)) |
670 | return -EINVAL; | |
671 | ||
672 | filename = ar->hw.fw_board; | |
bdcd8170 KV |
673 | |
674 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, | |
675 | &ar->fw_board_len); | |
676 | if (ret == 0) { | |
677 | /* managed to get proper board file */ | |
678 | return 0; | |
679 | } | |
680 | ||
92ecbff4 SL |
681 | if (check_device_tree(ar)) { |
682 | /* got board file from device tree */ | |
683 | return 0; | |
684 | } | |
685 | ||
bdcd8170 KV |
686 | /* there was no proper board file, try to use default instead */ |
687 | ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", | |
688 | filename, ret); | |
689 | ||
d1a9421d | 690 | filename = ar->hw.fw_default_board; |
bdcd8170 KV |
691 | |
692 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, | |
693 | &ar->fw_board_len); | |
694 | if (ret) { | |
695 | ath6kl_err("Failed to get default board file %s: %d\n", | |
696 | filename, ret); | |
697 | return ret; | |
698 | } | |
699 | ||
700 | ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); | |
701 | ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); | |
702 | ||
703 | return 0; | |
704 | } | |
705 | ||
772c31ee KV |
706 | static int ath6kl_fetch_otp_file(struct ath6kl *ar) |
707 | { | |
708 | const char *filename; | |
709 | int ret; | |
710 | ||
711 | if (ar->fw_otp != NULL) | |
712 | return 0; | |
713 | ||
d1a9421d KV |
714 | if (ar->hw.fw_otp == NULL) { |
715 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
716 | "no OTP file configured for this hw\n"); | |
772c31ee | 717 | return 0; |
772c31ee KV |
718 | } |
719 | ||
d1a9421d KV |
720 | filename = ar->hw.fw_otp; |
721 | ||
772c31ee KV |
722 | ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, |
723 | &ar->fw_otp_len); | |
724 | if (ret) { | |
725 | ath6kl_err("Failed to get OTP file %s: %d\n", | |
726 | filename, ret); | |
727 | return ret; | |
728 | } | |
729 | ||
730 | return 0; | |
731 | } | |
732 | ||
733 | static int ath6kl_fetch_fw_file(struct ath6kl *ar) | |
734 | { | |
735 | const char *filename; | |
736 | int ret; | |
737 | ||
738 | if (ar->fw != NULL) | |
739 | return 0; | |
740 | ||
741 | if (testmode) { | |
d1a9421d KV |
742 | if (ar->hw.fw_tcmd == NULL) { |
743 | ath6kl_warn("testmode not supported\n"); | |
772c31ee | 744 | return -EOPNOTSUPP; |
772c31ee KV |
745 | } |
746 | ||
d1a9421d KV |
747 | filename = ar->hw.fw_tcmd; |
748 | ||
772c31ee KV |
749 | set_bit(TESTMODE, &ar->flag); |
750 | ||
751 | goto get_fw; | |
752 | } | |
753 | ||
d1a9421d KV |
754 | if (WARN_ON(ar->hw.fw == NULL)) |
755 | return -EINVAL; | |
756 | ||
757 | filename = ar->hw.fw; | |
772c31ee KV |
758 | |
759 | get_fw: | |
760 | ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); | |
761 | if (ret) { | |
762 | ath6kl_err("Failed to get firmware file %s: %d\n", | |
763 | filename, ret); | |
764 | return ret; | |
765 | } | |
766 | ||
767 | return 0; | |
768 | } | |
769 | ||
770 | static int ath6kl_fetch_patch_file(struct ath6kl *ar) | |
771 | { | |
772 | const char *filename; | |
773 | int ret; | |
774 | ||
d1a9421d | 775 | if (ar->fw_patch != NULL) |
772c31ee | 776 | return 0; |
772c31ee | 777 | |
d1a9421d KV |
778 | if (ar->hw.fw_patch == NULL) |
779 | return 0; | |
780 | ||
781 | filename = ar->hw.fw_patch; | |
782 | ||
783 | ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, | |
784 | &ar->fw_patch_len); | |
785 | if (ret) { | |
786 | ath6kl_err("Failed to get patch file %s: %d\n", | |
787 | filename, ret); | |
788 | return ret; | |
772c31ee KV |
789 | } |
790 | ||
791 | return 0; | |
792 | } | |
793 | ||
50d41234 | 794 | static int ath6kl_fetch_fw_api1(struct ath6kl *ar) |
772c31ee KV |
795 | { |
796 | int ret; | |
797 | ||
772c31ee KV |
798 | ret = ath6kl_fetch_otp_file(ar); |
799 | if (ret) | |
800 | return ret; | |
801 | ||
802 | ret = ath6kl_fetch_fw_file(ar); | |
803 | if (ret) | |
804 | return ret; | |
805 | ||
806 | ret = ath6kl_fetch_patch_file(ar); | |
807 | if (ret) | |
808 | return ret; | |
809 | ||
810 | return 0; | |
811 | } | |
bdcd8170 | 812 | |
50d41234 KV |
813 | static int ath6kl_fetch_fw_api2(struct ath6kl *ar) |
814 | { | |
815 | size_t magic_len, len, ie_len; | |
816 | const struct firmware *fw; | |
817 | struct ath6kl_fw_ie *hdr; | |
818 | const char *filename; | |
819 | const u8 *data; | |
97e0496d | 820 | int ret, ie_id, i, index, bit; |
8a137480 | 821 | __le32 *val; |
50d41234 | 822 | |
d1a9421d | 823 | if (ar->hw.fw_api2 == NULL) |
50d41234 | 824 | return -EOPNOTSUPP; |
d1a9421d KV |
825 | |
826 | filename = ar->hw.fw_api2; | |
50d41234 KV |
827 | |
828 | ret = request_firmware(&fw, filename, ar->dev); | |
829 | if (ret) | |
830 | return ret; | |
831 | ||
832 | data = fw->data; | |
833 | len = fw->size; | |
834 | ||
835 | /* magic also includes the null byte, check that as well */ | |
836 | magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; | |
837 | ||
838 | if (len < magic_len) { | |
839 | ret = -EINVAL; | |
840 | goto out; | |
841 | } | |
842 | ||
843 | if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { | |
844 | ret = -EINVAL; | |
845 | goto out; | |
846 | } | |
847 | ||
848 | len -= magic_len; | |
849 | data += magic_len; | |
850 | ||
851 | /* loop elements */ | |
852 | while (len > sizeof(struct ath6kl_fw_ie)) { | |
853 | /* hdr is unaligned! */ | |
854 | hdr = (struct ath6kl_fw_ie *) data; | |
855 | ||
856 | ie_id = le32_to_cpup(&hdr->id); | |
857 | ie_len = le32_to_cpup(&hdr->len); | |
858 | ||
859 | len -= sizeof(*hdr); | |
860 | data += sizeof(*hdr); | |
861 | ||
862 | if (len < ie_len) { | |
863 | ret = -EINVAL; | |
864 | goto out; | |
865 | } | |
866 | ||
867 | switch (ie_id) { | |
868 | case ATH6KL_FW_IE_OTP_IMAGE: | |
ef548626 | 869 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", |
6bc36431 KV |
870 | ie_len); |
871 | ||
50d41234 KV |
872 | ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); |
873 | ||
874 | if (ar->fw_otp == NULL) { | |
875 | ret = -ENOMEM; | |
876 | goto out; | |
877 | } | |
878 | ||
879 | ar->fw_otp_len = ie_len; | |
880 | break; | |
881 | case ATH6KL_FW_IE_FW_IMAGE: | |
ef548626 | 882 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", |
6bc36431 KV |
883 | ie_len); |
884 | ||
50d41234 KV |
885 | ar->fw = kmemdup(data, ie_len, GFP_KERNEL); |
886 | ||
887 | if (ar->fw == NULL) { | |
888 | ret = -ENOMEM; | |
889 | goto out; | |
890 | } | |
891 | ||
892 | ar->fw_len = ie_len; | |
893 | break; | |
894 | case ATH6KL_FW_IE_PATCH_IMAGE: | |
ef548626 | 895 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", |
6bc36431 KV |
896 | ie_len); |
897 | ||
50d41234 KV |
898 | ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); |
899 | ||
900 | if (ar->fw_patch == NULL) { | |
901 | ret = -ENOMEM; | |
902 | goto out; | |
903 | } | |
904 | ||
905 | ar->fw_patch_len = ie_len; | |
906 | break; | |
8a137480 KV |
907 | case ATH6KL_FW_IE_RESERVED_RAM_SIZE: |
908 | val = (__le32 *) data; | |
909 | ar->hw.reserved_ram_size = le32_to_cpup(val); | |
6bc36431 KV |
910 | |
911 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
912 | "found reserved ram size ie 0x%d\n", | |
913 | ar->hw.reserved_ram_size); | |
8a137480 | 914 | break; |
97e0496d | 915 | case ATH6KL_FW_IE_CAPABILITIES: |
6bc36431 | 916 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
ef548626 | 917 | "found firmware capabilities ie (%zd B)\n", |
6bc36431 KV |
918 | ie_len); |
919 | ||
97e0496d KV |
920 | for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { |
921 | index = ALIGN(i, 8) / 8; | |
922 | bit = i % 8; | |
923 | ||
924 | if (data[index] & (1 << bit)) | |
925 | __set_bit(i, ar->fw_capabilities); | |
926 | } | |
6bc36431 KV |
927 | |
928 | ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", | |
929 | ar->fw_capabilities, | |
930 | sizeof(ar->fw_capabilities)); | |
97e0496d | 931 | break; |
1b4304da KV |
932 | case ATH6KL_FW_IE_PATCH_ADDR: |
933 | if (ie_len != sizeof(*val)) | |
934 | break; | |
935 | ||
936 | val = (__le32 *) data; | |
937 | ar->hw.dataset_patch_addr = le32_to_cpup(val); | |
6bc36431 KV |
938 | |
939 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
03ef0250 | 940 | "found patch address ie 0x%x\n", |
6bc36431 | 941 | ar->hw.dataset_patch_addr); |
1b4304da | 942 | break; |
03ef0250 KV |
943 | case ATH6KL_FW_IE_BOARD_ADDR: |
944 | if (ie_len != sizeof(*val)) | |
945 | break; | |
946 | ||
947 | val = (__le32 *) data; | |
948 | ar->hw.board_addr = le32_to_cpup(val); | |
949 | ||
950 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
951 | "found board address ie 0x%x\n", | |
952 | ar->hw.board_addr); | |
953 | break; | |
368b1b0f KV |
954 | case ATH6KL_FW_IE_VIF_MAX: |
955 | if (ie_len != sizeof(*val)) | |
956 | break; | |
957 | ||
958 | val = (__le32 *) data; | |
959 | ar->vif_max = min_t(unsigned int, le32_to_cpup(val), | |
960 | ATH6KL_VIF_MAX); | |
961 | ||
f143379d VT |
962 | if (ar->vif_max > 1 && !ar->p2p) |
963 | ar->max_norm_iface = 2; | |
964 | ||
368b1b0f KV |
965 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
966 | "found vif max ie %d\n", ar->vif_max); | |
967 | break; | |
50d41234 | 968 | default: |
6bc36431 | 969 | ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", |
50d41234 KV |
970 | le32_to_cpup(&hdr->id)); |
971 | break; | |
972 | } | |
973 | ||
974 | len -= ie_len; | |
975 | data += ie_len; | |
976 | }; | |
977 | ||
978 | ret = 0; | |
979 | out: | |
980 | release_firmware(fw); | |
981 | ||
982 | return ret; | |
983 | } | |
984 | ||
985 | static int ath6kl_fetch_firmwares(struct ath6kl *ar) | |
986 | { | |
987 | int ret; | |
988 | ||
989 | ret = ath6kl_fetch_board_file(ar); | |
990 | if (ret) | |
991 | return ret; | |
992 | ||
993 | ret = ath6kl_fetch_fw_api2(ar); | |
6bc36431 KV |
994 | if (ret == 0) { |
995 | ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n"); | |
50d41234 | 996 | return 0; |
6bc36431 | 997 | } |
50d41234 KV |
998 | |
999 | ret = ath6kl_fetch_fw_api1(ar); | |
1000 | if (ret) | |
1001 | return ret; | |
1002 | ||
6bc36431 KV |
1003 | ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n"); |
1004 | ||
50d41234 KV |
1005 | return 0; |
1006 | } | |
1007 | ||
bdcd8170 KV |
1008 | static int ath6kl_upload_board_file(struct ath6kl *ar) |
1009 | { | |
1010 | u32 board_address, board_ext_address, param; | |
31024d99 | 1011 | u32 board_data_size, board_ext_data_size; |
bdcd8170 KV |
1012 | int ret; |
1013 | ||
772c31ee KV |
1014 | if (WARN_ON(ar->fw_board == NULL)) |
1015 | return -ENOENT; | |
bdcd8170 | 1016 | |
31024d99 KF |
1017 | /* |
1018 | * Determine where in Target RAM to write Board Data. | |
1019 | * For AR6004, host determine Target RAM address for | |
1020 | * writing board data. | |
1021 | */ | |
0d4d72bf KV |
1022 | if (ar->hw.board_addr != 0) { |
1023 | board_address = ar->hw.board_addr; | |
31024d99 KF |
1024 | ath6kl_bmi_write(ar, |
1025 | ath6kl_get_hi_item_addr(ar, | |
1026 | HI_ITEM(hi_board_data)), | |
1027 | (u8 *) &board_address, 4); | |
1028 | } else { | |
1029 | ath6kl_bmi_read(ar, | |
1030 | ath6kl_get_hi_item_addr(ar, | |
1031 | HI_ITEM(hi_board_data)), | |
1032 | (u8 *) &board_address, 4); | |
1033 | } | |
1034 | ||
bdcd8170 KV |
1035 | /* determine where in target ram to write extended board data */ |
1036 | ath6kl_bmi_read(ar, | |
1037 | ath6kl_get_hi_item_addr(ar, | |
1038 | HI_ITEM(hi_board_ext_data)), | |
1039 | (u8 *) &board_ext_address, 4); | |
1040 | ||
50e2740b KV |
1041 | if (ar->target_type == TARGET_TYPE_AR6003 && |
1042 | board_ext_address == 0) { | |
bdcd8170 KV |
1043 | ath6kl_err("Failed to get board file target address.\n"); |
1044 | return -EINVAL; | |
1045 | } | |
1046 | ||
31024d99 KF |
1047 | switch (ar->target_type) { |
1048 | case TARGET_TYPE_AR6003: | |
1049 | board_data_size = AR6003_BOARD_DATA_SZ; | |
1050 | board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; | |
1051 | break; | |
1052 | case TARGET_TYPE_AR6004: | |
1053 | board_data_size = AR6004_BOARD_DATA_SZ; | |
1054 | board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; | |
1055 | break; | |
1056 | default: | |
1057 | WARN_ON(1); | |
1058 | return -EINVAL; | |
1059 | break; | |
1060 | } | |
1061 | ||
50e2740b KV |
1062 | if (board_ext_address && |
1063 | ar->fw_board_len == (board_data_size + board_ext_data_size)) { | |
31024d99 | 1064 | |
bdcd8170 | 1065 | /* write extended board data */ |
6bc36431 KV |
1066 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
1067 | "writing extended board data to 0x%x (%d B)\n", | |
1068 | board_ext_address, board_ext_data_size); | |
1069 | ||
bdcd8170 | 1070 | ret = ath6kl_bmi_write(ar, board_ext_address, |
31024d99 KF |
1071 | ar->fw_board + board_data_size, |
1072 | board_ext_data_size); | |
bdcd8170 KV |
1073 | if (ret) { |
1074 | ath6kl_err("Failed to write extended board data: %d\n", | |
1075 | ret); | |
1076 | return ret; | |
1077 | } | |
1078 | ||
1079 | /* record that extended board data is initialized */ | |
31024d99 KF |
1080 | param = (board_ext_data_size << 16) | 1; |
1081 | ||
bdcd8170 KV |
1082 | ath6kl_bmi_write(ar, |
1083 | ath6kl_get_hi_item_addr(ar, | |
1084 | HI_ITEM(hi_board_ext_data_config)), | |
1085 | (unsigned char *) ¶m, 4); | |
1086 | } | |
1087 | ||
31024d99 | 1088 | if (ar->fw_board_len < board_data_size) { |
bdcd8170 KV |
1089 | ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); |
1090 | ret = -EINVAL; | |
1091 | return ret; | |
1092 | } | |
1093 | ||
6bc36431 KV |
1094 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", |
1095 | board_address, board_data_size); | |
1096 | ||
bdcd8170 | 1097 | ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, |
31024d99 | 1098 | board_data_size); |
bdcd8170 KV |
1099 | |
1100 | if (ret) { | |
1101 | ath6kl_err("Board file bmi write failed: %d\n", ret); | |
1102 | return ret; | |
1103 | } | |
1104 | ||
1105 | /* record the fact that Board Data IS initialized */ | |
1106 | param = 1; | |
1107 | ath6kl_bmi_write(ar, | |
1108 | ath6kl_get_hi_item_addr(ar, | |
1109 | HI_ITEM(hi_board_data_initialized)), | |
1110 | (u8 *)¶m, 4); | |
1111 | ||
1112 | return ret; | |
1113 | } | |
1114 | ||
1115 | static int ath6kl_upload_otp(struct ath6kl *ar) | |
1116 | { | |
bdcd8170 | 1117 | u32 address, param; |
bef26a7f | 1118 | bool from_hw = false; |
bdcd8170 KV |
1119 | int ret; |
1120 | ||
50e2740b KV |
1121 | if (ar->fw_otp == NULL) |
1122 | return 0; | |
bdcd8170 | 1123 | |
a01ac414 | 1124 | address = ar->hw.app_load_addr; |
bdcd8170 | 1125 | |
ef548626 | 1126 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, |
6bc36431 KV |
1127 | ar->fw_otp_len); |
1128 | ||
bdcd8170 KV |
1129 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, |
1130 | ar->fw_otp_len); | |
1131 | if (ret) { | |
1132 | ath6kl_err("Failed to upload OTP file: %d\n", ret); | |
1133 | return ret; | |
1134 | } | |
1135 | ||
639d0b89 KV |
1136 | /* read firmware start address */ |
1137 | ret = ath6kl_bmi_read(ar, | |
1138 | ath6kl_get_hi_item_addr(ar, | |
1139 | HI_ITEM(hi_app_start)), | |
1140 | (u8 *) &address, sizeof(address)); | |
1141 | ||
1142 | if (ret) { | |
1143 | ath6kl_err("Failed to read hi_app_start: %d\n", ret); | |
1144 | return ret; | |
1145 | } | |
1146 | ||
bef26a7f KV |
1147 | if (ar->hw.app_start_override_addr == 0) { |
1148 | ar->hw.app_start_override_addr = address; | |
1149 | from_hw = true; | |
1150 | } | |
639d0b89 | 1151 | |
bef26a7f KV |
1152 | ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", |
1153 | from_hw ? " (from hw)" : "", | |
6bc36431 KV |
1154 | ar->hw.app_start_override_addr); |
1155 | ||
bdcd8170 | 1156 | /* execute the OTP code */ |
bef26a7f KV |
1157 | ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", |
1158 | ar->hw.app_start_override_addr); | |
bdcd8170 | 1159 | param = 0; |
bef26a7f | 1160 | ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); |
bdcd8170 KV |
1161 | |
1162 | return ret; | |
1163 | } | |
1164 | ||
1165 | static int ath6kl_upload_firmware(struct ath6kl *ar) | |
1166 | { | |
bdcd8170 KV |
1167 | u32 address; |
1168 | int ret; | |
1169 | ||
772c31ee | 1170 | if (WARN_ON(ar->fw == NULL)) |
50e2740b | 1171 | return 0; |
bdcd8170 | 1172 | |
a01ac414 | 1173 | address = ar->hw.app_load_addr; |
bdcd8170 | 1174 | |
ef548626 | 1175 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", |
6bc36431 KV |
1176 | address, ar->fw_len); |
1177 | ||
bdcd8170 KV |
1178 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); |
1179 | ||
1180 | if (ret) { | |
1181 | ath6kl_err("Failed to write firmware: %d\n", ret); | |
1182 | return ret; | |
1183 | } | |
1184 | ||
31024d99 KF |
1185 | /* |
1186 | * Set starting address for firmware | |
1187 | * Don't need to setup app_start override addr on AR6004 | |
1188 | */ | |
1189 | if (ar->target_type != TARGET_TYPE_AR6004) { | |
a01ac414 | 1190 | address = ar->hw.app_start_override_addr; |
31024d99 KF |
1191 | ath6kl_bmi_set_app_start(ar, address); |
1192 | } | |
bdcd8170 KV |
1193 | return ret; |
1194 | } | |
1195 | ||
1196 | static int ath6kl_upload_patch(struct ath6kl *ar) | |
1197 | { | |
bdcd8170 KV |
1198 | u32 address, param; |
1199 | int ret; | |
1200 | ||
50e2740b KV |
1201 | if (ar->fw_patch == NULL) |
1202 | return 0; | |
bdcd8170 | 1203 | |
a01ac414 | 1204 | address = ar->hw.dataset_patch_addr; |
bdcd8170 | 1205 | |
ef548626 | 1206 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", |
6bc36431 KV |
1207 | address, ar->fw_patch_len); |
1208 | ||
bdcd8170 KV |
1209 | ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); |
1210 | if (ret) { | |
1211 | ath6kl_err("Failed to write patch file: %d\n", ret); | |
1212 | return ret; | |
1213 | } | |
1214 | ||
1215 | param = address; | |
1216 | ath6kl_bmi_write(ar, | |
1217 | ath6kl_get_hi_item_addr(ar, | |
1218 | HI_ITEM(hi_dset_list_head)), | |
1219 | (unsigned char *) ¶m, 4); | |
1220 | ||
1221 | return 0; | |
1222 | } | |
1223 | ||
1224 | static int ath6kl_init_upload(struct ath6kl *ar) | |
1225 | { | |
1226 | u32 param, options, sleep, address; | |
1227 | int status = 0; | |
1228 | ||
31024d99 KF |
1229 | if (ar->target_type != TARGET_TYPE_AR6003 && |
1230 | ar->target_type != TARGET_TYPE_AR6004) | |
bdcd8170 KV |
1231 | return -EINVAL; |
1232 | ||
1233 | /* temporarily disable system sleep */ | |
1234 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; | |
1235 | status = ath6kl_bmi_reg_read(ar, address, ¶m); | |
1236 | if (status) | |
1237 | return status; | |
1238 | ||
1239 | options = param; | |
1240 | ||
1241 | param |= ATH6KL_OPTION_SLEEP_DISABLE; | |
1242 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1243 | if (status) | |
1244 | return status; | |
1245 | ||
1246 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; | |
1247 | status = ath6kl_bmi_reg_read(ar, address, ¶m); | |
1248 | if (status) | |
1249 | return status; | |
1250 | ||
1251 | sleep = param; | |
1252 | ||
1253 | param |= SM(SYSTEM_SLEEP_DISABLE, 1); | |
1254 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1255 | if (status) | |
1256 | return status; | |
1257 | ||
1258 | ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", | |
1259 | options, sleep); | |
1260 | ||
1261 | /* program analog PLL register */ | |
31024d99 KF |
1262 | /* no need to control 40/44MHz clock on AR6004 */ |
1263 | if (ar->target_type != TARGET_TYPE_AR6004) { | |
1264 | status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, | |
1265 | 0xF9104001); | |
bdcd8170 | 1266 | |
31024d99 KF |
1267 | if (status) |
1268 | return status; | |
bdcd8170 | 1269 | |
31024d99 KF |
1270 | /* Run at 80/88MHz by default */ |
1271 | param = SM(CPU_CLOCK_STANDARD, 1); | |
1272 | ||
1273 | address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; | |
1274 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1275 | if (status) | |
1276 | return status; | |
1277 | } | |
bdcd8170 KV |
1278 | |
1279 | param = 0; | |
1280 | address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; | |
1281 | param = SM(LPO_CAL_ENABLE, 1); | |
1282 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1283 | if (status) | |
1284 | return status; | |
1285 | ||
1286 | /* WAR to avoid SDIO CRC err */ | |
0d0192ba | 1287 | if (ar->version.target_ver == AR6003_HW_2_0_VERSION) { |
bdcd8170 KV |
1288 | ath6kl_err("temporary war to avoid sdio crc error\n"); |
1289 | ||
1290 | param = 0x20; | |
1291 | ||
1292 | address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; | |
1293 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1294 | if (status) | |
1295 | return status; | |
1296 | ||
1297 | address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; | |
1298 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1299 | if (status) | |
1300 | return status; | |
1301 | ||
1302 | address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; | |
1303 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1304 | if (status) | |
1305 | return status; | |
1306 | ||
1307 | address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; | |
1308 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1309 | if (status) | |
1310 | return status; | |
1311 | } | |
1312 | ||
1313 | /* write EEPROM data to Target RAM */ | |
1314 | status = ath6kl_upload_board_file(ar); | |
1315 | if (status) | |
1316 | return status; | |
1317 | ||
1318 | /* transfer One time Programmable data */ | |
1319 | status = ath6kl_upload_otp(ar); | |
1320 | if (status) | |
1321 | return status; | |
1322 | ||
1323 | /* Download Target firmware */ | |
1324 | status = ath6kl_upload_firmware(ar); | |
1325 | if (status) | |
1326 | return status; | |
1327 | ||
1328 | status = ath6kl_upload_patch(ar); | |
1329 | if (status) | |
1330 | return status; | |
1331 | ||
1332 | /* Restore system sleep */ | |
1333 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; | |
1334 | status = ath6kl_bmi_reg_write(ar, address, sleep); | |
1335 | if (status) | |
1336 | return status; | |
1337 | ||
1338 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; | |
1339 | param = options | 0x20; | |
1340 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1341 | if (status) | |
1342 | return status; | |
1343 | ||
1344 | /* Configure GPIO AR6003 UART */ | |
1345 | param = CONFIG_AR600x_DEBUG_UART_TX_PIN; | |
1346 | status = ath6kl_bmi_write(ar, | |
1347 | ath6kl_get_hi_item_addr(ar, | |
1348 | HI_ITEM(hi_dbg_uart_txpin)), | |
1349 | (u8 *)¶m, 4); | |
1350 | ||
1351 | return status; | |
1352 | } | |
1353 | ||
a01ac414 KV |
1354 | static int ath6kl_init_hw_params(struct ath6kl *ar) |
1355 | { | |
856f4b31 KV |
1356 | const struct ath6kl_hw *hw; |
1357 | int i; | |
bef26a7f | 1358 | |
856f4b31 KV |
1359 | for (i = 0; i < ARRAY_SIZE(hw_list); i++) { |
1360 | hw = &hw_list[i]; | |
bef26a7f | 1361 | |
856f4b31 KV |
1362 | if (hw->id == ar->version.target_ver) |
1363 | break; | |
1364 | } | |
1365 | ||
1366 | if (i == ARRAY_SIZE(hw_list)) { | |
a01ac414 KV |
1367 | ath6kl_err("Unsupported hardware version: 0x%x\n", |
1368 | ar->version.target_ver); | |
1369 | return -EINVAL; | |
1370 | } | |
1371 | ||
856f4b31 KV |
1372 | ar->hw = *hw; |
1373 | ||
6bc36431 KV |
1374 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
1375 | "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", | |
1376 | ar->version.target_ver, ar->target_type, | |
1377 | ar->hw.dataset_patch_addr, ar->hw.app_load_addr); | |
1378 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
1379 | "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", | |
1380 | ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, | |
1381 | ar->hw.reserved_ram_size); | |
1382 | ||
a01ac414 KV |
1383 | return 0; |
1384 | } | |
1385 | ||
293badf4 KV |
1386 | static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type) |
1387 | { | |
1388 | switch (type) { | |
1389 | case ATH6KL_HIF_TYPE_SDIO: | |
1390 | return "sdio"; | |
1391 | case ATH6KL_HIF_TYPE_USB: | |
1392 | return "usb"; | |
1393 | } | |
1394 | ||
1395 | return NULL; | |
1396 | } | |
1397 | ||
5fe4dffb | 1398 | int ath6kl_init_hw_start(struct ath6kl *ar) |
20459ee2 KV |
1399 | { |
1400 | long timeleft; | |
1401 | int ret, i; | |
1402 | ||
5fe4dffb KV |
1403 | ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n"); |
1404 | ||
20459ee2 KV |
1405 | ret = ath6kl_hif_power_on(ar); |
1406 | if (ret) | |
1407 | return ret; | |
1408 | ||
1409 | ret = ath6kl_configure_target(ar); | |
1410 | if (ret) | |
1411 | goto err_power_off; | |
1412 | ||
1413 | ret = ath6kl_init_upload(ar); | |
1414 | if (ret) | |
1415 | goto err_power_off; | |
1416 | ||
1417 | /* Do we need to finish the BMI phase */ | |
1418 | /* FIXME: return error from ath6kl_bmi_done() */ | |
1419 | if (ath6kl_bmi_done(ar)) { | |
1420 | ret = -EIO; | |
1421 | goto err_power_off; | |
1422 | } | |
1423 | ||
1424 | /* | |
1425 | * The reason we have to wait for the target here is that the | |
1426 | * driver layer has to init BMI in order to set the host block | |
1427 | * size. | |
1428 | */ | |
1429 | if (ath6kl_htc_wait_target(ar->htc_target)) { | |
1430 | ret = -EIO; | |
1431 | goto err_power_off; | |
1432 | } | |
1433 | ||
1434 | if (ath6kl_init_service_ep(ar)) { | |
1435 | ret = -EIO; | |
1436 | goto err_cleanup_scatter; | |
1437 | } | |
1438 | ||
1439 | /* setup credit distribution */ | |
1440 | ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info); | |
1441 | ||
1442 | /* start HTC */ | |
1443 | ret = ath6kl_htc_start(ar->htc_target); | |
1444 | if (ret) { | |
1445 | /* FIXME: call this */ | |
1446 | ath6kl_cookie_cleanup(ar); | |
1447 | goto err_cleanup_scatter; | |
1448 | } | |
1449 | ||
1450 | /* Wait for Wmi event to be ready */ | |
1451 | timeleft = wait_event_interruptible_timeout(ar->event_wq, | |
1452 | test_bit(WMI_READY, | |
1453 | &ar->flag), | |
1454 | WMI_TIMEOUT); | |
1455 | ||
1456 | ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); | |
1457 | ||
293badf4 KV |
1458 | |
1459 | if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) { | |
1460 | ath6kl_info("%s %s fw %s%s\n", | |
1461 | ar->hw.name, | |
1462 | ath6kl_init_get_hif_name(ar->hif_type), | |
1463 | ar->wiphy->fw_version, | |
1464 | test_bit(TESTMODE, &ar->flag) ? " testmode" : ""); | |
1465 | } | |
1466 | ||
20459ee2 KV |
1467 | if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { |
1468 | ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", | |
1469 | ATH6KL_ABI_VERSION, ar->version.abi_ver); | |
1470 | ret = -EIO; | |
1471 | goto err_htc_stop; | |
1472 | } | |
1473 | ||
1474 | if (!timeleft || signal_pending(current)) { | |
1475 | ath6kl_err("wmi is not ready or wait was interrupted\n"); | |
1476 | ret = -EIO; | |
1477 | goto err_htc_stop; | |
1478 | } | |
1479 | ||
1480 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); | |
1481 | ||
1482 | /* communicate the wmi protocol verision to the target */ | |
1483 | /* FIXME: return error */ | |
1484 | if ((ath6kl_set_host_app_area(ar)) != 0) | |
1485 | ath6kl_err("unable to set the host app area\n"); | |
1486 | ||
71f96ee6 | 1487 | for (i = 0; i < ar->vif_max; i++) { |
20459ee2 KV |
1488 | ret = ath6kl_target_config_wlan_params(ar, i); |
1489 | if (ret) | |
1490 | goto err_htc_stop; | |
1491 | } | |
1492 | ||
76a9fbe2 KV |
1493 | ar->state = ATH6KL_STATE_ON; |
1494 | ||
20459ee2 KV |
1495 | return 0; |
1496 | ||
1497 | err_htc_stop: | |
1498 | ath6kl_htc_stop(ar->htc_target); | |
1499 | err_cleanup_scatter: | |
1500 | ath6kl_hif_cleanup_scatter(ar); | |
1501 | err_power_off: | |
1502 | ath6kl_hif_power_off(ar); | |
1503 | ||
1504 | return ret; | |
1505 | } | |
1506 | ||
5fe4dffb KV |
1507 | int ath6kl_init_hw_stop(struct ath6kl *ar) |
1508 | { | |
1509 | int ret; | |
1510 | ||
1511 | ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n"); | |
1512 | ||
1513 | ath6kl_htc_stop(ar->htc_target); | |
1514 | ||
1515 | ath6kl_hif_stop(ar); | |
1516 | ||
1517 | ath6kl_bmi_reset(ar); | |
1518 | ||
1519 | ret = ath6kl_hif_power_off(ar); | |
1520 | if (ret) | |
1521 | ath6kl_warn("failed to power off hif: %d\n", ret); | |
1522 | ||
76a9fbe2 KV |
1523 | ar->state = ATH6KL_STATE_OFF; |
1524 | ||
5fe4dffb KV |
1525 | return 0; |
1526 | } | |
1527 | ||
61448a93 | 1528 | int ath6kl_core_init(struct ath6kl *ar) |
bdcd8170 | 1529 | { |
61448a93 | 1530 | struct ath6kl_bmi_target_info targ_info; |
8dafb70e | 1531 | struct net_device *ndev; |
20459ee2 | 1532 | int ret = 0, i; |
bdcd8170 | 1533 | |
61448a93 KV |
1534 | ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); |
1535 | if (!ar->ath6kl_wq) | |
1536 | return -ENOMEM; | |
1537 | ||
1538 | ret = ath6kl_bmi_init(ar); | |
1539 | if (ret) | |
1540 | goto err_wq; | |
1541 | ||
20459ee2 KV |
1542 | /* |
1543 | * Turn on power to get hardware (target) version and leave power | |
1544 | * on delibrately as we will boot the hardware anyway within few | |
1545 | * seconds. | |
1546 | */ | |
61448a93 KV |
1547 | ret = ath6kl_hif_power_on(ar); |
1548 | if (ret) | |
1549 | goto err_bmi_cleanup; | |
1550 | ||
1551 | ret = ath6kl_bmi_get_target_info(ar, &targ_info); | |
1552 | if (ret) | |
1553 | goto err_power_off; | |
1554 | ||
1555 | ar->version.target_ver = le32_to_cpu(targ_info.version); | |
1556 | ar->target_type = le32_to_cpu(targ_info.type); | |
1557 | ar->wiphy->hw_version = le32_to_cpu(targ_info.version); | |
1558 | ||
1559 | ret = ath6kl_init_hw_params(ar); | |
1560 | if (ret) | |
1561 | goto err_power_off; | |
1562 | ||
61448a93 KV |
1563 | ar->htc_target = ath6kl_htc_create(ar); |
1564 | ||
1565 | if (!ar->htc_target) { | |
1566 | ret = -ENOMEM; | |
1567 | goto err_power_off; | |
1568 | } | |
1569 | ||
1570 | ret = ath6kl_fetch_firmwares(ar); | |
1571 | if (ret) | |
1572 | goto err_htc_cleanup; | |
1573 | ||
1574 | /* FIXME: we should free all firmwares in the error cases below */ | |
1575 | ||
bdcd8170 KV |
1576 | /* Indicate that WMI is enabled (although not ready yet) */ |
1577 | set_bit(WMI_ENABLED, &ar->flag); | |
2865785e | 1578 | ar->wmi = ath6kl_wmi_init(ar); |
bdcd8170 KV |
1579 | if (!ar->wmi) { |
1580 | ath6kl_err("failed to initialize wmi\n"); | |
61448a93 KV |
1581 | ret = -EIO; |
1582 | goto err_htc_cleanup; | |
bdcd8170 KV |
1583 | } |
1584 | ||
1585 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); | |
1586 | ||
61448a93 KV |
1587 | ret = ath6kl_register_ieee80211_hw(ar); |
1588 | if (ret) | |
8dafb70e VT |
1589 | goto err_node_cleanup; |
1590 | ||
61448a93 KV |
1591 | ret = ath6kl_debug_init(ar); |
1592 | if (ret) { | |
8dafb70e VT |
1593 | wiphy_unregister(ar->wiphy); |
1594 | goto err_node_cleanup; | |
1595 | } | |
1596 | ||
71f96ee6 | 1597 | for (i = 0; i < ar->vif_max; i++) |
55055976 VT |
1598 | ar->avail_idx_map |= BIT(i); |
1599 | ||
27929723 VT |
1600 | rtnl_lock(); |
1601 | ||
8dafb70e | 1602 | /* Add an initial station interface */ |
55055976 VT |
1603 | ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0, |
1604 | INFRA_NETWORK); | |
27929723 VT |
1605 | |
1606 | rtnl_unlock(); | |
1607 | ||
8dafb70e VT |
1608 | if (!ndev) { |
1609 | ath6kl_err("Failed to instantiate a network device\n"); | |
61448a93 | 1610 | ret = -ENOMEM; |
8dafb70e VT |
1611 | wiphy_unregister(ar->wiphy); |
1612 | goto err_debug_init; | |
1613 | } | |
1614 | ||
1615 | ||
1616 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", | |
28ae58dd | 1617 | __func__, ndev->name, ndev, ar); |
8dafb70e | 1618 | |
bdcd8170 KV |
1619 | /* setup access class priority mappings */ |
1620 | ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ | |
1621 | ar->ac_stream_pri_map[WMM_AC_BE] = 1; | |
1622 | ar->ac_stream_pri_map[WMM_AC_VI] = 2; | |
1623 | ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ | |
1624 | ||
1625 | /* give our connected endpoints some buffers */ | |
1626 | ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); | |
1627 | ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); | |
1628 | ||
1629 | /* allocate some buffers that handle larger AMSDU frames */ | |
1630 | ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); | |
1631 | ||
bdcd8170 KV |
1632 | ath6kl_cookie_init(ar); |
1633 | ||
bdcd8170 KV |
1634 | ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | |
1635 | ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; | |
1636 | ||
8277de15 KV |
1637 | if (suspend_cutpower) |
1638 | ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER; | |
1639 | ||
be98e3a4 | 1640 | ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | |
fb94333a AN |
1641 | WIPHY_FLAG_HAVE_AP_SME | |
1642 | WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD; | |
1643 | ||
1644 | ar->wiphy->probe_resp_offload = | |
1645 | NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS | | |
1646 | NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 | | |
1647 | NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P | | |
1648 | NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U; | |
011a36e1 | 1649 | |
5fe4dffb KV |
1650 | set_bit(FIRST_BOOT, &ar->flag); |
1651 | ||
1652 | ret = ath6kl_init_hw_start(ar); | |
20459ee2 | 1653 | if (ret) { |
5fe4dffb | 1654 | ath6kl_err("Failed to start hardware: %d\n", ret); |
20459ee2 | 1655 | goto err_rxbuf_cleanup; |
0ce59445 | 1656 | } |
d66ea4f9 VT |
1657 | |
1658 | /* | |
1659 | * Set mac address which is received in ready event | |
1660 | * FIXME: Move to ath6kl_interface_add() | |
1661 | */ | |
1662 | memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN); | |
1663 | ||
61448a93 | 1664 | return ret; |
bdcd8170 | 1665 | |
bdcd8170 | 1666 | err_rxbuf_cleanup: |
ad226ec2 | 1667 | ath6kl_htc_flush_rx_buf(ar->htc_target); |
bdcd8170 | 1668 | ath6kl_cleanup_amsdu_rxbufs(ar); |
27929723 | 1669 | rtnl_lock(); |
108438bc | 1670 | ath6kl_deinit_if_data(netdev_priv(ndev)); |
27929723 | 1671 | rtnl_unlock(); |
8dafb70e VT |
1672 | wiphy_unregister(ar->wiphy); |
1673 | err_debug_init: | |
1674 | ath6kl_debug_cleanup(ar); | |
852bd9d9 | 1675 | err_node_cleanup: |
bdcd8170 KV |
1676 | ath6kl_wmi_shutdown(ar->wmi); |
1677 | clear_bit(WMI_ENABLED, &ar->flag); | |
1678 | ar->wmi = NULL; | |
bdcd8170 | 1679 | err_htc_cleanup: |
ad226ec2 | 1680 | ath6kl_htc_cleanup(ar->htc_target); |
b2e75698 KV |
1681 | err_power_off: |
1682 | ath6kl_hif_power_off(ar); | |
bdcd8170 KV |
1683 | err_bmi_cleanup: |
1684 | ath6kl_bmi_cleanup(ar); | |
1685 | err_wq: | |
1686 | destroy_workqueue(ar->ath6kl_wq); | |
8dafb70e | 1687 | |
bdcd8170 KV |
1688 | return ret; |
1689 | } | |
1690 | ||
55055976 | 1691 | void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready) |
6db8fa53 VT |
1692 | { |
1693 | static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; | |
1694 | bool discon_issued; | |
1695 | ||
1696 | netif_stop_queue(vif->ndev); | |
1697 | ||
1698 | clear_bit(WLAN_ENABLED, &vif->flags); | |
1699 | ||
1700 | if (wmi_ready) { | |
1701 | discon_issued = test_bit(CONNECTED, &vif->flags) || | |
1702 | test_bit(CONNECT_PEND, &vif->flags); | |
1703 | ath6kl_disconnect(vif); | |
1704 | del_timer(&vif->disconnect_timer); | |
1705 | ||
1706 | if (discon_issued) | |
1707 | ath6kl_disconnect_event(vif, DISCONNECT_CMD, | |
1708 | (vif->nw_type & AP_NETWORK) ? | |
1709 | bcast_mac : vif->bssid, | |
1710 | 0, NULL, 0); | |
1711 | } | |
1712 | ||
1713 | if (vif->scan_req) { | |
1714 | cfg80211_scan_done(vif->scan_req, true); | |
1715 | vif->scan_req = NULL; | |
1716 | } | |
6db8fa53 VT |
1717 | } |
1718 | ||
bdcd8170 KV |
1719 | void ath6kl_stop_txrx(struct ath6kl *ar) |
1720 | { | |
990bd915 | 1721 | struct ath6kl_vif *vif, *tmp_vif; |
bdcd8170 KV |
1722 | |
1723 | set_bit(DESTROY_IN_PROGRESS, &ar->flag); | |
1724 | ||
1725 | if (down_interruptible(&ar->sem)) { | |
1726 | ath6kl_err("down_interruptible failed\n"); | |
1727 | return; | |
1728 | } | |
1729 | ||
11f6e40d | 1730 | spin_lock_bh(&ar->list_lock); |
990bd915 VT |
1731 | list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) { |
1732 | list_del(&vif->list); | |
11f6e40d | 1733 | spin_unlock_bh(&ar->list_lock); |
990bd915 | 1734 | ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag)); |
27929723 VT |
1735 | rtnl_lock(); |
1736 | ath6kl_deinit_if_data(vif); | |
1737 | rtnl_unlock(); | |
11f6e40d | 1738 | spin_lock_bh(&ar->list_lock); |
990bd915 | 1739 | } |
11f6e40d | 1740 | spin_unlock_bh(&ar->list_lock); |
bdcd8170 | 1741 | |
6db8fa53 | 1742 | clear_bit(WMI_READY, &ar->flag); |
bdcd8170 | 1743 | |
6db8fa53 VT |
1744 | /* |
1745 | * After wmi_shudown all WMI events will be dropped. We | |
1746 | * need to cleanup the buffers allocated in AP mode and | |
1747 | * give disconnect notification to stack, which usually | |
1748 | * happens in the disconnect_event. Simulate the disconnect | |
1749 | * event by calling the function directly. Sometimes | |
1750 | * disconnect_event will be received when the debug logs | |
1751 | * are collected. | |
1752 | */ | |
1753 | ath6kl_wmi_shutdown(ar->wmi); | |
bdcd8170 | 1754 | |
6db8fa53 VT |
1755 | clear_bit(WMI_ENABLED, &ar->flag); |
1756 | if (ar->htc_target) { | |
1757 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__); | |
1758 | ath6kl_htc_stop(ar->htc_target); | |
bdcd8170 KV |
1759 | } |
1760 | ||
6db8fa53 VT |
1761 | /* |
1762 | * Try to reset the device if we can. The driver may have been | |
1763 | * configure NOT to reset the target during a debug session. | |
1764 | */ | |
1765 | ath6kl_dbg(ATH6KL_DBG_TRC, | |
1766 | "attempting to reset target on instance destroy\n"); | |
1767 | ath6kl_reset_device(ar, ar->target_type, true, true); | |
19703573 | 1768 | |
6db8fa53 | 1769 | clear_bit(WLAN_ENABLED, &ar->flag); |
bdcd8170 | 1770 | } |