Commit | Line | Data |
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bdcd8170 KV |
1 | |
2 | /* | |
3 | * Copyright (c) 2011 Atheros Communications Inc. | |
4 | * | |
5 | * Permission to use, copy, modify, and/or distribute this software for any | |
6 | * purpose with or without fee is hereby granted, provided that the above | |
7 | * copyright notice and this permission notice appear in all copies. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
16 | */ | |
17 | ||
c6efe578 | 18 | #include <linux/moduleparam.h> |
92ecbff4 | 19 | #include <linux/of.h> |
bdcd8170 KV |
20 | #include <linux/mmc/sdio_func.h> |
21 | #include "core.h" | |
22 | #include "cfg80211.h" | |
23 | #include "target.h" | |
24 | #include "debug.h" | |
25 | #include "hif-ops.h" | |
26 | ||
27 | unsigned int debug_mask; | |
003353b0 | 28 | static unsigned int testmode; |
bdcd8170 KV |
29 | |
30 | module_param(debug_mask, uint, 0644); | |
003353b0 | 31 | module_param(testmode, uint, 0644); |
bdcd8170 KV |
32 | |
33 | /* | |
34 | * Include definitions here that can be used to tune the WLAN module | |
35 | * behavior. Different customers can tune the behavior as per their needs, | |
36 | * here. | |
37 | */ | |
38 | ||
39 | /* | |
40 | * This configuration item enable/disable keepalive support. | |
41 | * Keepalive support: In the absence of any data traffic to AP, null | |
42 | * frames will be sent to the AP at periodic interval, to keep the association | |
43 | * active. This configuration item defines the periodic interval. | |
44 | * Use value of zero to disable keepalive support | |
45 | * Default: 60 seconds | |
46 | */ | |
47 | #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 | |
48 | ||
49 | /* | |
50 | * This configuration item sets the value of disconnect timeout | |
51 | * Firmware delays sending the disconnec event to the host for this | |
52 | * timeout after is gets disconnected from the current AP. | |
53 | * If the firmware successly roams within the disconnect timeout | |
54 | * it sends a new connect event | |
55 | */ | |
56 | #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 | |
57 | ||
58 | #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8 | |
59 | ||
bdcd8170 KV |
60 | #define ATH6KL_DATA_OFFSET 64 |
61 | struct sk_buff *ath6kl_buf_alloc(int size) | |
62 | { | |
63 | struct sk_buff *skb; | |
64 | u16 reserved; | |
65 | ||
66 | /* Add chacheline space at front and back of buffer */ | |
67 | reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + | |
1df94a85 | 68 | sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; |
bdcd8170 KV |
69 | skb = dev_alloc_skb(size + reserved); |
70 | ||
71 | if (skb) | |
72 | skb_reserve(skb, reserved - L1_CACHE_BYTES); | |
73 | return skb; | |
74 | } | |
75 | ||
76 | void ath6kl_init_profile_info(struct ath6kl *ar) | |
77 | { | |
3450334f VT |
78 | /* TODO: Findout vif */ |
79 | struct ath6kl_vif *vif = ar->vif; | |
80 | ||
81 | vif->ssid_len = 0; | |
82 | memset(vif->ssid, 0, sizeof(vif->ssid)); | |
83 | ||
84 | vif->dot11_auth_mode = OPEN_AUTH; | |
85 | vif->auth_mode = NONE_AUTH; | |
86 | vif->prwise_crypto = NONE_CRYPT; | |
87 | vif->prwise_crypto_len = 0; | |
88 | vif->grp_crypto = NONE_CRYPT; | |
89 | vif->grp_crypto_len = 0; | |
bdcd8170 KV |
90 | memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list)); |
91 | memset(ar->req_bssid, 0, sizeof(ar->req_bssid)); | |
92 | memset(ar->bssid, 0, sizeof(ar->bssid)); | |
93 | ar->bss_ch = 0; | |
f5938f24 | 94 | vif->nw_type = vif->next_mode = INFRA_NETWORK; |
bdcd8170 KV |
95 | } |
96 | ||
bdcd8170 KV |
97 | static int ath6kl_set_host_app_area(struct ath6kl *ar) |
98 | { | |
99 | u32 address, data; | |
100 | struct host_app_area host_app_area; | |
101 | ||
102 | /* Fetch the address of the host_app_area_s | |
103 | * instance in the host interest area */ | |
104 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); | |
31024d99 | 105 | address = TARG_VTOP(ar->target_type, address); |
bdcd8170 | 106 | |
addb44be | 107 | if (ath6kl_diag_read32(ar, address, &data)) |
bdcd8170 KV |
108 | return -EIO; |
109 | ||
31024d99 | 110 | address = TARG_VTOP(ar->target_type, data); |
cbf49a6f | 111 | host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); |
addb44be KV |
112 | if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, |
113 | sizeof(struct host_app_area))) | |
bdcd8170 KV |
114 | return -EIO; |
115 | ||
116 | return 0; | |
117 | } | |
118 | ||
119 | static inline void set_ac2_ep_map(struct ath6kl *ar, | |
120 | u8 ac, | |
121 | enum htc_endpoint_id ep) | |
122 | { | |
123 | ar->ac2ep_map[ac] = ep; | |
124 | ar->ep2ac_map[ep] = ac; | |
125 | } | |
126 | ||
127 | /* connect to a service */ | |
128 | static int ath6kl_connectservice(struct ath6kl *ar, | |
129 | struct htc_service_connect_req *con_req, | |
130 | char *desc) | |
131 | { | |
132 | int status; | |
133 | struct htc_service_connect_resp response; | |
134 | ||
135 | memset(&response, 0, sizeof(response)); | |
136 | ||
ad226ec2 | 137 | status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); |
bdcd8170 KV |
138 | if (status) { |
139 | ath6kl_err("failed to connect to %s service status:%d\n", | |
140 | desc, status); | |
141 | return status; | |
142 | } | |
143 | ||
144 | switch (con_req->svc_id) { | |
145 | case WMI_CONTROL_SVC: | |
146 | if (test_bit(WMI_ENABLED, &ar->flag)) | |
147 | ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); | |
148 | ar->ctrl_ep = response.endpoint; | |
149 | break; | |
150 | case WMI_DATA_BE_SVC: | |
151 | set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); | |
152 | break; | |
153 | case WMI_DATA_BK_SVC: | |
154 | set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); | |
155 | break; | |
156 | case WMI_DATA_VI_SVC: | |
157 | set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); | |
158 | break; | |
159 | case WMI_DATA_VO_SVC: | |
160 | set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); | |
161 | break; | |
162 | default: | |
163 | ath6kl_err("service id is not mapped %d\n", con_req->svc_id); | |
164 | return -EINVAL; | |
165 | } | |
166 | ||
167 | return 0; | |
168 | } | |
169 | ||
170 | static int ath6kl_init_service_ep(struct ath6kl *ar) | |
171 | { | |
172 | struct htc_service_connect_req connect; | |
173 | ||
174 | memset(&connect, 0, sizeof(connect)); | |
175 | ||
176 | /* these fields are the same for all service endpoints */ | |
177 | connect.ep_cb.rx = ath6kl_rx; | |
178 | connect.ep_cb.rx_refill = ath6kl_rx_refill; | |
179 | connect.ep_cb.tx_full = ath6kl_tx_queue_full; | |
180 | ||
181 | /* | |
182 | * Set the max queue depth so that our ath6kl_tx_queue_full handler | |
183 | * gets called. | |
184 | */ | |
185 | connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; | |
186 | connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; | |
187 | if (!connect.ep_cb.rx_refill_thresh) | |
188 | connect.ep_cb.rx_refill_thresh++; | |
189 | ||
190 | /* connect to control service */ | |
191 | connect.svc_id = WMI_CONTROL_SVC; | |
192 | if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) | |
193 | return -EIO; | |
194 | ||
195 | connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; | |
196 | ||
197 | /* | |
198 | * Limit the HTC message size on the send path, although e can | |
199 | * receive A-MSDU frames of 4K, we will only send ethernet-sized | |
200 | * (802.3) frames on the send path. | |
201 | */ | |
202 | connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; | |
203 | ||
204 | /* | |
205 | * To reduce the amount of committed memory for larger A_MSDU | |
206 | * frames, use the recv-alloc threshold mechanism for larger | |
207 | * packets. | |
208 | */ | |
209 | connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; | |
210 | connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; | |
211 | ||
212 | /* | |
213 | * For the remaining data services set the connection flag to | |
214 | * reduce dribbling, if configured to do so. | |
215 | */ | |
216 | connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; | |
217 | connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; | |
218 | connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; | |
219 | ||
220 | connect.svc_id = WMI_DATA_BE_SVC; | |
221 | ||
222 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) | |
223 | return -EIO; | |
224 | ||
225 | /* connect to back-ground map this to WMI LOW_PRI */ | |
226 | connect.svc_id = WMI_DATA_BK_SVC; | |
227 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) | |
228 | return -EIO; | |
229 | ||
230 | /* connect to Video service, map this to to HI PRI */ | |
231 | connect.svc_id = WMI_DATA_VI_SVC; | |
232 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) | |
233 | return -EIO; | |
234 | ||
235 | /* | |
236 | * Connect to VO service, this is currently not mapped to a WMI | |
237 | * priority stream due to historical reasons. WMI originally | |
238 | * defined 3 priorities over 3 mailboxes We can change this when | |
239 | * WMI is reworked so that priorities are not dependent on | |
240 | * mailboxes. | |
241 | */ | |
242 | connect.svc_id = WMI_DATA_VO_SVC; | |
243 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) | |
244 | return -EIO; | |
245 | ||
246 | return 0; | |
247 | } | |
248 | ||
8dafb70e | 249 | void ath6kl_init_control_info(struct ath6kl *ar) |
bdcd8170 | 250 | { |
3450334f VT |
251 | struct ath6kl_vif *vif = ar->vif; |
252 | ||
bdcd8170 | 253 | ath6kl_init_profile_info(ar); |
3450334f | 254 | vif->def_txkey_index = 0; |
bdcd8170 KV |
255 | memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list)); |
256 | ar->ch_hint = 0; | |
bdcd8170 KV |
257 | } |
258 | ||
259 | /* | |
260 | * Set HTC/Mbox operational parameters, this can only be called when the | |
261 | * target is in the BMI phase. | |
262 | */ | |
263 | static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, | |
264 | u8 htc_ctrl_buf) | |
265 | { | |
266 | int status; | |
267 | u32 blk_size; | |
268 | ||
269 | blk_size = ar->mbox_info.block_size; | |
270 | ||
271 | if (htc_ctrl_buf) | |
272 | blk_size |= ((u32)htc_ctrl_buf) << 16; | |
273 | ||
274 | /* set the host interest area for the block size */ | |
275 | status = ath6kl_bmi_write(ar, | |
276 | ath6kl_get_hi_item_addr(ar, | |
277 | HI_ITEM(hi_mbox_io_block_sz)), | |
278 | (u8 *)&blk_size, | |
279 | 4); | |
280 | if (status) { | |
281 | ath6kl_err("bmi_write_memory for IO block size failed\n"); | |
282 | goto out; | |
283 | } | |
284 | ||
285 | ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", | |
286 | blk_size, | |
287 | ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); | |
288 | ||
289 | if (mbox_isr_yield_val) { | |
290 | /* set the host interest area for the mbox ISR yield limit */ | |
291 | status = ath6kl_bmi_write(ar, | |
292 | ath6kl_get_hi_item_addr(ar, | |
293 | HI_ITEM(hi_mbox_isr_yield_limit)), | |
294 | (u8 *)&mbox_isr_yield_val, | |
295 | 4); | |
296 | if (status) { | |
297 | ath6kl_err("bmi_write_memory for yield limit failed\n"); | |
298 | goto out; | |
299 | } | |
300 | } | |
301 | ||
302 | out: | |
303 | return status; | |
304 | } | |
305 | ||
306 | #define REG_DUMP_COUNT_AR6003 60 | |
307 | #define REGISTER_DUMP_LEN_MAX 60 | |
308 | ||
309 | static void ath6kl_dump_target_assert_info(struct ath6kl *ar) | |
310 | { | |
311 | u32 address; | |
312 | u32 regdump_loc = 0; | |
313 | int status; | |
314 | u32 regdump_val[REGISTER_DUMP_LEN_MAX]; | |
315 | u32 i; | |
316 | ||
317 | if (ar->target_type != TARGET_TYPE_AR6003) | |
318 | return; | |
319 | ||
320 | /* the reg dump pointer is copied to the host interest area */ | |
321 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state)); | |
31024d99 | 322 | address = TARG_VTOP(ar->target_type, address); |
bdcd8170 KV |
323 | |
324 | /* read RAM location through diagnostic window */ | |
addb44be | 325 | status = ath6kl_diag_read32(ar, address, ®dump_loc); |
bdcd8170 KV |
326 | |
327 | if (status || !regdump_loc) { | |
328 | ath6kl_err("failed to get ptr to register dump area\n"); | |
329 | return; | |
330 | } | |
331 | ||
332 | ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n", | |
333 | regdump_loc); | |
31024d99 | 334 | regdump_loc = TARG_VTOP(ar->target_type, regdump_loc); |
bdcd8170 KV |
335 | |
336 | /* fetch register dump data */ | |
addb44be KV |
337 | status = ath6kl_diag_read(ar, regdump_loc, (u8 *)®dump_val[0], |
338 | REG_DUMP_COUNT_AR6003 * (sizeof(u32))); | |
bdcd8170 KV |
339 | |
340 | if (status) { | |
341 | ath6kl_err("failed to get register dump\n"); | |
342 | return; | |
343 | } | |
344 | ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n"); | |
345 | ||
346 | for (i = 0; i < REG_DUMP_COUNT_AR6003; i++) | |
347 | ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n", | |
348 | i, regdump_val[i]); | |
349 | ||
350 | } | |
351 | ||
352 | void ath6kl_target_failure(struct ath6kl *ar) | |
353 | { | |
354 | ath6kl_err("target asserted\n"); | |
355 | ||
356 | /* try dumping target assertion information (if any) */ | |
357 | ath6kl_dump_target_assert_info(ar); | |
358 | ||
359 | } | |
360 | ||
361 | static int ath6kl_target_config_wlan_params(struct ath6kl *ar) | |
362 | { | |
363 | int status = 0; | |
4dea08e0 | 364 | int ret; |
bdcd8170 KV |
365 | |
366 | /* | |
367 | * Configure the device for rx dot11 header rules. "0,0" are the | |
368 | * default values. Required if checksum offload is needed. Set | |
369 | * RxMetaVersion to 2. | |
370 | */ | |
371 | if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, | |
372 | ar->rx_meta_ver, 0, 0)) { | |
373 | ath6kl_err("unable to set the rx frame format\n"); | |
374 | status = -EIO; | |
375 | } | |
376 | ||
377 | if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) | |
378 | if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1, | |
379 | IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { | |
380 | ath6kl_err("unable to set power save fail event policy\n"); | |
381 | status = -EIO; | |
382 | } | |
383 | ||
384 | if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) | |
385 | if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0, | |
386 | WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { | |
387 | ath6kl_err("unable to set barker preamble policy\n"); | |
388 | status = -EIO; | |
389 | } | |
390 | ||
391 | if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, | |
392 | WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { | |
393 | ath6kl_err("unable to set keep alive interval\n"); | |
394 | status = -EIO; | |
395 | } | |
396 | ||
397 | if (ath6kl_wmi_disctimeout_cmd(ar->wmi, | |
398 | WLAN_CONFIG_DISCONNECT_TIMEOUT)) { | |
399 | ath6kl_err("unable to set disconnect timeout\n"); | |
400 | status = -EIO; | |
401 | } | |
402 | ||
403 | if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) | |
404 | if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) { | |
405 | ath6kl_err("unable to set txop bursting\n"); | |
406 | status = -EIO; | |
407 | } | |
408 | ||
6bbc7c35 JM |
409 | if (ar->p2p) { |
410 | ret = ath6kl_wmi_info_req_cmd(ar->wmi, | |
411 | P2P_FLAG_CAPABILITIES_REQ | | |
412 | P2P_FLAG_MACADDR_REQ | | |
413 | P2P_FLAG_HMODEL_REQ); | |
414 | if (ret) { | |
415 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " | |
416 | "capabilities (%d) - assuming P2P not " | |
417 | "supported\n", ret); | |
418 | ar->p2p = 0; | |
419 | } | |
420 | } | |
421 | ||
422 | if (ar->p2p) { | |
423 | /* Enable Probe Request reporting for P2P */ | |
424 | ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true); | |
425 | if (ret) { | |
426 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " | |
427 | "Request reporting (%d)\n", ret); | |
428 | } | |
4dea08e0 JM |
429 | } |
430 | ||
bdcd8170 KV |
431 | return status; |
432 | } | |
433 | ||
434 | int ath6kl_configure_target(struct ath6kl *ar) | |
435 | { | |
436 | u32 param, ram_reserved_size; | |
437 | u8 fw_iftype; | |
438 | ||
dd3751f7 | 439 | fw_iftype = HI_OPTION_FW_MODE_BSS_STA; |
bdcd8170 KV |
440 | |
441 | /* Tell target which HTC version it is used*/ | |
442 | param = HTC_PROTOCOL_VERSION; | |
443 | if (ath6kl_bmi_write(ar, | |
444 | ath6kl_get_hi_item_addr(ar, | |
445 | HI_ITEM(hi_app_host_interest)), | |
446 | (u8 *)¶m, 4) != 0) { | |
447 | ath6kl_err("bmi_write_memory for htc version failed\n"); | |
448 | return -EIO; | |
449 | } | |
450 | ||
451 | /* set the firmware mode to STA/IBSS/AP */ | |
452 | param = 0; | |
453 | ||
454 | if (ath6kl_bmi_read(ar, | |
455 | ath6kl_get_hi_item_addr(ar, | |
456 | HI_ITEM(hi_option_flag)), | |
457 | (u8 *)¶m, 4) != 0) { | |
458 | ath6kl_err("bmi_read_memory for setting fwmode failed\n"); | |
459 | return -EIO; | |
460 | } | |
461 | ||
462 | param |= (1 << HI_OPTION_NUM_DEV_SHIFT); | |
463 | param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT); | |
6bbc7c35 JM |
464 | if (ar->p2p && fw_iftype == HI_OPTION_FW_MODE_BSS_STA) { |
465 | param |= HI_OPTION_FW_SUBMODE_P2PDEV << | |
466 | HI_OPTION_FW_SUBMODE_SHIFT; | |
467 | } | |
bdcd8170 KV |
468 | param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); |
469 | param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | |
470 | ||
471 | if (ath6kl_bmi_write(ar, | |
472 | ath6kl_get_hi_item_addr(ar, | |
473 | HI_ITEM(hi_option_flag)), | |
474 | (u8 *)¶m, | |
475 | 4) != 0) { | |
476 | ath6kl_err("bmi_write_memory for setting fwmode failed\n"); | |
477 | return -EIO; | |
478 | } | |
479 | ||
480 | ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); | |
481 | ||
482 | /* | |
483 | * Hardcode the address use for the extended board data | |
484 | * Ideally this should be pre-allocate by the OS at boot time | |
485 | * But since it is a new feature and board data is loaded | |
486 | * at init time, we have to workaround this from host. | |
487 | * It is difficult to patch the firmware boot code, | |
488 | * but possible in theory. | |
489 | */ | |
490 | ||
991b27ea KV |
491 | param = ar->hw.board_ext_data_addr; |
492 | ram_reserved_size = ar->hw.reserved_ram_size; | |
bdcd8170 | 493 | |
991b27ea KV |
494 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, |
495 | HI_ITEM(hi_board_ext_data)), | |
496 | (u8 *)¶m, 4) != 0) { | |
497 | ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); | |
498 | return -EIO; | |
499 | } | |
500 | ||
501 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, | |
502 | HI_ITEM(hi_end_ram_reserve_sz)), | |
503 | (u8 *)&ram_reserved_size, 4) != 0) { | |
504 | ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); | |
505 | return -EIO; | |
bdcd8170 KV |
506 | } |
507 | ||
508 | /* set the block size for the target */ | |
509 | if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) | |
510 | /* use default number of control buffers */ | |
511 | return -EIO; | |
512 | ||
513 | return 0; | |
514 | } | |
515 | ||
8dafb70e | 516 | void ath6kl_core_free(struct ath6kl *ar) |
bdcd8170 | 517 | { |
8dafb70e | 518 | wiphy_free(ar->wiphy); |
bdcd8170 KV |
519 | } |
520 | ||
521 | int ath6kl_unavail_ev(struct ath6kl *ar) | |
522 | { | |
523 | ath6kl_destroy(ar->net_dev, 1); | |
524 | ||
525 | return 0; | |
526 | } | |
527 | ||
528 | /* firmware upload */ | |
bdcd8170 KV |
529 | static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, |
530 | u8 **fw, size_t *fw_len) | |
531 | { | |
532 | const struct firmware *fw_entry; | |
533 | int ret; | |
534 | ||
535 | ret = request_firmware(&fw_entry, filename, ar->dev); | |
536 | if (ret) | |
537 | return ret; | |
538 | ||
539 | *fw_len = fw_entry->size; | |
540 | *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); | |
541 | ||
542 | if (*fw == NULL) | |
543 | ret = -ENOMEM; | |
544 | ||
545 | release_firmware(fw_entry); | |
546 | ||
547 | return ret; | |
548 | } | |
549 | ||
92ecbff4 SL |
550 | #ifdef CONFIG_OF |
551 | static const char *get_target_ver_dir(const struct ath6kl *ar) | |
552 | { | |
553 | switch (ar->version.target_ver) { | |
554 | case AR6003_REV1_VERSION: | |
555 | return "ath6k/AR6003/hw1.0"; | |
556 | case AR6003_REV2_VERSION: | |
557 | return "ath6k/AR6003/hw2.0"; | |
558 | case AR6003_REV3_VERSION: | |
559 | return "ath6k/AR6003/hw2.1.1"; | |
560 | } | |
561 | ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__, | |
562 | ar->version.target_ver); | |
563 | return NULL; | |
564 | } | |
565 | ||
566 | /* | |
567 | * Check the device tree for a board-id and use it to construct | |
568 | * the pathname to the firmware file. Used (for now) to find a | |
569 | * fallback to the "bdata.bin" file--typically a symlink to the | |
570 | * appropriate board-specific file. | |
571 | */ | |
572 | static bool check_device_tree(struct ath6kl *ar) | |
573 | { | |
574 | static const char *board_id_prop = "atheros,board-id"; | |
575 | struct device_node *node; | |
576 | char board_filename[64]; | |
577 | const char *board_id; | |
578 | int ret; | |
579 | ||
580 | for_each_compatible_node(node, NULL, "atheros,ath6kl") { | |
581 | board_id = of_get_property(node, board_id_prop, NULL); | |
582 | if (board_id == NULL) { | |
583 | ath6kl_warn("No \"%s\" property on %s node.\n", | |
584 | board_id_prop, node->name); | |
585 | continue; | |
586 | } | |
587 | snprintf(board_filename, sizeof(board_filename), | |
588 | "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id); | |
589 | ||
590 | ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, | |
591 | &ar->fw_board_len); | |
592 | if (ret) { | |
593 | ath6kl_err("Failed to get DT board file %s: %d\n", | |
594 | board_filename, ret); | |
595 | continue; | |
596 | } | |
597 | return true; | |
598 | } | |
599 | return false; | |
600 | } | |
601 | #else | |
602 | static bool check_device_tree(struct ath6kl *ar) | |
603 | { | |
604 | return false; | |
605 | } | |
606 | #endif /* CONFIG_OF */ | |
607 | ||
bdcd8170 KV |
608 | static int ath6kl_fetch_board_file(struct ath6kl *ar) |
609 | { | |
610 | const char *filename; | |
611 | int ret; | |
612 | ||
772c31ee KV |
613 | if (ar->fw_board != NULL) |
614 | return 0; | |
615 | ||
bdcd8170 KV |
616 | switch (ar->version.target_ver) { |
617 | case AR6003_REV2_VERSION: | |
618 | filename = AR6003_REV2_BOARD_DATA_FILE; | |
619 | break; | |
31024d99 KF |
620 | case AR6004_REV1_VERSION: |
621 | filename = AR6004_REV1_BOARD_DATA_FILE; | |
622 | break; | |
bdcd8170 KV |
623 | default: |
624 | filename = AR6003_REV3_BOARD_DATA_FILE; | |
625 | break; | |
626 | } | |
627 | ||
628 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, | |
629 | &ar->fw_board_len); | |
630 | if (ret == 0) { | |
631 | /* managed to get proper board file */ | |
632 | return 0; | |
633 | } | |
634 | ||
92ecbff4 SL |
635 | if (check_device_tree(ar)) { |
636 | /* got board file from device tree */ | |
637 | return 0; | |
638 | } | |
639 | ||
bdcd8170 KV |
640 | /* there was no proper board file, try to use default instead */ |
641 | ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", | |
642 | filename, ret); | |
643 | ||
644 | switch (ar->version.target_ver) { | |
645 | case AR6003_REV2_VERSION: | |
646 | filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE; | |
647 | break; | |
31024d99 KF |
648 | case AR6004_REV1_VERSION: |
649 | filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE; | |
650 | break; | |
bdcd8170 KV |
651 | default: |
652 | filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE; | |
653 | break; | |
654 | } | |
655 | ||
656 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, | |
657 | &ar->fw_board_len); | |
658 | if (ret) { | |
659 | ath6kl_err("Failed to get default board file %s: %d\n", | |
660 | filename, ret); | |
661 | return ret; | |
662 | } | |
663 | ||
664 | ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); | |
665 | ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); | |
666 | ||
667 | return 0; | |
668 | } | |
669 | ||
772c31ee KV |
670 | static int ath6kl_fetch_otp_file(struct ath6kl *ar) |
671 | { | |
672 | const char *filename; | |
673 | int ret; | |
674 | ||
675 | if (ar->fw_otp != NULL) | |
676 | return 0; | |
677 | ||
678 | switch (ar->version.target_ver) { | |
679 | case AR6003_REV2_VERSION: | |
680 | filename = AR6003_REV2_OTP_FILE; | |
681 | break; | |
682 | case AR6004_REV1_VERSION: | |
683 | ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n"); | |
684 | return 0; | |
685 | break; | |
686 | default: | |
687 | filename = AR6003_REV3_OTP_FILE; | |
688 | break; | |
689 | } | |
690 | ||
691 | ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, | |
692 | &ar->fw_otp_len); | |
693 | if (ret) { | |
694 | ath6kl_err("Failed to get OTP file %s: %d\n", | |
695 | filename, ret); | |
696 | return ret; | |
697 | } | |
698 | ||
699 | return 0; | |
700 | } | |
701 | ||
702 | static int ath6kl_fetch_fw_file(struct ath6kl *ar) | |
703 | { | |
704 | const char *filename; | |
705 | int ret; | |
706 | ||
707 | if (ar->fw != NULL) | |
708 | return 0; | |
709 | ||
710 | if (testmode) { | |
711 | switch (ar->version.target_ver) { | |
712 | case AR6003_REV2_VERSION: | |
713 | filename = AR6003_REV2_TCMD_FIRMWARE_FILE; | |
714 | break; | |
715 | case AR6003_REV3_VERSION: | |
716 | filename = AR6003_REV3_TCMD_FIRMWARE_FILE; | |
717 | break; | |
718 | case AR6004_REV1_VERSION: | |
719 | ath6kl_warn("testmode not supported with ar6004\n"); | |
720 | return -EOPNOTSUPP; | |
721 | default: | |
722 | ath6kl_warn("unknown target version: 0x%x\n", | |
723 | ar->version.target_ver); | |
724 | return -EINVAL; | |
725 | } | |
726 | ||
727 | set_bit(TESTMODE, &ar->flag); | |
728 | ||
729 | goto get_fw; | |
730 | } | |
731 | ||
732 | switch (ar->version.target_ver) { | |
733 | case AR6003_REV2_VERSION: | |
734 | filename = AR6003_REV2_FIRMWARE_FILE; | |
735 | break; | |
736 | case AR6004_REV1_VERSION: | |
737 | filename = AR6004_REV1_FIRMWARE_FILE; | |
738 | break; | |
739 | default: | |
740 | filename = AR6003_REV3_FIRMWARE_FILE; | |
741 | break; | |
742 | } | |
743 | ||
744 | get_fw: | |
745 | ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); | |
746 | if (ret) { | |
747 | ath6kl_err("Failed to get firmware file %s: %d\n", | |
748 | filename, ret); | |
749 | return ret; | |
750 | } | |
751 | ||
752 | return 0; | |
753 | } | |
754 | ||
755 | static int ath6kl_fetch_patch_file(struct ath6kl *ar) | |
756 | { | |
757 | const char *filename; | |
758 | int ret; | |
759 | ||
760 | switch (ar->version.target_ver) { | |
761 | case AR6003_REV2_VERSION: | |
762 | filename = AR6003_REV2_PATCH_FILE; | |
763 | break; | |
764 | case AR6004_REV1_VERSION: | |
765 | /* FIXME: implement for AR6004 */ | |
766 | return 0; | |
767 | break; | |
768 | default: | |
769 | filename = AR6003_REV3_PATCH_FILE; | |
770 | break; | |
771 | } | |
772 | ||
773 | if (ar->fw_patch == NULL) { | |
774 | ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, | |
775 | &ar->fw_patch_len); | |
776 | if (ret) { | |
777 | ath6kl_err("Failed to get patch file %s: %d\n", | |
778 | filename, ret); | |
779 | return ret; | |
780 | } | |
781 | } | |
782 | ||
783 | return 0; | |
784 | } | |
785 | ||
50d41234 | 786 | static int ath6kl_fetch_fw_api1(struct ath6kl *ar) |
772c31ee KV |
787 | { |
788 | int ret; | |
789 | ||
772c31ee KV |
790 | ret = ath6kl_fetch_otp_file(ar); |
791 | if (ret) | |
792 | return ret; | |
793 | ||
794 | ret = ath6kl_fetch_fw_file(ar); | |
795 | if (ret) | |
796 | return ret; | |
797 | ||
798 | ret = ath6kl_fetch_patch_file(ar); | |
799 | if (ret) | |
800 | return ret; | |
801 | ||
802 | return 0; | |
803 | } | |
bdcd8170 | 804 | |
50d41234 KV |
805 | static int ath6kl_fetch_fw_api2(struct ath6kl *ar) |
806 | { | |
807 | size_t magic_len, len, ie_len; | |
808 | const struct firmware *fw; | |
809 | struct ath6kl_fw_ie *hdr; | |
810 | const char *filename; | |
811 | const u8 *data; | |
97e0496d | 812 | int ret, ie_id, i, index, bit; |
8a137480 | 813 | __le32 *val; |
50d41234 KV |
814 | |
815 | switch (ar->version.target_ver) { | |
816 | case AR6003_REV2_VERSION: | |
817 | filename = AR6003_REV2_FIRMWARE_2_FILE; | |
818 | break; | |
819 | case AR6003_REV3_VERSION: | |
820 | filename = AR6003_REV3_FIRMWARE_2_FILE; | |
821 | break; | |
822 | case AR6004_REV1_VERSION: | |
823 | filename = AR6004_REV1_FIRMWARE_2_FILE; | |
824 | break; | |
825 | default: | |
826 | return -EOPNOTSUPP; | |
827 | } | |
828 | ||
829 | ret = request_firmware(&fw, filename, ar->dev); | |
830 | if (ret) | |
831 | return ret; | |
832 | ||
833 | data = fw->data; | |
834 | len = fw->size; | |
835 | ||
836 | /* magic also includes the null byte, check that as well */ | |
837 | magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; | |
838 | ||
839 | if (len < magic_len) { | |
840 | ret = -EINVAL; | |
841 | goto out; | |
842 | } | |
843 | ||
844 | if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { | |
845 | ret = -EINVAL; | |
846 | goto out; | |
847 | } | |
848 | ||
849 | len -= magic_len; | |
850 | data += magic_len; | |
851 | ||
852 | /* loop elements */ | |
853 | while (len > sizeof(struct ath6kl_fw_ie)) { | |
854 | /* hdr is unaligned! */ | |
855 | hdr = (struct ath6kl_fw_ie *) data; | |
856 | ||
857 | ie_id = le32_to_cpup(&hdr->id); | |
858 | ie_len = le32_to_cpup(&hdr->len); | |
859 | ||
860 | len -= sizeof(*hdr); | |
861 | data += sizeof(*hdr); | |
862 | ||
863 | if (len < ie_len) { | |
864 | ret = -EINVAL; | |
865 | goto out; | |
866 | } | |
867 | ||
868 | switch (ie_id) { | |
869 | case ATH6KL_FW_IE_OTP_IMAGE: | |
ef548626 | 870 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", |
6bc36431 KV |
871 | ie_len); |
872 | ||
50d41234 KV |
873 | ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); |
874 | ||
875 | if (ar->fw_otp == NULL) { | |
876 | ret = -ENOMEM; | |
877 | goto out; | |
878 | } | |
879 | ||
880 | ar->fw_otp_len = ie_len; | |
881 | break; | |
882 | case ATH6KL_FW_IE_FW_IMAGE: | |
ef548626 | 883 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", |
6bc36431 KV |
884 | ie_len); |
885 | ||
50d41234 KV |
886 | ar->fw = kmemdup(data, ie_len, GFP_KERNEL); |
887 | ||
888 | if (ar->fw == NULL) { | |
889 | ret = -ENOMEM; | |
890 | goto out; | |
891 | } | |
892 | ||
893 | ar->fw_len = ie_len; | |
894 | break; | |
895 | case ATH6KL_FW_IE_PATCH_IMAGE: | |
ef548626 | 896 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", |
6bc36431 KV |
897 | ie_len); |
898 | ||
50d41234 KV |
899 | ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); |
900 | ||
901 | if (ar->fw_patch == NULL) { | |
902 | ret = -ENOMEM; | |
903 | goto out; | |
904 | } | |
905 | ||
906 | ar->fw_patch_len = ie_len; | |
907 | break; | |
8a137480 KV |
908 | case ATH6KL_FW_IE_RESERVED_RAM_SIZE: |
909 | val = (__le32 *) data; | |
910 | ar->hw.reserved_ram_size = le32_to_cpup(val); | |
6bc36431 KV |
911 | |
912 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
913 | "found reserved ram size ie 0x%d\n", | |
914 | ar->hw.reserved_ram_size); | |
8a137480 | 915 | break; |
97e0496d | 916 | case ATH6KL_FW_IE_CAPABILITIES: |
6bc36431 | 917 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
ef548626 | 918 | "found firmware capabilities ie (%zd B)\n", |
6bc36431 KV |
919 | ie_len); |
920 | ||
97e0496d KV |
921 | for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { |
922 | index = ALIGN(i, 8) / 8; | |
923 | bit = i % 8; | |
924 | ||
925 | if (data[index] & (1 << bit)) | |
926 | __set_bit(i, ar->fw_capabilities); | |
927 | } | |
6bc36431 KV |
928 | |
929 | ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", | |
930 | ar->fw_capabilities, | |
931 | sizeof(ar->fw_capabilities)); | |
97e0496d | 932 | break; |
1b4304da KV |
933 | case ATH6KL_FW_IE_PATCH_ADDR: |
934 | if (ie_len != sizeof(*val)) | |
935 | break; | |
936 | ||
937 | val = (__le32 *) data; | |
938 | ar->hw.dataset_patch_addr = le32_to_cpup(val); | |
6bc36431 KV |
939 | |
940 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
941 | "found patch address ie 0x%d\n", | |
942 | ar->hw.dataset_patch_addr); | |
1b4304da | 943 | break; |
50d41234 | 944 | default: |
6bc36431 | 945 | ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", |
50d41234 KV |
946 | le32_to_cpup(&hdr->id)); |
947 | break; | |
948 | } | |
949 | ||
950 | len -= ie_len; | |
951 | data += ie_len; | |
952 | }; | |
953 | ||
954 | ret = 0; | |
955 | out: | |
956 | release_firmware(fw); | |
957 | ||
958 | return ret; | |
959 | } | |
960 | ||
961 | static int ath6kl_fetch_firmwares(struct ath6kl *ar) | |
962 | { | |
963 | int ret; | |
964 | ||
965 | ret = ath6kl_fetch_board_file(ar); | |
966 | if (ret) | |
967 | return ret; | |
968 | ||
969 | ret = ath6kl_fetch_fw_api2(ar); | |
6bc36431 KV |
970 | if (ret == 0) { |
971 | ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n"); | |
50d41234 | 972 | return 0; |
6bc36431 | 973 | } |
50d41234 KV |
974 | |
975 | ret = ath6kl_fetch_fw_api1(ar); | |
976 | if (ret) | |
977 | return ret; | |
978 | ||
6bc36431 KV |
979 | ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n"); |
980 | ||
50d41234 KV |
981 | return 0; |
982 | } | |
983 | ||
bdcd8170 KV |
984 | static int ath6kl_upload_board_file(struct ath6kl *ar) |
985 | { | |
986 | u32 board_address, board_ext_address, param; | |
31024d99 | 987 | u32 board_data_size, board_ext_data_size; |
bdcd8170 KV |
988 | int ret; |
989 | ||
772c31ee KV |
990 | if (WARN_ON(ar->fw_board == NULL)) |
991 | return -ENOENT; | |
bdcd8170 | 992 | |
31024d99 KF |
993 | /* |
994 | * Determine where in Target RAM to write Board Data. | |
995 | * For AR6004, host determine Target RAM address for | |
996 | * writing board data. | |
997 | */ | |
998 | if (ar->target_type == TARGET_TYPE_AR6004) { | |
999 | board_address = AR6004_REV1_BOARD_DATA_ADDRESS; | |
1000 | ath6kl_bmi_write(ar, | |
1001 | ath6kl_get_hi_item_addr(ar, | |
1002 | HI_ITEM(hi_board_data)), | |
1003 | (u8 *) &board_address, 4); | |
1004 | } else { | |
1005 | ath6kl_bmi_read(ar, | |
1006 | ath6kl_get_hi_item_addr(ar, | |
1007 | HI_ITEM(hi_board_data)), | |
1008 | (u8 *) &board_address, 4); | |
1009 | } | |
1010 | ||
bdcd8170 KV |
1011 | /* determine where in target ram to write extended board data */ |
1012 | ath6kl_bmi_read(ar, | |
1013 | ath6kl_get_hi_item_addr(ar, | |
1014 | HI_ITEM(hi_board_ext_data)), | |
1015 | (u8 *) &board_ext_address, 4); | |
1016 | ||
bdcd8170 KV |
1017 | if (board_ext_address == 0) { |
1018 | ath6kl_err("Failed to get board file target address.\n"); | |
1019 | return -EINVAL; | |
1020 | } | |
1021 | ||
31024d99 KF |
1022 | switch (ar->target_type) { |
1023 | case TARGET_TYPE_AR6003: | |
1024 | board_data_size = AR6003_BOARD_DATA_SZ; | |
1025 | board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; | |
1026 | break; | |
1027 | case TARGET_TYPE_AR6004: | |
1028 | board_data_size = AR6004_BOARD_DATA_SZ; | |
1029 | board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; | |
1030 | break; | |
1031 | default: | |
1032 | WARN_ON(1); | |
1033 | return -EINVAL; | |
1034 | break; | |
1035 | } | |
1036 | ||
1037 | if (ar->fw_board_len == (board_data_size + | |
1038 | board_ext_data_size)) { | |
1039 | ||
bdcd8170 | 1040 | /* write extended board data */ |
6bc36431 KV |
1041 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
1042 | "writing extended board data to 0x%x (%d B)\n", | |
1043 | board_ext_address, board_ext_data_size); | |
1044 | ||
bdcd8170 | 1045 | ret = ath6kl_bmi_write(ar, board_ext_address, |
31024d99 KF |
1046 | ar->fw_board + board_data_size, |
1047 | board_ext_data_size); | |
bdcd8170 KV |
1048 | if (ret) { |
1049 | ath6kl_err("Failed to write extended board data: %d\n", | |
1050 | ret); | |
1051 | return ret; | |
1052 | } | |
1053 | ||
1054 | /* record that extended board data is initialized */ | |
31024d99 KF |
1055 | param = (board_ext_data_size << 16) | 1; |
1056 | ||
bdcd8170 KV |
1057 | ath6kl_bmi_write(ar, |
1058 | ath6kl_get_hi_item_addr(ar, | |
1059 | HI_ITEM(hi_board_ext_data_config)), | |
1060 | (unsigned char *) ¶m, 4); | |
1061 | } | |
1062 | ||
31024d99 | 1063 | if (ar->fw_board_len < board_data_size) { |
bdcd8170 KV |
1064 | ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); |
1065 | ret = -EINVAL; | |
1066 | return ret; | |
1067 | } | |
1068 | ||
6bc36431 KV |
1069 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", |
1070 | board_address, board_data_size); | |
1071 | ||
bdcd8170 | 1072 | ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, |
31024d99 | 1073 | board_data_size); |
bdcd8170 KV |
1074 | |
1075 | if (ret) { | |
1076 | ath6kl_err("Board file bmi write failed: %d\n", ret); | |
1077 | return ret; | |
1078 | } | |
1079 | ||
1080 | /* record the fact that Board Data IS initialized */ | |
1081 | param = 1; | |
1082 | ath6kl_bmi_write(ar, | |
1083 | ath6kl_get_hi_item_addr(ar, | |
1084 | HI_ITEM(hi_board_data_initialized)), | |
1085 | (u8 *)¶m, 4); | |
1086 | ||
1087 | return ret; | |
1088 | } | |
1089 | ||
1090 | static int ath6kl_upload_otp(struct ath6kl *ar) | |
1091 | { | |
bdcd8170 | 1092 | u32 address, param; |
bef26a7f | 1093 | bool from_hw = false; |
bdcd8170 KV |
1094 | int ret; |
1095 | ||
772c31ee KV |
1096 | if (WARN_ON(ar->fw_otp == NULL)) |
1097 | return -ENOENT; | |
bdcd8170 | 1098 | |
a01ac414 | 1099 | address = ar->hw.app_load_addr; |
bdcd8170 | 1100 | |
ef548626 | 1101 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, |
6bc36431 KV |
1102 | ar->fw_otp_len); |
1103 | ||
bdcd8170 KV |
1104 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, |
1105 | ar->fw_otp_len); | |
1106 | if (ret) { | |
1107 | ath6kl_err("Failed to upload OTP file: %d\n", ret); | |
1108 | return ret; | |
1109 | } | |
1110 | ||
639d0b89 KV |
1111 | /* read firmware start address */ |
1112 | ret = ath6kl_bmi_read(ar, | |
1113 | ath6kl_get_hi_item_addr(ar, | |
1114 | HI_ITEM(hi_app_start)), | |
1115 | (u8 *) &address, sizeof(address)); | |
1116 | ||
1117 | if (ret) { | |
1118 | ath6kl_err("Failed to read hi_app_start: %d\n", ret); | |
1119 | return ret; | |
1120 | } | |
1121 | ||
bef26a7f KV |
1122 | if (ar->hw.app_start_override_addr == 0) { |
1123 | ar->hw.app_start_override_addr = address; | |
1124 | from_hw = true; | |
1125 | } | |
639d0b89 | 1126 | |
bef26a7f KV |
1127 | ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", |
1128 | from_hw ? " (from hw)" : "", | |
6bc36431 KV |
1129 | ar->hw.app_start_override_addr); |
1130 | ||
bdcd8170 | 1131 | /* execute the OTP code */ |
bef26a7f KV |
1132 | ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", |
1133 | ar->hw.app_start_override_addr); | |
bdcd8170 | 1134 | param = 0; |
bef26a7f | 1135 | ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); |
bdcd8170 KV |
1136 | |
1137 | return ret; | |
1138 | } | |
1139 | ||
1140 | static int ath6kl_upload_firmware(struct ath6kl *ar) | |
1141 | { | |
bdcd8170 KV |
1142 | u32 address; |
1143 | int ret; | |
1144 | ||
772c31ee KV |
1145 | if (WARN_ON(ar->fw == NULL)) |
1146 | return -ENOENT; | |
bdcd8170 | 1147 | |
a01ac414 | 1148 | address = ar->hw.app_load_addr; |
bdcd8170 | 1149 | |
ef548626 | 1150 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", |
6bc36431 KV |
1151 | address, ar->fw_len); |
1152 | ||
bdcd8170 KV |
1153 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); |
1154 | ||
1155 | if (ret) { | |
1156 | ath6kl_err("Failed to write firmware: %d\n", ret); | |
1157 | return ret; | |
1158 | } | |
1159 | ||
31024d99 KF |
1160 | /* |
1161 | * Set starting address for firmware | |
1162 | * Don't need to setup app_start override addr on AR6004 | |
1163 | */ | |
1164 | if (ar->target_type != TARGET_TYPE_AR6004) { | |
a01ac414 | 1165 | address = ar->hw.app_start_override_addr; |
31024d99 KF |
1166 | ath6kl_bmi_set_app_start(ar, address); |
1167 | } | |
bdcd8170 KV |
1168 | return ret; |
1169 | } | |
1170 | ||
1171 | static int ath6kl_upload_patch(struct ath6kl *ar) | |
1172 | { | |
bdcd8170 KV |
1173 | u32 address, param; |
1174 | int ret; | |
1175 | ||
772c31ee KV |
1176 | if (WARN_ON(ar->fw_patch == NULL)) |
1177 | return -ENOENT; | |
bdcd8170 | 1178 | |
a01ac414 | 1179 | address = ar->hw.dataset_patch_addr; |
bdcd8170 | 1180 | |
ef548626 | 1181 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", |
6bc36431 KV |
1182 | address, ar->fw_patch_len); |
1183 | ||
bdcd8170 KV |
1184 | ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); |
1185 | if (ret) { | |
1186 | ath6kl_err("Failed to write patch file: %d\n", ret); | |
1187 | return ret; | |
1188 | } | |
1189 | ||
1190 | param = address; | |
1191 | ath6kl_bmi_write(ar, | |
1192 | ath6kl_get_hi_item_addr(ar, | |
1193 | HI_ITEM(hi_dset_list_head)), | |
1194 | (unsigned char *) ¶m, 4); | |
1195 | ||
1196 | return 0; | |
1197 | } | |
1198 | ||
1199 | static int ath6kl_init_upload(struct ath6kl *ar) | |
1200 | { | |
1201 | u32 param, options, sleep, address; | |
1202 | int status = 0; | |
1203 | ||
31024d99 KF |
1204 | if (ar->target_type != TARGET_TYPE_AR6003 && |
1205 | ar->target_type != TARGET_TYPE_AR6004) | |
bdcd8170 KV |
1206 | return -EINVAL; |
1207 | ||
1208 | /* temporarily disable system sleep */ | |
1209 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; | |
1210 | status = ath6kl_bmi_reg_read(ar, address, ¶m); | |
1211 | if (status) | |
1212 | return status; | |
1213 | ||
1214 | options = param; | |
1215 | ||
1216 | param |= ATH6KL_OPTION_SLEEP_DISABLE; | |
1217 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1218 | if (status) | |
1219 | return status; | |
1220 | ||
1221 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; | |
1222 | status = ath6kl_bmi_reg_read(ar, address, ¶m); | |
1223 | if (status) | |
1224 | return status; | |
1225 | ||
1226 | sleep = param; | |
1227 | ||
1228 | param |= SM(SYSTEM_SLEEP_DISABLE, 1); | |
1229 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1230 | if (status) | |
1231 | return status; | |
1232 | ||
1233 | ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", | |
1234 | options, sleep); | |
1235 | ||
1236 | /* program analog PLL register */ | |
31024d99 KF |
1237 | /* no need to control 40/44MHz clock on AR6004 */ |
1238 | if (ar->target_type != TARGET_TYPE_AR6004) { | |
1239 | status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, | |
1240 | 0xF9104001); | |
bdcd8170 | 1241 | |
31024d99 KF |
1242 | if (status) |
1243 | return status; | |
bdcd8170 | 1244 | |
31024d99 KF |
1245 | /* Run at 80/88MHz by default */ |
1246 | param = SM(CPU_CLOCK_STANDARD, 1); | |
1247 | ||
1248 | address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; | |
1249 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1250 | if (status) | |
1251 | return status; | |
1252 | } | |
bdcd8170 KV |
1253 | |
1254 | param = 0; | |
1255 | address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; | |
1256 | param = SM(LPO_CAL_ENABLE, 1); | |
1257 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1258 | if (status) | |
1259 | return status; | |
1260 | ||
1261 | /* WAR to avoid SDIO CRC err */ | |
1262 | if (ar->version.target_ver == AR6003_REV2_VERSION) { | |
1263 | ath6kl_err("temporary war to avoid sdio crc error\n"); | |
1264 | ||
1265 | param = 0x20; | |
1266 | ||
1267 | address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; | |
1268 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1269 | if (status) | |
1270 | return status; | |
1271 | ||
1272 | address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; | |
1273 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1274 | if (status) | |
1275 | return status; | |
1276 | ||
1277 | address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; | |
1278 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1279 | if (status) | |
1280 | return status; | |
1281 | ||
1282 | address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; | |
1283 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1284 | if (status) | |
1285 | return status; | |
1286 | } | |
1287 | ||
1288 | /* write EEPROM data to Target RAM */ | |
1289 | status = ath6kl_upload_board_file(ar); | |
1290 | if (status) | |
1291 | return status; | |
1292 | ||
1293 | /* transfer One time Programmable data */ | |
1294 | status = ath6kl_upload_otp(ar); | |
1295 | if (status) | |
1296 | return status; | |
1297 | ||
1298 | /* Download Target firmware */ | |
1299 | status = ath6kl_upload_firmware(ar); | |
1300 | if (status) | |
1301 | return status; | |
1302 | ||
1303 | status = ath6kl_upload_patch(ar); | |
1304 | if (status) | |
1305 | return status; | |
1306 | ||
1307 | /* Restore system sleep */ | |
1308 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; | |
1309 | status = ath6kl_bmi_reg_write(ar, address, sleep); | |
1310 | if (status) | |
1311 | return status; | |
1312 | ||
1313 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; | |
1314 | param = options | 0x20; | |
1315 | status = ath6kl_bmi_reg_write(ar, address, param); | |
1316 | if (status) | |
1317 | return status; | |
1318 | ||
1319 | /* Configure GPIO AR6003 UART */ | |
1320 | param = CONFIG_AR600x_DEBUG_UART_TX_PIN; | |
1321 | status = ath6kl_bmi_write(ar, | |
1322 | ath6kl_get_hi_item_addr(ar, | |
1323 | HI_ITEM(hi_dbg_uart_txpin)), | |
1324 | (u8 *)¶m, 4); | |
1325 | ||
1326 | return status; | |
1327 | } | |
1328 | ||
a01ac414 KV |
1329 | static int ath6kl_init_hw_params(struct ath6kl *ar) |
1330 | { | |
1331 | switch (ar->version.target_ver) { | |
1332 | case AR6003_REV2_VERSION: | |
1333 | ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS; | |
1334 | ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS; | |
991b27ea KV |
1335 | ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS; |
1336 | ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE; | |
bef26a7f KV |
1337 | |
1338 | /* hw2.0 needs override address hardcoded */ | |
1339 | ar->hw.app_start_override_addr = 0x944C00; | |
1340 | ||
a01ac414 KV |
1341 | break; |
1342 | case AR6003_REV3_VERSION: | |
1343 | ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS; | |
1344 | ar->hw.app_load_addr = 0x1234; | |
991b27ea KV |
1345 | ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS; |
1346 | ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE; | |
a01ac414 KV |
1347 | break; |
1348 | case AR6004_REV1_VERSION: | |
1349 | ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS; | |
1350 | ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS; | |
991b27ea KV |
1351 | ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS; |
1352 | ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE; | |
a01ac414 KV |
1353 | break; |
1354 | default: | |
1355 | ath6kl_err("Unsupported hardware version: 0x%x\n", | |
1356 | ar->version.target_ver); | |
1357 | return -EINVAL; | |
1358 | } | |
1359 | ||
6bc36431 KV |
1360 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
1361 | "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", | |
1362 | ar->version.target_ver, ar->target_type, | |
1363 | ar->hw.dataset_patch_addr, ar->hw.app_load_addr); | |
1364 | ath6kl_dbg(ATH6KL_DBG_BOOT, | |
1365 | "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", | |
1366 | ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, | |
1367 | ar->hw.reserved_ram_size); | |
1368 | ||
a01ac414 KV |
1369 | return 0; |
1370 | } | |
1371 | ||
521dffcc | 1372 | static int ath6kl_init(struct ath6kl *ar) |
bdcd8170 | 1373 | { |
bdcd8170 KV |
1374 | int status = 0; |
1375 | s32 timeleft; | |
8dafb70e | 1376 | struct net_device *ndev; |
bdcd8170 KV |
1377 | |
1378 | if (!ar) | |
1379 | return -EIO; | |
1380 | ||
1381 | /* Do we need to finish the BMI phase */ | |
1382 | if (ath6kl_bmi_done(ar)) { | |
1383 | status = -EIO; | |
1384 | goto ath6kl_init_done; | |
1385 | } | |
1386 | ||
1387 | /* Indicate that WMI is enabled (although not ready yet) */ | |
1388 | set_bit(WMI_ENABLED, &ar->flag); | |
2865785e | 1389 | ar->wmi = ath6kl_wmi_init(ar); |
bdcd8170 KV |
1390 | if (!ar->wmi) { |
1391 | ath6kl_err("failed to initialize wmi\n"); | |
1392 | status = -EIO; | |
1393 | goto ath6kl_init_done; | |
1394 | } | |
1395 | ||
1396 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); | |
1397 | ||
8dafb70e VT |
1398 | status = ath6kl_register_ieee80211_hw(ar); |
1399 | if (status) | |
1400 | goto err_node_cleanup; | |
1401 | ||
1402 | status = ath6kl_debug_init(ar); | |
1403 | if (status) { | |
1404 | wiphy_unregister(ar->wiphy); | |
1405 | goto err_node_cleanup; | |
1406 | } | |
1407 | ||
1408 | /* Add an initial station interface */ | |
1409 | ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION); | |
1410 | if (!ndev) { | |
1411 | ath6kl_err("Failed to instantiate a network device\n"); | |
1412 | status = -ENOMEM; | |
1413 | wiphy_unregister(ar->wiphy); | |
1414 | goto err_debug_init; | |
1415 | } | |
1416 | ||
1417 | ||
1418 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", | |
1419 | __func__, ar->net_dev->name, ar->net_dev, ar); | |
1420 | ||
bdcd8170 KV |
1421 | /* |
1422 | * The reason we have to wait for the target here is that the | |
1423 | * driver layer has to init BMI in order to set the host block | |
1424 | * size. | |
1425 | */ | |
ad226ec2 | 1426 | if (ath6kl_htc_wait_target(ar->htc_target)) { |
bdcd8170 | 1427 | status = -EIO; |
8dafb70e | 1428 | goto err_if_deinit; |
bdcd8170 KV |
1429 | } |
1430 | ||
1431 | if (ath6kl_init_service_ep(ar)) { | |
1432 | status = -EIO; | |
1433 | goto err_cleanup_scatter; | |
1434 | } | |
1435 | ||
1436 | /* setup access class priority mappings */ | |
1437 | ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ | |
1438 | ar->ac_stream_pri_map[WMM_AC_BE] = 1; | |
1439 | ar->ac_stream_pri_map[WMM_AC_VI] = 2; | |
1440 | ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ | |
1441 | ||
1442 | /* give our connected endpoints some buffers */ | |
1443 | ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); | |
1444 | ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); | |
1445 | ||
1446 | /* allocate some buffers that handle larger AMSDU frames */ | |
1447 | ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); | |
1448 | ||
1449 | /* setup credit distribution */ | |
1450 | ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info); | |
1451 | ||
1452 | ath6kl_cookie_init(ar); | |
1453 | ||
1454 | /* start HTC */ | |
ad226ec2 | 1455 | status = ath6kl_htc_start(ar->htc_target); |
bdcd8170 KV |
1456 | |
1457 | if (status) { | |
1458 | ath6kl_cookie_cleanup(ar); | |
1459 | goto err_rxbuf_cleanup; | |
1460 | } | |
1461 | ||
1462 | /* Wait for Wmi event to be ready */ | |
1463 | timeleft = wait_event_interruptible_timeout(ar->event_wq, | |
1464 | test_bit(WMI_READY, | |
1465 | &ar->flag), | |
1466 | WMI_TIMEOUT); | |
1467 | ||
6bc36431 KV |
1468 | ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); |
1469 | ||
bdcd8170 KV |
1470 | if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { |
1471 | ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", | |
1472 | ATH6KL_ABI_VERSION, ar->version.abi_ver); | |
1473 | status = -EIO; | |
1474 | goto err_htc_stop; | |
1475 | } | |
1476 | ||
1477 | if (!timeleft || signal_pending(current)) { | |
1478 | ath6kl_err("wmi is not ready or wait was interrupted\n"); | |
1479 | status = -EIO; | |
1480 | goto err_htc_stop; | |
1481 | } | |
1482 | ||
1483 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); | |
1484 | ||
1485 | /* communicate the wmi protocol verision to the target */ | |
1486 | if ((ath6kl_set_host_app_area(ar)) != 0) | |
1487 | ath6kl_err("unable to set the host app area\n"); | |
1488 | ||
1489 | ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | | |
1490 | ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; | |
1491 | ||
be98e3a4 VT |
1492 | ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | |
1493 | WIPHY_FLAG_HAVE_AP_SME; | |
011a36e1 | 1494 | |
bdcd8170 KV |
1495 | status = ath6kl_target_config_wlan_params(ar); |
1496 | if (!status) | |
1497 | goto ath6kl_init_done; | |
1498 | ||
1499 | err_htc_stop: | |
ad226ec2 | 1500 | ath6kl_htc_stop(ar->htc_target); |
bdcd8170 | 1501 | err_rxbuf_cleanup: |
ad226ec2 | 1502 | ath6kl_htc_flush_rx_buf(ar->htc_target); |
bdcd8170 KV |
1503 | ath6kl_cleanup_amsdu_rxbufs(ar); |
1504 | err_cleanup_scatter: | |
1505 | ath6kl_hif_cleanup_scatter(ar); | |
8dafb70e | 1506 | err_if_deinit: |
108438bc | 1507 | ath6kl_deinit_if_data(netdev_priv(ndev)); |
8dafb70e VT |
1508 | wiphy_unregister(ar->wiphy); |
1509 | err_debug_init: | |
1510 | ath6kl_debug_cleanup(ar); | |
852bd9d9 | 1511 | err_node_cleanup: |
bdcd8170 KV |
1512 | ath6kl_wmi_shutdown(ar->wmi); |
1513 | clear_bit(WMI_ENABLED, &ar->flag); | |
1514 | ar->wmi = NULL; | |
1515 | ||
1516 | ath6kl_init_done: | |
1517 | return status; | |
1518 | } | |
1519 | ||
1520 | int ath6kl_core_init(struct ath6kl *ar) | |
1521 | { | |
1522 | int ret = 0; | |
1523 | struct ath6kl_bmi_target_info targ_info; | |
1524 | ||
1525 | ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); | |
1526 | if (!ar->ath6kl_wq) | |
1527 | return -ENOMEM; | |
1528 | ||
1529 | ret = ath6kl_bmi_init(ar); | |
1530 | if (ret) | |
1531 | goto err_wq; | |
1532 | ||
1533 | ret = ath6kl_bmi_get_target_info(ar, &targ_info); | |
1534 | if (ret) | |
1535 | goto err_bmi_cleanup; | |
1536 | ||
1537 | ar->version.target_ver = le32_to_cpu(targ_info.version); | |
1538 | ar->target_type = le32_to_cpu(targ_info.type); | |
be98e3a4 | 1539 | ar->wiphy->hw_version = le32_to_cpu(targ_info.version); |
bdcd8170 | 1540 | |
a01ac414 KV |
1541 | ret = ath6kl_init_hw_params(ar); |
1542 | if (ret) | |
1543 | goto err_bmi_cleanup; | |
1544 | ||
bdcd8170 KV |
1545 | ret = ath6kl_configure_target(ar); |
1546 | if (ret) | |
1547 | goto err_bmi_cleanup; | |
1548 | ||
ad226ec2 | 1549 | ar->htc_target = ath6kl_htc_create(ar); |
bdcd8170 KV |
1550 | |
1551 | if (!ar->htc_target) { | |
1552 | ret = -ENOMEM; | |
1553 | goto err_bmi_cleanup; | |
1554 | } | |
1555 | ||
772c31ee KV |
1556 | ret = ath6kl_fetch_firmwares(ar); |
1557 | if (ret) | |
1558 | goto err_htc_cleanup; | |
1559 | ||
bdcd8170 KV |
1560 | ret = ath6kl_init_upload(ar); |
1561 | if (ret) | |
1562 | goto err_htc_cleanup; | |
1563 | ||
521dffcc | 1564 | ret = ath6kl_init(ar); |
bdcd8170 KV |
1565 | if (ret) |
1566 | goto err_htc_cleanup; | |
1567 | ||
bdcd8170 KV |
1568 | return ret; |
1569 | ||
1570 | err_htc_cleanup: | |
ad226ec2 | 1571 | ath6kl_htc_cleanup(ar->htc_target); |
bdcd8170 KV |
1572 | err_bmi_cleanup: |
1573 | ath6kl_bmi_cleanup(ar); | |
1574 | err_wq: | |
1575 | destroy_workqueue(ar->ath6kl_wq); | |
8dafb70e | 1576 | |
bdcd8170 KV |
1577 | return ret; |
1578 | } | |
1579 | ||
1580 | void ath6kl_stop_txrx(struct ath6kl *ar) | |
1581 | { | |
1582 | struct net_device *ndev = ar->net_dev; | |
59c98449 | 1583 | struct ath6kl_vif *vif = ar->vif; |
bdcd8170 KV |
1584 | |
1585 | if (!ndev) | |
1586 | return; | |
1587 | ||
1588 | set_bit(DESTROY_IN_PROGRESS, &ar->flag); | |
1589 | ||
1590 | if (down_interruptible(&ar->sem)) { | |
1591 | ath6kl_err("down_interruptible failed\n"); | |
1592 | return; | |
1593 | } | |
1594 | ||
1595 | if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR) | |
1596 | ath6kl_stop_endpoint(ndev, false, true); | |
1597 | ||
59c98449 | 1598 | clear_bit(WLAN_ENABLED, &vif->flags); |
bdcd8170 KV |
1599 | } |
1600 | ||
1601 | /* | |
1602 | * We need to differentiate between the surprise and planned removal of the | |
1603 | * device because of the following consideration: | |
1604 | * | |
1605 | * - In case of surprise removal, the hcd already frees up the pending | |
1606 | * for the device and hence there is no need to unregister the function | |
1607 | * driver inorder to get these requests. For planned removal, the function | |
1608 | * driver has to explicitly unregister itself to have the hcd return all the | |
1609 | * pending requests before the data structures for the devices are freed up. | |
1610 | * Note that as per the current implementation, the function driver will | |
1611 | * end up releasing all the devices since there is no API to selectively | |
1612 | * release a particular device. | |
1613 | * | |
1614 | * - Certain commands issued to the target can be skipped for surprise | |
1615 | * removal since they will anyway not go through. | |
1616 | */ | |
1617 | void ath6kl_destroy(struct net_device *dev, unsigned int unregister) | |
1618 | { | |
1619 | struct ath6kl *ar; | |
1620 | ||
1621 | if (!dev || !ath6kl_priv(dev)) { | |
1622 | ath6kl_err("failed to get device structure\n"); | |
1623 | return; | |
1624 | } | |
1625 | ||
1626 | ar = ath6kl_priv(dev); | |
1627 | ||
1628 | destroy_workqueue(ar->ath6kl_wq); | |
1629 | ||
1630 | if (ar->htc_target) | |
ad226ec2 | 1631 | ath6kl_htc_cleanup(ar->htc_target); |
bdcd8170 | 1632 | |
bdcd8170 KV |
1633 | ath6kl_cookie_cleanup(ar); |
1634 | ||
1635 | ath6kl_cleanup_amsdu_rxbufs(ar); | |
1636 | ||
1637 | ath6kl_bmi_cleanup(ar); | |
1638 | ||
bdf5396b KV |
1639 | ath6kl_debug_cleanup(ar); |
1640 | ||
108438bc | 1641 | ath6kl_deinit_if_data(netdev_priv(dev)); |
bdcd8170 | 1642 | |
19703573 RM |
1643 | kfree(ar->fw_board); |
1644 | kfree(ar->fw_otp); | |
1645 | kfree(ar->fw); | |
1646 | kfree(ar->fw_patch); | |
1647 | ||
8dafb70e | 1648 | ath6kl_deinit_ieee80211_hw(ar); |
bdcd8170 | 1649 | } |