Commit | Line | Data |
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bdcd8170 KV |
1 | /* |
2 | * Copyright (c) 2004-2011 Atheros Communications Inc. | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #include <linux/mmc/card.h> | |
18 | #include <linux/mmc/mmc.h> | |
19 | #include <linux/mmc/host.h> | |
20 | #include <linux/mmc/sdio_func.h> | |
21 | #include <linux/mmc/sdio_ids.h> | |
22 | #include <linux/mmc/sdio.h> | |
23 | #include <linux/mmc/sd.h> | |
24 | #include "htc_hif.h" | |
25 | #include "hif-ops.h" | |
26 | #include "target.h" | |
27 | #include "debug.h" | |
9df337a1 | 28 | #include "cfg80211.h" |
bdcd8170 KV |
29 | |
30 | struct ath6kl_sdio { | |
31 | struct sdio_func *func; | |
32 | ||
33 | spinlock_t lock; | |
34 | ||
35 | /* free list */ | |
36 | struct list_head bus_req_freeq; | |
37 | ||
38 | /* available bus requests */ | |
39 | struct bus_request bus_req[BUS_REQUEST_MAX_NUM]; | |
40 | ||
41 | struct ath6kl *ar; | |
42 | u8 *dma_buffer; | |
43 | ||
44 | /* scatter request list head */ | |
45 | struct list_head scat_req; | |
46 | ||
47 | spinlock_t scat_lock; | |
48 | bool is_disabled; | |
49 | atomic_t irq_handling; | |
50 | const struct sdio_device_id *id; | |
51 | struct work_struct wr_async_work; | |
52 | struct list_head wr_asyncq; | |
53 | spinlock_t wr_async_lock; | |
54 | }; | |
55 | ||
56 | #define CMD53_ARG_READ 0 | |
57 | #define CMD53_ARG_WRITE 1 | |
58 | #define CMD53_ARG_BLOCK_BASIS 1 | |
59 | #define CMD53_ARG_FIXED_ADDRESS 0 | |
60 | #define CMD53_ARG_INCR_ADDRESS 1 | |
61 | ||
62 | static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar) | |
63 | { | |
64 | return ar->hif_priv; | |
65 | } | |
66 | ||
67 | /* | |
68 | * Macro to check if DMA buffer is WORD-aligned and DMA-able. | |
69 | * Most host controllers assume the buffer is DMA'able and will | |
70 | * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid | |
71 | * check fails on stack memory. | |
72 | */ | |
73 | static inline bool buf_needs_bounce(u8 *buf) | |
74 | { | |
75 | return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf); | |
76 | } | |
77 | ||
78 | static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar) | |
79 | { | |
80 | struct ath6kl_mbox_info *mbox_info = &ar->mbox_info; | |
81 | ||
82 | /* EP1 has an extended range */ | |
83 | mbox_info->htc_addr = HIF_MBOX_BASE_ADDR; | |
84 | mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR; | |
85 | mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH; | |
86 | mbox_info->block_size = HIF_MBOX_BLOCK_SIZE; | |
87 | mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR; | |
88 | mbox_info->gmbox_sz = HIF_GMBOX_WIDTH; | |
89 | } | |
90 | ||
91 | static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func, | |
92 | u8 mode, u8 opcode, u32 addr, | |
93 | u16 blksz) | |
94 | { | |
95 | *arg = (((rw & 1) << 31) | | |
96 | ((func & 0x7) << 28) | | |
97 | ((mode & 1) << 27) | | |
98 | ((opcode & 1) << 26) | | |
99 | ((addr & 0x1FFFF) << 9) | | |
100 | (blksz & 0x1FF)); | |
101 | } | |
102 | ||
103 | static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw, | |
104 | unsigned int address, | |
105 | unsigned char val) | |
106 | { | |
107 | const u8 func = 0; | |
108 | ||
109 | *arg = ((write & 1) << 31) | | |
110 | ((func & 0x7) << 28) | | |
111 | ((raw & 1) << 27) | | |
112 | (1 << 26) | | |
113 | ((address & 0x1FFFF) << 9) | | |
114 | (1 << 8) | | |
115 | (val & 0xFF); | |
116 | } | |
117 | ||
118 | static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card, | |
119 | unsigned int address, | |
120 | unsigned char byte) | |
121 | { | |
122 | struct mmc_command io_cmd; | |
123 | ||
124 | memset(&io_cmd, 0, sizeof(io_cmd)); | |
125 | ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte); | |
126 | io_cmd.opcode = SD_IO_RW_DIRECT; | |
127 | io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC; | |
128 | ||
129 | return mmc_wait_for_cmd(card->host, &io_cmd, 0); | |
130 | } | |
131 | ||
da220695 VT |
132 | static int ath6kl_sdio_io(struct sdio_func *func, u32 request, u32 addr, |
133 | u8 *buf, u32 len) | |
134 | { | |
135 | int ret = 0; | |
136 | ||
137 | if (request & HIF_WRITE) { | |
f7325b85 | 138 | /* FIXME: looks like ugly workaround for something */ |
da220695 VT |
139 | if (addr >= HIF_MBOX_BASE_ADDR && |
140 | addr <= HIF_MBOX_END_ADDR) | |
141 | addr += (HIF_MBOX_WIDTH - len); | |
142 | ||
f7325b85 | 143 | /* FIXME: this also looks like ugly workaround */ |
da220695 VT |
144 | if (addr == HIF_MBOX0_EXT_BASE_ADDR) |
145 | addr += HIF_MBOX0_EXT_WIDTH - len; | |
146 | ||
147 | if (request & HIF_FIXED_ADDRESS) | |
148 | ret = sdio_writesb(func, addr, buf, len); | |
149 | else | |
150 | ret = sdio_memcpy_toio(func, addr, buf, len); | |
151 | } else { | |
152 | if (request & HIF_FIXED_ADDRESS) | |
153 | ret = sdio_readsb(func, buf, addr, len); | |
154 | else | |
155 | ret = sdio_memcpy_fromio(func, buf, addr, len); | |
156 | } | |
157 | ||
f7325b85 KV |
158 | ath6kl_dbg(ATH6KL_DBG_SDIO, "%s addr 0x%x%s buf 0x%p len %d\n", |
159 | request & HIF_WRITE ? "wr" : "rd", addr, | |
160 | request & HIF_FIXED_ADDRESS ? " (fixed)" : "", buf, len); | |
161 | ath6kl_dbg_dump(ATH6KL_DBG_SDIO_DUMP, NULL, "sdio ", buf, len); | |
162 | ||
da220695 VT |
163 | return ret; |
164 | } | |
165 | ||
bdcd8170 KV |
166 | static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio) |
167 | { | |
168 | struct bus_request *bus_req; | |
bdcd8170 | 169 | |
151bd30b | 170 | spin_lock_bh(&ar_sdio->lock); |
bdcd8170 KV |
171 | |
172 | if (list_empty(&ar_sdio->bus_req_freeq)) { | |
151bd30b | 173 | spin_unlock_bh(&ar_sdio->lock); |
bdcd8170 KV |
174 | return NULL; |
175 | } | |
176 | ||
177 | bus_req = list_first_entry(&ar_sdio->bus_req_freeq, | |
178 | struct bus_request, list); | |
179 | list_del(&bus_req->list); | |
180 | ||
151bd30b | 181 | spin_unlock_bh(&ar_sdio->lock); |
f7325b85 KV |
182 | ath6kl_dbg(ATH6KL_DBG_SCATTER, "%s: bus request 0x%p\n", |
183 | __func__, bus_req); | |
bdcd8170 KV |
184 | |
185 | return bus_req; | |
186 | } | |
187 | ||
188 | static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio, | |
189 | struct bus_request *bus_req) | |
190 | { | |
f7325b85 KV |
191 | ath6kl_dbg(ATH6KL_DBG_SCATTER, "%s: bus request 0x%p\n", |
192 | __func__, bus_req); | |
bdcd8170 | 193 | |
151bd30b | 194 | spin_lock_bh(&ar_sdio->lock); |
bdcd8170 | 195 | list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq); |
151bd30b | 196 | spin_unlock_bh(&ar_sdio->lock); |
bdcd8170 KV |
197 | } |
198 | ||
199 | static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req, | |
bdcd8170 KV |
200 | struct mmc_data *data) |
201 | { | |
202 | struct scatterlist *sg; | |
203 | int i; | |
204 | ||
205 | data->blksz = HIF_MBOX_BLOCK_SIZE; | |
206 | data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE; | |
207 | ||
208 | ath6kl_dbg(ATH6KL_DBG_SCATTER, | |
209 | "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n", | |
210 | (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr, | |
211 | data->blksz, data->blocks, scat_req->len, | |
212 | scat_req->scat_entries); | |
213 | ||
214 | data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE : | |
215 | MMC_DATA_READ; | |
216 | ||
217 | /* fill SG entries */ | |
d4df7890 | 218 | sg = scat_req->sgentries; |
bdcd8170 KV |
219 | sg_init_table(sg, scat_req->scat_entries); |
220 | ||
221 | /* assemble SG list */ | |
222 | for (i = 0; i < scat_req->scat_entries; i++, sg++) { | |
bdcd8170 KV |
223 | ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n", |
224 | i, scat_req->scat_list[i].buf, | |
225 | scat_req->scat_list[i].len); | |
226 | ||
227 | sg_set_buf(sg, scat_req->scat_list[i].buf, | |
228 | scat_req->scat_list[i].len); | |
229 | } | |
230 | ||
231 | /* set scatter-gather table for request */ | |
d4df7890 | 232 | data->sg = scat_req->sgentries; |
bdcd8170 KV |
233 | data->sg_len = scat_req->scat_entries; |
234 | } | |
235 | ||
236 | static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio, | |
237 | struct bus_request *req) | |
238 | { | |
239 | struct mmc_request mmc_req; | |
240 | struct mmc_command cmd; | |
241 | struct mmc_data data; | |
242 | struct hif_scatter_req *scat_req; | |
243 | u8 opcode, rw; | |
348a8fbc | 244 | int status, len; |
bdcd8170 KV |
245 | |
246 | scat_req = req->scat_req; | |
247 | ||
348a8fbc VT |
248 | if (scat_req->virt_scat) { |
249 | len = scat_req->len; | |
250 | if (scat_req->req & HIF_BLOCK_BASIS) | |
251 | len = round_down(len, HIF_MBOX_BLOCK_SIZE); | |
252 | ||
253 | status = ath6kl_sdio_io(ar_sdio->func, scat_req->req, | |
254 | scat_req->addr, scat_req->virt_dma_buf, | |
255 | len); | |
256 | goto scat_complete; | |
257 | } | |
258 | ||
bdcd8170 KV |
259 | memset(&mmc_req, 0, sizeof(struct mmc_request)); |
260 | memset(&cmd, 0, sizeof(struct mmc_command)); | |
261 | memset(&data, 0, sizeof(struct mmc_data)); | |
262 | ||
d4df7890 | 263 | ath6kl_sdio_setup_scat_data(scat_req, &data); |
bdcd8170 KV |
264 | |
265 | opcode = (scat_req->req & HIF_FIXED_ADDRESS) ? | |
266 | CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS; | |
267 | ||
268 | rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ; | |
269 | ||
270 | /* Fixup the address so that the last byte will fall on MBOX EOM */ | |
271 | if (scat_req->req & HIF_WRITE) { | |
272 | if (scat_req->addr == HIF_MBOX_BASE_ADDR) | |
273 | scat_req->addr += HIF_MBOX_WIDTH - scat_req->len; | |
274 | else | |
275 | /* Uses extended address range */ | |
276 | scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len; | |
277 | } | |
278 | ||
279 | /* set command argument */ | |
280 | ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num, | |
281 | CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr, | |
282 | data.blocks); | |
283 | ||
284 | cmd.opcode = SD_IO_RW_EXTENDED; | |
285 | cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC; | |
286 | ||
287 | mmc_req.cmd = &cmd; | |
288 | mmc_req.data = &data; | |
289 | ||
290 | mmc_set_data_timeout(&data, ar_sdio->func->card); | |
291 | /* synchronous call to process request */ | |
292 | mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req); | |
293 | ||
294 | status = cmd.error ? cmd.error : data.error; | |
348a8fbc VT |
295 | |
296 | scat_complete: | |
bdcd8170 KV |
297 | scat_req->status = status; |
298 | ||
299 | if (scat_req->status) | |
300 | ath6kl_err("Scatter write request failed:%d\n", | |
301 | scat_req->status); | |
302 | ||
303 | if (scat_req->req & HIF_ASYNCHRONOUS) | |
e041c7f9 | 304 | scat_req->complete(ar_sdio->ar->htc_target, scat_req); |
bdcd8170 KV |
305 | |
306 | return status; | |
307 | } | |
308 | ||
3df505ad VT |
309 | static int ath6kl_sdio_alloc_prep_scat_req(struct ath6kl_sdio *ar_sdio, |
310 | int n_scat_entry, int n_scat_req, | |
311 | bool virt_scat) | |
312 | { | |
313 | struct hif_scatter_req *s_req; | |
314 | struct bus_request *bus_req; | |
cfeab10b VT |
315 | int i, scat_req_sz, scat_list_sz, sg_sz, buf_sz; |
316 | u8 *virt_buf; | |
3df505ad VT |
317 | |
318 | scat_list_sz = (n_scat_entry - 1) * sizeof(struct hif_scatter_item); | |
319 | scat_req_sz = sizeof(*s_req) + scat_list_sz; | |
320 | ||
321 | if (!virt_scat) | |
322 | sg_sz = sizeof(struct scatterlist) * n_scat_entry; | |
cfeab10b VT |
323 | else |
324 | buf_sz = 2 * L1_CACHE_BYTES + | |
325 | ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER; | |
3df505ad VT |
326 | |
327 | for (i = 0; i < n_scat_req; i++) { | |
328 | /* allocate the scatter request */ | |
329 | s_req = kzalloc(scat_req_sz, GFP_KERNEL); | |
330 | if (!s_req) | |
331 | return -ENOMEM; | |
332 | ||
cfeab10b VT |
333 | if (virt_scat) { |
334 | virt_buf = kzalloc(buf_sz, GFP_KERNEL); | |
335 | if (!virt_buf) { | |
336 | kfree(s_req); | |
337 | return -ENOMEM; | |
338 | } | |
339 | ||
340 | s_req->virt_dma_buf = | |
341 | (u8 *)L1_CACHE_ALIGN((unsigned long)virt_buf); | |
342 | } else { | |
3df505ad VT |
343 | /* allocate sglist */ |
344 | s_req->sgentries = kzalloc(sg_sz, GFP_KERNEL); | |
345 | ||
346 | if (!s_req->sgentries) { | |
347 | kfree(s_req); | |
348 | return -ENOMEM; | |
349 | } | |
350 | } | |
351 | ||
352 | /* allocate a bus request for this scatter request */ | |
353 | bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); | |
354 | if (!bus_req) { | |
355 | kfree(s_req->sgentries); | |
cfeab10b | 356 | kfree(s_req->virt_dma_buf); |
3df505ad VT |
357 | kfree(s_req); |
358 | return -ENOMEM; | |
359 | } | |
360 | ||
361 | /* assign the scatter request to this bus request */ | |
362 | bus_req->scat_req = s_req; | |
363 | s_req->busrequest = bus_req; | |
364 | ||
4a005c3e VT |
365 | s_req->virt_scat = virt_scat; |
366 | ||
3df505ad VT |
367 | /* add it to the scatter pool */ |
368 | hif_scatter_req_add(ar_sdio->ar, s_req); | |
369 | } | |
370 | ||
371 | return 0; | |
372 | } | |
373 | ||
bdcd8170 KV |
374 | static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf, |
375 | u32 len, u32 request) | |
376 | { | |
377 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
378 | u8 *tbuf = NULL; | |
379 | int ret; | |
380 | bool bounced = false; | |
381 | ||
382 | if (request & HIF_BLOCK_BASIS) | |
383 | len = round_down(len, HIF_MBOX_BLOCK_SIZE); | |
384 | ||
385 | if (buf_needs_bounce(buf)) { | |
386 | if (!ar_sdio->dma_buffer) | |
387 | return -ENOMEM; | |
388 | tbuf = ar_sdio->dma_buffer; | |
389 | memcpy(tbuf, buf, len); | |
390 | bounced = true; | |
391 | } else | |
392 | tbuf = buf; | |
393 | ||
394 | sdio_claim_host(ar_sdio->func); | |
da220695 VT |
395 | ret = ath6kl_sdio_io(ar_sdio->func, request, addr, tbuf, len); |
396 | if ((request & HIF_READ) && bounced) | |
397 | memcpy(buf, tbuf, len); | |
bdcd8170 KV |
398 | sdio_release_host(ar_sdio->func); |
399 | ||
400 | return ret; | |
401 | } | |
402 | ||
403 | static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio, | |
404 | struct bus_request *req) | |
405 | { | |
406 | if (req->scat_req) | |
407 | ath6kl_sdio_scat_rw(ar_sdio, req); | |
408 | else { | |
409 | void *context; | |
410 | int status; | |
411 | ||
412 | status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address, | |
413 | req->buffer, req->length, | |
414 | req->request); | |
415 | context = req->packet; | |
416 | ath6kl_sdio_free_bus_req(ar_sdio, req); | |
417 | ath6kldev_rw_comp_handler(context, status); | |
418 | } | |
419 | } | |
420 | ||
421 | static void ath6kl_sdio_write_async_work(struct work_struct *work) | |
422 | { | |
423 | struct ath6kl_sdio *ar_sdio; | |
bdcd8170 KV |
424 | struct bus_request *req, *tmp_req; |
425 | ||
426 | ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work); | |
427 | sdio_claim_host(ar_sdio->func); | |
428 | ||
151bd30b | 429 | spin_lock_bh(&ar_sdio->wr_async_lock); |
bdcd8170 KV |
430 | list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) { |
431 | list_del(&req->list); | |
151bd30b | 432 | spin_unlock_bh(&ar_sdio->wr_async_lock); |
bdcd8170 | 433 | __ath6kl_sdio_write_async(ar_sdio, req); |
151bd30b | 434 | spin_lock_bh(&ar_sdio->wr_async_lock); |
bdcd8170 | 435 | } |
151bd30b | 436 | spin_unlock_bh(&ar_sdio->wr_async_lock); |
bdcd8170 KV |
437 | |
438 | sdio_release_host(ar_sdio->func); | |
439 | } | |
440 | ||
441 | static void ath6kl_sdio_irq_handler(struct sdio_func *func) | |
442 | { | |
443 | int status; | |
444 | struct ath6kl_sdio *ar_sdio; | |
445 | ||
f7325b85 KV |
446 | ath6kl_dbg(ATH6KL_DBG_SDIO, "irq\n"); |
447 | ||
bdcd8170 KV |
448 | ar_sdio = sdio_get_drvdata(func); |
449 | atomic_set(&ar_sdio->irq_handling, 1); | |
450 | ||
451 | /* | |
452 | * Release the host during interrups so we can pick it back up when | |
453 | * we process commands. | |
454 | */ | |
455 | sdio_release_host(ar_sdio->func); | |
456 | ||
457 | status = ath6kldev_intr_bh_handler(ar_sdio->ar); | |
458 | sdio_claim_host(ar_sdio->func); | |
459 | atomic_set(&ar_sdio->irq_handling, 0); | |
460 | WARN_ON(status && status != -ECANCELED); | |
461 | } | |
462 | ||
463 | static int ath6kl_sdio_power_on(struct ath6kl_sdio *ar_sdio) | |
464 | { | |
465 | struct sdio_func *func = ar_sdio->func; | |
466 | int ret = 0; | |
467 | ||
468 | if (!ar_sdio->is_disabled) | |
469 | return 0; | |
470 | ||
471 | sdio_claim_host(func); | |
472 | ||
473 | ret = sdio_enable_func(func); | |
474 | if (ret) { | |
475 | ath6kl_err("Unable to enable sdio func: %d)\n", ret); | |
476 | sdio_release_host(func); | |
477 | return ret; | |
478 | } | |
479 | ||
480 | sdio_release_host(func); | |
481 | ||
482 | /* | |
483 | * Wait for hardware to initialise. It should take a lot less than | |
484 | * 10 ms but let's be conservative here. | |
485 | */ | |
486 | msleep(10); | |
487 | ||
488 | ar_sdio->is_disabled = false; | |
489 | ||
490 | return ret; | |
491 | } | |
492 | ||
493 | static int ath6kl_sdio_power_off(struct ath6kl_sdio *ar_sdio) | |
494 | { | |
495 | int ret; | |
496 | ||
497 | if (ar_sdio->is_disabled) | |
498 | return 0; | |
499 | ||
500 | /* Disable the card */ | |
501 | sdio_claim_host(ar_sdio->func); | |
502 | ret = sdio_disable_func(ar_sdio->func); | |
503 | sdio_release_host(ar_sdio->func); | |
504 | ||
505 | if (ret) | |
506 | return ret; | |
507 | ||
508 | ar_sdio->is_disabled = true; | |
509 | ||
510 | return ret; | |
511 | } | |
512 | ||
513 | static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer, | |
514 | u32 length, u32 request, | |
515 | struct htc_packet *packet) | |
516 | { | |
517 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
518 | struct bus_request *bus_req; | |
bdcd8170 KV |
519 | |
520 | bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); | |
521 | ||
522 | if (!bus_req) | |
523 | return -ENOMEM; | |
524 | ||
525 | bus_req->address = address; | |
526 | bus_req->buffer = buffer; | |
527 | bus_req->length = length; | |
528 | bus_req->request = request; | |
529 | bus_req->packet = packet; | |
530 | ||
151bd30b | 531 | spin_lock_bh(&ar_sdio->wr_async_lock); |
bdcd8170 | 532 | list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq); |
151bd30b | 533 | spin_unlock_bh(&ar_sdio->wr_async_lock); |
bdcd8170 KV |
534 | queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work); |
535 | ||
536 | return 0; | |
537 | } | |
538 | ||
539 | static void ath6kl_sdio_irq_enable(struct ath6kl *ar) | |
540 | { | |
541 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
542 | int ret; | |
543 | ||
544 | sdio_claim_host(ar_sdio->func); | |
545 | ||
546 | /* Register the isr */ | |
547 | ret = sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler); | |
548 | if (ret) | |
549 | ath6kl_err("Failed to claim sdio irq: %d\n", ret); | |
550 | ||
551 | sdio_release_host(ar_sdio->func); | |
552 | } | |
553 | ||
554 | static void ath6kl_sdio_irq_disable(struct ath6kl *ar) | |
555 | { | |
556 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
557 | int ret; | |
558 | ||
559 | sdio_claim_host(ar_sdio->func); | |
560 | ||
561 | /* Mask our function IRQ */ | |
562 | while (atomic_read(&ar_sdio->irq_handling)) { | |
563 | sdio_release_host(ar_sdio->func); | |
564 | schedule_timeout(HZ / 10); | |
565 | sdio_claim_host(ar_sdio->func); | |
566 | } | |
567 | ||
568 | ret = sdio_release_irq(ar_sdio->func); | |
569 | if (ret) | |
570 | ath6kl_err("Failed to release sdio irq: %d\n", ret); | |
571 | ||
572 | sdio_release_host(ar_sdio->func); | |
573 | } | |
574 | ||
575 | static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar) | |
576 | { | |
577 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
578 | struct hif_scatter_req *node = NULL; | |
bdcd8170 | 579 | |
151bd30b | 580 | spin_lock_bh(&ar_sdio->scat_lock); |
bdcd8170 KV |
581 | |
582 | if (!list_empty(&ar_sdio->scat_req)) { | |
583 | node = list_first_entry(&ar_sdio->scat_req, | |
584 | struct hif_scatter_req, list); | |
585 | list_del(&node->list); | |
586 | } | |
587 | ||
151bd30b | 588 | spin_unlock_bh(&ar_sdio->scat_lock); |
bdcd8170 KV |
589 | |
590 | return node; | |
591 | } | |
592 | ||
593 | static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar, | |
594 | struct hif_scatter_req *s_req) | |
595 | { | |
596 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
bdcd8170 | 597 | |
151bd30b | 598 | spin_lock_bh(&ar_sdio->scat_lock); |
bdcd8170 KV |
599 | |
600 | list_add_tail(&s_req->list, &ar_sdio->scat_req); | |
601 | ||
151bd30b | 602 | spin_unlock_bh(&ar_sdio->scat_lock); |
bdcd8170 KV |
603 | |
604 | } | |
605 | ||
c630d18a VT |
606 | /* scatter gather read write request */ |
607 | static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar, | |
608 | struct hif_scatter_req *scat_req) | |
609 | { | |
610 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
c630d18a VT |
611 | u32 request = scat_req->req; |
612 | int status = 0; | |
c630d18a VT |
613 | |
614 | if (!scat_req->len) | |
615 | return -EINVAL; | |
616 | ||
617 | ath6kl_dbg(ATH6KL_DBG_SCATTER, | |
618 | "hif-scatter: total len: %d scatter entries: %d\n", | |
619 | scat_req->len, scat_req->scat_entries); | |
620 | ||
621 | if (request & HIF_SYNCHRONOUS) { | |
622 | sdio_claim_host(ar_sdio->func); | |
d4df7890 | 623 | status = ath6kl_sdio_scat_rw(ar_sdio, scat_req->busrequest); |
c630d18a VT |
624 | sdio_release_host(ar_sdio->func); |
625 | } else { | |
151bd30b | 626 | spin_lock_bh(&ar_sdio->wr_async_lock); |
d4df7890 | 627 | list_add_tail(&scat_req->busrequest->list, &ar_sdio->wr_asyncq); |
151bd30b | 628 | spin_unlock_bh(&ar_sdio->wr_async_lock); |
c630d18a VT |
629 | queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work); |
630 | } | |
631 | ||
632 | return status; | |
633 | } | |
634 | ||
18a0f93e VT |
635 | /* clean up scatter support */ |
636 | static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar) | |
637 | { | |
638 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
639 | struct hif_scatter_req *s_req, *tmp_req; | |
18a0f93e VT |
640 | |
641 | /* empty the free list */ | |
151bd30b | 642 | spin_lock_bh(&ar_sdio->scat_lock); |
18a0f93e VT |
643 | list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) { |
644 | list_del(&s_req->list); | |
151bd30b | 645 | spin_unlock_bh(&ar_sdio->scat_lock); |
18a0f93e VT |
646 | |
647 | if (s_req->busrequest) | |
648 | ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest); | |
649 | kfree(s_req->virt_dma_buf); | |
650 | kfree(s_req->sgentries); | |
651 | kfree(s_req); | |
652 | ||
151bd30b | 653 | spin_lock_bh(&ar_sdio->scat_lock); |
18a0f93e | 654 | } |
151bd30b | 655 | spin_unlock_bh(&ar_sdio->scat_lock); |
18a0f93e VT |
656 | } |
657 | ||
658 | /* setup of HIF scatter resources */ | |
50745af7 | 659 | static int ath6kl_sdio_enable_scatter(struct ath6kl *ar) |
18a0f93e VT |
660 | { |
661 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
50745af7 | 662 | struct htc_target *target = ar->htc_target; |
cfeab10b VT |
663 | int ret; |
664 | bool virt_scat = false; | |
18a0f93e VT |
665 | |
666 | /* check if host supports scatter and it meets our requirements */ | |
667 | if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) { | |
cfeab10b | 668 | ath6kl_err("host only supports scatter of :%d entries, need: %d\n", |
18a0f93e VT |
669 | ar_sdio->func->card->host->max_segs, |
670 | MAX_SCATTER_ENTRIES_PER_REQ); | |
cfeab10b | 671 | virt_scat = true; |
18a0f93e VT |
672 | } |
673 | ||
cfeab10b VT |
674 | if (!virt_scat) { |
675 | ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio, | |
676 | MAX_SCATTER_ENTRIES_PER_REQ, | |
677 | MAX_SCATTER_REQUESTS, virt_scat); | |
678 | ||
679 | if (!ret) { | |
f7325b85 | 680 | ath6kl_dbg(ATH6KL_DBG_SCATTER, |
cfeab10b VT |
681 | "hif-scatter enabled: max scatter req : %d entries: %d\n", |
682 | MAX_SCATTER_REQUESTS, | |
683 | MAX_SCATTER_ENTRIES_PER_REQ); | |
684 | ||
50745af7 VT |
685 | target->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ; |
686 | target->max_xfer_szper_scatreq = | |
cfeab10b VT |
687 | MAX_SCATTER_REQ_TRANSFER_SIZE; |
688 | } else { | |
689 | ath6kl_sdio_cleanup_scatter(ar); | |
690 | ath6kl_warn("hif scatter resource setup failed, trying virtual scatter method\n"); | |
691 | } | |
692 | } | |
18a0f93e | 693 | |
cfeab10b VT |
694 | if (virt_scat || ret) { |
695 | ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio, | |
696 | ATH6KL_SCATTER_ENTRIES_PER_REQ, | |
697 | ATH6KL_SCATTER_REQS, virt_scat); | |
698 | ||
699 | if (ret) { | |
700 | ath6kl_err("failed to alloc virtual scatter resources !\n"); | |
701 | ath6kl_sdio_cleanup_scatter(ar); | |
702 | return ret; | |
703 | } | |
704 | ||
f7325b85 | 705 | ath6kl_dbg(ATH6KL_DBG_SCATTER, |
cfeab10b VT |
706 | "Vitual scatter enabled, max_scat_req:%d, entries:%d\n", |
707 | ATH6KL_SCATTER_REQS, ATH6KL_SCATTER_ENTRIES_PER_REQ); | |
708 | ||
50745af7 VT |
709 | target->max_scat_entries = ATH6KL_SCATTER_ENTRIES_PER_REQ; |
710 | target->max_xfer_szper_scatreq = | |
cfeab10b | 711 | ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER; |
18a0f93e VT |
712 | } |
713 | ||
18a0f93e VT |
714 | return 0; |
715 | } | |
716 | ||
abcb344b KV |
717 | static int ath6kl_sdio_suspend(struct ath6kl *ar) |
718 | { | |
719 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
720 | struct sdio_func *func = ar_sdio->func; | |
721 | mmc_pm_flag_t flags; | |
722 | int ret; | |
723 | ||
724 | flags = sdio_get_host_pm_caps(func); | |
725 | ||
726 | if (!(flags & MMC_PM_KEEP_POWER)) | |
727 | /* as host doesn't support keep power we need to bail out */ | |
f7325b85 KV |
728 | ath6kl_dbg(ATH6KL_DBG_SDIO, |
729 | "func %d doesn't support MMC_PM_KEEP_POWER\n", | |
730 | func->num); | |
abcb344b KV |
731 | return -EINVAL; |
732 | ||
733 | ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); | |
734 | if (ret) { | |
735 | printk(KERN_ERR "ath6kl: set sdio pm flags failed: %d\n", | |
736 | ret); | |
737 | return ret; | |
738 | } | |
739 | ||
740 | ath6kl_deep_sleep_enable(ar); | |
741 | ||
742 | return 0; | |
743 | } | |
744 | ||
bdcd8170 KV |
745 | static const struct ath6kl_hif_ops ath6kl_sdio_ops = { |
746 | .read_write_sync = ath6kl_sdio_read_write_sync, | |
747 | .write_async = ath6kl_sdio_write_async, | |
748 | .irq_enable = ath6kl_sdio_irq_enable, | |
749 | .irq_disable = ath6kl_sdio_irq_disable, | |
750 | .scatter_req_get = ath6kl_sdio_scatter_req_get, | |
751 | .scatter_req_add = ath6kl_sdio_scatter_req_add, | |
752 | .enable_scatter = ath6kl_sdio_enable_scatter, | |
f74a7361 | 753 | .scat_req_rw = ath6kl_sdio_async_rw_scatter, |
bdcd8170 | 754 | .cleanup_scatter = ath6kl_sdio_cleanup_scatter, |
abcb344b | 755 | .suspend = ath6kl_sdio_suspend, |
bdcd8170 KV |
756 | }; |
757 | ||
758 | static int ath6kl_sdio_probe(struct sdio_func *func, | |
759 | const struct sdio_device_id *id) | |
760 | { | |
761 | int ret; | |
762 | struct ath6kl_sdio *ar_sdio; | |
763 | struct ath6kl *ar; | |
764 | int count; | |
765 | ||
f7325b85 KV |
766 | ath6kl_dbg(ATH6KL_DBG_SDIO, |
767 | "new func %d vendor 0x%x device 0x%x block 0x%x/0x%x\n", | |
768 | func->num, func->vendor, func->device, | |
769 | func->max_blksize, func->cur_blksize); | |
bdcd8170 KV |
770 | |
771 | ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL); | |
772 | if (!ar_sdio) | |
773 | return -ENOMEM; | |
774 | ||
775 | ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL); | |
776 | if (!ar_sdio->dma_buffer) { | |
777 | ret = -ENOMEM; | |
778 | goto err_hif; | |
779 | } | |
780 | ||
781 | ar_sdio->func = func; | |
782 | sdio_set_drvdata(func, ar_sdio); | |
783 | ||
784 | ar_sdio->id = id; | |
785 | ar_sdio->is_disabled = true; | |
786 | ||
787 | spin_lock_init(&ar_sdio->lock); | |
788 | spin_lock_init(&ar_sdio->scat_lock); | |
789 | spin_lock_init(&ar_sdio->wr_async_lock); | |
790 | ||
791 | INIT_LIST_HEAD(&ar_sdio->scat_req); | |
792 | INIT_LIST_HEAD(&ar_sdio->bus_req_freeq); | |
793 | INIT_LIST_HEAD(&ar_sdio->wr_asyncq); | |
794 | ||
795 | INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work); | |
796 | ||
797 | for (count = 0; count < BUS_REQUEST_MAX_NUM; count++) | |
798 | ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]); | |
799 | ||
800 | ar = ath6kl_core_alloc(&ar_sdio->func->dev); | |
801 | if (!ar) { | |
802 | ath6kl_err("Failed to alloc ath6kl core\n"); | |
803 | ret = -ENOMEM; | |
804 | goto err_dma; | |
805 | } | |
806 | ||
807 | ar_sdio->ar = ar; | |
808 | ar->hif_priv = ar_sdio; | |
809 | ar->hif_ops = &ath6kl_sdio_ops; | |
810 | ||
811 | ath6kl_sdio_set_mbox_info(ar); | |
812 | ||
813 | sdio_claim_host(func); | |
814 | ||
815 | if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >= | |
816 | MANUFACTURER_ID_AR6003_BASE) { | |
817 | /* enable 4-bit ASYNC interrupt on AR6003 or later */ | |
818 | ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card, | |
819 | CCCR_SDIO_IRQ_MODE_REG, | |
820 | SDIO_IRQ_MODE_ASYNC_4BIT_IRQ); | |
821 | if (ret) { | |
822 | ath6kl_err("Failed to enable 4-bit async irq mode %d\n", | |
823 | ret); | |
824 | sdio_release_host(func); | |
9df337a1 | 825 | goto err_cfg80211; |
bdcd8170 KV |
826 | } |
827 | ||
f7325b85 | 828 | ath6kl_dbg(ATH6KL_DBG_SDIO, "4-bit async irq mode enabled\n"); |
bdcd8170 KV |
829 | } |
830 | ||
831 | /* give us some time to enable, in ms */ | |
832 | func->enable_timeout = 100; | |
833 | ||
834 | sdio_release_host(func); | |
835 | ||
836 | ret = ath6kl_sdio_power_on(ar_sdio); | |
837 | if (ret) | |
9df337a1 | 838 | goto err_cfg80211; |
bdcd8170 KV |
839 | |
840 | sdio_claim_host(func); | |
841 | ||
842 | ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE); | |
843 | if (ret) { | |
844 | ath6kl_err("Set sdio block size %d failed: %d)\n", | |
845 | HIF_MBOX_BLOCK_SIZE, ret); | |
846 | sdio_release_host(func); | |
847 | goto err_off; | |
848 | } | |
849 | ||
850 | sdio_release_host(func); | |
851 | ||
852 | ret = ath6kl_core_init(ar); | |
853 | if (ret) { | |
854 | ath6kl_err("Failed to init ath6kl core\n"); | |
855 | goto err_off; | |
856 | } | |
857 | ||
858 | return ret; | |
859 | ||
860 | err_off: | |
861 | ath6kl_sdio_power_off(ar_sdio); | |
9df337a1 VN |
862 | err_cfg80211: |
863 | ath6kl_cfg80211_deinit(ar_sdio->ar); | |
bdcd8170 KV |
864 | err_dma: |
865 | kfree(ar_sdio->dma_buffer); | |
866 | err_hif: | |
867 | kfree(ar_sdio); | |
868 | ||
869 | return ret; | |
870 | } | |
871 | ||
872 | static void ath6kl_sdio_remove(struct sdio_func *func) | |
873 | { | |
874 | struct ath6kl_sdio *ar_sdio; | |
875 | ||
f7325b85 KV |
876 | ath6kl_dbg(ATH6KL_DBG_SDIO, |
877 | "removed func %d vendor 0x%x device 0x%x\n", | |
878 | func->num, func->vendor, func->device); | |
879 | ||
bdcd8170 KV |
880 | ar_sdio = sdio_get_drvdata(func); |
881 | ||
882 | ath6kl_stop_txrx(ar_sdio->ar); | |
883 | cancel_work_sync(&ar_sdio->wr_async_work); | |
884 | ||
885 | ath6kl_unavail_ev(ar_sdio->ar); | |
886 | ||
887 | ath6kl_sdio_power_off(ar_sdio); | |
888 | ||
889 | kfree(ar_sdio->dma_buffer); | |
890 | kfree(ar_sdio); | |
891 | } | |
892 | ||
893 | static const struct sdio_device_id ath6kl_sdio_devices[] = { | |
894 | {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))}, | |
895 | {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))}, | |
896 | {}, | |
897 | }; | |
898 | ||
899 | MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices); | |
900 | ||
901 | static struct sdio_driver ath6kl_sdio_driver = { | |
902 | .name = "ath6kl_sdio", | |
903 | .id_table = ath6kl_sdio_devices, | |
904 | .probe = ath6kl_sdio_probe, | |
905 | .remove = ath6kl_sdio_remove, | |
906 | }; | |
907 | ||
908 | static int __init ath6kl_sdio_init(void) | |
909 | { | |
910 | int ret; | |
911 | ||
912 | ret = sdio_register_driver(&ath6kl_sdio_driver); | |
913 | if (ret) | |
914 | ath6kl_err("sdio driver registration failed: %d\n", ret); | |
915 | ||
916 | return ret; | |
917 | } | |
918 | ||
919 | static void __exit ath6kl_sdio_exit(void) | |
920 | { | |
921 | sdio_unregister_driver(&ath6kl_sdio_driver); | |
922 | } | |
923 | ||
924 | module_init(ath6kl_sdio_init); | |
925 | module_exit(ath6kl_sdio_exit); | |
926 | ||
927 | MODULE_AUTHOR("Atheros Communications, Inc."); | |
928 | MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices"); | |
929 | MODULE_LICENSE("Dual BSD/GPL"); | |
930 | ||
931 | MODULE_FIRMWARE(AR6003_REV2_OTP_FILE); | |
932 | MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE); | |
933 | MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE); | |
934 | MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE); | |
935 | MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE); | |
936 | MODULE_FIRMWARE(AR6003_REV3_OTP_FILE); | |
937 | MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE); | |
938 | MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE); | |
939 | MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE); | |
940 | MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE); |