Commit | Line | Data |
---|---|---|
bdcd8170 KV |
1 | /* |
2 | * Copyright (c) 2004-2011 Atheros Communications Inc. | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #include <linux/mmc/card.h> | |
18 | #include <linux/mmc/mmc.h> | |
19 | #include <linux/mmc/host.h> | |
20 | #include <linux/mmc/sdio_func.h> | |
21 | #include <linux/mmc/sdio_ids.h> | |
22 | #include <linux/mmc/sdio.h> | |
23 | #include <linux/mmc/sd.h> | |
2e1cb23c | 24 | #include "hif.h" |
bdcd8170 KV |
25 | #include "hif-ops.h" |
26 | #include "target.h" | |
27 | #include "debug.h" | |
9df337a1 | 28 | #include "cfg80211.h" |
bdcd8170 KV |
29 | |
30 | struct ath6kl_sdio { | |
31 | struct sdio_func *func; | |
32 | ||
33 | spinlock_t lock; | |
34 | ||
35 | /* free list */ | |
36 | struct list_head bus_req_freeq; | |
37 | ||
38 | /* available bus requests */ | |
39 | struct bus_request bus_req[BUS_REQUEST_MAX_NUM]; | |
40 | ||
41 | struct ath6kl *ar; | |
42 | u8 *dma_buffer; | |
43 | ||
44 | /* scatter request list head */ | |
45 | struct list_head scat_req; | |
46 | ||
47 | spinlock_t scat_lock; | |
32a07e44 KV |
48 | bool scatter_enabled; |
49 | ||
bdcd8170 KV |
50 | bool is_disabled; |
51 | atomic_t irq_handling; | |
52 | const struct sdio_device_id *id; | |
53 | struct work_struct wr_async_work; | |
54 | struct list_head wr_asyncq; | |
55 | spinlock_t wr_async_lock; | |
56 | }; | |
57 | ||
58 | #define CMD53_ARG_READ 0 | |
59 | #define CMD53_ARG_WRITE 1 | |
60 | #define CMD53_ARG_BLOCK_BASIS 1 | |
61 | #define CMD53_ARG_FIXED_ADDRESS 0 | |
62 | #define CMD53_ARG_INCR_ADDRESS 1 | |
63 | ||
64 | static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar) | |
65 | { | |
66 | return ar->hif_priv; | |
67 | } | |
68 | ||
69 | /* | |
70 | * Macro to check if DMA buffer is WORD-aligned and DMA-able. | |
71 | * Most host controllers assume the buffer is DMA'able and will | |
72 | * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid | |
73 | * check fails on stack memory. | |
74 | */ | |
75 | static inline bool buf_needs_bounce(u8 *buf) | |
76 | { | |
77 | return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf); | |
78 | } | |
79 | ||
80 | static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar) | |
81 | { | |
82 | struct ath6kl_mbox_info *mbox_info = &ar->mbox_info; | |
83 | ||
84 | /* EP1 has an extended range */ | |
85 | mbox_info->htc_addr = HIF_MBOX_BASE_ADDR; | |
86 | mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR; | |
87 | mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH; | |
88 | mbox_info->block_size = HIF_MBOX_BLOCK_SIZE; | |
89 | mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR; | |
90 | mbox_info->gmbox_sz = HIF_GMBOX_WIDTH; | |
91 | } | |
92 | ||
93 | static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func, | |
94 | u8 mode, u8 opcode, u32 addr, | |
95 | u16 blksz) | |
96 | { | |
97 | *arg = (((rw & 1) << 31) | | |
98 | ((func & 0x7) << 28) | | |
99 | ((mode & 1) << 27) | | |
100 | ((opcode & 1) << 26) | | |
101 | ((addr & 0x1FFFF) << 9) | | |
102 | (blksz & 0x1FF)); | |
103 | } | |
104 | ||
105 | static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw, | |
106 | unsigned int address, | |
107 | unsigned char val) | |
108 | { | |
109 | const u8 func = 0; | |
110 | ||
111 | *arg = ((write & 1) << 31) | | |
112 | ((func & 0x7) << 28) | | |
113 | ((raw & 1) << 27) | | |
114 | (1 << 26) | | |
115 | ((address & 0x1FFFF) << 9) | | |
116 | (1 << 8) | | |
117 | (val & 0xFF); | |
118 | } | |
119 | ||
120 | static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card, | |
121 | unsigned int address, | |
122 | unsigned char byte) | |
123 | { | |
124 | struct mmc_command io_cmd; | |
125 | ||
126 | memset(&io_cmd, 0, sizeof(io_cmd)); | |
127 | ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte); | |
128 | io_cmd.opcode = SD_IO_RW_DIRECT; | |
129 | io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC; | |
130 | ||
131 | return mmc_wait_for_cmd(card->host, &io_cmd, 0); | |
132 | } | |
133 | ||
da220695 VT |
134 | static int ath6kl_sdio_io(struct sdio_func *func, u32 request, u32 addr, |
135 | u8 *buf, u32 len) | |
136 | { | |
137 | int ret = 0; | |
138 | ||
861dd058 VT |
139 | sdio_claim_host(func); |
140 | ||
da220695 | 141 | if (request & HIF_WRITE) { |
f7325b85 | 142 | /* FIXME: looks like ugly workaround for something */ |
da220695 VT |
143 | if (addr >= HIF_MBOX_BASE_ADDR && |
144 | addr <= HIF_MBOX_END_ADDR) | |
145 | addr += (HIF_MBOX_WIDTH - len); | |
146 | ||
f7325b85 | 147 | /* FIXME: this also looks like ugly workaround */ |
da220695 VT |
148 | if (addr == HIF_MBOX0_EXT_BASE_ADDR) |
149 | addr += HIF_MBOX0_EXT_WIDTH - len; | |
150 | ||
151 | if (request & HIF_FIXED_ADDRESS) | |
152 | ret = sdio_writesb(func, addr, buf, len); | |
153 | else | |
154 | ret = sdio_memcpy_toio(func, addr, buf, len); | |
155 | } else { | |
156 | if (request & HIF_FIXED_ADDRESS) | |
157 | ret = sdio_readsb(func, buf, addr, len); | |
158 | else | |
159 | ret = sdio_memcpy_fromio(func, buf, addr, len); | |
160 | } | |
161 | ||
861dd058 VT |
162 | sdio_release_host(func); |
163 | ||
f7325b85 KV |
164 | ath6kl_dbg(ATH6KL_DBG_SDIO, "%s addr 0x%x%s buf 0x%p len %d\n", |
165 | request & HIF_WRITE ? "wr" : "rd", addr, | |
166 | request & HIF_FIXED_ADDRESS ? " (fixed)" : "", buf, len); | |
167 | ath6kl_dbg_dump(ATH6KL_DBG_SDIO_DUMP, NULL, "sdio ", buf, len); | |
168 | ||
da220695 VT |
169 | return ret; |
170 | } | |
171 | ||
bdcd8170 KV |
172 | static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio) |
173 | { | |
174 | struct bus_request *bus_req; | |
bdcd8170 | 175 | |
151bd30b | 176 | spin_lock_bh(&ar_sdio->lock); |
bdcd8170 KV |
177 | |
178 | if (list_empty(&ar_sdio->bus_req_freeq)) { | |
151bd30b | 179 | spin_unlock_bh(&ar_sdio->lock); |
bdcd8170 KV |
180 | return NULL; |
181 | } | |
182 | ||
183 | bus_req = list_first_entry(&ar_sdio->bus_req_freeq, | |
184 | struct bus_request, list); | |
185 | list_del(&bus_req->list); | |
186 | ||
151bd30b | 187 | spin_unlock_bh(&ar_sdio->lock); |
f7325b85 KV |
188 | ath6kl_dbg(ATH6KL_DBG_SCATTER, "%s: bus request 0x%p\n", |
189 | __func__, bus_req); | |
bdcd8170 KV |
190 | |
191 | return bus_req; | |
192 | } | |
193 | ||
194 | static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio, | |
195 | struct bus_request *bus_req) | |
196 | { | |
f7325b85 KV |
197 | ath6kl_dbg(ATH6KL_DBG_SCATTER, "%s: bus request 0x%p\n", |
198 | __func__, bus_req); | |
bdcd8170 | 199 | |
151bd30b | 200 | spin_lock_bh(&ar_sdio->lock); |
bdcd8170 | 201 | list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq); |
151bd30b | 202 | spin_unlock_bh(&ar_sdio->lock); |
bdcd8170 KV |
203 | } |
204 | ||
205 | static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req, | |
bdcd8170 KV |
206 | struct mmc_data *data) |
207 | { | |
208 | struct scatterlist *sg; | |
209 | int i; | |
210 | ||
211 | data->blksz = HIF_MBOX_BLOCK_SIZE; | |
212 | data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE; | |
213 | ||
214 | ath6kl_dbg(ATH6KL_DBG_SCATTER, | |
215 | "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n", | |
216 | (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr, | |
217 | data->blksz, data->blocks, scat_req->len, | |
218 | scat_req->scat_entries); | |
219 | ||
220 | data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE : | |
221 | MMC_DATA_READ; | |
222 | ||
223 | /* fill SG entries */ | |
d4df7890 | 224 | sg = scat_req->sgentries; |
bdcd8170 KV |
225 | sg_init_table(sg, scat_req->scat_entries); |
226 | ||
227 | /* assemble SG list */ | |
228 | for (i = 0; i < scat_req->scat_entries; i++, sg++) { | |
bdcd8170 KV |
229 | ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n", |
230 | i, scat_req->scat_list[i].buf, | |
231 | scat_req->scat_list[i].len); | |
232 | ||
233 | sg_set_buf(sg, scat_req->scat_list[i].buf, | |
234 | scat_req->scat_list[i].len); | |
235 | } | |
236 | ||
237 | /* set scatter-gather table for request */ | |
d4df7890 | 238 | data->sg = scat_req->sgentries; |
bdcd8170 KV |
239 | data->sg_len = scat_req->scat_entries; |
240 | } | |
241 | ||
242 | static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio, | |
243 | struct bus_request *req) | |
244 | { | |
245 | struct mmc_request mmc_req; | |
246 | struct mmc_command cmd; | |
247 | struct mmc_data data; | |
248 | struct hif_scatter_req *scat_req; | |
249 | u8 opcode, rw; | |
348a8fbc | 250 | int status, len; |
bdcd8170 KV |
251 | |
252 | scat_req = req->scat_req; | |
253 | ||
348a8fbc VT |
254 | if (scat_req->virt_scat) { |
255 | len = scat_req->len; | |
256 | if (scat_req->req & HIF_BLOCK_BASIS) | |
257 | len = round_down(len, HIF_MBOX_BLOCK_SIZE); | |
258 | ||
259 | status = ath6kl_sdio_io(ar_sdio->func, scat_req->req, | |
260 | scat_req->addr, scat_req->virt_dma_buf, | |
261 | len); | |
262 | goto scat_complete; | |
263 | } | |
264 | ||
bdcd8170 KV |
265 | memset(&mmc_req, 0, sizeof(struct mmc_request)); |
266 | memset(&cmd, 0, sizeof(struct mmc_command)); | |
267 | memset(&data, 0, sizeof(struct mmc_data)); | |
268 | ||
d4df7890 | 269 | ath6kl_sdio_setup_scat_data(scat_req, &data); |
bdcd8170 KV |
270 | |
271 | opcode = (scat_req->req & HIF_FIXED_ADDRESS) ? | |
272 | CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS; | |
273 | ||
274 | rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ; | |
275 | ||
276 | /* Fixup the address so that the last byte will fall on MBOX EOM */ | |
277 | if (scat_req->req & HIF_WRITE) { | |
278 | if (scat_req->addr == HIF_MBOX_BASE_ADDR) | |
279 | scat_req->addr += HIF_MBOX_WIDTH - scat_req->len; | |
280 | else | |
281 | /* Uses extended address range */ | |
282 | scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len; | |
283 | } | |
284 | ||
285 | /* set command argument */ | |
286 | ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num, | |
287 | CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr, | |
288 | data.blocks); | |
289 | ||
290 | cmd.opcode = SD_IO_RW_EXTENDED; | |
291 | cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC; | |
292 | ||
293 | mmc_req.cmd = &cmd; | |
294 | mmc_req.data = &data; | |
295 | ||
861dd058 VT |
296 | sdio_claim_host(ar_sdio->func); |
297 | ||
bdcd8170 KV |
298 | mmc_set_data_timeout(&data, ar_sdio->func->card); |
299 | /* synchronous call to process request */ | |
300 | mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req); | |
301 | ||
861dd058 VT |
302 | sdio_release_host(ar_sdio->func); |
303 | ||
bdcd8170 | 304 | status = cmd.error ? cmd.error : data.error; |
348a8fbc VT |
305 | |
306 | scat_complete: | |
bdcd8170 KV |
307 | scat_req->status = status; |
308 | ||
309 | if (scat_req->status) | |
310 | ath6kl_err("Scatter write request failed:%d\n", | |
311 | scat_req->status); | |
312 | ||
313 | if (scat_req->req & HIF_ASYNCHRONOUS) | |
e041c7f9 | 314 | scat_req->complete(ar_sdio->ar->htc_target, scat_req); |
bdcd8170 KV |
315 | |
316 | return status; | |
317 | } | |
318 | ||
3df505ad VT |
319 | static int ath6kl_sdio_alloc_prep_scat_req(struct ath6kl_sdio *ar_sdio, |
320 | int n_scat_entry, int n_scat_req, | |
321 | bool virt_scat) | |
322 | { | |
323 | struct hif_scatter_req *s_req; | |
324 | struct bus_request *bus_req; | |
cfeab10b VT |
325 | int i, scat_req_sz, scat_list_sz, sg_sz, buf_sz; |
326 | u8 *virt_buf; | |
3df505ad VT |
327 | |
328 | scat_list_sz = (n_scat_entry - 1) * sizeof(struct hif_scatter_item); | |
329 | scat_req_sz = sizeof(*s_req) + scat_list_sz; | |
330 | ||
331 | if (!virt_scat) | |
332 | sg_sz = sizeof(struct scatterlist) * n_scat_entry; | |
cfeab10b VT |
333 | else |
334 | buf_sz = 2 * L1_CACHE_BYTES + | |
335 | ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER; | |
3df505ad VT |
336 | |
337 | for (i = 0; i < n_scat_req; i++) { | |
338 | /* allocate the scatter request */ | |
339 | s_req = kzalloc(scat_req_sz, GFP_KERNEL); | |
340 | if (!s_req) | |
341 | return -ENOMEM; | |
342 | ||
cfeab10b VT |
343 | if (virt_scat) { |
344 | virt_buf = kzalloc(buf_sz, GFP_KERNEL); | |
345 | if (!virt_buf) { | |
346 | kfree(s_req); | |
347 | return -ENOMEM; | |
348 | } | |
349 | ||
350 | s_req->virt_dma_buf = | |
351 | (u8 *)L1_CACHE_ALIGN((unsigned long)virt_buf); | |
352 | } else { | |
3df505ad VT |
353 | /* allocate sglist */ |
354 | s_req->sgentries = kzalloc(sg_sz, GFP_KERNEL); | |
355 | ||
356 | if (!s_req->sgentries) { | |
357 | kfree(s_req); | |
358 | return -ENOMEM; | |
359 | } | |
360 | } | |
361 | ||
362 | /* allocate a bus request for this scatter request */ | |
363 | bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); | |
364 | if (!bus_req) { | |
365 | kfree(s_req->sgentries); | |
cfeab10b | 366 | kfree(s_req->virt_dma_buf); |
3df505ad VT |
367 | kfree(s_req); |
368 | return -ENOMEM; | |
369 | } | |
370 | ||
371 | /* assign the scatter request to this bus request */ | |
372 | bus_req->scat_req = s_req; | |
373 | s_req->busrequest = bus_req; | |
374 | ||
4a005c3e VT |
375 | s_req->virt_scat = virt_scat; |
376 | ||
3df505ad VT |
377 | /* add it to the scatter pool */ |
378 | hif_scatter_req_add(ar_sdio->ar, s_req); | |
379 | } | |
380 | ||
381 | return 0; | |
382 | } | |
383 | ||
bdcd8170 KV |
384 | static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf, |
385 | u32 len, u32 request) | |
386 | { | |
387 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
388 | u8 *tbuf = NULL; | |
389 | int ret; | |
390 | bool bounced = false; | |
391 | ||
392 | if (request & HIF_BLOCK_BASIS) | |
393 | len = round_down(len, HIF_MBOX_BLOCK_SIZE); | |
394 | ||
395 | if (buf_needs_bounce(buf)) { | |
396 | if (!ar_sdio->dma_buffer) | |
397 | return -ENOMEM; | |
398 | tbuf = ar_sdio->dma_buffer; | |
399 | memcpy(tbuf, buf, len); | |
400 | bounced = true; | |
401 | } else | |
402 | tbuf = buf; | |
403 | ||
da220695 VT |
404 | ret = ath6kl_sdio_io(ar_sdio->func, request, addr, tbuf, len); |
405 | if ((request & HIF_READ) && bounced) | |
406 | memcpy(buf, tbuf, len); | |
bdcd8170 KV |
407 | |
408 | return ret; | |
409 | } | |
410 | ||
411 | static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio, | |
412 | struct bus_request *req) | |
413 | { | |
414 | if (req->scat_req) | |
415 | ath6kl_sdio_scat_rw(ar_sdio, req); | |
416 | else { | |
417 | void *context; | |
418 | int status; | |
419 | ||
420 | status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address, | |
421 | req->buffer, req->length, | |
422 | req->request); | |
423 | context = req->packet; | |
424 | ath6kl_sdio_free_bus_req(ar_sdio, req); | |
8e8ddb2b | 425 | ath6kl_hif_rw_comp_handler(context, status); |
bdcd8170 KV |
426 | } |
427 | } | |
428 | ||
429 | static void ath6kl_sdio_write_async_work(struct work_struct *work) | |
430 | { | |
431 | struct ath6kl_sdio *ar_sdio; | |
bdcd8170 KV |
432 | struct bus_request *req, *tmp_req; |
433 | ||
434 | ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work); | |
bdcd8170 | 435 | |
151bd30b | 436 | spin_lock_bh(&ar_sdio->wr_async_lock); |
bdcd8170 KV |
437 | list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) { |
438 | list_del(&req->list); | |
151bd30b | 439 | spin_unlock_bh(&ar_sdio->wr_async_lock); |
bdcd8170 | 440 | __ath6kl_sdio_write_async(ar_sdio, req); |
151bd30b | 441 | spin_lock_bh(&ar_sdio->wr_async_lock); |
bdcd8170 | 442 | } |
151bd30b | 443 | spin_unlock_bh(&ar_sdio->wr_async_lock); |
bdcd8170 KV |
444 | } |
445 | ||
446 | static void ath6kl_sdio_irq_handler(struct sdio_func *func) | |
447 | { | |
448 | int status; | |
449 | struct ath6kl_sdio *ar_sdio; | |
450 | ||
f7325b85 KV |
451 | ath6kl_dbg(ATH6KL_DBG_SDIO, "irq\n"); |
452 | ||
bdcd8170 KV |
453 | ar_sdio = sdio_get_drvdata(func); |
454 | atomic_set(&ar_sdio->irq_handling, 1); | |
455 | ||
456 | /* | |
457 | * Release the host during interrups so we can pick it back up when | |
458 | * we process commands. | |
459 | */ | |
460 | sdio_release_host(ar_sdio->func); | |
461 | ||
8e8ddb2b | 462 | status = ath6kl_hif_intr_bh_handler(ar_sdio->ar); |
bdcd8170 KV |
463 | sdio_claim_host(ar_sdio->func); |
464 | atomic_set(&ar_sdio->irq_handling, 0); | |
465 | WARN_ON(status && status != -ECANCELED); | |
466 | } | |
467 | ||
b2e75698 | 468 | static int ath6kl_sdio_power_on(struct ath6kl *ar) |
bdcd8170 | 469 | { |
b2e75698 | 470 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); |
bdcd8170 KV |
471 | struct sdio_func *func = ar_sdio->func; |
472 | int ret = 0; | |
473 | ||
474 | if (!ar_sdio->is_disabled) | |
475 | return 0; | |
476 | ||
3ef987be KV |
477 | ath6kl_dbg(ATH6KL_DBG_BOOT, "sdio power on\n"); |
478 | ||
bdcd8170 KV |
479 | sdio_claim_host(func); |
480 | ||
481 | ret = sdio_enable_func(func); | |
482 | if (ret) { | |
483 | ath6kl_err("Unable to enable sdio func: %d)\n", ret); | |
484 | sdio_release_host(func); | |
485 | return ret; | |
486 | } | |
487 | ||
488 | sdio_release_host(func); | |
489 | ||
490 | /* | |
491 | * Wait for hardware to initialise. It should take a lot less than | |
492 | * 10 ms but let's be conservative here. | |
493 | */ | |
494 | msleep(10); | |
495 | ||
496 | ar_sdio->is_disabled = false; | |
497 | ||
498 | return ret; | |
499 | } | |
500 | ||
b2e75698 | 501 | static int ath6kl_sdio_power_off(struct ath6kl *ar) |
bdcd8170 | 502 | { |
b2e75698 | 503 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); |
bdcd8170 KV |
504 | int ret; |
505 | ||
506 | if (ar_sdio->is_disabled) | |
507 | return 0; | |
508 | ||
3ef987be KV |
509 | ath6kl_dbg(ATH6KL_DBG_BOOT, "sdio power off\n"); |
510 | ||
bdcd8170 KV |
511 | /* Disable the card */ |
512 | sdio_claim_host(ar_sdio->func); | |
513 | ret = sdio_disable_func(ar_sdio->func); | |
514 | sdio_release_host(ar_sdio->func); | |
515 | ||
516 | if (ret) | |
517 | return ret; | |
518 | ||
519 | ar_sdio->is_disabled = true; | |
520 | ||
521 | return ret; | |
522 | } | |
523 | ||
524 | static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer, | |
525 | u32 length, u32 request, | |
526 | struct htc_packet *packet) | |
527 | { | |
528 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
529 | struct bus_request *bus_req; | |
bdcd8170 KV |
530 | |
531 | bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); | |
532 | ||
533 | if (!bus_req) | |
534 | return -ENOMEM; | |
535 | ||
536 | bus_req->address = address; | |
537 | bus_req->buffer = buffer; | |
538 | bus_req->length = length; | |
539 | bus_req->request = request; | |
540 | bus_req->packet = packet; | |
541 | ||
151bd30b | 542 | spin_lock_bh(&ar_sdio->wr_async_lock); |
bdcd8170 | 543 | list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq); |
151bd30b | 544 | spin_unlock_bh(&ar_sdio->wr_async_lock); |
bdcd8170 KV |
545 | queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work); |
546 | ||
547 | return 0; | |
548 | } | |
549 | ||
550 | static void ath6kl_sdio_irq_enable(struct ath6kl *ar) | |
551 | { | |
552 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
553 | int ret; | |
554 | ||
555 | sdio_claim_host(ar_sdio->func); | |
556 | ||
557 | /* Register the isr */ | |
558 | ret = sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler); | |
559 | if (ret) | |
560 | ath6kl_err("Failed to claim sdio irq: %d\n", ret); | |
561 | ||
562 | sdio_release_host(ar_sdio->func); | |
563 | } | |
564 | ||
565 | static void ath6kl_sdio_irq_disable(struct ath6kl *ar) | |
566 | { | |
567 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
568 | int ret; | |
569 | ||
570 | sdio_claim_host(ar_sdio->func); | |
571 | ||
572 | /* Mask our function IRQ */ | |
573 | while (atomic_read(&ar_sdio->irq_handling)) { | |
574 | sdio_release_host(ar_sdio->func); | |
575 | schedule_timeout(HZ / 10); | |
576 | sdio_claim_host(ar_sdio->func); | |
577 | } | |
578 | ||
579 | ret = sdio_release_irq(ar_sdio->func); | |
580 | if (ret) | |
581 | ath6kl_err("Failed to release sdio irq: %d\n", ret); | |
582 | ||
583 | sdio_release_host(ar_sdio->func); | |
584 | } | |
585 | ||
586 | static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar) | |
587 | { | |
588 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
589 | struct hif_scatter_req *node = NULL; | |
bdcd8170 | 590 | |
151bd30b | 591 | spin_lock_bh(&ar_sdio->scat_lock); |
bdcd8170 KV |
592 | |
593 | if (!list_empty(&ar_sdio->scat_req)) { | |
594 | node = list_first_entry(&ar_sdio->scat_req, | |
595 | struct hif_scatter_req, list); | |
596 | list_del(&node->list); | |
597 | } | |
598 | ||
151bd30b | 599 | spin_unlock_bh(&ar_sdio->scat_lock); |
bdcd8170 KV |
600 | |
601 | return node; | |
602 | } | |
603 | ||
604 | static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar, | |
605 | struct hif_scatter_req *s_req) | |
606 | { | |
607 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
bdcd8170 | 608 | |
151bd30b | 609 | spin_lock_bh(&ar_sdio->scat_lock); |
bdcd8170 KV |
610 | |
611 | list_add_tail(&s_req->list, &ar_sdio->scat_req); | |
612 | ||
151bd30b | 613 | spin_unlock_bh(&ar_sdio->scat_lock); |
bdcd8170 KV |
614 | |
615 | } | |
616 | ||
c630d18a VT |
617 | /* scatter gather read write request */ |
618 | static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar, | |
619 | struct hif_scatter_req *scat_req) | |
620 | { | |
621 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
c630d18a VT |
622 | u32 request = scat_req->req; |
623 | int status = 0; | |
c630d18a VT |
624 | |
625 | if (!scat_req->len) | |
626 | return -EINVAL; | |
627 | ||
628 | ath6kl_dbg(ATH6KL_DBG_SCATTER, | |
629 | "hif-scatter: total len: %d scatter entries: %d\n", | |
630 | scat_req->len, scat_req->scat_entries); | |
631 | ||
861dd058 | 632 | if (request & HIF_SYNCHRONOUS) |
d4df7890 | 633 | status = ath6kl_sdio_scat_rw(ar_sdio, scat_req->busrequest); |
861dd058 | 634 | else { |
151bd30b | 635 | spin_lock_bh(&ar_sdio->wr_async_lock); |
d4df7890 | 636 | list_add_tail(&scat_req->busrequest->list, &ar_sdio->wr_asyncq); |
151bd30b | 637 | spin_unlock_bh(&ar_sdio->wr_async_lock); |
c630d18a VT |
638 | queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work); |
639 | } | |
640 | ||
641 | return status; | |
642 | } | |
643 | ||
18a0f93e VT |
644 | /* clean up scatter support */ |
645 | static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar) | |
646 | { | |
647 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
648 | struct hif_scatter_req *s_req, *tmp_req; | |
18a0f93e VT |
649 | |
650 | /* empty the free list */ | |
151bd30b | 651 | spin_lock_bh(&ar_sdio->scat_lock); |
18a0f93e VT |
652 | list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) { |
653 | list_del(&s_req->list); | |
151bd30b | 654 | spin_unlock_bh(&ar_sdio->scat_lock); |
18a0f93e | 655 | |
32a07e44 KV |
656 | /* |
657 | * FIXME: should we also call completion handler with | |
658 | * ath6kl_hif_rw_comp_handler() with status -ECANCELED so | |
659 | * that the packet is properly freed? | |
660 | */ | |
18a0f93e VT |
661 | if (s_req->busrequest) |
662 | ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest); | |
663 | kfree(s_req->virt_dma_buf); | |
664 | kfree(s_req->sgentries); | |
665 | kfree(s_req); | |
666 | ||
151bd30b | 667 | spin_lock_bh(&ar_sdio->scat_lock); |
18a0f93e | 668 | } |
151bd30b | 669 | spin_unlock_bh(&ar_sdio->scat_lock); |
18a0f93e VT |
670 | } |
671 | ||
672 | /* setup of HIF scatter resources */ | |
50745af7 | 673 | static int ath6kl_sdio_enable_scatter(struct ath6kl *ar) |
18a0f93e VT |
674 | { |
675 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
50745af7 | 676 | struct htc_target *target = ar->htc_target; |
cfeab10b VT |
677 | int ret; |
678 | bool virt_scat = false; | |
18a0f93e | 679 | |
32a07e44 KV |
680 | if (ar_sdio->scatter_enabled) |
681 | return 0; | |
682 | ||
683 | ar_sdio->scatter_enabled = true; | |
684 | ||
18a0f93e VT |
685 | /* check if host supports scatter and it meets our requirements */ |
686 | if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) { | |
cfeab10b | 687 | ath6kl_err("host only supports scatter of :%d entries, need: %d\n", |
18a0f93e VT |
688 | ar_sdio->func->card->host->max_segs, |
689 | MAX_SCATTER_ENTRIES_PER_REQ); | |
cfeab10b | 690 | virt_scat = true; |
18a0f93e VT |
691 | } |
692 | ||
cfeab10b VT |
693 | if (!virt_scat) { |
694 | ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio, | |
695 | MAX_SCATTER_ENTRIES_PER_REQ, | |
696 | MAX_SCATTER_REQUESTS, virt_scat); | |
697 | ||
698 | if (!ret) { | |
3ef987be KV |
699 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
700 | "hif-scatter enabled requests %d entries %d\n", | |
cfeab10b VT |
701 | MAX_SCATTER_REQUESTS, |
702 | MAX_SCATTER_ENTRIES_PER_REQ); | |
703 | ||
50745af7 VT |
704 | target->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ; |
705 | target->max_xfer_szper_scatreq = | |
cfeab10b VT |
706 | MAX_SCATTER_REQ_TRANSFER_SIZE; |
707 | } else { | |
708 | ath6kl_sdio_cleanup_scatter(ar); | |
709 | ath6kl_warn("hif scatter resource setup failed, trying virtual scatter method\n"); | |
710 | } | |
711 | } | |
18a0f93e | 712 | |
cfeab10b VT |
713 | if (virt_scat || ret) { |
714 | ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio, | |
715 | ATH6KL_SCATTER_ENTRIES_PER_REQ, | |
716 | ATH6KL_SCATTER_REQS, virt_scat); | |
717 | ||
718 | if (ret) { | |
719 | ath6kl_err("failed to alloc virtual scatter resources !\n"); | |
720 | ath6kl_sdio_cleanup_scatter(ar); | |
721 | return ret; | |
722 | } | |
723 | ||
3ef987be KV |
724 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
725 | "virtual scatter enabled requests %d entries %d\n", | |
cfeab10b VT |
726 | ATH6KL_SCATTER_REQS, ATH6KL_SCATTER_ENTRIES_PER_REQ); |
727 | ||
50745af7 VT |
728 | target->max_scat_entries = ATH6KL_SCATTER_ENTRIES_PER_REQ; |
729 | target->max_xfer_szper_scatreq = | |
cfeab10b | 730 | ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER; |
18a0f93e VT |
731 | } |
732 | ||
18a0f93e VT |
733 | return 0; |
734 | } | |
735 | ||
e28e8104 KV |
736 | static int ath6kl_sdio_config(struct ath6kl *ar) |
737 | { | |
738 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
739 | struct sdio_func *func = ar_sdio->func; | |
740 | int ret; | |
741 | ||
742 | sdio_claim_host(func); | |
743 | ||
744 | if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >= | |
745 | MANUFACTURER_ID_AR6003_BASE) { | |
746 | /* enable 4-bit ASYNC interrupt on AR6003 or later */ | |
747 | ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card, | |
748 | CCCR_SDIO_IRQ_MODE_REG, | |
749 | SDIO_IRQ_MODE_ASYNC_4BIT_IRQ); | |
750 | if (ret) { | |
751 | ath6kl_err("Failed to enable 4-bit async irq mode %d\n", | |
752 | ret); | |
753 | goto out; | |
754 | } | |
755 | ||
756 | ath6kl_dbg(ATH6KL_DBG_BOOT, "4-bit async irq mode enabled\n"); | |
757 | } | |
758 | ||
759 | /* give us some time to enable, in ms */ | |
760 | func->enable_timeout = 100; | |
761 | ||
762 | ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE); | |
763 | if (ret) { | |
764 | ath6kl_err("Set sdio block size %d failed: %d)\n", | |
765 | HIF_MBOX_BLOCK_SIZE, ret); | |
766 | sdio_release_host(func); | |
767 | goto out; | |
768 | } | |
769 | ||
770 | out: | |
771 | sdio_release_host(func); | |
772 | ||
773 | return ret; | |
774 | } | |
775 | ||
0f60e9f4 | 776 | static int ath6kl_sdio_suspend(struct ath6kl *ar, struct cfg80211_wowlan *wow) |
abcb344b KV |
777 | { |
778 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
779 | struct sdio_func *func = ar_sdio->func; | |
780 | mmc_pm_flag_t flags; | |
781 | int ret; | |
782 | ||
783 | flags = sdio_get_host_pm_caps(func); | |
784 | ||
b4b2a0b1 KV |
785 | ath6kl_dbg(ATH6KL_DBG_SUSPEND, "sdio suspend pm_caps 0x%x\n", flags); |
786 | ||
8277de15 KV |
787 | if (!(flags & MMC_PM_KEEP_POWER) || |
788 | (ar->conf_flags & ATH6KL_CONF_SUSPEND_CUTPOWER)) { | |
b4b2a0b1 | 789 | /* as host doesn't support keep power we need to cut power */ |
0f60e9f4 RM |
790 | return ath6kl_cfg80211_suspend(ar, ATH6KL_CFG_SUSPEND_CUTPOWER, |
791 | NULL); | |
17380859 | 792 | } |
abcb344b KV |
793 | |
794 | ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); | |
795 | if (ret) { | |
796 | printk(KERN_ERR "ath6kl: set sdio pm flags failed: %d\n", | |
797 | ret); | |
798 | return ret; | |
799 | } | |
800 | ||
0f60e9f4 | 801 | return ath6kl_cfg80211_suspend(ar, ATH6KL_CFG_SUSPEND_DEEPSLEEP, NULL); |
abcb344b KV |
802 | } |
803 | ||
aa6cffc1 CN |
804 | static int ath6kl_sdio_resume(struct ath6kl *ar) |
805 | { | |
b4b2a0b1 KV |
806 | switch (ar->state) { |
807 | case ATH6KL_STATE_OFF: | |
808 | case ATH6KL_STATE_CUTPOWER: | |
809 | ath6kl_dbg(ATH6KL_DBG_SUSPEND, | |
810 | "sdio resume configuring sdio\n"); | |
811 | ||
812 | /* need to set sdio settings after power is cut from sdio */ | |
813 | ath6kl_sdio_config(ar); | |
814 | break; | |
815 | ||
816 | case ATH6KL_STATE_ON: | |
817 | /* we shouldn't be on this state during resume */ | |
818 | WARN_ON(1); | |
819 | break; | |
820 | ||
821 | case ATH6KL_STATE_DEEPSLEEP: | |
822 | break; | |
823 | } | |
824 | ||
52d81a68 | 825 | ath6kl_cfg80211_resume(ar); |
aa6cffc1 CN |
826 | |
827 | return 0; | |
828 | } | |
829 | ||
32a07e44 KV |
830 | static void ath6kl_sdio_stop(struct ath6kl *ar) |
831 | { | |
832 | struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); | |
833 | struct bus_request *req, *tmp_req; | |
834 | void *context; | |
835 | ||
836 | /* FIXME: make sure that wq is not queued again */ | |
837 | ||
838 | cancel_work_sync(&ar_sdio->wr_async_work); | |
839 | ||
840 | spin_lock_bh(&ar_sdio->wr_async_lock); | |
841 | ||
842 | list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) { | |
843 | list_del(&req->list); | |
844 | ||
845 | if (req->scat_req) { | |
846 | /* this is a scatter gather request */ | |
847 | req->scat_req->status = -ECANCELED; | |
848 | req->scat_req->complete(ar_sdio->ar->htc_target, | |
849 | req->scat_req); | |
850 | } else { | |
851 | context = req->packet; | |
852 | ath6kl_sdio_free_bus_req(ar_sdio, req); | |
853 | ath6kl_hif_rw_comp_handler(context, -ECANCELED); | |
854 | } | |
855 | } | |
856 | ||
857 | spin_unlock_bh(&ar_sdio->wr_async_lock); | |
858 | ||
859 | WARN_ON(get_queue_depth(&ar_sdio->scat_req) != 4); | |
860 | } | |
861 | ||
bdcd8170 KV |
862 | static const struct ath6kl_hif_ops ath6kl_sdio_ops = { |
863 | .read_write_sync = ath6kl_sdio_read_write_sync, | |
864 | .write_async = ath6kl_sdio_write_async, | |
865 | .irq_enable = ath6kl_sdio_irq_enable, | |
866 | .irq_disable = ath6kl_sdio_irq_disable, | |
867 | .scatter_req_get = ath6kl_sdio_scatter_req_get, | |
868 | .scatter_req_add = ath6kl_sdio_scatter_req_add, | |
869 | .enable_scatter = ath6kl_sdio_enable_scatter, | |
f74a7361 | 870 | .scat_req_rw = ath6kl_sdio_async_rw_scatter, |
bdcd8170 | 871 | .cleanup_scatter = ath6kl_sdio_cleanup_scatter, |
abcb344b | 872 | .suspend = ath6kl_sdio_suspend, |
aa6cffc1 | 873 | .resume = ath6kl_sdio_resume, |
b2e75698 KV |
874 | .power_on = ath6kl_sdio_power_on, |
875 | .power_off = ath6kl_sdio_power_off, | |
32a07e44 | 876 | .stop = ath6kl_sdio_stop, |
bdcd8170 KV |
877 | }; |
878 | ||
b4b2a0b1 KV |
879 | #ifdef CONFIG_PM_SLEEP |
880 | ||
881 | /* | |
882 | * Empty handlers so that mmc subsystem doesn't remove us entirely during | |
883 | * suspend. We instead follow cfg80211 suspend/resume handlers. | |
884 | */ | |
885 | static int ath6kl_sdio_pm_suspend(struct device *device) | |
886 | { | |
887 | ath6kl_dbg(ATH6KL_DBG_SUSPEND, "sdio pm suspend\n"); | |
888 | ||
889 | return 0; | |
890 | } | |
891 | ||
892 | static int ath6kl_sdio_pm_resume(struct device *device) | |
893 | { | |
894 | ath6kl_dbg(ATH6KL_DBG_SUSPEND, "sdio pm resume\n"); | |
895 | ||
896 | return 0; | |
897 | } | |
898 | ||
899 | static SIMPLE_DEV_PM_OPS(ath6kl_sdio_pm_ops, ath6kl_sdio_pm_suspend, | |
900 | ath6kl_sdio_pm_resume); | |
901 | ||
902 | #define ATH6KL_SDIO_PM_OPS (&ath6kl_sdio_pm_ops) | |
903 | ||
904 | #else | |
905 | ||
906 | #define ATH6KL_SDIO_PM_OPS NULL | |
907 | ||
908 | #endif /* CONFIG_PM_SLEEP */ | |
909 | ||
bdcd8170 KV |
910 | static int ath6kl_sdio_probe(struct sdio_func *func, |
911 | const struct sdio_device_id *id) | |
912 | { | |
913 | int ret; | |
914 | struct ath6kl_sdio *ar_sdio; | |
915 | struct ath6kl *ar; | |
916 | int count; | |
917 | ||
3ef987be KV |
918 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
919 | "sdio new func %d vendor 0x%x device 0x%x block 0x%x/0x%x\n", | |
f7325b85 KV |
920 | func->num, func->vendor, func->device, |
921 | func->max_blksize, func->cur_blksize); | |
bdcd8170 KV |
922 | |
923 | ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL); | |
924 | if (!ar_sdio) | |
925 | return -ENOMEM; | |
926 | ||
927 | ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL); | |
928 | if (!ar_sdio->dma_buffer) { | |
929 | ret = -ENOMEM; | |
930 | goto err_hif; | |
931 | } | |
932 | ||
933 | ar_sdio->func = func; | |
934 | sdio_set_drvdata(func, ar_sdio); | |
935 | ||
936 | ar_sdio->id = id; | |
937 | ar_sdio->is_disabled = true; | |
938 | ||
939 | spin_lock_init(&ar_sdio->lock); | |
940 | spin_lock_init(&ar_sdio->scat_lock); | |
941 | spin_lock_init(&ar_sdio->wr_async_lock); | |
942 | ||
943 | INIT_LIST_HEAD(&ar_sdio->scat_req); | |
944 | INIT_LIST_HEAD(&ar_sdio->bus_req_freeq); | |
945 | INIT_LIST_HEAD(&ar_sdio->wr_asyncq); | |
946 | ||
947 | INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work); | |
948 | ||
949 | for (count = 0; count < BUS_REQUEST_MAX_NUM; count++) | |
950 | ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]); | |
951 | ||
952 | ar = ath6kl_core_alloc(&ar_sdio->func->dev); | |
953 | if (!ar) { | |
954 | ath6kl_err("Failed to alloc ath6kl core\n"); | |
955 | ret = -ENOMEM; | |
956 | goto err_dma; | |
957 | } | |
958 | ||
959 | ar_sdio->ar = ar; | |
960 | ar->hif_priv = ar_sdio; | |
961 | ar->hif_ops = &ath6kl_sdio_ops; | |
962 | ||
963 | ath6kl_sdio_set_mbox_info(ar); | |
964 | ||
e28e8104 | 965 | ret = ath6kl_sdio_config(ar); |
bdcd8170 | 966 | if (ret) { |
e28e8104 KV |
967 | ath6kl_err("Failed to config sdio: %d\n", ret); |
968 | goto err_core_alloc; | |
bdcd8170 KV |
969 | } |
970 | ||
bdcd8170 KV |
971 | ret = ath6kl_core_init(ar); |
972 | if (ret) { | |
973 | ath6kl_err("Failed to init ath6kl core\n"); | |
e28e8104 | 974 | goto err_core_alloc; |
bdcd8170 KV |
975 | } |
976 | ||
977 | return ret; | |
978 | ||
8dafb70e VT |
979 | err_core_alloc: |
980 | ath6kl_core_free(ar_sdio->ar); | |
bdcd8170 KV |
981 | err_dma: |
982 | kfree(ar_sdio->dma_buffer); | |
983 | err_hif: | |
984 | kfree(ar_sdio); | |
985 | ||
986 | return ret; | |
987 | } | |
988 | ||
989 | static void ath6kl_sdio_remove(struct sdio_func *func) | |
990 | { | |
991 | struct ath6kl_sdio *ar_sdio; | |
992 | ||
3ef987be KV |
993 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
994 | "sdio removed func %d vendor 0x%x device 0x%x\n", | |
f7325b85 KV |
995 | func->num, func->vendor, func->device); |
996 | ||
bdcd8170 KV |
997 | ar_sdio = sdio_get_drvdata(func); |
998 | ||
999 | ath6kl_stop_txrx(ar_sdio->ar); | |
1000 | cancel_work_sync(&ar_sdio->wr_async_work); | |
1001 | ||
6db8fa53 | 1002 | ath6kl_core_cleanup(ar_sdio->ar); |
bdcd8170 | 1003 | |
bdcd8170 KV |
1004 | kfree(ar_sdio->dma_buffer); |
1005 | kfree(ar_sdio); | |
1006 | } | |
1007 | ||
1008 | static const struct sdio_device_id ath6kl_sdio_devices[] = { | |
1009 | {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))}, | |
1010 | {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))}, | |
1011 | {}, | |
1012 | }; | |
1013 | ||
1014 | MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices); | |
1015 | ||
1016 | static struct sdio_driver ath6kl_sdio_driver = { | |
cd4b8b85 | 1017 | .name = "ath6kl", |
bdcd8170 KV |
1018 | .id_table = ath6kl_sdio_devices, |
1019 | .probe = ath6kl_sdio_probe, | |
1020 | .remove = ath6kl_sdio_remove, | |
b4b2a0b1 | 1021 | .drv.pm = ATH6KL_SDIO_PM_OPS, |
bdcd8170 KV |
1022 | }; |
1023 | ||
1024 | static int __init ath6kl_sdio_init(void) | |
1025 | { | |
1026 | int ret; | |
1027 | ||
1028 | ret = sdio_register_driver(&ath6kl_sdio_driver); | |
1029 | if (ret) | |
1030 | ath6kl_err("sdio driver registration failed: %d\n", ret); | |
1031 | ||
1032 | return ret; | |
1033 | } | |
1034 | ||
1035 | static void __exit ath6kl_sdio_exit(void) | |
1036 | { | |
1037 | sdio_unregister_driver(&ath6kl_sdio_driver); | |
1038 | } | |
1039 | ||
1040 | module_init(ath6kl_sdio_init); | |
1041 | module_exit(ath6kl_sdio_exit); | |
1042 | ||
1043 | MODULE_AUTHOR("Atheros Communications, Inc."); | |
1044 | MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices"); | |
1045 | MODULE_LICENSE("Dual BSD/GPL"); | |
1046 | ||
1047 | MODULE_FIRMWARE(AR6003_REV2_OTP_FILE); | |
1048 | MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE); | |
1049 | MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE); | |
1050 | MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE); | |
1051 | MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE); | |
1052 | MODULE_FIRMWARE(AR6003_REV3_OTP_FILE); | |
1053 | MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE); | |
1054 | MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE); | |
1055 | MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE); | |
1056 | MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE); |