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ath6kl: Merge scatter gather setup functions for two method
[deliverable/linux.git] / drivers / net / wireless / ath / ath6kl / sdio.c
CommitLineData
bdcd8170
KV		 1/*
2 * Copyright (c) 2004-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include <linux/mmc/card.h>
18#include <linux/mmc/mmc.h>
19#include <linux/mmc/host.h>
20#include <linux/mmc/sdio_func.h>
21#include <linux/mmc/sdio_ids.h>
22#include <linux/mmc/sdio.h>
23#include <linux/mmc/sd.h>
24#include "htc_hif.h"
25#include "hif-ops.h"
26#include "target.h"
27#include "debug.h"
28
29struct ath6kl_sdio {
30 struct sdio_func *func;
31
32 spinlock_t lock;
33
34 /* free list */
35 struct list_head bus_req_freeq;
36
37 /* available bus requests */
38 struct bus_request bus_req[BUS_REQUEST_MAX_NUM];
39
40 struct ath6kl *ar;
41 u8 *dma_buffer;
42
43 /* scatter request list head */
44 struct list_head scat_req;
45
46 spinlock_t scat_lock;
47 bool is_disabled;
48 atomic_t irq_handling;
49 const struct sdio_device_id *id;
50 struct work_struct wr_async_work;
51 struct list_head wr_asyncq;
52 spinlock_t wr_async_lock;
53};
54
55#define CMD53_ARG_READ 0
56#define CMD53_ARG_WRITE 1
57#define CMD53_ARG_BLOCK_BASIS 1
58#define CMD53_ARG_FIXED_ADDRESS 0
59#define CMD53_ARG_INCR_ADDRESS 1
60
61static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar)
62{
63 return ar->hif_priv;
64}
65
66/*
67 * Macro to check if DMA buffer is WORD-aligned and DMA-able.
68 * Most host controllers assume the buffer is DMA'able and will
69 * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid
70 * check fails on stack memory.
71 */
72static inline bool buf_needs_bounce(u8 *buf)
73{
74 return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf);
75}
76
77static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar)
78{
79 struct ath6kl_mbox_info *mbox_info = &ar->mbox_info;
80
81 /* EP1 has an extended range */
82 mbox_info->htc_addr = HIF_MBOX_BASE_ADDR;
83 mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR;
84 mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH;
85 mbox_info->block_size = HIF_MBOX_BLOCK_SIZE;
86 mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR;
87 mbox_info->gmbox_sz = HIF_GMBOX_WIDTH;
88}
89
90static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func,
91 u8 mode, u8 opcode, u32 addr,
92 u16 blksz)
93{
94 *arg = (((rw & 1) << 31) |
95 ((func & 0x7) << 28) |
96 ((mode & 1) << 27) |
97 ((opcode & 1) << 26) |
98 ((addr & 0x1FFFF) << 9) |
99 (blksz & 0x1FF));
100}
101
102static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw,
103 unsigned int address,
104 unsigned char val)
105{
106 const u8 func = 0;
107
108 *arg = ((write & 1) << 31) |
109 ((func & 0x7) << 28) |
110 ((raw & 1) << 27) |
111 (1 << 26) |
112 ((address & 0x1FFFF) << 9) |
113 (1 << 8) |
114 (val & 0xFF);
115}
116
117static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card,
118 unsigned int address,
119 unsigned char byte)
120{
121 struct mmc_command io_cmd;
122
123 memset(&io_cmd, 0, sizeof(io_cmd));
124 ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte);
125 io_cmd.opcode = SD_IO_RW_DIRECT;
126 io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
127
128 return mmc_wait_for_cmd(card->host, &io_cmd, 0);
129}
130
131static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio)
132{
133 struct bus_request *bus_req;
134 unsigned long flag;
135
136 spin_lock_irqsave(&ar_sdio->lock, flag);
137
138 if (list_empty(&ar_sdio->bus_req_freeq)) {
139 spin_unlock_irqrestore(&ar_sdio->lock, flag);
140 return NULL;
141 }
142
143 bus_req = list_first_entry(&ar_sdio->bus_req_freeq,
144 struct bus_request, list);
145 list_del(&bus_req->list);
146
147 spin_unlock_irqrestore(&ar_sdio->lock, flag);
148 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req);
149
150 return bus_req;
151}
152
153static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio,
154 struct bus_request *bus_req)
155{
156 unsigned long flag;
157
158 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req);
159
160 spin_lock_irqsave(&ar_sdio->lock, flag);
161 list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq);
162 spin_unlock_irqrestore(&ar_sdio->lock, flag);
163}
164
165static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req,
bdcd8170
KV		 166 struct mmc_data *data)
167{
168 struct scatterlist *sg;
169 int i;
170
171 data->blksz = HIF_MBOX_BLOCK_SIZE;
172 data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE;
173
174 ath6kl_dbg(ATH6KL_DBG_SCATTER,
175 "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n",
176 (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr,
177 data->blksz, data->blocks, scat_req->len,
178 scat_req->scat_entries);
179
180 data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE :
181 MMC_DATA_READ;
182
183 /* fill SG entries */
d4df7890 184 sg = scat_req->sgentries;
bdcd8170
KV		 185 sg_init_table(sg, scat_req->scat_entries);
186
187 /* assemble SG list */
188 for (i = 0; i < scat_req->scat_entries; i++, sg++) {
189 if ((unsigned long)scat_req->scat_list[i].buf & 0x3)
190 /*
191 * Some scatter engines can handle unaligned
192 * buffers, print this as informational only.
193 */
194 ath6kl_dbg(ATH6KL_DBG_SCATTER,
195 "(%s) scatter buffer is unaligned 0x%p\n",
196 scat_req->req & HIF_WRITE ? "WR" : "RD",
197 scat_req->scat_list[i].buf);
198
199 ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n",
200 i, scat_req->scat_list[i].buf,
201 scat_req->scat_list[i].len);
202
203 sg_set_buf(sg, scat_req->scat_list[i].buf,
204 scat_req->scat_list[i].len);
205 }
206
207 /* set scatter-gather table for request */
d4df7890 208 data->sg = scat_req->sgentries;
bdcd8170
KV		 209 data->sg_len = scat_req->scat_entries;
210}
211
212static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio,
213 struct bus_request *req)
214{
215 struct mmc_request mmc_req;
216 struct mmc_command cmd;
217 struct mmc_data data;
218 struct hif_scatter_req *scat_req;
219 u8 opcode, rw;
220 int status;
221
222 scat_req = req->scat_req;
223
224 memset(&mmc_req, 0, sizeof(struct mmc_request));
225 memset(&cmd, 0, sizeof(struct mmc_command));
226 memset(&data, 0, sizeof(struct mmc_data));
227
d4df7890 228 ath6kl_sdio_setup_scat_data(scat_req, &data);
bdcd8170
KV		 229
230 opcode = (scat_req->req & HIF_FIXED_ADDRESS) ?
231 CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS;
232
233 rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ;
234
235 /* Fixup the address so that the last byte will fall on MBOX EOM */
236 if (scat_req->req & HIF_WRITE) {
237 if (scat_req->addr == HIF_MBOX_BASE_ADDR)
238 scat_req->addr += HIF_MBOX_WIDTH - scat_req->len;
239 else
240 /* Uses extended address range */
241 scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len;
242 }
243
244 /* set command argument */
245 ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num,
246 CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr,
247 data.blocks);
248
249 cmd.opcode = SD_IO_RW_EXTENDED;
250 cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC;
251
252 mmc_req.cmd = &cmd;
253 mmc_req.data = &data;
254
255 mmc_set_data_timeout(&data, ar_sdio->func->card);
256 /* synchronous call to process request */
257 mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req);
258
259 status = cmd.error ? cmd.error : data.error;
260 scat_req->status = status;
261
262 if (scat_req->status)
263 ath6kl_err("Scatter write request failed:%d\n",
264 scat_req->status);
265
266 if (scat_req->req & HIF_ASYNCHRONOUS)
e041c7f9 267 scat_req->complete(ar_sdio->ar->htc_target, scat_req);
bdcd8170
KV		 268
269 return status;
270}
271
3df505ad
VT		 272static int ath6kl_sdio_alloc_prep_scat_req(struct ath6kl_sdio *ar_sdio,
273 int n_scat_entry, int n_scat_req,
274 bool virt_scat)
275{
276 struct hif_scatter_req *s_req;
277 struct bus_request *bus_req;
cfeab10b
VT		 278 int i, scat_req_sz, scat_list_sz, sg_sz, buf_sz;
279 u8 *virt_buf;
3df505ad
VT		 280
281 scat_list_sz = (n_scat_entry - 1) * sizeof(struct hif_scatter_item);
282 scat_req_sz = sizeof(*s_req) + scat_list_sz;
283
284 if (!virt_scat)
285 sg_sz = sizeof(struct scatterlist) * n_scat_entry;
cfeab10b
VT		 286 else
287 buf_sz = 2 * L1_CACHE_BYTES +
288 ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER;
3df505ad
VT		 289
290 for (i = 0; i < n_scat_req; i++) {
291 /* allocate the scatter request */
292 s_req = kzalloc(scat_req_sz, GFP_KERNEL);
293 if (!s_req)
294 return -ENOMEM;
295
cfeab10b
VT		 296 if (virt_scat) {
297 virt_buf = kzalloc(buf_sz, GFP_KERNEL);
298 if (!virt_buf) {
299 kfree(s_req);
300 return -ENOMEM;
301 }
302
303 s_req->virt_dma_buf =
304 (u8 *)L1_CACHE_ALIGN((unsigned long)virt_buf);
305 } else {
3df505ad
VT		 306 /* allocate sglist */
307 s_req->sgentries = kzalloc(sg_sz, GFP_KERNEL);
308
309 if (!s_req->sgentries) {
310 kfree(s_req);
311 return -ENOMEM;
312 }
313 }
314
315 /* allocate a bus request for this scatter request */
316 bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
317 if (!bus_req) {
318 kfree(s_req->sgentries);
cfeab10b 319 kfree(s_req->virt_dma_buf);
3df505ad
VT		 320 kfree(s_req);
321 return -ENOMEM;
322 }
323
324 /* assign the scatter request to this bus request */
325 bus_req->scat_req = s_req;
326 s_req->busrequest = bus_req;
327
328 /* add it to the scatter pool */
329 hif_scatter_req_add(ar_sdio->ar, s_req);
330 }
331
332 return 0;
333}
334
bdcd8170
KV		 335static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf,
336 u32 len, u32 request)
337{
338 struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
339 u8 *tbuf = NULL;
340 int ret;
341 bool bounced = false;
342
343 if (request & HIF_BLOCK_BASIS)
344 len = round_down(len, HIF_MBOX_BLOCK_SIZE);
345
346 if (buf_needs_bounce(buf)) {
347 if (!ar_sdio->dma_buffer)
348 return -ENOMEM;
349 tbuf = ar_sdio->dma_buffer;
350 memcpy(tbuf, buf, len);
351 bounced = true;
352 } else
353 tbuf = buf;
354
355 sdio_claim_host(ar_sdio->func);
356 if (request & HIF_WRITE) {
357 if (addr >= HIF_MBOX_BASE_ADDR &&
358 addr <= HIF_MBOX_END_ADDR)
359 addr += (HIF_MBOX_WIDTH - len);
360
361 if (addr == HIF_MBOX0_EXT_BASE_ADDR)
362 addr += HIF_MBOX0_EXT_WIDTH - len;
363
364 if (request & HIF_FIXED_ADDRESS)
365 ret = sdio_writesb(ar_sdio->func, addr, tbuf, len);
366 else
367 ret = sdio_memcpy_toio(ar_sdio->func, addr, tbuf, len);
368 } else {
369 if (request & HIF_FIXED_ADDRESS)
370 ret = sdio_readsb(ar_sdio->func, tbuf, addr, len);
371 else
372 ret = sdio_memcpy_fromio(ar_sdio->func, tbuf,
373 addr, len);
374 if (bounced)
375 memcpy(buf, tbuf, len);
376 }
377 sdio_release_host(ar_sdio->func);
378
379 return ret;
380}
381
382static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio,
383 struct bus_request *req)
384{
385 if (req->scat_req)
386 ath6kl_sdio_scat_rw(ar_sdio, req);
387 else {
388 void *context;
389 int status;
390
391 status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address,
392 req->buffer, req->length,
393 req->request);
394 context = req->packet;
395 ath6kl_sdio_free_bus_req(ar_sdio, req);
396 ath6kldev_rw_comp_handler(context, status);
397 }
398}
399
400static void ath6kl_sdio_write_async_work(struct work_struct *work)
401{
402 struct ath6kl_sdio *ar_sdio;
403 unsigned long flags;
404 struct bus_request *req, *tmp_req;
405
406 ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work);
407 sdio_claim_host(ar_sdio->func);
408
409 spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
410 list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) {
411 list_del(&req->list);
412 spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
413 __ath6kl_sdio_write_async(ar_sdio, req);
414 spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
415 }
416 spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
417
418 sdio_release_host(ar_sdio->func);
419}
420
421static void ath6kl_sdio_irq_handler(struct sdio_func *func)
422{
423 int status;
424 struct ath6kl_sdio *ar_sdio;
425
426 ar_sdio = sdio_get_drvdata(func);
427 atomic_set(&ar_sdio->irq_handling, 1);
428
429 /*
430 * Release the host during interrups so we can pick it back up when
431 * we process commands.
432 */
433 sdio_release_host(ar_sdio->func);
434
435 status = ath6kldev_intr_bh_handler(ar_sdio->ar);
436 sdio_claim_host(ar_sdio->func);
437 atomic_set(&ar_sdio->irq_handling, 0);
438 WARN_ON(status && status != -ECANCELED);
439}
440
441static int ath6kl_sdio_power_on(struct ath6kl_sdio *ar_sdio)
442{
443 struct sdio_func *func = ar_sdio->func;
444 int ret = 0;
445
446 if (!ar_sdio->is_disabled)
447 return 0;
448
449 sdio_claim_host(func);
450
451 ret = sdio_enable_func(func);
452 if (ret) {
453 ath6kl_err("Unable to enable sdio func: %d)\n", ret);
454 sdio_release_host(func);
455 return ret;
456 }
457
458 sdio_release_host(func);
459
460 /*
461 * Wait for hardware to initialise. It should take a lot less than
462 * 10 ms but let's be conservative here.
463 */
464 msleep(10);
465
466 ar_sdio->is_disabled = false;
467
468 return ret;
469}
470
471static int ath6kl_sdio_power_off(struct ath6kl_sdio *ar_sdio)
472{
473 int ret;
474
475 if (ar_sdio->is_disabled)
476 return 0;
477
478 /* Disable the card */
479 sdio_claim_host(ar_sdio->func);
480 ret = sdio_disable_func(ar_sdio->func);
481 sdio_release_host(ar_sdio->func);
482
483 if (ret)
484 return ret;
485
486 ar_sdio->is_disabled = true;
487
488 return ret;
489}
490
491static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer,
492 u32 length, u32 request,
493 struct htc_packet *packet)
494{
495 struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
496 struct bus_request *bus_req;
497 unsigned long flags;
498
499 bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
500
501 if (!bus_req)
502 return -ENOMEM;
503
504 bus_req->address = address;
505 bus_req->buffer = buffer;
506 bus_req->length = length;
507 bus_req->request = request;
508 bus_req->packet = packet;
509
510 spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
511 list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq);
512 spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
513 queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
514
515 return 0;
516}
517
518static void ath6kl_sdio_irq_enable(struct ath6kl *ar)
519{
520 struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
521 int ret;
522
523 sdio_claim_host(ar_sdio->func);
524
525 /* Register the isr */
526 ret = sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler);
527 if (ret)
528 ath6kl_err("Failed to claim sdio irq: %d\n", ret);
529
530 sdio_release_host(ar_sdio->func);
531}
532
533static void ath6kl_sdio_irq_disable(struct ath6kl *ar)
534{
535 struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
536 int ret;
537
538 sdio_claim_host(ar_sdio->func);
539
540 /* Mask our function IRQ */
541 while (atomic_read(&ar_sdio->irq_handling)) {
542 sdio_release_host(ar_sdio->func);
543 schedule_timeout(HZ / 10);
544 sdio_claim_host(ar_sdio->func);
545 }
546
547 ret = sdio_release_irq(ar_sdio->func);
548 if (ret)
549 ath6kl_err("Failed to release sdio irq: %d\n", ret);
550
551 sdio_release_host(ar_sdio->func);
552}
553
554static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar)
555{
556 struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
557 struct hif_scatter_req *node = NULL;
558 unsigned long flag;
559
560 spin_lock_irqsave(&ar_sdio->scat_lock, flag);
561
562 if (!list_empty(&ar_sdio->scat_req)) {
563 node = list_first_entry(&ar_sdio->scat_req,
564 struct hif_scatter_req, list);
565 list_del(&node->list);
566 }
567
568 spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
569
570 return node;
571}
572
573static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar,
574 struct hif_scatter_req *s_req)
575{
576 struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
577 unsigned long flag;
578
579 spin_lock_irqsave(&ar_sdio->scat_lock, flag);
580
581 list_add_tail(&s_req->list, &ar_sdio->scat_req);
582
583 spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
584
585}
586
c630d18a
VT		 587/* scatter gather read write request */
588static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar,
589 struct hif_scatter_req *scat_req)
590{
591 struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
c630d18a
VT		 592 u32 request = scat_req->req;
593 int status = 0;
594 unsigned long flags;
595
596 if (!scat_req->len)
597 return -EINVAL;
598
599 ath6kl_dbg(ATH6KL_DBG_SCATTER,
600 "hif-scatter: total len: %d scatter entries: %d\n",
601 scat_req->len, scat_req->scat_entries);
602
603 if (request & HIF_SYNCHRONOUS) {
604 sdio_claim_host(ar_sdio->func);
d4df7890 605 status = ath6kl_sdio_scat_rw(ar_sdio, scat_req->busrequest);
c630d18a
VT		 606 sdio_release_host(ar_sdio->func);
607 } else {
608 spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
d4df7890 609 list_add_tail(&scat_req->busrequest->list, &ar_sdio->wr_asyncq);
c630d18a
VT		 610 spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
611 queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
612 }
613
614 return status;
615}
616
18a0f93e
VT		 617/* clean up scatter support */
618static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar)
619{
620 struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
621 struct hif_scatter_req *s_req, *tmp_req;
622 unsigned long flag;
623
624 /* empty the free list */
625 spin_lock_irqsave(&ar_sdio->scat_lock, flag);
626 list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) {
627 list_del(&s_req->list);
628 spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
629
630 if (s_req->busrequest)
631 ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest);
632 kfree(s_req->virt_dma_buf);
633 kfree(s_req->sgentries);
634 kfree(s_req);
635
636 spin_lock_irqsave(&ar_sdio->scat_lock, flag);
637 }
638 spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
639}
640
641/* setup of HIF scatter resources */
642static int ath6kl_sdio_enable_scatter(struct ath6kl *ar,
643 struct hif_dev_scat_sup_info *pinfo)
644{
645 struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
cfeab10b
VT		 646 int ret;
647 bool virt_scat = false;
18a0f93e
VT		 648
649 /* check if host supports scatter and it meets our requirements */
650 if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) {
cfeab10b 651 ath6kl_err("host only supports scatter of :%d entries, need: %d\n",
18a0f93e
VT		 652 ar_sdio->func->card->host->max_segs,
653 MAX_SCATTER_ENTRIES_PER_REQ);
cfeab10b 654 virt_scat = true;
18a0f93e
VT		 655 }
656
cfeab10b
VT		 657 if (!virt_scat) {
658 ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio,
659 MAX_SCATTER_ENTRIES_PER_REQ,
660 MAX_SCATTER_REQUESTS, virt_scat);
661
662 if (!ret) {
663 ath6kl_dbg(ATH6KL_DBG_ANY,
664 "hif-scatter enabled: max scatter req : %d entries: %d\n",
665 MAX_SCATTER_REQUESTS,
666 MAX_SCATTER_ENTRIES_PER_REQ);
667
668 pinfo->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ;
669 pinfo->max_xfer_szper_scatreq =
670 MAX_SCATTER_REQ_TRANSFER_SIZE;
671 } else {
672 ath6kl_sdio_cleanup_scatter(ar);
673 ath6kl_warn("hif scatter resource setup failed, trying virtual scatter method\n");
674 }
675 }
18a0f93e 676
cfeab10b
VT		 677 if (virt_scat || ret) {
678 ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio,
679 ATH6KL_SCATTER_ENTRIES_PER_REQ,
680 ATH6KL_SCATTER_REQS, virt_scat);
681
682 if (ret) {
683 ath6kl_err("failed to alloc virtual scatter resources !\n");
684 ath6kl_sdio_cleanup_scatter(ar);
685 return ret;
686 }
687
688 ath6kl_dbg(ATH6KL_DBG_ANY,
689 "Vitual scatter enabled, max_scat_req:%d, entries:%d\n",
690 ATH6KL_SCATTER_REQS, ATH6KL_SCATTER_ENTRIES_PER_REQ);
691
692 pinfo->max_scat_entries = ATH6KL_SCATTER_ENTRIES_PER_REQ;
693 pinfo->max_xfer_szper_scatreq =
694 ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER;
18a0f93e
VT		 695 }
696
cfeab10b 697 pinfo->virt_scat = virt_scat;
18a0f93e
VT		 698
699 return 0;
700}
701
bdcd8170
KV		 702static const struct ath6kl_hif_ops ath6kl_sdio_ops = {
703 .read_write_sync = ath6kl_sdio_read_write_sync,
704 .write_async = ath6kl_sdio_write_async,
705 .irq_enable = ath6kl_sdio_irq_enable,
706 .irq_disable = ath6kl_sdio_irq_disable,
707 .scatter_req_get = ath6kl_sdio_scatter_req_get,
708 .scatter_req_add = ath6kl_sdio_scatter_req_add,
709 .enable_scatter = ath6kl_sdio_enable_scatter,
f74a7361 710 .scat_req_rw = ath6kl_sdio_async_rw_scatter,
bdcd8170
KV		 711 .cleanup_scatter = ath6kl_sdio_cleanup_scatter,
712};
713
714static int ath6kl_sdio_probe(struct sdio_func *func,
715 const struct sdio_device_id *id)
716{
717 int ret;
718 struct ath6kl_sdio *ar_sdio;
719 struct ath6kl *ar;
720 int count;
721
722 ath6kl_dbg(ATH6KL_DBG_TRC,
723 "%s: func: 0x%X, vendor id: 0x%X, dev id: 0x%X, block size: 0x%X/0x%X\n",
724 __func__, func->num, func->vendor,
725 func->device, func->max_blksize, func->cur_blksize);
726
727 ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL);
728 if (!ar_sdio)
729 return -ENOMEM;
730
731 ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL);
732 if (!ar_sdio->dma_buffer) {
733 ret = -ENOMEM;
734 goto err_hif;
735 }
736
737 ar_sdio->func = func;
738 sdio_set_drvdata(func, ar_sdio);
739
740 ar_sdio->id = id;
741 ar_sdio->is_disabled = true;
742
743 spin_lock_init(&ar_sdio->lock);
744 spin_lock_init(&ar_sdio->scat_lock);
745 spin_lock_init(&ar_sdio->wr_async_lock);
746
747 INIT_LIST_HEAD(&ar_sdio->scat_req);
748 INIT_LIST_HEAD(&ar_sdio->bus_req_freeq);
749 INIT_LIST_HEAD(&ar_sdio->wr_asyncq);
750
751 INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work);
752
753 for (count = 0; count < BUS_REQUEST_MAX_NUM; count++)
754 ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]);
755
756 ar = ath6kl_core_alloc(&ar_sdio->func->dev);
757 if (!ar) {
758 ath6kl_err("Failed to alloc ath6kl core\n");
759 ret = -ENOMEM;
760 goto err_dma;
761 }
762
763 ar_sdio->ar = ar;
764 ar->hif_priv = ar_sdio;
765 ar->hif_ops = &ath6kl_sdio_ops;
766
767 ath6kl_sdio_set_mbox_info(ar);
768
769 sdio_claim_host(func);
770
771 if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >=
772 MANUFACTURER_ID_AR6003_BASE) {
773 /* enable 4-bit ASYNC interrupt on AR6003 or later */
774 ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card,
775 CCCR_SDIO_IRQ_MODE_REG,
776 SDIO_IRQ_MODE_ASYNC_4BIT_IRQ);
777 if (ret) {
778 ath6kl_err("Failed to enable 4-bit async irq mode %d\n",
779 ret);
780 sdio_release_host(func);
781 goto err_dma;
782 }
783
784 ath6kl_dbg(ATH6KL_DBG_TRC, "4-bit async irq mode enabled\n");
785 }
786
787 /* give us some time to enable, in ms */
788 func->enable_timeout = 100;
789
790 sdio_release_host(func);
791
792 ret = ath6kl_sdio_power_on(ar_sdio);
793 if (ret)
794 goto err_dma;
795
796 sdio_claim_host(func);
797
798 ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE);
799 if (ret) {
800 ath6kl_err("Set sdio block size %d failed: %d)\n",
801 HIF_MBOX_BLOCK_SIZE, ret);
802 sdio_release_host(func);
803 goto err_off;
804 }
805
806 sdio_release_host(func);
807
808 ret = ath6kl_core_init(ar);
809 if (ret) {
810 ath6kl_err("Failed to init ath6kl core\n");
811 goto err_off;
812 }
813
814 return ret;
815
816err_off:
817 ath6kl_sdio_power_off(ar_sdio);
818err_dma:
819 kfree(ar_sdio->dma_buffer);
820err_hif:
821 kfree(ar_sdio);
822
823 return ret;
824}
825
826static void ath6kl_sdio_remove(struct sdio_func *func)
827{
828 struct ath6kl_sdio *ar_sdio;
829
830 ar_sdio = sdio_get_drvdata(func);
831
832 ath6kl_stop_txrx(ar_sdio->ar);
833 cancel_work_sync(&ar_sdio->wr_async_work);
834
835 ath6kl_unavail_ev(ar_sdio->ar);
836
837 ath6kl_sdio_power_off(ar_sdio);
838
839 kfree(ar_sdio->dma_buffer);
840 kfree(ar_sdio);
841}
842
843static const struct sdio_device_id ath6kl_sdio_devices[] = {
844 {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))},
845 {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))},
846 {},
847};
848
849MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices);
850
851static struct sdio_driver ath6kl_sdio_driver = {
852 .name = "ath6kl_sdio",
853 .id_table = ath6kl_sdio_devices,
854 .probe = ath6kl_sdio_probe,
855 .remove = ath6kl_sdio_remove,
856};
857
858static int __init ath6kl_sdio_init(void)
859{
860 int ret;
861
862 ret = sdio_register_driver(&ath6kl_sdio_driver);
863 if (ret)
864 ath6kl_err("sdio driver registration failed: %d\n", ret);
865
866 return ret;
867}
868
869static void __exit ath6kl_sdio_exit(void)
870{
871 sdio_unregister_driver(&ath6kl_sdio_driver);
872}
873
874module_init(ath6kl_sdio_init);
875module_exit(ath6kl_sdio_exit);
876
877MODULE_AUTHOR("Atheros Communications, Inc.");
878MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices");
879MODULE_LICENSE("Dual BSD/GPL");
880
881MODULE_FIRMWARE(AR6003_REV2_OTP_FILE);
882MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE);
883MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE);
884MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE);
885MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE);
886MODULE_FIRMWARE(AR6003_REV3_OTP_FILE);
887MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE);
888MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE);
889MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE);
890MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE);
Linux kernel - Deliverables
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