Commit | Line | Data |
---|---|---|
f078f209 | 1 | /* |
cee075a2 | 2 | * Copyright (c) 2008-2009 Atheros Communications Inc. |
f078f209 LR |
3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
394cf0a1 | 17 | #include "ath9k.h" |
f078f209 | 18 | |
5379c8a2 S |
19 | #define FUDGE 2 |
20 | ||
f078f209 | 21 | /* |
f078f209 LR |
22 | * This function will modify certain transmit queue properties depending on |
23 | * the operating mode of the station (AP or AdHoc). Parameters are AIFS | |
24 | * settings and channel width min/max | |
25 | */ | |
94db2936 | 26 | int ath_beaconq_config(struct ath_softc *sc) |
f078f209 | 27 | { |
cbe61d8a | 28 | struct ath_hw *ah = sc->sc_ah; |
c46917bb | 29 | struct ath_common *common = ath9k_hw_common(ah); |
94db2936 | 30 | struct ath9k_tx_queue_info qi, qi_be; |
066dae93 | 31 | struct ath_txq *txq; |
f078f209 | 32 | |
b77f483f | 33 | ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi); |
2660b81a | 34 | if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) { |
f078f209 LR |
35 | /* Always burst out beacon and CAB traffic. */ |
36 | qi.tqi_aifs = 1; | |
37 | qi.tqi_cwmin = 0; | |
38 | qi.tqi_cwmax = 0; | |
39 | } else { | |
40 | /* Adhoc mode; important thing is to use 2x cwmin. */ | |
066dae93 FF |
41 | txq = sc->tx.txq_map[WME_AC_BE]; |
42 | ath9k_hw_get_txq_props(ah, txq->axq_qnum, &qi_be); | |
94db2936 VN |
43 | qi.tqi_aifs = qi_be.tqi_aifs; |
44 | qi.tqi_cwmin = 4*qi_be.tqi_cwmin; | |
45 | qi.tqi_cwmax = qi_be.tqi_cwmax; | |
f078f209 LR |
46 | } |
47 | ||
b77f483f | 48 | if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) { |
3800276a JP |
49 | ath_err(common, |
50 | "Unable to update h/w beacon queue parameters\n"); | |
f078f209 LR |
51 | return 0; |
52 | } else { | |
9fc9ab0a | 53 | ath9k_hw_resettxqueue(ah, sc->beacon.beaconq); |
f078f209 LR |
54 | return 1; |
55 | } | |
56 | } | |
57 | ||
58 | /* | |
f078f209 LR |
59 | * Associates the beacon frame buffer with a transmit descriptor. Will set |
60 | * up all required antenna switch parameters, rate codes, and channel flags. | |
61 | * Beacons are always sent out at the lowest rate, and are not retried. | |
62 | */ | |
9fc9ab0a | 63 | static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp, |
64b84010 | 64 | struct ath_buf *bf, int rateidx) |
f078f209 | 65 | { |
a22be22a | 66 | struct sk_buff *skb = bf->bf_mpdu; |
cbe61d8a | 67 | struct ath_hw *ah = sc->sc_ah; |
43c27613 | 68 | struct ath_common *common = ath9k_hw_common(ah); |
f078f209 | 69 | struct ath_desc *ds; |
980b24da | 70 | struct ath9k_11n_rate_series series[4]; |
9fc9ab0a | 71 | int flags, antenna, ctsrate = 0, ctsduration = 0; |
545750d3 FF |
72 | struct ieee80211_supported_band *sband; |
73 | u8 rate = 0; | |
f078f209 | 74 | |
f078f209 | 75 | ds = bf->bf_desc; |
f078f209 LR |
76 | flags = ATH9K_TXDESC_NOACK; |
77 | ||
a65e4cb4 FF |
78 | ds->ds_link = 0; |
79 | /* | |
80 | * Switch antenna every beacon. | |
81 | * Should only switch every beacon period, not for every SWBA | |
82 | * XXX assumes two antennae | |
83 | */ | |
84 | antenna = ((sc->beacon.ast_be_xmit / sc->nbcnvifs) & 1 ? 2 : 1); | |
f078f209 | 85 | |
545750d3 | 86 | sband = &sc->sbands[common->hw->conf.channel->band]; |
64b84010 | 87 | rate = sband->bitrates[rateidx].hw_value; |
672840ac | 88 | if (sc->sc_flags & SC_OP_PREAMBLE_SHORT) |
64b84010 | 89 | rate |= sband->bitrates[rateidx].hw_value_short; |
9fc9ab0a S |
90 | |
91 | ath9k_hw_set11n_txdesc(ah, ds, skb->len + FCS_LEN, | |
92 | ATH9K_PKT_TYPE_BEACON, | |
93 | MAX_RATE_POWER, | |
94 | ATH9K_TXKEYIX_INVALID, | |
95 | ATH9K_KEY_TYPE_CLEAR, | |
96 | flags); | |
f078f209 LR |
97 | |
98 | /* NB: beacon's BufLen must be a multiple of 4 bytes */ | |
9fc9ab0a | 99 | ath9k_hw_filltxdesc(ah, ds, roundup(skb->len, 4), |
cc610ac0 VT |
100 | true, true, ds, bf->bf_buf_addr, |
101 | sc->beacon.beaconq); | |
f078f209 | 102 | |
0345f37b | 103 | memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4); |
f078f209 LR |
104 | series[0].Tries = 1; |
105 | series[0].Rate = rate; | |
ea066d5a MSS |
106 | series[0].ChSel = ath_txchainmask_reduction(sc, |
107 | common->tx_chainmask, series[0].Rate); | |
f078f209 | 108 | series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0; |
9fc9ab0a S |
109 | ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, ctsrate, ctsduration, |
110 | series, 4, 0); | |
f078f209 LR |
111 | } |
112 | ||
28d16708 FF |
113 | static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb) |
114 | { | |
115 | struct ath_wiphy *aphy = hw->priv; | |
116 | struct ath_softc *sc = aphy->sc; | |
117 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | |
118 | struct ath_tx_control txctl; | |
119 | ||
120 | memset(&txctl, 0, sizeof(struct ath_tx_control)); | |
121 | txctl.txq = sc->beacon.cabq; | |
122 | ||
226afe68 JP |
123 | ath_dbg(common, ATH_DBG_XMIT, |
124 | "transmitting CABQ packet, skb: %p\n", skb); | |
28d16708 FF |
125 | |
126 | if (ath_tx_start(hw, skb, &txctl) != 0) { | |
226afe68 | 127 | ath_dbg(common, ATH_DBG_XMIT, "CABQ TX failed\n"); |
28d16708 FF |
128 | dev_kfree_skb_any(skb); |
129 | } | |
130 | } | |
131 | ||
c52f33d0 | 132 | static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw, |
2c3db3d5 | 133 | struct ieee80211_vif *vif) |
f078f209 | 134 | { |
c52f33d0 JM |
135 | struct ath_wiphy *aphy = hw->priv; |
136 | struct ath_softc *sc = aphy->sc; | |
c46917bb | 137 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
f078f209 | 138 | struct ath_buf *bf; |
17d7904d | 139 | struct ath_vif *avp; |
f078f209 | 140 | struct sk_buff *skb; |
f078f209 | 141 | struct ath_txq *cabq; |
147583c0 | 142 | struct ieee80211_tx_info *info; |
980b24da S |
143 | int cabq_depth; |
144 | ||
f0ed85c6 JM |
145 | if (aphy->state != ATH_WIPHY_ACTIVE) |
146 | return NULL; | |
147 | ||
5640b08e | 148 | avp = (void *)vif->drv_priv; |
b77f483f | 149 | cabq = sc->beacon.cabq; |
f078f209 | 150 | |
d8baa939 | 151 | if (avp->av_bcbuf == NULL) |
f078f209 | 152 | return NULL; |
980b24da | 153 | |
9fc9ab0a S |
154 | /* Release the old beacon first */ |
155 | ||
f078f209 | 156 | bf = avp->av_bcbuf; |
a22be22a | 157 | skb = bf->bf_mpdu; |
a8fff50e | 158 | if (skb) { |
c1739eb3 | 159 | dma_unmap_single(sc->dev, bf->bf_buf_addr, |
9fc9ab0a | 160 | skb->len, DMA_TO_DEVICE); |
3fbb9d95 | 161 | dev_kfree_skb_any(skb); |
6cf9e995 | 162 | bf->bf_buf_addr = 0; |
a8fff50e | 163 | } |
f078f209 | 164 | |
9fc9ab0a S |
165 | /* Get a new beacon from mac80211 */ |
166 | ||
c52f33d0 | 167 | skb = ieee80211_beacon_get(hw, vif); |
a8fff50e JM |
168 | bf->bf_mpdu = skb; |
169 | if (skb == NULL) | |
170 | return NULL; | |
4ed96f04 JM |
171 | ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp = |
172 | avp->tsf_adjust; | |
980b24da | 173 | |
147583c0 JM |
174 | info = IEEE80211_SKB_CB(skb); |
175 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
176 | /* | |
177 | * TODO: make sure the seq# gets assigned properly (vs. other | |
178 | * TX frames) | |
179 | */ | |
980b24da | 180 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
b77f483f | 181 | sc->tx.seq_no += 0x10; |
147583c0 | 182 | hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
b77f483f | 183 | hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no); |
147583c0 | 184 | } |
980b24da | 185 | |
c1739eb3 BG |
186 | bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, |
187 | skb->len, DMA_TO_DEVICE); | |
7da3c55c | 188 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { |
f8316df1 LR |
189 | dev_kfree_skb_any(skb); |
190 | bf->bf_mpdu = NULL; | |
6cf9e995 | 191 | bf->bf_buf_addr = 0; |
3800276a | 192 | ath_err(common, "dma_mapping_error on beaconing\n"); |
f8316df1 LR |
193 | return NULL; |
194 | } | |
f078f209 | 195 | |
c52f33d0 | 196 | skb = ieee80211_get_buffered_bc(hw, vif); |
f078f209 | 197 | |
f078f209 LR |
198 | /* |
199 | * if the CABQ traffic from previous DTIM is pending and the current | |
200 | * beacon is also a DTIM. | |
17d7904d S |
201 | * 1) if there is only one vif let the cab traffic continue. |
202 | * 2) if there are more than one vif and we are using staggered | |
f078f209 | 203 | * beacons, then drain the cabq by dropping all the frames in |
17d7904d | 204 | * the cabq so that the current vifs cab traffic can be scheduled. |
f078f209 LR |
205 | */ |
206 | spin_lock_bh(&cabq->axq_lock); | |
207 | cabq_depth = cabq->axq_depth; | |
208 | spin_unlock_bh(&cabq->axq_lock); | |
209 | ||
e022edbd | 210 | if (skb && cabq_depth) { |
17d7904d | 211 | if (sc->nvifs > 1) { |
226afe68 JP |
212 | ath_dbg(common, ATH_DBG_BEACON, |
213 | "Flushing previous cabq traffic\n"); | |
9fc9ab0a | 214 | ath_draintxq(sc, cabq, false); |
f078f209 LR |
215 | } |
216 | } | |
217 | ||
64b84010 | 218 | ath_beacon_setup(sc, avp, bf, info->control.rates[0].idx); |
f078f209 | 219 | |
e022edbd | 220 | while (skb) { |
c52f33d0 JM |
221 | ath_tx_cabq(hw, skb); |
222 | skb = ieee80211_get_buffered_bc(hw, vif); | |
e022edbd | 223 | } |
f078f209 | 224 | |
f078f209 LR |
225 | return bf; |
226 | } | |
227 | ||
c52f33d0 | 228 | int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif) |
f078f209 | 229 | { |
c52f33d0 | 230 | struct ath_softc *sc = aphy->sc; |
c46917bb | 231 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
17d7904d | 232 | struct ath_vif *avp; |
f078f209 LR |
233 | struct ath_buf *bf; |
234 | struct sk_buff *skb; | |
459f5f90 | 235 | __le64 tstamp; |
f078f209 | 236 | |
5640b08e | 237 | avp = (void *)vif->drv_priv; |
f078f209 LR |
238 | |
239 | /* Allocate a beacon descriptor if we haven't done so. */ | |
240 | if (!avp->av_bcbuf) { | |
980b24da S |
241 | /* Allocate beacon state for hostap/ibss. We know |
242 | * a buffer is available. */ | |
b77f483f | 243 | avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf, |
980b24da | 244 | struct ath_buf, list); |
f078f209 LR |
245 | list_del(&avp->av_bcbuf->list); |
246 | ||
2660b81a | 247 | if (sc->sc_ah->opmode == NL80211_IFTYPE_AP || |
a65e4cb4 FF |
248 | sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC || |
249 | sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT) { | |
f078f209 LR |
250 | int slot; |
251 | /* | |
17d7904d | 252 | * Assign the vif to a beacon xmit slot. As |
f078f209 LR |
253 | * above, this cannot fail to find one. |
254 | */ | |
255 | avp->av_bslot = 0; | |
256 | for (slot = 0; slot < ATH_BCBUF; slot++) | |
2c3db3d5 | 257 | if (sc->beacon.bslot[slot] == NULL) { |
f078f209 | 258 | avp->av_bslot = slot; |
774610e4 | 259 | |
f078f209 | 260 | /* NB: keep looking for a double slot */ |
774610e4 FF |
261 | if (slot == 0 || !sc->beacon.bslot[slot-1]) |
262 | break; | |
f078f209 | 263 | } |
2c3db3d5 JM |
264 | BUG_ON(sc->beacon.bslot[avp->av_bslot] != NULL); |
265 | sc->beacon.bslot[avp->av_bslot] = vif; | |
c52f33d0 | 266 | sc->beacon.bslot_aphy[avp->av_bslot] = aphy; |
17d7904d | 267 | sc->nbcnvifs++; |
f078f209 LR |
268 | } |
269 | } | |
270 | ||
9fc9ab0a | 271 | /* release the previous beacon frame, if it already exists. */ |
f078f209 LR |
272 | bf = avp->av_bcbuf; |
273 | if (bf->bf_mpdu != NULL) { | |
a22be22a | 274 | skb = bf->bf_mpdu; |
c1739eb3 | 275 | dma_unmap_single(sc->dev, bf->bf_buf_addr, |
9fc9ab0a | 276 | skb->len, DMA_TO_DEVICE); |
f078f209 LR |
277 | dev_kfree_skb_any(skb); |
278 | bf->bf_mpdu = NULL; | |
6cf9e995 | 279 | bf->bf_buf_addr = 0; |
f078f209 LR |
280 | } |
281 | ||
9fc9ab0a | 282 | /* NB: the beacon data buffer must be 32-bit aligned. */ |
5640b08e | 283 | skb = ieee80211_beacon_get(sc->hw, vif); |
f078f209 | 284 | if (skb == NULL) { |
226afe68 | 285 | ath_dbg(common, ATH_DBG_BEACON, "cannot get skb\n"); |
f078f209 LR |
286 | return -ENOMEM; |
287 | } | |
288 | ||
459f5f90 | 289 | tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; |
b77f483f | 290 | sc->beacon.bc_tstamp = le64_to_cpu(tstamp); |
4ed96f04 | 291 | /* Calculate a TSF adjustment factor required for staggered beacons. */ |
f078f209 LR |
292 | if (avp->av_bslot > 0) { |
293 | u64 tsfadjust; | |
f078f209 LR |
294 | int intval; |
295 | ||
57c4d7b4 | 296 | intval = sc->beacon_interval ? : ATH_DEFAULT_BINTVAL; |
f078f209 LR |
297 | |
298 | /* | |
4ed96f04 JM |
299 | * Calculate the TSF offset for this beacon slot, i.e., the |
300 | * number of usecs that need to be added to the timestamp field | |
301 | * in Beacon and Probe Response frames. Beacon slot 0 is | |
302 | * processed at the correct offset, so it does not require TSF | |
303 | * adjustment. Other slots are adjusted to get the timestamp | |
304 | * close to the TBTT for the BSS. | |
f078f209 | 305 | */ |
4ed96f04 JM |
306 | tsfadjust = intval * avp->av_bslot / ATH_BCBUF; |
307 | avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust)); | |
f078f209 | 308 | |
226afe68 JP |
309 | ath_dbg(common, ATH_DBG_BEACON, |
310 | "stagger beacons, bslot %d intval %u tsfadjust %llu\n", | |
311 | avp->av_bslot, intval, (unsigned long long)tsfadjust); | |
f078f209 | 312 | |
4ed96f04 JM |
313 | ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp = |
314 | avp->tsf_adjust; | |
315 | } else | |
316 | avp->tsf_adjust = cpu_to_le64(0); | |
f078f209 | 317 | |
f8316df1 | 318 | bf->bf_mpdu = skb; |
c1739eb3 BG |
319 | bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, |
320 | skb->len, DMA_TO_DEVICE); | |
7da3c55c | 321 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { |
f8316df1 LR |
322 | dev_kfree_skb_any(skb); |
323 | bf->bf_mpdu = NULL; | |
6cf9e995 | 324 | bf->bf_buf_addr = 0; |
3800276a | 325 | ath_err(common, "dma_mapping_error on beacon alloc\n"); |
f8316df1 LR |
326 | return -ENOMEM; |
327 | } | |
f078f209 LR |
328 | |
329 | return 0; | |
330 | } | |
331 | ||
17d7904d | 332 | void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp) |
f078f209 LR |
333 | { |
334 | if (avp->av_bcbuf != NULL) { | |
335 | struct ath_buf *bf; | |
336 | ||
337 | if (avp->av_bslot != -1) { | |
2c3db3d5 | 338 | sc->beacon.bslot[avp->av_bslot] = NULL; |
c52f33d0 | 339 | sc->beacon.bslot_aphy[avp->av_bslot] = NULL; |
17d7904d | 340 | sc->nbcnvifs--; |
f078f209 LR |
341 | } |
342 | ||
343 | bf = avp->av_bcbuf; | |
344 | if (bf->bf_mpdu != NULL) { | |
a22be22a | 345 | struct sk_buff *skb = bf->bf_mpdu; |
c1739eb3 | 346 | dma_unmap_single(sc->dev, bf->bf_buf_addr, |
9fc9ab0a | 347 | skb->len, DMA_TO_DEVICE); |
f078f209 LR |
348 | dev_kfree_skb_any(skb); |
349 | bf->bf_mpdu = NULL; | |
6cf9e995 | 350 | bf->bf_buf_addr = 0; |
f078f209 | 351 | } |
b77f483f | 352 | list_add_tail(&bf->list, &sc->beacon.bbuf); |
f078f209 LR |
353 | |
354 | avp->av_bcbuf = NULL; | |
355 | } | |
356 | } | |
357 | ||
9fc9ab0a | 358 | void ath_beacon_tasklet(unsigned long data) |
f078f209 | 359 | { |
f078f209 | 360 | struct ath_softc *sc = (struct ath_softc *)data; |
cbe61d8a | 361 | struct ath_hw *ah = sc->sc_ah; |
c46917bb | 362 | struct ath_common *common = ath9k_hw_common(ah); |
f078f209 | 363 | struct ath_buf *bf = NULL; |
2c3db3d5 | 364 | struct ieee80211_vif *vif; |
c52f33d0 | 365 | struct ath_wiphy *aphy; |
2c3db3d5 | 366 | int slot; |
9546aae0 | 367 | u32 bfaddr, bc = 0, tsftu; |
f078f209 | 368 | u64 tsf; |
f078f209 LR |
369 | u16 intval; |
370 | ||
f078f209 LR |
371 | /* |
372 | * Check if the previous beacon has gone out. If | |
373 | * not don't try to post another, skip this period | |
374 | * and wait for the next. Missed beacons indicate | |
375 | * a problem and should not occur. If we miss too | |
376 | * many consecutive beacons reset the device. | |
377 | */ | |
b77f483f S |
378 | if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0) { |
379 | sc->beacon.bmisscnt++; | |
9546aae0 | 380 | |
b77f483f | 381 | if (sc->beacon.bmisscnt < BSTUCK_THRESH) { |
226afe68 JP |
382 | ath_dbg(common, ATH_DBG_BSTUCK, |
383 | "missed %u consecutive beacons\n", | |
384 | sc->beacon.bmisscnt); | |
70cf1533 | 385 | ath9k_hw_bstuck_nfcal(ah); |
b77f483f | 386 | } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) { |
226afe68 JP |
387 | ath_dbg(common, ATH_DBG_BSTUCK, |
388 | "beacon is officially stuck\n"); | |
b74444f8 | 389 | sc->sc_flags |= SC_OP_TSF_RESET; |
fac6b6a0 | 390 | ath_reset(sc, true); |
f078f209 | 391 | } |
9546aae0 | 392 | |
f078f209 LR |
393 | return; |
394 | } | |
980b24da | 395 | |
b77f483f | 396 | if (sc->beacon.bmisscnt != 0) { |
226afe68 JP |
397 | ath_dbg(common, ATH_DBG_BSTUCK, |
398 | "resume beacon xmit after %u misses\n", | |
399 | sc->beacon.bmisscnt); | |
b77f483f | 400 | sc->beacon.bmisscnt = 0; |
f078f209 LR |
401 | } |
402 | ||
403 | /* | |
404 | * Generate beacon frames. we are sending frames | |
405 | * staggered so calculate the slot for this frame based | |
406 | * on the tsf to safeguard against missing an swba. | |
407 | */ | |
408 | ||
57c4d7b4 | 409 | intval = sc->beacon_interval ? : ATH_DEFAULT_BINTVAL; |
f078f209 LR |
410 | |
411 | tsf = ath9k_hw_gettsf64(ah); | |
412 | tsftu = TSF_TO_TU(tsf>>32, tsf); | |
413 | slot = ((tsftu % intval) * ATH_BCBUF) / intval; | |
4ed96f04 JM |
414 | /* |
415 | * Reverse the slot order to get slot 0 on the TBTT offset that does | |
416 | * not require TSF adjustment and other slots adding | |
417 | * slot/ATH_BCBUF * beacon_int to timestamp. For example, with | |
418 | * ATH_BCBUF = 4, we process beacon slots as follows: 3 2 1 0 3 2 1 .. | |
419 | * and slot 0 is at correct offset to TBTT. | |
420 | */ | |
421 | slot = ATH_BCBUF - slot - 1; | |
422 | vif = sc->beacon.bslot[slot]; | |
423 | aphy = sc->beacon.bslot_aphy[slot]; | |
980b24da | 424 | |
226afe68 JP |
425 | ath_dbg(common, ATH_DBG_BEACON, |
426 | "slot %d [tsf %llu tsftu %u intval %u] vif %p\n", | |
427 | slot, tsf, tsftu, intval, vif); | |
980b24da | 428 | |
f078f209 | 429 | bfaddr = 0; |
2c3db3d5 | 430 | if (vif) { |
c52f33d0 | 431 | bf = ath_beacon_generate(aphy->hw, vif); |
f078f209 LR |
432 | if (bf != NULL) { |
433 | bfaddr = bf->bf_daddr; | |
434 | bc = 1; | |
435 | } | |
436 | } | |
9546aae0 | 437 | |
f078f209 LR |
438 | /* |
439 | * Handle slot time change when a non-ERP station joins/leaves | |
440 | * an 11g network. The 802.11 layer notifies us via callback, | |
441 | * we mark updateslot, then wait one beacon before effecting | |
442 | * the change. This gives associated stations at least one | |
443 | * beacon interval to note the state change. | |
444 | * | |
445 | * NB: The slot time change state machine is clocked according | |
446 | * to whether we are bursting or staggering beacons. We | |
447 | * recognize the request to update and record the current | |
448 | * slot then don't transition until that slot is reached | |
449 | * again. If we miss a beacon for that slot then we'll be | |
450 | * slow to transition but we'll be sure at least one beacon | |
451 | * interval has passed. When bursting slot is always left | |
452 | * set to ATH_BCBUF so this check is a noop. | |
453 | */ | |
b77f483f S |
454 | if (sc->beacon.updateslot == UPDATE) { |
455 | sc->beacon.updateslot = COMMIT; /* commit next beacon */ | |
456 | sc->beacon.slotupdate = slot; | |
457 | } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) { | |
0005baf4 FF |
458 | ah->slottime = sc->beacon.slottime; |
459 | ath9k_hw_init_global_settings(ah); | |
b77f483f | 460 | sc->beacon.updateslot = OK; |
ff37e337 | 461 | } |
f078f209 LR |
462 | if (bfaddr != 0) { |
463 | /* | |
464 | * Stop any current dma and put the new frame(s) on the queue. | |
465 | * This should never fail since we check above that no frames | |
466 | * are still pending on the queue. | |
467 | */ | |
b77f483f | 468 | if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) { |
3800276a JP |
469 | ath_err(common, "beacon queue %u did not stop?\n", |
470 | sc->beacon.beaconq); | |
f078f209 LR |
471 | } |
472 | ||
473 | /* NB: cabq traffic should already be queued and primed */ | |
b77f483f S |
474 | ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr); |
475 | ath9k_hw_txstart(ah, sc->beacon.beaconq); | |
f078f209 | 476 | |
17d7904d | 477 | sc->beacon.ast_be_xmit += bc; /* XXX per-vif? */ |
f078f209 | 478 | } |
f078f209 LR |
479 | } |
480 | ||
21526d57 LR |
481 | static void ath9k_beacon_init(struct ath_softc *sc, |
482 | u32 next_beacon, | |
483 | u32 beacon_period) | |
484 | { | |
485 | if (beacon_period & ATH9K_BEACON_RESET_TSF) | |
486 | ath9k_ps_wakeup(sc); | |
487 | ||
488 | ath9k_hw_beaconinit(sc->sc_ah, next_beacon, beacon_period); | |
489 | ||
490 | if (beacon_period & ATH9K_BEACON_RESET_TSF) | |
491 | ath9k_ps_restore(sc); | |
492 | } | |
493 | ||
f078f209 | 494 | /* |
5379c8a2 S |
495 | * For multi-bss ap support beacons are either staggered evenly over N slots or |
496 | * burst together. For the former arrange for the SWBA to be delivered for each | |
497 | * slot. Slots that are not occupied will generate nothing. | |
f078f209 | 498 | */ |
5379c8a2 | 499 | static void ath_beacon_config_ap(struct ath_softc *sc, |
d31e20af | 500 | struct ath_beacon_config *conf) |
f078f209 | 501 | { |
3069168c | 502 | struct ath_hw *ah = sc->sc_ah; |
980b24da | 503 | u32 nexttbtt, intval; |
f078f209 | 504 | |
5379c8a2 S |
505 | /* NB: the beacon interval is kept internally in TU's */ |
506 | intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; | |
507 | intval /= ATH_BCBUF; /* for staggered beacons */ | |
508 | nexttbtt = intval; | |
d8728ee9 FF |
509 | |
510 | if (sc->sc_flags & SC_OP_TSF_RESET) | |
511 | intval |= ATH9K_BEACON_RESET_TSF; | |
f078f209 | 512 | |
5379c8a2 S |
513 | /* |
514 | * In AP mode we enable the beacon timers and SWBA interrupts to | |
515 | * prepare beacon frames. | |
516 | */ | |
517 | intval |= ATH9K_BEACON_ENA; | |
3069168c | 518 | ah->imask |= ATH9K_INT_SWBA; |
5379c8a2 | 519 | ath_beaconq_config(sc); |
f078f209 | 520 | |
5379c8a2 | 521 | /* Set the computed AP beacon timers */ |
f078f209 | 522 | |
4df3071e | 523 | ath9k_hw_disable_interrupts(ah); |
21526d57 | 524 | ath9k_beacon_init(sc, nexttbtt, intval); |
5379c8a2 | 525 | sc->beacon.bmisscnt = 0; |
3069168c | 526 | ath9k_hw_set_interrupts(ah, ah->imask); |
b238e90e S |
527 | |
528 | /* Clear the reset TSF flag, so that subsequent beacon updation | |
529 | will not reset the HW TSF. */ | |
530 | ||
531 | sc->sc_flags &= ~SC_OP_TSF_RESET; | |
5379c8a2 | 532 | } |
459f5f90 | 533 | |
5379c8a2 S |
534 | /* |
535 | * This sets up the beacon timers according to the timestamp of the last | |
536 | * received beacon and the current TSF, configures PCF and DTIM | |
537 | * handling, programs the sleep registers so the hardware will wakeup in | |
538 | * time to receive beacons, and configures the beacon miss handling so | |
539 | * we'll receive a BMISS interrupt when we stop seeing beacons from the AP | |
540 | * we've associated with. | |
541 | */ | |
542 | static void ath_beacon_config_sta(struct ath_softc *sc, | |
d31e20af | 543 | struct ath_beacon_config *conf) |
5379c8a2 | 544 | { |
3069168c PR |
545 | struct ath_hw *ah = sc->sc_ah; |
546 | struct ath_common *common = ath9k_hw_common(ah); | |
5379c8a2 S |
547 | struct ath9k_beacon_state bs; |
548 | int dtimperiod, dtimcount, sleepduration; | |
549 | int cfpperiod, cfpcount; | |
550 | u32 nexttbtt = 0, intval, tsftu; | |
551 | u64 tsf; | |
267a9012 | 552 | int num_beacons, offset, dtim_dec_count, cfp_dec_count; |
5379c8a2 | 553 | |
1a20034a SB |
554 | /* No need to configure beacon if we are not associated */ |
555 | if (!common->curaid) { | |
226afe68 JP |
556 | ath_dbg(common, ATH_DBG_BEACON, |
557 | "STA is not yet associated..skipping beacon config\n"); | |
1a20034a SB |
558 | return; |
559 | } | |
560 | ||
5379c8a2 S |
561 | memset(&bs, 0, sizeof(bs)); |
562 | intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; | |
563 | ||
564 | /* | |
565 | * Setup dtim and cfp parameters according to | |
566 | * last beacon we received (which may be none). | |
567 | */ | |
568 | dtimperiod = conf->dtim_period; | |
569 | if (dtimperiod <= 0) /* NB: 0 if not known */ | |
570 | dtimperiod = 1; | |
571 | dtimcount = conf->dtim_count; | |
572 | if (dtimcount >= dtimperiod) /* NB: sanity check */ | |
573 | dtimcount = 0; | |
574 | cfpperiod = 1; /* NB: no PCF support yet */ | |
575 | cfpcount = 0; | |
576 | ||
577 | sleepduration = conf->listen_interval * intval; | |
578 | if (sleepduration <= 0) | |
579 | sleepduration = intval; | |
580 | ||
581 | /* | |
582 | * Pull nexttbtt forward to reflect the current | |
583 | * TSF and calculate dtim+cfp state for the result. | |
584 | */ | |
3069168c | 585 | tsf = ath9k_hw_gettsf64(ah); |
5379c8a2 | 586 | tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE; |
267a9012 JM |
587 | |
588 | num_beacons = tsftu / intval + 1; | |
589 | offset = tsftu % intval; | |
590 | nexttbtt = tsftu - offset; | |
591 | if (offset) | |
5379c8a2 | 592 | nexttbtt += intval; |
267a9012 JM |
593 | |
594 | /* DTIM Beacon every dtimperiod Beacon */ | |
595 | dtim_dec_count = num_beacons % dtimperiod; | |
596 | /* CFP every cfpperiod DTIM Beacon */ | |
597 | cfp_dec_count = (num_beacons / dtimperiod) % cfpperiod; | |
598 | if (dtim_dec_count) | |
599 | cfp_dec_count++; | |
600 | ||
601 | dtimcount -= dtim_dec_count; | |
602 | if (dtimcount < 0) | |
603 | dtimcount += dtimperiod; | |
604 | ||
605 | cfpcount -= cfp_dec_count; | |
606 | if (cfpcount < 0) | |
607 | cfpcount += cfpperiod; | |
5379c8a2 S |
608 | |
609 | bs.bs_intval = intval; | |
610 | bs.bs_nexttbtt = nexttbtt; | |
611 | bs.bs_dtimperiod = dtimperiod*intval; | |
612 | bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval; | |
613 | bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod; | |
614 | bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod; | |
615 | bs.bs_cfpmaxduration = 0; | |
616 | ||
617 | /* | |
618 | * Calculate the number of consecutive beacons to miss* before taking | |
619 | * a BMISS interrupt. The configuration is specified in TU so we only | |
620 | * need calculate based on the beacon interval. Note that we clamp the | |
621 | * result to at most 15 beacons. | |
622 | */ | |
623 | if (sleepduration > intval) { | |
624 | bs.bs_bmissthreshold = conf->listen_interval * | |
625 | ATH_DEFAULT_BMISS_LIMIT / 2; | |
f078f209 | 626 | } else { |
5379c8a2 S |
627 | bs.bs_bmissthreshold = DIV_ROUND_UP(conf->bmiss_timeout, intval); |
628 | if (bs.bs_bmissthreshold > 15) | |
629 | bs.bs_bmissthreshold = 15; | |
630 | else if (bs.bs_bmissthreshold <= 0) | |
631 | bs.bs_bmissthreshold = 1; | |
f078f209 LR |
632 | } |
633 | ||
5379c8a2 S |
634 | /* |
635 | * Calculate sleep duration. The configuration is given in ms. | |
636 | * We ensure a multiple of the beacon period is used. Also, if the sleep | |
637 | * duration is greater than the DTIM period then it makes senses | |
638 | * to make it a multiple of that. | |
639 | * | |
640 | * XXX fixed at 100ms | |
641 | */ | |
980b24da | 642 | |
5379c8a2 S |
643 | bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100), sleepduration); |
644 | if (bs.bs_sleepduration > bs.bs_dtimperiod) | |
645 | bs.bs_sleepduration = bs.bs_dtimperiod; | |
980b24da | 646 | |
5379c8a2 S |
647 | /* TSF out of range threshold fixed at 1 second */ |
648 | bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD; | |
f078f209 | 649 | |
226afe68 JP |
650 | ath_dbg(common, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu); |
651 | ath_dbg(common, ATH_DBG_BEACON, | |
652 | "bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n", | |
653 | bs.bs_bmissthreshold, bs.bs_sleepduration, | |
654 | bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext); | |
f078f209 | 655 | |
5379c8a2 | 656 | /* Set the computed STA beacon timers */ |
980b24da | 657 | |
4df3071e | 658 | ath9k_hw_disable_interrupts(ah); |
3069168c PR |
659 | ath9k_hw_set_sta_beacon_timers(ah, &bs); |
660 | ah->imask |= ATH9K_INT_BMISS; | |
661 | ath9k_hw_set_interrupts(ah, ah->imask); | |
5379c8a2 | 662 | } |
f078f209 | 663 | |
5379c8a2 S |
664 | static void ath_beacon_config_adhoc(struct ath_softc *sc, |
665 | struct ath_beacon_config *conf, | |
2c3db3d5 | 666 | struct ieee80211_vif *vif) |
5379c8a2 | 667 | { |
3069168c PR |
668 | struct ath_hw *ah = sc->sc_ah; |
669 | struct ath_common *common = ath9k_hw_common(ah); | |
5379c8a2 S |
670 | u64 tsf; |
671 | u32 tsftu, intval, nexttbtt; | |
f078f209 | 672 | |
5379c8a2 | 673 | intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; |
f078f209 | 674 | |
546256fb | 675 | |
5379c8a2 | 676 | /* Pull nexttbtt forward to reflect the current TSF */ |
4af9cf4f | 677 | |
5379c8a2 S |
678 | nexttbtt = TSF_TO_TU(sc->beacon.bc_tstamp >> 32, sc->beacon.bc_tstamp); |
679 | if (nexttbtt == 0) | |
680 | nexttbtt = intval; | |
681 | else if (intval) | |
682 | nexttbtt = roundup(nexttbtt, intval); | |
9fc9ab0a | 683 | |
3069168c | 684 | tsf = ath9k_hw_gettsf64(ah); |
5379c8a2 S |
685 | tsftu = TSF_TO_TU((u32)(tsf>>32), (u32)tsf) + FUDGE; |
686 | do { | |
687 | nexttbtt += intval; | |
688 | } while (nexttbtt < tsftu); | |
f078f209 | 689 | |
226afe68 JP |
690 | ath_dbg(common, ATH_DBG_BEACON, |
691 | "IBSS nexttbtt %u intval %u (%u)\n", | |
692 | nexttbtt, intval, conf->beacon_interval); | |
9fc9ab0a | 693 | |
5379c8a2 S |
694 | /* |
695 | * In IBSS mode enable the beacon timers but only enable SWBA interrupts | |
696 | * if we need to manually prepare beacon frames. Otherwise we use a | |
697 | * self-linked tx descriptor and let the hardware deal with things. | |
698 | */ | |
699 | intval |= ATH9K_BEACON_ENA; | |
a65e4cb4 | 700 | ah->imask |= ATH9K_INT_SWBA; |
9fc9ab0a | 701 | |
5379c8a2 S |
702 | ath_beaconq_config(sc); |
703 | ||
704 | /* Set the computed ADHOC beacon timers */ | |
705 | ||
4df3071e | 706 | ath9k_hw_disable_interrupts(ah); |
21526d57 | 707 | ath9k_beacon_init(sc, nexttbtt, intval); |
5379c8a2 | 708 | sc->beacon.bmisscnt = 0; |
3069168c | 709 | ath9k_hw_set_interrupts(ah, ah->imask); |
f078f209 LR |
710 | } |
711 | ||
2c3db3d5 | 712 | void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif) |
f078f209 | 713 | { |
6b96f93e | 714 | struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf; |
c46917bb | 715 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
6b96f93e | 716 | enum nl80211_iftype iftype; |
5379c8a2 S |
717 | |
718 | /* Setup the beacon configuration parameters */ | |
2c3db3d5 | 719 | if (vif) { |
6b96f93e VT |
720 | struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; |
721 | ||
722 | iftype = vif->type; | |
5379c8a2 | 723 | |
6b96f93e VT |
724 | cur_conf->beacon_interval = bss_conf->beacon_int; |
725 | cur_conf->dtim_period = bss_conf->dtim_period; | |
726 | cur_conf->listen_interval = 1; | |
727 | cur_conf->dtim_count = 1; | |
728 | cur_conf->bmiss_timeout = | |
729 | ATH_DEFAULT_BMISS_LIMIT * cur_conf->beacon_interval; | |
730 | } else { | |
731 | iftype = sc->sc_ah->opmode; | |
5379c8a2 | 732 | } |
6b96f93e | 733 | |
c4f9f16b VT |
734 | /* |
735 | * It looks like mac80211 may end up using beacon interval of zero in | |
736 | * some cases (at least for mesh point). Avoid getting into an | |
737 | * infinite loop by using a bit safer value instead. To be safe, | |
738 | * do sanity check on beacon interval for all operating modes. | |
739 | */ | |
740 | if (cur_conf->beacon_interval == 0) | |
741 | cur_conf->beacon_interval = 100; | |
6b96f93e VT |
742 | |
743 | switch (iftype) { | |
744 | case NL80211_IFTYPE_AP: | |
745 | ath_beacon_config_ap(sc, cur_conf); | |
746 | break; | |
747 | case NL80211_IFTYPE_ADHOC: | |
748 | case NL80211_IFTYPE_MESH_POINT: | |
749 | ath_beacon_config_adhoc(sc, cur_conf, vif); | |
750 | break; | |
751 | case NL80211_IFTYPE_STATION: | |
752 | ath_beacon_config_sta(sc, cur_conf); | |
753 | break; | |
754 | default: | |
226afe68 JP |
755 | ath_dbg(common, ATH_DBG_CONFIG, |
756 | "Unsupported beaconing mode\n"); | |
6b96f93e VT |
757 | return; |
758 | } | |
759 | ||
760 | sc->sc_flags |= SC_OP_BEACONS; | |
f078f209 | 761 | } |