[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / btcoex.c

/*
 * Copyright (c) 2009-2011 Atheros Communications Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <linux/export.h>
#include "hw.h"

enum ath_bt_mode {
	ATH_BT_COEX_MODE_LEGACY,        /* legacy rx_clear mode */
	ATH_BT_COEX_MODE_UNSLOTTED,     /* untimed/unslotted mode */
	ATH_BT_COEX_MODE_SLOTTED,       /* slotted mode */
	ATH_BT_COEX_MODE_DISABLED,      /* coexistence disabled */
};

struct ath_btcoex_config {
	u8 bt_time_extend;
	bool bt_txstate_extend;
	bool bt_txframe_extend;
	enum ath_bt_mode bt_mode; /* coexistence mode */
	bool bt_quiet_collision;
	bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
	u8 bt_priority_time;
	u8 bt_first_slot_time;
	bool bt_hold_rx_clear;
};

static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
				    [AR9300_NUM_WLAN_WEIGHTS] = {
	{ 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
	{ 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
};

static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
				 [AR9300_NUM_WLAN_WEIGHTS] = {
	{ 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
	{ 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
	{ 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
	{ 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
	{ 0xffffff01, 0xffffffff, 0xffffff01, 0xffffffff }, /* STOMP_AUDIO */
};

void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	const struct ath_btcoex_config ath_bt_config = {
		.bt_time_extend = 0,
		.bt_txstate_extend = true,
		.bt_txframe_extend = true,
		.bt_mode = ATH_BT_COEX_MODE_SLOTTED,
		.bt_quiet_collision = true,
		.bt_rxclear_polarity = true,
		.bt_priority_time = 2,
		.bt_first_slot_time = 5,
		.bt_hold_rx_clear = true,
	};
	u32 i, idx;
	bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;

	if (AR_SREV_9300_20_OR_LATER(ah))
		rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;

	btcoex_hw->bt_coex_mode =
		(btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
		SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
		SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
		SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
		SM(ath_bt_config.bt_mode, AR_BT_MODE) |
		SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
		SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
		SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
		SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
		SM(qnum, AR_BT_QCU_THRESH);

	btcoex_hw->bt_coex_mode2 =
		SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
		SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
		AR_BT_DISABLE_BT_ANT;

	for (i = 0; i < 32; i++) {
		idx = (debruijn32 << i) >> 27;
		ah->hw_gen_timers.gen_timer_index[idx] = i;
	}
}
EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);

void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
{
	struct ath_common *common = ath9k_hw_common(ah);
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/*
	 * Check if BTCOEX is globally disabled.
	 */
	if (!common->btcoex_enabled) {
		btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
		return;
	}

	if (AR_SREV_9300_20_OR_LATER(ah)) {
		btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
		btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9300;
		btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9300;
		btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9300;
	} else if (AR_SREV_9280_20_OR_LATER(ah)) {
		btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9280;
		btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9280;

		if (AR_SREV_9285(ah)) {
			btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
			btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9285;
		} else {
			btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
		}
	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);

void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/* connect bt_active to baseband */
	REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
		    (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
		     AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));

	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
		    AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);

	/* Set input mux for bt_active to gpio pin */
	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
		      AR_GPIO_INPUT_MUX1_BT_ACTIVE,
		      btcoex_hw->btactive_gpio);

	/* Configure the desired gpio port for input */
	ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);

void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/* btcoex 3-wire */
	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
			(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
			 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));

	/* Set input mux for bt_prority_async and
	 *                  bt_active_async to GPIO pins */
	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
			AR_GPIO_INPUT_MUX1_BT_ACTIVE,
			btcoex_hw->btactive_gpio);

	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
			AR_GPIO_INPUT_MUX1_BT_PRIORITY,
			btcoex_hw->btpriority_gpio);

	/* Configure the desired GPIO ports for input */

	ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
	ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);

void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
{
	ah->btcoex_hw.mci.ready = false;
	ah->btcoex_hw.mci.bt_state = 0;
	ah->btcoex_hw.mci.bt_ver_major = 3;
	ah->btcoex_hw.mci.bt_ver_minor = 0;
	ah->btcoex_hw.mci.bt_version_known = false;
	ah->btcoex_hw.mci.update_2g5g = true;
	ah->btcoex_hw.mci.is_2g = true;
	ah->btcoex_hw.mci.wlan_channels_update = false;
	ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
	ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
	ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
	ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
	ah->btcoex_hw.mci.query_bt = true;
	ah->btcoex_hw.mci.unhalt_bt_gpm = true;
	ah->btcoex_hw.mci.halted_bt_gpm = false;
	ah->btcoex_hw.mci.need_flush_btinfo = false;
	ah->btcoex_hw.mci.wlan_cal_seq = 0;
	ah->btcoex_hw.mci.wlan_cal_done = 0;
	ah->btcoex_hw.mci.config = (AR_SREV_9462(ah)) ? 0x2201 : 0xa4c1;
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);

static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/* Configure the desired GPIO port for TX_FRAME output */
	ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
			    AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
}

/*
 * For AR9002, bt_weight/wlan_weight are used.
 * For AR9003 and above, stomp_type is used.
 */
void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
				u32 bt_weight,
				u32 wlan_weight,
				enum ath_stomp_type stomp_type)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
	u8 txprio_shift[] = { 24, 16, 16, 0 }; /* tx priority weight */
	bool concur_tx = (mci_hw->concur_tx && btcoex_hw->tx_prio[stomp_type]);
	const u32 *weight = ar9003_wlan_weights[stomp_type];
	int i;

	if (!AR_SREV_9300_20_OR_LATER(ah)) {
		btcoex_hw->bt_coex_weights =
			SM(bt_weight, AR_BTCOEX_BT_WGHT) |
			SM(wlan_weight, AR_BTCOEX_WL_WGHT);
		return;
	}

	if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
		enum ath_stomp_type stype =
			((stomp_type == ATH_BTCOEX_STOMP_LOW) &&
			 btcoex_hw->mci.stomp_ftp) ?
			ATH_BTCOEX_STOMP_LOW_FTP : stomp_type;
		weight = mci_wlan_weights[stype];
	}

	for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
		btcoex_hw->bt_weight[i] = AR9300_BT_WGHT;
		btcoex_hw->wlan_weight[i] = weight[i];
		if (concur_tx && i) {
			btcoex_hw->wlan_weight[i] &=
				~(0xff << txprio_shift[i-1]);
			btcoex_hw->wlan_weight[i] |=
				(btcoex_hw->tx_prio[stomp_type] <<
				 txprio_shift[i-1]);
		}
	}
	/* Last WLAN weight has to be adjusted wrt tx priority */
	if (concur_tx) {
		btcoex_hw->wlan_weight[i-1] &= ~(0xff << txprio_shift[i-1]);
		btcoex_hw->wlan_weight[i-1] |= (btcoex_hw->tx_prio[stomp_type]
						      << txprio_shift[i-1]);
	}

}
EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);


static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	u32  val;
	int i;

	/*
	 * Program coex mode and weight registers to
	 * enable coex 3-wire
	 */
	REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
	REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);


	if (AR_SREV_9300_20_OR_LATER(ah)) {
		REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
		REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
		for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
			REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
				  btcoex->bt_weight[i]);
	} else
		REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);


	if (AR_SREV_9271(ah)) {
		val = REG_READ(ah, 0x50040);
		val &= 0xFFFFFEFF;
		REG_WRITE(ah, 0x50040, val);
	}

	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);

	ath9k_hw_cfg_output(ah, btcoex->wlanactive_gpio,
			    AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
}

static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	int i;

	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
		REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
			  btcoex->wlan_weight[i]);

	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	btcoex->enabled = true;
}

void ath9k_hw_btcoex_enable(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	switch (ath9k_hw_get_btcoex_scheme(ah)) {
	case ATH_BTCOEX_CFG_NONE:
		return;
	case ATH_BTCOEX_CFG_2WIRE:
		ath9k_hw_btcoex_enable_2wire(ah);
		break;
	case ATH_BTCOEX_CFG_3WIRE:
		if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
			ath9k_hw_btcoex_enable_mci(ah);
			return;
		}
		ath9k_hw_btcoex_enable_3wire(ah);
		break;
	}

	REG_RMW(ah, AR_GPIO_PDPU,
		(0x2 << (btcoex_hw->btactive_gpio * 2)),
		(0x3 << (btcoex_hw->btactive_gpio * 2)));

	ah->btcoex_hw.enabled = true;
}
EXPORT_SYMBOL(ath9k_hw_btcoex_enable);

void ath9k_hw_btcoex_disable(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	int i;

	btcoex_hw->enabled = false;
	if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
		ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
		for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
			REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
				  btcoex_hw->wlan_weight[i]);
		return;
	}
	ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);

	ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
			AR_GPIO_OUTPUT_MUX_AS_OUTPUT);

	if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
		REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
		REG_WRITE(ah, AR_BT_COEX_MODE2, 0);

		if (AR_SREV_9300_20_OR_LATER(ah)) {
			REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
			REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
			for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
				REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
		} else
			REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);

	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_disable);

/*
 * Configures appropriate weight based on stomp type.
 */
void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
			      enum ath_stomp_type stomp_type)
{
	if (AR_SREV_9300_20_OR_LATER(ah)) {
		ath9k_hw_btcoex_set_weight(ah, 0, 0, stomp_type);
		return;
	}

	switch (stomp_type) {
	case ATH_BTCOEX_STOMP_ALL:
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
					   AR_STOMP_ALL_WLAN_WGHT, 0);
		break;
	case ATH_BTCOEX_STOMP_LOW:
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
					   AR_STOMP_LOW_WLAN_WGHT, 0);
		break;
	case ATH_BTCOEX_STOMP_NONE:
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
					   AR_STOMP_NONE_WLAN_WGHT, 0);
		break;
	default:
		ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
		break;
	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);

void ath9k_hw_btcoex_set_concur_txprio(struct ath_hw *ah, u8 *stomp_txprio)
{
	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	int i;

	for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
		btcoex->tx_prio[i] = stomp_txprio[i];
}
EXPORT_SYMBOL(ath9k_hw_btcoex_set_concur_txprio);
Commit	Line	Data
17d50d1d	1	/*
5b68138e	2	* Copyright (c) 2009-2011 Atheros Communications Inc.
17d50d1d VT	3	*
	4	* Permission to use, copy, modify, and/or distribute this software for any
	5	* purpose with or without fee is hereby granted, provided that the above
	6	* copyright notice and this permission notice appear in all copies.
	7	*
	8	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	9	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	10	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
	11	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	12	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
	13	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
	14	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	15	*/
	16
ee40fa06	17	#include <linux/export.h>
cfe8cba9	18	#include "hw.h"
17d50d1d	19
8b4fc5ba LR	20	enum ath_bt_mode {
	21	ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */
	22	ATH_BT_COEX_MODE_UNSLOTTED, /* untimed/unslotted mode */
	23	ATH_BT_COEX_MODE_SLOTTED, /* slotted mode */
32b1076d	24	ATH_BT_COEX_MODE_DISABLED, /* coexistence disabled */
8b4fc5ba LR	25	};
	26
	27	struct ath_btcoex_config {
	28	u8 bt_time_extend;
	29	bool bt_txstate_extend;
	30	bool bt_txframe_extend;
	31	enum ath_bt_mode bt_mode; /* coexistence mode */
	32	bool bt_quiet_collision;
	33	bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
	34	u8 bt_priority_time;
	35	u8 bt_first_slot_time;
	36	bool bt_hold_rx_clear;
	37	};
1773912b	38
54f10b05 RM	39	static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
	40	[AR9300_NUM_WLAN_WEIGHTS] = {
	41	{ 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
	42	{ 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
	43	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
	44	};
1773912b	45
5160b46f SM	46	static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
5160b46f SM	47	[AR9300_NUM_WLAN_WEIGHTS] = {
8227bf45 RM	48	{ 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
	49	{ 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
	50	{ 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
	51	{ 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
2884561a	52	{ 0xffffff01, 0xffffffff, 0xffffff01, 0xffffffff }, /* STOMP_AUDIO */
8227bf45 RM	53	};
8227bf45 RM	54
766ec4a9	55	void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
af03abec	56	{
766ec4a9	57	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
8b4fc5ba LR	58	const struct ath_btcoex_config ath_bt_config = {
	59	.bt_time_extend = 0,
	60	.bt_txstate_extend = true,
	61	.bt_txframe_extend = true,
	62	.bt_mode = ATH_BT_COEX_MODE_SLOTTED,
	63	.bt_quiet_collision = true,
	64	.bt_rxclear_polarity = true,
	65	.bt_priority_time = 2,
	66	.bt_first_slot_time = 5,
	67	.bt_hold_rx_clear = true,
	68	};
02c5172c	69	u32 i, idx;
a6ef530f VN	70	bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
	71
	72	if (AR_SREV_9300_20_OR_LATER(ah))
	73	rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
1773912b	74
766ec4a9 LR	75	btcoex_hw->bt_coex_mode =
766ec4a9 LR	76	(btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) \|
1773912b VT	77	SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) \|
	78	SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) \|
	79	SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) \|
	80	SM(ath_bt_config.bt_mode, AR_BT_MODE) \|
	81	SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) \|
a6ef530f	82	SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) \|
1773912b VT	83	SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) \|
	84	SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) \|
	85	SM(qnum, AR_BT_QCU_THRESH);
	86
766ec4a9	87	btcoex_hw->bt_coex_mode2 =
1773912b VT	88	SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) \|
	89	SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) \|
	90	AR_BT_DISABLE_BT_ANT;
	91
02c5172c RM	92	for (i = 0; i < 32; i++) {
	93	idx = (debruijn32 << i) >> 27;
	94	ah->hw_gen_timers.gen_timer_index[idx] = i;
	95	}
1773912b	96	}
7322fd19	97	EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
1773912b	98
d68475de SM	99	void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
	100	{
	101	struct ath_common *common = ath9k_hw_common(ah);
	102	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	103
	104	/*
	105	* Check if BTCOEX is globally disabled.
	106	*/
	107	if (!common->btcoex_enabled) {
	108	btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
	109	return;
	110	}
	111
0466e254	112	if (AR_SREV_9300_20_OR_LATER(ah)) {
d68475de SM	113	btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
	114	btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9300;
	115	btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9300;
	116	btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9300;
	117	} else if (AR_SREV_9280_20_OR_LATER(ah)) {
	118	btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9280;
	119	btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9280;
	120
	121	if (AR_SREV_9285(ah)) {
	122	btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
	123	btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9285;
	124	} else {
	125	btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
	126	}
	127	}
	128	}
	129	EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);
	130
75d7839f	131	void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
17d50d1d	132	{
766ec4a9	133	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
1773912b	134
7a2f0f58 LR	135	/* connect bt_active to baseband */
	136	REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
	137	(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF \|
	138	AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
1773912b	139
7a2f0f58 LR	140	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
7a2f0f58 LR	141	AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
1773912b	142
7a2f0f58 LR	143	/* Set input mux for bt_active to gpio pin */
	144	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
	145	AR_GPIO_INPUT_MUX1_BT_ACTIVE,
766ec4a9	146	btcoex_hw->btactive_gpio);
f14462c6	147
7a2f0f58	148	/* Configure the desired gpio port for input */
766ec4a9	149	ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
7a2f0f58	150	}
7322fd19	151	EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
7a2f0f58	152
75d7839f	153	void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
7a2f0f58	154	{
766ec4a9	155	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
17d50d1d	156
7a2f0f58 LR	157	/* btcoex 3-wire */
	158	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
	159	(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB \|
	160	AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
17d50d1d	161
7a2f0f58 LR	162	/* Set input mux for bt_prority_async and
	163	* bt_active_async to GPIO pins */
	164	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
	165	AR_GPIO_INPUT_MUX1_BT_ACTIVE,
766ec4a9	166	btcoex_hw->btactive_gpio);
17d50d1d	167
7a2f0f58 LR	168	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
7a2f0f58 LR	169	AR_GPIO_INPUT_MUX1_BT_PRIORITY,
766ec4a9	170	btcoex_hw->btpriority_gpio);
1773912b	171
7a2f0f58 LR	172	/* Configure the desired GPIO ports for input */
7a2f0f58 LR	173
766ec4a9 LR	174	ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
766ec4a9 LR	175	ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
7a2f0f58	176	}
7322fd19	177	EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
7a2f0f58	178
d3c83ac1 SM	179	void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
	180	{
	181	ah->btcoex_hw.mci.ready = false;
	182	ah->btcoex_hw.mci.bt_state = 0;
	183	ah->btcoex_hw.mci.bt_ver_major = 3;
	184	ah->btcoex_hw.mci.bt_ver_minor = 0;
	185	ah->btcoex_hw.mci.bt_version_known = false;
	186	ah->btcoex_hw.mci.update_2g5g = true;
	187	ah->btcoex_hw.mci.is_2g = true;
	188	ah->btcoex_hw.mci.wlan_channels_update = false;
	189	ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
	190	ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
	191	ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
	192	ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
	193	ah->btcoex_hw.mci.query_bt = true;
	194	ah->btcoex_hw.mci.unhalt_bt_gpm = true;
	195	ah->btcoex_hw.mci.halted_bt_gpm = false;
	196	ah->btcoex_hw.mci.need_flush_btinfo = false;
	197	ah->btcoex_hw.mci.wlan_cal_seq = 0;
	198	ah->btcoex_hw.mci.wlan_cal_done = 0;
3c5c9d04	199	ah->btcoex_hw.mci.config = (AR_SREV_9462(ah)) ? 0x2201 : 0xa4c1;
d3c83ac1 SM	200	}
	201	EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);
	202
bc74bf8f LR	203	static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
bc74bf8f LR	204	{
766ec4a9	205	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
bc74bf8f LR	206
bc74bf8f LR	207	/* Configure the desired GPIO port for TX_FRAME output */
766ec4a9	208	ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
bc74bf8f LR	209	AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
	210	}
	211
5160b46f SM	212	/*
	213	* For AR9002, bt_weight/wlan_weight are used.
	214	* For AR9003 and above, stomp_type is used.
	215	*/
5e197292 LR	216	void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
5e197292 LR	217	u32 bt_weight,
5160b46f SM	218	u32 wlan_weight,
5160b46f SM	219	enum ath_stomp_type stomp_type)
5e197292 LR	220	{
5e197292 LR	221	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
db60428b RM	222	struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
	223	u8 txprio_shift[] = { 24, 16, 16, 0 }; /* tx priority weight */
	224	bool concur_tx = (mci_hw->concur_tx && btcoex_hw->tx_prio[stomp_type]);
	225	const u32 *weight = ar9003_wlan_weights[stomp_type];
	226	int i;
5e197292	227
db60428b	228	if (!AR_SREV_9300_20_OR_LATER(ah)) {
5160b46f SM	229	btcoex_hw->bt_coex_weights =
	230	SM(bt_weight, AR_BTCOEX_BT_WGHT) \|
	231	SM(wlan_weight, AR_BTCOEX_WL_WGHT);
db60428b RM	232	return;
	233	}
	234
	235	if (AR_SREV_9462(ah) \|\| AR_SREV_9565(ah)) {
	236	enum ath_stomp_type stype =
	237	((stomp_type == ATH_BTCOEX_STOMP_LOW) &&
	238	btcoex_hw->mci.stomp_ftp) ?
	239	ATH_BTCOEX_STOMP_LOW_FTP : stomp_type;
	240	weight = mci_wlan_weights[stype];
5160b46f	241	}
db60428b RM	242
	243	for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
	244	btcoex_hw->bt_weight[i] = AR9300_BT_WGHT;
	245	btcoex_hw->wlan_weight[i] = weight[i];
	246	if (concur_tx && i) {
	247	btcoex_hw->wlan_weight[i] &=
	248	~(0xff << txprio_shift[i-1]);
	249	btcoex_hw->wlan_weight[i] \|=
	250	(btcoex_hw->tx_prio[stomp_type] <<
	251	txprio_shift[i-1]);
	252	}
	253	}
	254	/* Last WLAN weight has to be adjusted wrt tx priority */
	255	if (concur_tx) {
	256	btcoex_hw->wlan_weight[i-1] &= ~(0xff << txprio_shift[i-1]);
	257	btcoex_hw->wlan_weight[i-1] \|= (btcoex_hw->tx_prio[stomp_type]
	258	<< txprio_shift[i-1]);
	259	}
	260
5e197292	261	}
7322fd19	262	EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
5e197292	263
a6ef530f	264
bc74bf8f LR	265	static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
bc74bf8f LR	266	{
54f10b05	267	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
21cb9879	268	u32 val;
54f10b05	269	int i;
bc74bf8f LR	270
	271	/*
	272	* Program coex mode and weight registers to
	273	* enable coex 3-wire
	274	*/
54f10b05 RM	275	REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
54f10b05 RM	276	REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
bc74bf8f	277
a6ef530f VN	278
a6ef530f VN	279	if (AR_SREV_9300_20_OR_LATER(ah)) {
54f10b05 RM	280	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
	281	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
	282	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	283	REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
	284	btcoex->bt_weight[i]);
a6ef530f	285	} else
54f10b05	286	REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
a6ef530f VN	287
	288
	289
21cb9879 VN	290	if (AR_SREV_9271(ah)) {
	291	val = REG_READ(ah, 0x50040);
	292	val &= 0xFFFFFEFF;
	293	REG_WRITE(ah, 0x50040, val);
	294	}
	295
bc74bf8f LR	296	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	297	REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
	298
54f10b05	299	ath9k_hw_cfg_output(ah, btcoex->wlanactive_gpio,
bc74bf8f LR	300	AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
	301	}
	302
8227bf45 RM	303	static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
	304	{
	305	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	306	int i;
	307
	308	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	309	REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
	310	btcoex->wlan_weight[i]);
	311
	312	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	313	btcoex->enabled = true;
	314	}
	315
17d50d1d VT	316	void ath9k_hw_btcoex_enable(struct ath_hw *ah)
17d50d1d VT	317	{
766ec4a9	318	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
f14462c6	319
8a309305	320	switch (ath9k_hw_get_btcoex_scheme(ah)) {
bc74bf8f	321	case ATH_BTCOEX_CFG_NONE:
8a309305	322	return;
bc74bf8f LR	323	case ATH_BTCOEX_CFG_2WIRE:
	324	ath9k_hw_btcoex_enable_2wire(ah);
	325	break;
	326	case ATH_BTCOEX_CFG_3WIRE:
6a73f507	327	if (AR_SREV_9462(ah) \|\| AR_SREV_9565(ah)) {
0466e254 RM	328	ath9k_hw_btcoex_enable_mci(ah);
	329	return;
	330	}
bc74bf8f LR	331	ath9k_hw_btcoex_enable_3wire(ah);
bc74bf8f LR	332	break;
1773912b VT	333	}
	334
	335	REG_RMW(ah, AR_GPIO_PDPU,
766ec4a9 LR	336	(0x2 << (btcoex_hw->btactive_gpio * 2)),
766ec4a9 LR	337	(0x3 << (btcoex_hw->btactive_gpio * 2)));
17d50d1d	338
766ec4a9	339	ah->btcoex_hw.enabled = true;
17d50d1d	340	}
7322fd19	341	EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
17d50d1d VT	342
	343	void ath9k_hw_btcoex_disable(struct ath_hw *ah)
	344	{
766ec4a9	345	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
54f10b05	346	int i;
f14462c6	347
8227bf45	348	btcoex_hw->enabled = false;
6a73f507	349	if (AR_SREV_9462(ah) \|\| AR_SREV_9565(ah)) {
8227bf45 RM	350	ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
	351	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	352	REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
	353	btcoex_hw->wlan_weight[i]);
0466e254	354	return;
8227bf45	355	}
766ec4a9	356	ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
17d50d1d	357
766ec4a9	358	ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
17d50d1d VT	359	AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
17d50d1d VT	360
766ec4a9	361	if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
1773912b	362	REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET \| AR_BT_MODE);
1773912b	363	REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
a6ef530f VN	364
	365	if (AR_SREV_9300_20_OR_LATER(ah)) {
	366	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
	367	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
54f10b05 RM	368	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
54f10b05 RM	369	REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
a6ef530f VN	370	} else
	371	REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
	372
1773912b	373	}
17d50d1d	374	}
7322fd19	375	EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
978f78bf	376
978f78bf VN	377	/*
	378	* Configures appropriate weight based on stomp type.
	379	*/
	380	void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
	381	enum ath_stomp_type stomp_type)
	382	{
	383	if (AR_SREV_9300_20_OR_LATER(ah)) {
5160b46f	384	ath9k_hw_btcoex_set_weight(ah, 0, 0, stomp_type);
978f78bf VN	385	return;
	386	}
	387
	388	switch (stomp_type) {
	389	case ATH_BTCOEX_STOMP_ALL:
	390	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
5160b46f	391	AR_STOMP_ALL_WLAN_WGHT, 0);
978f78bf VN	392	break;
	393	case ATH_BTCOEX_STOMP_LOW:
	394	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
5160b46f	395	AR_STOMP_LOW_WLAN_WGHT, 0);
978f78bf VN	396	break;
	397	case ATH_BTCOEX_STOMP_NONE:
	398	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
5160b46f	399	AR_STOMP_NONE_WLAN_WGHT, 0);
978f78bf VN	400	break;
978f78bf VN	401	default:
d2182b69	402	ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
978f78bf VN	403	break;
978f78bf VN	404	}
978f78bf VN	405	}
978f78bf VN	406	EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);
db60428b RM	407
	408	void ath9k_hw_btcoex_set_concur_txprio(struct ath_hw ah, u8 stomp_txprio)
	409	{
	410	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	411	int i;
	412
	413	for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
	414	btcoex->tx_prio[i] = stomp_txprio[i];
	415	}
	416	EXPORT_SYMBOL(ath9k_hw_btcoex_set_concur_txprio);