[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / btcoex.c

/*
 * Copyright (c) 2009-2011 Atheros Communications Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <linux/export.h>
#include "hw.h"

enum ath_bt_mode {
	ATH_BT_COEX_MODE_LEGACY,        /* legacy rx_clear mode */
	ATH_BT_COEX_MODE_UNSLOTTED,     /* untimed/unslotted mode */
	ATH_BT_COEX_MODE_SLOTTED,       /* slotted mode */
	ATH_BT_COEX_MODE_DISABLED,      /* coexistence disabled */
};

struct ath_btcoex_config {
	u8 bt_time_extend;
	bool bt_txstate_extend;
	bool bt_txframe_extend;
	enum ath_bt_mode bt_mode; /* coexistence mode */
	bool bt_quiet_collision;
	bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
	u8 bt_priority_time;
	u8 bt_first_slot_time;
	bool bt_hold_rx_clear;
};

static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
				    [AR9300_NUM_WLAN_WEIGHTS] = {
	{ 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
	{ 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
};

static const u32 ar9462_wlan_weights[ATH_BTCOEX_STOMP_MAX]
				    [AR9300_NUM_WLAN_WEIGHTS] = {
	{ 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
	{ 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
	{ 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
	{ 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
};

void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	const struct ath_btcoex_config ath_bt_config = {
		.bt_time_extend = 0,
		.bt_txstate_extend = true,
		.bt_txframe_extend = true,
		.bt_mode = ATH_BT_COEX_MODE_SLOTTED,
		.bt_quiet_collision = true,
		.bt_rxclear_polarity = true,
		.bt_priority_time = 2,
		.bt_first_slot_time = 5,
		.bt_hold_rx_clear = true,
	};
	u32 i, idx;
	bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;

	if (AR_SREV_9300_20_OR_LATER(ah))
		rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;

	btcoex_hw->bt_coex_mode =
		(btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
		SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
		SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
		SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
		SM(ath_bt_config.bt_mode, AR_BT_MODE) |
		SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
		SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
		SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
		SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
		SM(qnum, AR_BT_QCU_THRESH);

	btcoex_hw->bt_coex_mode2 =
		SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
		SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
		AR_BT_DISABLE_BT_ANT;

	for (i = 0; i < 32; i++) {
		idx = (debruijn32 << i) >> 27;
		ah->hw_gen_timers.gen_timer_index[idx] = i;
	}
}
EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);

void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
{
	struct ath_common *common = ath9k_hw_common(ah);
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/*
	 * Check if BTCOEX is globally disabled.
	 */
	if (!common->btcoex_enabled) {
		btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
		return;
	}

	if (AR_SREV_9462(ah)) {
		btcoex_hw->scheme = ATH_BTCOEX_CFG_MCI;
	} else if (AR_SREV_9300_20_OR_LATER(ah)) {
		btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
		btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9300;
		btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9300;
		btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9300;
	} else if (AR_SREV_9280_20_OR_LATER(ah)) {
		btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9280;
		btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9280;

		if (AR_SREV_9285(ah)) {
			btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
			btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9285;
		} else {
			btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
		}
	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);

void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/* connect bt_active to baseband */
	REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
		    (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
		     AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));

	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
		    AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);

	/* Set input mux for bt_active to gpio pin */
	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
		      AR_GPIO_INPUT_MUX1_BT_ACTIVE,
		      btcoex_hw->btactive_gpio);

	/* Configure the desired gpio port for input */
	ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);

void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/* btcoex 3-wire */
	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
			(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
			 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));

	/* Set input mux for bt_prority_async and
	 *                  bt_active_async to GPIO pins */
	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
			AR_GPIO_INPUT_MUX1_BT_ACTIVE,
			btcoex_hw->btactive_gpio);

	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
			AR_GPIO_INPUT_MUX1_BT_PRIORITY,
			btcoex_hw->btpriority_gpio);

	/* Configure the desired GPIO ports for input */

	ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
	ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);

void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
{
	ah->btcoex_hw.mci.ready = false;
	ah->btcoex_hw.mci.bt_state = 0;
	ah->btcoex_hw.mci.bt_ver_major = 3;
	ah->btcoex_hw.mci.bt_ver_minor = 0;
	ah->btcoex_hw.mci.bt_version_known = false;
	ah->btcoex_hw.mci.update_2g5g = true;
	ah->btcoex_hw.mci.is_2g = true;
	ah->btcoex_hw.mci.wlan_channels_update = false;
	ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
	ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
	ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
	ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
	ah->btcoex_hw.mci.query_bt = true;
	ah->btcoex_hw.mci.unhalt_bt_gpm = true;
	ah->btcoex_hw.mci.halted_bt_gpm = false;
	ah->btcoex_hw.mci.need_flush_btinfo = false;
	ah->btcoex_hw.mci.wlan_cal_seq = 0;
	ah->btcoex_hw.mci.wlan_cal_done = 0;
	ah->btcoex_hw.mci.config = 0x2201;
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);

static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/* Configure the desired GPIO port for TX_FRAME output */
	ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
			    AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
}

void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
				u32 bt_weight,
				u32 wlan_weight)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	btcoex_hw->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) |
				     SM(wlan_weight, AR_BTCOEX_WL_WGHT);
}
EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);


static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	u32  val;
	int i;

	/*
	 * Program coex mode and weight registers to
	 * enable coex 3-wire
	 */
	REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
	REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);


	if (AR_SREV_9300_20_OR_LATER(ah)) {
		REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
		REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
		for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
			REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
				  btcoex->bt_weight[i]);
	} else
		REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);


	if (AR_SREV_9271(ah)) {
		val = REG_READ(ah, 0x50040);
		val &= 0xFFFFFEFF;
		REG_WRITE(ah, 0x50040, val);
	}

	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);

	ath9k_hw_cfg_output(ah, btcoex->wlanactive_gpio,
			    AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
}

static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	int i;

	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
		REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
			  btcoex->wlan_weight[i]);

	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	btcoex->enabled = true;
}

void ath9k_hw_btcoex_enable(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	switch (ath9k_hw_get_btcoex_scheme(ah)) {
	case ATH_BTCOEX_CFG_NONE:
		return;
	case ATH_BTCOEX_CFG_2WIRE:
		ath9k_hw_btcoex_enable_2wire(ah);
		break;
	case ATH_BTCOEX_CFG_3WIRE:
		ath9k_hw_btcoex_enable_3wire(ah);
		break;
	case ATH_BTCOEX_CFG_MCI:
		ath9k_hw_btcoex_enable_mci(ah);
		return;
	}

	REG_RMW(ah, AR_GPIO_PDPU,
		(0x2 << (btcoex_hw->btactive_gpio * 2)),
		(0x3 << (btcoex_hw->btactive_gpio * 2)));

	ah->btcoex_hw.enabled = true;
}
EXPORT_SYMBOL(ath9k_hw_btcoex_enable);

void ath9k_hw_btcoex_disable(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	int i;

	btcoex_hw->enabled = false;
	if (btcoex_hw->scheme == ATH_BTCOEX_CFG_MCI) {
		ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
		for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
			REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
				  btcoex_hw->wlan_weight[i]);
	}
	ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);

	ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
			AR_GPIO_OUTPUT_MUX_AS_OUTPUT);

	if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
		REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
		REG_WRITE(ah, AR_BT_COEX_MODE2, 0);

		if (AR_SREV_9300_20_OR_LATER(ah)) {
			REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
			REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
			for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
				REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
		} else
			REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);

	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_disable);

static void ar9003_btcoex_bt_stomp(struct ath_hw *ah,
			 enum ath_stomp_type stomp_type)
{
	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	const u32 *weight = AR_SREV_9462(ah) ? ar9003_wlan_weights[stomp_type] :
					       ar9462_wlan_weights[stomp_type];
	int i;

	for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
		btcoex->bt_weight[i] = AR9300_BT_WGHT;
		btcoex->wlan_weight[i] = weight[i];
	}
}

/*
 * Configures appropriate weight based on stomp type.
 */
void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
			      enum ath_stomp_type stomp_type)
{
	if (AR_SREV_9300_20_OR_LATER(ah)) {
		ar9003_btcoex_bt_stomp(ah, stomp_type);
		return;
	}

	switch (stomp_type) {
	case ATH_BTCOEX_STOMP_ALL:
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
				AR_STOMP_ALL_WLAN_WGHT);
		break;
	case ATH_BTCOEX_STOMP_LOW:
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
				AR_STOMP_LOW_WLAN_WGHT);
		break;
	case ATH_BTCOEX_STOMP_NONE:
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
				AR_STOMP_NONE_WLAN_WGHT);
		break;
	default:
		ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
		break;
	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);
Commit	Line	Data
17d50d1d	1	/*
5b68138e	2	* Copyright (c) 2009-2011 Atheros Communications Inc.
17d50d1d VT	3	*
	4	* Permission to use, copy, modify, and/or distribute this software for any
	5	* purpose with or without fee is hereby granted, provided that the above
	6	* copyright notice and this permission notice appear in all copies.
	7	*
	8	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	9	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	10	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
	11	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	12	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
	13	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
	14	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	15	*/
	16
ee40fa06	17	#include <linux/export.h>
cfe8cba9	18	#include "hw.h"
17d50d1d	19
8b4fc5ba LR	20	enum ath_bt_mode {
	21	ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */
	22	ATH_BT_COEX_MODE_UNSLOTTED, /* untimed/unslotted mode */
	23	ATH_BT_COEX_MODE_SLOTTED, /* slotted mode */
32b1076d	24	ATH_BT_COEX_MODE_DISABLED, /* coexistence disabled */
8b4fc5ba LR	25	};
	26
	27	struct ath_btcoex_config {
	28	u8 bt_time_extend;
	29	bool bt_txstate_extend;
	30	bool bt_txframe_extend;
	31	enum ath_bt_mode bt_mode; /* coexistence mode */
	32	bool bt_quiet_collision;
	33	bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
	34	u8 bt_priority_time;
	35	u8 bt_first_slot_time;
	36	bool bt_hold_rx_clear;
	37	};
1773912b	38
54f10b05 RM	39	static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
	40	[AR9300_NUM_WLAN_WEIGHTS] = {
	41	{ 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
	42	{ 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
	43	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
	44	};
1773912b	45
8227bf45 RM	46	static const u32 ar9462_wlan_weights[ATH_BTCOEX_STOMP_MAX]
	47	[AR9300_NUM_WLAN_WEIGHTS] = {
	48	{ 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
	49	{ 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
	50	{ 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
	51	{ 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
	52	};
	53
766ec4a9	54	void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
af03abec	55	{
766ec4a9	56	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
8b4fc5ba LR	57	const struct ath_btcoex_config ath_bt_config = {
	58	.bt_time_extend = 0,
	59	.bt_txstate_extend = true,
	60	.bt_txframe_extend = true,
	61	.bt_mode = ATH_BT_COEX_MODE_SLOTTED,
	62	.bt_quiet_collision = true,
	63	.bt_rxclear_polarity = true,
	64	.bt_priority_time = 2,
	65	.bt_first_slot_time = 5,
	66	.bt_hold_rx_clear = true,
	67	};
02c5172c	68	u32 i, idx;
a6ef530f VN	69	bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
	70
	71	if (AR_SREV_9300_20_OR_LATER(ah))
	72	rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
1773912b	73
766ec4a9 LR	74	btcoex_hw->bt_coex_mode =
766ec4a9 LR	75	(btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) \|
1773912b VT	76	SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) \|
	77	SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) \|
	78	SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) \|
	79	SM(ath_bt_config.bt_mode, AR_BT_MODE) \|
	80	SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) \|
a6ef530f	81	SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) \|
1773912b VT	82	SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) \|
	83	SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) \|
	84	SM(qnum, AR_BT_QCU_THRESH);
	85
766ec4a9	86	btcoex_hw->bt_coex_mode2 =
1773912b VT	87	SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) \|
	88	SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) \|
	89	AR_BT_DISABLE_BT_ANT;
	90
02c5172c RM	91	for (i = 0; i < 32; i++) {
	92	idx = (debruijn32 << i) >> 27;
	93	ah->hw_gen_timers.gen_timer_index[idx] = i;
	94	}
1773912b	95	}
7322fd19	96	EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
1773912b	97
d68475de SM	98	void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
	99	{
	100	struct ath_common *common = ath9k_hw_common(ah);
	101	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	102
	103	/*
	104	* Check if BTCOEX is globally disabled.
	105	*/
	106	if (!common->btcoex_enabled) {
	107	btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
	108	return;
	109	}
	110
	111	if (AR_SREV_9462(ah)) {
	112	btcoex_hw->scheme = ATH_BTCOEX_CFG_MCI;
	113	} else if (AR_SREV_9300_20_OR_LATER(ah)) {
	114	btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
	115	btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9300;
	116	btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9300;
	117	btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9300;
	118	} else if (AR_SREV_9280_20_OR_LATER(ah)) {
	119	btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9280;
	120	btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9280;
	121
	122	if (AR_SREV_9285(ah)) {
	123	btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
	124	btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9285;
	125	} else {
	126	btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
	127	}
	128	}
	129	}
	130	EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);
	131
75d7839f	132	void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
17d50d1d	133	{
766ec4a9	134	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
1773912b	135
7a2f0f58 LR	136	/* connect bt_active to baseband */
	137	REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
	138	(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF \|
	139	AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
1773912b	140
7a2f0f58 LR	141	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
7a2f0f58 LR	142	AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
1773912b	143
7a2f0f58 LR	144	/* Set input mux for bt_active to gpio pin */
	145	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
	146	AR_GPIO_INPUT_MUX1_BT_ACTIVE,
766ec4a9	147	btcoex_hw->btactive_gpio);
f14462c6	148
7a2f0f58	149	/* Configure the desired gpio port for input */
766ec4a9	150	ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
7a2f0f58	151	}
7322fd19	152	EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
7a2f0f58	153
75d7839f	154	void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
7a2f0f58	155	{
766ec4a9	156	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
17d50d1d	157
7a2f0f58 LR	158	/* btcoex 3-wire */
	159	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
	160	(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB \|
	161	AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
17d50d1d	162
7a2f0f58 LR	163	/* Set input mux for bt_prority_async and
	164	* bt_active_async to GPIO pins */
	165	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
	166	AR_GPIO_INPUT_MUX1_BT_ACTIVE,
766ec4a9	167	btcoex_hw->btactive_gpio);
17d50d1d	168
7a2f0f58 LR	169	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
7a2f0f58 LR	170	AR_GPIO_INPUT_MUX1_BT_PRIORITY,
766ec4a9	171	btcoex_hw->btpriority_gpio);
1773912b	172
7a2f0f58 LR	173	/* Configure the desired GPIO ports for input */
7a2f0f58 LR	174
766ec4a9 LR	175	ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
766ec4a9 LR	176	ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
7a2f0f58	177	}
7322fd19	178	EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
7a2f0f58	179
d3c83ac1 SM	180	void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
	181	{
	182	ah->btcoex_hw.mci.ready = false;
	183	ah->btcoex_hw.mci.bt_state = 0;
	184	ah->btcoex_hw.mci.bt_ver_major = 3;
	185	ah->btcoex_hw.mci.bt_ver_minor = 0;
	186	ah->btcoex_hw.mci.bt_version_known = false;
	187	ah->btcoex_hw.mci.update_2g5g = true;
	188	ah->btcoex_hw.mci.is_2g = true;
	189	ah->btcoex_hw.mci.wlan_channels_update = false;
	190	ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
	191	ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
	192	ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
	193	ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
	194	ah->btcoex_hw.mci.query_bt = true;
	195	ah->btcoex_hw.mci.unhalt_bt_gpm = true;
	196	ah->btcoex_hw.mci.halted_bt_gpm = false;
	197	ah->btcoex_hw.mci.need_flush_btinfo = false;
	198	ah->btcoex_hw.mci.wlan_cal_seq = 0;
	199	ah->btcoex_hw.mci.wlan_cal_done = 0;
	200	ah->btcoex_hw.mci.config = 0x2201;
	201	}
	202	EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);
	203
bc74bf8f LR	204	static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
bc74bf8f LR	205	{
766ec4a9	206	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
bc74bf8f LR	207
bc74bf8f LR	208	/* Configure the desired GPIO port for TX_FRAME output */
766ec4a9	209	ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
bc74bf8f LR	210	AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
	211	}
	212
5e197292 LR	213	void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
	214	u32 bt_weight,
	215	u32 wlan_weight)
	216	{
	217	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	218
	219	btcoex_hw->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) \|
	220	SM(wlan_weight, AR_BTCOEX_WL_WGHT);
	221	}
7322fd19	222	EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
5e197292	223
a6ef530f	224
bc74bf8f LR	225	static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
bc74bf8f LR	226	{
54f10b05	227	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
21cb9879	228	u32 val;
54f10b05	229	int i;
bc74bf8f LR	230
	231	/*
	232	* Program coex mode and weight registers to
	233	* enable coex 3-wire
	234	*/
54f10b05 RM	235	REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
54f10b05 RM	236	REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
bc74bf8f	237
a6ef530f VN	238
a6ef530f VN	239	if (AR_SREV_9300_20_OR_LATER(ah)) {
54f10b05 RM	240	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
	241	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
	242	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	243	REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
	244	btcoex->bt_weight[i]);
a6ef530f	245	} else
54f10b05	246	REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
a6ef530f VN	247
	248
	249
21cb9879 VN	250	if (AR_SREV_9271(ah)) {
	251	val = REG_READ(ah, 0x50040);
	252	val &= 0xFFFFFEFF;
	253	REG_WRITE(ah, 0x50040, val);
	254	}
	255
bc74bf8f LR	256	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	257	REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
	258
54f10b05	259	ath9k_hw_cfg_output(ah, btcoex->wlanactive_gpio,
bc74bf8f LR	260	AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
	261	}
	262
8227bf45 RM	263	static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
	264	{
	265	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	266	int i;
	267
	268	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	269	REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
	270	btcoex->wlan_weight[i]);
	271
	272	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	273	btcoex->enabled = true;
	274	}
	275
17d50d1d VT	276	void ath9k_hw_btcoex_enable(struct ath_hw *ah)
17d50d1d VT	277	{
766ec4a9	278	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
f14462c6	279
8a309305	280	switch (ath9k_hw_get_btcoex_scheme(ah)) {
bc74bf8f	281	case ATH_BTCOEX_CFG_NONE:
8a309305	282	return;
bc74bf8f LR	283	case ATH_BTCOEX_CFG_2WIRE:
	284	ath9k_hw_btcoex_enable_2wire(ah);
	285	break;
	286	case ATH_BTCOEX_CFG_3WIRE:
	287	ath9k_hw_btcoex_enable_3wire(ah);
	288	break;
8227bf45 RM	289	case ATH_BTCOEX_CFG_MCI:
	290	ath9k_hw_btcoex_enable_mci(ah);
	291	return;
1773912b VT	292	}
	293
	294	REG_RMW(ah, AR_GPIO_PDPU,
766ec4a9 LR	295	(0x2 << (btcoex_hw->btactive_gpio * 2)),
766ec4a9 LR	296	(0x3 << (btcoex_hw->btactive_gpio * 2)));
17d50d1d	297
766ec4a9	298	ah->btcoex_hw.enabled = true;
17d50d1d	299	}
7322fd19	300	EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
17d50d1d VT	301
	302	void ath9k_hw_btcoex_disable(struct ath_hw *ah)
	303	{
766ec4a9	304	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
54f10b05	305	int i;
f14462c6	306
8227bf45 RM	307	btcoex_hw->enabled = false;
	308	if (btcoex_hw->scheme == ATH_BTCOEX_CFG_MCI) {
	309	ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
	310	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	311	REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
	312	btcoex_hw->wlan_weight[i]);
	313	}
766ec4a9	314	ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
17d50d1d	315
766ec4a9	316	ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
17d50d1d VT	317	AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
17d50d1d VT	318
766ec4a9	319	if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
1773912b	320	REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET \| AR_BT_MODE);
1773912b	321	REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
a6ef530f VN	322
	323	if (AR_SREV_9300_20_OR_LATER(ah)) {
	324	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
	325	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
54f10b05 RM	326	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
54f10b05 RM	327	REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
a6ef530f VN	328	} else
	329	REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
	330
1773912b	331	}
17d50d1d	332	}
7322fd19	333	EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
978f78bf VN	334
	335	static void ar9003_btcoex_bt_stomp(struct ath_hw *ah,
	336	enum ath_stomp_type stomp_type)
	337	{
54f10b05	338	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
8227bf45 RM	339	const u32 *weight = AR_SREV_9462(ah) ? ar9003_wlan_weights[stomp_type] :
8227bf45 RM	340	ar9462_wlan_weights[stomp_type];
54f10b05	341	int i;
978f78bf	342
54f10b05 RM	343	for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
54f10b05 RM	344	btcoex->bt_weight[i] = AR9300_BT_WGHT;
8227bf45	345	btcoex->wlan_weight[i] = weight[i];
978f78bf	346	}
978f78bf VN	347	}
	348
	349	/*
	350	* Configures appropriate weight based on stomp type.
	351	*/
	352	void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
	353	enum ath_stomp_type stomp_type)
	354	{
	355	if (AR_SREV_9300_20_OR_LATER(ah)) {
	356	ar9003_btcoex_bt_stomp(ah, stomp_type);
	357	return;
	358	}
	359
	360	switch (stomp_type) {
	361	case ATH_BTCOEX_STOMP_ALL:
	362	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
	363	AR_STOMP_ALL_WLAN_WGHT);
	364	break;
	365	case ATH_BTCOEX_STOMP_LOW:
	366	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
	367	AR_STOMP_LOW_WLAN_WGHT);
	368	break;
	369	case ATH_BTCOEX_STOMP_NONE:
	370	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
	371	AR_STOMP_NONE_WLAN_WGHT);
	372	break;
	373	default:
d2182b69	374	ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
978f78bf VN	375	break;
978f78bf VN	376	}
978f78bf VN	377	}
978f78bf VN	378	EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);