Commit | Line | Data |
---|---|---|
0fca65c1 | 1 | /* |
5b68138e | 2 | * Copyright (c) 2008-2011 Atheros Communications Inc. |
0fca65c1 S |
3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #include "ath9k.h" | |
18 | ||
19 | /********************************/ | |
20 | /* LED functions */ | |
21 | /********************************/ | |
22 | ||
0cf55c21 | 23 | #ifdef CONFIG_MAC80211_LEDS |
0fca65c1 S |
24 | static void ath_led_brightness(struct led_classdev *led_cdev, |
25 | enum led_brightness brightness) | |
26 | { | |
0cf55c21 | 27 | struct ath_softc *sc = container_of(led_cdev, struct ath_softc, led_cdev); |
aeeb2065 SM |
28 | u32 val = (brightness == LED_OFF); |
29 | ||
30 | if (sc->sc_ah->config.led_active_high) | |
31 | val = !val; | |
32 | ||
33 | ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, val); | |
0fca65c1 S |
34 | } |
35 | ||
36 | void ath_deinit_leds(struct ath_softc *sc) | |
37 | { | |
0cf55c21 FF |
38 | if (!sc->led_registered) |
39 | return; | |
40 | ||
41 | ath_led_brightness(&sc->led_cdev, LED_OFF); | |
42 | led_classdev_unregister(&sc->led_cdev); | |
0fca65c1 S |
43 | } |
44 | ||
45 | void ath_init_leds(struct ath_softc *sc) | |
46 | { | |
0fca65c1 S |
47 | int ret; |
48 | ||
7b27ba4e FF |
49 | if (AR_SREV_9100(sc->sc_ah)) |
50 | return; | |
51 | ||
0c8a1e43 | 52 | if (!ath9k_led_blink) |
0cf55c21 FF |
53 | sc->led_cdev.default_trigger = |
54 | ieee80211_get_radio_led_name(sc->hw); | |
55 | ||
56 | snprintf(sc->led_name, sizeof(sc->led_name), | |
57 | "ath9k-%s", wiphy_name(sc->hw->wiphy)); | |
58 | sc->led_cdev.name = sc->led_name; | |
59 | sc->led_cdev.brightness_set = ath_led_brightness; | |
60 | ||
61 | ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev); | |
62 | if (ret < 0) | |
63 | return; | |
64 | ||
65 | sc->led_registered = true; | |
0fca65c1 | 66 | } |
8f176a3a RM |
67 | |
68 | void ath_fill_led_pin(struct ath_softc *sc) | |
69 | { | |
70 | struct ath_hw *ah = sc->sc_ah; | |
71 | ||
61b559de | 72 | if (AR_SREV_9100(ah)) |
8f176a3a RM |
73 | return; |
74 | ||
61b559de MP |
75 | if (ah->led_pin >= 0) { |
76 | if (!((1 << ah->led_pin) & AR_GPIO_OE_OUT_MASK)) | |
77 | ath9k_hw_request_gpio(ah, ah->led_pin, "ath9k-led"); | |
78 | return; | |
79 | } | |
80 | ||
8f176a3a RM |
81 | if (AR_SREV_9287(ah)) |
82 | ah->led_pin = ATH_LED_PIN_9287; | |
83 | else if (AR_SREV_9485(sc->sc_ah)) | |
84 | ah->led_pin = ATH_LED_PIN_9485; | |
85 | else if (AR_SREV_9300(sc->sc_ah)) | |
86 | ah->led_pin = ATH_LED_PIN_9300; | |
87 | else if (AR_SREV_9462(sc->sc_ah) || AR_SREV_9565(sc->sc_ah)) | |
88 | ah->led_pin = ATH_LED_PIN_9462; | |
89 | else | |
90 | ah->led_pin = ATH_LED_PIN_DEF; | |
91 | ||
92 | /* Configure gpio 1 for output */ | |
93 | ath9k_hw_cfg_output(ah, ah->led_pin, AR_GPIO_OUTPUT_MUX_AS_OUTPUT); | |
94 | ||
95 | /* LED off, active low */ | |
aeeb2065 | 96 | ath9k_hw_set_gpio(ah, ah->led_pin, (ah->config.led_active_high) ? 0 : 1); |
8f176a3a | 97 | } |
0cf55c21 | 98 | #endif |
0fca65c1 S |
99 | |
100 | /*******************/ | |
101 | /* Rfkill */ | |
102 | /*******************/ | |
103 | ||
104 | static bool ath_is_rfkill_set(struct ath_softc *sc) | |
105 | { | |
106 | struct ath_hw *ah = sc->sc_ah; | |
90826313 | 107 | bool is_blocked; |
0fca65c1 | 108 | |
90826313 MSS |
109 | ath9k_ps_wakeup(sc); |
110 | is_blocked = ath9k_hw_gpio_get(ah, ah->rfkill_gpio) == | |
0fca65c1 | 111 | ah->rfkill_polarity; |
90826313 MSS |
112 | ath9k_ps_restore(sc); |
113 | ||
114 | return is_blocked; | |
0fca65c1 S |
115 | } |
116 | ||
117 | void ath9k_rfkill_poll_state(struct ieee80211_hw *hw) | |
118 | { | |
9ac58615 | 119 | struct ath_softc *sc = hw->priv; |
0fca65c1 S |
120 | bool blocked = !!ath_is_rfkill_set(sc); |
121 | ||
122 | wiphy_rfkill_set_hw_state(hw->wiphy, blocked); | |
123 | } | |
124 | ||
125 | void ath_start_rfkill_poll(struct ath_softc *sc) | |
126 | { | |
127 | struct ath_hw *ah = sc->sc_ah; | |
128 | ||
129 | if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT) | |
130 | wiphy_rfkill_start_polling(sc->hw->wiphy); | |
131 | } | |
132 | ||
4daa7760 SM |
133 | #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT |
134 | ||
0fca65c1 S |
135 | /******************/ |
136 | /* BTCOEX */ | |
137 | /******************/ | |
138 | ||
139 | /* | |
140 | * Detects if there is any priority bt traffic | |
141 | */ | |
142 | static void ath_detect_bt_priority(struct ath_softc *sc) | |
143 | { | |
144 | struct ath_btcoex *btcoex = &sc->btcoex; | |
145 | struct ath_hw *ah = sc->sc_ah; | |
146 | ||
147 | if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_hw.btpriority_gpio)) | |
148 | btcoex->bt_priority_cnt++; | |
149 | ||
150 | if (time_after(jiffies, btcoex->bt_priority_time + | |
151 | msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) { | |
e6930c4b SM |
152 | clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags); |
153 | clear_bit(BT_OP_SCAN, &btcoex->op_flags); | |
58da1318 VT |
154 | /* Detect if colocated bt started scanning */ |
155 | if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) { | |
d2182b69 | 156 | ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX, |
226afe68 | 157 | "BT scan detected\n"); |
e6930c4b SM |
158 | set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags); |
159 | set_bit(BT_OP_SCAN, &btcoex->op_flags); | |
58da1318 | 160 | } else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) { |
d2182b69 | 161 | ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX, |
226afe68 | 162 | "BT priority traffic detected\n"); |
e6930c4b | 163 | set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags); |
0fca65c1 S |
164 | } |
165 | ||
166 | btcoex->bt_priority_cnt = 0; | |
167 | btcoex->bt_priority_time = jiffies; | |
168 | } | |
169 | } | |
170 | ||
78b1775b SM |
171 | static void ath_mci_ftp_adjust(struct ath_softc *sc) |
172 | { | |
173 | struct ath_btcoex *btcoex = &sc->btcoex; | |
174 | struct ath_mci_profile *mci = &btcoex->mci; | |
175 | struct ath_hw *ah = sc->sc_ah; | |
176 | ||
78b1775b SM |
177 | if (btcoex->bt_wait_time > ATH_BTCOEX_RX_WAIT_TIME) { |
178 | if (ar9003_mci_state(ah, MCI_STATE_NEED_FTP_STOMP) && | |
179 | (mci->num_pan || mci->num_other_acl)) | |
180 | ah->btcoex_hw.mci.stomp_ftp = | |
181 | (sc->rx.num_pkts < ATH_BTCOEX_STOMP_FTP_THRESH); | |
182 | else | |
183 | ah->btcoex_hw.mci.stomp_ftp = false; | |
184 | btcoex->bt_wait_time = 0; | |
185 | sc->rx.num_pkts = 0; | |
186 | } | |
187 | } | |
188 | ||
0fca65c1 S |
189 | /* |
190 | * This is the master bt coex timer which runs for every | |
191 | * 45ms, bt traffic will be given priority during 55% of this | |
192 | * period while wlan gets remaining 45% | |
193 | */ | |
194 | static void ath_btcoex_period_timer(unsigned long data) | |
195 | { | |
196 | struct ath_softc *sc = (struct ath_softc *) data; | |
197 | struct ath_hw *ah = sc->sc_ah; | |
198 | struct ath_btcoex *btcoex = &sc->btcoex; | |
750f32cf | 199 | enum ath_stomp_type stomp_type; |
58da1318 | 200 | u32 timer_period; |
08d4df41 RM |
201 | unsigned long flags; |
202 | ||
203 | spin_lock_irqsave(&sc->sc_pm_lock, flags); | |
204 | if (sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP) { | |
be41b052 | 205 | btcoex->bt_wait_time += btcoex->btcoex_period; |
08d4df41 RM |
206 | spin_unlock_irqrestore(&sc->sc_pm_lock, flags); |
207 | goto skip_hw_wakeup; | |
208 | } | |
209 | spin_unlock_irqrestore(&sc->sc_pm_lock, flags); | |
0fca65c1 | 210 | |
a039a993 | 211 | ath9k_ps_wakeup(sc); |
6e6dd08d | 212 | spin_lock_bh(&btcoex->btcoex_lock); |
750f32cf | 213 | |
6e6dd08d SM |
214 | if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) { |
215 | ath9k_mci_update_rssi(sc); | |
78b1775b | 216 | ath_mci_ftp_adjust(sc); |
6e6dd08d | 217 | } |
6995fb80 | 218 | |
6e6dd08d SM |
219 | if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) |
220 | ath_detect_bt_priority(sc); | |
0fca65c1 | 221 | |
750f32cf SM |
222 | stomp_type = btcoex->bt_stomp_type; |
223 | timer_period = btcoex->btcoex_no_stomp; | |
224 | ||
225 | if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) { | |
226 | if (test_bit(BT_OP_SCAN, &btcoex->op_flags)) { | |
227 | stomp_type = ATH_BTCOEX_STOMP_ALL; | |
228 | timer_period = btcoex->btscan_no_stomp; | |
229 | } | |
2884561a RM |
230 | } else if (btcoex->stomp_audio >= 5) { |
231 | stomp_type = ATH_BTCOEX_STOMP_AUDIO; | |
232 | btcoex->stomp_audio = 0; | |
750f32cf | 233 | } |
0fca65c1 | 234 | |
750f32cf | 235 | ath9k_hw_btcoex_bt_stomp(ah, stomp_type); |
bc6d5c29 | 236 | ath9k_hw_btcoex_enable(ah); |
750f32cf | 237 | |
0fca65c1 S |
238 | spin_unlock_bh(&btcoex->btcoex_lock); |
239 | ||
168c6f89 FF |
240 | if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) |
241 | mod_timer(&btcoex->no_stomp_timer, | |
242 | jiffies + msecs_to_jiffies(timer_period)); | |
0fca65c1 | 243 | |
a039a993 | 244 | ath9k_ps_restore(sc); |
750f32cf | 245 | |
08d4df41 | 246 | skip_hw_wakeup: |
750f32cf SM |
247 | mod_timer(&btcoex->period_timer, |
248 | jiffies + msecs_to_jiffies(btcoex->btcoex_period)); | |
0fca65c1 S |
249 | } |
250 | ||
251 | /* | |
252 | * Generic tsf based hw timer which configures weight | |
253 | * registers to time slice between wlan and bt traffic | |
254 | */ | |
168c6f89 | 255 | static void ath_btcoex_no_stomp_timer(unsigned long arg) |
0fca65c1 S |
256 | { |
257 | struct ath_softc *sc = (struct ath_softc *)arg; | |
258 | struct ath_hw *ah = sc->sc_ah; | |
259 | struct ath_btcoex *btcoex = &sc->btcoex; | |
0fca65c1 | 260 | |
a039a993 | 261 | ath9k_ps_wakeup(sc); |
0fca65c1 S |
262 | spin_lock_bh(&btcoex->btcoex_lock); |
263 | ||
e6930c4b | 264 | if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW || |
750f32cf SM |
265 | (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && |
266 | test_bit(BT_OP_SCAN, &btcoex->op_flags))) | |
978f78bf | 267 | ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE); |
2884561a | 268 | else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL) |
978f78bf | 269 | ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_LOW); |
0fca65c1 | 270 | |
bc6d5c29 | 271 | ath9k_hw_btcoex_enable(ah); |
0fca65c1 | 272 | spin_unlock_bh(&btcoex->btcoex_lock); |
a039a993 | 273 | ath9k_ps_restore(sc); |
0fca65c1 S |
274 | } |
275 | ||
44b9b56e | 276 | static void ath_init_btcoex_timer(struct ath_softc *sc) |
0fca65c1 S |
277 | { |
278 | struct ath_btcoex *btcoex = &sc->btcoex; | |
279 | ||
dfd0587a | 280 | btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD; |
168c6f89 | 281 | btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) * |
0fca65c1 | 282 | btcoex->btcoex_period / 100; |
168c6f89 | 283 | btcoex->btscan_no_stomp = (100 - ATH_BTCOEX_BTSCAN_DUTY_CYCLE) * |
58da1318 | 284 | btcoex->btcoex_period / 100; |
e1ff147d | 285 | btcoex->bt_stomp_type = ATH_BTCOEX_STOMP_LOW; |
0fca65c1 S |
286 | |
287 | setup_timer(&btcoex->period_timer, ath_btcoex_period_timer, | |
288 | (unsigned long) sc); | |
168c6f89 FF |
289 | setup_timer(&btcoex->no_stomp_timer, ath_btcoex_no_stomp_timer, |
290 | (unsigned long) sc); | |
0fca65c1 S |
291 | |
292 | spin_lock_init(&btcoex->btcoex_lock); | |
0fca65c1 S |
293 | } |
294 | ||
295 | /* | |
296 | * (Re)start btcoex timers | |
297 | */ | |
298 | void ath9k_btcoex_timer_resume(struct ath_softc *sc) | |
299 | { | |
300 | struct ath_btcoex *btcoex = &sc->btcoex; | |
301 | struct ath_hw *ah = sc->sc_ah; | |
302 | ||
c7266e99 SM |
303 | if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_3WIRE && |
304 | ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_MCI) | |
305 | return; | |
306 | ||
d2182b69 | 307 | ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex timers\n"); |
0fca65c1 S |
308 | |
309 | /* make sure duty cycle timer is also stopped when resuming */ | |
168c6f89 | 310 | del_timer_sync(&btcoex->no_stomp_timer); |
0fca65c1 S |
311 | |
312 | btcoex->bt_priority_cnt = 0; | |
313 | btcoex->bt_priority_time = jiffies; | |
c11216d1 MSS |
314 | clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags); |
315 | clear_bit(BT_OP_SCAN, &btcoex->op_flags); | |
0fca65c1 S |
316 | |
317 | mod_timer(&btcoex->period_timer, jiffies); | |
318 | } | |
319 | ||
0fca65c1 S |
320 | /* |
321 | * Pause btcoex timer and bt duty cycle timer | |
322 | */ | |
323 | void ath9k_btcoex_timer_pause(struct ath_softc *sc) | |
324 | { | |
325 | struct ath_btcoex *btcoex = &sc->btcoex; | |
c7266e99 SM |
326 | struct ath_hw *ah = sc->sc_ah; |
327 | ||
328 | if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_3WIRE && | |
329 | ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_MCI) | |
330 | return; | |
331 | ||
332 | ath_dbg(ath9k_hw_common(ah), BTCOEX, "Stopping btcoex timers\n"); | |
0fca65c1 S |
333 | |
334 | del_timer_sync(&btcoex->period_timer); | |
168c6f89 | 335 | del_timer_sync(&btcoex->no_stomp_timer); |
0fca65c1 | 336 | } |
5908120f | 337 | |
08d4df41 RM |
338 | void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc) |
339 | { | |
340 | struct ath_btcoex *btcoex = &sc->btcoex; | |
341 | ||
168c6f89 | 342 | del_timer_sync(&btcoex->no_stomp_timer); |
08d4df41 RM |
343 | } |
344 | ||
c0ac53fa SM |
345 | u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen) |
346 | { | |
e6930c4b | 347 | struct ath_btcoex *btcoex = &sc->btcoex; |
c0ac53fa SM |
348 | struct ath_mci_profile *mci = &sc->btcoex.mci; |
349 | u16 aggr_limit = 0; | |
350 | ||
351 | if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && mci->aggr_limit) | |
352 | aggr_limit = (max_4ms_framelen * mci->aggr_limit) >> 4; | |
e6930c4b | 353 | else if (test_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags)) |
c0ac53fa SM |
354 | aggr_limit = min((max_4ms_framelen * 3) / 8, |
355 | (u32)ATH_AMPDU_LIMIT_MAX); | |
356 | ||
357 | return aggr_limit; | |
358 | } | |
359 | ||
56ca0dba SM |
360 | void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status) |
361 | { | |
9a15858f | 362 | if (status & ATH9K_INT_MCI) |
56ca0dba SM |
363 | ath_mci_intr(sc); |
364 | } | |
365 | ||
df198b17 SM |
366 | void ath9k_start_btcoex(struct ath_softc *sc) |
367 | { | |
368 | struct ath_hw *ah = sc->sc_ah; | |
369 | ||
c7266e99 SM |
370 | if (ah->btcoex_hw.enabled || |
371 | ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE) | |
372 | return; | |
df198b17 | 373 | |
c7266e99 SM |
374 | if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) |
375 | ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT, | |
376 | AR_STOMP_LOW_WLAN_WGHT, 0); | |
377 | else | |
378 | ath9k_hw_btcoex_set_weight(ah, 0, 0, | |
379 | ATH_BTCOEX_STOMP_NONE); | |
380 | ath9k_hw_btcoex_enable(ah); | |
381 | ath9k_btcoex_timer_resume(sc); | |
df198b17 SM |
382 | } |
383 | ||
384 | void ath9k_stop_btcoex(struct ath_softc *sc) | |
385 | { | |
386 | struct ath_hw *ah = sc->sc_ah; | |
387 | ||
c7266e99 SM |
388 | if (!ah->btcoex_hw.enabled || |
389 | ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE) | |
390 | return; | |
391 | ||
392 | ath9k_btcoex_timer_pause(sc); | |
393 | ath9k_hw_btcoex_disable(ah); | |
394 | ||
395 | if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) | |
396 | ath_mci_flush_profile(&sc->btcoex.mci); | |
df198b17 SM |
397 | } |
398 | ||
5908120f SM |
399 | void ath9k_deinit_btcoex(struct ath_softc *sc) |
400 | { | |
dd89f05a MSS |
401 | struct ath_hw *ah = sc->sc_ah; |
402 | ||
dd89f05a | 403 | if (ath9k_hw_mci_is_enabled(ah)) |
5908120f SM |
404 | ath_mci_cleanup(sc); |
405 | } | |
406 | ||
407 | int ath9k_init_btcoex(struct ath_softc *sc) | |
408 | { | |
409 | struct ath_txq *txq; | |
410 | struct ath_hw *ah = sc->sc_ah; | |
411 | int r; | |
412 | ||
d68475de SM |
413 | ath9k_hw_btcoex_init_scheme(ah); |
414 | ||
5908120f SM |
415 | switch (ath9k_hw_get_btcoex_scheme(sc->sc_ah)) { |
416 | case ATH_BTCOEX_CFG_NONE: | |
417 | break; | |
418 | case ATH_BTCOEX_CFG_2WIRE: | |
419 | ath9k_hw_btcoex_init_2wire(sc->sc_ah); | |
420 | break; | |
421 | case ATH_BTCOEX_CFG_3WIRE: | |
422 | ath9k_hw_btcoex_init_3wire(sc->sc_ah); | |
44b9b56e | 423 | ath_init_btcoex_timer(sc); |
bea843c7 | 424 | txq = sc->tx.txq_map[IEEE80211_AC_BE]; |
5908120f | 425 | ath9k_hw_init_btcoex_hw(sc->sc_ah, txq->axq_qnum); |
e1ff147d SM |
426 | break; |
427 | case ATH_BTCOEX_CFG_MCI: | |
428 | ath_init_btcoex_timer(sc); | |
429 | ||
430 | sc->btcoex.duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE; | |
431 | INIT_LIST_HEAD(&sc->btcoex.mci.info); | |
432 | ath9k_hw_btcoex_init_mci(ah); | |
433 | ||
434 | r = ath_mci_setup(sc); | |
435 | if (r) | |
436 | return r; | |
5908120f SM |
437 | |
438 | break; | |
439 | default: | |
440 | WARN_ON(1); | |
441 | break; | |
442 | } | |
443 | ||
444 | return 0; | |
445 | } | |
4daa7760 | 446 | |
ac46ba43 | 447 | static int ath9k_dump_mci_btcoex(struct ath_softc *sc, u8 *buf, u32 size) |
4df50ca8 | 448 | { |
4df50ca8 RM |
449 | struct ath_btcoex *btcoex = &sc->btcoex; |
450 | struct ath_mci_profile *mci = &btcoex->mci; | |
451 | struct ath_hw *ah = sc->sc_ah; | |
452 | struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw; | |
ac46ba43 | 453 | u32 len = 0; |
4df50ca8 RM |
454 | int i; |
455 | ||
456 | ATH_DUMP_BTCOEX("Total BT profiles", NUM_PROF(mci)); | |
ac46ba43 SM |
457 | ATH_DUMP_BTCOEX("MGMT", mci->num_mgmt); |
458 | ATH_DUMP_BTCOEX("SCO", mci->num_sco); | |
459 | ATH_DUMP_BTCOEX("A2DP", mci->num_a2dp); | |
460 | ATH_DUMP_BTCOEX("HID", mci->num_hid); | |
461 | ATH_DUMP_BTCOEX("PAN", mci->num_pan); | |
462 | ATH_DUMP_BTCOEX("ACL", mci->num_other_acl); | |
463 | ATH_DUMP_BTCOEX("BDR", mci->num_bdr); | |
4df50ca8 RM |
464 | ATH_DUMP_BTCOEX("Aggr. Limit", mci->aggr_limit); |
465 | ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type); | |
466 | ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period); | |
467 | ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle); | |
468 | ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time); | |
469 | ATH_DUMP_BTCOEX("Concurrent Tx", btcoex_hw->mci.concur_tx); | |
ac46ba43 SM |
470 | ATH_DUMP_BTCOEX("Concurrent RSSI cnt", btcoex->rssi_count); |
471 | ||
5e88ba62 | 472 | len += scnprintf(buf + len, size - len, "BT Weights: "); |
4df50ca8 | 473 | for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++) |
5e88ba62 ZK |
474 | len += scnprintf(buf + len, size - len, "%08x ", |
475 | btcoex_hw->bt_weight[i]); | |
476 | len += scnprintf(buf + len, size - len, "\n"); | |
477 | len += scnprintf(buf + len, size - len, "WLAN Weights: "); | |
4df50ca8 | 478 | for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++) |
5e88ba62 ZK |
479 | len += scnprintf(buf + len, size - len, "%08x ", |
480 | btcoex_hw->wlan_weight[i]); | |
481 | len += scnprintf(buf + len, size - len, "\n"); | |
482 | len += scnprintf(buf + len, size - len, "Tx Priorities: "); | |
4df50ca8 | 483 | for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++) |
5e88ba62 | 484 | len += scnprintf(buf + len, size - len, "%08x ", |
4df50ca8 | 485 | btcoex_hw->tx_prio[i]); |
ac46ba43 | 486 | |
5e88ba62 | 487 | len += scnprintf(buf + len, size - len, "\n"); |
4df50ca8 RM |
488 | |
489 | return len; | |
490 | } | |
ac46ba43 SM |
491 | |
492 | static int ath9k_dump_legacy_btcoex(struct ath_softc *sc, u8 *buf, u32 size) | |
493 | { | |
494 | ||
495 | struct ath_btcoex *btcoex = &sc->btcoex; | |
496 | u32 len = 0; | |
497 | ||
498 | ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type); | |
499 | ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period); | |
500 | ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle); | |
501 | ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time); | |
502 | ||
503 | return len; | |
504 | } | |
505 | ||
506 | int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size) | |
507 | { | |
508 | if (ath9k_hw_mci_is_enabled(sc->sc_ah)) | |
509 | return ath9k_dump_mci_btcoex(sc, buf, size); | |
510 | else | |
511 | return ath9k_dump_legacy_btcoex(sc, buf, size); | |
512 | } | |
513 | ||
4daa7760 | 514 | #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ |