[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / gpio.c

/*
 * Copyright (c) 2008-2011 Atheros Communications Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include "ath9k.h"

/********************************/
/*	 LED functions		*/
/********************************/

#ifdef CONFIG_MAC80211_LEDS
static void ath_led_brightness(struct led_classdev *led_cdev,
			       enum led_brightness brightness)
{
	struct ath_softc *sc = container_of(led_cdev, struct ath_softc, led_cdev);
	ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, (brightness == LED_OFF));
}

void ath_deinit_leds(struct ath_softc *sc)
{
	if (!sc->led_registered)
		return;

	ath_led_brightness(&sc->led_cdev, LED_OFF);
	led_classdev_unregister(&sc->led_cdev);
}

void ath_init_leds(struct ath_softc *sc)
{
	int ret;

	if (AR_SREV_9100(sc->sc_ah))
		return;

	if (!led_blink)
		sc->led_cdev.default_trigger =
			ieee80211_get_radio_led_name(sc->hw);

	snprintf(sc->led_name, sizeof(sc->led_name),
		"ath9k-%s", wiphy_name(sc->hw->wiphy));
	sc->led_cdev.name = sc->led_name;
	sc->led_cdev.brightness_set = ath_led_brightness;

	ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev);
	if (ret < 0)
		return;

	sc->led_registered = true;
}

void ath_fill_led_pin(struct ath_softc *sc)
{
	struct ath_hw *ah = sc->sc_ah;

	if (AR_SREV_9100(ah) || (ah->led_pin >= 0))
		return;

	if (AR_SREV_9287(ah))
		ah->led_pin = ATH_LED_PIN_9287;
	else if (AR_SREV_9485(sc->sc_ah))
		ah->led_pin = ATH_LED_PIN_9485;
	else if (AR_SREV_9300(sc->sc_ah))
		ah->led_pin = ATH_LED_PIN_9300;
	else if (AR_SREV_9462(sc->sc_ah) || AR_SREV_9565(sc->sc_ah))
		ah->led_pin = ATH_LED_PIN_9462;
	else
		ah->led_pin = ATH_LED_PIN_DEF;

	/* Configure gpio 1 for output */
	ath9k_hw_cfg_output(ah, ah->led_pin, AR_GPIO_OUTPUT_MUX_AS_OUTPUT);

	/* LED off, active low */
	ath9k_hw_set_gpio(ah, ah->led_pin, 1);
}
#endif

/*******************/
/*	Rfkill	   */
/*******************/

static bool ath_is_rfkill_set(struct ath_softc *sc)
{
	struct ath_hw *ah = sc->sc_ah;
	bool is_blocked;

	ath9k_ps_wakeup(sc);
	is_blocked = ath9k_hw_gpio_get(ah, ah->rfkill_gpio) ==
				  ah->rfkill_polarity;
	ath9k_ps_restore(sc);

	return is_blocked;
}

void ath9k_rfkill_poll_state(struct ieee80211_hw *hw)
{
	struct ath_softc *sc = hw->priv;
	bool blocked = !!ath_is_rfkill_set(sc);

	wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
}

void ath_start_rfkill_poll(struct ath_softc *sc)
{
	struct ath_hw *ah = sc->sc_ah;

	if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
		wiphy_rfkill_start_polling(sc->hw->wiphy);
}

#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT

/******************/
/*     BTCOEX     */
/******************/

/*
 * Detects if there is any priority bt traffic
 */
static void ath_detect_bt_priority(struct ath_softc *sc)
{
	struct ath_btcoex *btcoex = &sc->btcoex;
	struct ath_hw *ah = sc->sc_ah;

	if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_hw.btpriority_gpio))
		btcoex->bt_priority_cnt++;

	if (time_after(jiffies, btcoex->bt_priority_time +
			msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) {
		clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
		clear_bit(BT_OP_SCAN, &btcoex->op_flags);
		/* Detect if colocated bt started scanning */
		if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) {
			ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
				"BT scan detected\n");
			set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
			set_bit(BT_OP_SCAN, &btcoex->op_flags);
		} else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
			ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
				"BT priority traffic detected\n");
			set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
		}

		btcoex->bt_priority_cnt = 0;
		btcoex->bt_priority_time = jiffies;
	}
}

static void ath9k_gen_timer_start(struct ath_hw *ah,
				  struct ath_gen_timer *timer,
				  u32 trig_timeout,
				  u32 timer_period)
{
	ath9k_hw_gen_timer_start(ah, timer, trig_timeout, timer_period);

	if ((ah->imask & ATH9K_INT_GENTIMER) == 0) {
		ath9k_hw_disable_interrupts(ah);
		ah->imask |= ATH9K_INT_GENTIMER;
		ath9k_hw_set_interrupts(ah);
		ath9k_hw_enable_interrupts(ah);
	}
}

static void ath9k_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
{
	struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;

	ath9k_hw_gen_timer_stop(ah, timer);

	/* if no timer is enabled, turn off interrupt mask */
	if (timer_table->timer_mask.val == 0) {
		ath9k_hw_disable_interrupts(ah);
		ah->imask &= ~ATH9K_INT_GENTIMER;
		ath9k_hw_set_interrupts(ah);
		ath9k_hw_enable_interrupts(ah);
	}
}

/*
 * This is the master bt coex timer which runs for every
 * 45ms, bt traffic will be given priority during 55% of this
 * period while wlan gets remaining 45%
 */
static void ath_btcoex_period_timer(unsigned long data)
{
	struct ath_softc *sc = (struct ath_softc *) data;
	struct ath_hw *ah = sc->sc_ah;
	struct ath_btcoex *btcoex = &sc->btcoex;
	struct ath_mci_profile *mci = &btcoex->mci;
	u32 timer_period;
	bool is_btscan;
	unsigned long flags;

	spin_lock_irqsave(&sc->sc_pm_lock, flags);
	if (sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP) {
		spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
		goto skip_hw_wakeup;
	}
	spin_unlock_irqrestore(&sc->sc_pm_lock, flags);

	ath9k_ps_wakeup(sc);
	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
		ath_detect_bt_priority(sc);
	is_btscan = test_bit(BT_OP_SCAN, &btcoex->op_flags);

	btcoex->bt_wait_time += btcoex->btcoex_period;
	if (btcoex->bt_wait_time > ATH_BTCOEX_RX_WAIT_TIME) {
		if (ar9003_mci_state(ah, MCI_STATE_NEED_FTP_STOMP) &&
		    (mci->num_pan || mci->num_other_acl))
			ah->btcoex_hw.mci.stomp_ftp =
				(sc->rx.num_pkts < ATH_BTCOEX_STOMP_FTP_THRESH);
		else
			ah->btcoex_hw.mci.stomp_ftp = false;
		btcoex->bt_wait_time = 0;
		sc->rx.num_pkts = 0;
	}

	spin_lock_bh(&btcoex->btcoex_lock);

	ath9k_hw_btcoex_bt_stomp(ah, is_btscan ? ATH_BTCOEX_STOMP_ALL :
			      btcoex->bt_stomp_type);

	ath9k_hw_btcoex_enable(ah);
	spin_unlock_bh(&btcoex->btcoex_lock);

	/*
	 * btcoex_period is in msec while (btocex/btscan_)no_stomp are in usec,
	 * ensure that we properly convert btcoex_period to usec
	 * for any comparision with (btcoex/btscan_)no_stomp.
	 */
	if (btcoex->btcoex_period * 1000 != btcoex->btcoex_no_stomp) {
		if (btcoex->hw_timer_enabled)
			ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);

		timer_period = is_btscan ? btcoex->btscan_no_stomp :
					   btcoex->btcoex_no_stomp;
		ath9k_gen_timer_start(ah, btcoex->no_stomp_timer, timer_period,
				      timer_period * 10);
		btcoex->hw_timer_enabled = true;
	}

	ath9k_ps_restore(sc);
skip_hw_wakeup:
	timer_period = btcoex->btcoex_period;
	mod_timer(&btcoex->period_timer, jiffies + msecs_to_jiffies(timer_period));
}

/*
 * Generic tsf based hw timer which configures weight
 * registers to time slice between wlan and bt traffic
 */
static void ath_btcoex_no_stomp_timer(void *arg)
{
	struct ath_softc *sc = (struct ath_softc *)arg;
	struct ath_hw *ah = sc->sc_ah;
	struct ath_btcoex *btcoex = &sc->btcoex;
	struct ath_common *common = ath9k_hw_common(ah);

	ath_dbg(common, BTCOEX, "no stomp timer running\n");

	ath9k_ps_wakeup(sc);
	spin_lock_bh(&btcoex->btcoex_lock);

	if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW ||
	    test_bit(BT_OP_SCAN, &btcoex->op_flags))
		ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
	 else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
		ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_LOW);

	ath9k_hw_btcoex_enable(ah);
	spin_unlock_bh(&btcoex->btcoex_lock);
	ath9k_ps_restore(sc);
}

static int ath_init_btcoex_timer(struct ath_softc *sc)
{
	struct ath_btcoex *btcoex = &sc->btcoex;

	btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD;
	btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) * 1000 *
		btcoex->btcoex_period / 100;
	btcoex->btscan_no_stomp = (100 - ATH_BTCOEX_BTSCAN_DUTY_CYCLE) * 1000 *
				   btcoex->btcoex_period / 100;

	setup_timer(&btcoex->period_timer, ath_btcoex_period_timer,
			(unsigned long) sc);

	spin_lock_init(&btcoex->btcoex_lock);

	btcoex->no_stomp_timer = ath_gen_timer_alloc(sc->sc_ah,
			ath_btcoex_no_stomp_timer,
			ath_btcoex_no_stomp_timer,
			(void *) sc, AR_FIRST_NDP_TIMER);

	if (!btcoex->no_stomp_timer)
		return -ENOMEM;

	return 0;
}

/*
 * (Re)start btcoex timers
 */
void ath9k_btcoex_timer_resume(struct ath_softc *sc)
{
	struct ath_btcoex *btcoex = &sc->btcoex;
	struct ath_hw *ah = sc->sc_ah;

	ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex timers\n");

	/* make sure duty cycle timer is also stopped when resuming */
	if (btcoex->hw_timer_enabled) {
		ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
		btcoex->hw_timer_enabled = false;
	}

	btcoex->bt_priority_cnt = 0;
	btcoex->bt_priority_time = jiffies;
	clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
	clear_bit(BT_OP_SCAN, &btcoex->op_flags);

	mod_timer(&btcoex->period_timer, jiffies);
}


/*
 * Pause btcoex timer and bt duty cycle timer
 */
void ath9k_btcoex_timer_pause(struct ath_softc *sc)
{
	struct ath_btcoex *btcoex = &sc->btcoex;
	struct ath_hw *ah = sc->sc_ah;

	del_timer_sync(&btcoex->period_timer);

	if (btcoex->hw_timer_enabled) {
		ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
		btcoex->hw_timer_enabled = false;
	}
}

void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
{
	struct ath_btcoex *btcoex = &sc->btcoex;

	if (btcoex->hw_timer_enabled) {
		ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
		btcoex->hw_timer_enabled = false;
	}
}

u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen)
{
	struct ath_btcoex *btcoex = &sc->btcoex;
	struct ath_mci_profile *mci = &sc->btcoex.mci;
	u16 aggr_limit = 0;

	if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && mci->aggr_limit)
		aggr_limit = (max_4ms_framelen * mci->aggr_limit) >> 4;
	else if (test_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags))
		aggr_limit = min((max_4ms_framelen * 3) / 8,
				 (u32)ATH_AMPDU_LIMIT_MAX);

	return aggr_limit;
}

void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status)
{
	struct ath_hw *ah = sc->sc_ah;

	if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
		if (status & ATH9K_INT_GENTIMER)
			ath_gen_timer_isr(sc->sc_ah);

	if (status & ATH9K_INT_MCI)
		ath_mci_intr(sc);
}

void ath9k_start_btcoex(struct ath_softc *sc)
{
	struct ath_hw *ah = sc->sc_ah;

	if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
	    !ah->btcoex_hw.enabled) {
		if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
			ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
						   AR_STOMP_LOW_WLAN_WGHT);
		ath9k_hw_btcoex_enable(ah);

		if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
			ath9k_btcoex_timer_resume(sc);
	}
}

void ath9k_stop_btcoex(struct ath_softc *sc)
{
	struct ath_hw *ah = sc->sc_ah;

	if (ah->btcoex_hw.enabled &&
	    ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
		if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
			ath9k_btcoex_timer_pause(sc);
		ath9k_hw_btcoex_disable(ah);
		if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
			ath_mci_flush_profile(&sc->btcoex.mci);
	}
}

void ath9k_deinit_btcoex(struct ath_softc *sc)
{
	struct ath_hw *ah = sc->sc_ah;

        if ((sc->btcoex.no_stomp_timer) &&
	    ath9k_hw_get_btcoex_scheme(sc->sc_ah) == ATH_BTCOEX_CFG_3WIRE)
		ath_gen_timer_free(sc->sc_ah, sc->btcoex.no_stomp_timer);

	if (ath9k_hw_mci_is_enabled(ah))
		ath_mci_cleanup(sc);
}

int ath9k_init_btcoex(struct ath_softc *sc)
{
	struct ath_txq *txq;
	struct ath_hw *ah = sc->sc_ah;
	int r;

	ath9k_hw_btcoex_init_scheme(ah);

	switch (ath9k_hw_get_btcoex_scheme(sc->sc_ah)) {
	case ATH_BTCOEX_CFG_NONE:
		break;
	case ATH_BTCOEX_CFG_2WIRE:
		ath9k_hw_btcoex_init_2wire(sc->sc_ah);
		break;
	case ATH_BTCOEX_CFG_3WIRE:
		ath9k_hw_btcoex_init_3wire(sc->sc_ah);
		r = ath_init_btcoex_timer(sc);
		if (r)
			return -1;
		txq = sc->tx.txq_map[WME_AC_BE];
		ath9k_hw_init_btcoex_hw(sc->sc_ah, txq->axq_qnum);
		sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
		if (ath9k_hw_mci_is_enabled(ah)) {
			sc->btcoex.duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;
			INIT_LIST_HEAD(&sc->btcoex.mci.info);

			r = ath_mci_setup(sc);
			if (r)
				return r;

			ath9k_hw_btcoex_init_mci(ah);
		}

		break;
	default:
		WARN_ON(1);
		break;
	}

	return 0;
}

#endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
Commit	Line	Data
0fca65c1	1	/*
5b68138e	2	* Copyright (c) 2008-2011 Atheros Communications Inc.
0fca65c1 S	3	*
	4	* Permission to use, copy, modify, and/or distribute this software for any
	5	* purpose with or without fee is hereby granted, provided that the above
	6	* copyright notice and this permission notice appear in all copies.
	7	*
	8	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	9	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	10	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
	11	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	12	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
	13	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
	14	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	15	*/
	16
	17	#include "ath9k.h"
	18
	19	/********************************/
	20	/* LED functions */
	21	/********************************/
	22
0cf55c21	23	#ifdef CONFIG_MAC80211_LEDS
0fca65c1 S	24	static void ath_led_brightness(struct led_classdev *led_cdev,
	25	enum led_brightness brightness)
	26	{
0cf55c21 FF	27	struct ath_softc *sc = container_of(led_cdev, struct ath_softc, led_cdev);
0cf55c21 FF	28	ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, (brightness == LED_OFF));
0fca65c1 S	29	}
	30
	31	void ath_deinit_leds(struct ath_softc *sc)
	32	{
0cf55c21 FF	33	if (!sc->led_registered)
	34	return;
	35
	36	ath_led_brightness(&sc->led_cdev, LED_OFF);
	37	led_classdev_unregister(&sc->led_cdev);
0fca65c1 S	38	}
	39
	40	void ath_init_leds(struct ath_softc *sc)
	41	{
0fca65c1 S	42	int ret;
0fca65c1 S	43
7b27ba4e FF	44	if (AR_SREV_9100(sc->sc_ah))
	45	return;
	46
0cf55c21 FF	47	if (!led_blink)
	48	sc->led_cdev.default_trigger =
	49	ieee80211_get_radio_led_name(sc->hw);
	50
	51	snprintf(sc->led_name, sizeof(sc->led_name),
	52	"ath9k-%s", wiphy_name(sc->hw->wiphy));
	53	sc->led_cdev.name = sc->led_name;
	54	sc->led_cdev.brightness_set = ath_led_brightness;
	55
	56	ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev);
	57	if (ret < 0)
	58	return;
	59
	60	sc->led_registered = true;
0fca65c1	61	}
8f176a3a RM	62
	63	void ath_fill_led_pin(struct ath_softc *sc)
	64	{
	65	struct ath_hw *ah = sc->sc_ah;
	66
	67	if (AR_SREV_9100(ah) \|\| (ah->led_pin >= 0))
	68	return;
	69
	70	if (AR_SREV_9287(ah))
	71	ah->led_pin = ATH_LED_PIN_9287;
	72	else if (AR_SREV_9485(sc->sc_ah))
	73	ah->led_pin = ATH_LED_PIN_9485;
	74	else if (AR_SREV_9300(sc->sc_ah))
	75	ah->led_pin = ATH_LED_PIN_9300;
	76	else if (AR_SREV_9462(sc->sc_ah) \|\| AR_SREV_9565(sc->sc_ah))
	77	ah->led_pin = ATH_LED_PIN_9462;
	78	else
	79	ah->led_pin = ATH_LED_PIN_DEF;
	80
	81	/* Configure gpio 1 for output */
	82	ath9k_hw_cfg_output(ah, ah->led_pin, AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
	83
	84	/* LED off, active low */
	85	ath9k_hw_set_gpio(ah, ah->led_pin, 1);
	86	}
0cf55c21	87	#endif
0fca65c1 S	88
	89	/*******************/
	90	/* Rfkill */
	91	/*******************/
	92
	93	static bool ath_is_rfkill_set(struct ath_softc *sc)
	94	{
	95	struct ath_hw *ah = sc->sc_ah;
90826313	96	bool is_blocked;
0fca65c1	97
90826313 MSS	98	ath9k_ps_wakeup(sc);
90826313 MSS	99	is_blocked = ath9k_hw_gpio_get(ah, ah->rfkill_gpio) ==
0fca65c1	100	ah->rfkill_polarity;
90826313 MSS	101	ath9k_ps_restore(sc);
	102
	103	return is_blocked;
0fca65c1 S	104	}
	105
	106	void ath9k_rfkill_poll_state(struct ieee80211_hw *hw)
	107	{
9ac58615	108	struct ath_softc *sc = hw->priv;
0fca65c1 S	109	bool blocked = !!ath_is_rfkill_set(sc);
	110
	111	wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
	112	}
	113
	114	void ath_start_rfkill_poll(struct ath_softc *sc)
	115	{
	116	struct ath_hw *ah = sc->sc_ah;
	117
	118	if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
	119	wiphy_rfkill_start_polling(sc->hw->wiphy);
	120	}
	121
4daa7760 SM	122	#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
4daa7760 SM	123
0fca65c1 S	124	/******************/
	125	/* BTCOEX */
	126	/******************/
	127
	128	/*
	129	* Detects if there is any priority bt traffic
	130	*/
	131	static void ath_detect_bt_priority(struct ath_softc *sc)
	132	{
	133	struct ath_btcoex *btcoex = &sc->btcoex;
	134	struct ath_hw *ah = sc->sc_ah;
	135
	136	if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_hw.btpriority_gpio))
	137	btcoex->bt_priority_cnt++;
	138
	139	if (time_after(jiffies, btcoex->bt_priority_time +
	140	msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) {
e6930c4b SM	141	clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
e6930c4b SM	142	clear_bit(BT_OP_SCAN, &btcoex->op_flags);
58da1318 VT	143	/* Detect if colocated bt started scanning */
58da1318 VT	144	if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) {
d2182b69	145	ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
226afe68	146	"BT scan detected\n");
e6930c4b SM	147	set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
e6930c4b SM	148	set_bit(BT_OP_SCAN, &btcoex->op_flags);
58da1318	149	} else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
d2182b69	150	ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
226afe68	151	"BT priority traffic detected\n");
e6930c4b	152	set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
0fca65c1 S	153	}
	154
	155	btcoex->bt_priority_cnt = 0;
	156	btcoex->bt_priority_time = jiffies;
	157	}
	158	}
	159
0fca65c1 S	160	static void ath9k_gen_timer_start(struct ath_hw *ah,
0fca65c1 S	161	struct ath_gen_timer *timer,
788f6875	162	u32 trig_timeout,
0fca65c1 S	163	u32 timer_period)
0fca65c1 S	164	{
788f6875	165	ath9k_hw_gen_timer_start(ah, timer, trig_timeout, timer_period);
0fca65c1	166
3069168c	167	if ((ah->imask & ATH9K_INT_GENTIMER) == 0) {
4df3071e	168	ath9k_hw_disable_interrupts(ah);
3069168c	169	ah->imask \|= ATH9K_INT_GENTIMER;
72d874c6	170	ath9k_hw_set_interrupts(ah);
b037b693	171	ath9k_hw_enable_interrupts(ah);
0fca65c1 S	172	}
	173	}
	174
	175	static void ath9k_gen_timer_stop(struct ath_hw ah, struct ath_gen_timer timer)
	176	{
0fca65c1 S	177	struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
	178
	179	ath9k_hw_gen_timer_stop(ah, timer);
	180
	181	/* if no timer is enabled, turn off interrupt mask */
	182	if (timer_table->timer_mask.val == 0) {
4df3071e	183	ath9k_hw_disable_interrupts(ah);
3069168c	184	ah->imask &= ~ATH9K_INT_GENTIMER;
72d874c6	185	ath9k_hw_set_interrupts(ah);
b037b693	186	ath9k_hw_enable_interrupts(ah);
0fca65c1 S	187	}
	188	}
	189
	190	/*
	191	* This is the master bt coex timer which runs for every
	192	* 45ms, bt traffic will be given priority during 55% of this
	193	* period while wlan gets remaining 45%
	194	*/
	195	static void ath_btcoex_period_timer(unsigned long data)
	196	{
	197	struct ath_softc sc = (struct ath_softc ) data;
	198	struct ath_hw *ah = sc->sc_ah;
	199	struct ath_btcoex *btcoex = &sc->btcoex;
6995fb80	200	struct ath_mci_profile *mci = &btcoex->mci;
58da1318 VT	201	u32 timer_period;
58da1318 VT	202	bool is_btscan;
08d4df41 RM	203	unsigned long flags;
	204
	205	spin_lock_irqsave(&sc->sc_pm_lock, flags);
	206	if (sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP) {
	207	spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
	208	goto skip_hw_wakeup;
	209	}
	210	spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
0fca65c1	211
a039a993	212	ath9k_ps_wakeup(sc);
7dc181c2 RM	213	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
7dc181c2 RM	214	ath_detect_bt_priority(sc);
e6930c4b	215	is_btscan = test_bit(BT_OP_SCAN, &btcoex->op_flags);
58da1318	216
6995fb80 RM	217	btcoex->bt_wait_time += btcoex->btcoex_period;
6995fb80 RM	218	if (btcoex->bt_wait_time > ATH_BTCOEX_RX_WAIT_TIME) {
b98ccec0	219	if (ar9003_mci_state(ah, MCI_STATE_NEED_FTP_STOMP) &&
6995fb80 RM	220	(mci->num_pan \|\| mci->num_other_acl))
	221	ah->btcoex_hw.mci.stomp_ftp =
	222	(sc->rx.num_pkts < ATH_BTCOEX_STOMP_FTP_THRESH);
	223	else
	224	ah->btcoex_hw.mci.stomp_ftp = false;
	225	btcoex->bt_wait_time = 0;
	226	sc->rx.num_pkts = 0;
	227	}
	228
0fca65c1 S	229	spin_lock_bh(&btcoex->btcoex_lock);
0fca65c1 S	230
978f78bf	231	ath9k_hw_btcoex_bt_stomp(ah, is_btscan ? ATH_BTCOEX_STOMP_ALL :
58da1318	232	btcoex->bt_stomp_type);
0fca65c1	233
bc6d5c29	234	ath9k_hw_btcoex_enable(ah);
0fca65c1 S	235	spin_unlock_bh(&btcoex->btcoex_lock);
0fca65c1 S	236
94ae77ea MSS	237	/*
	238	* btcoex_period is in msec while (btocex/btscan_)no_stomp are in usec,
	239	* ensure that we properly convert btcoex_period to usec
	240	* for any comparision with (btcoex/btscan_)no_stomp.
	241	*/
	242	if (btcoex->btcoex_period * 1000 != btcoex->btcoex_no_stomp) {
0fca65c1 S	243	if (btcoex->hw_timer_enabled)
	244	ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
	245
58da1318 VT	246	timer_period = is_btscan ? btcoex->btscan_no_stomp :
58da1318 VT	247	btcoex->btcoex_no_stomp;
788f6875	248	ath9k_gen_timer_start(ah, btcoex->no_stomp_timer, timer_period,
8eb1dabb	249	timer_period * 10);
0fca65c1 S	250	btcoex->hw_timer_enabled = true;
	251	}
	252
a039a993	253	ath9k_ps_restore(sc);
08d4df41	254	skip_hw_wakeup:
dfd0587a	255	timer_period = btcoex->btcoex_period;
e6930c4b	256	mod_timer(&btcoex->period_timer, jiffies + msecs_to_jiffies(timer_period));
0fca65c1 S	257	}
	258
	259	/*
	260	* Generic tsf based hw timer which configures weight
	261	* registers to time slice between wlan and bt traffic
	262	*/
	263	static void ath_btcoex_no_stomp_timer(void *arg)
	264	{
	265	struct ath_softc sc = (struct ath_softc )arg;
	266	struct ath_hw *ah = sc->sc_ah;
	267	struct ath_btcoex *btcoex = &sc->btcoex;
d99eeb87	268	struct ath_common *common = ath9k_hw_common(ah);
0fca65c1	269
d2182b69	270	ath_dbg(common, BTCOEX, "no stomp timer running\n");
0fca65c1	271
a039a993	272	ath9k_ps_wakeup(sc);
0fca65c1 S	273	spin_lock_bh(&btcoex->btcoex_lock);
0fca65c1 S	274
e6930c4b SM	275	if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW \|\|
e6930c4b SM	276	test_bit(BT_OP_SCAN, &btcoex->op_flags))
978f78bf	277	ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
0fca65c1	278	else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
978f78bf	279	ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_LOW);
0fca65c1	280
bc6d5c29	281	ath9k_hw_btcoex_enable(ah);
0fca65c1	282	spin_unlock_bh(&btcoex->btcoex_lock);
a039a993	283	ath9k_ps_restore(sc);
0fca65c1 S	284	}
0fca65c1 S	285
df198b17	286	static int ath_init_btcoex_timer(struct ath_softc *sc)
0fca65c1 S	287	{
	288	struct ath_btcoex *btcoex = &sc->btcoex;
	289
dfd0587a RM	290	btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD;
dfd0587a RM	291	btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) * 1000 *
0fca65c1	292	btcoex->btcoex_period / 100;
dfd0587a	293	btcoex->btscan_no_stomp = (100 - ATH_BTCOEX_BTSCAN_DUTY_CYCLE) * 1000 *
58da1318	294	btcoex->btcoex_period / 100;
0fca65c1 S	295
	296	setup_timer(&btcoex->period_timer, ath_btcoex_period_timer,
	297	(unsigned long) sc);
	298
	299	spin_lock_init(&btcoex->btcoex_lock);
	300
	301	btcoex->no_stomp_timer = ath_gen_timer_alloc(sc->sc_ah,
	302	ath_btcoex_no_stomp_timer,
	303	ath_btcoex_no_stomp_timer,
	304	(void *) sc, AR_FIRST_NDP_TIMER);
	305
	306	if (!btcoex->no_stomp_timer)
	307	return -ENOMEM;
	308
	309	return 0;
	310	}
	311
	312	/*
	313	* (Re)start btcoex timers
	314	*/
	315	void ath9k_btcoex_timer_resume(struct ath_softc *sc)
	316	{
	317	struct ath_btcoex *btcoex = &sc->btcoex;
	318	struct ath_hw *ah = sc->sc_ah;
	319
d2182b69	320	ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex timers\n");
0fca65c1 S	321
0fca65c1 S	322	/* make sure duty cycle timer is also stopped when resuming */
5418b0f0	323	if (btcoex->hw_timer_enabled) {
0fca65c1	324	ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
5418b0f0 MSS	325	btcoex->hw_timer_enabled = false;
5418b0f0 MSS	326	}
0fca65c1 S	327
	328	btcoex->bt_priority_cnt = 0;
	329	btcoex->bt_priority_time = jiffies;
c11216d1 MSS	330	clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
c11216d1 MSS	331	clear_bit(BT_OP_SCAN, &btcoex->op_flags);
0fca65c1 S	332
	333	mod_timer(&btcoex->period_timer, jiffies);
	334	}
	335
	336
	337	/*
	338	* Pause btcoex timer and bt duty cycle timer
	339	*/
	340	void ath9k_btcoex_timer_pause(struct ath_softc *sc)
	341	{
	342	struct ath_btcoex *btcoex = &sc->btcoex;
	343	struct ath_hw *ah = sc->sc_ah;
	344
	345	del_timer_sync(&btcoex->period_timer);
	346
5418b0f0	347	if (btcoex->hw_timer_enabled) {
0fca65c1	348	ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
5418b0f0 MSS	349	btcoex->hw_timer_enabled = false;
5418b0f0 MSS	350	}
0fca65c1	351	}
5908120f	352
08d4df41 RM	353	void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
	354	{
	355	struct ath_btcoex *btcoex = &sc->btcoex;
	356
5418b0f0	357	if (btcoex->hw_timer_enabled) {
5d9b6f26	358	ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
5418b0f0 MSS	359	btcoex->hw_timer_enabled = false;
5418b0f0 MSS	360	}
08d4df41 RM	361	}
08d4df41 RM	362
c0ac53fa SM	363	u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen)
c0ac53fa SM	364	{
e6930c4b	365	struct ath_btcoex *btcoex = &sc->btcoex;
c0ac53fa SM	366	struct ath_mci_profile *mci = &sc->btcoex.mci;
	367	u16 aggr_limit = 0;
	368
	369	if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && mci->aggr_limit)
	370	aggr_limit = (max_4ms_framelen * mci->aggr_limit) >> 4;
e6930c4b	371	else if (test_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags))
c0ac53fa SM	372	aggr_limit = min((max_4ms_framelen * 3) / 8,
	373	(u32)ATH_AMPDU_LIMIT_MAX);
	374
	375	return aggr_limit;
	376	}
	377
56ca0dba SM	378	void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status)
	379	{
	380	struct ath_hw *ah = sc->sc_ah;
	381
	382	if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
	383	if (status & ATH9K_INT_GENTIMER)
	384	ath_gen_timer_isr(sc->sc_ah);
	385
9a15858f	386	if (status & ATH9K_INT_MCI)
56ca0dba SM	387	ath_mci_intr(sc);
	388	}
	389
df198b17 SM	390	void ath9k_start_btcoex(struct ath_softc *sc)
	391	{
	392	struct ath_hw *ah = sc->sc_ah;
	393
	394	if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
	395	!ah->btcoex_hw.enabled) {
	396	if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
	397	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
	398	AR_STOMP_LOW_WLAN_WGHT);
	399	ath9k_hw_btcoex_enable(ah);
	400
	401	if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
	402	ath9k_btcoex_timer_resume(sc);
	403	}
	404	}
	405
	406	void ath9k_stop_btcoex(struct ath_softc *sc)
	407	{
	408	struct ath_hw *ah = sc->sc_ah;
	409
	410	if (ah->btcoex_hw.enabled &&
	411	ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
df198b17 SM	412	if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
df198b17 SM	413	ath9k_btcoex_timer_pause(sc);
c32cdbd8	414	ath9k_hw_btcoex_disable(ah);
6a73f507	415	if (AR_SREV_9462(ah) \|\| AR_SREV_9565(ah))
bff2ec2b	416	ath_mci_flush_profile(&sc->btcoex.mci);
df198b17 SM	417	}
	418	}
	419
5908120f SM	420	void ath9k_deinit_btcoex(struct ath_softc *sc)
5908120f SM	421	{
dd89f05a MSS	422	struct ath_hw *ah = sc->sc_ah;
dd89f05a MSS	423
5908120f SM	424	if ((sc->btcoex.no_stomp_timer) &&
	425	ath9k_hw_get_btcoex_scheme(sc->sc_ah) == ATH_BTCOEX_CFG_3WIRE)
	426	ath_gen_timer_free(sc->sc_ah, sc->btcoex.no_stomp_timer);
	427
dd89f05a	428	if (ath9k_hw_mci_is_enabled(ah))
5908120f SM	429	ath_mci_cleanup(sc);
	430	}
	431
	432	int ath9k_init_btcoex(struct ath_softc *sc)
	433	{
	434	struct ath_txq *txq;
	435	struct ath_hw *ah = sc->sc_ah;
	436	int r;
	437
d68475de SM	438	ath9k_hw_btcoex_init_scheme(ah);
d68475de SM	439
5908120f SM	440	switch (ath9k_hw_get_btcoex_scheme(sc->sc_ah)) {
	441	case ATH_BTCOEX_CFG_NONE:
	442	break;
	443	case ATH_BTCOEX_CFG_2WIRE:
	444	ath9k_hw_btcoex_init_2wire(sc->sc_ah);
	445	break;
	446	case ATH_BTCOEX_CFG_3WIRE:
	447	ath9k_hw_btcoex_init_3wire(sc->sc_ah);
	448	r = ath_init_btcoex_timer(sc);
	449	if (r)
	450	return -1;
	451	txq = sc->tx.txq_map[WME_AC_BE];
	452	ath9k_hw_init_btcoex_hw(sc->sc_ah, txq->axq_qnum);
	453	sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
81294489	454	if (ath9k_hw_mci_is_enabled(ah)) {
0466e254 RM	455	sc->btcoex.duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;
0466e254 RM	456	INIT_LIST_HEAD(&sc->btcoex.mci.info);
5908120f	457
0466e254 RM	458	r = ath_mci_setup(sc);
	459	if (r)
	460	return r;
5908120f	461
0466e254 RM	462	ath9k_hw_btcoex_init_mci(ah);
0466e254 RM	463	}
5908120f SM	464
	465	break;
	466	default:
	467	WARN_ON(1);
	468	break;
	469	}
	470
	471	return 0;
	472	}
4daa7760 SM	473
4daa7760 SM	474	#endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */