Commit | Line | Data |
---|---|---|
0fca65c1 | 1 | /* |
5b68138e | 2 | * Copyright (c) 2008-2011 Atheros Communications Inc. |
0fca65c1 S |
3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
17 | #include "ath9k.h" | |
18 | ||
19 | /********************************/ | |
20 | /* LED functions */ | |
21 | /********************************/ | |
22 | ||
0cf55c21 | 23 | #ifdef CONFIG_MAC80211_LEDS |
0fca65c1 S |
24 | static void ath_led_brightness(struct led_classdev *led_cdev, |
25 | enum led_brightness brightness) | |
26 | { | |
0cf55c21 FF |
27 | struct ath_softc *sc = container_of(led_cdev, struct ath_softc, led_cdev); |
28 | ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, (brightness == LED_OFF)); | |
0fca65c1 S |
29 | } |
30 | ||
31 | void ath_deinit_leds(struct ath_softc *sc) | |
32 | { | |
0cf55c21 FF |
33 | if (!sc->led_registered) |
34 | return; | |
35 | ||
36 | ath_led_brightness(&sc->led_cdev, LED_OFF); | |
37 | led_classdev_unregister(&sc->led_cdev); | |
0fca65c1 S |
38 | } |
39 | ||
40 | void ath_init_leds(struct ath_softc *sc) | |
41 | { | |
0fca65c1 S |
42 | int ret; |
43 | ||
6de66dd9 FF |
44 | if (sc->sc_ah->led_pin < 0) { |
45 | if (AR_SREV_9287(sc->sc_ah)) | |
46 | sc->sc_ah->led_pin = ATH_LED_PIN_9287; | |
47 | else if (AR_SREV_9485(sc->sc_ah)) | |
48 | sc->sc_ah->led_pin = ATH_LED_PIN_9485; | |
353e5019 SB |
49 | else if (AR_SREV_9300(sc->sc_ah)) |
50 | sc->sc_ah->led_pin = ATH_LED_PIN_9300; | |
423e38e8 RM |
51 | else if (AR_SREV_9462(sc->sc_ah)) |
52 | sc->sc_ah->led_pin = ATH_LED_PIN_9462; | |
6de66dd9 FF |
53 | else |
54 | sc->sc_ah->led_pin = ATH_LED_PIN_DEF; | |
55 | } | |
0fca65c1 S |
56 | |
57 | /* Configure gpio 1 for output */ | |
58 | ath9k_hw_cfg_output(sc->sc_ah, sc->sc_ah->led_pin, | |
59 | AR_GPIO_OUTPUT_MUX_AS_OUTPUT); | |
60 | /* LED off, active low */ | |
61 | ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1); | |
62 | ||
0cf55c21 FF |
63 | if (!led_blink) |
64 | sc->led_cdev.default_trigger = | |
65 | ieee80211_get_radio_led_name(sc->hw); | |
66 | ||
67 | snprintf(sc->led_name, sizeof(sc->led_name), | |
68 | "ath9k-%s", wiphy_name(sc->hw->wiphy)); | |
69 | sc->led_cdev.name = sc->led_name; | |
70 | sc->led_cdev.brightness_set = ath_led_brightness; | |
71 | ||
72 | ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev); | |
73 | if (ret < 0) | |
74 | return; | |
75 | ||
76 | sc->led_registered = true; | |
0fca65c1 | 77 | } |
0cf55c21 | 78 | #endif |
0fca65c1 S |
79 | |
80 | /*******************/ | |
81 | /* Rfkill */ | |
82 | /*******************/ | |
83 | ||
84 | static bool ath_is_rfkill_set(struct ath_softc *sc) | |
85 | { | |
86 | struct ath_hw *ah = sc->sc_ah; | |
90826313 | 87 | bool is_blocked; |
0fca65c1 | 88 | |
90826313 MSS |
89 | ath9k_ps_wakeup(sc); |
90 | is_blocked = ath9k_hw_gpio_get(ah, ah->rfkill_gpio) == | |
0fca65c1 | 91 | ah->rfkill_polarity; |
90826313 MSS |
92 | ath9k_ps_restore(sc); |
93 | ||
94 | return is_blocked; | |
0fca65c1 S |
95 | } |
96 | ||
97 | void ath9k_rfkill_poll_state(struct ieee80211_hw *hw) | |
98 | { | |
9ac58615 | 99 | struct ath_softc *sc = hw->priv; |
0fca65c1 S |
100 | bool blocked = !!ath_is_rfkill_set(sc); |
101 | ||
102 | wiphy_rfkill_set_hw_state(hw->wiphy, blocked); | |
103 | } | |
104 | ||
105 | void ath_start_rfkill_poll(struct ath_softc *sc) | |
106 | { | |
107 | struct ath_hw *ah = sc->sc_ah; | |
108 | ||
109 | if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT) | |
110 | wiphy_rfkill_start_polling(sc->hw->wiphy); | |
111 | } | |
112 | ||
4daa7760 SM |
113 | #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT |
114 | ||
0fca65c1 S |
115 | /******************/ |
116 | /* BTCOEX */ | |
117 | /******************/ | |
118 | ||
119 | /* | |
120 | * Detects if there is any priority bt traffic | |
121 | */ | |
122 | static void ath_detect_bt_priority(struct ath_softc *sc) | |
123 | { | |
124 | struct ath_btcoex *btcoex = &sc->btcoex; | |
125 | struct ath_hw *ah = sc->sc_ah; | |
126 | ||
127 | if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_hw.btpriority_gpio)) | |
128 | btcoex->bt_priority_cnt++; | |
129 | ||
130 | if (time_after(jiffies, btcoex->bt_priority_time + | |
131 | msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) { | |
58da1318 VT |
132 | sc->sc_flags &= ~(SC_OP_BT_PRIORITY_DETECTED | SC_OP_BT_SCAN); |
133 | /* Detect if colocated bt started scanning */ | |
134 | if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) { | |
d2182b69 | 135 | ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX, |
226afe68 | 136 | "BT scan detected\n"); |
58da1318 VT |
137 | sc->sc_flags |= (SC_OP_BT_SCAN | |
138 | SC_OP_BT_PRIORITY_DETECTED); | |
139 | } else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) { | |
d2182b69 | 140 | ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX, |
226afe68 | 141 | "BT priority traffic detected\n"); |
0fca65c1 | 142 | sc->sc_flags |= SC_OP_BT_PRIORITY_DETECTED; |
0fca65c1 S |
143 | } |
144 | ||
145 | btcoex->bt_priority_cnt = 0; | |
146 | btcoex->bt_priority_time = jiffies; | |
147 | } | |
148 | } | |
149 | ||
0fca65c1 S |
150 | static void ath9k_gen_timer_start(struct ath_hw *ah, |
151 | struct ath_gen_timer *timer, | |
788f6875 | 152 | u32 trig_timeout, |
0fca65c1 S |
153 | u32 timer_period) |
154 | { | |
788f6875 | 155 | ath9k_hw_gen_timer_start(ah, timer, trig_timeout, timer_period); |
0fca65c1 | 156 | |
3069168c | 157 | if ((ah->imask & ATH9K_INT_GENTIMER) == 0) { |
4df3071e | 158 | ath9k_hw_disable_interrupts(ah); |
3069168c | 159 | ah->imask |= ATH9K_INT_GENTIMER; |
72d874c6 | 160 | ath9k_hw_set_interrupts(ah); |
b037b693 | 161 | ath9k_hw_enable_interrupts(ah); |
0fca65c1 S |
162 | } |
163 | } | |
164 | ||
165 | static void ath9k_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer) | |
166 | { | |
0fca65c1 S |
167 | struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers; |
168 | ||
169 | ath9k_hw_gen_timer_stop(ah, timer); | |
170 | ||
171 | /* if no timer is enabled, turn off interrupt mask */ | |
172 | if (timer_table->timer_mask.val == 0) { | |
4df3071e | 173 | ath9k_hw_disable_interrupts(ah); |
3069168c | 174 | ah->imask &= ~ATH9K_INT_GENTIMER; |
72d874c6 | 175 | ath9k_hw_set_interrupts(ah); |
b037b693 | 176 | ath9k_hw_enable_interrupts(ah); |
0fca65c1 S |
177 | } |
178 | } | |
179 | ||
180 | /* | |
181 | * This is the master bt coex timer which runs for every | |
182 | * 45ms, bt traffic will be given priority during 55% of this | |
183 | * period while wlan gets remaining 45% | |
184 | */ | |
185 | static void ath_btcoex_period_timer(unsigned long data) | |
186 | { | |
187 | struct ath_softc *sc = (struct ath_softc *) data; | |
188 | struct ath_hw *ah = sc->sc_ah; | |
189 | struct ath_btcoex *btcoex = &sc->btcoex; | |
58da1318 VT |
190 | u32 timer_period; |
191 | bool is_btscan; | |
0fca65c1 | 192 | |
a039a993 | 193 | ath9k_ps_wakeup(sc); |
7dc181c2 RM |
194 | if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) |
195 | ath_detect_bt_priority(sc); | |
58da1318 VT |
196 | is_btscan = sc->sc_flags & SC_OP_BT_SCAN; |
197 | ||
0fca65c1 S |
198 | spin_lock_bh(&btcoex->btcoex_lock); |
199 | ||
978f78bf | 200 | ath9k_hw_btcoex_bt_stomp(ah, is_btscan ? ATH_BTCOEX_STOMP_ALL : |
58da1318 | 201 | btcoex->bt_stomp_type); |
0fca65c1 | 202 | |
bc6d5c29 | 203 | ath9k_hw_btcoex_enable(ah); |
0fca65c1 S |
204 | spin_unlock_bh(&btcoex->btcoex_lock); |
205 | ||
206 | if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) { | |
207 | if (btcoex->hw_timer_enabled) | |
208 | ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer); | |
209 | ||
58da1318 VT |
210 | timer_period = is_btscan ? btcoex->btscan_no_stomp : |
211 | btcoex->btcoex_no_stomp; | |
788f6875 | 212 | ath9k_gen_timer_start(ah, btcoex->no_stomp_timer, timer_period, |
8eb1dabb | 213 | timer_period * 10); |
0fca65c1 S |
214 | btcoex->hw_timer_enabled = true; |
215 | } | |
216 | ||
a039a993 | 217 | ath9k_ps_restore(sc); |
7dc181c2 | 218 | timer_period = btcoex->btcoex_period / 1000; |
0fca65c1 | 219 | mod_timer(&btcoex->period_timer, jiffies + |
7dc181c2 | 220 | msecs_to_jiffies(timer_period)); |
0fca65c1 S |
221 | } |
222 | ||
223 | /* | |
224 | * Generic tsf based hw timer which configures weight | |
225 | * registers to time slice between wlan and bt traffic | |
226 | */ | |
227 | static void ath_btcoex_no_stomp_timer(void *arg) | |
228 | { | |
229 | struct ath_softc *sc = (struct ath_softc *)arg; | |
230 | struct ath_hw *ah = sc->sc_ah; | |
231 | struct ath_btcoex *btcoex = &sc->btcoex; | |
d99eeb87 | 232 | struct ath_common *common = ath9k_hw_common(ah); |
58da1318 | 233 | bool is_btscan = sc->sc_flags & SC_OP_BT_SCAN; |
0fca65c1 | 234 | |
d2182b69 | 235 | ath_dbg(common, BTCOEX, "no stomp timer running\n"); |
0fca65c1 | 236 | |
a039a993 | 237 | ath9k_ps_wakeup(sc); |
0fca65c1 S |
238 | spin_lock_bh(&btcoex->btcoex_lock); |
239 | ||
58da1318 | 240 | if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW || is_btscan) |
978f78bf | 241 | ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE); |
0fca65c1 | 242 | else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL) |
978f78bf | 243 | ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_LOW); |
0fca65c1 | 244 | |
bc6d5c29 | 245 | ath9k_hw_btcoex_enable(ah); |
0fca65c1 | 246 | spin_unlock_bh(&btcoex->btcoex_lock); |
a039a993 | 247 | ath9k_ps_restore(sc); |
0fca65c1 S |
248 | } |
249 | ||
df198b17 | 250 | static int ath_init_btcoex_timer(struct ath_softc *sc) |
0fca65c1 S |
251 | { |
252 | struct ath_btcoex *btcoex = &sc->btcoex; | |
253 | ||
254 | btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD * 1000; | |
255 | btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) * | |
256 | btcoex->btcoex_period / 100; | |
58da1318 VT |
257 | btcoex->btscan_no_stomp = (100 - ATH_BTCOEX_BTSCAN_DUTY_CYCLE) * |
258 | btcoex->btcoex_period / 100; | |
0fca65c1 S |
259 | |
260 | setup_timer(&btcoex->period_timer, ath_btcoex_period_timer, | |
261 | (unsigned long) sc); | |
262 | ||
263 | spin_lock_init(&btcoex->btcoex_lock); | |
264 | ||
265 | btcoex->no_stomp_timer = ath_gen_timer_alloc(sc->sc_ah, | |
266 | ath_btcoex_no_stomp_timer, | |
267 | ath_btcoex_no_stomp_timer, | |
268 | (void *) sc, AR_FIRST_NDP_TIMER); | |
269 | ||
270 | if (!btcoex->no_stomp_timer) | |
271 | return -ENOMEM; | |
272 | ||
273 | return 0; | |
274 | } | |
275 | ||
276 | /* | |
277 | * (Re)start btcoex timers | |
278 | */ | |
279 | void ath9k_btcoex_timer_resume(struct ath_softc *sc) | |
280 | { | |
281 | struct ath_btcoex *btcoex = &sc->btcoex; | |
282 | struct ath_hw *ah = sc->sc_ah; | |
283 | ||
d2182b69 | 284 | ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex timers\n"); |
0fca65c1 S |
285 | |
286 | /* make sure duty cycle timer is also stopped when resuming */ | |
287 | if (btcoex->hw_timer_enabled) | |
288 | ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer); | |
289 | ||
290 | btcoex->bt_priority_cnt = 0; | |
291 | btcoex->bt_priority_time = jiffies; | |
58da1318 | 292 | sc->sc_flags &= ~(SC_OP_BT_PRIORITY_DETECTED | SC_OP_BT_SCAN); |
0fca65c1 S |
293 | |
294 | mod_timer(&btcoex->period_timer, jiffies); | |
295 | } | |
296 | ||
297 | ||
298 | /* | |
299 | * Pause btcoex timer and bt duty cycle timer | |
300 | */ | |
301 | void ath9k_btcoex_timer_pause(struct ath_softc *sc) | |
302 | { | |
303 | struct ath_btcoex *btcoex = &sc->btcoex; | |
304 | struct ath_hw *ah = sc->sc_ah; | |
305 | ||
306 | del_timer_sync(&btcoex->period_timer); | |
307 | ||
308 | if (btcoex->hw_timer_enabled) | |
309 | ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer); | |
310 | ||
311 | btcoex->hw_timer_enabled = false; | |
312 | } | |
5908120f | 313 | |
c0ac53fa SM |
314 | u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen) |
315 | { | |
316 | struct ath_mci_profile *mci = &sc->btcoex.mci; | |
317 | u16 aggr_limit = 0; | |
318 | ||
319 | if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && mci->aggr_limit) | |
320 | aggr_limit = (max_4ms_framelen * mci->aggr_limit) >> 4; | |
321 | else if (sc->sc_flags & SC_OP_BT_PRIORITY_DETECTED) | |
322 | aggr_limit = min((max_4ms_framelen * 3) / 8, | |
323 | (u32)ATH_AMPDU_LIMIT_MAX); | |
324 | ||
325 | return aggr_limit; | |
326 | } | |
327 | ||
56ca0dba SM |
328 | void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status) |
329 | { | |
330 | struct ath_hw *ah = sc->sc_ah; | |
331 | ||
332 | if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE) | |
333 | if (status & ATH9K_INT_GENTIMER) | |
334 | ath_gen_timer_isr(sc->sc_ah); | |
335 | ||
9a15858f | 336 | if (status & ATH9K_INT_MCI) |
56ca0dba SM |
337 | ath_mci_intr(sc); |
338 | } | |
339 | ||
df198b17 SM |
340 | void ath9k_start_btcoex(struct ath_softc *sc) |
341 | { | |
342 | struct ath_hw *ah = sc->sc_ah; | |
343 | ||
344 | if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) && | |
345 | !ah->btcoex_hw.enabled) { | |
346 | if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) | |
347 | ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT, | |
348 | AR_STOMP_LOW_WLAN_WGHT); | |
349 | ath9k_hw_btcoex_enable(ah); | |
350 | ||
351 | if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE) | |
352 | ath9k_btcoex_timer_resume(sc); | |
353 | } | |
354 | } | |
355 | ||
356 | void ath9k_stop_btcoex(struct ath_softc *sc) | |
357 | { | |
358 | struct ath_hw *ah = sc->sc_ah; | |
359 | ||
360 | if (ah->btcoex_hw.enabled && | |
361 | ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) { | |
362 | ath9k_hw_btcoex_disable(ah); | |
363 | if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE) | |
364 | ath9k_btcoex_timer_pause(sc); | |
bff2ec2b SM |
365 | if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_MCI) |
366 | ath_mci_flush_profile(&sc->btcoex.mci); | |
df198b17 SM |
367 | } |
368 | } | |
369 | ||
5908120f SM |
370 | void ath9k_deinit_btcoex(struct ath_softc *sc) |
371 | { | |
372 | if ((sc->btcoex.no_stomp_timer) && | |
373 | ath9k_hw_get_btcoex_scheme(sc->sc_ah) == ATH_BTCOEX_CFG_3WIRE) | |
374 | ath_gen_timer_free(sc->sc_ah, sc->btcoex.no_stomp_timer); | |
375 | ||
376 | if (ath9k_hw_get_btcoex_scheme(sc->sc_ah) == ATH_BTCOEX_CFG_MCI) | |
377 | ath_mci_cleanup(sc); | |
378 | } | |
379 | ||
380 | int ath9k_init_btcoex(struct ath_softc *sc) | |
381 | { | |
382 | struct ath_txq *txq; | |
383 | struct ath_hw *ah = sc->sc_ah; | |
384 | int r; | |
385 | ||
d68475de SM |
386 | ath9k_hw_btcoex_init_scheme(ah); |
387 | ||
5908120f SM |
388 | switch (ath9k_hw_get_btcoex_scheme(sc->sc_ah)) { |
389 | case ATH_BTCOEX_CFG_NONE: | |
390 | break; | |
391 | case ATH_BTCOEX_CFG_2WIRE: | |
392 | ath9k_hw_btcoex_init_2wire(sc->sc_ah); | |
393 | break; | |
394 | case ATH_BTCOEX_CFG_3WIRE: | |
395 | ath9k_hw_btcoex_init_3wire(sc->sc_ah); | |
396 | r = ath_init_btcoex_timer(sc); | |
397 | if (r) | |
398 | return -1; | |
399 | txq = sc->tx.txq_map[WME_AC_BE]; | |
400 | ath9k_hw_init_btcoex_hw(sc->sc_ah, txq->axq_qnum); | |
401 | sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW; | |
402 | break; | |
403 | case ATH_BTCOEX_CFG_MCI: | |
404 | sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW; | |
405 | sc->btcoex.duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE; | |
406 | INIT_LIST_HEAD(&sc->btcoex.mci.info); | |
407 | ||
408 | r = ath_mci_setup(sc); | |
409 | if (r) | |
410 | return r; | |
411 | ||
412 | ath9k_hw_btcoex_init_mci(ah); | |
413 | ||
414 | break; | |
415 | default: | |
416 | WARN_ON(1); | |
417 | break; | |
418 | } | |
419 | ||
420 | return 0; | |
421 | } | |
4daa7760 SM |
422 | |
423 | #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */ |