[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / mci.c

/*
 * Copyright (c) 2010-2011 Atheros Communications Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <linux/dma-mapping.h>
#include <linux/slab.h>

#include "ath9k.h"
#include "mci.h"

static const u8 ath_mci_duty_cycle[] = { 0, 50, 60, 70, 80, 85, 90, 95, 98 };

static struct ath_mci_profile_info*
ath_mci_find_profile(struct ath_mci_profile *mci,
		     struct ath_mci_profile_info *info)
{
	struct ath_mci_profile_info *entry;

	list_for_each_entry(entry, &mci->info, list) {
		if (entry->conn_handle == info->conn_handle)
			break;
	}
	return entry;
}

static bool ath_mci_add_profile(struct ath_common *common,
				struct ath_mci_profile *mci,
				struct ath_mci_profile_info *info)
{
	struct ath_mci_profile_info *entry;

	if ((mci->num_sco == ATH_MCI_MAX_SCO_PROFILE) &&
	    (info->type == MCI_GPM_COEX_PROFILE_VOICE)) {
		ath_dbg(common, MCI,
			"Too many SCO profile, failed to add new profile\n");
		return false;
	}

	if (((NUM_PROF(mci) - mci->num_sco) == ATH_MCI_MAX_ACL_PROFILE) &&
	    (info->type != MCI_GPM_COEX_PROFILE_VOICE)) {
		ath_dbg(common, MCI,
			"Too many ACL profile, failed to add new profile\n");
		return false;
	}

	entry = ath_mci_find_profile(mci, info);

	if (entry)
		memcpy(entry, info, 10);
	else {
		entry = kzalloc(sizeof(*entry), GFP_KERNEL);
		if (!entry)
			return false;

		memcpy(entry, info, 10);
		INC_PROF(mci, info);
		list_add_tail(&info->list, &mci->info);
	}
	return true;
}

static void ath_mci_del_profile(struct ath_common *common,
				struct ath_mci_profile *mci,
				struct ath_mci_profile_info *info)
{
	struct ath_mci_profile_info *entry;

	entry = ath_mci_find_profile(mci, info);

	if (!entry) {
		ath_dbg(common, MCI, "Profile to be deleted not found\n");
		return;
	}
	DEC_PROF(mci, entry);
	list_del(&entry->list);
	kfree(entry);
}

void ath_mci_flush_profile(struct ath_mci_profile *mci)
{
	struct ath_mci_profile_info *info, *tinfo;

	list_for_each_entry_safe(info, tinfo, &mci->info, list) {
		list_del(&info->list);
		DEC_PROF(mci, info);
		kfree(info);
	}
	mci->aggr_limit = 0;
}

static void ath_mci_adjust_aggr_limit(struct ath_btcoex *btcoex)
{
	struct ath_mci_profile *mci = &btcoex->mci;
	u32 wlan_airtime = btcoex->btcoex_period *
				(100 - btcoex->duty_cycle) / 100;

	/*
	 * Scale: wlan_airtime is in ms, aggr_limit is in 0.25 ms.
	 * When wlan_airtime is less than 4ms, aggregation limit has to be
	 * adjusted half of wlan_airtime to ensure that the aggregation can fit
	 * without collision with BT traffic.
	 */
	if ((wlan_airtime <= 4) &&
	    (!mci->aggr_limit || (mci->aggr_limit > (2 * wlan_airtime))))
		mci->aggr_limit = 2 * wlan_airtime;
}

static void ath_mci_update_scheme(struct ath_softc *sc)
{
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
	struct ath_btcoex *btcoex = &sc->btcoex;
	struct ath_mci_profile *mci = &btcoex->mci;
	struct ath_mci_profile_info *info;
	u32 num_profile = NUM_PROF(mci);

	if (num_profile == 1) {
		info = list_first_entry(&mci->info,
					struct ath_mci_profile_info,
					list);
		if (mci->num_sco && info->T == 12) {
			mci->aggr_limit = 8;
			ath_dbg(common, MCI,
				"Single SCO, aggregation limit 2 ms\n");
		} else if ((info->type == MCI_GPM_COEX_PROFILE_BNEP) &&
			   !info->master) {
			btcoex->btcoex_period = 60;
			ath_dbg(common, MCI,
				"Single slave PAN/FTP, bt period 60 ms\n");
		} else if ((info->type == MCI_GPM_COEX_PROFILE_HID) &&
			 (info->T > 0 && info->T < 50) &&
			 (info->A > 1 || info->W > 1)) {
			btcoex->duty_cycle = 30;
			mci->aggr_limit = 8;
			ath_dbg(common, MCI,
				"Multiple attempt/timeout single HID "
				"aggregation limit 2 ms dutycycle 30%%\n");
		}
	} else if ((num_profile == 2) && (mci->num_hid == 2)) {
		btcoex->duty_cycle = 30;
		mci->aggr_limit = 8;
		ath_dbg(common, MCI,
			"Two HIDs aggregation limit 2 ms dutycycle 30%%\n");
	} else if (num_profile > 3) {
		mci->aggr_limit = 6;
		ath_dbg(common, MCI,
			"Three or more profiles aggregation limit 1.5 ms\n");
	}

	if (IS_CHAN_2GHZ(sc->sc_ah->curchan)) {
		if (IS_CHAN_HT(sc->sc_ah->curchan))
			ath_mci_adjust_aggr_limit(btcoex);
		else
			btcoex->btcoex_period >>= 1;
	}

	ath9k_hw_btcoex_disable(sc->sc_ah);
	ath9k_btcoex_timer_pause(sc);

	if (IS_CHAN_5GHZ(sc->sc_ah->curchan))
		return;

	btcoex->duty_cycle += (mci->num_bdr ? ATH_MCI_MAX_DUTY_CYCLE : 0);
	if (btcoex->duty_cycle > ATH_MCI_MAX_DUTY_CYCLE)
		btcoex->duty_cycle = ATH_MCI_MAX_DUTY_CYCLE;

	btcoex->btcoex_period *= 1000;
	btcoex->btcoex_no_stomp =  btcoex->btcoex_period *
					(100 - btcoex->duty_cycle) / 100;

	ath9k_hw_btcoex_enable(sc->sc_ah);
	ath9k_btcoex_timer_resume(sc);
}


static void ath_mci_cal_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
{
	struct ath_hw *ah = sc->sc_ah;
	struct ath_common *common = ath9k_hw_common(ah);
	u32 payload[4] = {0, 0, 0, 0};

	switch (opcode) {
	case MCI_GPM_BT_CAL_REQ:

		ath_dbg(common, MCI, "MCI received BT_CAL_REQ\n");

		if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {
			ar9003_mci_state(ah, MCI_STATE_SET_BT_CAL_START, NULL);
			ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
		} else
			ath_dbg(common, MCI, "MCI State mismatches: %d\n",
				ar9003_mci_state(ah, MCI_STATE_BT, NULL));

		break;

	case MCI_GPM_BT_CAL_DONE:

		ath_dbg(common, MCI, "MCI received BT_CAL_DONE\n");

		if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_CAL)
			ath_dbg(common, MCI, "MCI error illegal!\n");
		else
			ath_dbg(common, MCI, "MCI BT not in CAL state\n");

		break;

	case MCI_GPM_BT_CAL_GRANT:

		ath_dbg(common, MCI, "MCI received BT_CAL_GRANT\n");

		/* Send WLAN_CAL_DONE for now */
		ath_dbg(common, MCI, "MCI send WLAN_CAL_DONE\n");
		MCI_GPM_SET_CAL_TYPE(payload, MCI_GPM_WLAN_CAL_DONE);
		ar9003_mci_send_message(sc->sc_ah, MCI_GPM, 0, payload,
					16, false, true);
		break;

	default:
		ath_dbg(common, MCI, "MCI Unknown GPM CAL message\n");
		break;
	}
}

static void ath_mci_process_profile(struct ath_softc *sc,
				    struct ath_mci_profile_info *info)
{
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
	struct ath_btcoex *btcoex = &sc->btcoex;
	struct ath_mci_profile *mci = &btcoex->mci;

	if (info->start) {
		if (!ath_mci_add_profile(common, mci, info))
			return;
	} else
		ath_mci_del_profile(common, mci, info);

	btcoex->btcoex_period = ATH_MCI_DEF_BT_PERIOD;
	mci->aggr_limit = mci->num_sco ? 6 : 0;
	if (NUM_PROF(mci)) {
		btcoex->bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
		btcoex->duty_cycle = ath_mci_duty_cycle[NUM_PROF(mci)];
	} else {
		btcoex->bt_stomp_type = mci->num_mgmt ? ATH_BTCOEX_STOMP_ALL :
							ATH_BTCOEX_STOMP_LOW;
		btcoex->duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;
	}

	ath_mci_update_scheme(sc);
}

static void ath_mci_process_status(struct ath_softc *sc,
				   struct ath_mci_profile_status *status)
{
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
	struct ath_btcoex *btcoex = &sc->btcoex;
	struct ath_mci_profile *mci = &btcoex->mci;
	struct ath_mci_profile_info info;
	int i = 0, old_num_mgmt = mci->num_mgmt;

	/* Link status type are not handled */
	if (status->is_link) {
		ath_dbg(common, MCI, "Skip link type status update\n");
		return;
	}

	memset(&info, 0, sizeof(struct ath_mci_profile_info));

	info.conn_handle = status->conn_handle;
	if (ath_mci_find_profile(mci, &info)) {
		ath_dbg(common, MCI,
			"Skip non link state update for existing profile %d\n",
			status->conn_handle);
		return;
	}
	if (status->conn_handle >= ATH_MCI_MAX_PROFILE) {
		ath_dbg(common, MCI, "Ignore too many non-link update\n");
		return;
	}
	if (status->is_critical)
		__set_bit(status->conn_handle, mci->status);
	else
		__clear_bit(status->conn_handle, mci->status);

	mci->num_mgmt = 0;
	do {
		if (test_bit(i, mci->status))
			mci->num_mgmt++;
	} while (++i < ATH_MCI_MAX_PROFILE);

	if (old_num_mgmt != mci->num_mgmt)
		ath_mci_update_scheme(sc);
}

static void ath_mci_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
{
	struct ath_hw *ah = sc->sc_ah;
	struct ath_mci_profile_info profile_info;
	struct ath_mci_profile_status profile_status;
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
	u32 version;
	u8 major;
	u8 minor;
	u32 seq_num;

	switch (opcode) {

	case MCI_GPM_COEX_VERSION_QUERY:
		ath_dbg(common, MCI, "MCI Recv GPM COEX Version Query\n");
		version = ar9003_mci_state(ah,
				MCI_STATE_SEND_WLAN_COEX_VERSION, NULL);
		break;

	case MCI_GPM_COEX_VERSION_RESPONSE:
		ath_dbg(common, MCI, "MCI Recv GPM COEX Version Response\n");
		major = *(rx_payload + MCI_GPM_COEX_B_MAJOR_VERSION);
		minor = *(rx_payload + MCI_GPM_COEX_B_MINOR_VERSION);
		ath_dbg(common, MCI, "MCI BT Coex version: %d.%d\n",
			major, minor);
		version = (major << 8) + minor;
		version = ar9003_mci_state(ah,
			  MCI_STATE_SET_BT_COEX_VERSION, &version);
		break;

	case MCI_GPM_COEX_STATUS_QUERY:
		ath_dbg(common, MCI,
			"MCI Recv GPM COEX Status Query = 0x%02x\n",
			*(rx_payload + MCI_GPM_COEX_B_WLAN_BITMAP));
		ar9003_mci_state(ah,
		MCI_STATE_SEND_WLAN_CHANNELS, NULL);
		break;

	case MCI_GPM_COEX_BT_PROFILE_INFO:
		ath_dbg(common, MCI, "MCI Recv GPM Coex BT profile info\n");
		memcpy(&profile_info,
		       (rx_payload + MCI_GPM_COEX_B_PROFILE_TYPE), 10);

		if ((profile_info.type == MCI_GPM_COEX_PROFILE_UNKNOWN)
		    || (profile_info.type >=
					    MCI_GPM_COEX_PROFILE_MAX)) {

			ath_dbg(common, MCI,
				"illegal profile type = %d, state = %d\n",
				profile_info.type,
				profile_info.start);
			break;
		}

		ath_mci_process_profile(sc, &profile_info);
		break;

	case MCI_GPM_COEX_BT_STATUS_UPDATE:
		profile_status.is_link = *(rx_payload +
					   MCI_GPM_COEX_B_STATUS_TYPE);
		profile_status.conn_handle = *(rx_payload +
					       MCI_GPM_COEX_B_STATUS_LINKID);
		profile_status.is_critical = *(rx_payload +
					       MCI_GPM_COEX_B_STATUS_STATE);

		seq_num = *((u32 *)(rx_payload + 12));
		ath_dbg(common, MCI,
			"MCI Recv GPM COEX BT_Status_Update: is_link=%d, linkId=%d, state=%d, SEQ=%d\n",
			profile_status.is_link, profile_status.conn_handle,
			profile_status.is_critical, seq_num);

		ath_mci_process_status(sc, &profile_status);
		break;

	default:
		ath_dbg(common, MCI, "MCI Unknown GPM COEX message = 0x%02x\n",
			opcode);
		break;
	}
}

int ath_mci_setup(struct ath_softc *sc)
{
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
	struct ath_mci_coex *mci = &sc->mci_coex;
	struct ath_mci_buf *buf = &mci->sched_buf;

	buf->bf_addr = dma_alloc_coherent(sc->dev,
				  ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
				  &buf->bf_paddr, GFP_KERNEL);

	if (buf->bf_addr == NULL) {
		ath_dbg(common, FATAL, "MCI buffer alloc failed\n");
		return -ENOMEM;
	}

	memset(buf->bf_addr, MCI_GPM_RSVD_PATTERN,
	       ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE);

	mci->sched_buf.bf_len = ATH_MCI_SCHED_BUF_SIZE;

	mci->gpm_buf.bf_len = ATH_MCI_GPM_BUF_SIZE;
	mci->gpm_buf.bf_addr = (u8 *)mci->sched_buf.bf_addr + mci->sched_buf.bf_len;
	mci->gpm_buf.bf_paddr = mci->sched_buf.bf_paddr + mci->sched_buf.bf_len;

	ar9003_mci_setup(sc->sc_ah, mci->gpm_buf.bf_paddr,
			 mci->gpm_buf.bf_addr, (mci->gpm_buf.bf_len >> 4),
			 mci->sched_buf.bf_paddr);

	ath_dbg(common, MCI, "MCI Initialized\n");

	return 0;
}

void ath_mci_cleanup(struct ath_softc *sc)
{
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
	struct ath_hw *ah = sc->sc_ah;
	struct ath_mci_coex *mci = &sc->mci_coex;
	struct ath_mci_buf *buf = &mci->sched_buf;

	if (buf->bf_addr)
		dma_free_coherent(sc->dev,
				  ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
				  buf->bf_addr, buf->bf_paddr);

	ar9003_mci_cleanup(ah);

	ath_dbg(common, MCI, "MCI De-Initialized\n");
}

void ath_mci_intr(struct ath_softc *sc)
{
	struct ath_mci_coex *mci = &sc->mci_coex;
	struct ath_hw *ah = sc->sc_ah;
	struct ath_common *common = ath9k_hw_common(ah);
	u32 mci_int, mci_int_rxmsg;
	u32 offset, subtype, opcode;
	u32 *pgpm;
	u32 more_data = MCI_GPM_MORE;
	bool skip_gpm = false;

	ar9003_mci_get_interrupt(sc->sc_ah, &mci_int, &mci_int_rxmsg);

	if (ar9003_mci_state(ah, MCI_STATE_ENABLE, NULL) == 0) {

		ar9003_mci_state(sc->sc_ah, MCI_STATE_INIT_GPM_OFFSET, NULL);
		ath_dbg(common, MCI, "MCI interrupt but MCI disabled\n");

		ath_dbg(common, MCI,
			"MCI interrupt: intr = 0x%x, intr_rxmsg = 0x%x\n",
			mci_int, mci_int_rxmsg);
		return;
	}

	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE) {
		u32 payload[4] = { 0xffffffff, 0xffffffff,
				   0xffffffff, 0xffffff00};

		/*
		 * The following REMOTE_RESET and SYS_WAKING used to sent
		 * only when BT wake up. Now they are always sent, as a
		 * recovery method to reset BT MCI's RX alignment.
		 */
		ath_dbg(common, MCI, "MCI interrupt send REMOTE_RESET\n");

		ar9003_mci_send_message(ah, MCI_REMOTE_RESET, 0,
					payload, 16, true, false);
		ath_dbg(common, MCI, "MCI interrupt send SYS_WAKING\n");
		ar9003_mci_send_message(ah, MCI_SYS_WAKING, 0,
					NULL, 0, true, false);

		mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE;
		ar9003_mci_state(ah, MCI_STATE_RESET_REQ_WAKE, NULL);

		/*
		 * always do this for recovery and 2G/5G toggling and LNA_TRANS
		 */
		ath_dbg(common, MCI, "MCI Set BT state to AWAKE\n");
		ar9003_mci_state(ah, MCI_STATE_SET_BT_AWAKE, NULL);
	}

	/* Processing SYS_WAKING/SYS_SLEEPING */
	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING) {
		mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING;

		if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_SLEEP) {

			if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL)
					== MCI_BT_SLEEP)
				ath_dbg(common, MCI,
					"MCI BT stays in sleep mode\n");
			else {
				ath_dbg(common, MCI,
					"MCI Set BT state to AWAKE\n");
				ar9003_mci_state(ah,
						 MCI_STATE_SET_BT_AWAKE, NULL);
			}
		} else
			ath_dbg(common, MCI, "MCI BT stays in AWAKE mode\n");
	}

	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING) {

		mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING;

		if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {

			if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL)
					== MCI_BT_AWAKE)
				ath_dbg(common, MCI,
					"MCI BT stays in AWAKE mode\n");
			else {
				ath_dbg(common, MCI,
					"MCI SetBT state to SLEEP\n");
				ar9003_mci_state(ah, MCI_STATE_SET_BT_SLEEP,
						 NULL);
			}
		} else
			ath_dbg(common, MCI, "MCI BT stays in SLEEP mode\n");
	}

	if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) ||
	    (mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT)) {

		ath_dbg(common, MCI, "MCI RX broken, skip GPM msgs\n");
		ar9003_mci_state(ah, MCI_STATE_RECOVER_RX, NULL);
		skip_gpm = true;
	}

	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO) {

		mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO;
		offset = ar9003_mci_state(ah, MCI_STATE_LAST_SCHD_MSG_OFFSET,
					  NULL);
	}

	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_GPM) {

		mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_GPM;

		while (more_data == MCI_GPM_MORE) {

			pgpm = mci->gpm_buf.bf_addr;
			offset = ar9003_mci_state(ah,
					MCI_STATE_NEXT_GPM_OFFSET, &more_data);

			if (offset == MCI_GPM_INVALID)
				break;

			pgpm += (offset >> 2);

			/*
			 * The first dword is timer.
			 * The real data starts from 2nd dword.
			 */

			subtype = MCI_GPM_TYPE(pgpm);
			opcode = MCI_GPM_OPCODE(pgpm);

			if (!skip_gpm) {

				if (MCI_GPM_IS_CAL_TYPE(subtype))
					ath_mci_cal_msg(sc, subtype,
							(u8 *) pgpm);
				else {
					switch (subtype) {
					case MCI_GPM_COEX_AGENT:
						ath_mci_msg(sc, opcode,
							    (u8 *) pgpm);
						break;
					default:
						break;
					}
				}
			}
			MCI_GPM_RECYCLE(pgpm);
		}
	}

	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_HW_MSG_MASK) {

		if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL)
			mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL;

		if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_INFO) {
			mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_INFO;
			ath_dbg(common, MCI, "MCI LNA_INFO\n");
		}

		if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_INFO) {

			int value_dbm = ar9003_mci_state(ah,
					MCI_STATE_CONT_RSSI_POWER, NULL);

			mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_INFO;

			if (ar9003_mci_state(ah, MCI_STATE_CONT_TXRX, NULL))
				ath_dbg(common, MCI,
					"MCI CONT_INFO: (tx) pri = %d, pwr = %d dBm\n",
					ar9003_mci_state(ah,
						MCI_STATE_CONT_PRIORITY, NULL),
					value_dbm);
			else
				ath_dbg(common, MCI,
					"MCI CONT_INFO: (rx) pri = %d,pwr = %d dBm\n",
					ar9003_mci_state(ah,
						MCI_STATE_CONT_PRIORITY, NULL),
					value_dbm);
		}

		if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_NACK) {
			mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_NACK;
			ath_dbg(common, MCI, "MCI CONT_NACK\n");
		}

		if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_RST) {
			mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_RST;
			ath_dbg(common, MCI, "MCI CONT_RST\n");
		}
	}

	if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) ||
	    (mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT))
		mci_int &= ~(AR_MCI_INTERRUPT_RX_INVALID_HDR |
			     AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT);

	if (mci_int_rxmsg & 0xfffffffe)
		ath_dbg(common, MCI, "MCI not processed mci_int_rxmsg = 0x%x\n",
			mci_int_rxmsg);
}
Commit	Line	Data
7dc181c2 RM	1	/*
	2	* Copyright (c) 2010-2011 Atheros Communications Inc.
	3	*
	4	* Permission to use, copy, modify, and/or distribute this software for any
	5	* purpose with or without fee is hereby granted, provided that the above
	6	* copyright notice and this permission notice appear in all copies.
	7	*
	8	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	9	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	10	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
	11	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	12	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
	13	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
	14	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	15	*/
	16
9e25365f MSS	17	#include <linux/dma-mapping.h>
	18	#include <linux/slab.h>
	19
7dc181c2 RM	20	#include "ath9k.h"
	21	#include "mci.h"
	22
6ec414fd	23	static const u8 ath_mci_duty_cycle[] = { 0, 50, 60, 70, 80, 85, 90, 95, 98 };
7dc181c2 RM	24
	25	static struct ath_mci_profile_info*
	26	ath_mci_find_profile(struct ath_mci_profile *mci,
	27	struct ath_mci_profile_info *info)
	28	{
	29	struct ath_mci_profile_info *entry;
	30
	31	list_for_each_entry(entry, &mci->info, list) {
	32	if (entry->conn_handle == info->conn_handle)
	33	break;
	34	}
	35	return entry;
	36	}
	37
	38	static bool ath_mci_add_profile(struct ath_common *common,
	39	struct ath_mci_profile *mci,
	40	struct ath_mci_profile_info *info)
	41	{
	42	struct ath_mci_profile_info *entry;
	43
	44	if ((mci->num_sco == ATH_MCI_MAX_SCO_PROFILE) &&
	45	(info->type == MCI_GPM_COEX_PROFILE_VOICE)) {
d2182b69	46	ath_dbg(common, MCI,
7dc181c2 RM	47	"Too many SCO profile, failed to add new profile\n");
	48	return false;
	49	}
	50
	51	if (((NUM_PROF(mci) - mci->num_sco) == ATH_MCI_MAX_ACL_PROFILE) &&
	52	(info->type != MCI_GPM_COEX_PROFILE_VOICE)) {
d2182b69	53	ath_dbg(common, MCI,
7dc181c2 RM	54	"Too many ACL profile, failed to add new profile\n");
	55	return false;
	56	}
	57
	58	entry = ath_mci_find_profile(mci, info);
	59
	60	if (entry)
	61	memcpy(entry, info, 10);
	62	else {
	63	entry = kzalloc(sizeof(*entry), GFP_KERNEL);
	64	if (!entry)
	65	return false;
	66
	67	memcpy(entry, info, 10);
	68	INC_PROF(mci, info);
	69	list_add_tail(&info->list, &mci->info);
	70	}
	71	return true;
	72	}
	73
	74	static void ath_mci_del_profile(struct ath_common *common,
	75	struct ath_mci_profile *mci,
	76	struct ath_mci_profile_info *info)
	77	{
	78	struct ath_mci_profile_info *entry;
	79
	80	entry = ath_mci_find_profile(mci, info);
	81
	82	if (!entry) {
d2182b69	83	ath_dbg(common, MCI, "Profile to be deleted not found\n");
7dc181c2 RM	84	return;
	85	}
	86	DEC_PROF(mci, entry);
	87	list_del(&entry->list);
	88	kfree(entry);
	89	}
	90
	91	void ath_mci_flush_profile(struct ath_mci_profile *mci)
	92	{
	93	struct ath_mci_profile_info info, tinfo;
	94
	95	list_for_each_entry_safe(info, tinfo, &mci->info, list) {
	96	list_del(&info->list);
	97	DEC_PROF(mci, info);
	98	kfree(info);
	99	}
	100	mci->aggr_limit = 0;
	101	}
	102
	103	static void ath_mci_adjust_aggr_limit(struct ath_btcoex *btcoex)
	104	{
	105	struct ath_mci_profile *mci = &btcoex->mci;
	106	u32 wlan_airtime = btcoex->btcoex_period *
	107	(100 - btcoex->duty_cycle) / 100;
	108
	109	/*
	110	* Scale: wlan_airtime is in ms, aggr_limit is in 0.25 ms.
	111	* When wlan_airtime is less than 4ms, aggregation limit has to be
	112	* adjusted half of wlan_airtime to ensure that the aggregation can fit
	113	* without collision with BT traffic.
	114	*/
	115	if ((wlan_airtime <= 4) &&
	116	(!mci->aggr_limit \|\| (mci->aggr_limit > (2 * wlan_airtime))))
	117	mci->aggr_limit = 2 * wlan_airtime;
	118	}
	119
	120	static void ath_mci_update_scheme(struct ath_softc *sc)
	121	{
	122	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
	123	struct ath_btcoex *btcoex = &sc->btcoex;
	124	struct ath_mci_profile *mci = &btcoex->mci;
	125	struct ath_mci_profile_info *info;
	126	u32 num_profile = NUM_PROF(mci);
	127
	128	if (num_profile == 1) {
	129	info = list_first_entry(&mci->info,
	130	struct ath_mci_profile_info,
	131	list);
	132	if (mci->num_sco && info->T == 12) {
	133	mci->aggr_limit = 8;
d2182b69	134	ath_dbg(common, MCI,
7dc181c2 RM	135	"Single SCO, aggregation limit 2 ms\n");
	136	} else if ((info->type == MCI_GPM_COEX_PROFILE_BNEP) &&
	137	!info->master) {
	138	btcoex->btcoex_period = 60;
d2182b69	139	ath_dbg(common, MCI,
7dc181c2 RM	140	"Single slave PAN/FTP, bt period 60 ms\n");
	141	} else if ((info->type == MCI_GPM_COEX_PROFILE_HID) &&
	142	(info->T > 0 && info->T < 50) &&
	143	(info->A > 1 \|\| info->W > 1)) {
	144	btcoex->duty_cycle = 30;
	145	mci->aggr_limit = 8;
d2182b69	146	ath_dbg(common, MCI,
7dc181c2 RM	147	"Multiple attempt/timeout single HID "
	148	"aggregation limit 2 ms dutycycle 30%%\n");
	149	}
	150	} else if ((num_profile == 2) && (mci->num_hid == 2)) {
	151	btcoex->duty_cycle = 30;
	152	mci->aggr_limit = 8;
d2182b69	153	ath_dbg(common, MCI,
7dc181c2 RM	154	"Two HIDs aggregation limit 2 ms dutycycle 30%%\n");
	155	} else if (num_profile > 3) {
	156	mci->aggr_limit = 6;
d2182b69	157	ath_dbg(common, MCI,
7dc181c2 RM	158	"Three or more profiles aggregation limit 1.5 ms\n");
	159	}
	160
	161	if (IS_CHAN_2GHZ(sc->sc_ah->curchan)) {
	162	if (IS_CHAN_HT(sc->sc_ah->curchan))
	163	ath_mci_adjust_aggr_limit(btcoex);
	164	else
	165	btcoex->btcoex_period >>= 1;
	166	}
	167
	168	ath9k_hw_btcoex_disable(sc->sc_ah);
	169	ath9k_btcoex_timer_pause(sc);
	170
	171	if (IS_CHAN_5GHZ(sc->sc_ah->curchan))
	172	return;
	173
	174	btcoex->duty_cycle += (mci->num_bdr ? ATH_MCI_MAX_DUTY_CYCLE : 0);
	175	if (btcoex->duty_cycle > ATH_MCI_MAX_DUTY_CYCLE)
	176	btcoex->duty_cycle = ATH_MCI_MAX_DUTY_CYCLE;
	177
	178	btcoex->btcoex_period *= 1000;
	179	btcoex->btcoex_no_stomp = btcoex->btcoex_period *
	180	(100 - btcoex->duty_cycle) / 100;
	181
	182	ath9k_hw_btcoex_enable(sc->sc_ah);
	183	ath9k_btcoex_timer_resume(sc);
	184	}
	185
19686ddf MSS	186
	187	static void ath_mci_cal_msg(struct ath_softc sc, u8 opcode, u8 rx_payload)
	188	{
	189	struct ath_hw *ah = sc->sc_ah;
	190	struct ath_common *common = ath9k_hw_common(ah);
	191	u32 payload[4] = {0, 0, 0, 0};
	192
	193	switch (opcode) {
	194	case MCI_GPM_BT_CAL_REQ:
	195
d2182b69	196	ath_dbg(common, MCI, "MCI received BT_CAL_REQ\n");
19686ddf MSS	197
	198	if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {
	199	ar9003_mci_state(ah, MCI_STATE_SET_BT_CAL_START, NULL);
	200	ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
	201	} else
d2182b69	202	ath_dbg(common, MCI, "MCI State mismatches: %d\n",
19686ddf MSS	203	ar9003_mci_state(ah, MCI_STATE_BT, NULL));
	204
	205	break;
	206
	207	case MCI_GPM_BT_CAL_DONE:
	208
d2182b69	209	ath_dbg(common, MCI, "MCI received BT_CAL_DONE\n");
19686ddf MSS	210
19686ddf MSS	211	if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_CAL)
d2182b69	212	ath_dbg(common, MCI, "MCI error illegal!\n");
19686ddf	213	else
d2182b69	214	ath_dbg(common, MCI, "MCI BT not in CAL state\n");
19686ddf MSS	215
	216	break;
	217
	218	case MCI_GPM_BT_CAL_GRANT:
	219
d2182b69	220	ath_dbg(common, MCI, "MCI received BT_CAL_GRANT\n");
19686ddf MSS	221
19686ddf MSS	222	/* Send WLAN_CAL_DONE for now */
d2182b69	223	ath_dbg(common, MCI, "MCI send WLAN_CAL_DONE\n");
19686ddf MSS	224	MCI_GPM_SET_CAL_TYPE(payload, MCI_GPM_WLAN_CAL_DONE);
	225	ar9003_mci_send_message(sc->sc_ah, MCI_GPM, 0, payload,
	226	16, false, true);
	227	break;
	228
	229	default:
d2182b69	230	ath_dbg(common, MCI, "MCI Unknown GPM CAL message\n");
19686ddf MSS	231	break;
	232	}
	233	}
	234
e5f0a276 FF	235	static void ath_mci_process_profile(struct ath_softc *sc,
e5f0a276 FF	236	struct ath_mci_profile_info *info)
7dc181c2 RM	237	{
	238	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
	239	struct ath_btcoex *btcoex = &sc->btcoex;
	240	struct ath_mci_profile *mci = &btcoex->mci;
	241
	242	if (info->start) {
	243	if (!ath_mci_add_profile(common, mci, info))
	244	return;
	245	} else
	246	ath_mci_del_profile(common, mci, info);
	247
	248	btcoex->btcoex_period = ATH_MCI_DEF_BT_PERIOD;
	249	mci->aggr_limit = mci->num_sco ? 6 : 0;
	250	if (NUM_PROF(mci)) {
	251	btcoex->bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
	252	btcoex->duty_cycle = ath_mci_duty_cycle[NUM_PROF(mci)];
	253	} else {
	254	btcoex->bt_stomp_type = mci->num_mgmt ? ATH_BTCOEX_STOMP_ALL :
	255	ATH_BTCOEX_STOMP_LOW;
	256	btcoex->duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;
	257	}
	258
	259	ath_mci_update_scheme(sc);
	260	}
	261
e5f0a276 FF	262	static void ath_mci_process_status(struct ath_softc *sc,
e5f0a276 FF	263	struct ath_mci_profile_status *status)
7dc181c2 RM	264	{
	265	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
	266	struct ath_btcoex *btcoex = &sc->btcoex;
	267	struct ath_mci_profile *mci = &btcoex->mci;
	268	struct ath_mci_profile_info info;
	269	int i = 0, old_num_mgmt = mci->num_mgmt;
	270
	271	/* Link status type are not handled */
	272	if (status->is_link) {
d2182b69	273	ath_dbg(common, MCI, "Skip link type status update\n");
7dc181c2 RM	274	return;
	275	}
	276
	277	memset(&info, 0, sizeof(struct ath_mci_profile_info));
	278
	279	info.conn_handle = status->conn_handle;
	280	if (ath_mci_find_profile(mci, &info)) {
d2182b69	281	ath_dbg(common, MCI,
7dc181c2 RM	282	"Skip non link state update for existing profile %d\n",
	283	status->conn_handle);
	284	return;
	285	}
	286	if (status->conn_handle >= ATH_MCI_MAX_PROFILE) {
d2182b69	287	ath_dbg(common, MCI, "Ignore too many non-link update\n");
7dc181c2 RM	288	return;
	289	}
	290	if (status->is_critical)
	291	__set_bit(status->conn_handle, mci->status);
	292	else
	293	__clear_bit(status->conn_handle, mci->status);
	294
	295	mci->num_mgmt = 0;
	296	do {
	297	if (test_bit(i, mci->status))
	298	mci->num_mgmt++;
	299	} while (++i < ATH_MCI_MAX_PROFILE);
	300
	301	if (old_num_mgmt != mci->num_mgmt)
	302	ath_mci_update_scheme(sc);
	303	}
9e25365f	304
19686ddf MSS	305	static void ath_mci_msg(struct ath_softc sc, u8 opcode, u8 rx_payload)
	306	{
	307	struct ath_hw *ah = sc->sc_ah;
	308	struct ath_mci_profile_info profile_info;
	309	struct ath_mci_profile_status profile_status;
	310	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
	311	u32 version;
	312	u8 major;
	313	u8 minor;
	314	u32 seq_num;
	315
	316	switch (opcode) {
	317
	318	case MCI_GPM_COEX_VERSION_QUERY:
d2182b69	319	ath_dbg(common, MCI, "MCI Recv GPM COEX Version Query\n");
19686ddf MSS	320	version = ar9003_mci_state(ah,
	321	MCI_STATE_SEND_WLAN_COEX_VERSION, NULL);
	322	break;
	323
	324	case MCI_GPM_COEX_VERSION_RESPONSE:
d2182b69	325	ath_dbg(common, MCI, "MCI Recv GPM COEX Version Response\n");
19686ddf MSS	326	major = *(rx_payload + MCI_GPM_COEX_B_MAJOR_VERSION);
19686ddf MSS	327	minor = *(rx_payload + MCI_GPM_COEX_B_MINOR_VERSION);
d2182b69 JP	328	ath_dbg(common, MCI, "MCI BT Coex version: %d.%d\n",
d2182b69 JP	329	major, minor);
19686ddf MSS	330	version = (major << 8) + minor;
	331	version = ar9003_mci_state(ah,
	332	MCI_STATE_SET_BT_COEX_VERSION, &version);
	333	break;
	334
	335	case MCI_GPM_COEX_STATUS_QUERY:
d2182b69 JP	336	ath_dbg(common, MCI,
d2182b69 JP	337	"MCI Recv GPM COEX Status Query = 0x%02x\n",
19686ddf MSS	338	*(rx_payload + MCI_GPM_COEX_B_WLAN_BITMAP));
	339	ar9003_mci_state(ah,
	340	MCI_STATE_SEND_WLAN_CHANNELS, NULL);
	341	break;
	342
	343	case MCI_GPM_COEX_BT_PROFILE_INFO:
d2182b69	344	ath_dbg(common, MCI, "MCI Recv GPM Coex BT profile info\n");
19686ddf MSS	345	memcpy(&profile_info,
	346	(rx_payload + MCI_GPM_COEX_B_PROFILE_TYPE), 10);
	347
	348	if ((profile_info.type == MCI_GPM_COEX_PROFILE_UNKNOWN)
	349	\|\| (profile_info.type >=
	350	MCI_GPM_COEX_PROFILE_MAX)) {
	351
d2182b69 JP	352	ath_dbg(common, MCI,
	353	"illegal profile type = %d, state = %d\n",
	354	profile_info.type,
19686ddf MSS	355	profile_info.start);
	356	break;
	357	}
	358
	359	ath_mci_process_profile(sc, &profile_info);
	360	break;
	361
	362	case MCI_GPM_COEX_BT_STATUS_UPDATE:
	363	profile_status.is_link = *(rx_payload +
	364	MCI_GPM_COEX_B_STATUS_TYPE);
	365	profile_status.conn_handle = *(rx_payload +
	366	MCI_GPM_COEX_B_STATUS_LINKID);
	367	profile_status.is_critical = *(rx_payload +
	368	MCI_GPM_COEX_B_STATUS_STATE);
	369
	370	seq_num = ((u32 )(rx_payload + 12));
d2182b69 JP	371	ath_dbg(common, MCI,
d2182b69 JP	372	"MCI Recv GPM COEX BT_Status_Update: is_link=%d, linkId=%d, state=%d, SEQ=%d\n",
19686ddf MSS	373	profile_status.is_link, profile_status.conn_handle,
	374	profile_status.is_critical, seq_num);
	375
	376	ath_mci_process_status(sc, &profile_status);
	377	break;
	378
	379	default:
d2182b69 JP	380	ath_dbg(common, MCI, "MCI Unknown GPM COEX message = 0x%02x\n",
d2182b69 JP	381	opcode);
19686ddf MSS	382	break;
	383	}
	384	}
9e25365f	385
9e25365f MSS	386	int ath_mci_setup(struct ath_softc *sc)
	387	{
	388	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
	389	struct ath_mci_coex *mci = &sc->mci_coex;
ea510e4b	390	struct ath_mci_buf *buf = &mci->sched_buf;
9e25365f	391
ea510e4b SM	392	buf->bf_addr = dma_alloc_coherent(sc->dev,
	393	ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
	394	&buf->bf_paddr, GFP_KERNEL);
9e25365f	395
ea510e4b	396	if (buf->bf_addr == NULL) {
d2182b69	397	ath_dbg(common, FATAL, "MCI buffer alloc failed\n");
ea510e4b	398	return -ENOMEM;
9e25365f MSS	399	}
9e25365f MSS	400
ea510e4b SM	401	memset(buf->bf_addr, MCI_GPM_RSVD_PATTERN,
ea510e4b SM	402	ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE);
9e25365f	403
ea510e4b	404	mci->sched_buf.bf_len = ATH_MCI_SCHED_BUF_SIZE;
9e25365f MSS	405
9e25365f MSS	406	mci->gpm_buf.bf_len = ATH_MCI_GPM_BUF_SIZE;
ea510e4b	407	mci->gpm_buf.bf_addr = (u8 *)mci->sched_buf.bf_addr + mci->sched_buf.bf_len;
9e25365f MSS	408	mci->gpm_buf.bf_paddr = mci->sched_buf.bf_paddr + mci->sched_buf.bf_len;
9e25365f MSS	409
9e25365f MSS	410	ar9003_mci_setup(sc->sc_ah, mci->gpm_buf.bf_paddr,
	411	mci->gpm_buf.bf_addr, (mci->gpm_buf.bf_len >> 4),
	412	mci->sched_buf.bf_paddr);
ea510e4b SM	413
	414	ath_dbg(common, MCI, "MCI Initialized\n");
	415
	416	return 0;
9e25365f MSS	417	}
	418
	419	void ath_mci_cleanup(struct ath_softc *sc)
	420	{
ea510e4b	421	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
9e25365f MSS	422	struct ath_hw *ah = sc->sc_ah;
9e25365f MSS	423	struct ath_mci_coex *mci = &sc->mci_coex;
ea510e4b	424	struct ath_mci_buf *buf = &mci->sched_buf;
9e25365f	425
ea510e4b SM	426	if (buf->bf_addr)
	427	dma_free_coherent(sc->dev,
	428	ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
	429	buf->bf_addr, buf->bf_paddr);
	430
9e25365f	431	ar9003_mci_cleanup(ah);
ea510e4b SM	432
ea510e4b SM	433	ath_dbg(common, MCI, "MCI De-Initialized\n");
9e25365f	434	}
19686ddf MSS	435
	436	void ath_mci_intr(struct ath_softc *sc)
	437	{
	438	struct ath_mci_coex *mci = &sc->mci_coex;
	439	struct ath_hw *ah = sc->sc_ah;
	440	struct ath_common *common = ath9k_hw_common(ah);
	441	u32 mci_int, mci_int_rxmsg;
	442	u32 offset, subtype, opcode;
	443	u32 *pgpm;
	444	u32 more_data = MCI_GPM_MORE;
	445	bool skip_gpm = false;
	446
	447	ar9003_mci_get_interrupt(sc->sc_ah, &mci_int, &mci_int_rxmsg);
	448
	449	if (ar9003_mci_state(ah, MCI_STATE_ENABLE, NULL) == 0) {
	450
	451	ar9003_mci_state(sc->sc_ah, MCI_STATE_INIT_GPM_OFFSET, NULL);
d2182b69	452	ath_dbg(common, MCI, "MCI interrupt but MCI disabled\n");
19686ddf	453
d2182b69	454	ath_dbg(common, MCI,
19686ddf MSS	455	"MCI interrupt: intr = 0x%x, intr_rxmsg = 0x%x\n",
	456	mci_int, mci_int_rxmsg);
	457	return;
	458	}
	459
	460	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE) {
	461	u32 payload[4] = { 0xffffffff, 0xffffffff,
	462	0xffffffff, 0xffffff00};
	463
	464	/*
	465	* The following REMOTE_RESET and SYS_WAKING used to sent
	466	* only when BT wake up. Now they are always sent, as a
	467	* recovery method to reset BT MCI's RX alignment.
	468	*/
d2182b69	469	ath_dbg(common, MCI, "MCI interrupt send REMOTE_RESET\n");
19686ddf MSS	470
	471	ar9003_mci_send_message(ah, MCI_REMOTE_RESET, 0,
	472	payload, 16, true, false);
d2182b69	473	ath_dbg(common, MCI, "MCI interrupt send SYS_WAKING\n");
19686ddf MSS	474	ar9003_mci_send_message(ah, MCI_SYS_WAKING, 0,
	475	NULL, 0, true, false);
	476
	477	mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE;
	478	ar9003_mci_state(ah, MCI_STATE_RESET_REQ_WAKE, NULL);
	479
	480	/*
	481	* always do this for recovery and 2G/5G toggling and LNA_TRANS
	482	*/
d2182b69	483	ath_dbg(common, MCI, "MCI Set BT state to AWAKE\n");
19686ddf MSS	484	ar9003_mci_state(ah, MCI_STATE_SET_BT_AWAKE, NULL);
	485	}
	486
	487	/* Processing SYS_WAKING/SYS_SLEEPING */
	488	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING) {
	489	mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING;
	490
	491	if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_SLEEP) {
	492
	493	if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL)
	494	== MCI_BT_SLEEP)
d2182b69	495	ath_dbg(common, MCI,
19686ddf MSS	496	"MCI BT stays in sleep mode\n");
19686ddf MSS	497	else {
d2182b69 JP	498	ath_dbg(common, MCI,
d2182b69 JP	499	"MCI Set BT state to AWAKE\n");
19686ddf MSS	500	ar9003_mci_state(ah,
	501	MCI_STATE_SET_BT_AWAKE, NULL);
	502	}
	503	} else
d2182b69	504	ath_dbg(common, MCI, "MCI BT stays in AWAKE mode\n");
19686ddf MSS	505	}
	506
	507	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING) {
	508
	509	mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING;
	510
	511	if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {
	512
	513	if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL)
	514	== MCI_BT_AWAKE)
d2182b69 JP	515	ath_dbg(common, MCI,
d2182b69 JP	516	"MCI BT stays in AWAKE mode\n");
19686ddf	517	else {
d2182b69	518	ath_dbg(common, MCI,
19686ddf MSS	519	"MCI SetBT state to SLEEP\n");
	520	ar9003_mci_state(ah, MCI_STATE_SET_BT_SLEEP,
	521	NULL);
	522	}
	523	} else
d2182b69	524	ath_dbg(common, MCI, "MCI BT stays in SLEEP mode\n");
19686ddf MSS	525	}
	526
	527	if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) \|\|
	528	(mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT)) {
	529
d2182b69	530	ath_dbg(common, MCI, "MCI RX broken, skip GPM msgs\n");
19686ddf MSS	531	ar9003_mci_state(ah, MCI_STATE_RECOVER_RX, NULL);
	532	skip_gpm = true;
	533	}
	534
	535	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO) {
	536
	537	mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO;
	538	offset = ar9003_mci_state(ah, MCI_STATE_LAST_SCHD_MSG_OFFSET,
	539	NULL);
	540	}
	541
	542	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_GPM) {
	543
	544	mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_GPM;
	545
	546	while (more_data == MCI_GPM_MORE) {
	547
	548	pgpm = mci->gpm_buf.bf_addr;
	549	offset = ar9003_mci_state(ah,
	550	MCI_STATE_NEXT_GPM_OFFSET, &more_data);
	551
	552	if (offset == MCI_GPM_INVALID)
	553	break;
	554
	555	pgpm += (offset >> 2);
	556
	557	/*
	558	* The first dword is timer.
	559	* The real data starts from 2nd dword.
	560	*/
	561
	562	subtype = MCI_GPM_TYPE(pgpm);
	563	opcode = MCI_GPM_OPCODE(pgpm);
	564
	565	if (!skip_gpm) {
	566
	567	if (MCI_GPM_IS_CAL_TYPE(subtype))
	568	ath_mci_cal_msg(sc, subtype,
	569	(u8 *) pgpm);
	570	else {
	571	switch (subtype) {
	572	case MCI_GPM_COEX_AGENT:
	573	ath_mci_msg(sc, opcode,
	574	(u8 *) pgpm);
	575	break;
	576	default:
	577	break;
	578	}
	579	}
	580	}
	581	MCI_GPM_RECYCLE(pgpm);
	582	}
	583	}
	584
	585	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_HW_MSG_MASK) {
	586
	587	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL)
	588	mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL;
	589
	590	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_INFO) {
	591	mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_INFO;
d2182b69	592	ath_dbg(common, MCI, "MCI LNA_INFO\n");
19686ddf MSS	593	}
	594
	595	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_INFO) {
	596
	597	int value_dbm = ar9003_mci_state(ah,
	598	MCI_STATE_CONT_RSSI_POWER, NULL);
	599
	600	mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_INFO;
	601
	602	if (ar9003_mci_state(ah, MCI_STATE_CONT_TXRX, NULL))
d2182b69 JP	603	ath_dbg(common, MCI,
d2182b69 JP	604	"MCI CONT_INFO: (tx) pri = %d, pwr = %d dBm\n",
19686ddf MSS	605	ar9003_mci_state(ah,
	606	MCI_STATE_CONT_PRIORITY, NULL),
	607	value_dbm);
	608	else
d2182b69 JP	609	ath_dbg(common, MCI,
d2182b69 JP	610	"MCI CONT_INFO: (rx) pri = %d,pwr = %d dBm\n",
19686ddf MSS	611	ar9003_mci_state(ah,
	612	MCI_STATE_CONT_PRIORITY, NULL),
	613	value_dbm);
	614	}
	615
	616	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_NACK) {
	617	mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_NACK;
d2182b69	618	ath_dbg(common, MCI, "MCI CONT_NACK\n");
19686ddf MSS	619	}
	620
	621	if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_RST) {
	622	mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_RST;
d2182b69	623	ath_dbg(common, MCI, "MCI CONT_RST\n");
19686ddf MSS	624	}
	625	}
	626
	627	if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) \|\|
	628	(mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT))
	629	mci_int &= ~(AR_MCI_INTERRUPT_RX_INVALID_HDR \|
	630	AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT);
	631
	632	if (mci_int_rxmsg & 0xfffffffe)
d2182b69	633	ath_dbg(common, MCI, "MCI not processed mci_int_rxmsg = 0x%x\n",
19686ddf MSS	634	mci_int_rxmsg);
19686ddf MSS	635	}