cfg80211: Return beacon loss count in station
[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / mci.c
CommitLineData
7dc181c2
RM
1/*
2 * Copyright (c) 2010-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
9e25365f
MSS
17#include <linux/dma-mapping.h>
18#include <linux/slab.h>
19
7dc181c2
RM
20#include "ath9k.h"
21#include "mci.h"
22
23u8 ath_mci_duty_cycle[] = { 0, 50, 60, 70, 80, 85, 90, 95, 98 };
24
25static struct ath_mci_profile_info*
26ath_mci_find_profile(struct ath_mci_profile *mci,
27 struct ath_mci_profile_info *info)
28{
29 struct ath_mci_profile_info *entry;
30
31 list_for_each_entry(entry, &mci->info, list) {
32 if (entry->conn_handle == info->conn_handle)
33 break;
34 }
35 return entry;
36}
37
38static bool ath_mci_add_profile(struct ath_common *common,
39 struct ath_mci_profile *mci,
40 struct ath_mci_profile_info *info)
41{
42 struct ath_mci_profile_info *entry;
43
44 if ((mci->num_sco == ATH_MCI_MAX_SCO_PROFILE) &&
45 (info->type == MCI_GPM_COEX_PROFILE_VOICE)) {
46 ath_dbg(common, ATH_DBG_MCI,
47 "Too many SCO profile, failed to add new profile\n");
48 return false;
49 }
50
51 if (((NUM_PROF(mci) - mci->num_sco) == ATH_MCI_MAX_ACL_PROFILE) &&
52 (info->type != MCI_GPM_COEX_PROFILE_VOICE)) {
53 ath_dbg(common, ATH_DBG_MCI,
54 "Too many ACL profile, failed to add new profile\n");
55 return false;
56 }
57
58 entry = ath_mci_find_profile(mci, info);
59
60 if (entry)
61 memcpy(entry, info, 10);
62 else {
63 entry = kzalloc(sizeof(*entry), GFP_KERNEL);
64 if (!entry)
65 return false;
66
67 memcpy(entry, info, 10);
68 INC_PROF(mci, info);
69 list_add_tail(&info->list, &mci->info);
70 }
71 return true;
72}
73
74static void ath_mci_del_profile(struct ath_common *common,
75 struct ath_mci_profile *mci,
76 struct ath_mci_profile_info *info)
77{
78 struct ath_mci_profile_info *entry;
79
80 entry = ath_mci_find_profile(mci, info);
81
82 if (!entry) {
83 ath_dbg(common, ATH_DBG_MCI,
84 "Profile to be deleted not found\n");
85 return;
86 }
87 DEC_PROF(mci, entry);
88 list_del(&entry->list);
89 kfree(entry);
90}
91
92void ath_mci_flush_profile(struct ath_mci_profile *mci)
93{
94 struct ath_mci_profile_info *info, *tinfo;
95
96 list_for_each_entry_safe(info, tinfo, &mci->info, list) {
97 list_del(&info->list);
98 DEC_PROF(mci, info);
99 kfree(info);
100 }
101 mci->aggr_limit = 0;
102}
103
104static void ath_mci_adjust_aggr_limit(struct ath_btcoex *btcoex)
105{
106 struct ath_mci_profile *mci = &btcoex->mci;
107 u32 wlan_airtime = btcoex->btcoex_period *
108 (100 - btcoex->duty_cycle) / 100;
109
110 /*
111 * Scale: wlan_airtime is in ms, aggr_limit is in 0.25 ms.
112 * When wlan_airtime is less than 4ms, aggregation limit has to be
113 * adjusted half of wlan_airtime to ensure that the aggregation can fit
114 * without collision with BT traffic.
115 */
116 if ((wlan_airtime <= 4) &&
117 (!mci->aggr_limit || (mci->aggr_limit > (2 * wlan_airtime))))
118 mci->aggr_limit = 2 * wlan_airtime;
119}
120
121static void ath_mci_update_scheme(struct ath_softc *sc)
122{
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
124 struct ath_btcoex *btcoex = &sc->btcoex;
125 struct ath_mci_profile *mci = &btcoex->mci;
126 struct ath_mci_profile_info *info;
127 u32 num_profile = NUM_PROF(mci);
128
129 if (num_profile == 1) {
130 info = list_first_entry(&mci->info,
131 struct ath_mci_profile_info,
132 list);
133 if (mci->num_sco && info->T == 12) {
134 mci->aggr_limit = 8;
135 ath_dbg(common, ATH_DBG_MCI,
136 "Single SCO, aggregation limit 2 ms\n");
137 } else if ((info->type == MCI_GPM_COEX_PROFILE_BNEP) &&
138 !info->master) {
139 btcoex->btcoex_period = 60;
140 ath_dbg(common, ATH_DBG_MCI,
141 "Single slave PAN/FTP, bt period 60 ms\n");
142 } else if ((info->type == MCI_GPM_COEX_PROFILE_HID) &&
143 (info->T > 0 && info->T < 50) &&
144 (info->A > 1 || info->W > 1)) {
145 btcoex->duty_cycle = 30;
146 mci->aggr_limit = 8;
147 ath_dbg(common, ATH_DBG_MCI,
148 "Multiple attempt/timeout single HID "
149 "aggregation limit 2 ms dutycycle 30%%\n");
150 }
151 } else if ((num_profile == 2) && (mci->num_hid == 2)) {
152 btcoex->duty_cycle = 30;
153 mci->aggr_limit = 8;
154 ath_dbg(common, ATH_DBG_MCI,
155 "Two HIDs aggregation limit 2 ms dutycycle 30%%\n");
156 } else if (num_profile > 3) {
157 mci->aggr_limit = 6;
158 ath_dbg(common, ATH_DBG_MCI,
159 "Three or more profiles aggregation limit 1.5 ms\n");
160 }
161
162 if (IS_CHAN_2GHZ(sc->sc_ah->curchan)) {
163 if (IS_CHAN_HT(sc->sc_ah->curchan))
164 ath_mci_adjust_aggr_limit(btcoex);
165 else
166 btcoex->btcoex_period >>= 1;
167 }
168
169 ath9k_hw_btcoex_disable(sc->sc_ah);
170 ath9k_btcoex_timer_pause(sc);
171
172 if (IS_CHAN_5GHZ(sc->sc_ah->curchan))
173 return;
174
175 btcoex->duty_cycle += (mci->num_bdr ? ATH_MCI_MAX_DUTY_CYCLE : 0);
176 if (btcoex->duty_cycle > ATH_MCI_MAX_DUTY_CYCLE)
177 btcoex->duty_cycle = ATH_MCI_MAX_DUTY_CYCLE;
178
179 btcoex->btcoex_period *= 1000;
180 btcoex->btcoex_no_stomp = btcoex->btcoex_period *
181 (100 - btcoex->duty_cycle) / 100;
182
183 ath9k_hw_btcoex_enable(sc->sc_ah);
184 ath9k_btcoex_timer_resume(sc);
185}
186
19686ddf
MSS
187
188static void ath_mci_cal_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
189{
190 struct ath_hw *ah = sc->sc_ah;
191 struct ath_common *common = ath9k_hw_common(ah);
192 u32 payload[4] = {0, 0, 0, 0};
193
194 switch (opcode) {
195 case MCI_GPM_BT_CAL_REQ:
196
197 ath_dbg(common, ATH_DBG_MCI, "MCI received BT_CAL_REQ\n");
198
199 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {
200 ar9003_mci_state(ah, MCI_STATE_SET_BT_CAL_START, NULL);
201 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
202 } else
203 ath_dbg(common, ATH_DBG_MCI,
204 "MCI State mismatches: %d\n",
205 ar9003_mci_state(ah, MCI_STATE_BT, NULL));
206
207 break;
208
209 case MCI_GPM_BT_CAL_DONE:
210
211 ath_dbg(common, ATH_DBG_MCI, "MCI received BT_CAL_DONE\n");
212
213 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_CAL)
214 ath_dbg(common, ATH_DBG_MCI, "MCI error illegal!\n");
215 else
216 ath_dbg(common, ATH_DBG_MCI, "MCI BT not in CAL state\n");
217
218 break;
219
220 case MCI_GPM_BT_CAL_GRANT:
221
222 ath_dbg(common, ATH_DBG_MCI, "MCI received BT_CAL_GRANT\n");
223
224 /* Send WLAN_CAL_DONE for now */
225 ath_dbg(common, ATH_DBG_MCI, "MCI send WLAN_CAL_DONE\n");
226 MCI_GPM_SET_CAL_TYPE(payload, MCI_GPM_WLAN_CAL_DONE);
227 ar9003_mci_send_message(sc->sc_ah, MCI_GPM, 0, payload,
228 16, false, true);
229 break;
230
231 default:
232 ath_dbg(common, ATH_DBG_MCI, "MCI Unknown GPM CAL message\n");
233 break;
234 }
235}
236
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FF
237static void ath_mci_process_profile(struct ath_softc *sc,
238 struct ath_mci_profile_info *info)
7dc181c2
RM
239{
240 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
241 struct ath_btcoex *btcoex = &sc->btcoex;
242 struct ath_mci_profile *mci = &btcoex->mci;
243
244 if (info->start) {
245 if (!ath_mci_add_profile(common, mci, info))
246 return;
247 } else
248 ath_mci_del_profile(common, mci, info);
249
250 btcoex->btcoex_period = ATH_MCI_DEF_BT_PERIOD;
251 mci->aggr_limit = mci->num_sco ? 6 : 0;
252 if (NUM_PROF(mci)) {
253 btcoex->bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
254 btcoex->duty_cycle = ath_mci_duty_cycle[NUM_PROF(mci)];
255 } else {
256 btcoex->bt_stomp_type = mci->num_mgmt ? ATH_BTCOEX_STOMP_ALL :
257 ATH_BTCOEX_STOMP_LOW;
258 btcoex->duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;
259 }
260
261 ath_mci_update_scheme(sc);
262}
263
e5f0a276
FF
264static void ath_mci_process_status(struct ath_softc *sc,
265 struct ath_mci_profile_status *status)
7dc181c2
RM
266{
267 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
268 struct ath_btcoex *btcoex = &sc->btcoex;
269 struct ath_mci_profile *mci = &btcoex->mci;
270 struct ath_mci_profile_info info;
271 int i = 0, old_num_mgmt = mci->num_mgmt;
272
273 /* Link status type are not handled */
274 if (status->is_link) {
275 ath_dbg(common, ATH_DBG_MCI,
276 "Skip link type status update\n");
277 return;
278 }
279
280 memset(&info, 0, sizeof(struct ath_mci_profile_info));
281
282 info.conn_handle = status->conn_handle;
283 if (ath_mci_find_profile(mci, &info)) {
284 ath_dbg(common, ATH_DBG_MCI,
285 "Skip non link state update for existing profile %d\n",
286 status->conn_handle);
287 return;
288 }
289 if (status->conn_handle >= ATH_MCI_MAX_PROFILE) {
290 ath_dbg(common, ATH_DBG_MCI,
291 "Ignore too many non-link update\n");
292 return;
293 }
294 if (status->is_critical)
295 __set_bit(status->conn_handle, mci->status);
296 else
297 __clear_bit(status->conn_handle, mci->status);
298
299 mci->num_mgmt = 0;
300 do {
301 if (test_bit(i, mci->status))
302 mci->num_mgmt++;
303 } while (++i < ATH_MCI_MAX_PROFILE);
304
305 if (old_num_mgmt != mci->num_mgmt)
306 ath_mci_update_scheme(sc);
307}
9e25365f 308
19686ddf
MSS
309static void ath_mci_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
310{
311 struct ath_hw *ah = sc->sc_ah;
312 struct ath_mci_profile_info profile_info;
313 struct ath_mci_profile_status profile_status;
314 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
315 u32 version;
316 u8 major;
317 u8 minor;
318 u32 seq_num;
319
320 switch (opcode) {
321
322 case MCI_GPM_COEX_VERSION_QUERY:
323 ath_dbg(common, ATH_DBG_MCI,
324 "MCI Recv GPM COEX Version Query.\n");
325 version = ar9003_mci_state(ah,
326 MCI_STATE_SEND_WLAN_COEX_VERSION, NULL);
327 break;
328
329 case MCI_GPM_COEX_VERSION_RESPONSE:
330 ath_dbg(common, ATH_DBG_MCI,
331 "MCI Recv GPM COEX Version Response.\n");
332 major = *(rx_payload + MCI_GPM_COEX_B_MAJOR_VERSION);
333 minor = *(rx_payload + MCI_GPM_COEX_B_MINOR_VERSION);
334 ath_dbg(common, ATH_DBG_MCI,
335 "MCI BT Coex version: %d.%d\n", major, minor);
336 version = (major << 8) + minor;
337 version = ar9003_mci_state(ah,
338 MCI_STATE_SET_BT_COEX_VERSION, &version);
339 break;
340
341 case MCI_GPM_COEX_STATUS_QUERY:
342 ath_dbg(common, ATH_DBG_MCI,
343 "MCI Recv GPM COEX Status Query = 0x%02x.\n",
344 *(rx_payload + MCI_GPM_COEX_B_WLAN_BITMAP));
345 ar9003_mci_state(ah,
346 MCI_STATE_SEND_WLAN_CHANNELS, NULL);
347 break;
348
349 case MCI_GPM_COEX_BT_PROFILE_INFO:
350 ath_dbg(common, ATH_DBG_MCI,
351 "MCI Recv GPM Coex BT profile info\n");
352 memcpy(&profile_info,
353 (rx_payload + MCI_GPM_COEX_B_PROFILE_TYPE), 10);
354
355 if ((profile_info.type == MCI_GPM_COEX_PROFILE_UNKNOWN)
356 || (profile_info.type >=
357 MCI_GPM_COEX_PROFILE_MAX)) {
358
359 ath_dbg(common, ATH_DBG_MCI,
360 "illegal profile type = %d,"
361 "state = %d\n", profile_info.type,
362 profile_info.start);
363 break;
364 }
365
366 ath_mci_process_profile(sc, &profile_info);
367 break;
368
369 case MCI_GPM_COEX_BT_STATUS_UPDATE:
370 profile_status.is_link = *(rx_payload +
371 MCI_GPM_COEX_B_STATUS_TYPE);
372 profile_status.conn_handle = *(rx_payload +
373 MCI_GPM_COEX_B_STATUS_LINKID);
374 profile_status.is_critical = *(rx_payload +
375 MCI_GPM_COEX_B_STATUS_STATE);
376
377 seq_num = *((u32 *)(rx_payload + 12));
378 ath_dbg(common, ATH_DBG_MCI,
379 "MCI Recv GPM COEX BT_Status_Update: "
380 "is_link=%d, linkId=%d, state=%d, SEQ=%d\n",
381 profile_status.is_link, profile_status.conn_handle,
382 profile_status.is_critical, seq_num);
383
384 ath_mci_process_status(sc, &profile_status);
385 break;
386
387 default:
388 ath_dbg(common, ATH_DBG_MCI,
389 "MCI Unknown GPM COEX message = 0x%02x\n", opcode);
390 break;
391 }
392}
9e25365f
MSS
393
394static int ath_mci_buf_alloc(struct ath_softc *sc, struct ath_mci_buf *buf)
395{
396 int error = 0;
397
398 buf->bf_addr = dma_alloc_coherent(sc->dev, buf->bf_len,
399 &buf->bf_paddr, GFP_KERNEL);
400
401 if (buf->bf_addr == NULL) {
402 error = -ENOMEM;
403 goto fail;
404 }
405
406 return 0;
407
408fail:
409 memset(buf, 0, sizeof(*buf));
410 return error;
411}
412
413static void ath_mci_buf_free(struct ath_softc *sc, struct ath_mci_buf *buf)
414{
415 if (buf->bf_addr) {
416 dma_free_coherent(sc->dev, buf->bf_len, buf->bf_addr,
417 buf->bf_paddr);
418 memset(buf, 0, sizeof(*buf));
419 }
420}
421
422int ath_mci_setup(struct ath_softc *sc)
423{
424 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
425 struct ath_mci_coex *mci = &sc->mci_coex;
426 int error = 0;
427
428 mci->sched_buf.bf_len = ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE;
429
430 if (ath_mci_buf_alloc(sc, &mci->sched_buf)) {
431 ath_dbg(common, ATH_DBG_FATAL, "MCI buffer alloc failed\n");
432 error = -ENOMEM;
433 goto fail;
434 }
435
436 mci->sched_buf.bf_len = ATH_MCI_SCHED_BUF_SIZE;
437
438 memset(mci->sched_buf.bf_addr, MCI_GPM_RSVD_PATTERN,
439 mci->sched_buf.bf_len);
440
441 mci->gpm_buf.bf_len = ATH_MCI_GPM_BUF_SIZE;
442 mci->gpm_buf.bf_addr = (u8 *)mci->sched_buf.bf_addr +
443 mci->sched_buf.bf_len;
444 mci->gpm_buf.bf_paddr = mci->sched_buf.bf_paddr + mci->sched_buf.bf_len;
445
446 /* initialize the buffer */
447 memset(mci->gpm_buf.bf_addr, MCI_GPM_RSVD_PATTERN, mci->gpm_buf.bf_len);
448
449 ar9003_mci_setup(sc->sc_ah, mci->gpm_buf.bf_paddr,
450 mci->gpm_buf.bf_addr, (mci->gpm_buf.bf_len >> 4),
451 mci->sched_buf.bf_paddr);
452fail:
453 return error;
454}
455
456void ath_mci_cleanup(struct ath_softc *sc)
457{
458 struct ath_hw *ah = sc->sc_ah;
459 struct ath_mci_coex *mci = &sc->mci_coex;
460
461 /*
462 * both schedule and gpm buffers will be released
463 */
464 ath_mci_buf_free(sc, &mci->sched_buf);
465 ar9003_mci_cleanup(ah);
466}
19686ddf
MSS
467
468void ath_mci_intr(struct ath_softc *sc)
469{
470 struct ath_mci_coex *mci = &sc->mci_coex;
471 struct ath_hw *ah = sc->sc_ah;
472 struct ath_common *common = ath9k_hw_common(ah);
473 u32 mci_int, mci_int_rxmsg;
474 u32 offset, subtype, opcode;
475 u32 *pgpm;
476 u32 more_data = MCI_GPM_MORE;
477 bool skip_gpm = false;
478
479 ar9003_mci_get_interrupt(sc->sc_ah, &mci_int, &mci_int_rxmsg);
480
481 if (ar9003_mci_state(ah, MCI_STATE_ENABLE, NULL) == 0) {
482
483 ar9003_mci_state(sc->sc_ah, MCI_STATE_INIT_GPM_OFFSET, NULL);
484 ath_dbg(common, ATH_DBG_MCI,
485 "MCI interrupt but MCI disabled\n");
486
487 ath_dbg(common, ATH_DBG_MCI,
488 "MCI interrupt: intr = 0x%x, intr_rxmsg = 0x%x\n",
489 mci_int, mci_int_rxmsg);
490 return;
491 }
492
493 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE) {
494 u32 payload[4] = { 0xffffffff, 0xffffffff,
495 0xffffffff, 0xffffff00};
496
497 /*
498 * The following REMOTE_RESET and SYS_WAKING used to sent
499 * only when BT wake up. Now they are always sent, as a
500 * recovery method to reset BT MCI's RX alignment.
501 */
502 ath_dbg(common, ATH_DBG_MCI, "MCI interrupt send REMOTE_RESET\n");
503
504 ar9003_mci_send_message(ah, MCI_REMOTE_RESET, 0,
505 payload, 16, true, false);
506 ath_dbg(common, ATH_DBG_MCI, "MCI interrupt send SYS_WAKING\n");
507 ar9003_mci_send_message(ah, MCI_SYS_WAKING, 0,
508 NULL, 0, true, false);
509
510 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE;
511 ar9003_mci_state(ah, MCI_STATE_RESET_REQ_WAKE, NULL);
512
513 /*
514 * always do this for recovery and 2G/5G toggling and LNA_TRANS
515 */
516 ath_dbg(common, ATH_DBG_MCI, "MCI Set BT state to AWAKE.\n");
517 ar9003_mci_state(ah, MCI_STATE_SET_BT_AWAKE, NULL);
518 }
519
520 /* Processing SYS_WAKING/SYS_SLEEPING */
521 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING) {
522 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING;
523
524 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_SLEEP) {
525
526 if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL)
527 == MCI_BT_SLEEP)
528 ath_dbg(common, ATH_DBG_MCI,
529 "MCI BT stays in sleep mode\n");
530 else {
531 ath_dbg(common, ATH_DBG_MCI,
532 "MCI Set BT state to AWAKE.\n");
533 ar9003_mci_state(ah,
534 MCI_STATE_SET_BT_AWAKE, NULL);
535 }
536 } else
537 ath_dbg(common, ATH_DBG_MCI,
538 "MCI BT stays in AWAKE mode.\n");
539 }
540
541 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING) {
542
543 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING;
544
545 if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {
546
547 if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL)
548 == MCI_BT_AWAKE)
549 ath_dbg(common, ATH_DBG_MCI,
550 "MCI BT stays in AWAKE mode.\n");
551 else {
552 ath_dbg(common, ATH_DBG_MCI,
553 "MCI SetBT state to SLEEP\n");
554 ar9003_mci_state(ah, MCI_STATE_SET_BT_SLEEP,
555 NULL);
556 }
557 } else
558 ath_dbg(common, ATH_DBG_MCI,
559 "MCI BT stays in SLEEP mode\n");
560 }
561
562 if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) ||
563 (mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT)) {
564
565 ath_dbg(common, ATH_DBG_MCI, "MCI RX broken, skip GPM msgs\n");
566 ar9003_mci_state(ah, MCI_STATE_RECOVER_RX, NULL);
567 skip_gpm = true;
568 }
569
570 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO) {
571
572 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO;
573 offset = ar9003_mci_state(ah, MCI_STATE_LAST_SCHD_MSG_OFFSET,
574 NULL);
575 }
576
577 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_GPM) {
578
579 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_GPM;
580
581 while (more_data == MCI_GPM_MORE) {
582
583 pgpm = mci->gpm_buf.bf_addr;
584 offset = ar9003_mci_state(ah,
585 MCI_STATE_NEXT_GPM_OFFSET, &more_data);
586
587 if (offset == MCI_GPM_INVALID)
588 break;
589
590 pgpm += (offset >> 2);
591
592 /*
593 * The first dword is timer.
594 * The real data starts from 2nd dword.
595 */
596
597 subtype = MCI_GPM_TYPE(pgpm);
598 opcode = MCI_GPM_OPCODE(pgpm);
599
600 if (!skip_gpm) {
601
602 if (MCI_GPM_IS_CAL_TYPE(subtype))
603 ath_mci_cal_msg(sc, subtype,
604 (u8 *) pgpm);
605 else {
606 switch (subtype) {
607 case MCI_GPM_COEX_AGENT:
608 ath_mci_msg(sc, opcode,
609 (u8 *) pgpm);
610 break;
611 default:
612 break;
613 }
614 }
615 }
616 MCI_GPM_RECYCLE(pgpm);
617 }
618 }
619
620 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_HW_MSG_MASK) {
621
622 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL)
623 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL;
624
625 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_INFO) {
626 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_INFO;
627 ath_dbg(common, ATH_DBG_MCI, "MCI LNA_INFO\n");
628 }
629
630 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_INFO) {
631
632 int value_dbm = ar9003_mci_state(ah,
633 MCI_STATE_CONT_RSSI_POWER, NULL);
634
635 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_INFO;
636
637 if (ar9003_mci_state(ah, MCI_STATE_CONT_TXRX, NULL))
638 ath_dbg(common, ATH_DBG_MCI,
639 "MCI CONT_INFO: "
640 "(tx) pri = %d, pwr = %d dBm\n",
641 ar9003_mci_state(ah,
642 MCI_STATE_CONT_PRIORITY, NULL),
643 value_dbm);
644 else
645 ath_dbg(common, ATH_DBG_MCI,
646 "MCI CONT_INFO:"
647 "(rx) pri = %d,pwr = %d dBm\n",
648 ar9003_mci_state(ah,
649 MCI_STATE_CONT_PRIORITY, NULL),
650 value_dbm);
651 }
652
653 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_NACK) {
654 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_NACK;
655 ath_dbg(common, ATH_DBG_MCI, "MCI CONT_NACK\n");
656 }
657
658 if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_RST) {
659 mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_RST;
660 ath_dbg(common, ATH_DBG_MCI, "MCI CONT_RST\n");
661 }
662 }
663
664 if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) ||
665 (mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT))
666 mci_int &= ~(AR_MCI_INTERRUPT_RX_INVALID_HDR |
667 AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT);
668
669 if (mci_int_rxmsg & 0xfffffffe)
670 ath_dbg(common, ATH_DBG_MCI,
671 "MCI not processed mci_int_rxmsg = 0x%x\n",
672 mci_int_rxmsg);
673}
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