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ath9k: Enable antenna diversity for WB335
[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / pci.c
CommitLineData
6baff7f9 1/*
5b68138e 2 * Copyright (c) 2008-2011 Atheros Communications Inc.
6baff7f9
GJ		 3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
516304b0
JP		 17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
6baff7f9
GJ		 19#include <linux/nl80211.h>
20#include <linux/pci.h>
d4930086 21#include <linux/pci-aspm.h>
a05b5d45 22#include <linux/ath9k_platform.h>
9d9779e7 23#include <linux/module.h>
394cf0a1 24#include "ath9k.h"
6baff7f9 25
a3aa1884 26static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
6baff7f9
GJ		 27 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
28 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
29 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
30 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
31 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
a5354cca 32
d1ae25a0
SM		 33 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
34 0x002A,
35 PCI_VENDOR_ID_AZWAVE,
36 0x1C71),
37 .driver_data = ATH9K_PCI_D3_L1_WAR },
38 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
39 0x002A,
40 PCI_VENDOR_ID_FOXCONN,
41 0xE01F),
42 .driver_data = ATH9K_PCI_D3_L1_WAR },
43 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
44 0x002A,
45 0x11AD, /* LITEON */
46 0x6632),
47 .driver_data = ATH9K_PCI_D3_L1_WAR },
48 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
49 0x002A,
50 0x11AD, /* LITEON */
51 0x6642),
52 .driver_data = ATH9K_PCI_D3_L1_WAR },
53 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
54 0x002A,
55 PCI_VENDOR_ID_QMI,
56 0x0306),
57 .driver_data = ATH9K_PCI_D3_L1_WAR },
58 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
59 0x002A,
60 0x185F, /* WNC */
61 0x309D),
62 .driver_data = ATH9K_PCI_D3_L1_WAR },
63 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
64 0x002A,
65 0x10CF, /* Fujitsu */
66 0x147C),
67 .driver_data = ATH9K_PCI_D3_L1_WAR },
68 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
69 0x002A,
70 0x10CF, /* Fujitsu */
71 0x147D),
72 .driver_data = ATH9K_PCI_D3_L1_WAR },
73 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
74 0x002A,
75 0x10CF, /* Fujitsu */
76 0x1536),
77 .driver_data = ATH9K_PCI_D3_L1_WAR },
78
a5354cca
SM		 79 /* AR9285 card for Asus */
80 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
81 0x002B,
82 PCI_VENDOR_ID_AZWAVE,
83 0x2C37),
84 .driver_data = ATH9K_PCI_BT_ANT_DIV },
85
6baff7f9 86 { PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */
5ffaf8a3 87 { PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */
ac88b6ec
VN		 88 { PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI */
89 { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */
0efabd51 90 { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */
9b60b64b
SM		 91
92 /* PCI-E CUS198 */
93 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
94 0x0032,
95 PCI_VENDOR_ID_AZWAVE,
96 0x2086),
a5354cca 97 .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
9b60b64b
SM		 98 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
99 0x0032,
100 PCI_VENDOR_ID_AZWAVE,
101 0x1237),
a5354cca 102 .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
9b60b64b
SM		 103 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
104 0x0032,
105 PCI_VENDOR_ID_AZWAVE,
106 0x2126),
a5354cca 107 .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
f4d90704
SM		 108 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
109 0x0032,
110 PCI_VENDOR_ID_AZWAVE,
111 0x126A),
112 .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
e861ef52
SM		 113
114 /* PCI-E CUS230 */
9b60b64b
SM		 115 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
116 0x0032,
117 PCI_VENDOR_ID_AZWAVE,
118 0x2152),
a5354cca 119 .driver_data = ATH9K_PCI_CUS230 | ATH9K_PCI_BT_ANT_DIV },
9b60b64b
SM		 120 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
121 0x0032,
122 PCI_VENDOR_ID_FOXCONN,
123 0xE075),
a5354cca 124 .driver_data = ATH9K_PCI_CUS230 | ATH9K_PCI_BT_ANT_DIV },
9b60b64b 125
2952f6ef
SM		 126 /* WB225 */
127 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
128 0x0032,
129 PCI_VENDOR_ID_ATHEROS,
130 0x3119),
131 .driver_data = ATH9K_PCI_BT_ANT_DIV },
132 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
133 0x0032,
134 PCI_VENDOR_ID_ATHEROS,
135 0x3122),
136 .driver_data = ATH9K_PCI_BT_ANT_DIV },
137 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
138 0x0032,
139 0x185F, /* WNC */
140 0x3119),
141 .driver_data = ATH9K_PCI_BT_ANT_DIV },
142 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
143 0x0032,
144 0x185F, /* WNC */
145 0x3027),
146 .driver_data = ATH9K_PCI_BT_ANT_DIV },
147 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
148 0x0032,
149 PCI_VENDOR_ID_SAMSUNG,
150 0x4105),
151 .driver_data = ATH9K_PCI_BT_ANT_DIV },
152 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
153 0x0032,
154 PCI_VENDOR_ID_SAMSUNG,
155 0x4106),
156 .driver_data = ATH9K_PCI_BT_ANT_DIV },
157 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
158 0x0032,
159 PCI_VENDOR_ID_SAMSUNG,
160 0x410D),
161 .driver_data = ATH9K_PCI_BT_ANT_DIV },
162 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
163 0x0032,
164 PCI_VENDOR_ID_SAMSUNG,
165 0x410E),
166 .driver_data = ATH9K_PCI_BT_ANT_DIV },
167 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
168 0x0032,
169 PCI_VENDOR_ID_SAMSUNG,
170 0x410F),
171 .driver_data = ATH9K_PCI_BT_ANT_DIV },
172 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
173 0x0032,
174 PCI_VENDOR_ID_SAMSUNG,
175 0xC706),
176 .driver_data = ATH9K_PCI_BT_ANT_DIV },
177 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
178 0x0032,
179 PCI_VENDOR_ID_SAMSUNG,
180 0xC680),
181 .driver_data = ATH9K_PCI_BT_ANT_DIV },
182 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
183 0x0032,
184 PCI_VENDOR_ID_SAMSUNG,
185 0xC708),
186 .driver_data = ATH9K_PCI_BT_ANT_DIV },
187 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
188 0x0032,
189 PCI_VENDOR_ID_LENOVO,
190 0x3218),
191 .driver_data = ATH9K_PCI_BT_ANT_DIV },
192 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
193 0x0032,
194 PCI_VENDOR_ID_LENOVO,
195 0x3219),
196 .driver_data = ATH9K_PCI_BT_ANT_DIV },
197
1435894d 198 { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */
a508a6ea 199 { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */
12eea640
SM		 200
201 /* PCI-E CUS217 */
202 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
203 0x0034,
204 PCI_VENDOR_ID_AZWAVE,
205 0x2116),
206 .driver_data = ATH9K_PCI_CUS217 },
207 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
208 0x0034,
209 0x11AD, /* LITEON */
210 0x6661),
211 .driver_data = ATH9K_PCI_CUS217 },
212
fca3c21d
SM		 213 /* AR9462 with WoW support */
214 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
215 0x0034,
216 PCI_VENDOR_ID_ATHEROS,
217 0x3117),
218 .driver_data = ATH9K_PCI_WOW },
219 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
220 0x0034,
221 PCI_VENDOR_ID_LENOVO,
222 0x3214),
223 .driver_data = ATH9K_PCI_WOW },
224 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
225 0x0034,
226 PCI_VENDOR_ID_ATTANSIC,
227 0x0091),
228 .driver_data = ATH9K_PCI_WOW },
229 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
230 0x0034,
231 PCI_VENDOR_ID_AZWAVE,
232 0x2110),
233 .driver_data = ATH9K_PCI_WOW },
234 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
235 0x0034,
236 PCI_VENDOR_ID_ASUSTEK,
237 0x850E),
238 .driver_data = ATH9K_PCI_WOW },
239 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
240 0x0034,
241 0x11AD, /* LITEON */
242 0x6631),
243 .driver_data = ATH9K_PCI_WOW },
244 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
245 0x0034,
246 0x11AD, /* LITEON */
247 0x6641),
248 .driver_data = ATH9K_PCI_WOW },
249 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
250 0x0034,
251 PCI_VENDOR_ID_HP,
252 0x1864),
253 .driver_data = ATH9K_PCI_WOW },
254 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
255 0x0034,
256 0x14CD, /* USI */
257 0x0063),
258 .driver_data = ATH9K_PCI_WOW },
259 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
260 0x0034,
261 0x14CD, /* USI */
262 0x0064),
263 .driver_data = ATH9K_PCI_WOW },
264 { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
265 0x0034,
266 0x10CF, /* Fujitsu */
267 0x1783),
268 .driver_data = ATH9K_PCI_WOW },
269
423e38e8 270 { PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E AR9462 */
d4e5979c 271 { PCI_VDEVICE(ATHEROS, 0x0037) }, /* PCI-E AR1111/AR9485 */
1823a421
SM		 272
273 /* PCI-E AR9565 (WB335) */
274 { PCI_VDEVICE(ATHEROS, 0x0036),
275 .driver_data = ATH9K_PCI_BT_ANT_DIV },
276
6baff7f9
GJ		 277 { 0 }
278};
279
84c87dc8 280
6baff7f9 281/* return bus cachesize in 4B word units */
5bb12791 282static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
6baff7f9 283{
bc974f4a 284 struct ath_softc *sc = (struct ath_softc *) common->priv;
6baff7f9
GJ		 285 u8 u8tmp;
286
f020979d 287 pci_read_config_byte(to_pci_dev(sc->dev), PCI_CACHE_LINE_SIZE, &u8tmp);
6baff7f9
GJ		 288 *csz = (int)u8tmp;
289
290 /*
25985edc 291 * This check was put in to avoid "unpleasant" consequences if
6baff7f9
GJ		 292 * the bootrom has not fully initialized all PCI devices.
293 * Sometimes the cache line size register is not set
294 */
295
296 if (*csz == 0)
297 *csz = DEFAULT_CACHELINE >> 2; /* Use the default size */
298}
299
5bb12791 300static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
9dbeb91a 301{
a05b5d45
FF		 302 struct ath_softc *sc = (struct ath_softc *) common->priv;
303 struct ath9k_platform_data *pdata = sc->dev->platform_data;
304
305 if (pdata) {
306 if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
3800276a
JP		 307 ath_err(common,
308 "%s: eeprom read failed, offset %08x is out of range\n",
309 __func__, off);
a05b5d45
FF		 310 }
311
312 *data = pdata->eeprom_data[off];
313 } else {
314 struct ath_hw *ah = (struct ath_hw *) common->ah;
315
316 common->ops->read(ah, AR5416_EEPROM_OFFSET +
317 (off << AR5416_EEPROM_S));
318
319 if (!ath9k_hw_wait(ah,
320 AR_EEPROM_STATUS_DATA,
321 AR_EEPROM_STATUS_DATA_BUSY |
322 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
323 AH_WAIT_TIMEOUT)) {
324 return false;
325 }
326
327 *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
328 AR_EEPROM_STATUS_DATA_VAL);
9dbeb91a
GJ		 329 }
330
9dbeb91a
GJ		 331 return true;
332}
333
69ce674b 334/* Need to be called after we discover btcoex capabilities */
d4930086
SG		 335static void ath_pci_aspm_init(struct ath_common *common)
336{
337 struct ath_softc *sc = (struct ath_softc *) common->priv;
338 struct ath_hw *ah = sc->sc_ah;
339 struct pci_dev *pdev = to_pci_dev(sc->dev);
340 struct pci_dev *parent;
08bd1080 341 u16 aspm;
d4930086 342
d09f5f4c
SM		 343 if (!ah->is_pciexpress)
344 return;
345
d4930086 346 parent = pdev->bus->self;
22c55e6e
JL		 347 if (!parent)
348 return;
69ce674b 349
046b6802
SM		 350 if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
351 (AR_SREV_9285(ah))) {
a875621e 352 /* Bluetooth coexistence requires disabling ASPM. */
08bd1080 353 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
a875621e 354 PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
69ce674b
SG		 355
356 /*
357 * Both upstream and downstream PCIe components should
358 * have the same ASPM settings.
359 */
08bd1080 360 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
a875621e 361 PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
69ce674b 362
d09f5f4c 363 ath_info(common, "Disabling ASPM since BTCOEX is enabled\n");
69ce674b
SG		 364 return;
365 }
366
b380a43b
SM		 367 /*
368 * 0x70c - Ack Frequency Register.
369 *
370 * Bits 27:29 - DEFAULT_L1_ENTRANCE_LATENCY.
371 *
372 * 000 : 1 us
373 * 001 : 2 us
374 * 010 : 4 us
375 * 011 : 8 us
376 * 100 : 16 us
377 * 101 : 32 us
378 * 110/111 : 64 us
379 */
380 if (AR_SREV_9462(ah))
381 pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix);
382
08bd1080 383 pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
a875621e 384 if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
d4930086
SG		 385 ah->aspm_enabled = true;
386 /* Initialize PCIe PM and SERDES registers. */
84c87dc8 387 ath9k_hw_configpcipowersave(ah, false);
d09f5f4c 388 ath_info(common, "ASPM enabled: 0x%x\n", aspm);
d4930086
SG		 389 }
390}
391
83bd11a0 392static const struct ath_bus_ops ath_pci_bus_ops = {
497ad9ad 393 .ath_bus_type = ATH_PCI,
6baff7f9 394 .read_cachesize = ath_pci_read_cachesize,
9dbeb91a 395 .eeprom_read = ath_pci_eeprom_read,
d4930086 396 .aspm_init = ath_pci_aspm_init,
6baff7f9
GJ		 397};
398
399static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
400{
6baff7f9
GJ		 401 struct ath_softc *sc;
402 struct ieee80211_hw *hw;
403 u8 csz;
f0214843 404 u32 val;
6baff7f9 405 int ret = 0;
f934c4d9 406 char hw_name[64];
6baff7f9 407
b81950b1 408 if (pcim_enable_device(pdev))
6baff7f9
GJ		 409 return -EIO;
410
e930438c 411 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6baff7f9 412 if (ret) {
516304b0 413 pr_err("32-bit DMA not available\n");
b81950b1 414 return ret;
6baff7f9
GJ		 415 }
416
e930438c 417 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6baff7f9 418 if (ret) {
516304b0 419 pr_err("32-bit DMA consistent DMA enable failed\n");
b81950b1 420 return ret;
6baff7f9
GJ		 421 }
422
423 /*
424 * Cache line size is used to size and align various
425 * structures used to communicate with the hardware.
426 */
427 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
428 if (csz == 0) {
429 /*
430 * Linux 2.4.18 (at least) writes the cache line size
431 * register as a 16-bit wide register which is wrong.
432 * We must have this setup properly for rx buffer
433 * DMA to work so force a reasonable value here if it
434 * comes up zero.
435 */
436 csz = L1_CACHE_BYTES / sizeof(u32);
437 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
438 }
439 /*
440 * The default setting of latency timer yields poor results,
441 * set it to the value used by other systems. It may be worth
442 * tweaking this setting more.
443 */
444 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
445
446 pci_set_master(pdev);
447
f0214843
JM		 448 /*
449 * Disable the RETRY_TIMEOUT register (0x41) to keep
450 * PCI Tx retries from interfering with C3 CPU state.
451 */
452 pci_read_config_dword(pdev, 0x40, &val);
453 if ((val & 0x0000ff00) != 0)
454 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
455
b81950b1 456 ret = pcim_iomap_regions(pdev, BIT(0), "ath9k");
6baff7f9
GJ		 457 if (ret) {
458 dev_err(&pdev->dev, "PCI memory region reserve error\n");
b81950b1 459 return -ENODEV;
6baff7f9
GJ		 460 }
461
9ac58615 462 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
db6be53c 463 if (!hw) {
285f2dda 464 dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
b81950b1 465 return -ENOMEM;
6baff7f9
GJ		 466 }
467
468 SET_IEEE80211_DEV(hw, &pdev->dev);
469 pci_set_drvdata(pdev, hw);
470
9ac58615 471 sc = hw->priv;
6baff7f9
GJ		 472 sc->hw = hw;
473 sc->dev = &pdev->dev;
b81950b1 474 sc->mem = pcim_iomap_table(pdev)[0];
9b60b64b 475 sc->driver_data = id->driver_data;
6baff7f9 476
5e4ea1f0 477 /* Will be cleared in ath9k_start() */
781b14a3 478 set_bit(SC_OP_INVALID, &sc->sc_flags);
6baff7f9 479
fc548af8 480 ret = request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath9k", sc);
580171f7
LR		 481 if (ret) {
482 dev_err(&pdev->dev, "request_irq failed\n");
285f2dda 483 goto err_irq;
6baff7f9
GJ		 484 }
485
486 sc->irq = pdev->irq;
487
eb93e891 488 ret = ath9k_init_device(id->device, sc, &ath_pci_bus_ops);
285f2dda
S		 489 if (ret) {
490 dev_err(&pdev->dev, "Failed to initialize device\n");
491 goto err_init;
492 }
493
494 ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
c96c31e4 495 wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n",
b81950b1 496 hw_name, (unsigned long)sc->mem, pdev->irq);
6baff7f9
GJ		 497
498 return 0;
285f2dda
S		 499
500err_init:
501 free_irq(sc->irq, sc);
502err_irq:
6baff7f9 503 ieee80211_free_hw(hw);
6baff7f9
GJ		 504 return ret;
505}
506
507static void ath_pci_remove(struct pci_dev *pdev)
508{
509 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
9ac58615 510 struct ath_softc *sc = hw->priv;
6baff7f9 511
d584747b
RM		 512 if (!is_ath9k_unloaded)
513 sc->sc_ah->ah_flags |= AH_UNPLUGGED;
285f2dda
S		 514 ath9k_deinit_device(sc);
515 free_irq(sc->irq, sc);
516 ieee80211_free_hw(sc->hw);
6baff7f9
GJ		 517}
518
88427588 519#ifdef CONFIG_PM_SLEEP
6baff7f9 520
f0e94b47 521static int ath_pci_suspend(struct device *device)
6baff7f9 522{
f0e94b47 523 struct pci_dev *pdev = to_pci_dev(device);
6baff7f9 524 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
9ac58615 525 struct ath_softc *sc = hw->priv;
6baff7f9 526
4a17a50d
MSS		 527 if (sc->wow_enabled)
528 return 0;
529
c31eb8e9
RM		 530 /* The device has to be moved to FULLSLEEP forcibly.
531 * Otherwise the chip never moved to full sleep,
532 * when no interface is up.
533 */
e19f15ac 534 ath9k_stop_btcoex(sc);
c0c11741 535 ath9k_hw_disable(sc->sc_ah);
c31eb8e9
RM		 536 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
537
6baff7f9
GJ		 538 return 0;
539}
540
f0e94b47 541static int ath_pci_resume(struct device *device)
6baff7f9 542{
f0e94b47 543 struct pci_dev *pdev = to_pci_dev(device);
93170516
FF		 544 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
545 struct ath_softc *sc = hw->priv;
ceb26a60
FF		 546 struct ath_hw *ah = sc->sc_ah;
547 struct ath_common *common = ath9k_hw_common(ah);
f0214843 548 u32 val;
523c36fc 549
f0214843
JM		 550 /*
551 * Suspend/Resume resets the PCI configuration space, so we have to
552 * re-disable the RETRY_TIMEOUT register (0x41) to keep
553 * PCI Tx retries from interfering with C3 CPU state
554 */
555 pci_read_config_dword(pdev, 0x40, &val);
556 if ((val & 0x0000ff00) != 0)
557 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
6baff7f9 558
93170516 559 ath_pci_aspm_init(common);
ceb26a60 560 ah->reset_power_on = false;
93170516 561
6baff7f9
GJ		 562 return 0;
563}
564
88427588 565static SIMPLE_DEV_PM_OPS(ath9k_pm_ops, ath_pci_suspend, ath_pci_resume);
f0e94b47
RW		 566
567#define ATH9K_PM_OPS (&ath9k_pm_ops)
568
88427588 569#else /* !CONFIG_PM_SLEEP */
f0e94b47
RW		 570
571#define ATH9K_PM_OPS NULL
572
88427588 573#endif /* !CONFIG_PM_SLEEP */
f0e94b47 574
6baff7f9
GJ		 575
576MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
577
578static struct pci_driver ath_pci_driver = {
579 .name = "ath9k",
580 .id_table = ath_pci_id_table,
581 .probe = ath_pci_probe,
582 .remove = ath_pci_remove,
f0e94b47 583 .driver.pm = ATH9K_PM_OPS,
6baff7f9
GJ		 584};
585
db0f41f5 586int ath_pci_init(void)
6baff7f9
GJ		 587{
588 return pci_register_driver(&ath_pci_driver);
589}
590
591void ath_pci_exit(void)
592{
593 pci_unregister_driver(&ath_pci_driver);
594}
Linux kernel - Deliverables
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