Commit | Line | Data |
---|---|---|
f078f209 | 1 | /* |
5b68138e | 2 | * Copyright (c) 2008-2011 Atheros Communications Inc. |
f078f209 LR |
3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
b7f080cf | 17 | #include <linux/dma-mapping.h> |
394cf0a1 | 18 | #include "ath9k.h" |
b622a720 | 19 | #include "ar9003_mac.h" |
f078f209 LR |
20 | |
21 | #define BITS_PER_BYTE 8 | |
22 | #define OFDM_PLCP_BITS 22 | |
f078f209 LR |
23 | #define HT_RC_2_STREAMS(_rc) ((((_rc) & 0x78) >> 3) + 1) |
24 | #define L_STF 8 | |
25 | #define L_LTF 8 | |
26 | #define L_SIG 4 | |
27 | #define HT_SIG 8 | |
28 | #define HT_STF 4 | |
29 | #define HT_LTF(_ns) (4 * (_ns)) | |
30 | #define SYMBOL_TIME(_ns) ((_ns) << 2) /* ns * 4 us */ | |
31 | #define SYMBOL_TIME_HALFGI(_ns) (((_ns) * 18 + 4) / 5) /* ns * 3.6 us */ | |
aa5955c3 FF |
32 | #define TIME_SYMBOLS(t) ((t) >> 2) |
33 | #define TIME_SYMBOLS_HALFGI(t) (((t) * 5 - 4) / 18) | |
f078f209 LR |
34 | #define NUM_SYMBOLS_PER_USEC(_usec) (_usec >> 2) |
35 | #define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18) | |
36 | ||
f078f209 | 37 | |
c6663876 | 38 | static u16 bits_per_symbol[][2] = { |
f078f209 LR |
39 | /* 20MHz 40MHz */ |
40 | { 26, 54 }, /* 0: BPSK */ | |
41 | { 52, 108 }, /* 1: QPSK 1/2 */ | |
42 | { 78, 162 }, /* 2: QPSK 3/4 */ | |
43 | { 104, 216 }, /* 3: 16-QAM 1/2 */ | |
44 | { 156, 324 }, /* 4: 16-QAM 3/4 */ | |
45 | { 208, 432 }, /* 5: 64-QAM 2/3 */ | |
46 | { 234, 486 }, /* 6: 64-QAM 3/4 */ | |
47 | { 260, 540 }, /* 7: 64-QAM 5/6 */ | |
f078f209 LR |
48 | }; |
49 | ||
82b873af | 50 | static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq, |
44f1d26c FF |
51 | struct ath_atx_tid *tid, struct sk_buff *skb); |
52 | static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb, | |
53 | int tx_flags, struct ath_txq *txq); | |
e8324357 | 54 | static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf, |
db1a052b | 55 | struct ath_txq *txq, struct list_head *bf_q, |
156369fa | 56 | struct ath_tx_status *ts, int txok); |
102e0572 | 57 | static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq, |
fce041be | 58 | struct list_head *head, bool internal); |
0cdd5c60 FF |
59 | static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf, |
60 | struct ath_tx_status *ts, int nframes, int nbad, | |
3afd21e7 | 61 | int txok); |
90fa539c FF |
62 | static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid, |
63 | int seqno); | |
44f1d26c FF |
64 | static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc, |
65 | struct ath_txq *txq, | |
66 | struct ath_atx_tid *tid, | |
249ee722 | 67 | struct sk_buff *skb); |
c4288390 | 68 | |
545750d3 | 69 | enum { |
0e668cde FF |
70 | MCS_HT20, |
71 | MCS_HT20_SGI, | |
545750d3 FF |
72 | MCS_HT40, |
73 | MCS_HT40_SGI, | |
74 | }; | |
75 | ||
e8324357 S |
76 | /*********************/ |
77 | /* Aggregation logic */ | |
78 | /*********************/ | |
f078f209 | 79 | |
ef1b6cd9 | 80 | void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq) |
1512a486 | 81 | __acquires(&txq->axq_lock) |
23de5dc9 FF |
82 | { |
83 | spin_lock_bh(&txq->axq_lock); | |
84 | } | |
85 | ||
ef1b6cd9 | 86 | void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq) |
1512a486 | 87 | __releases(&txq->axq_lock) |
23de5dc9 FF |
88 | { |
89 | spin_unlock_bh(&txq->axq_lock); | |
90 | } | |
91 | ||
ef1b6cd9 | 92 | void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq) |
1512a486 | 93 | __releases(&txq->axq_lock) |
23de5dc9 FF |
94 | { |
95 | struct sk_buff_head q; | |
96 | struct sk_buff *skb; | |
97 | ||
98 | __skb_queue_head_init(&q); | |
99 | skb_queue_splice_init(&txq->complete_q, &q); | |
100 | spin_unlock_bh(&txq->axq_lock); | |
101 | ||
102 | while ((skb = __skb_dequeue(&q))) | |
103 | ieee80211_tx_status(sc->hw, skb); | |
104 | } | |
105 | ||
0453531e FF |
106 | static void ath_tx_queue_tid(struct ath_softc *sc, struct ath_txq *txq, |
107 | struct ath_atx_tid *tid) | |
ff37e337 | 108 | { |
e8324357 | 109 | struct ath_atx_ac *ac = tid->ac; |
0453531e FF |
110 | struct list_head *list; |
111 | struct ath_vif *avp = (struct ath_vif *) tid->an->vif->drv_priv; | |
112 | struct ath_chanctx *ctx = avp->chanctx; | |
113 | ||
114 | if (!ctx) | |
115 | return; | |
ff37e337 | 116 | |
e8324357 S |
117 | if (tid->sched) |
118 | return; | |
ff37e337 | 119 | |
e8324357 S |
120 | tid->sched = true; |
121 | list_add_tail(&tid->list, &ac->tid_q); | |
528f0c6b | 122 | |
e8324357 S |
123 | if (ac->sched) |
124 | return; | |
f078f209 | 125 | |
e8324357 | 126 | ac->sched = true; |
0453531e FF |
127 | |
128 | list = &ctx->acq[TID_TO_WME_AC(tid->tidno)]; | |
129 | list_add_tail(&ac->list, list); | |
e8324357 | 130 | } |
f078f209 | 131 | |
2d42efc4 | 132 | static struct ath_frame_info *get_frame_info(struct sk_buff *skb) |
76e45221 FF |
133 | { |
134 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | |
2d42efc4 FF |
135 | BUILD_BUG_ON(sizeof(struct ath_frame_info) > |
136 | sizeof(tx_info->rate_driver_data)); | |
137 | return (struct ath_frame_info *) &tx_info->rate_driver_data[0]; | |
76e45221 FF |
138 | } |
139 | ||
156369fa FF |
140 | static void ath_send_bar(struct ath_atx_tid *tid, u16 seqno) |
141 | { | |
f89d1bc4 FF |
142 | if (!tid->an->sta) |
143 | return; | |
144 | ||
156369fa FF |
145 | ieee80211_send_bar(tid->an->vif, tid->an->sta->addr, tid->tidno, |
146 | seqno << IEEE80211_SEQ_SEQ_SHIFT); | |
147 | } | |
148 | ||
79acac07 FF |
149 | static void ath_set_rates(struct ieee80211_vif *vif, struct ieee80211_sta *sta, |
150 | struct ath_buf *bf) | |
151 | { | |
152 | ieee80211_get_tx_rates(vif, sta, bf->bf_mpdu, bf->rates, | |
153 | ARRAY_SIZE(bf->rates)); | |
154 | } | |
155 | ||
a4943ccb FF |
156 | static void ath_txq_skb_done(struct ath_softc *sc, struct ath_txq *txq, |
157 | struct sk_buff *skb) | |
158 | { | |
3ad9c386 | 159 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
d954cd77 | 160 | struct ath_frame_info *fi = get_frame_info(skb); |
d954cd77 | 161 | int q = fi->txq; |
a4943ccb | 162 | |
d954cd77 | 163 | if (q < 0) |
a4943ccb FF |
164 | return; |
165 | ||
d954cd77 | 166 | txq = sc->tx.txq_map[q]; |
a4943ccb FF |
167 | if (WARN_ON(--txq->pending_frames < 0)) |
168 | txq->pending_frames = 0; | |
169 | ||
170 | if (txq->stopped && | |
171 | txq->pending_frames < sc->tx.txq_max_pending[q]) { | |
d7017461 | 172 | ieee80211_wake_queue(sc->hw, info->hw_queue); |
a4943ccb FF |
173 | txq->stopped = false; |
174 | } | |
175 | } | |
176 | ||
1803d02d FF |
177 | static struct ath_atx_tid * |
178 | ath_get_skb_tid(struct ath_softc *sc, struct ath_node *an, struct sk_buff *skb) | |
179 | { | |
39731b78 | 180 | u8 tidno = skb->priority & IEEE80211_QOS_CTL_TID_MASK; |
1803d02d FF |
181 | return ATH_AN_2_TID(an, tidno); |
182 | } | |
183 | ||
a7586ee4 FF |
184 | static bool ath_tid_has_buffered(struct ath_atx_tid *tid) |
185 | { | |
bb195ff6 | 186 | return !skb_queue_empty(&tid->buf_q) || !skb_queue_empty(&tid->retry_q); |
a7586ee4 FF |
187 | } |
188 | ||
189 | static struct sk_buff *ath_tid_dequeue(struct ath_atx_tid *tid) | |
190 | { | |
bb195ff6 FF |
191 | struct sk_buff *skb; |
192 | ||
193 | skb = __skb_dequeue(&tid->retry_q); | |
194 | if (!skb) | |
195 | skb = __skb_dequeue(&tid->buf_q); | |
196 | ||
197 | return skb; | |
a7586ee4 FF |
198 | } |
199 | ||
2800e82b FF |
200 | /* |
201 | * ath_tx_tid_change_state: | |
202 | * - clears a-mpdu flag of previous session | |
203 | * - force sequence number allocation to fix next BlockAck Window | |
204 | */ | |
205 | static void | |
206 | ath_tx_tid_change_state(struct ath_softc *sc, struct ath_atx_tid *tid) | |
207 | { | |
208 | struct ath_txq *txq = tid->ac->txq; | |
209 | struct ieee80211_tx_info *tx_info; | |
210 | struct sk_buff *skb, *tskb; | |
211 | struct ath_buf *bf; | |
212 | struct ath_frame_info *fi; | |
213 | ||
214 | skb_queue_walk_safe(&tid->buf_q, skb, tskb) { | |
215 | fi = get_frame_info(skb); | |
216 | bf = fi->bf; | |
217 | ||
218 | tx_info = IEEE80211_SKB_CB(skb); | |
219 | tx_info->flags &= ~IEEE80211_TX_CTL_AMPDU; | |
220 | ||
221 | if (bf) | |
222 | continue; | |
223 | ||
224 | bf = ath_tx_setup_buffer(sc, txq, tid, skb); | |
225 | if (!bf) { | |
226 | __skb_unlink(skb, &tid->buf_q); | |
227 | ath_txq_skb_done(sc, txq, skb); | |
228 | ieee80211_free_txskb(sc->hw, skb); | |
229 | continue; | |
230 | } | |
231 | } | |
232 | ||
233 | } | |
234 | ||
08c96abd | 235 | static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid) |
528f0c6b | 236 | { |
066dae93 | 237 | struct ath_txq *txq = tid->ac->txq; |
56dc6336 | 238 | struct sk_buff *skb; |
e8324357 S |
239 | struct ath_buf *bf; |
240 | struct list_head bf_head; | |
90fa539c | 241 | struct ath_tx_status ts; |
2d42efc4 | 242 | struct ath_frame_info *fi; |
156369fa | 243 | bool sendbar = false; |
f078f209 | 244 | |
90fa539c | 245 | INIT_LIST_HEAD(&bf_head); |
e6a9854b | 246 | |
90fa539c | 247 | memset(&ts, 0, sizeof(ts)); |
f078f209 | 248 | |
2800e82b | 249 | while ((skb = __skb_dequeue(&tid->retry_q))) { |
56dc6336 FF |
250 | fi = get_frame_info(skb); |
251 | bf = fi->bf; | |
249ee722 | 252 | if (!bf) { |
2800e82b FF |
253 | ath_txq_skb_done(sc, txq, skb); |
254 | ieee80211_free_txskb(sc->hw, skb); | |
255 | continue; | |
249ee722 FF |
256 | } |
257 | ||
8fed1408 | 258 | if (fi->baw_tracked) { |
6a0ddaef | 259 | ath_tx_update_baw(sc, tid, bf->bf_state.seqno); |
156369fa | 260 | sendbar = true; |
90fa539c | 261 | } |
2800e82b FF |
262 | |
263 | list_add_tail(&bf->list, &bf_head); | |
264 | ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0); | |
528f0c6b | 265 | } |
f078f209 | 266 | |
08c96abd | 267 | if (sendbar) { |
23de5dc9 | 268 | ath_txq_unlock(sc, txq); |
156369fa | 269 | ath_send_bar(tid, tid->seq_start); |
23de5dc9 FF |
270 | ath_txq_lock(sc, txq); |
271 | } | |
528f0c6b | 272 | } |
f078f209 | 273 | |
e8324357 S |
274 | static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid, |
275 | int seqno) | |
528f0c6b | 276 | { |
e8324357 | 277 | int index, cindex; |
f078f209 | 278 | |
e8324357 S |
279 | index = ATH_BA_INDEX(tid->seq_start, seqno); |
280 | cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); | |
f078f209 | 281 | |
81ee13ba | 282 | __clear_bit(cindex, tid->tx_buf); |
528f0c6b | 283 | |
81ee13ba | 284 | while (tid->baw_head != tid->baw_tail && !test_bit(tid->baw_head, tid->tx_buf)) { |
e8324357 S |
285 | INCR(tid->seq_start, IEEE80211_SEQ_MAX); |
286 | INCR(tid->baw_head, ATH_TID_MAX_BUFS); | |
f9437543 FF |
287 | if (tid->bar_index >= 0) |
288 | tid->bar_index--; | |
e8324357 | 289 | } |
528f0c6b | 290 | } |
f078f209 | 291 | |
e8324357 | 292 | static void ath_tx_addto_baw(struct ath_softc *sc, struct ath_atx_tid *tid, |
8fed1408 | 293 | struct ath_buf *bf) |
528f0c6b | 294 | { |
8fed1408 FF |
295 | struct ath_frame_info *fi = get_frame_info(bf->bf_mpdu); |
296 | u16 seqno = bf->bf_state.seqno; | |
e8324357 | 297 | int index, cindex; |
528f0c6b | 298 | |
2d3bcba0 | 299 | index = ATH_BA_INDEX(tid->seq_start, seqno); |
e8324357 | 300 | cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); |
81ee13ba | 301 | __set_bit(cindex, tid->tx_buf); |
8fed1408 | 302 | fi->baw_tracked = 1; |
f078f209 | 303 | |
e8324357 S |
304 | if (index >= ((tid->baw_tail - tid->baw_head) & |
305 | (ATH_TID_MAX_BUFS - 1))) { | |
306 | tid->baw_tail = cindex; | |
307 | INCR(tid->baw_tail, ATH_TID_MAX_BUFS); | |
f078f209 | 308 | } |
f078f209 LR |
309 | } |
310 | ||
e8324357 S |
311 | static void ath_tid_drain(struct ath_softc *sc, struct ath_txq *txq, |
312 | struct ath_atx_tid *tid) | |
f078f209 | 313 | |
f078f209 | 314 | { |
56dc6336 | 315 | struct sk_buff *skb; |
e8324357 S |
316 | struct ath_buf *bf; |
317 | struct list_head bf_head; | |
db1a052b | 318 | struct ath_tx_status ts; |
2d42efc4 | 319 | struct ath_frame_info *fi; |
db1a052b FF |
320 | |
321 | memset(&ts, 0, sizeof(ts)); | |
e8324357 | 322 | INIT_LIST_HEAD(&bf_head); |
f078f209 | 323 | |
a7586ee4 | 324 | while ((skb = ath_tid_dequeue(tid))) { |
56dc6336 FF |
325 | fi = get_frame_info(skb); |
326 | bf = fi->bf; | |
f078f209 | 327 | |
44f1d26c | 328 | if (!bf) { |
44f1d26c | 329 | ath_tx_complete(sc, skb, ATH_TX_ERROR, txq); |
44f1d26c FF |
330 | continue; |
331 | } | |
332 | ||
56dc6336 | 333 | list_add_tail(&bf->list, &bf_head); |
156369fa | 334 | ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0); |
e8324357 | 335 | } |
f078f209 LR |
336 | } |
337 | ||
fec247c0 | 338 | static void ath_tx_set_retry(struct ath_softc *sc, struct ath_txq *txq, |
da647626 | 339 | struct sk_buff *skb, int count) |
f078f209 | 340 | { |
8b7f8532 | 341 | struct ath_frame_info *fi = get_frame_info(skb); |
f11cc949 | 342 | struct ath_buf *bf = fi->bf; |
e8324357 | 343 | struct ieee80211_hdr *hdr; |
da647626 | 344 | int prev = fi->retries; |
f078f209 | 345 | |
fec247c0 | 346 | TX_STAT_INC(txq->axq_qnum, a_retries); |
da647626 FF |
347 | fi->retries += count; |
348 | ||
349 | if (prev > 0) | |
2d42efc4 | 350 | return; |
f078f209 | 351 | |
e8324357 S |
352 | hdr = (struct ieee80211_hdr *)skb->data; |
353 | hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_RETRY); | |
f11cc949 FF |
354 | dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, |
355 | sizeof(*hdr), DMA_TO_DEVICE); | |
f078f209 LR |
356 | } |
357 | ||
0a8cea84 | 358 | static struct ath_buf *ath_tx_get_buffer(struct ath_softc *sc) |
d43f3015 | 359 | { |
0a8cea84 | 360 | struct ath_buf *bf = NULL; |
d43f3015 S |
361 | |
362 | spin_lock_bh(&sc->tx.txbuflock); | |
0a8cea84 FF |
363 | |
364 | if (unlikely(list_empty(&sc->tx.txbuf))) { | |
8a46097a VT |
365 | spin_unlock_bh(&sc->tx.txbuflock); |
366 | return NULL; | |
367 | } | |
0a8cea84 FF |
368 | |
369 | bf = list_first_entry(&sc->tx.txbuf, struct ath_buf, list); | |
370 | list_del(&bf->list); | |
371 | ||
d43f3015 S |
372 | spin_unlock_bh(&sc->tx.txbuflock); |
373 | ||
0a8cea84 FF |
374 | return bf; |
375 | } | |
376 | ||
377 | static void ath_tx_return_buffer(struct ath_softc *sc, struct ath_buf *bf) | |
378 | { | |
379 | spin_lock_bh(&sc->tx.txbuflock); | |
380 | list_add_tail(&bf->list, &sc->tx.txbuf); | |
381 | spin_unlock_bh(&sc->tx.txbuflock); | |
382 | } | |
383 | ||
384 | static struct ath_buf* ath_clone_txbuf(struct ath_softc *sc, struct ath_buf *bf) | |
385 | { | |
386 | struct ath_buf *tbf; | |
387 | ||
388 | tbf = ath_tx_get_buffer(sc); | |
389 | if (WARN_ON(!tbf)) | |
390 | return NULL; | |
391 | ||
d43f3015 S |
392 | ATH_TXBUF_RESET(tbf); |
393 | ||
394 | tbf->bf_mpdu = bf->bf_mpdu; | |
395 | tbf->bf_buf_addr = bf->bf_buf_addr; | |
d826c832 | 396 | memcpy(tbf->bf_desc, bf->bf_desc, sc->sc_ah->caps.tx_desc_len); |
d43f3015 | 397 | tbf->bf_state = bf->bf_state; |
86c7d8d4 | 398 | tbf->bf_state.stale = false; |
d43f3015 S |
399 | |
400 | return tbf; | |
401 | } | |
402 | ||
b572d033 FF |
403 | static void ath_tx_count_frames(struct ath_softc *sc, struct ath_buf *bf, |
404 | struct ath_tx_status *ts, int txok, | |
405 | int *nframes, int *nbad) | |
406 | { | |
2d42efc4 | 407 | struct ath_frame_info *fi; |
b572d033 FF |
408 | u16 seq_st = 0; |
409 | u32 ba[WME_BA_BMP_SIZE >> 5]; | |
410 | int ba_index; | |
411 | int isaggr = 0; | |
412 | ||
413 | *nbad = 0; | |
414 | *nframes = 0; | |
415 | ||
b572d033 FF |
416 | isaggr = bf_isaggr(bf); |
417 | if (isaggr) { | |
418 | seq_st = ts->ts_seqnum; | |
419 | memcpy(ba, &ts->ba_low, WME_BA_BMP_SIZE >> 3); | |
420 | } | |
421 | ||
422 | while (bf) { | |
2d42efc4 | 423 | fi = get_frame_info(bf->bf_mpdu); |
6a0ddaef | 424 | ba_index = ATH_BA_INDEX(seq_st, bf->bf_state.seqno); |
b572d033 FF |
425 | |
426 | (*nframes)++; | |
427 | if (!txok || (isaggr && !ATH_BA_ISSET(ba, ba_index))) | |
428 | (*nbad)++; | |
429 | ||
430 | bf = bf->bf_next; | |
431 | } | |
432 | } | |
433 | ||
434 | ||
d43f3015 S |
435 | static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq, |
436 | struct ath_buf *bf, struct list_head *bf_q, | |
1381559b | 437 | struct ath_tx_status *ts, int txok) |
f078f209 | 438 | { |
e8324357 S |
439 | struct ath_node *an = NULL; |
440 | struct sk_buff *skb; | |
1286ec6d | 441 | struct ieee80211_sta *sta; |
0cdd5c60 | 442 | struct ieee80211_hw *hw = sc->hw; |
1286ec6d | 443 | struct ieee80211_hdr *hdr; |
76d5a9e8 | 444 | struct ieee80211_tx_info *tx_info; |
e8324357 | 445 | struct ath_atx_tid *tid = NULL; |
d43f3015 | 446 | struct ath_buf *bf_next, *bf_last = bf->bf_lastbf; |
56dc6336 FF |
447 | struct list_head bf_head; |
448 | struct sk_buff_head bf_pending; | |
156369fa | 449 | u16 seq_st = 0, acked_cnt = 0, txfail_cnt = 0, seq_first; |
f078f209 | 450 | u32 ba[WME_BA_BMP_SIZE >> 5]; |
0934af23 | 451 | int isaggr, txfail, txpending, sendbar = 0, needreset = 0, nbad = 0; |
6fe7cc71 | 452 | bool rc_update = true, isba; |
78c4653a | 453 | struct ieee80211_tx_rate rates[4]; |
2d42efc4 | 454 | struct ath_frame_info *fi; |
ebd02287 | 455 | int nframes; |
daa5c408 | 456 | bool flush = !!(ts->ts_status & ATH9K_TX_FLUSH); |
da647626 | 457 | int i, retries; |
156369fa | 458 | int bar_index = -1; |
f078f209 | 459 | |
a22be22a | 460 | skb = bf->bf_mpdu; |
1286ec6d S |
461 | hdr = (struct ieee80211_hdr *)skb->data; |
462 | ||
76d5a9e8 | 463 | tx_info = IEEE80211_SKB_CB(skb); |
76d5a9e8 | 464 | |
79acac07 | 465 | memcpy(rates, bf->rates, sizeof(rates)); |
78c4653a | 466 | |
da647626 FF |
467 | retries = ts->ts_longretry + 1; |
468 | for (i = 0; i < ts->ts_rateindex; i++) | |
469 | retries += rates[i].count; | |
470 | ||
1286ec6d | 471 | rcu_read_lock(); |
f078f209 | 472 | |
686b9cb9 | 473 | sta = ieee80211_find_sta_by_ifaddr(hw, hdr->addr1, hdr->addr2); |
1286ec6d S |
474 | if (!sta) { |
475 | rcu_read_unlock(); | |
73e19463 | 476 | |
31e79a59 FF |
477 | INIT_LIST_HEAD(&bf_head); |
478 | while (bf) { | |
479 | bf_next = bf->bf_next; | |
480 | ||
50676b81 | 481 | if (!bf->bf_state.stale || bf_next != NULL) |
31e79a59 FF |
482 | list_move_tail(&bf->list, &bf_head); |
483 | ||
156369fa | 484 | ath_tx_complete_buf(sc, bf, txq, &bf_head, ts, 0); |
31e79a59 FF |
485 | |
486 | bf = bf_next; | |
487 | } | |
1286ec6d | 488 | return; |
f078f209 LR |
489 | } |
490 | ||
1286ec6d | 491 | an = (struct ath_node *)sta->drv_priv; |
1803d02d | 492 | tid = ath_get_skb_tid(sc, an, skb); |
156369fa | 493 | seq_first = tid->seq_start; |
6fe7cc71 | 494 | isba = ts->ts_flags & ATH9K_TX_BA; |
1286ec6d | 495 | |
b11b160d FF |
496 | /* |
497 | * The hardware occasionally sends a tx status for the wrong TID. | |
498 | * In this case, the BA status cannot be considered valid and all | |
499 | * subframes need to be retransmitted | |
6fe7cc71 SE |
500 | * |
501 | * Only BlockAcks have a TID and therefore normal Acks cannot be | |
502 | * checked | |
b11b160d | 503 | */ |
1803d02d | 504 | if (isba && tid->tidno != ts->tid) |
b11b160d FF |
505 | txok = false; |
506 | ||
e8324357 | 507 | isaggr = bf_isaggr(bf); |
d43f3015 | 508 | memset(ba, 0, WME_BA_BMP_SIZE >> 3); |
f078f209 | 509 | |
d43f3015 | 510 | if (isaggr && txok) { |
db1a052b FF |
511 | if (ts->ts_flags & ATH9K_TX_BA) { |
512 | seq_st = ts->ts_seqnum; | |
513 | memcpy(ba, &ts->ba_low, WME_BA_BMP_SIZE >> 3); | |
e8324357 | 514 | } else { |
d43f3015 S |
515 | /* |
516 | * AR5416 can become deaf/mute when BA | |
517 | * issue happens. Chip needs to be reset. | |
518 | * But AP code may have sychronization issues | |
519 | * when perform internal reset in this routine. | |
520 | * Only enable reset in STA mode for now. | |
521 | */ | |
2660b81a | 522 | if (sc->sc_ah->opmode == NL80211_IFTYPE_STATION) |
d43f3015 | 523 | needreset = 1; |
e8324357 | 524 | } |
f078f209 LR |
525 | } |
526 | ||
56dc6336 | 527 | __skb_queue_head_init(&bf_pending); |
f078f209 | 528 | |
b572d033 | 529 | ath_tx_count_frames(sc, bf, ts, txok, &nframes, &nbad); |
e8324357 | 530 | while (bf) { |
6a0ddaef FF |
531 | u16 seqno = bf->bf_state.seqno; |
532 | ||
f0b8220c | 533 | txfail = txpending = sendbar = 0; |
e8324357 | 534 | bf_next = bf->bf_next; |
f078f209 | 535 | |
78c4653a FF |
536 | skb = bf->bf_mpdu; |
537 | tx_info = IEEE80211_SKB_CB(skb); | |
2d42efc4 | 538 | fi = get_frame_info(skb); |
78c4653a | 539 | |
897d7fd9 FF |
540 | if (!BAW_WITHIN(tid->seq_start, tid->baw_size, seqno) || |
541 | !tid->active) { | |
08c96abd FF |
542 | /* |
543 | * Outside of the current BlockAck window, | |
544 | * maybe part of a previous session | |
545 | */ | |
546 | txfail = 1; | |
547 | } else if (ATH_BA_ISSET(ba, ATH_BA_INDEX(seq_st, seqno))) { | |
e8324357 S |
548 | /* transmit completion, subframe is |
549 | * acked by block ack */ | |
0934af23 | 550 | acked_cnt++; |
e8324357 S |
551 | } else if (!isaggr && txok) { |
552 | /* transmit completion */ | |
0934af23 | 553 | acked_cnt++; |
b0477013 FF |
554 | } else if (flush) { |
555 | txpending = 1; | |
556 | } else if (fi->retries < ATH_MAX_SW_RETRIES) { | |
557 | if (txok || !an->sleeping) | |
558 | ath_tx_set_retry(sc, txq, bf->bf_mpdu, | |
559 | retries); | |
560 | ||
561 | txpending = 1; | |
e8324357 | 562 | } else { |
b0477013 FF |
563 | txfail = 1; |
564 | txfail_cnt++; | |
565 | bar_index = max_t(int, bar_index, | |
566 | ATH_BA_INDEX(seq_first, seqno)); | |
e8324357 | 567 | } |
f078f209 | 568 | |
fce041be FF |
569 | /* |
570 | * Make sure the last desc is reclaimed if it | |
571 | * not a holding desc. | |
572 | */ | |
56dc6336 | 573 | INIT_LIST_HEAD(&bf_head); |
50676b81 | 574 | if (bf_next != NULL || !bf_last->bf_state.stale) |
d43f3015 | 575 | list_move_tail(&bf->list, &bf_head); |
f078f209 | 576 | |
08c96abd | 577 | if (!txpending) { |
e8324357 S |
578 | /* |
579 | * complete the acked-ones/xretried ones; update | |
580 | * block-ack window | |
581 | */ | |
6a0ddaef | 582 | ath_tx_update_baw(sc, tid, seqno); |
f078f209 | 583 | |
8a92e2ee | 584 | if (rc_update && (acked_cnt == 1 || txfail_cnt == 1)) { |
78c4653a | 585 | memcpy(tx_info->control.rates, rates, sizeof(rates)); |
3afd21e7 | 586 | ath_tx_rc_status(sc, bf, ts, nframes, nbad, txok); |
8a92e2ee | 587 | rc_update = false; |
982e0395 LB |
588 | if (bf == bf->bf_lastbf) |
589 | ath_dynack_sample_tx_ts(sc->sc_ah, | |
590 | bf->bf_mpdu, | |
591 | ts); | |
8a92e2ee VT |
592 | } |
593 | ||
db1a052b | 594 | ath_tx_complete_buf(sc, bf, txq, &bf_head, ts, |
156369fa | 595 | !txfail); |
e8324357 | 596 | } else { |
86a22acf FF |
597 | if (tx_info->flags & IEEE80211_TX_STATUS_EOSP) { |
598 | tx_info->flags &= ~IEEE80211_TX_STATUS_EOSP; | |
599 | ieee80211_sta_eosp(sta); | |
600 | } | |
d43f3015 | 601 | /* retry the un-acked ones */ |
50676b81 | 602 | if (bf->bf_next == NULL && bf_last->bf_state.stale) { |
b0477013 FF |
603 | struct ath_buf *tbf; |
604 | ||
605 | tbf = ath_clone_txbuf(sc, bf_last); | |
606 | /* | |
607 | * Update tx baw and complete the | |
608 | * frame with failed status if we | |
609 | * run out of tx buf. | |
610 | */ | |
611 | if (!tbf) { | |
b0477013 | 612 | ath_tx_update_baw(sc, tid, seqno); |
b0477013 FF |
613 | |
614 | ath_tx_complete_buf(sc, bf, txq, | |
615 | &bf_head, ts, 0); | |
616 | bar_index = max_t(int, bar_index, | |
617 | ATH_BA_INDEX(seq_first, seqno)); | |
618 | break; | |
c41d92dc | 619 | } |
b0477013 FF |
620 | |
621 | fi->bf = tbf; | |
e8324357 S |
622 | } |
623 | ||
624 | /* | |
625 | * Put this buffer to the temporary pending | |
626 | * queue to retain ordering | |
627 | */ | |
56dc6336 | 628 | __skb_queue_tail(&bf_pending, skb); |
e8324357 S |
629 | } |
630 | ||
631 | bf = bf_next; | |
f078f209 | 632 | } |
f078f209 | 633 | |
4cee7861 | 634 | /* prepend un-acked frames to the beginning of the pending frame queue */ |
56dc6336 | 635 | if (!skb_queue_empty(&bf_pending)) { |
5519541d | 636 | if (an->sleeping) |
042ec453 | 637 | ieee80211_sta_set_buffered(sta, tid->tidno, true); |
5519541d | 638 | |
bb195ff6 | 639 | skb_queue_splice_tail(&bf_pending, &tid->retry_q); |
26a64259 | 640 | if (!an->sleeping) { |
0453531e | 641 | ath_tx_queue_tid(sc, txq, tid); |
26a64259 | 642 | |
adfbda62 | 643 | if (ts->ts_status & (ATH9K_TXERR_FILT | ATH9K_TXERR_XRETRY)) |
26a64259 FF |
644 | tid->ac->clear_ps_filter = true; |
645 | } | |
4cee7861 FF |
646 | } |
647 | ||
23de5dc9 FF |
648 | if (bar_index >= 0) { |
649 | u16 bar_seq = ATH_BA_INDEX2SEQ(seq_first, bar_index); | |
650 | ||
651 | if (BAW_WITHIN(tid->seq_start, tid->baw_size, bar_seq)) | |
652 | tid->bar_index = ATH_BA_INDEX(tid->seq_start, bar_seq); | |
653 | ||
654 | ath_txq_unlock(sc, txq); | |
655 | ath_send_bar(tid, ATH_BA_INDEX2SEQ(seq_first, bar_index + 1)); | |
656 | ath_txq_lock(sc, txq); | |
657 | } | |
658 | ||
1286ec6d S |
659 | rcu_read_unlock(); |
660 | ||
124b979b RM |
661 | if (needreset) |
662 | ath9k_queue_reset(sc, RESET_TYPE_TX_ERROR); | |
e8324357 | 663 | } |
f078f209 | 664 | |
81b51950 FF |
665 | static bool bf_is_ampdu_not_probing(struct ath_buf *bf) |
666 | { | |
667 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu); | |
668 | return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE); | |
669 | } | |
670 | ||
671 | static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq, | |
672 | struct ath_tx_status *ts, struct ath_buf *bf, | |
673 | struct list_head *bf_head) | |
674 | { | |
0c585dda | 675 | struct ieee80211_tx_info *info; |
81b51950 FF |
676 | bool txok, flush; |
677 | ||
678 | txok = !(ts->ts_status & ATH9K_TXERR_MASK); | |
679 | flush = !!(ts->ts_status & ATH9K_TX_FLUSH); | |
680 | txq->axq_tx_inprogress = false; | |
681 | ||
682 | txq->axq_depth--; | |
683 | if (bf_is_ampdu_not_probing(bf)) | |
684 | txq->axq_ampdu_depth--; | |
685 | ||
315dd114 FF |
686 | ts->duration = ath9k_hw_get_duration(sc->sc_ah, bf->bf_desc, |
687 | ts->ts_rateindex); | |
81b51950 | 688 | if (!bf_isampdu(bf)) { |
0c585dda FF |
689 | if (!flush) { |
690 | info = IEEE80211_SKB_CB(bf->bf_mpdu); | |
691 | memcpy(info->control.rates, bf->rates, | |
692 | sizeof(info->control.rates)); | |
81b51950 | 693 | ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok); |
982e0395 | 694 | ath_dynack_sample_tx_ts(sc->sc_ah, bf->bf_mpdu, ts); |
0c585dda | 695 | } |
81b51950 FF |
696 | ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok); |
697 | } else | |
698 | ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok); | |
699 | ||
73364b0c | 700 | if (!flush) |
81b51950 FF |
701 | ath_txq_schedule(sc, txq); |
702 | } | |
703 | ||
1a6e9d0f RM |
704 | static bool ath_lookup_legacy(struct ath_buf *bf) |
705 | { | |
706 | struct sk_buff *skb; | |
707 | struct ieee80211_tx_info *tx_info; | |
708 | struct ieee80211_tx_rate *rates; | |
709 | int i; | |
710 | ||
711 | skb = bf->bf_mpdu; | |
712 | tx_info = IEEE80211_SKB_CB(skb); | |
713 | rates = tx_info->control.rates; | |
714 | ||
059ee09b FF |
715 | for (i = 0; i < 4; i++) { |
716 | if (!rates[i].count || rates[i].idx < 0) | |
717 | break; | |
718 | ||
1a6e9d0f RM |
719 | if (!(rates[i].flags & IEEE80211_TX_RC_MCS)) |
720 | return true; | |
721 | } | |
722 | ||
723 | return false; | |
724 | } | |
725 | ||
e8324357 S |
726 | static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf, |
727 | struct ath_atx_tid *tid) | |
f078f209 | 728 | { |
528f0c6b S |
729 | struct sk_buff *skb; |
730 | struct ieee80211_tx_info *tx_info; | |
a8efee4f | 731 | struct ieee80211_tx_rate *rates; |
d43f3015 | 732 | u32 max_4ms_framelen, frmlen; |
c0ac53fa | 733 | u16 aggr_limit, bt_aggr_limit, legacy = 0; |
aa5955c3 | 734 | int q = tid->ac->txq->mac80211_qnum; |
e8324357 | 735 | int i; |
528f0c6b | 736 | |
a22be22a | 737 | skb = bf->bf_mpdu; |
528f0c6b | 738 | tx_info = IEEE80211_SKB_CB(skb); |
0c585dda | 739 | rates = bf->rates; |
528f0c6b | 740 | |
e8324357 S |
741 | /* |
742 | * Find the lowest frame length among the rate series that will have a | |
aa5955c3 | 743 | * 4ms (or TXOP limited) transmit duration. |
e8324357 S |
744 | */ |
745 | max_4ms_framelen = ATH_AMPDU_LIMIT_MAX; | |
e63835b0 | 746 | |
e8324357 | 747 | for (i = 0; i < 4; i++) { |
b0477013 | 748 | int modeidx; |
e8324357 | 749 | |
b0477013 FF |
750 | if (!rates[i].count) |
751 | continue; | |
545750d3 | 752 | |
b0477013 FF |
753 | if (!(rates[i].flags & IEEE80211_TX_RC_MCS)) { |
754 | legacy = 1; | |
755 | break; | |
f078f209 | 756 | } |
b0477013 FF |
757 | |
758 | if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH) | |
759 | modeidx = MCS_HT40; | |
760 | else | |
761 | modeidx = MCS_HT20; | |
762 | ||
763 | if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI) | |
764 | modeidx++; | |
765 | ||
aa5955c3 | 766 | frmlen = sc->tx.max_aggr_framelen[q][modeidx][rates[i].idx]; |
b0477013 | 767 | max_4ms_framelen = min(max_4ms_framelen, frmlen); |
f078f209 | 768 | } |
e63835b0 | 769 | |
f078f209 | 770 | /* |
e8324357 S |
771 | * limit aggregate size by the minimum rate if rate selected is |
772 | * not a probe rate, if rate selected is a probe rate then | |
773 | * avoid aggregation of this packet. | |
f078f209 | 774 | */ |
e8324357 S |
775 | if (tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE || legacy) |
776 | return 0; | |
f078f209 | 777 | |
c0ac53fa SM |
778 | aggr_limit = min(max_4ms_framelen, (u32)ATH_AMPDU_LIMIT_MAX); |
779 | ||
780 | /* | |
781 | * Override the default aggregation limit for BTCOEX. | |
782 | */ | |
783 | bt_aggr_limit = ath9k_btcoex_aggr_limit(sc, max_4ms_framelen); | |
784 | if (bt_aggr_limit) | |
785 | aggr_limit = bt_aggr_limit; | |
f078f209 | 786 | |
4ef70841 S |
787 | if (tid->an->maxampdu) |
788 | aggr_limit = min(aggr_limit, tid->an->maxampdu); | |
f078f209 | 789 | |
e8324357 S |
790 | return aggr_limit; |
791 | } | |
f078f209 | 792 | |
e8324357 | 793 | /* |
d43f3015 | 794 | * Returns the number of delimiters to be added to |
e8324357 | 795 | * meet the minimum required mpdudensity. |
e8324357 S |
796 | */ |
797 | static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid, | |
7a12dfdb RM |
798 | struct ath_buf *bf, u16 frmlen, |
799 | bool first_subfrm) | |
e8324357 | 800 | { |
7a12dfdb | 801 | #define FIRST_DESC_NDELIMS 60 |
4ef70841 | 802 | u32 nsymbits, nsymbols; |
e8324357 | 803 | u16 minlen; |
545750d3 | 804 | u8 flags, rix; |
c6663876 | 805 | int width, streams, half_gi, ndelim, mindelim; |
2d42efc4 | 806 | struct ath_frame_info *fi = get_frame_info(bf->bf_mpdu); |
e8324357 S |
807 | |
808 | /* Select standard number of delimiters based on frame length alone */ | |
809 | ndelim = ATH_AGGR_GET_NDELIM(frmlen); | |
f078f209 LR |
810 | |
811 | /* | |
e8324357 S |
812 | * If encryption enabled, hardware requires some more padding between |
813 | * subframes. | |
814 | * TODO - this could be improved to be dependent on the rate. | |
815 | * The hardware can keep up at lower rates, but not higher rates | |
f078f209 | 816 | */ |
4f6760b0 RM |
817 | if ((fi->keyix != ATH9K_TXKEYIX_INVALID) && |
818 | !(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) | |
e8324357 | 819 | ndelim += ATH_AGGR_ENCRYPTDELIM; |
f078f209 | 820 | |
7a12dfdb RM |
821 | /* |
822 | * Add delimiter when using RTS/CTS with aggregation | |
823 | * and non enterprise AR9003 card | |
824 | */ | |
3459731a FF |
825 | if (first_subfrm && !AR_SREV_9580_10_OR_LATER(sc->sc_ah) && |
826 | (sc->sc_ah->ent_mode & AR_ENT_OTP_MIN_PKT_SIZE_DISABLE)) | |
7a12dfdb RM |
827 | ndelim = max(ndelim, FIRST_DESC_NDELIMS); |
828 | ||
e8324357 S |
829 | /* |
830 | * Convert desired mpdu density from microeconds to bytes based | |
831 | * on highest rate in rate series (i.e. first rate) to determine | |
832 | * required minimum length for subframe. Take into account | |
833 | * whether high rate is 20 or 40Mhz and half or full GI. | |
4ef70841 | 834 | * |
e8324357 S |
835 | * If there is no mpdu density restriction, no further calculation |
836 | * is needed. | |
837 | */ | |
4ef70841 S |
838 | |
839 | if (tid->an->mpdudensity == 0) | |
e8324357 | 840 | return ndelim; |
f078f209 | 841 | |
79acac07 FF |
842 | rix = bf->rates[0].idx; |
843 | flags = bf->rates[0].flags; | |
e8324357 S |
844 | width = (flags & IEEE80211_TX_RC_40_MHZ_WIDTH) ? 1 : 0; |
845 | half_gi = (flags & IEEE80211_TX_RC_SHORT_GI) ? 1 : 0; | |
f078f209 | 846 | |
e8324357 | 847 | if (half_gi) |
4ef70841 | 848 | nsymbols = NUM_SYMBOLS_PER_USEC_HALFGI(tid->an->mpdudensity); |
e8324357 | 849 | else |
4ef70841 | 850 | nsymbols = NUM_SYMBOLS_PER_USEC(tid->an->mpdudensity); |
f078f209 | 851 | |
e8324357 S |
852 | if (nsymbols == 0) |
853 | nsymbols = 1; | |
f078f209 | 854 | |
c6663876 FF |
855 | streams = HT_RC_2_STREAMS(rix); |
856 | nsymbits = bits_per_symbol[rix % 8][width] * streams; | |
e8324357 | 857 | minlen = (nsymbols * nsymbits) / BITS_PER_BYTE; |
f078f209 | 858 | |
e8324357 | 859 | if (frmlen < minlen) { |
e8324357 S |
860 | mindelim = (minlen - frmlen) / ATH_AGGR_DELIM_SZ; |
861 | ndelim = max(mindelim, ndelim); | |
f078f209 LR |
862 | } |
863 | ||
e8324357 | 864 | return ndelim; |
f078f209 LR |
865 | } |
866 | ||
86a22acf FF |
867 | static struct ath_buf * |
868 | ath_tx_get_tid_subframe(struct ath_softc *sc, struct ath_txq *txq, | |
a7586ee4 | 869 | struct ath_atx_tid *tid, struct sk_buff_head **q) |
f078f209 | 870 | { |
73364b0c | 871 | struct ieee80211_tx_info *tx_info; |
2d42efc4 | 872 | struct ath_frame_info *fi; |
56dc6336 | 873 | struct sk_buff *skb; |
86a22acf | 874 | struct ath_buf *bf; |
6a0ddaef | 875 | u16 seqno; |
f078f209 | 876 | |
86a22acf | 877 | while (1) { |
bb195ff6 FF |
878 | *q = &tid->retry_q; |
879 | if (skb_queue_empty(*q)) | |
880 | *q = &tid->buf_q; | |
881 | ||
a7586ee4 | 882 | skb = skb_peek(*q); |
86a22acf FF |
883 | if (!skb) |
884 | break; | |
885 | ||
56dc6336 FF |
886 | fi = get_frame_info(skb); |
887 | bf = fi->bf; | |
44f1d26c | 888 | if (!fi->bf) |
249ee722 | 889 | bf = ath_tx_setup_buffer(sc, txq, tid, skb); |
563299d8 FF |
890 | else |
891 | bf->bf_state.stale = false; | |
56dc6336 | 892 | |
249ee722 | 893 | if (!bf) { |
a7586ee4 | 894 | __skb_unlink(skb, *q); |
a4943ccb | 895 | ath_txq_skb_done(sc, txq, skb); |
249ee722 | 896 | ieee80211_free_txskb(sc->hw, skb); |
44f1d26c | 897 | continue; |
249ee722 | 898 | } |
44f1d26c | 899 | |
73364b0c FF |
900 | bf->bf_next = NULL; |
901 | bf->bf_lastbf = bf; | |
902 | ||
903 | tx_info = IEEE80211_SKB_CB(skb); | |
904 | tx_info->flags &= ~IEEE80211_TX_CTL_CLEAR_PS_FILT; | |
c01fac1c FF |
905 | |
906 | /* | |
907 | * No aggregation session is running, but there may be frames | |
908 | * from a previous session or a failed attempt in the queue. | |
909 | * Send them out as normal data frames | |
910 | */ | |
911 | if (!tid->active) | |
912 | tx_info->flags &= ~IEEE80211_TX_CTL_AMPDU; | |
913 | ||
73364b0c FF |
914 | if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU)) { |
915 | bf->bf_state.bf_type = 0; | |
916 | return bf; | |
917 | } | |
918 | ||
399c6489 | 919 | bf->bf_state.bf_type = BUF_AMPDU | BUF_AGGR; |
44f1d26c | 920 | seqno = bf->bf_state.seqno; |
f078f209 | 921 | |
d43f3015 | 922 | /* do not step over block-ack window */ |
86a22acf | 923 | if (!BAW_WITHIN(tid->seq_start, tid->baw_size, seqno)) |
e8324357 | 924 | break; |
f078f209 | 925 | |
f9437543 FF |
926 | if (tid->bar_index > ATH_BA_INDEX(tid->seq_start, seqno)) { |
927 | struct ath_tx_status ts = {}; | |
928 | struct list_head bf_head; | |
929 | ||
930 | INIT_LIST_HEAD(&bf_head); | |
931 | list_add(&bf->list, &bf_head); | |
a7586ee4 | 932 | __skb_unlink(skb, *q); |
f9437543 FF |
933 | ath_tx_update_baw(sc, tid, seqno); |
934 | ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0); | |
935 | continue; | |
936 | } | |
937 | ||
86a22acf FF |
938 | return bf; |
939 | } | |
940 | ||
941 | return NULL; | |
942 | } | |
943 | ||
2800e82b FF |
944 | static bool |
945 | ath_tx_form_aggr(struct ath_softc *sc, struct ath_txq *txq, | |
946 | struct ath_atx_tid *tid, struct list_head *bf_q, | |
947 | struct ath_buf *bf_first, struct sk_buff_head *tid_q, | |
948 | int *aggr_len) | |
86a22acf FF |
949 | { |
950 | #define PADBYTES(_len) ((4 - ((_len) % 4)) % 4) | |
2800e82b | 951 | struct ath_buf *bf = bf_first, *bf_prev = NULL; |
a1cd94d3 | 952 | int nframes = 0, ndelim; |
86a22acf | 953 | u16 aggr_limit = 0, al = 0, bpad = 0, |
a1cd94d3 | 954 | al_delta, h_baw = tid->baw_size / 2; |
86a22acf FF |
955 | struct ieee80211_tx_info *tx_info; |
956 | struct ath_frame_info *fi; | |
957 | struct sk_buff *skb; | |
2800e82b | 958 | bool closed = false; |
86a22acf | 959 | |
2800e82b FF |
960 | bf = bf_first; |
961 | aggr_limit = ath_lookup_rate(sc, bf, tid); | |
86a22acf | 962 | |
2800e82b | 963 | do { |
86a22acf FF |
964 | skb = bf->bf_mpdu; |
965 | fi = get_frame_info(skb); | |
966 | ||
d43f3015 | 967 | /* do not exceed aggregation limit */ |
2d42efc4 | 968 | al_delta = ATH_AGGR_DELIM_SZ + fi->framelen; |
a1cd94d3 FF |
969 | if (nframes) { |
970 | if (aggr_limit < al + bpad + al_delta || | |
2800e82b | 971 | ath_lookup_legacy(bf) || nframes >= h_baw) |
a1cd94d3 | 972 | break; |
f078f209 | 973 | |
a1cd94d3 | 974 | tx_info = IEEE80211_SKB_CB(bf->bf_mpdu); |
2800e82b FF |
975 | if ((tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) || |
976 | !(tx_info->flags & IEEE80211_TX_CTL_AMPDU)) | |
a1cd94d3 | 977 | break; |
e8324357 | 978 | } |
f078f209 | 979 | |
d43f3015 | 980 | /* add padding for previous frame to aggregation length */ |
e8324357 | 981 | al += bpad + al_delta; |
f078f209 | 982 | |
e8324357 S |
983 | /* |
984 | * Get the delimiters needed to meet the MPDU | |
985 | * density for this node. | |
986 | */ | |
7a12dfdb RM |
987 | ndelim = ath_compute_num_delims(sc, tid, bf_first, fi->framelen, |
988 | !nframes); | |
e8324357 | 989 | bpad = PADBYTES(al_delta) + (ndelim << 2); |
f078f209 | 990 | |
7a12dfdb | 991 | nframes++; |
e8324357 | 992 | bf->bf_next = NULL; |
f078f209 | 993 | |
d43f3015 | 994 | /* link buffers of this frame to the aggregate */ |
8fed1408 FF |
995 | if (!fi->baw_tracked) |
996 | ath_tx_addto_baw(sc, tid, bf); | |
399c6489 | 997 | bf->bf_state.ndelim = ndelim; |
56dc6336 | 998 | |
a7586ee4 | 999 | __skb_unlink(skb, tid_q); |
56dc6336 | 1000 | list_add_tail(&bf->list, bf_q); |
399c6489 | 1001 | if (bf_prev) |
e8324357 | 1002 | bf_prev->bf_next = bf; |
399c6489 | 1003 | |
e8324357 | 1004 | bf_prev = bf; |
fec247c0 | 1005 | |
2800e82b FF |
1006 | bf = ath_tx_get_tid_subframe(sc, txq, tid, &tid_q); |
1007 | if (!bf) { | |
1008 | closed = true; | |
1009 | break; | |
1010 | } | |
a7586ee4 | 1011 | } while (ath_tid_has_buffered(tid)); |
f078f209 | 1012 | |
2800e82b FF |
1013 | bf = bf_first; |
1014 | bf->bf_lastbf = bf_prev; | |
1015 | ||
1016 | if (bf == bf_prev) { | |
1017 | al = get_frame_info(bf->bf_mpdu)->framelen; | |
1018 | bf->bf_state.bf_type = BUF_AMPDU; | |
1019 | } else { | |
1020 | TX_STAT_INC(txq->axq_qnum, a_aggr); | |
1021 | } | |
1022 | ||
269c44bc | 1023 | *aggr_len = al; |
d43f3015 | 1024 | |
2800e82b | 1025 | return closed; |
e8324357 S |
1026 | #undef PADBYTES |
1027 | } | |
f078f209 | 1028 | |
38dad7ba FF |
1029 | /* |
1030 | * rix - rate index | |
1031 | * pktlen - total bytes (delims + data + fcs + pads + pad delims) | |
1032 | * width - 0 for 20 MHz, 1 for 40 MHz | |
1033 | * half_gi - to use 4us v/s 3.6 us for symbol time | |
1034 | */ | |
1035 | static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen, | |
1036 | int width, int half_gi, bool shortPreamble) | |
1037 | { | |
1038 | u32 nbits, nsymbits, duration, nsymbols; | |
1039 | int streams; | |
1040 | ||
1041 | /* find number of symbols: PLCP + data */ | |
1042 | streams = HT_RC_2_STREAMS(rix); | |
1043 | nbits = (pktlen << 3) + OFDM_PLCP_BITS; | |
1044 | nsymbits = bits_per_symbol[rix % 8][width] * streams; | |
1045 | nsymbols = (nbits + nsymbits - 1) / nsymbits; | |
1046 | ||
1047 | if (!half_gi) | |
1048 | duration = SYMBOL_TIME(nsymbols); | |
1049 | else | |
1050 | duration = SYMBOL_TIME_HALFGI(nsymbols); | |
1051 | ||
1052 | /* addup duration for legacy/ht training and signal fields */ | |
1053 | duration += L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams); | |
1054 | ||
1055 | return duration; | |
1056 | } | |
1057 | ||
aa5955c3 FF |
1058 | static int ath_max_framelen(int usec, int mcs, bool ht40, bool sgi) |
1059 | { | |
1060 | int streams = HT_RC_2_STREAMS(mcs); | |
1061 | int symbols, bits; | |
1062 | int bytes = 0; | |
1063 | ||
727b662c | 1064 | usec -= L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams); |
aa5955c3 FF |
1065 | symbols = sgi ? TIME_SYMBOLS_HALFGI(usec) : TIME_SYMBOLS(usec); |
1066 | bits = symbols * bits_per_symbol[mcs % 8][ht40] * streams; | |
1067 | bits -= OFDM_PLCP_BITS; | |
1068 | bytes = bits / 8; | |
aa5955c3 FF |
1069 | if (bytes > 65532) |
1070 | bytes = 65532; | |
1071 | ||
1072 | return bytes; | |
1073 | } | |
1074 | ||
1075 | void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop) | |
1076 | { | |
1077 | u16 *cur_ht20, *cur_ht20_sgi, *cur_ht40, *cur_ht40_sgi; | |
1078 | int mcs; | |
1079 | ||
1080 | /* 4ms is the default (and maximum) duration */ | |
1081 | if (!txop || txop > 4096) | |
1082 | txop = 4096; | |
1083 | ||
1084 | cur_ht20 = sc->tx.max_aggr_framelen[queue][MCS_HT20]; | |
1085 | cur_ht20_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT20_SGI]; | |
1086 | cur_ht40 = sc->tx.max_aggr_framelen[queue][MCS_HT40]; | |
1087 | cur_ht40_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT40_SGI]; | |
1088 | for (mcs = 0; mcs < 32; mcs++) { | |
1089 | cur_ht20[mcs] = ath_max_framelen(txop, mcs, false, false); | |
1090 | cur_ht20_sgi[mcs] = ath_max_framelen(txop, mcs, false, true); | |
1091 | cur_ht40[mcs] = ath_max_framelen(txop, mcs, true, false); | |
1092 | cur_ht40_sgi[mcs] = ath_max_framelen(txop, mcs, true, true); | |
1093 | } | |
1094 | } | |
1095 | ||
493cf04f | 1096 | static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, |
a3835e9f | 1097 | struct ath_tx_info *info, int len, bool rts) |
38dad7ba FF |
1098 | { |
1099 | struct ath_hw *ah = sc->sc_ah; | |
13f71050 | 1100 | struct ath_common *common = ath9k_hw_common(ah); |
38dad7ba FF |
1101 | struct sk_buff *skb; |
1102 | struct ieee80211_tx_info *tx_info; | |
1103 | struct ieee80211_tx_rate *rates; | |
1104 | const struct ieee80211_rate *rate; | |
1105 | struct ieee80211_hdr *hdr; | |
80b08a8d | 1106 | struct ath_frame_info *fi = get_frame_info(bf->bf_mpdu); |
a3835e9f | 1107 | u32 rts_thresh = sc->hw->wiphy->rts_threshold; |
493cf04f FF |
1108 | int i; |
1109 | u8 rix = 0; | |
38dad7ba FF |
1110 | |
1111 | skb = bf->bf_mpdu; | |
1112 | tx_info = IEEE80211_SKB_CB(skb); | |
79acac07 | 1113 | rates = bf->rates; |
38dad7ba | 1114 | hdr = (struct ieee80211_hdr *)skb->data; |
493cf04f FF |
1115 | |
1116 | /* set dur_update_en for l-sig computation except for PS-Poll frames */ | |
1117 | info->dur_update = !ieee80211_is_pspoll(hdr->frame_control); | |
80b08a8d | 1118 | info->rtscts_rate = fi->rtscts_rate; |
38dad7ba | 1119 | |
79acac07 | 1120 | for (i = 0; i < ARRAY_SIZE(bf->rates); i++) { |
38dad7ba FF |
1121 | bool is_40, is_sgi, is_sp; |
1122 | int phy; | |
1123 | ||
1124 | if (!rates[i].count || (rates[i].idx < 0)) | |
1125 | continue; | |
1126 | ||
1127 | rix = rates[i].idx; | |
493cf04f | 1128 | info->rates[i].Tries = rates[i].count; |
38dad7ba | 1129 | |
a3835e9f SM |
1130 | /* |
1131 | * Handle RTS threshold for unaggregated HT frames. | |
1132 | */ | |
1133 | if (bf_isampdu(bf) && !bf_isaggr(bf) && | |
1134 | (rates[i].flags & IEEE80211_TX_RC_MCS) && | |
1135 | unlikely(rts_thresh != (u32) -1)) { | |
1136 | if (!rts_thresh || (len > rts_thresh)) | |
1137 | rts = true; | |
1138 | } | |
1139 | ||
1140 | if (rts || rates[i].flags & IEEE80211_TX_RC_USE_RTS_CTS) { | |
493cf04f FF |
1141 | info->rates[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS; |
1142 | info->flags |= ATH9K_TXDESC_RTSENA; | |
38dad7ba | 1143 | } else if (rates[i].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { |
493cf04f FF |
1144 | info->rates[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS; |
1145 | info->flags |= ATH9K_TXDESC_CTSENA; | |
38dad7ba FF |
1146 | } |
1147 | ||
1148 | if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH) | |
493cf04f | 1149 | info->rates[i].RateFlags |= ATH9K_RATESERIES_2040; |
38dad7ba | 1150 | if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI) |
493cf04f | 1151 | info->rates[i].RateFlags |= ATH9K_RATESERIES_HALFGI; |
38dad7ba FF |
1152 | |
1153 | is_sgi = !!(rates[i].flags & IEEE80211_TX_RC_SHORT_GI); | |
1154 | is_40 = !!(rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH); | |
1155 | is_sp = !!(rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE); | |
1156 | ||
1157 | if (rates[i].flags & IEEE80211_TX_RC_MCS) { | |
1158 | /* MCS rates */ | |
493cf04f FF |
1159 | info->rates[i].Rate = rix | 0x80; |
1160 | info->rates[i].ChSel = ath_txchainmask_reduction(sc, | |
1161 | ah->txchainmask, info->rates[i].Rate); | |
1162 | info->rates[i].PktDuration = ath_pkt_duration(sc, rix, len, | |
38dad7ba FF |
1163 | is_40, is_sgi, is_sp); |
1164 | if (rix < 8 && (tx_info->flags & IEEE80211_TX_CTL_STBC)) | |
493cf04f | 1165 | info->rates[i].RateFlags |= ATH9K_RATESERIES_STBC; |
38dad7ba FF |
1166 | continue; |
1167 | } | |
1168 | ||
1169 | /* legacy rates */ | |
13f71050 | 1170 | rate = &common->sbands[tx_info->band].bitrates[rates[i].idx]; |
38dad7ba FF |
1171 | if ((tx_info->band == IEEE80211_BAND_2GHZ) && |
1172 | !(rate->flags & IEEE80211_RATE_ERP_G)) | |
1173 | phy = WLAN_RC_PHY_CCK; | |
1174 | else | |
1175 | phy = WLAN_RC_PHY_OFDM; | |
1176 | ||
493cf04f | 1177 | info->rates[i].Rate = rate->hw_value; |
38dad7ba FF |
1178 | if (rate->hw_value_short) { |
1179 | if (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) | |
493cf04f | 1180 | info->rates[i].Rate |= rate->hw_value_short; |
38dad7ba FF |
1181 | } else { |
1182 | is_sp = false; | |
1183 | } | |
1184 | ||
1185 | if (bf->bf_state.bfs_paprd) | |
493cf04f | 1186 | info->rates[i].ChSel = ah->txchainmask; |
38dad7ba | 1187 | else |
493cf04f FF |
1188 | info->rates[i].ChSel = ath_txchainmask_reduction(sc, |
1189 | ah->txchainmask, info->rates[i].Rate); | |
38dad7ba | 1190 | |
493cf04f | 1191 | info->rates[i].PktDuration = ath9k_hw_computetxtime(sc->sc_ah, |
38dad7ba FF |
1192 | phy, rate->bitrate * 100, len, rix, is_sp); |
1193 | } | |
1194 | ||
1195 | /* For AR5416 - RTS cannot be followed by a frame larger than 8K */ | |
1196 | if (bf_isaggr(bf) && (len > sc->sc_ah->caps.rts_aggr_limit)) | |
493cf04f | 1197 | info->flags &= ~ATH9K_TXDESC_RTSENA; |
38dad7ba FF |
1198 | |
1199 | /* ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive. */ | |
493cf04f FF |
1200 | if (info->flags & ATH9K_TXDESC_RTSENA) |
1201 | info->flags &= ~ATH9K_TXDESC_CTSENA; | |
1202 | } | |
38dad7ba | 1203 | |
493cf04f FF |
1204 | static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb) |
1205 | { | |
1206 | struct ieee80211_hdr *hdr; | |
1207 | enum ath9k_pkt_type htype; | |
1208 | __le16 fc; | |
1209 | ||
1210 | hdr = (struct ieee80211_hdr *)skb->data; | |
1211 | fc = hdr->frame_control; | |
38dad7ba | 1212 | |
493cf04f FF |
1213 | if (ieee80211_is_beacon(fc)) |
1214 | htype = ATH9K_PKT_TYPE_BEACON; | |
1215 | else if (ieee80211_is_probe_resp(fc)) | |
1216 | htype = ATH9K_PKT_TYPE_PROBE_RESP; | |
1217 | else if (ieee80211_is_atim(fc)) | |
1218 | htype = ATH9K_PKT_TYPE_ATIM; | |
1219 | else if (ieee80211_is_pspoll(fc)) | |
1220 | htype = ATH9K_PKT_TYPE_PSPOLL; | |
1221 | else | |
1222 | htype = ATH9K_PKT_TYPE_NORMAL; | |
1223 | ||
1224 | return htype; | |
38dad7ba FF |
1225 | } |
1226 | ||
493cf04f FF |
1227 | static void ath_tx_fill_desc(struct ath_softc *sc, struct ath_buf *bf, |
1228 | struct ath_txq *txq, int len) | |
399c6489 FF |
1229 | { |
1230 | struct ath_hw *ah = sc->sc_ah; | |
86a22acf | 1231 | struct ath_buf *bf_first = NULL; |
493cf04f | 1232 | struct ath_tx_info info; |
a3835e9f SM |
1233 | u32 rts_thresh = sc->hw->wiphy->rts_threshold; |
1234 | bool rts = false; | |
399c6489 | 1235 | |
493cf04f FF |
1236 | memset(&info, 0, sizeof(info)); |
1237 | info.is_first = true; | |
1238 | info.is_last = true; | |
1239 | info.txpower = MAX_RATE_POWER; | |
1240 | info.qcu = txq->axq_qnum; | |
1241 | ||
399c6489 | 1242 | while (bf) { |
493cf04f | 1243 | struct sk_buff *skb = bf->bf_mpdu; |
86a22acf | 1244 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
493cf04f | 1245 | struct ath_frame_info *fi = get_frame_info(skb); |
86a22acf | 1246 | bool aggr = !!(bf->bf_state.bf_type & BUF_AGGR); |
493cf04f FF |
1247 | |
1248 | info.type = get_hw_packet_type(skb); | |
399c6489 | 1249 | if (bf->bf_next) |
493cf04f | 1250 | info.link = bf->bf_next->bf_daddr; |
399c6489 | 1251 | else |
89f927af | 1252 | info.link = (sc->tx99_state) ? bf->bf_daddr : 0; |
493cf04f | 1253 | |
86a22acf FF |
1254 | if (!bf_first) { |
1255 | bf_first = bf; | |
1256 | ||
89f927af LR |
1257 | if (!sc->tx99_state) |
1258 | info.flags = ATH9K_TXDESC_INTREQ; | |
86a22acf FF |
1259 | if ((tx_info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT) || |
1260 | txq == sc->tx.uapsdq) | |
1261 | info.flags |= ATH9K_TXDESC_CLRDMASK; | |
1262 | ||
1263 | if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK) | |
1264 | info.flags |= ATH9K_TXDESC_NOACK; | |
1265 | if (tx_info->flags & IEEE80211_TX_CTL_LDPC) | |
1266 | info.flags |= ATH9K_TXDESC_LDPC; | |
1267 | ||
1268 | if (bf->bf_state.bfs_paprd) | |
1269 | info.flags |= (u32) bf->bf_state.bfs_paprd << | |
1270 | ATH9K_TXDESC_PAPRD_S; | |
1271 | ||
a3835e9f SM |
1272 | /* |
1273 | * mac80211 doesn't handle RTS threshold for HT because | |
1274 | * the decision has to be taken based on AMPDU length | |
1275 | * and aggregation is done entirely inside ath9k. | |
1276 | * Set the RTS/CTS flag for the first subframe based | |
1277 | * on the threshold. | |
1278 | */ | |
1279 | if (aggr && (bf == bf_first) && | |
1280 | unlikely(rts_thresh != (u32) -1)) { | |
1281 | /* | |
1282 | * "len" is the size of the entire AMPDU. | |
1283 | */ | |
1284 | if (!rts_thresh || (len > rts_thresh)) | |
1285 | rts = true; | |
1286 | } | |
bbf807bc FF |
1287 | |
1288 | if (!aggr) | |
1289 | len = fi->framelen; | |
1290 | ||
a3835e9f | 1291 | ath_buf_set_rate(sc, bf, &info, len, rts); |
86a22acf FF |
1292 | } |
1293 | ||
42cecc34 JL |
1294 | info.buf_addr[0] = bf->bf_buf_addr; |
1295 | info.buf_len[0] = skb->len; | |
493cf04f FF |
1296 | info.pkt_len = fi->framelen; |
1297 | info.keyix = fi->keyix; | |
1298 | info.keytype = fi->keytype; | |
1299 | ||
1300 | if (aggr) { | |
399c6489 | 1301 | if (bf == bf_first) |
493cf04f | 1302 | info.aggr = AGGR_BUF_FIRST; |
86a22acf | 1303 | else if (bf == bf_first->bf_lastbf) |
493cf04f FF |
1304 | info.aggr = AGGR_BUF_LAST; |
1305 | else | |
1306 | info.aggr = AGGR_BUF_MIDDLE; | |
399c6489 | 1307 | |
493cf04f FF |
1308 | info.ndelim = bf->bf_state.ndelim; |
1309 | info.aggr_len = len; | |
399c6489 FF |
1310 | } |
1311 | ||
86a22acf FF |
1312 | if (bf == bf_first->bf_lastbf) |
1313 | bf_first = NULL; | |
1314 | ||
493cf04f | 1315 | ath9k_hw_set_txdesc(ah, bf->bf_desc, &info); |
399c6489 FF |
1316 | bf = bf->bf_next; |
1317 | } | |
1318 | } | |
1319 | ||
2800e82b FF |
1320 | static void |
1321 | ath_tx_form_burst(struct ath_softc *sc, struct ath_txq *txq, | |
1322 | struct ath_atx_tid *tid, struct list_head *bf_q, | |
1323 | struct ath_buf *bf_first, struct sk_buff_head *tid_q) | |
1324 | { | |
1325 | struct ath_buf *bf = bf_first, *bf_prev = NULL; | |
1326 | struct sk_buff *skb; | |
1327 | int nframes = 0; | |
1328 | ||
1329 | do { | |
1330 | struct ieee80211_tx_info *tx_info; | |
1331 | skb = bf->bf_mpdu; | |
1332 | ||
1333 | nframes++; | |
1334 | __skb_unlink(skb, tid_q); | |
1335 | list_add_tail(&bf->list, bf_q); | |
1336 | if (bf_prev) | |
1337 | bf_prev->bf_next = bf; | |
1338 | bf_prev = bf; | |
1339 | ||
1340 | if (nframes >= 2) | |
1341 | break; | |
1342 | ||
1343 | bf = ath_tx_get_tid_subframe(sc, txq, tid, &tid_q); | |
1344 | if (!bf) | |
1345 | break; | |
1346 | ||
1347 | tx_info = IEEE80211_SKB_CB(bf->bf_mpdu); | |
1348 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) | |
1349 | break; | |
1350 | ||
1351 | ath_set_rates(tid->an->vif, tid->an->sta, bf); | |
1352 | } while (1); | |
1353 | } | |
1354 | ||
020f20f6 FF |
1355 | static bool ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq, |
1356 | struct ath_atx_tid *tid, bool *stop) | |
e8324357 | 1357 | { |
d43f3015 | 1358 | struct ath_buf *bf; |
399c6489 | 1359 | struct ieee80211_tx_info *tx_info; |
2800e82b | 1360 | struct sk_buff_head *tid_q; |
e8324357 | 1361 | struct list_head bf_q; |
2800e82b FF |
1362 | int aggr_len = 0; |
1363 | bool aggr, last = true; | |
f078f209 | 1364 | |
020f20f6 FF |
1365 | if (!ath_tid_has_buffered(tid)) |
1366 | return false; | |
f078f209 | 1367 | |
020f20f6 | 1368 | INIT_LIST_HEAD(&bf_q); |
e8324357 | 1369 | |
020f20f6 FF |
1370 | bf = ath_tx_get_tid_subframe(sc, txq, tid, &tid_q); |
1371 | if (!bf) | |
1372 | return false; | |
f078f209 | 1373 | |
020f20f6 FF |
1374 | tx_info = IEEE80211_SKB_CB(bf->bf_mpdu); |
1375 | aggr = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU); | |
1376 | if ((aggr && txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH) || | |
1377 | (!aggr && txq->axq_depth >= ATH_NON_AGGR_MIN_QDEPTH)) { | |
1378 | *stop = true; | |
1379 | return false; | |
1380 | } | |
2800e82b | 1381 | |
020f20f6 FF |
1382 | ath_set_rates(tid->an->vif, tid->an->sta, bf); |
1383 | if (aggr) | |
1384 | last = ath_tx_form_aggr(sc, txq, tid, &bf_q, bf, | |
1385 | tid_q, &aggr_len); | |
1386 | else | |
1387 | ath_tx_form_burst(sc, txq, tid, &bf_q, bf, tid_q); | |
2800e82b | 1388 | |
020f20f6 FF |
1389 | if (list_empty(&bf_q)) |
1390 | return false; | |
f078f209 | 1391 | |
f89d1bc4 | 1392 | if (tid->ac->clear_ps_filter || tid->an->no_ps_filter) { |
020f20f6 FF |
1393 | tid->ac->clear_ps_filter = false; |
1394 | tx_info->flags |= IEEE80211_TX_CTL_CLEAR_PS_FILT; | |
1395 | } | |
f078f209 | 1396 | |
020f20f6 FF |
1397 | ath_tx_fill_desc(sc, bf, txq, aggr_len); |
1398 | ath_tx_txqaddbuf(sc, txq, &bf_q, false); | |
1399 | return true; | |
e8324357 S |
1400 | } |
1401 | ||
231c3a1f FF |
1402 | int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, |
1403 | u16 tid, u16 *ssn) | |
e8324357 S |
1404 | { |
1405 | struct ath_atx_tid *txtid; | |
919123d2 | 1406 | struct ath_txq *txq; |
e8324357 | 1407 | struct ath_node *an; |
313eb87f | 1408 | u8 density; |
e8324357 S |
1409 | |
1410 | an = (struct ath_node *)sta->drv_priv; | |
f83da965 | 1411 | txtid = ATH_AN_2_TID(an, tid); |
919123d2 FF |
1412 | txq = txtid->ac->txq; |
1413 | ||
1414 | ath_txq_lock(sc, txq); | |
231c3a1f | 1415 | |
313eb87f SE |
1416 | /* update ampdu factor/density, they may have changed. This may happen |
1417 | * in HT IBSS when a beacon with HT-info is received after the station | |
1418 | * has already been added. | |
1419 | */ | |
dd5ee59b | 1420 | if (sta->ht_cap.ht_supported) { |
5b502c86 SM |
1421 | an->maxampdu = (1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + |
1422 | sta->ht_cap.ampdu_factor)) - 1; | |
313eb87f SE |
1423 | density = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density); |
1424 | an->mpdudensity = density; | |
1425 | } | |
1426 | ||
2800e82b FF |
1427 | /* force sequence number allocation for pending frames */ |
1428 | ath_tx_tid_change_state(sc, txtid); | |
1429 | ||
08c96abd | 1430 | txtid->active = true; |
49447f2f | 1431 | *ssn = txtid->seq_start = txtid->seq_next; |
f9437543 | 1432 | txtid->bar_index = -1; |
231c3a1f | 1433 | |
2ed72229 FF |
1434 | memset(txtid->tx_buf, 0, sizeof(txtid->tx_buf)); |
1435 | txtid->baw_head = txtid->baw_tail = 0; | |
1436 | ||
919123d2 FF |
1437 | ath_txq_unlock_complete(sc, txq); |
1438 | ||
231c3a1f | 1439 | return 0; |
e8324357 | 1440 | } |
f078f209 | 1441 | |
08c96abd | 1442 | void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid) |
e8324357 S |
1443 | { |
1444 | struct ath_node *an = (struct ath_node *)sta->drv_priv; | |
1445 | struct ath_atx_tid *txtid = ATH_AN_2_TID(an, tid); | |
066dae93 | 1446 | struct ath_txq *txq = txtid->ac->txq; |
f078f209 | 1447 | |
23de5dc9 | 1448 | ath_txq_lock(sc, txq); |
08c96abd | 1449 | txtid->active = false; |
08c96abd | 1450 | ath_tx_flush_tid(sc, txtid); |
2800e82b | 1451 | ath_tx_tid_change_state(sc, txtid); |
23de5dc9 | 1452 | ath_txq_unlock_complete(sc, txq); |
e8324357 | 1453 | } |
f078f209 | 1454 | |
042ec453 JB |
1455 | void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc, |
1456 | struct ath_node *an) | |
5519541d FF |
1457 | { |
1458 | struct ath_atx_tid *tid; | |
1459 | struct ath_atx_ac *ac; | |
1460 | struct ath_txq *txq; | |
042ec453 | 1461 | bool buffered; |
5519541d FF |
1462 | int tidno; |
1463 | ||
1464 | for (tidno = 0, tid = &an->tid[tidno]; | |
de7b7604 | 1465 | tidno < IEEE80211_NUM_TIDS; tidno++, tid++) { |
5519541d | 1466 | |
5519541d FF |
1467 | ac = tid->ac; |
1468 | txq = ac->txq; | |
1469 | ||
23de5dc9 | 1470 | ath_txq_lock(sc, txq); |
5519541d | 1471 | |
21f8aaee SG |
1472 | if (!tid->sched) { |
1473 | ath_txq_unlock(sc, txq); | |
1474 | continue; | |
1475 | } | |
1476 | ||
a7586ee4 | 1477 | buffered = ath_tid_has_buffered(tid); |
5519541d FF |
1478 | |
1479 | tid->sched = false; | |
1480 | list_del(&tid->list); | |
1481 | ||
1482 | if (ac->sched) { | |
1483 | ac->sched = false; | |
1484 | list_del(&ac->list); | |
1485 | } | |
1486 | ||
23de5dc9 | 1487 | ath_txq_unlock(sc, txq); |
5519541d | 1488 | |
042ec453 JB |
1489 | ieee80211_sta_set_buffered(sta, tidno, buffered); |
1490 | } | |
5519541d FF |
1491 | } |
1492 | ||
1493 | void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an) | |
1494 | { | |
1495 | struct ath_atx_tid *tid; | |
1496 | struct ath_atx_ac *ac; | |
1497 | struct ath_txq *txq; | |
1498 | int tidno; | |
1499 | ||
1500 | for (tidno = 0, tid = &an->tid[tidno]; | |
de7b7604 | 1501 | tidno < IEEE80211_NUM_TIDS; tidno++, tid++) { |
5519541d FF |
1502 | |
1503 | ac = tid->ac; | |
1504 | txq = ac->txq; | |
1505 | ||
23de5dc9 | 1506 | ath_txq_lock(sc, txq); |
5519541d FF |
1507 | ac->clear_ps_filter = true; |
1508 | ||
62e54dbb | 1509 | if (ath_tid_has_buffered(tid)) { |
0453531e | 1510 | ath_tx_queue_tid(sc, txq, tid); |
5519541d FF |
1511 | ath_txq_schedule(sc, txq); |
1512 | } | |
1513 | ||
23de5dc9 | 1514 | ath_txq_unlock_complete(sc, txq); |
5519541d FF |
1515 | } |
1516 | } | |
1517 | ||
08c96abd FF |
1518 | void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, |
1519 | u16 tidno) | |
e8324357 | 1520 | { |
08c96abd | 1521 | struct ath_atx_tid *tid; |
e8324357 | 1522 | struct ath_node *an; |
08c96abd | 1523 | struct ath_txq *txq; |
e8324357 S |
1524 | |
1525 | an = (struct ath_node *)sta->drv_priv; | |
08c96abd FF |
1526 | tid = ATH_AN_2_TID(an, tidno); |
1527 | txq = tid->ac->txq; | |
e8324357 | 1528 | |
08c96abd FF |
1529 | ath_txq_lock(sc, txq); |
1530 | ||
1531 | tid->baw_size = IEEE80211_MIN_AMPDU_BUF << sta->ht_cap.ampdu_factor; | |
08c96abd | 1532 | |
a7586ee4 | 1533 | if (ath_tid_has_buffered(tid)) { |
0453531e | 1534 | ath_tx_queue_tid(sc, txq, tid); |
08c96abd FF |
1535 | ath_txq_schedule(sc, txq); |
1536 | } | |
1537 | ||
1538 | ath_txq_unlock_complete(sc, txq); | |
f078f209 LR |
1539 | } |
1540 | ||
86a22acf FF |
1541 | void ath9k_release_buffered_frames(struct ieee80211_hw *hw, |
1542 | struct ieee80211_sta *sta, | |
1543 | u16 tids, int nframes, | |
1544 | enum ieee80211_frame_release_type reason, | |
1545 | bool more_data) | |
1546 | { | |
1547 | struct ath_softc *sc = hw->priv; | |
1548 | struct ath_node *an = (struct ath_node *)sta->drv_priv; | |
1549 | struct ath_txq *txq = sc->tx.uapsdq; | |
1550 | struct ieee80211_tx_info *info; | |
1551 | struct list_head bf_q; | |
1552 | struct ath_buf *bf_tail = NULL, *bf; | |
a7586ee4 | 1553 | struct sk_buff_head *tid_q; |
86a22acf FF |
1554 | int sent = 0; |
1555 | int i; | |
1556 | ||
1557 | INIT_LIST_HEAD(&bf_q); | |
1558 | for (i = 0; tids && nframes; i++, tids >>= 1) { | |
1559 | struct ath_atx_tid *tid; | |
1560 | ||
1561 | if (!(tids & 1)) | |
1562 | continue; | |
1563 | ||
1564 | tid = ATH_AN_2_TID(an, i); | |
86a22acf FF |
1565 | |
1566 | ath_txq_lock(sc, tid->ac->txq); | |
a7586ee4 FF |
1567 | while (nframes > 0) { |
1568 | bf = ath_tx_get_tid_subframe(sc, sc->tx.uapsdq, tid, &tid_q); | |
86a22acf FF |
1569 | if (!bf) |
1570 | break; | |
1571 | ||
a7586ee4 | 1572 | __skb_unlink(bf->bf_mpdu, tid_q); |
86a22acf FF |
1573 | list_add_tail(&bf->list, &bf_q); |
1574 | ath_set_rates(tid->an->vif, tid->an->sta, bf); | |
20e6e55a FF |
1575 | if (bf_isampdu(bf)) { |
1576 | ath_tx_addto_baw(sc, tid, bf); | |
1577 | bf->bf_state.bf_type &= ~BUF_AGGR; | |
1578 | } | |
86a22acf FF |
1579 | if (bf_tail) |
1580 | bf_tail->bf_next = bf; | |
1581 | ||
1582 | bf_tail = bf; | |
1583 | nframes--; | |
1584 | sent++; | |
1585 | TX_STAT_INC(txq->axq_qnum, a_queued_hw); | |
1586 | ||
f89d1bc4 | 1587 | if (an->sta && !ath_tid_has_buffered(tid)) |
86a22acf FF |
1588 | ieee80211_sta_set_buffered(an->sta, i, false); |
1589 | } | |
1590 | ath_txq_unlock_complete(sc, tid->ac->txq); | |
1591 | } | |
1592 | ||
1593 | if (list_empty(&bf_q)) | |
1594 | return; | |
1595 | ||
1596 | info = IEEE80211_SKB_CB(bf_tail->bf_mpdu); | |
1597 | info->flags |= IEEE80211_TX_STATUS_EOSP; | |
1598 | ||
1599 | bf = list_first_entry(&bf_q, struct ath_buf, list); | |
1600 | ath_txq_lock(sc, txq); | |
1601 | ath_tx_fill_desc(sc, bf, txq, 0); | |
1602 | ath_tx_txqaddbuf(sc, txq, &bf_q, false); | |
1603 | ath_txq_unlock(sc, txq); | |
1604 | } | |
1605 | ||
e8324357 S |
1606 | /********************/ |
1607 | /* Queue Management */ | |
1608 | /********************/ | |
f078f209 | 1609 | |
e8324357 | 1610 | struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype) |
f078f209 | 1611 | { |
cbe61d8a | 1612 | struct ath_hw *ah = sc->sc_ah; |
e8324357 | 1613 | struct ath9k_tx_queue_info qi; |
066dae93 | 1614 | static const int subtype_txq_to_hwq[] = { |
bea843c7 SM |
1615 | [IEEE80211_AC_BE] = ATH_TXQ_AC_BE, |
1616 | [IEEE80211_AC_BK] = ATH_TXQ_AC_BK, | |
1617 | [IEEE80211_AC_VI] = ATH_TXQ_AC_VI, | |
1618 | [IEEE80211_AC_VO] = ATH_TXQ_AC_VO, | |
066dae93 | 1619 | }; |
60f2d1d5 | 1620 | int axq_qnum, i; |
f078f209 | 1621 | |
e8324357 | 1622 | memset(&qi, 0, sizeof(qi)); |
066dae93 | 1623 | qi.tqi_subtype = subtype_txq_to_hwq[subtype]; |
e8324357 S |
1624 | qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; |
1625 | qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; | |
1626 | qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; | |
1627 | qi.tqi_physCompBuf = 0; | |
f078f209 LR |
1628 | |
1629 | /* | |
e8324357 S |
1630 | * Enable interrupts only for EOL and DESC conditions. |
1631 | * We mark tx descriptors to receive a DESC interrupt | |
1632 | * when a tx queue gets deep; otherwise waiting for the | |
1633 | * EOL to reap descriptors. Note that this is done to | |
1634 | * reduce interrupt load and this only defers reaping | |
1635 | * descriptors, never transmitting frames. Aside from | |
1636 | * reducing interrupts this also permits more concurrency. | |
1637 | * The only potential downside is if the tx queue backs | |
1638 | * up in which case the top half of the kernel may backup | |
1639 | * due to a lack of tx descriptors. | |
1640 | * | |
1641 | * The UAPSD queue is an exception, since we take a desc- | |
1642 | * based intr on the EOSP frames. | |
f078f209 | 1643 | */ |
afe754d6 | 1644 | if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { |
ce8fdf6e | 1645 | qi.tqi_qflags = TXQ_FLAG_TXINT_ENABLE; |
afe754d6 VT |
1646 | } else { |
1647 | if (qtype == ATH9K_TX_QUEUE_UAPSD) | |
1648 | qi.tqi_qflags = TXQ_FLAG_TXDESCINT_ENABLE; | |
1649 | else | |
1650 | qi.tqi_qflags = TXQ_FLAG_TXEOLINT_ENABLE | | |
1651 | TXQ_FLAG_TXDESCINT_ENABLE; | |
1652 | } | |
60f2d1d5 BG |
1653 | axq_qnum = ath9k_hw_setuptxqueue(ah, qtype, &qi); |
1654 | if (axq_qnum == -1) { | |
f078f209 | 1655 | /* |
e8324357 S |
1656 | * NB: don't print a message, this happens |
1657 | * normally on parts with too few tx queues | |
f078f209 | 1658 | */ |
e8324357 | 1659 | return NULL; |
f078f209 | 1660 | } |
60f2d1d5 BG |
1661 | if (!ATH_TXQ_SETUP(sc, axq_qnum)) { |
1662 | struct ath_txq *txq = &sc->tx.txq[axq_qnum]; | |
f078f209 | 1663 | |
60f2d1d5 BG |
1664 | txq->axq_qnum = axq_qnum; |
1665 | txq->mac80211_qnum = -1; | |
e8324357 | 1666 | txq->axq_link = NULL; |
23de5dc9 | 1667 | __skb_queue_head_init(&txq->complete_q); |
e8324357 | 1668 | INIT_LIST_HEAD(&txq->axq_q); |
e8324357 S |
1669 | spin_lock_init(&txq->axq_lock); |
1670 | txq->axq_depth = 0; | |
4b3ba66a | 1671 | txq->axq_ampdu_depth = 0; |
164ace38 | 1672 | txq->axq_tx_inprogress = false; |
60f2d1d5 | 1673 | sc->tx.txqsetup |= 1<<axq_qnum; |
e5003249 VT |
1674 | |
1675 | txq->txq_headidx = txq->txq_tailidx = 0; | |
1676 | for (i = 0; i < ATH_TXFIFO_DEPTH; i++) | |
1677 | INIT_LIST_HEAD(&txq->txq_fifo[i]); | |
e8324357 | 1678 | } |
60f2d1d5 | 1679 | return &sc->tx.txq[axq_qnum]; |
f078f209 LR |
1680 | } |
1681 | ||
e8324357 S |
1682 | int ath_txq_update(struct ath_softc *sc, int qnum, |
1683 | struct ath9k_tx_queue_info *qinfo) | |
1684 | { | |
cbe61d8a | 1685 | struct ath_hw *ah = sc->sc_ah; |
e8324357 S |
1686 | int error = 0; |
1687 | struct ath9k_tx_queue_info qi; | |
1688 | ||
9680e8a3 | 1689 | BUG_ON(sc->tx.txq[qnum].axq_qnum != qnum); |
e8324357 S |
1690 | |
1691 | ath9k_hw_get_txq_props(ah, qnum, &qi); | |
1692 | qi.tqi_aifs = qinfo->tqi_aifs; | |
1693 | qi.tqi_cwmin = qinfo->tqi_cwmin; | |
1694 | qi.tqi_cwmax = qinfo->tqi_cwmax; | |
1695 | qi.tqi_burstTime = qinfo->tqi_burstTime; | |
1696 | qi.tqi_readyTime = qinfo->tqi_readyTime; | |
1697 | ||
1698 | if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) { | |
3800276a JP |
1699 | ath_err(ath9k_hw_common(sc->sc_ah), |
1700 | "Unable to update hardware queue %u!\n", qnum); | |
e8324357 S |
1701 | error = -EIO; |
1702 | } else { | |
1703 | ath9k_hw_resettxqueue(ah, qnum); | |
1704 | } | |
1705 | ||
1706 | return error; | |
1707 | } | |
1708 | ||
1709 | int ath_cabq_update(struct ath_softc *sc) | |
1710 | { | |
1711 | struct ath9k_tx_queue_info qi; | |
ca900ac9 | 1712 | struct ath_beacon_config *cur_conf = &sc->cur_chan->beacon; |
e8324357 | 1713 | int qnum = sc->beacon.cabq->axq_qnum; |
f078f209 | 1714 | |
e8324357 | 1715 | ath9k_hw_get_txq_props(sc->sc_ah, qnum, &qi); |
f078f209 | 1716 | |
3b3e0efb | 1717 | qi.tqi_readyTime = (TU_TO_USEC(cur_conf->beacon_interval) * |
7f329bbb | 1718 | ATH_CABQ_READY_TIME) / 100; |
e8324357 S |
1719 | ath_txq_update(sc, qnum, &qi); |
1720 | ||
1721 | return 0; | |
f078f209 LR |
1722 | } |
1723 | ||
fce041be | 1724 | static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq, |
1381559b | 1725 | struct list_head *list) |
f078f209 | 1726 | { |
e8324357 S |
1727 | struct ath_buf *bf, *lastbf; |
1728 | struct list_head bf_head; | |
db1a052b FF |
1729 | struct ath_tx_status ts; |
1730 | ||
1731 | memset(&ts, 0, sizeof(ts)); | |
daa5c408 | 1732 | ts.ts_status = ATH9K_TX_FLUSH; |
e8324357 | 1733 | INIT_LIST_HEAD(&bf_head); |
f078f209 | 1734 | |
fce041be FF |
1735 | while (!list_empty(list)) { |
1736 | bf = list_first_entry(list, struct ath_buf, list); | |
f078f209 | 1737 | |
50676b81 | 1738 | if (bf->bf_state.stale) { |
fce041be | 1739 | list_del(&bf->list); |
f078f209 | 1740 | |
fce041be FF |
1741 | ath_tx_return_buffer(sc, bf); |
1742 | continue; | |
e8324357 | 1743 | } |
f078f209 | 1744 | |
e8324357 | 1745 | lastbf = bf->bf_lastbf; |
fce041be | 1746 | list_cut_position(&bf_head, list, &lastbf->list); |
81b51950 | 1747 | ath_tx_process_buffer(sc, txq, &ts, bf, &bf_head); |
f078f209 | 1748 | } |
fce041be | 1749 | } |
f078f209 | 1750 | |
fce041be FF |
1751 | /* |
1752 | * Drain a given TX queue (could be Beacon or Data) | |
1753 | * | |
1754 | * This assumes output has been stopped and | |
1755 | * we do not need to block ath_tx_tasklet. | |
1756 | */ | |
1381559b | 1757 | void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq) |
fce041be | 1758 | { |
23de5dc9 FF |
1759 | ath_txq_lock(sc, txq); |
1760 | ||
e5003249 | 1761 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { |
fce041be | 1762 | int idx = txq->txq_tailidx; |
e5003249 | 1763 | |
fce041be | 1764 | while (!list_empty(&txq->txq_fifo[idx])) { |
1381559b | 1765 | ath_drain_txq_list(sc, txq, &txq->txq_fifo[idx]); |
fce041be FF |
1766 | |
1767 | INCR(idx, ATH_TXFIFO_DEPTH); | |
e5003249 | 1768 | } |
fce041be | 1769 | txq->txq_tailidx = idx; |
e5003249 | 1770 | } |
e609e2ea | 1771 | |
fce041be FF |
1772 | txq->axq_link = NULL; |
1773 | txq->axq_tx_inprogress = false; | |
1381559b | 1774 | ath_drain_txq_list(sc, txq, &txq->axq_q); |
fce041be | 1775 | |
23de5dc9 | 1776 | ath_txq_unlock_complete(sc, txq); |
f078f209 LR |
1777 | } |
1778 | ||
1381559b | 1779 | bool ath_drain_all_txq(struct ath_softc *sc) |
f078f209 | 1780 | { |
cbe61d8a | 1781 | struct ath_hw *ah = sc->sc_ah; |
c46917bb | 1782 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
043a0405 | 1783 | struct ath_txq *txq; |
34d25810 FF |
1784 | int i; |
1785 | u32 npend = 0; | |
043a0405 | 1786 | |
eefa01dd | 1787 | if (test_bit(ATH_OP_INVALID, &common->op_flags)) |
080e1a25 | 1788 | return true; |
043a0405 | 1789 | |
0d51cccc | 1790 | ath9k_hw_abort_tx_dma(ah); |
043a0405 | 1791 | |
0d51cccc | 1792 | /* Check if any queue remains active */ |
043a0405 | 1793 | for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { |
0d51cccc FF |
1794 | if (!ATH_TXQ_SETUP(sc, i)) |
1795 | continue; | |
1796 | ||
10ffb6a7 FF |
1797 | if (!sc->tx.txq[i].axq_depth) |
1798 | continue; | |
1799 | ||
34d25810 FF |
1800 | if (ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum)) |
1801 | npend |= BIT(i); | |
043a0405 S |
1802 | } |
1803 | ||
080e1a25 | 1804 | if (npend) |
34d25810 | 1805 | ath_err(common, "Failed to stop TX DMA, queues=0x%03x!\n", npend); |
043a0405 S |
1806 | |
1807 | for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { | |
92460412 FF |
1808 | if (!ATH_TXQ_SETUP(sc, i)) |
1809 | continue; | |
1810 | ||
1811 | /* | |
1812 | * The caller will resume queues with ieee80211_wake_queues. | |
1813 | * Mark the queue as not stopped to prevent ath_tx_complete | |
1814 | * from waking the queue too early. | |
1815 | */ | |
1816 | txq = &sc->tx.txq[i]; | |
1817 | txq->stopped = false; | |
1381559b | 1818 | ath_draintxq(sc, txq); |
043a0405 | 1819 | } |
080e1a25 FF |
1820 | |
1821 | return !npend; | |
e8324357 | 1822 | } |
f078f209 | 1823 | |
043a0405 | 1824 | void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq) |
e8324357 | 1825 | { |
043a0405 S |
1826 | ath9k_hw_releasetxqueue(sc->sc_ah, txq->axq_qnum); |
1827 | sc->tx.txqsetup &= ~(1<<txq->axq_qnum); | |
e8324357 | 1828 | } |
f078f209 | 1829 | |
0453531e | 1830 | /* For each acq entry, for each tid, try to schedule packets |
7755bad9 BG |
1831 | * for transmit until ampdu_depth has reached min Q depth. |
1832 | */ | |
e8324357 S |
1833 | void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq) |
1834 | { | |
eefa01dd | 1835 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
020f20f6 | 1836 | struct ath_atx_ac *ac, *last_ac; |
7755bad9 | 1837 | struct ath_atx_tid *tid, *last_tid; |
0453531e | 1838 | struct list_head *ac_list; |
020f20f6 | 1839 | bool sent = false; |
f078f209 | 1840 | |
0453531e FF |
1841 | if (txq->mac80211_qnum < 0) |
1842 | return; | |
1843 | ||
4d9f634b SM |
1844 | if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) |
1845 | return; | |
1846 | ||
bff11766 | 1847 | spin_lock_bh(&sc->chan_lock); |
0453531e FF |
1848 | ac_list = &sc->cur_chan->acq[txq->mac80211_qnum]; |
1849 | ||
4d9f634b SM |
1850 | if (list_empty(ac_list)) { |
1851 | spin_unlock_bh(&sc->chan_lock); | |
e8324357 | 1852 | return; |
4d9f634b | 1853 | } |
f078f209 | 1854 | |
23bc2021 FF |
1855 | rcu_read_lock(); |
1856 | ||
0453531e FF |
1857 | last_ac = list_entry(ac_list->prev, struct ath_atx_ac, list); |
1858 | while (!list_empty(ac_list)) { | |
020f20f6 | 1859 | bool stop = false; |
f078f209 | 1860 | |
bff11766 FF |
1861 | if (sc->cur_chan->stopped) |
1862 | break; | |
1863 | ||
0453531e | 1864 | ac = list_first_entry(ac_list, struct ath_atx_ac, list); |
7755bad9 BG |
1865 | last_tid = list_entry(ac->tid_q.prev, struct ath_atx_tid, list); |
1866 | list_del(&ac->list); | |
1867 | ac->sched = false; | |
f078f209 | 1868 | |
7755bad9 | 1869 | while (!list_empty(&ac->tid_q)) { |
020f20f6 | 1870 | |
7755bad9 BG |
1871 | tid = list_first_entry(&ac->tid_q, struct ath_atx_tid, |
1872 | list); | |
1873 | list_del(&tid->list); | |
1874 | tid->sched = false; | |
f078f209 | 1875 | |
020f20f6 FF |
1876 | if (ath_tx_sched_aggr(sc, txq, tid, &stop)) |
1877 | sent = true; | |
f078f209 | 1878 | |
7755bad9 BG |
1879 | /* |
1880 | * add tid to round-robin queue if more frames | |
1881 | * are pending for the tid | |
1882 | */ | |
a7586ee4 | 1883 | if (ath_tid_has_buffered(tid)) |
0453531e | 1884 | ath_tx_queue_tid(sc, txq, tid); |
f078f209 | 1885 | |
020f20f6 | 1886 | if (stop || tid == last_tid) |
7755bad9 BG |
1887 | break; |
1888 | } | |
f078f209 | 1889 | |
b0477013 FF |
1890 | if (!list_empty(&ac->tid_q) && !ac->sched) { |
1891 | ac->sched = true; | |
0453531e | 1892 | list_add_tail(&ac->list, ac_list); |
f078f209 | 1893 | } |
7755bad9 | 1894 | |
020f20f6 | 1895 | if (stop) |
23bc2021 | 1896 | break; |
020f20f6 FF |
1897 | |
1898 | if (ac == last_ac) { | |
1899 | if (!sent) | |
1900 | break; | |
1901 | ||
1902 | sent = false; | |
0453531e | 1903 | last_ac = list_entry(ac_list->prev, |
020f20f6 FF |
1904 | struct ath_atx_ac, list); |
1905 | } | |
e8324357 | 1906 | } |
23bc2021 FF |
1907 | |
1908 | rcu_read_unlock(); | |
bff11766 | 1909 | spin_unlock_bh(&sc->chan_lock); |
e8324357 | 1910 | } |
f078f209 | 1911 | |
0453531e FF |
1912 | void ath_txq_schedule_all(struct ath_softc *sc) |
1913 | { | |
1914 | struct ath_txq *txq; | |
1915 | int i; | |
1916 | ||
1917 | for (i = 0; i < IEEE80211_NUM_ACS; i++) { | |
1918 | txq = sc->tx.txq_map[i]; | |
1919 | ||
1920 | spin_lock_bh(&txq->axq_lock); | |
1921 | ath_txq_schedule(sc, txq); | |
1922 | spin_unlock_bh(&txq->axq_lock); | |
1923 | } | |
1924 | } | |
1925 | ||
e8324357 S |
1926 | /***********/ |
1927 | /* TX, DMA */ | |
1928 | /***********/ | |
1929 | ||
f078f209 | 1930 | /* |
e8324357 S |
1931 | * Insert a chain of ath_buf (descriptors) on a txq and |
1932 | * assume the descriptors are already chained together by caller. | |
f078f209 | 1933 | */ |
e8324357 | 1934 | static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq, |
fce041be | 1935 | struct list_head *head, bool internal) |
f078f209 | 1936 | { |
cbe61d8a | 1937 | struct ath_hw *ah = sc->sc_ah; |
c46917bb | 1938 | struct ath_common *common = ath9k_hw_common(ah); |
fce041be FF |
1939 | struct ath_buf *bf, *bf_last; |
1940 | bool puttxbuf = false; | |
1941 | bool edma; | |
f078f209 | 1942 | |
e8324357 S |
1943 | /* |
1944 | * Insert the frame on the outbound list and | |
1945 | * pass it on to the hardware. | |
1946 | */ | |
f078f209 | 1947 | |
e8324357 S |
1948 | if (list_empty(head)) |
1949 | return; | |
f078f209 | 1950 | |
fce041be | 1951 | edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); |
e8324357 | 1952 | bf = list_first_entry(head, struct ath_buf, list); |
fce041be | 1953 | bf_last = list_entry(head->prev, struct ath_buf, list); |
f078f209 | 1954 | |
d2182b69 JP |
1955 | ath_dbg(common, QUEUE, "qnum: %d, txq depth: %d\n", |
1956 | txq->axq_qnum, txq->axq_depth); | |
f078f209 | 1957 | |
fce041be FF |
1958 | if (edma && list_empty(&txq->txq_fifo[txq->txq_headidx])) { |
1959 | list_splice_tail_init(head, &txq->txq_fifo[txq->txq_headidx]); | |
e5003249 | 1960 | INCR(txq->txq_headidx, ATH_TXFIFO_DEPTH); |
fce041be | 1961 | puttxbuf = true; |
e8324357 | 1962 | } else { |
e5003249 VT |
1963 | list_splice_tail_init(head, &txq->axq_q); |
1964 | ||
fce041be FF |
1965 | if (txq->axq_link) { |
1966 | ath9k_hw_set_desc_link(ah, txq->axq_link, bf->bf_daddr); | |
d2182b69 | 1967 | ath_dbg(common, XMIT, "link[%u] (%p)=%llx (%p)\n", |
226afe68 JP |
1968 | txq->axq_qnum, txq->axq_link, |
1969 | ito64(bf->bf_daddr), bf->bf_desc); | |
fce041be FF |
1970 | } else if (!edma) |
1971 | puttxbuf = true; | |
1972 | ||
1973 | txq->axq_link = bf_last->bf_desc; | |
1974 | } | |
1975 | ||
1976 | if (puttxbuf) { | |
1977 | TX_STAT_INC(txq->axq_qnum, puttxbuf); | |
1978 | ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr); | |
d2182b69 | 1979 | ath_dbg(common, XMIT, "TXDP[%u] = %llx (%p)\n", |
fce041be FF |
1980 | txq->axq_qnum, ito64(bf->bf_daddr), bf->bf_desc); |
1981 | } | |
1982 | ||
89f927af | 1983 | if (!edma || sc->tx99_state) { |
8d8d3fdc | 1984 | TX_STAT_INC(txq->axq_qnum, txstart); |
e5003249 | 1985 | ath9k_hw_txstart(ah, txq->axq_qnum); |
e8324357 | 1986 | } |
fce041be FF |
1987 | |
1988 | if (!internal) { | |
f56e121d FF |
1989 | while (bf) { |
1990 | txq->axq_depth++; | |
1991 | if (bf_is_ampdu_not_probing(bf)) | |
1992 | txq->axq_ampdu_depth++; | |
1993 | ||
440c1c87 FF |
1994 | bf_last = bf->bf_lastbf; |
1995 | bf = bf_last->bf_next; | |
1996 | bf_last->bf_next = NULL; | |
f56e121d | 1997 | } |
fce041be | 1998 | } |
e8324357 | 1999 | } |
f078f209 | 2000 | |
82b873af | 2001 | static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq, |
44f1d26c | 2002 | struct ath_atx_tid *tid, struct sk_buff *skb) |
e8324357 | 2003 | { |
f69727fd | 2004 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
44f1d26c FF |
2005 | struct ath_frame_info *fi = get_frame_info(skb); |
2006 | struct list_head bf_head; | |
f69727fd | 2007 | struct ath_buf *bf = fi->bf; |
44f1d26c FF |
2008 | |
2009 | INIT_LIST_HEAD(&bf_head); | |
2010 | list_add_tail(&bf->list, &bf_head); | |
399c6489 | 2011 | bf->bf_state.bf_type = 0; |
f69727fd FF |
2012 | if (tid && (tx_info->flags & IEEE80211_TX_CTL_AMPDU)) { |
2013 | bf->bf_state.bf_type = BUF_AMPDU; | |
2014 | ath_tx_addto_baw(sc, tid, bf); | |
2015 | } | |
e8324357 | 2016 | |
8c6e3093 | 2017 | bf->bf_next = NULL; |
d43f3015 | 2018 | bf->bf_lastbf = bf; |
493cf04f | 2019 | ath_tx_fill_desc(sc, bf, txq, fi->framelen); |
44f1d26c | 2020 | ath_tx_txqaddbuf(sc, txq, &bf_head, false); |
fec247c0 | 2021 | TX_STAT_INC(txq->axq_qnum, queued); |
e8324357 S |
2022 | } |
2023 | ||
36323f81 TH |
2024 | static void setup_frame_info(struct ieee80211_hw *hw, |
2025 | struct ieee80211_sta *sta, | |
2026 | struct sk_buff *skb, | |
2d42efc4 | 2027 | int framelen) |
e8324357 S |
2028 | { |
2029 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | |
2d42efc4 | 2030 | struct ieee80211_key_conf *hw_key = tx_info->control.hw_key; |
6a0ddaef | 2031 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
80b08a8d | 2032 | const struct ieee80211_rate *rate; |
2d42efc4 | 2033 | struct ath_frame_info *fi = get_frame_info(skb); |
93ae2dd2 | 2034 | struct ath_node *an = NULL; |
2d42efc4 | 2035 | enum ath9k_key_type keytype; |
80b08a8d FF |
2036 | bool short_preamble = false; |
2037 | ||
2038 | /* | |
2039 | * We check if Short Preamble is needed for the CTS rate by | |
2040 | * checking the BSS's global flag. | |
2041 | * But for the rate series, IEEE80211_TX_RC_USE_SHORT_PREAMBLE is used. | |
2042 | */ | |
2043 | if (tx_info->control.vif && | |
2044 | tx_info->control.vif->bss_conf.use_short_preamble) | |
2045 | short_preamble = true; | |
e8324357 | 2046 | |
80b08a8d | 2047 | rate = ieee80211_get_rts_cts_rate(hw, tx_info); |
2d42efc4 | 2048 | keytype = ath9k_cmn_get_hw_crypto_keytype(skb); |
e8324357 | 2049 | |
93ae2dd2 FF |
2050 | if (sta) |
2051 | an = (struct ath_node *) sta->drv_priv; | |
2052 | ||
2d42efc4 | 2053 | memset(fi, 0, sizeof(*fi)); |
d954cd77 | 2054 | fi->txq = -1; |
2d42efc4 FF |
2055 | if (hw_key) |
2056 | fi->keyix = hw_key->hw_key_idx; | |
93ae2dd2 FF |
2057 | else if (an && ieee80211_is_data(hdr->frame_control) && an->ps_key > 0) |
2058 | fi->keyix = an->ps_key; | |
2d42efc4 FF |
2059 | else |
2060 | fi->keyix = ATH9K_TXKEYIX_INVALID; | |
2061 | fi->keytype = keytype; | |
2062 | fi->framelen = framelen; | |
09b029b6 LR |
2063 | |
2064 | if (!rate) | |
2065 | return; | |
80b08a8d FF |
2066 | fi->rtscts_rate = rate->hw_value; |
2067 | if (short_preamble) | |
2068 | fi->rtscts_rate |= rate->hw_value_short; | |
e8324357 S |
2069 | } |
2070 | ||
ea066d5a MSS |
2071 | u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate) |
2072 | { | |
2073 | struct ath_hw *ah = sc->sc_ah; | |
2074 | struct ath9k_channel *curchan = ah->curchan; | |
365d2ebc | 2075 | |
8896934c | 2076 | if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && IS_CHAN_5GHZ(curchan) && |
d77bf3eb | 2077 | (chainmask == 0x7) && (rate < 0x90)) |
ea066d5a | 2078 | return 0x3; |
365d2ebc SM |
2079 | else if (AR_SREV_9462(ah) && ath9k_hw_btcoex_is_enabled(ah) && |
2080 | IS_CCK_RATE(rate)) | |
2081 | return 0x2; | |
ea066d5a MSS |
2082 | else |
2083 | return chainmask; | |
2084 | } | |
2085 | ||
44f1d26c FF |
2086 | /* |
2087 | * Assign a descriptor (and sequence number if necessary, | |
2088 | * and map buffer for DMA. Frees skb on error | |
2089 | */ | |
fa05f87a | 2090 | static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc, |
04caf863 | 2091 | struct ath_txq *txq, |
fa05f87a | 2092 | struct ath_atx_tid *tid, |
249ee722 | 2093 | struct sk_buff *skb) |
f078f209 | 2094 | { |
82b873af | 2095 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
2d42efc4 | 2096 | struct ath_frame_info *fi = get_frame_info(skb); |
fa05f87a | 2097 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
82b873af | 2098 | struct ath_buf *bf; |
fd09c85f | 2099 | int fragno; |
fa05f87a | 2100 | u16 seqno; |
82b873af FF |
2101 | |
2102 | bf = ath_tx_get_buffer(sc); | |
2103 | if (!bf) { | |
d2182b69 | 2104 | ath_dbg(common, XMIT, "TX buffers are full\n"); |
249ee722 | 2105 | return NULL; |
82b873af | 2106 | } |
e022edbd | 2107 | |
528f0c6b | 2108 | ATH_TXBUF_RESET(bf); |
f078f209 | 2109 | |
5998be87 | 2110 | if (tid && ieee80211_is_data_present(hdr->frame_control)) { |
fd09c85f | 2111 | fragno = le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG; |
fa05f87a FF |
2112 | seqno = tid->seq_next; |
2113 | hdr->seq_ctrl = cpu_to_le16(tid->seq_next << IEEE80211_SEQ_SEQ_SHIFT); | |
fd09c85f SM |
2114 | |
2115 | if (fragno) | |
2116 | hdr->seq_ctrl |= cpu_to_le16(fragno); | |
2117 | ||
2118 | if (!ieee80211_has_morefrags(hdr->frame_control)) | |
2119 | INCR(tid->seq_next, IEEE80211_SEQ_MAX); | |
2120 | ||
fa05f87a FF |
2121 | bf->bf_state.seqno = seqno; |
2122 | } | |
2123 | ||
f078f209 | 2124 | bf->bf_mpdu = skb; |
f8316df1 | 2125 | |
c1739eb3 BG |
2126 | bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, |
2127 | skb->len, DMA_TO_DEVICE); | |
2128 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { | |
f8316df1 | 2129 | bf->bf_mpdu = NULL; |
6cf9e995 | 2130 | bf->bf_buf_addr = 0; |
3800276a JP |
2131 | ath_err(ath9k_hw_common(sc->sc_ah), |
2132 | "dma_mapping_error() on TX\n"); | |
82b873af | 2133 | ath_tx_return_buffer(sc, bf); |
249ee722 | 2134 | return NULL; |
f8316df1 LR |
2135 | } |
2136 | ||
56dc6336 | 2137 | fi->bf = bf; |
04caf863 FF |
2138 | |
2139 | return bf; | |
2140 | } | |
2141 | ||
ca14405e SM |
2142 | void ath_assign_seq(struct ath_common *common, struct sk_buff *skb) |
2143 | { | |
2144 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; | |
2145 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | |
2146 | struct ieee80211_vif *vif = info->control.vif; | |
2147 | struct ath_vif *avp; | |
2148 | ||
2149 | if (!(info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)) | |
2150 | return; | |
2151 | ||
2152 | if (!vif) | |
2153 | return; | |
2154 | ||
2155 | avp = (struct ath_vif *)vif->drv_priv; | |
2156 | ||
2157 | if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) | |
2158 | avp->seq_no += 0x10; | |
2159 | ||
2160 | hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); | |
2161 | hdr->seq_ctrl |= cpu_to_le16(avp->seq_no); | |
2162 | } | |
2163 | ||
59505c02 FF |
2164 | static int ath_tx_prepare(struct ieee80211_hw *hw, struct sk_buff *skb, |
2165 | struct ath_tx_control *txctl) | |
f078f209 | 2166 | { |
28d16708 FF |
2167 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; |
2168 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | |
36323f81 | 2169 | struct ieee80211_sta *sta = txctl->sta; |
f59a59fe | 2170 | struct ieee80211_vif *vif = info->control.vif; |
f89d1bc4 | 2171 | struct ath_vif *avp; |
9ac58615 | 2172 | struct ath_softc *sc = hw->priv; |
04caf863 | 2173 | int frmlen = skb->len + FCS_LEN; |
59505c02 | 2174 | int padpos, padsize; |
f078f209 | 2175 | |
a9927ba3 BG |
2176 | /* NOTE: sta can be NULL according to net/mac80211.h */ |
2177 | if (sta) | |
2178 | txctl->an = (struct ath_node *)sta->drv_priv; | |
f89d1bc4 FF |
2179 | else if (vif && ieee80211_is_data(hdr->frame_control)) { |
2180 | avp = (void *)vif->drv_priv; | |
2181 | txctl->an = &avp->mcast_node; | |
2182 | } | |
a9927ba3 | 2183 | |
04caf863 FF |
2184 | if (info->control.hw_key) |
2185 | frmlen += info->control.hw_key->icv_len; | |
2186 | ||
ca14405e | 2187 | ath_assign_seq(ath9k_hw_common(sc->sc_ah), skb); |
f078f209 | 2188 | |
59505c02 FF |
2189 | if ((vif && vif->type != NL80211_IFTYPE_AP && |
2190 | vif->type != NL80211_IFTYPE_AP_VLAN) || | |
2191 | !ieee80211_is_data(hdr->frame_control)) | |
2192 | info->flags |= IEEE80211_TX_CTL_CLEAR_PS_FILT; | |
2193 | ||
42cecc34 | 2194 | /* Add the padding after the header if this is not already done */ |
c60c9929 | 2195 | padpos = ieee80211_hdrlen(hdr->frame_control); |
42cecc34 JL |
2196 | padsize = padpos & 3; |
2197 | if (padsize && skb->len > padpos) { | |
2198 | if (skb_headroom(skb) < padsize) | |
2199 | return -ENOMEM; | |
28d16708 | 2200 | |
42cecc34 JL |
2201 | skb_push(skb, padsize); |
2202 | memmove(skb->data, skb->data + padsize, padpos); | |
f078f209 | 2203 | } |
f078f209 | 2204 | |
36323f81 | 2205 | setup_frame_info(hw, sta, skb, frmlen); |
59505c02 FF |
2206 | return 0; |
2207 | } | |
2208 | ||
2d42efc4 | 2209 | |
59505c02 FF |
2210 | /* Upon failure caller should free skb */ |
2211 | int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, | |
2212 | struct ath_tx_control *txctl) | |
2213 | { | |
2214 | struct ieee80211_hdr *hdr; | |
2215 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | |
2216 | struct ieee80211_sta *sta = txctl->sta; | |
2217 | struct ieee80211_vif *vif = info->control.vif; | |
d954cd77 | 2218 | struct ath_frame_info *fi = get_frame_info(skb); |
befcf7e7 | 2219 | struct ath_vif *avp = NULL; |
59505c02 FF |
2220 | struct ath_softc *sc = hw->priv; |
2221 | struct ath_txq *txq = txctl->txq; | |
2222 | struct ath_atx_tid *tid = NULL; | |
2223 | struct ath_buf *bf; | |
8d9e464a | 2224 | bool queue, skip_uapsd = false; |
d7017461 | 2225 | int q, ret; |
59505c02 | 2226 | |
befcf7e7 FF |
2227 | if (vif) |
2228 | avp = (void *)vif->drv_priv; | |
2229 | ||
405393cf FF |
2230 | if (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN) |
2231 | txctl->force_channel = true; | |
2232 | ||
59505c02 FF |
2233 | ret = ath_tx_prepare(hw, skb, txctl); |
2234 | if (ret) | |
2235 | return ret; | |
2236 | ||
2237 | hdr = (struct ieee80211_hdr *) skb->data; | |
2d42efc4 FF |
2238 | /* |
2239 | * At this point, the vif, hw_key and sta pointers in the tx control | |
2240 | * info are no longer valid (overwritten by the ath_frame_info data. | |
2241 | */ | |
2242 | ||
28d16708 | 2243 | q = skb_get_queue_mapping(skb); |
23de5dc9 FF |
2244 | |
2245 | ath_txq_lock(sc, txq); | |
d954cd77 FF |
2246 | if (txq == sc->tx.txq_map[q]) { |
2247 | fi->txq = q; | |
2248 | if (++txq->pending_frames > sc->tx.txq_max_pending[q] && | |
2249 | !txq->stopped) { | |
d7017461 | 2250 | ieee80211_stop_queue(sc->hw, info->hw_queue); |
d954cd77 FF |
2251 | txq->stopped = true; |
2252 | } | |
f078f209 | 2253 | } |
f078f209 | 2254 | |
befcf7e7 FF |
2255 | queue = ieee80211_is_data_present(hdr->frame_control); |
2256 | ||
2257 | /* Force queueing of all frames that belong to a virtual interface on | |
2258 | * a different channel context, to ensure that they are sent on the | |
2259 | * correct channel. | |
2260 | */ | |
2261 | if (((avp && avp->chanctx != sc->cur_chan) || | |
2262 | sc->cur_chan->stopped) && !txctl->force_channel) { | |
2263 | if (!txctl->an) | |
2264 | txctl->an = &avp->mcast_node; | |
befcf7e7 | 2265 | queue = true; |
8d9e464a | 2266 | skip_uapsd = true; |
befcf7e7 FF |
2267 | } |
2268 | ||
2269 | if (txctl->an && queue) | |
558ff225 FF |
2270 | tid = ath_get_skb_tid(sc, txctl->an, skb); |
2271 | ||
8d9e464a | 2272 | if (!skip_uapsd && (info->flags & IEEE80211_TX_CTL_PS_RESPONSE)) { |
f2c7a793 FF |
2273 | ath_txq_unlock(sc, txq); |
2274 | txq = sc->tx.uapsdq; | |
2275 | ath_txq_lock(sc, txq); | |
befcf7e7 | 2276 | } else if (txctl->an && queue) { |
bdc21457 | 2277 | WARN_ON(tid->ac->txq != txctl->txq); |
bdc21457 | 2278 | |
2800e82b FF |
2279 | if (info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT) |
2280 | tid->ac->clear_ps_filter = true; | |
2281 | ||
bdc21457 | 2282 | /* |
2800e82b FF |
2283 | * Add this frame to software queue for scheduling later |
2284 | * for aggregation. | |
bdc21457 | 2285 | */ |
2800e82b FF |
2286 | TX_STAT_INC(txq->axq_qnum, a_queued_sw); |
2287 | __skb_queue_tail(&tid->buf_q, skb); | |
2288 | if (!txctl->an->sleeping) | |
0453531e | 2289 | ath_tx_queue_tid(sc, txq, tid); |
2800e82b FF |
2290 | |
2291 | ath_txq_schedule(sc, txq); | |
bdc21457 FF |
2292 | goto out; |
2293 | } | |
2294 | ||
f2c7a793 | 2295 | bf = ath_tx_setup_buffer(sc, txq, tid, skb); |
bdc21457 | 2296 | if (!bf) { |
a4943ccb | 2297 | ath_txq_skb_done(sc, txq, skb); |
bdc21457 FF |
2298 | if (txctl->paprd) |
2299 | dev_kfree_skb_any(skb); | |
2300 | else | |
2301 | ieee80211_free_txskb(sc->hw, skb); | |
2302 | goto out; | |
2303 | } | |
2304 | ||
2305 | bf->bf_state.bfs_paprd = txctl->paprd; | |
2306 | ||
2307 | if (txctl->paprd) | |
2308 | bf->bf_state.bfs_paprd_timestamp = jiffies; | |
2309 | ||
79acac07 | 2310 | ath_set_rates(vif, sta, bf); |
f2c7a793 | 2311 | ath_tx_send_normal(sc, txq, tid, skb); |
3ad29529 | 2312 | |
bdc21457 | 2313 | out: |
23de5dc9 | 2314 | ath_txq_unlock(sc, txq); |
3ad29529 | 2315 | |
44f1d26c | 2316 | return 0; |
f078f209 LR |
2317 | } |
2318 | ||
59505c02 FF |
2319 | void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
2320 | struct sk_buff *skb) | |
2321 | { | |
2322 | struct ath_softc *sc = hw->priv; | |
2323 | struct ath_tx_control txctl = { | |
2324 | .txq = sc->beacon.cabq | |
2325 | }; | |
2326 | struct ath_tx_info info = {}; | |
2327 | struct ieee80211_hdr *hdr; | |
2328 | struct ath_buf *bf_tail = NULL; | |
2329 | struct ath_buf *bf; | |
2330 | LIST_HEAD(bf_q); | |
2331 | int duration = 0; | |
2332 | int max_duration; | |
2333 | ||
2334 | max_duration = | |
ca900ac9 RM |
2335 | sc->cur_chan->beacon.beacon_interval * 1000 * |
2336 | sc->cur_chan->beacon.dtim_period / ATH_BCBUF; | |
59505c02 FF |
2337 | |
2338 | do { | |
2339 | struct ath_frame_info *fi = get_frame_info(skb); | |
2340 | ||
2341 | if (ath_tx_prepare(hw, skb, &txctl)) | |
2342 | break; | |
2343 | ||
2344 | bf = ath_tx_setup_buffer(sc, txctl.txq, NULL, skb); | |
2345 | if (!bf) | |
2346 | break; | |
2347 | ||
2348 | bf->bf_lastbf = bf; | |
2349 | ath_set_rates(vif, NULL, bf); | |
a3835e9f | 2350 | ath_buf_set_rate(sc, bf, &info, fi->framelen, false); |
59505c02 FF |
2351 | duration += info.rates[0].PktDuration; |
2352 | if (bf_tail) | |
2353 | bf_tail->bf_next = bf; | |
2354 | ||
2355 | list_add_tail(&bf->list, &bf_q); | |
2356 | bf_tail = bf; | |
2357 | skb = NULL; | |
2358 | ||
2359 | if (duration > max_duration) | |
2360 | break; | |
2361 | ||
2362 | skb = ieee80211_get_buffered_bc(hw, vif); | |
2363 | } while(skb); | |
2364 | ||
2365 | if (skb) | |
2366 | ieee80211_free_txskb(hw, skb); | |
2367 | ||
2368 | if (list_empty(&bf_q)) | |
2369 | return; | |
2370 | ||
2371 | bf = list_first_entry(&bf_q, struct ath_buf, list); | |
2372 | hdr = (struct ieee80211_hdr *) bf->bf_mpdu->data; | |
2373 | ||
2374 | if (hdr->frame_control & IEEE80211_FCTL_MOREDATA) { | |
2375 | hdr->frame_control &= ~IEEE80211_FCTL_MOREDATA; | |
2376 | dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, | |
2377 | sizeof(*hdr), DMA_TO_DEVICE); | |
2378 | } | |
2379 | ||
2380 | ath_txq_lock(sc, txctl.txq); | |
2381 | ath_tx_fill_desc(sc, bf, txctl.txq, 0); | |
2382 | ath_tx_txqaddbuf(sc, txctl.txq, &bf_q, false); | |
2383 | TX_STAT_INC(txctl.txq->axq_qnum, queued); | |
2384 | ath_txq_unlock(sc, txctl.txq); | |
2385 | } | |
2386 | ||
e8324357 S |
2387 | /*****************/ |
2388 | /* TX Completion */ | |
2389 | /*****************/ | |
528f0c6b | 2390 | |
e8324357 | 2391 | static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb, |
0f9dc298 | 2392 | int tx_flags, struct ath_txq *txq) |
528f0c6b | 2393 | { |
e8324357 | 2394 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
c46917bb | 2395 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
4d91f9f3 | 2396 | struct ieee80211_hdr * hdr = (struct ieee80211_hdr *)skb->data; |
a4943ccb | 2397 | int padpos, padsize; |
07c15a3f | 2398 | unsigned long flags; |
528f0c6b | 2399 | |
d2182b69 | 2400 | ath_dbg(common, XMIT, "TX complete: skb: %p\n", skb); |
528f0c6b | 2401 | |
51dea9be | 2402 | if (sc->sc_ah->caldata) |
4b9b42bf | 2403 | set_bit(PAPRD_PACKET_SENT, &sc->sc_ah->caldata->cal_flags); |
51dea9be | 2404 | |
55797b1a | 2405 | if (!(tx_flags & ATH_TX_ERROR)) |
e8324357 S |
2406 | /* Frame was ACKed */ |
2407 | tx_info->flags |= IEEE80211_TX_STAT_ACK; | |
528f0c6b | 2408 | |
c60c9929 | 2409 | padpos = ieee80211_hdrlen(hdr->frame_control); |
42cecc34 JL |
2410 | padsize = padpos & 3; |
2411 | if (padsize && skb->len>padpos+padsize) { | |
2412 | /* | |
2413 | * Remove MAC header padding before giving the frame back to | |
2414 | * mac80211. | |
2415 | */ | |
2416 | memmove(skb->data + padsize, skb->data, padpos); | |
2417 | skb_pull(skb, padsize); | |
e8324357 | 2418 | } |
528f0c6b | 2419 | |
07c15a3f | 2420 | spin_lock_irqsave(&sc->sc_pm_lock, flags); |
c8e8868e | 2421 | if ((sc->ps_flags & PS_WAIT_FOR_TX_ACK) && !txq->axq_depth) { |
1b04b930 | 2422 | sc->ps_flags &= ~PS_WAIT_FOR_TX_ACK; |
d2182b69 | 2423 | ath_dbg(common, PS, |
226afe68 | 2424 | "Going back to sleep after having received TX status (0x%lx)\n", |
1b04b930 S |
2425 | sc->ps_flags & (PS_WAIT_FOR_BEACON | |
2426 | PS_WAIT_FOR_CAB | | |
2427 | PS_WAIT_FOR_PSPOLL_DATA | | |
2428 | PS_WAIT_FOR_TX_ACK)); | |
9a23f9ca | 2429 | } |
07c15a3f | 2430 | spin_unlock_irqrestore(&sc->sc_pm_lock, flags); |
9a23f9ca | 2431 | |
f2c7a793 | 2432 | __skb_queue_tail(&txq->complete_q, skb); |
a4943ccb | 2433 | ath_txq_skb_done(sc, txq, skb); |
e8324357 | 2434 | } |
f078f209 | 2435 | |
e8324357 | 2436 | static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf, |
db1a052b | 2437 | struct ath_txq *txq, struct list_head *bf_q, |
156369fa | 2438 | struct ath_tx_status *ts, int txok) |
f078f209 | 2439 | { |
e8324357 | 2440 | struct sk_buff *skb = bf->bf_mpdu; |
3afd21e7 | 2441 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
e8324357 | 2442 | unsigned long flags; |
6b2c4032 | 2443 | int tx_flags = 0; |
f078f209 | 2444 | |
55797b1a | 2445 | if (!txok) |
6b2c4032 | 2446 | tx_flags |= ATH_TX_ERROR; |
f078f209 | 2447 | |
3afd21e7 FF |
2448 | if (ts->ts_status & ATH9K_TXERR_FILT) |
2449 | tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED; | |
2450 | ||
c1739eb3 | 2451 | dma_unmap_single(sc->dev, bf->bf_buf_addr, skb->len, DMA_TO_DEVICE); |
6cf9e995 | 2452 | bf->bf_buf_addr = 0; |
89f927af LR |
2453 | if (sc->tx99_state) |
2454 | goto skip_tx_complete; | |
9f42c2b6 FF |
2455 | |
2456 | if (bf->bf_state.bfs_paprd) { | |
9cf04dcc MSS |
2457 | if (time_after(jiffies, |
2458 | bf->bf_state.bfs_paprd_timestamp + | |
2459 | msecs_to_jiffies(ATH_PAPRD_TIMEOUT))) | |
ca369eb4 | 2460 | dev_kfree_skb_any(skb); |
78a18172 | 2461 | else |
ca369eb4 | 2462 | complete(&sc->paprd_complete); |
9f42c2b6 | 2463 | } else { |
55797b1a | 2464 | ath_debug_stat_tx(sc, bf, ts, txq, tx_flags); |
0f9dc298 | 2465 | ath_tx_complete(sc, skb, tx_flags, txq); |
9f42c2b6 | 2466 | } |
89f927af | 2467 | skip_tx_complete: |
6cf9e995 BG |
2468 | /* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't |
2469 | * accidentally reference it later. | |
2470 | */ | |
2471 | bf->bf_mpdu = NULL; | |
e8324357 S |
2472 | |
2473 | /* | |
2474 | * Return the list of ath_buf of this mpdu to free queue | |
2475 | */ | |
2476 | spin_lock_irqsave(&sc->tx.txbuflock, flags); | |
2477 | list_splice_tail_init(bf_q, &sc->tx.txbuf); | |
2478 | spin_unlock_irqrestore(&sc->tx.txbuflock, flags); | |
f078f209 LR |
2479 | } |
2480 | ||
0cdd5c60 FF |
2481 | static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf, |
2482 | struct ath_tx_status *ts, int nframes, int nbad, | |
3afd21e7 | 2483 | int txok) |
f078f209 | 2484 | { |
a22be22a | 2485 | struct sk_buff *skb = bf->bf_mpdu; |
254ad0ff | 2486 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
e8324357 | 2487 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
0cdd5c60 | 2488 | struct ieee80211_hw *hw = sc->hw; |
f0c255a0 | 2489 | struct ath_hw *ah = sc->sc_ah; |
8a92e2ee | 2490 | u8 i, tx_rateindex; |
f078f209 | 2491 | |
95e4acb7 | 2492 | if (txok) |
db1a052b | 2493 | tx_info->status.ack_signal = ts->ts_rssi; |
95e4acb7 | 2494 | |
db1a052b | 2495 | tx_rateindex = ts->ts_rateindex; |
8a92e2ee VT |
2496 | WARN_ON(tx_rateindex >= hw->max_rates); |
2497 | ||
3afd21e7 | 2498 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { |
d969847c | 2499 | tx_info->flags |= IEEE80211_TX_STAT_AMPDU; |
f078f209 | 2500 | |
b572d033 | 2501 | BUG_ON(nbad > nframes); |
ebd02287 | 2502 | } |
185d1589 RM |
2503 | tx_info->status.ampdu_len = nframes; |
2504 | tx_info->status.ampdu_ack_len = nframes - nbad; | |
ebd02287 | 2505 | |
db1a052b | 2506 | if ((ts->ts_status & ATH9K_TXERR_FILT) == 0 && |
3afd21e7 | 2507 | (tx_info->flags & IEEE80211_TX_CTL_NO_ACK) == 0) { |
f0c255a0 FF |
2508 | /* |
2509 | * If an underrun error is seen assume it as an excessive | |
2510 | * retry only if max frame trigger level has been reached | |
2511 | * (2 KB for single stream, and 4 KB for dual stream). | |
2512 | * Adjust the long retry as if the frame was tried | |
2513 | * hw->max_rate_tries times to affect how rate control updates | |
2514 | * PER for the failed rate. | |
2515 | * In case of congestion on the bus penalizing this type of | |
2516 | * underruns should help hardware actually transmit new frames | |
2517 | * successfully by eventually preferring slower rates. | |
2518 | * This itself should also alleviate congestion on the bus. | |
2519 | */ | |
3afd21e7 FF |
2520 | if (unlikely(ts->ts_flags & (ATH9K_TX_DATA_UNDERRUN | |
2521 | ATH9K_TX_DELIM_UNDERRUN)) && | |
2522 | ieee80211_is_data(hdr->frame_control) && | |
83860c59 | 2523 | ah->tx_trig_level >= sc->sc_ah->config.max_txtrig_level) |
f0c255a0 FF |
2524 | tx_info->status.rates[tx_rateindex].count = |
2525 | hw->max_rate_tries; | |
f078f209 | 2526 | } |
8a92e2ee | 2527 | |
545750d3 | 2528 | for (i = tx_rateindex + 1; i < hw->max_rates; i++) { |
8a92e2ee | 2529 | tx_info->status.rates[i].count = 0; |
545750d3 FF |
2530 | tx_info->status.rates[i].idx = -1; |
2531 | } | |
8a92e2ee | 2532 | |
78c4653a | 2533 | tx_info->status.rates[tx_rateindex].count = ts->ts_longretry + 1; |
f078f209 LR |
2534 | } |
2535 | ||
e8324357 | 2536 | static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) |
f078f209 | 2537 | { |
cbe61d8a | 2538 | struct ath_hw *ah = sc->sc_ah; |
c46917bb | 2539 | struct ath_common *common = ath9k_hw_common(ah); |
e8324357 | 2540 | struct ath_buf *bf, *lastbf, *bf_held = NULL; |
f078f209 | 2541 | struct list_head bf_head; |
e8324357 | 2542 | struct ath_desc *ds; |
29bffa96 | 2543 | struct ath_tx_status ts; |
e8324357 | 2544 | int status; |
f078f209 | 2545 | |
d2182b69 | 2546 | ath_dbg(common, QUEUE, "tx queue %d (%x), link %p\n", |
226afe68 JP |
2547 | txq->axq_qnum, ath9k_hw_gettxbuf(sc->sc_ah, txq->axq_qnum), |
2548 | txq->axq_link); | |
f078f209 | 2549 | |
23de5dc9 | 2550 | ath_txq_lock(sc, txq); |
f078f209 | 2551 | for (;;) { |
eefa01dd | 2552 | if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) |
236de514 FF |
2553 | break; |
2554 | ||
f078f209 LR |
2555 | if (list_empty(&txq->axq_q)) { |
2556 | txq->axq_link = NULL; | |
73364b0c | 2557 | ath_txq_schedule(sc, txq); |
f078f209 LR |
2558 | break; |
2559 | } | |
f078f209 LR |
2560 | bf = list_first_entry(&txq->axq_q, struct ath_buf, list); |
2561 | ||
e8324357 S |
2562 | /* |
2563 | * There is a race condition that a BH gets scheduled | |
2564 | * after sw writes TxE and before hw re-load the last | |
2565 | * descriptor to get the newly chained one. | |
2566 | * Software must keep the last DONE descriptor as a | |
2567 | * holding descriptor - software does so by marking | |
2568 | * it with the STALE flag. | |
2569 | */ | |
2570 | bf_held = NULL; | |
50676b81 | 2571 | if (bf->bf_state.stale) { |
e8324357 | 2572 | bf_held = bf; |
fce041be | 2573 | if (list_is_last(&bf_held->list, &txq->axq_q)) |
e8324357 | 2574 | break; |
fce041be FF |
2575 | |
2576 | bf = list_entry(bf_held->list.next, struct ath_buf, | |
2577 | list); | |
f078f209 LR |
2578 | } |
2579 | ||
2580 | lastbf = bf->bf_lastbf; | |
e8324357 | 2581 | ds = lastbf->bf_desc; |
f078f209 | 2582 | |
29bffa96 FF |
2583 | memset(&ts, 0, sizeof(ts)); |
2584 | status = ath9k_hw_txprocdesc(ah, ds, &ts); | |
fce041be | 2585 | if (status == -EINPROGRESS) |
e8324357 | 2586 | break; |
fce041be | 2587 | |
2dac4fb9 | 2588 | TX_STAT_INC(txq->axq_qnum, txprocdesc); |
f078f209 | 2589 | |
e8324357 S |
2590 | /* |
2591 | * Remove ath_buf's of the same transmit unit from txq, | |
2592 | * however leave the last descriptor back as the holding | |
2593 | * descriptor for hw. | |
2594 | */ | |
50676b81 | 2595 | lastbf->bf_state.stale = true; |
e8324357 | 2596 | INIT_LIST_HEAD(&bf_head); |
e8324357 S |
2597 | if (!list_is_singular(&lastbf->list)) |
2598 | list_cut_position(&bf_head, | |
2599 | &txq->axq_q, lastbf->list.prev); | |
f078f209 | 2600 | |
fce041be | 2601 | if (bf_held) { |
0a8cea84 | 2602 | list_del(&bf_held->list); |
0a8cea84 | 2603 | ath_tx_return_buffer(sc, bf_held); |
e8324357 | 2604 | } |
f078f209 | 2605 | |
fce041be | 2606 | ath_tx_process_buffer(sc, txq, &ts, bf, &bf_head); |
8469cdef | 2607 | } |
23de5dc9 | 2608 | ath_txq_unlock_complete(sc, txq); |
8469cdef S |
2609 | } |
2610 | ||
e8324357 | 2611 | void ath_tx_tasklet(struct ath_softc *sc) |
f078f209 | 2612 | { |
239c795d FF |
2613 | struct ath_hw *ah = sc->sc_ah; |
2614 | u32 qcumask = ((1 << ATH9K_NUM_TX_QUEUES) - 1) & ah->intr_txqs; | |
e8324357 | 2615 | int i; |
f078f209 | 2616 | |
e8324357 S |
2617 | for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { |
2618 | if (ATH_TXQ_SETUP(sc, i) && (qcumask & (1 << i))) | |
2619 | ath_tx_processq(sc, &sc->tx.txq[i]); | |
f078f209 LR |
2620 | } |
2621 | } | |
2622 | ||
e5003249 VT |
2623 | void ath_tx_edma_tasklet(struct ath_softc *sc) |
2624 | { | |
fce041be | 2625 | struct ath_tx_status ts; |
e5003249 VT |
2626 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
2627 | struct ath_hw *ah = sc->sc_ah; | |
2628 | struct ath_txq *txq; | |
2629 | struct ath_buf *bf, *lastbf; | |
2630 | struct list_head bf_head; | |
99ba6a46 | 2631 | struct list_head *fifo_list; |
e5003249 | 2632 | int status; |
e5003249 VT |
2633 | |
2634 | for (;;) { | |
eefa01dd | 2635 | if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) |
236de514 FF |
2636 | break; |
2637 | ||
fce041be | 2638 | status = ath9k_hw_txprocdesc(ah, NULL, (void *)&ts); |
e5003249 VT |
2639 | if (status == -EINPROGRESS) |
2640 | break; | |
2641 | if (status == -EIO) { | |
d2182b69 | 2642 | ath_dbg(common, XMIT, "Error processing tx status\n"); |
e5003249 VT |
2643 | break; |
2644 | } | |
2645 | ||
4e0ad259 FF |
2646 | /* Process beacon completions separately */ |
2647 | if (ts.qid == sc->beacon.beaconq) { | |
2648 | sc->beacon.tx_processed = true; | |
2649 | sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK); | |
d074e8d5 | 2650 | |
27babf9f SM |
2651 | if (ath9k_is_chanctx_enabled()) { |
2652 | ath_chanctx_event(sc, NULL, | |
2653 | ATH_CHANCTX_EVENT_BEACON_SENT); | |
2654 | } | |
2655 | ||
4effc6fd | 2656 | ath9k_csa_update(sc); |
e5003249 | 2657 | continue; |
4e0ad259 | 2658 | } |
e5003249 | 2659 | |
fce041be | 2660 | txq = &sc->tx.txq[ts.qid]; |
e5003249 | 2661 | |
23de5dc9 | 2662 | ath_txq_lock(sc, txq); |
fce041be | 2663 | |
78ef731c SM |
2664 | TX_STAT_INC(txq->axq_qnum, txprocdesc); |
2665 | ||
99ba6a46 FF |
2666 | fifo_list = &txq->txq_fifo[txq->txq_tailidx]; |
2667 | if (list_empty(fifo_list)) { | |
23de5dc9 | 2668 | ath_txq_unlock(sc, txq); |
e5003249 VT |
2669 | return; |
2670 | } | |
2671 | ||
99ba6a46 | 2672 | bf = list_first_entry(fifo_list, struct ath_buf, list); |
50676b81 | 2673 | if (bf->bf_state.stale) { |
99ba6a46 FF |
2674 | list_del(&bf->list); |
2675 | ath_tx_return_buffer(sc, bf); | |
2676 | bf = list_first_entry(fifo_list, struct ath_buf, list); | |
2677 | } | |
2678 | ||
e5003249 VT |
2679 | lastbf = bf->bf_lastbf; |
2680 | ||
2681 | INIT_LIST_HEAD(&bf_head); | |
99ba6a46 FF |
2682 | if (list_is_last(&lastbf->list, fifo_list)) { |
2683 | list_splice_tail_init(fifo_list, &bf_head); | |
fce041be | 2684 | INCR(txq->txq_tailidx, ATH_TXFIFO_DEPTH); |
e5003249 | 2685 | |
fce041be FF |
2686 | if (!list_empty(&txq->axq_q)) { |
2687 | struct list_head bf_q; | |
60f2d1d5 | 2688 | |
fce041be FF |
2689 | INIT_LIST_HEAD(&bf_q); |
2690 | txq->axq_link = NULL; | |
2691 | list_splice_tail_init(&txq->axq_q, &bf_q); | |
2692 | ath_tx_txqaddbuf(sc, txq, &bf_q, true); | |
2693 | } | |
99ba6a46 | 2694 | } else { |
50676b81 | 2695 | lastbf->bf_state.stale = true; |
99ba6a46 FF |
2696 | if (bf != lastbf) |
2697 | list_cut_position(&bf_head, fifo_list, | |
2698 | lastbf->list.prev); | |
fce041be | 2699 | } |
86271e46 | 2700 | |
fce041be | 2701 | ath_tx_process_buffer(sc, txq, &ts, bf, &bf_head); |
23de5dc9 | 2702 | ath_txq_unlock_complete(sc, txq); |
e5003249 VT |
2703 | } |
2704 | } | |
2705 | ||
e8324357 S |
2706 | /*****************/ |
2707 | /* Init, Cleanup */ | |
2708 | /*****************/ | |
f078f209 | 2709 | |
5088c2f1 VT |
2710 | static int ath_txstatus_setup(struct ath_softc *sc, int size) |
2711 | { | |
2712 | struct ath_descdma *dd = &sc->txsdma; | |
2713 | u8 txs_len = sc->sc_ah->caps.txs_len; | |
2714 | ||
2715 | dd->dd_desc_len = size * txs_len; | |
b81950b1 FF |
2716 | dd->dd_desc = dmam_alloc_coherent(sc->dev, dd->dd_desc_len, |
2717 | &dd->dd_desc_paddr, GFP_KERNEL); | |
5088c2f1 VT |
2718 | if (!dd->dd_desc) |
2719 | return -ENOMEM; | |
2720 | ||
2721 | return 0; | |
2722 | } | |
2723 | ||
2724 | static int ath_tx_edma_init(struct ath_softc *sc) | |
2725 | { | |
2726 | int err; | |
2727 | ||
2728 | err = ath_txstatus_setup(sc, ATH_TXSTATUS_RING_SIZE); | |
2729 | if (!err) | |
2730 | ath9k_hw_setup_statusring(sc->sc_ah, sc->txsdma.dd_desc, | |
2731 | sc->txsdma.dd_desc_paddr, | |
2732 | ATH_TXSTATUS_RING_SIZE); | |
2733 | ||
2734 | return err; | |
2735 | } | |
2736 | ||
e8324357 | 2737 | int ath_tx_init(struct ath_softc *sc, int nbufs) |
f078f209 | 2738 | { |
c46917bb | 2739 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
e8324357 | 2740 | int error = 0; |
f078f209 | 2741 | |
797fe5cb | 2742 | spin_lock_init(&sc->tx.txbuflock); |
f078f209 | 2743 | |
797fe5cb | 2744 | error = ath_descdma_setup(sc, &sc->tx.txdma, &sc->tx.txbuf, |
4adfcded | 2745 | "tx", nbufs, 1, 1); |
797fe5cb | 2746 | if (error != 0) { |
3800276a JP |
2747 | ath_err(common, |
2748 | "Failed to allocate tx descriptors: %d\n", error); | |
b81950b1 | 2749 | return error; |
797fe5cb | 2750 | } |
f078f209 | 2751 | |
797fe5cb | 2752 | error = ath_descdma_setup(sc, &sc->beacon.bdma, &sc->beacon.bbuf, |
5088c2f1 | 2753 | "beacon", ATH_BCBUF, 1, 1); |
797fe5cb | 2754 | if (error != 0) { |
3800276a JP |
2755 | ath_err(common, |
2756 | "Failed to allocate beacon descriptors: %d\n", error); | |
b81950b1 | 2757 | return error; |
797fe5cb | 2758 | } |
f078f209 | 2759 | |
164ace38 SB |
2760 | INIT_DELAYED_WORK(&sc->tx_complete_work, ath_tx_complete_poll_work); |
2761 | ||
b81950b1 | 2762 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) |
5088c2f1 | 2763 | error = ath_tx_edma_init(sc); |
f078f209 | 2764 | |
e8324357 | 2765 | return error; |
f078f209 LR |
2766 | } |
2767 | ||
f078f209 LR |
2768 | void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an) |
2769 | { | |
c5170163 S |
2770 | struct ath_atx_tid *tid; |
2771 | struct ath_atx_ac *ac; | |
2772 | int tidno, acno; | |
f078f209 | 2773 | |
8ee5afbc | 2774 | for (tidno = 0, tid = &an->tid[tidno]; |
de7b7604 | 2775 | tidno < IEEE80211_NUM_TIDS; |
c5170163 S |
2776 | tidno++, tid++) { |
2777 | tid->an = an; | |
2778 | tid->tidno = tidno; | |
2779 | tid->seq_start = tid->seq_next = 0; | |
2780 | tid->baw_size = WME_MAX_BA; | |
2781 | tid->baw_head = tid->baw_tail = 0; | |
2782 | tid->sched = false; | |
08c96abd | 2783 | tid->active = false; |
56dc6336 | 2784 | __skb_queue_head_init(&tid->buf_q); |
bb195ff6 | 2785 | __skb_queue_head_init(&tid->retry_q); |
c5170163 | 2786 | acno = TID_TO_WME_AC(tidno); |
8ee5afbc | 2787 | tid->ac = &an->ac[acno]; |
c5170163 | 2788 | } |
f078f209 | 2789 | |
8ee5afbc | 2790 | for (acno = 0, ac = &an->ac[acno]; |
bea843c7 | 2791 | acno < IEEE80211_NUM_ACS; acno++, ac++) { |
c5170163 | 2792 | ac->sched = false; |
026d5b07 | 2793 | ac->clear_ps_filter = true; |
066dae93 | 2794 | ac->txq = sc->tx.txq_map[acno]; |
c5170163 | 2795 | INIT_LIST_HEAD(&ac->tid_q); |
f078f209 LR |
2796 | } |
2797 | } | |
2798 | ||
b5aa9bf9 | 2799 | void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an) |
f078f209 | 2800 | { |
2b40994c FF |
2801 | struct ath_atx_ac *ac; |
2802 | struct ath_atx_tid *tid; | |
f078f209 | 2803 | struct ath_txq *txq; |
066dae93 | 2804 | int tidno; |
e8324357 | 2805 | |
2b40994c | 2806 | for (tidno = 0, tid = &an->tid[tidno]; |
de7b7604 | 2807 | tidno < IEEE80211_NUM_TIDS; tidno++, tid++) { |
f078f209 | 2808 | |
2b40994c | 2809 | ac = tid->ac; |
066dae93 | 2810 | txq = ac->txq; |
f078f209 | 2811 | |
23de5dc9 | 2812 | ath_txq_lock(sc, txq); |
2b40994c FF |
2813 | |
2814 | if (tid->sched) { | |
2815 | list_del(&tid->list); | |
2816 | tid->sched = false; | |
2817 | } | |
2818 | ||
2819 | if (ac->sched) { | |
2820 | list_del(&ac->list); | |
2821 | tid->ac->sched = false; | |
f078f209 | 2822 | } |
2b40994c FF |
2823 | |
2824 | ath_tid_drain(sc, txq, tid); | |
08c96abd | 2825 | tid->active = false; |
2b40994c | 2826 | |
23de5dc9 | 2827 | ath_txq_unlock(sc, txq); |
f078f209 LR |
2828 | } |
2829 | } | |
89f927af | 2830 | |
ef6b19e4 SM |
2831 | #ifdef CONFIG_ATH9K_TX99 |
2832 | ||
89f927af LR |
2833 | int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb, |
2834 | struct ath_tx_control *txctl) | |
2835 | { | |
2836 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; | |
2837 | struct ath_frame_info *fi = get_frame_info(skb); | |
2838 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | |
2839 | struct ath_buf *bf; | |
2840 | int padpos, padsize; | |
2841 | ||
2842 | padpos = ieee80211_hdrlen(hdr->frame_control); | |
2843 | padsize = padpos & 3; | |
2844 | ||
2845 | if (padsize && skb->len > padpos) { | |
2846 | if (skb_headroom(skb) < padsize) { | |
2847 | ath_dbg(common, XMIT, | |
2848 | "tx99 padding failed\n"); | |
2849 | return -EINVAL; | |
2850 | } | |
2851 | ||
2852 | skb_push(skb, padsize); | |
2853 | memmove(skb->data, skb->data + padsize, padpos); | |
2854 | } | |
2855 | ||
2856 | fi->keyix = ATH9K_TXKEYIX_INVALID; | |
2857 | fi->framelen = skb->len + FCS_LEN; | |
2858 | fi->keytype = ATH9K_KEY_TYPE_CLEAR; | |
2859 | ||
2860 | bf = ath_tx_setup_buffer(sc, txctl->txq, NULL, skb); | |
2861 | if (!bf) { | |
2862 | ath_dbg(common, XMIT, "tx99 buffer setup failed\n"); | |
2863 | return -EINVAL; | |
2864 | } | |
2865 | ||
2866 | ath_set_rates(sc->tx99_vif, NULL, bf); | |
2867 | ||
2868 | ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, bf->bf_daddr); | |
2869 | ath9k_hw_tx99_start(sc->sc_ah, txctl->txq->axq_qnum); | |
2870 | ||
2871 | ath_tx_send_normal(sc, txctl->txq, NULL, skb); | |
2872 | ||
2873 | return 0; | |
2874 | } | |
ef6b19e4 SM |
2875 | |
2876 | #endif /* CONFIG_ATH9K_TX99 */ |