[deliverable/linux.git] / drivers / net / wireless / ath / wil6210 / wil6210.h

/*
 * Copyright (c) 2012 Qualcomm Atheros, Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef __WIL6210_H__
#define __WIL6210_H__

#include <linux/netdevice.h>
#include <linux/wireless.h>
#include <net/cfg80211.h>

#define WIL_NAME "wil6210"

/**
 * extract bits [@b0:@b1] (inclusive) from the value @x
 * it should be @b0 <= @b1, or result is incorrect
 */
static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
{
	return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
}

#define WIL6210_MEM_SIZE (2*1024*1024UL)

#define WIL6210_RX_RING_SIZE	(128)
#define WIL6210_TX_RING_SIZE	(128)
#define WIL6210_MAX_TX_RINGS	(24) /* HW limit */
#define WIL6210_MAX_CID		(8) /* HW limit */
#define WIL6210_NAPI_BUDGET	(16) /* arbitrary */
#define WIL6210_ITR_TRSH	(10000) /* arbitrary - about 15 IRQs/msec */

/* Hardware definitions begin */

/*
 * Mapping
 * RGF File      | Host addr    |  FW addr
 *               |              |
 * user_rgf      | 0x000000     | 0x880000
 *  dma_rgf      | 0x001000     | 0x881000
 * pcie_rgf      | 0x002000     | 0x882000
 *               |              |
 */

/* Where various structures placed in host address space */
#define WIL6210_FW_HOST_OFF      (0x880000UL)

#define HOSTADDR(fwaddr)        (fwaddr - WIL6210_FW_HOST_OFF)

/*
 * Interrupt control registers block
 *
 * each interrupt controlled by the same bit in all registers
 */
struct RGF_ICR {
	u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
	u32 ICR; /* Cause, W1C/COR depending on ICC */
	u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
	u32 ICS; /* Cause Set, WO */
	u32 IMV; /* Mask, RW+S/C */
	u32 IMS; /* Mask Set, write 1 to set */
	u32 IMC; /* Mask Clear, write 1 to clear */
} __packed;

/* registers - FW addresses */
#define RGF_USER_USER_SCRATCH_PAD	(0x8802bc)
#define RGF_USER_USER_ICR		(0x880b4c) /* struct RGF_ICR */
	#define BIT_USER_USER_ICR_SW_INT_2	BIT(18)
#define RGF_USER_CLKS_CTL_SW_RST_MASK_0	(0x880b14)
#define RGF_USER_MAC_CPU_0		(0x8801fc)
#define RGF_USER_USER_CPU_0		(0x8801e0)
#define RGF_USER_CLKS_CTL_SW_RST_VEC_0	(0x880b04)
#define RGF_USER_CLKS_CTL_SW_RST_VEC_1	(0x880b08)
#define RGF_USER_CLKS_CTL_SW_RST_VEC_2	(0x880b0c)
#define RGF_USER_CLKS_CTL_SW_RST_VEC_3	(0x880b10)

#define RGF_DMA_PSEUDO_CAUSE		(0x881c68)
#define RGF_DMA_PSEUDO_CAUSE_MASK_SW	(0x881c6c)
#define RGF_DMA_PSEUDO_CAUSE_MASK_FW	(0x881c70)
	#define BIT_DMA_PSEUDO_CAUSE_RX		BIT(0)
	#define BIT_DMA_PSEUDO_CAUSE_TX		BIT(1)
	#define BIT_DMA_PSEUDO_CAUSE_MISC	BIT(2)

#define RGF_DMA_EP_TX_ICR		(0x881bb4) /* struct RGF_ICR */
	#define BIT_DMA_EP_TX_ICR_TX_DONE	BIT(0)
	#define BIT_DMA_EP_TX_ICR_TX_DONE_N(n)	BIT(n+1) /* n = [0..23] */
#define RGF_DMA_EP_RX_ICR		(0x881bd0) /* struct RGF_ICR */
	#define BIT_DMA_EP_RX_ICR_RX_DONE	BIT(0)
#define RGF_DMA_EP_MISC_ICR		(0x881bec) /* struct RGF_ICR */
	#define BIT_DMA_EP_MISC_ICR_RX_HTRSH	BIT(0)
	#define BIT_DMA_EP_MISC_ICR_TX_NO_ACT	BIT(1)
	#define BIT_DMA_EP_MISC_ICR_FW_INT(n)	BIT(28+n) /* n = [0..3] */

/* Interrupt moderation control */
#define RGF_DMA_ITR_CNT_TRSH		(0x881c5c)
#define RGF_DMA_ITR_CNT_DATA		(0x881c60)
#define RGF_DMA_ITR_CNT_CRL		(0x881C64)
	#define BIT_DMA_ITR_CNT_CRL_EN		BIT(0)
	#define BIT_DMA_ITR_CNT_CRL_EXT_TICK	BIT(1)
	#define BIT_DMA_ITR_CNT_CRL_FOREVER	BIT(2)
	#define BIT_DMA_ITR_CNT_CRL_CLR		BIT(3)
	#define BIT_DMA_ITR_CNT_CRL_REACH_TRSH	BIT(4)

/* popular locations */
#define HOST_MBOX   HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
#define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
	offsetof(struct RGF_ICR, ICS))
#define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2

/* ISR register bits */
#define ISR_MISC_FW_READY	BIT_DMA_EP_MISC_ICR_FW_INT(0)
#define ISR_MISC_MBOX_EVT	BIT_DMA_EP_MISC_ICR_FW_INT(1)
#define ISR_MISC_FW_ERROR	BIT_DMA_EP_MISC_ICR_FW_INT(3)

/* Hardware definitions end */

struct wil6210_mbox_ring {
	u32 base;
	u16 entry_size; /* max. size of mbox entry, incl. all headers */
	u16 size;
	u32 tail;
	u32 head;
} __packed;

struct wil6210_mbox_ring_desc {
	__le32 sync;
	__le32 addr;
} __packed;

/* at HOST_OFF_WIL6210_MBOX_CTL */
struct wil6210_mbox_ctl {
	struct wil6210_mbox_ring tx;
	struct wil6210_mbox_ring rx;
} __packed;

struct wil6210_mbox_hdr {
	__le16 seq;
	__le16 len; /* payload, bytes after this header */
	__le16 type;
	u8 flags;
	u8 reserved;
} __packed;

#define WIL_MBOX_HDR_TYPE_WMI (0)

/* max. value for wil6210_mbox_hdr.len */
#define MAX_MBOXITEM_SIZE   (240)

/**
 * struct wil6210_mbox_hdr_wmi - WMI header
 *
 * @mid: MAC ID
 *	00 - default, created by FW
 *	01..0f - WiFi ports, driver to create
 *	10..fe - debug
 *	ff - broadcast
 * @id: command/event ID
 * @timestamp: FW fills for events, free-running msec timer
 */
struct wil6210_mbox_hdr_wmi {
	u8 mid;
	u8 reserved;
	__le16 id;
	__le32 timestamp;
} __packed;

struct pending_wmi_event {
	struct list_head list;
	struct {
		struct wil6210_mbox_hdr hdr;
		struct wil6210_mbox_hdr_wmi wmi;
		u8 data[0];
	} __packed event;
};

/**
 * struct wil_ctx - software context for Vring descriptor
 */
struct wil_ctx {
	struct sk_buff *skb;
	u8 mapped_as_page:1;
};

union vring_desc;

struct vring {
	dma_addr_t pa;
	volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
	u16 size; /* number of vring_desc elements */
	u32 swtail;
	u32 swhead;
	u32 hwtail; /* write here to inform hw */
	struct wil_ctx *ctx; /* ctx[size] - software context */
};

enum { /* for wil6210_priv.status */
	wil_status_fwready = 0,
	wil_status_fwconnecting,
	wil_status_fwconnected,
	wil_status_dontscan,
	wil_status_reset_done,
	wil_status_irqen, /* FIXME: interrupts enabled - for debug */
};

struct pci_dev;

/**
 * struct tid_ampdu_rx - TID aggregation information (Rx).
 *
 * @reorder_buf: buffer to reorder incoming aggregated MPDUs
 * @reorder_time: jiffies when skb was added
 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
 * @reorder_timer: releases expired frames from the reorder buffer.
 * @last_rx: jiffies of last rx activity
 * @head_seq_num: head sequence number in reordering buffer.
 * @stored_mpdu_num: number of MPDUs in reordering buffer
 * @ssn: Starting Sequence Number expected to be aggregated.
 * @buf_size: buffer size for incoming A-MPDUs
 * @timeout: reset timer value (in TUs).
 * @dialog_token: dialog token for aggregation session
 * @rcu_head: RCU head used for freeing this struct
 * @reorder_lock: serializes access to reorder buffer, see below.
 *
 * This structure's lifetime is managed by RCU, assignments to
 * the array holding it must hold the aggregation mutex.
 *
 * The @reorder_lock is used to protect the members of this
 * struct, except for @timeout, @buf_size and @dialog_token,
 * which are constant across the lifetime of the struct (the
 * dialog token being used only for debugging).
 */
struct wil_tid_ampdu_rx {
	spinlock_t reorder_lock; /* see above */
	struct sk_buff **reorder_buf;
	unsigned long *reorder_time;
	struct timer_list session_timer;
	struct timer_list reorder_timer;
	unsigned long last_rx;
	u16 head_seq_num;
	u16 stored_mpdu_num;
	u16 ssn;
	u16 buf_size;
	u16 timeout;
	u8 dialog_token;
};

struct wil6210_stats {
	u64 tsf;
	u32 snr;
	u16 last_mcs_rx;
	u16 bf_mcs; /* last BF, used for Tx */
	u16 my_rx_sector;
	u16 my_tx_sector;
	u16 peer_rx_sector;
	u16 peer_tx_sector;
};

enum wil_sta_status {
	wil_sta_unused = 0,
	wil_sta_conn_pending = 1,
	wil_sta_connected = 2,
};

#define WIL_STA_TID_NUM (16)

struct wil_net_stats {
	unsigned long	rx_packets;
	unsigned long	tx_packets;
	unsigned long	rx_bytes;
	unsigned long	tx_bytes;
	unsigned long	tx_errors;
	unsigned long	rx_dropped;
	u16 last_mcs_rx;
};

/**
 * struct wil_sta_info - data for peer
 *
 * Peer identified by its CID (connection ID)
 * NIC performs beam forming for each peer;
 * if no beam forming done, frame exchange is not
 * possible.
 */
struct wil_sta_info {
	u8 addr[ETH_ALEN];
	enum wil_sta_status status;
	struct wil_net_stats stats;
	/* Rx BACK */
	struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM];
	unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)];
	unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)];
};

struct wil6210_priv {
	struct pci_dev *pdev;
	int n_msi;
	struct wireless_dev *wdev;
	void __iomem *csr;
	ulong status;
	u32 fw_version;
	u8 n_mids; /* number of additional MIDs as reported by FW */
	/* profile */
	u32 monitor_flags;
	u32 secure_pcp; /* create secure PCP? */
	int sinfo_gen;
	/* cached ISR registers */
	u32 isr_misc;
	/* mailbox related */
	struct mutex wmi_mutex;
	struct wil6210_mbox_ctl mbox_ctl;
	struct completion wmi_ready;
	u16 wmi_seq;
	u16 reply_id; /**< wait for this WMI event */
	void *reply_buf;
	u16 reply_size;
	struct workqueue_struct *wmi_wq; /* for deferred calls */
	struct work_struct wmi_event_worker;
	struct workqueue_struct *wmi_wq_conn; /* for connect worker */
	struct work_struct connect_worker;
	struct work_struct disconnect_worker;
	struct timer_list connect_timer;
	int pending_connect_cid;
	struct list_head pending_wmi_ev;
	/*
	 * protect pending_wmi_ev
	 * - fill in IRQ from wil6210_irq_misc,
	 * - consumed in thread by wmi_event_worker
	 */
	spinlock_t wmi_ev_lock;
	struct napi_struct napi_rx;
	struct napi_struct napi_tx;
	/* DMA related */
	struct vring vring_rx;
	struct vring vring_tx[WIL6210_MAX_TX_RINGS];
	u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */
	struct wil_sta_info sta[WIL6210_MAX_CID];
	/* scan */
	struct cfg80211_scan_request *scan_request;

	struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
	/* statistics */
	struct wil6210_stats stats;
	/* debugfs */
	struct dentry *debug;
	struct debugfs_blob_wrapper fw_code_blob;
	struct debugfs_blob_wrapper fw_data_blob;
	struct debugfs_blob_wrapper fw_peri_blob;
	struct debugfs_blob_wrapper uc_code_blob;
	struct debugfs_blob_wrapper uc_data_blob;
	struct debugfs_blob_wrapper rgf_blob;
};

#define wil_to_wiphy(i) (i->wdev->wiphy)
#define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
#define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
#define wil_to_wdev(i) (i->wdev)
#define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
#define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
#define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))

int wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
int wil_err(struct wil6210_priv *wil, const char *fmt, ...);
int wil_info(struct wil6210_priv *wil, const char *fmt, ...);
#define wil_dbg(wil, fmt, arg...) do { \
	netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
	wil_dbg_trace(wil, fmt, ##arg); \
} while (0)

#define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
#define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
#define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
#define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)

#define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize,	\
			  groupsize, buf, len, ascii)		\
			  print_hex_dump_debug("DBG[TXRX]" prefix_str,\
					 prefix_type, rowsize,	\
					 groupsize, buf, len, ascii)

#define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize,	\
			 groupsize, buf, len, ascii)		\
			 print_hex_dump_debug("DBG[ WMI]" prefix_str,\
					prefix_type, rowsize,	\
					groupsize, buf, len, ascii)

void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
			  size_t count);
void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
			size_t count);

void *wil_if_alloc(struct device *dev, void __iomem *csr);
void wil_if_free(struct wil6210_priv *wil);
int wil_if_add(struct wil6210_priv *wil);
void wil_if_remove(struct wil6210_priv *wil);
int wil_priv_init(struct wil6210_priv *wil);
void wil_priv_deinit(struct wil6210_priv *wil);
int wil_reset(struct wil6210_priv *wil);
void wil_link_on(struct wil6210_priv *wil);
void wil_link_off(struct wil6210_priv *wil);
int wil_up(struct wil6210_priv *wil);
int wil_down(struct wil6210_priv *wil);
void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
int wil_find_cid(struct wil6210_priv *wil, const u8 *mac);

void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
		 struct wil6210_mbox_hdr *hdr);
int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len);
void wmi_recv_cmd(struct wil6210_priv *wil);
int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
	     u16 reply_id, void *reply, u8 reply_size, int to_msec);
void wmi_event_worker(struct work_struct *work);
void wmi_event_flush(struct wil6210_priv *wil);
int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid);
int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid);
int wmi_set_channel(struct wil6210_priv *wil, int channel);
int wmi_get_channel(struct wil6210_priv *wil, int *channel);
int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
		       const void *mac_addr);
int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
		       const void *mac_addr, int key_len, const void *key);
int wmi_echo(struct wil6210_priv *wil);
int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie);
int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring);
int wmi_p2p_cfg(struct wil6210_priv *wil, int channel);
int wmi_rxon(struct wil6210_priv *wil, bool on);
int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);

int wil6210_init_irq(struct wil6210_priv *wil, int irq);
void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
void wil6210_disable_irq(struct wil6210_priv *wil);
void wil6210_enable_irq(struct wil6210_priv *wil);

int wil6210_debugfs_init(struct wil6210_priv *wil);
void wil6210_debugfs_remove(struct wil6210_priv *wil);

struct wireless_dev *wil_cfg80211_init(struct device *dev);
void wil_wdev_free(struct wil6210_priv *wil);

int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, u8 chan);
int wmi_pcp_stop(struct wil6210_priv *wil);
void wil6210_disconnect(struct wil6210_priv *wil, void *bssid);

int wil_rx_init(struct wil6210_priv *wil);
void wil_rx_fini(struct wil6210_priv *wil);

/* TX API */
int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
		      int cid, int tid);
void wil_vring_fini_tx(struct wil6210_priv *wil, int id);

netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
int wil_tx_complete(struct wil6210_priv *wil, int ringid);
void wil6210_unmask_irq_tx(struct wil6210_priv *wil);

/* RX API */
void wil_rx_handle(struct wil6210_priv *wil, int *quota);
void wil6210_unmask_irq_rx(struct wil6210_priv *wil);

int wil_iftype_nl2wmi(enum nl80211_iftype type);

#endif /* __WIL6210_H__ */
Commit	Line	Data
2be7d22f VK	1	/*
	2	* Copyright (c) 2012 Qualcomm Atheros, Inc.
	3	*
	4	* Permission to use, copy, modify, and/or distribute this software for any
	5	* purpose with or without fee is hereby granted, provided that the above
	6	* copyright notice and this permission notice appear in all copies.
	7	*
	8	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	9	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	10	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
	11	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	12	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
	13	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
	14	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	15	*/
	16
	17	#ifndef __WIL6210_H__
	18	#define __WIL6210_H__
	19
	20	#include <linux/netdevice.h>
	21	#include <linux/wireless.h>
	22	#include <net/cfg80211.h>
	23
2be7d22f VK	24	#define WIL_NAME "wil6210"
	25
	26	/**
	27	* extract bits [@b0:@b1] (inclusive) from the value @x
	28	* it should be @b0 <= @b1, or result is incorrect
	29	*/
	30	static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
	31	{
	32	return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
	33	}
	34
	35	#define WIL6210_MEM_SIZE (210241024UL)
	36
e0287c4a VK	37	#define WIL6210_RX_RING_SIZE (128)
	38	#define WIL6210_TX_RING_SIZE (128)
	39	#define WIL6210_MAX_TX_RINGS (24) /* HW limit */
	40	#define WIL6210_MAX_CID (8) /* HW limit */
	41	#define WIL6210_NAPI_BUDGET (16) /* arbitrary */
83982cbe	42	#define WIL6210_ITR_TRSH (10000) /* arbitrary - about 15 IRQs/msec */
2be7d22f VK	43
	44	/* Hardware definitions begin */
	45
	46	/*
	47	* Mapping
	48	* RGF File \| Host addr \| FW addr
	49	* \| \|
	50	* user_rgf \| 0x000000 \| 0x880000
	51	* dma_rgf \| 0x001000 \| 0x881000
	52	* pcie_rgf \| 0x002000 \| 0x882000
	53	* \| \|
	54	*/
	55
	56	/* Where various structures placed in host address space */
	57	#define WIL6210_FW_HOST_OFF (0x880000UL)
	58
	59	#define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
	60
	61	/*
	62	* Interrupt control registers block
	63	*
	64	* each interrupt controlled by the same bit in all registers
	65	*/
	66	struct RGF_ICR {
	67	u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
	68	u32 ICR; /* Cause, W1C/COR depending on ICC */
	69	u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
	70	u32 ICS; /* Cause Set, WO */
	71	u32 IMV; /* Mask, RW+S/C */
	72	u32 IMS; /* Mask Set, write 1 to set */
	73	u32 IMC; /* Mask Clear, write 1 to clear */
	74	} __packed;
	75
	76	/* registers - FW addresses */
	77	#define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
	78	#define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
	79	#define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
	80	#define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
	81	#define RGF_USER_MAC_CPU_0 (0x8801fc)
	82	#define RGF_USER_USER_CPU_0 (0x8801e0)
	83	#define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
	84	#define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
	85	#define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
	86	#define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
	87
	88	#define RGF_DMA_PSEUDO_CAUSE (0x881c68)
	89	#define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
	90	#define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
	91	#define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
	92	#define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
	93	#define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
	94
	95	#define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
	96	#define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
	97	#define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
	98	#define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
	99	#define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
	100	#define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
	101	#define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
	102	#define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
7269494e	103	#define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
2be7d22f VK	104
	105	/* Interrupt moderation control */
	106	#define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
	107	#define RGF_DMA_ITR_CNT_DATA (0x881c60)
	108	#define RGF_DMA_ITR_CNT_CRL (0x881C64)
	109	#define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
	110	#define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
	111	#define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
	112	#define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
	113	#define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
	114
	115	/* popular locations */
	116	#define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
	117	#define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
	118	offsetof(struct RGF_ICR, ICS))
	119	#define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
	120
	121	/* ISR register bits */
7269494e VK	122	#define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
	123	#define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
	124	#define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
2be7d22f VK	125
	126	/* Hardware definitions end */
	127
	128	struct wil6210_mbox_ring {
	129	u32 base;
	130	u16 entry_size; /* max. size of mbox entry, incl. all headers */
	131	u16 size;
	132	u32 tail;
	133	u32 head;
	134	} __packed;
	135
	136	struct wil6210_mbox_ring_desc {
	137	__le32 sync;
	138	__le32 addr;
	139	} __packed;
	140
	141	/* at HOST_OFF_WIL6210_MBOX_CTL */
	142	struct wil6210_mbox_ctl {
	143	struct wil6210_mbox_ring tx;
	144	struct wil6210_mbox_ring rx;
	145	} __packed;
	146
	147	struct wil6210_mbox_hdr {
	148	__le16 seq;
	149	__le16 len; /* payload, bytes after this header */
	150	__le16 type;
	151	u8 flags;
	152	u8 reserved;
	153	} __packed;
	154
	155	#define WIL_MBOX_HDR_TYPE_WMI (0)
	156
	157	/* max. value for wil6210_mbox_hdr.len */
	158	#define MAX_MBOXITEM_SIZE (240)
	159
f988b23f VK	160	/**
	161	* struct wil6210_mbox_hdr_wmi - WMI header
	162	*
	163	* @mid: MAC ID
	164	* 00 - default, created by FW
	165	* 01..0f - WiFi ports, driver to create
	166	* 10..fe - debug
	167	* ff - broadcast
	168	* @id: command/event ID
	169	* @timestamp: FW fills for events, free-running msec timer
	170	*/
2be7d22f	171	struct wil6210_mbox_hdr_wmi {
f988b23f VK	172	u8 mid;
f988b23f VK	173	u8 reserved;
2be7d22f	174	__le16 id;
f988b23f	175	__le32 timestamp;
2be7d22f VK	176	} __packed;
	177
	178	struct pending_wmi_event {
	179	struct list_head list;
	180	struct {
	181	struct wil6210_mbox_hdr hdr;
	182	struct wil6210_mbox_hdr_wmi wmi;
	183	u8 data[0];
	184	} __packed event;
	185	};
	186
f88f113a VK	187	/**
	188	* struct wil_ctx - software context for Vring descriptor
	189	*/
	190	struct wil_ctx {
	191	struct sk_buff *skb;
	192	u8 mapped_as_page:1;
	193	};
	194
2be7d22f VK	195	union vring_desc;
	196
	197	struct vring {
	198	dma_addr_t pa;
	199	volatile union vring_desc va; / vring_desc[size], WriteBack by DMA */
	200	u16 size; /* number of vring_desc elements */
	201	u32 swtail;
	202	u32 swhead;
	203	u32 hwtail; /* write here to inform hw */
f88f113a	204	struct wil_ctx ctx; / ctx[size] - software context */
2be7d22f VK	205	};
	206
	207	enum { /* for wil6210_priv.status */
	208	wil_status_fwready = 0,
b338f74e	209	wil_status_fwconnecting,
2be7d22f VK	210	wil_status_fwconnected,
2be7d22f VK	211	wil_status_dontscan,
55f7acdd	212	wil_status_reset_done,
2be7d22f VK	213	wil_status_irqen, /* FIXME: interrupts enabled - for debug */
	214	};
	215
	216	struct pci_dev;
	217
b4490f42 VK	218	/**
	219	* struct tid_ampdu_rx - TID aggregation information (Rx).
	220	*
	221	* @reorder_buf: buffer to reorder incoming aggregated MPDUs
	222	* @reorder_time: jiffies when skb was added
	223	* @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
	224	* @reorder_timer: releases expired frames from the reorder buffer.
	225	* @last_rx: jiffies of last rx activity
	226	* @head_seq_num: head sequence number in reordering buffer.
	227	* @stored_mpdu_num: number of MPDUs in reordering buffer
	228	* @ssn: Starting Sequence Number expected to be aggregated.
	229	* @buf_size: buffer size for incoming A-MPDUs
	230	* @timeout: reset timer value (in TUs).
	231	* @dialog_token: dialog token for aggregation session
	232	* @rcu_head: RCU head used for freeing this struct
	233	* @reorder_lock: serializes access to reorder buffer, see below.
	234	*
	235	* This structure's lifetime is managed by RCU, assignments to
	236	* the array holding it must hold the aggregation mutex.
	237	*
	238	* The @reorder_lock is used to protect the members of this
	239	* struct, except for @timeout, @buf_size and @dialog_token,
	240	* which are constant across the lifetime of the struct (the
	241	* dialog token being used only for debugging).
	242	*/
	243	struct wil_tid_ampdu_rx {
	244	spinlock_t reorder_lock; /* see above */
	245	struct sk_buff **reorder_buf;
	246	unsigned long *reorder_time;
	247	struct timer_list session_timer;
	248	struct timer_list reorder_timer;
	249	unsigned long last_rx;
	250	u16 head_seq_num;
	251	u16 stored_mpdu_num;
	252	u16 ssn;
	253	u16 buf_size;
	254	u16 timeout;
	255	u8 dialog_token;
	256	};
	257
2be7d22f VK	258	struct wil6210_stats {
	259	u64 tsf;
	260	u32 snr;
	261	u16 last_mcs_rx;
	262	u16 bf_mcs; /* last BF, used for Tx */
	263	u16 my_rx_sector;
	264	u16 my_tx_sector;
	265	u16 peer_rx_sector;
	266	u16 peer_tx_sector;
	267	};
	268
3df2cd36 VK	269	enum wil_sta_status {
	270	wil_sta_unused = 0,
	271	wil_sta_conn_pending = 1,
	272	wil_sta_connected = 2,
	273	};
b4490f42 VK	274
	275	#define WIL_STA_TID_NUM (16)
	276
c8b78b5f VK	277	struct wil_net_stats {
	278	unsigned long rx_packets;
	279	unsigned long tx_packets;
	280	unsigned long rx_bytes;
	281	unsigned long tx_bytes;
	282	unsigned long tx_errors;
	283	unsigned long rx_dropped;
	284	u16 last_mcs_rx;
	285	};
	286
3df2cd36 VK	287	/**
	288	* struct wil_sta_info - data for peer
	289	*
	290	* Peer identified by its CID (connection ID)
	291	* NIC performs beam forming for each peer;
	292	* if no beam forming done, frame exchange is not
	293	* possible.
	294	*/
	295	struct wil_sta_info {
	296	u8 addr[ETH_ALEN];
	297	enum wil_sta_status status;
c8b78b5f	298	struct wil_net_stats stats;
b4490f42 VK	299	/* Rx BACK */
	300	struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM];
	301	unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)];
	302	unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)];
3df2cd36 VK	303	};
3df2cd36 VK	304
2be7d22f VK	305	struct wil6210_priv {
	306	struct pci_dev *pdev;
	307	int n_msi;
	308	struct wireless_dev *wdev;
	309	void __iomem *csr;
	310	ulong status;
b8023177 VK	311	u32 fw_version;
b8023177 VK	312	u8 n_mids; /* number of additional MIDs as reported by FW */
2be7d22f VK	313	/* profile */
	314	u32 monitor_flags;
	315	u32 secure_pcp; /* create secure PCP? */
	316	int sinfo_gen;
	317	/* cached ISR registers */
	318	u32 isr_misc;
	319	/* mailbox related */
	320	struct mutex wmi_mutex;
	321	struct wil6210_mbox_ctl mbox_ctl;
	322	struct completion wmi_ready;
	323	u16 wmi_seq;
	324	u16 reply_id; /*< wait for this WMI event /
	325	void *reply_buf;
	326	u16 reply_size;
	327	struct workqueue_struct wmi_wq; / for deferred calls */
	328	struct work_struct wmi_event_worker;
	329	struct workqueue_struct wmi_wq_conn; / for connect worker */
d81079f1	330	struct work_struct connect_worker;
2be7d22f VK	331	struct work_struct disconnect_worker;
	332	struct timer_list connect_timer;
	333	int pending_connect_cid;
	334	struct list_head pending_wmi_ev;
	335	/*
	336	* protect pending_wmi_ev
	337	* - fill in IRQ from wil6210_irq_misc,
	338	* - consumed in thread by wmi_event_worker
	339	*/
	340	spinlock_t wmi_ev_lock;
e0287c4a VK	341	struct napi_struct napi_rx;
e0287c4a VK	342	struct napi_struct napi_tx;
2be7d22f VK	343	/* DMA related */
	344	struct vring vring_rx;
	345	struct vring vring_tx[WIL6210_MAX_TX_RINGS];
3df2cd36 VK	346	u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */
3df2cd36 VK	347	struct wil_sta_info sta[WIL6210_MAX_CID];
2be7d22f VK	348	/* scan */
	349	struct cfg80211_scan_request *scan_request;
	350
	351	struct mutex mutex; /* for wil6210_priv access in wil_{up\|down} */
	352	/* statistics */
	353	struct wil6210_stats stats;
	354	/* debugfs */
	355	struct dentry *debug;
	356	struct debugfs_blob_wrapper fw_code_blob;
	357	struct debugfs_blob_wrapper fw_data_blob;
	358	struct debugfs_blob_wrapper fw_peri_blob;
	359	struct debugfs_blob_wrapper uc_code_blob;
	360	struct debugfs_blob_wrapper uc_data_blob;
	361	struct debugfs_blob_wrapper rgf_blob;
	362	};
	363
	364	#define wil_to_wiphy(i) (i->wdev->wiphy)
	365	#define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
	366	#define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
	367	#define wil_to_wdev(i) (i->wdev)
	368	#define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
	369	#define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
	370	#define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
	371
98658095 VK	372	int wil_dbg_trace(struct wil6210_priv wil, const char fmt, ...);
	373	int wil_err(struct wil6210_priv wil, const char fmt, ...);
	374	int wil_info(struct wil6210_priv wil, const char fmt, ...);
	375	#define wil_dbg(wil, fmt, arg...) do { \
	376	netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
	377	wil_dbg_trace(wil, fmt, ##arg); \
	378	} while (0)
2be7d22f	379
7743882d VK	380	#define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
	381	#define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
	382	#define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
	383	#define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
2be7d22f	384
7743882d	385	#define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
2be7d22f	386	groupsize, buf, len, ascii) \
3b0378a8	387	print_hex_dump_debug("DBG[TXRX]" prefix_str,\
2be7d22f VK	388	prefix_type, rowsize, \
	389	groupsize, buf, len, ascii)
	390
7743882d	391	#define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
2be7d22f	392	groupsize, buf, len, ascii) \
3b0378a8	393	print_hex_dump_debug("DBG[ WMI]" prefix_str,\
2be7d22f VK	394	prefix_type, rowsize, \
	395	groupsize, buf, len, ascii)
	396
	397	void wil_memcpy_fromio_32(void dst, const volatile void __iomem src,
	398	size_t count);
	399	void wil_memcpy_toio_32(volatile void __iomem dst, const void src,
	400	size_t count);
	401
	402	void wil_if_alloc(struct device dev, void __iomem *csr);
	403	void wil_if_free(struct wil6210_priv *wil);
	404	int wil_if_add(struct wil6210_priv *wil);
	405	void wil_if_remove(struct wil6210_priv *wil);
	406	int wil_priv_init(struct wil6210_priv *wil);
	407	void wil_priv_deinit(struct wil6210_priv *wil);
	408	int wil_reset(struct wil6210_priv *wil);
	409	void wil_link_on(struct wil6210_priv *wil);
	410	void wil_link_off(struct wil6210_priv *wil);
	411	int wil_up(struct wil6210_priv *wil);
	412	int wil_down(struct wil6210_priv *wil);
	413	void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
3df2cd36	414	int wil_find_cid(struct wil6210_priv wil, const u8 mac);
2be7d22f VK	415
	416	void __iomem wmi_buffer(struct wil6210_priv wil, __le32 ptr);
	417	void __iomem wmi_addr(struct wil6210_priv wil, u32 ptr);
	418	int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
	419	struct wil6210_mbox_hdr *hdr);
	420	int wmi_send(struct wil6210_priv wil, u16 cmdid, void buf, u16 len);
	421	void wmi_recv_cmd(struct wil6210_priv *wil);
	422	int wmi_call(struct wil6210_priv wil, u16 cmdid, void buf, u16 len,
	423	u16 reply_id, void *reply, u8 reply_size, int to_msec);
2be7d22f VK	424	void wmi_event_worker(struct work_struct *work);
	425	void wmi_event_flush(struct wil6210_priv *wil);
	426	int wmi_set_ssid(struct wil6210_priv wil, u8 ssid_len, const void ssid);
	427	int wmi_get_ssid(struct wil6210_priv wil, u8 ssid_len, void *ssid);
	428	int wmi_set_channel(struct wil6210_priv *wil, int channel);
	429	int wmi_get_channel(struct wil6210_priv wil, int channel);
2be7d22f VK	430	int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
	431	const void *mac_addr);
	432	int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
	433	const void mac_addr, int key_len, const void key);
	434	int wmi_echo(struct wil6210_priv *wil);
	435	int wmi_set_ie(struct wil6210_priv wil, u8 type, u16 ie_len, const void ie);
47e19af9	436	int wmi_rx_chain_add(struct wil6210_priv wil, struct vring vring);
b8023177	437	int wmi_p2p_cfg(struct wil6210_priv *wil, int channel);
1647f12f	438	int wmi_rxon(struct wil6210_priv *wil, bool on);
1a2780e0	439	int wmi_get_temperature(struct wil6210_priv wil, u32 t_m, u32 *t_r);
2be7d22f VK	440
	441	int wil6210_init_irq(struct wil6210_priv *wil, int irq);
	442	void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
	443	void wil6210_disable_irq(struct wil6210_priv *wil);
	444	void wil6210_enable_irq(struct wil6210_priv *wil);
	445
	446	int wil6210_debugfs_init(struct wil6210_priv *wil);
	447	void wil6210_debugfs_remove(struct wil6210_priv *wil);
	448
	449	struct wireless_dev wil_cfg80211_init(struct device dev);
	450	void wil_wdev_free(struct wil6210_priv *wil);
	451
	452	int wmi_set_mac_address(struct wil6210_priv wil, void addr);
b8023177 VK	453	int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, u8 chan);
b8023177 VK	454	int wmi_pcp_stop(struct wil6210_priv *wil);
2be7d22f VK	455	void wil6210_disconnect(struct wil6210_priv wil, void bssid);
	456
	457	int wil_rx_init(struct wil6210_priv *wil);
	458	void wil_rx_fini(struct wil6210_priv *wil);
	459
	460	/* TX API */
	461	int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
	462	int cid, int tid);
	463	void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
	464
	465	netdev_tx_t wil_start_xmit(struct sk_buff skb, struct net_device ndev);
e0287c4a VK	466	int wil_tx_complete(struct wil6210_priv *wil, int ringid);
e0287c4a VK	467	void wil6210_unmask_irq_tx(struct wil6210_priv *wil);
2be7d22f VK	468
2be7d22f VK	469	/* RX API */
e0287c4a VK	470	void wil_rx_handle(struct wil6210_priv wil, int quota);
e0287c4a VK	471	void wil6210_unmask_irq_rx(struct wil6210_priv *wil);
2be7d22f VK	472
	473	int wil_iftype_nl2wmi(enum nl80211_iftype type);
	474
	475	#endif /* __WIL6210_H__ */