ath9k: Remove redundant variable for Interrupt Mitigation
[deliverable/linux.git] / drivers / net / wireless / ath9k / beacon.c
CommitLineData
f078f209 1/*
cee075a2 2 * Copyright (c) 2008-2009 Atheros Communications Inc.
f078f209
LR
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
394cf0a1 17#include "ath9k.h"
f078f209 18
5379c8a2
S
19#define FUDGE 2
20
f078f209 21/*
f078f209
LR
22 * This function will modify certain transmit queue properties depending on
23 * the operating mode of the station (AP or AdHoc). Parameters are AIFS
24 * settings and channel width min/max
25*/
f078f209
LR
26static int ath_beaconq_config(struct ath_softc *sc)
27{
cbe61d8a 28 struct ath_hw *ah = sc->sc_ah;
ea9880fb 29 struct ath9k_tx_queue_info qi;
f078f209 30
b77f483f 31 ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi);
2660b81a 32 if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) {
f078f209
LR
33 /* Always burst out beacon and CAB traffic. */
34 qi.tqi_aifs = 1;
35 qi.tqi_cwmin = 0;
36 qi.tqi_cwmax = 0;
37 } else {
38 /* Adhoc mode; important thing is to use 2x cwmin. */
b77f483f
S
39 qi.tqi_aifs = sc->beacon.beacon_qi.tqi_aifs;
40 qi.tqi_cwmin = 2*sc->beacon.beacon_qi.tqi_cwmin;
41 qi.tqi_cwmax = sc->beacon.beacon_qi.tqi_cwmax;
f078f209
LR
42 }
43
b77f483f 44 if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
f078f209 45 DPRINTF(sc, ATH_DBG_FATAL,
d8baa939 46 "Unable to update h/w beacon queue parameters\n");
f078f209
LR
47 return 0;
48 } else {
9fc9ab0a 49 ath9k_hw_resettxqueue(ah, sc->beacon.beaconq);
f078f209
LR
50 return 1;
51 }
52}
53
54/*
f078f209
LR
55 * Associates the beacon frame buffer with a transmit descriptor. Will set
56 * up all required antenna switch parameters, rate codes, and channel flags.
57 * Beacons are always sent out at the lowest rate, and are not retried.
58*/
9fc9ab0a
S
59static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp,
60 struct ath_buf *bf)
f078f209
LR
61{
62 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
cbe61d8a 63 struct ath_hw *ah = sc->sc_ah;
f078f209 64 struct ath_desc *ds;
980b24da 65 struct ath9k_11n_rate_series series[4];
e63835b0 66 struct ath_rate_table *rt;
9fc9ab0a
S
67 int flags, antenna, ctsrate = 0, ctsduration = 0;
68 u8 rate;
f078f209 69
f078f209 70 ds = bf->bf_desc;
f078f209
LR
71 flags = ATH9K_TXDESC_NOACK;
72
9cb5412b
PE
73 if (((sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
74 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) &&
2660b81a 75 (ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
f078f209
LR
76 ds->ds_link = bf->bf_daddr; /* self-linked */
77 flags |= ATH9K_TXDESC_VEOL;
78 /* Let hardware handle antenna switching. */
79 antenna = 0;
80 } else {
81 ds->ds_link = 0;
82 /*
83 * Switch antenna every beacon.
9fc9ab0a
S
84 * Should only switch every beacon period, not for every SWBA
85 * XXX assumes two antennae
f078f209 86 */
17d7904d 87 antenna = ((sc->beacon.ast_be_xmit / sc->nbcnvifs) & 1 ? 2 : 1);
f078f209
LR
88 }
89
90 ds->ds_data = bf->bf_buf_addr;
91
3706de6f 92 rt = sc->cur_rate_table;
9fc9ab0a 93 rate = rt->info[0].ratecode;
672840ac 94 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
9fc9ab0a
S
95 rate |= rt->info[0].short_preamble;
96
97 ath9k_hw_set11n_txdesc(ah, ds, skb->len + FCS_LEN,
98 ATH9K_PKT_TYPE_BEACON,
99 MAX_RATE_POWER,
100 ATH9K_TXKEYIX_INVALID,
101 ATH9K_KEY_TYPE_CLEAR,
102 flags);
f078f209
LR
103
104 /* NB: beacon's BufLen must be a multiple of 4 bytes */
9fc9ab0a
S
105 ath9k_hw_filltxdesc(ah, ds, roundup(skb->len, 4),
106 true, true, ds);
f078f209 107
0345f37b 108 memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
f078f209
LR
109 series[0].Tries = 1;
110 series[0].Rate = rate;
17d7904d 111 series[0].ChSel = sc->tx_chainmask;
f078f209 112 series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0;
9fc9ab0a
S
113 ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, ctsrate, ctsduration,
114 series, 4, 0);
f078f209
LR
115}
116
c52f33d0 117static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
2c3db3d5 118 struct ieee80211_vif *vif)
f078f209 119{
c52f33d0
JM
120 struct ath_wiphy *aphy = hw->priv;
121 struct ath_softc *sc = aphy->sc;
f078f209 122 struct ath_buf *bf;
17d7904d 123 struct ath_vif *avp;
f078f209 124 struct sk_buff *skb;
f078f209 125 struct ath_txq *cabq;
147583c0 126 struct ieee80211_tx_info *info;
980b24da
S
127 int cabq_depth;
128
f0ed85c6
JM
129 if (aphy->state != ATH_WIPHY_ACTIVE)
130 return NULL;
131
5640b08e 132 avp = (void *)vif->drv_priv;
b77f483f 133 cabq = sc->beacon.cabq;
f078f209 134
d8baa939 135 if (avp->av_bcbuf == NULL)
f078f209 136 return NULL;
980b24da 137
9fc9ab0a
S
138 /* Release the old beacon first */
139
f078f209 140 bf = avp->av_bcbuf;
980b24da 141 skb = (struct sk_buff *)bf->bf_mpdu;
a8fff50e 142 if (skb) {
7da3c55c 143 dma_unmap_single(sc->dev, bf->bf_dmacontext,
9fc9ab0a 144 skb->len, DMA_TO_DEVICE);
3fbb9d95 145 dev_kfree_skb_any(skb);
a8fff50e 146 }
f078f209 147
9fc9ab0a
S
148 /* Get a new beacon from mac80211 */
149
c52f33d0 150 skb = ieee80211_beacon_get(hw, vif);
a8fff50e
JM
151 bf->bf_mpdu = skb;
152 if (skb == NULL)
153 return NULL;
4ed96f04
JM
154 ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp =
155 avp->tsf_adjust;
980b24da 156
147583c0
JM
157 info = IEEE80211_SKB_CB(skb);
158 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
159 /*
160 * TODO: make sure the seq# gets assigned properly (vs. other
161 * TX frames)
162 */
980b24da 163 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
b77f483f 164 sc->tx.seq_no += 0x10;
147583c0 165 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
b77f483f 166 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
147583c0 167 }
980b24da 168
a8fff50e 169 bf->bf_buf_addr = bf->bf_dmacontext =
7da3c55c 170 dma_map_single(sc->dev, skb->data,
9fc9ab0a 171 skb->len, DMA_TO_DEVICE);
7da3c55c 172 if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
f8316df1
LR
173 dev_kfree_skb_any(skb);
174 bf->bf_mpdu = NULL;
9fc9ab0a 175 DPRINTF(sc, ATH_DBG_FATAL, "dma_mapping_error on beaconing\n");
f8316df1
LR
176 return NULL;
177 }
f078f209 178
c52f33d0 179 skb = ieee80211_get_buffered_bc(hw, vif);
f078f209 180
f078f209
LR
181 /*
182 * if the CABQ traffic from previous DTIM is pending and the current
183 * beacon is also a DTIM.
17d7904d
S
184 * 1) if there is only one vif let the cab traffic continue.
185 * 2) if there are more than one vif and we are using staggered
f078f209 186 * beacons, then drain the cabq by dropping all the frames in
17d7904d 187 * the cabq so that the current vifs cab traffic can be scheduled.
f078f209
LR
188 */
189 spin_lock_bh(&cabq->axq_lock);
190 cabq_depth = cabq->axq_depth;
191 spin_unlock_bh(&cabq->axq_lock);
192
e022edbd 193 if (skb && cabq_depth) {
17d7904d 194 if (sc->nvifs > 1) {
f078f209 195 DPRINTF(sc, ATH_DBG_BEACON,
9fc9ab0a
S
196 "Flushing previous cabq traffic\n");
197 ath_draintxq(sc, cabq, false);
f078f209
LR
198 }
199 }
200
f078f209
LR
201 ath_beacon_setup(sc, avp, bf);
202
e022edbd 203 while (skb) {
c52f33d0
JM
204 ath_tx_cabq(hw, skb);
205 skb = ieee80211_get_buffered_bc(hw, vif);
e022edbd 206 }
f078f209 207
f078f209
LR
208 return bf;
209}
210
211/*
212 * Startup beacon transmission for adhoc mode when they are sent entirely
213 * by the hardware using the self-linked descriptor + veol trick.
214*/
2c3db3d5
JM
215static void ath_beacon_start_adhoc(struct ath_softc *sc,
216 struct ieee80211_vif *vif)
f078f209 217{
cbe61d8a 218 struct ath_hw *ah = sc->sc_ah;
f078f209 219 struct ath_buf *bf;
17d7904d 220 struct ath_vif *avp;
f078f209
LR
221 struct sk_buff *skb;
222
5640b08e 223 avp = (void *)vif->drv_priv;
f078f209 224
9fc9ab0a 225 if (avp->av_bcbuf == NULL)
f078f209 226 return;
9fc9ab0a 227
f078f209
LR
228 bf = avp->av_bcbuf;
229 skb = (struct sk_buff *) bf->bf_mpdu;
230
f078f209
LR
231 ath_beacon_setup(sc, avp, bf);
232
233 /* NB: caller is known to have already stopped tx dma */
b77f483f
S
234 ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr);
235 ath9k_hw_txstart(ah, sc->beacon.beaconq);
04bd4638 236 DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n",
b77f483f 237 sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc);
f078f209
LR
238}
239
cbe61d8a 240int ath_beaconq_setup(struct ath_hw *ah)
f078f209 241{
ea9880fb 242 struct ath9k_tx_queue_info qi;
f078f209 243
0345f37b 244 memset(&qi, 0, sizeof(qi));
f078f209
LR
245 qi.tqi_aifs = 1;
246 qi.tqi_cwmin = 0;
247 qi.tqi_cwmax = 0;
248 /* NB: don't enable any interrupts */
249 return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
250}
251
c52f33d0 252int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
f078f209 253{
c52f33d0 254 struct ath_softc *sc = aphy->sc;
17d7904d 255 struct ath_vif *avp;
f078f209
LR
256 struct ath_buf *bf;
257 struct sk_buff *skb;
459f5f90 258 __le64 tstamp;
f078f209 259
5640b08e 260 avp = (void *)vif->drv_priv;
f078f209
LR
261
262 /* Allocate a beacon descriptor if we haven't done so. */
263 if (!avp->av_bcbuf) {
980b24da
S
264 /* Allocate beacon state for hostap/ibss. We know
265 * a buffer is available. */
b77f483f 266 avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf,
980b24da 267 struct ath_buf, list);
f078f209
LR
268 list_del(&avp->av_bcbuf->list);
269
2660b81a
S
270 if (sc->sc_ah->opmode == NL80211_IFTYPE_AP ||
271 !(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
f078f209
LR
272 int slot;
273 /*
17d7904d 274 * Assign the vif to a beacon xmit slot. As
f078f209
LR
275 * above, this cannot fail to find one.
276 */
277 avp->av_bslot = 0;
278 for (slot = 0; slot < ATH_BCBUF; slot++)
2c3db3d5 279 if (sc->beacon.bslot[slot] == NULL) {
f078f209
LR
280 /*
281 * XXX hack, space out slots to better
282 * deal with misses
283 */
284 if (slot+1 < ATH_BCBUF &&
2c3db3d5 285 sc->beacon.bslot[slot+1] == NULL) {
f078f209
LR
286 avp->av_bslot = slot+1;
287 break;
288 }
289 avp->av_bslot = slot;
290 /* NB: keep looking for a double slot */
291 }
2c3db3d5
JM
292 BUG_ON(sc->beacon.bslot[avp->av_bslot] != NULL);
293 sc->beacon.bslot[avp->av_bslot] = vif;
c52f33d0 294 sc->beacon.bslot_aphy[avp->av_bslot] = aphy;
17d7904d 295 sc->nbcnvifs++;
f078f209
LR
296 }
297 }
298
9fc9ab0a 299 /* release the previous beacon frame, if it already exists. */
f078f209
LR
300 bf = avp->av_bcbuf;
301 if (bf->bf_mpdu != NULL) {
302 skb = (struct sk_buff *)bf->bf_mpdu;
7da3c55c 303 dma_unmap_single(sc->dev, bf->bf_dmacontext,
9fc9ab0a 304 skb->len, DMA_TO_DEVICE);
f078f209
LR
305 dev_kfree_skb_any(skb);
306 bf->bf_mpdu = NULL;
307 }
308
9fc9ab0a 309 /* NB: the beacon data buffer must be 32-bit aligned. */
5640b08e 310 skb = ieee80211_beacon_get(sc->hw, vif);
f078f209 311 if (skb == NULL) {
04bd4638 312 DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n");
f078f209
LR
313 return -ENOMEM;
314 }
315
459f5f90 316 tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
b77f483f 317 sc->beacon.bc_tstamp = le64_to_cpu(tstamp);
4ed96f04 318 /* Calculate a TSF adjustment factor required for staggered beacons. */
f078f209
LR
319 if (avp->av_bslot > 0) {
320 u64 tsfadjust;
f078f209
LR
321 int intval;
322
a8fff50e
JM
323 intval = sc->hw->conf.beacon_int ?
324 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
f078f209
LR
325
326 /*
4ed96f04
JM
327 * Calculate the TSF offset for this beacon slot, i.e., the
328 * number of usecs that need to be added to the timestamp field
329 * in Beacon and Probe Response frames. Beacon slot 0 is
330 * processed at the correct offset, so it does not require TSF
331 * adjustment. Other slots are adjusted to get the timestamp
332 * close to the TBTT for the BSS.
f078f209 333 */
4ed96f04
JM
334 tsfadjust = intval * avp->av_bslot / ATH_BCBUF;
335 avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust));
f078f209
LR
336
337 DPRINTF(sc, ATH_DBG_BEACON,
04bd4638 338 "stagger beacons, bslot %d intval %u tsfadjust %llu\n",
f078f209
LR
339 avp->av_bslot, intval, (unsigned long long)tsfadjust);
340
4ed96f04
JM
341 ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp =
342 avp->tsf_adjust;
343 } else
344 avp->tsf_adjust = cpu_to_le64(0);
f078f209 345
f8316df1 346 bf->bf_mpdu = skb;
a8fff50e 347 bf->bf_buf_addr = bf->bf_dmacontext =
7da3c55c 348 dma_map_single(sc->dev, skb->data,
9fc9ab0a 349 skb->len, DMA_TO_DEVICE);
7da3c55c 350 if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
f8316df1
LR
351 dev_kfree_skb_any(skb);
352 bf->bf_mpdu = NULL;
9fc9ab0a
S
353 DPRINTF(sc, ATH_DBG_FATAL,
354 "dma_mapping_error on beacon alloc\n");
f8316df1
LR
355 return -ENOMEM;
356 }
f078f209
LR
357
358 return 0;
359}
360
17d7904d 361void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp)
f078f209
LR
362{
363 if (avp->av_bcbuf != NULL) {
364 struct ath_buf *bf;
365
366 if (avp->av_bslot != -1) {
2c3db3d5 367 sc->beacon.bslot[avp->av_bslot] = NULL;
c52f33d0 368 sc->beacon.bslot_aphy[avp->av_bslot] = NULL;
17d7904d 369 sc->nbcnvifs--;
f078f209
LR
370 }
371
372 bf = avp->av_bcbuf;
373 if (bf->bf_mpdu != NULL) {
374 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
7da3c55c 375 dma_unmap_single(sc->dev, bf->bf_dmacontext,
9fc9ab0a 376 skb->len, DMA_TO_DEVICE);
f078f209
LR
377 dev_kfree_skb_any(skb);
378 bf->bf_mpdu = NULL;
379 }
b77f483f 380 list_add_tail(&bf->list, &sc->beacon.bbuf);
f078f209
LR
381
382 avp->av_bcbuf = NULL;
383 }
384}
385
9fc9ab0a 386void ath_beacon_tasklet(unsigned long data)
f078f209 387{
f078f209 388 struct ath_softc *sc = (struct ath_softc *)data;
cbe61d8a 389 struct ath_hw *ah = sc->sc_ah;
f078f209 390 struct ath_buf *bf = NULL;
2c3db3d5 391 struct ieee80211_vif *vif;
c52f33d0 392 struct ath_wiphy *aphy;
2c3db3d5 393 int slot;
9546aae0 394 u32 bfaddr, bc = 0, tsftu;
f078f209 395 u64 tsf;
f078f209
LR
396 u16 intval;
397
f078f209
LR
398 /*
399 * Check if the previous beacon has gone out. If
400 * not don't try to post another, skip this period
401 * and wait for the next. Missed beacons indicate
402 * a problem and should not occur. If we miss too
403 * many consecutive beacons reset the device.
404 */
b77f483f
S
405 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0) {
406 sc->beacon.bmisscnt++;
9546aae0 407
b77f483f 408 if (sc->beacon.bmisscnt < BSTUCK_THRESH) {
9546aae0
S
409 DPRINTF(sc, ATH_DBG_BEACON,
410 "missed %u consecutive beacons\n",
411 sc->beacon.bmisscnt);
b77f483f 412 } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
9546aae0
S
413 DPRINTF(sc, ATH_DBG_BEACON,
414 "beacon is officially stuck\n");
415 ath_reset(sc, false);
f078f209 416 }
9546aae0 417
f078f209
LR
418 return;
419 }
980b24da 420
b77f483f 421 if (sc->beacon.bmisscnt != 0) {
9546aae0
S
422 DPRINTF(sc, ATH_DBG_BEACON,
423 "resume beacon xmit after %u misses\n",
424 sc->beacon.bmisscnt);
b77f483f 425 sc->beacon.bmisscnt = 0;
f078f209
LR
426 }
427
428 /*
429 * Generate beacon frames. we are sending frames
430 * staggered so calculate the slot for this frame based
431 * on the tsf to safeguard against missing an swba.
432 */
433
a8fff50e
JM
434 intval = sc->hw->conf.beacon_int ?
435 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
f078f209
LR
436
437 tsf = ath9k_hw_gettsf64(ah);
438 tsftu = TSF_TO_TU(tsf>>32, tsf);
439 slot = ((tsftu % intval) * ATH_BCBUF) / intval;
4ed96f04
JM
440 /*
441 * Reverse the slot order to get slot 0 on the TBTT offset that does
442 * not require TSF adjustment and other slots adding
443 * slot/ATH_BCBUF * beacon_int to timestamp. For example, with
444 * ATH_BCBUF = 4, we process beacon slots as follows: 3 2 1 0 3 2 1 ..
445 * and slot 0 is at correct offset to TBTT.
446 */
447 slot = ATH_BCBUF - slot - 1;
448 vif = sc->beacon.bslot[slot];
449 aphy = sc->beacon.bslot_aphy[slot];
980b24da 450
f078f209 451 DPRINTF(sc, ATH_DBG_BEACON,
2c3db3d5
JM
452 "slot %d [tsf %llu tsftu %u intval %u] vif %p\n",
453 slot, tsf, tsftu, intval, vif);
980b24da 454
f078f209 455 bfaddr = 0;
2c3db3d5 456 if (vif) {
c52f33d0 457 bf = ath_beacon_generate(aphy->hw, vif);
f078f209
LR
458 if (bf != NULL) {
459 bfaddr = bf->bf_daddr;
460 bc = 1;
461 }
462 }
9546aae0 463
f078f209
LR
464 /*
465 * Handle slot time change when a non-ERP station joins/leaves
466 * an 11g network. The 802.11 layer notifies us via callback,
467 * we mark updateslot, then wait one beacon before effecting
468 * the change. This gives associated stations at least one
469 * beacon interval to note the state change.
470 *
471 * NB: The slot time change state machine is clocked according
472 * to whether we are bursting or staggering beacons. We
473 * recognize the request to update and record the current
474 * slot then don't transition until that slot is reached
475 * again. If we miss a beacon for that slot then we'll be
476 * slow to transition but we'll be sure at least one beacon
477 * interval has passed. When bursting slot is always left
478 * set to ATH_BCBUF so this check is a noop.
479 */
b77f483f
S
480 if (sc->beacon.updateslot == UPDATE) {
481 sc->beacon.updateslot = COMMIT; /* commit next beacon */
482 sc->beacon.slotupdate = slot;
483 } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) {
484 ath9k_hw_setslottime(sc->sc_ah, sc->beacon.slottime);
485 sc->beacon.updateslot = OK;
ff37e337 486 }
f078f209
LR
487 if (bfaddr != 0) {
488 /*
489 * Stop any current dma and put the new frame(s) on the queue.
490 * This should never fail since we check above that no frames
491 * are still pending on the queue.
492 */
b77f483f 493 if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) {
f078f209 494 DPRINTF(sc, ATH_DBG_FATAL,
b77f483f 495 "beacon queue %u did not stop?\n", sc->beacon.beaconq);
f078f209
LR
496 }
497
498 /* NB: cabq traffic should already be queued and primed */
b77f483f
S
499 ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr);
500 ath9k_hw_txstart(ah, sc->beacon.beaconq);
f078f209 501
17d7904d 502 sc->beacon.ast_be_xmit += bc; /* XXX per-vif? */
f078f209 503 }
f078f209
LR
504}
505
f078f209 506/*
5379c8a2
S
507 * For multi-bss ap support beacons are either staggered evenly over N slots or
508 * burst together. For the former arrange for the SWBA to be delivered for each
509 * slot. Slots that are not occupied will generate nothing.
f078f209 510 */
5379c8a2
S
511static void ath_beacon_config_ap(struct ath_softc *sc,
512 struct ath_beacon_config *conf,
513 struct ath_vif *avp)
f078f209 514{
980b24da 515 u32 nexttbtt, intval;
f078f209 516
b238e90e
S
517 /* Configure the timers only when the TSF has to be reset */
518
519 if (!(sc->sc_flags & SC_OP_TSF_RESET))
520 return;
521
5379c8a2
S
522 /* NB: the beacon interval is kept internally in TU's */
523 intval = conf->beacon_interval & ATH9K_BEACON_PERIOD;
524 intval /= ATH_BCBUF; /* for staggered beacons */
525 nexttbtt = intval;
526 intval |= ATH9K_BEACON_RESET_TSF;
f078f209 527
5379c8a2
S
528 /*
529 * In AP mode we enable the beacon timers and SWBA interrupts to
530 * prepare beacon frames.
531 */
532 intval |= ATH9K_BEACON_ENA;
533 sc->imask |= ATH9K_INT_SWBA;
534 ath_beaconq_config(sc);
f078f209 535
5379c8a2 536 /* Set the computed AP beacon timers */
f078f209 537
5379c8a2
S
538 ath9k_hw_set_interrupts(sc->sc_ah, 0);
539 ath9k_hw_beaconinit(sc->sc_ah, nexttbtt, intval);
540 sc->beacon.bmisscnt = 0;
541 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
b238e90e
S
542
543 /* Clear the reset TSF flag, so that subsequent beacon updation
544 will not reset the HW TSF. */
545
546 sc->sc_flags &= ~SC_OP_TSF_RESET;
5379c8a2 547}
459f5f90 548
5379c8a2
S
549/*
550 * This sets up the beacon timers according to the timestamp of the last
551 * received beacon and the current TSF, configures PCF and DTIM
552 * handling, programs the sleep registers so the hardware will wakeup in
553 * time to receive beacons, and configures the beacon miss handling so
554 * we'll receive a BMISS interrupt when we stop seeing beacons from the AP
555 * we've associated with.
556 */
557static void ath_beacon_config_sta(struct ath_softc *sc,
558 struct ath_beacon_config *conf,
559 struct ath_vif *avp)
560{
561 struct ath9k_beacon_state bs;
562 int dtimperiod, dtimcount, sleepduration;
563 int cfpperiod, cfpcount;
564 u32 nexttbtt = 0, intval, tsftu;
565 u64 tsf;
566
567 memset(&bs, 0, sizeof(bs));
568 intval = conf->beacon_interval & ATH9K_BEACON_PERIOD;
569
570 /*
571 * Setup dtim and cfp parameters according to
572 * last beacon we received (which may be none).
573 */
574 dtimperiod = conf->dtim_period;
575 if (dtimperiod <= 0) /* NB: 0 if not known */
576 dtimperiod = 1;
577 dtimcount = conf->dtim_count;
578 if (dtimcount >= dtimperiod) /* NB: sanity check */
579 dtimcount = 0;
580 cfpperiod = 1; /* NB: no PCF support yet */
581 cfpcount = 0;
582
583 sleepduration = conf->listen_interval * intval;
584 if (sleepduration <= 0)
585 sleepduration = intval;
586
587 /*
588 * Pull nexttbtt forward to reflect the current
589 * TSF and calculate dtim+cfp state for the result.
590 */
591 tsf = ath9k_hw_gettsf64(sc->sc_ah);
592 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
593 do {
594 nexttbtt += intval;
595 if (--dtimcount < 0) {
596 dtimcount = dtimperiod - 1;
597 if (--cfpcount < 0)
598 cfpcount = cfpperiod - 1;
599 }
600 } while (nexttbtt < tsftu);
601
602 bs.bs_intval = intval;
603 bs.bs_nexttbtt = nexttbtt;
604 bs.bs_dtimperiod = dtimperiod*intval;
605 bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
606 bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
607 bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
608 bs.bs_cfpmaxduration = 0;
609
610 /*
611 * Calculate the number of consecutive beacons to miss* before taking
612 * a BMISS interrupt. The configuration is specified in TU so we only
613 * need calculate based on the beacon interval. Note that we clamp the
614 * result to at most 15 beacons.
615 */
616 if (sleepduration > intval) {
617 bs.bs_bmissthreshold = conf->listen_interval *
618 ATH_DEFAULT_BMISS_LIMIT / 2;
f078f209 619 } else {
5379c8a2
S
620 bs.bs_bmissthreshold = DIV_ROUND_UP(conf->bmiss_timeout, intval);
621 if (bs.bs_bmissthreshold > 15)
622 bs.bs_bmissthreshold = 15;
623 else if (bs.bs_bmissthreshold <= 0)
624 bs.bs_bmissthreshold = 1;
f078f209
LR
625 }
626
5379c8a2
S
627 /*
628 * Calculate sleep duration. The configuration is given in ms.
629 * We ensure a multiple of the beacon period is used. Also, if the sleep
630 * duration is greater than the DTIM period then it makes senses
631 * to make it a multiple of that.
632 *
633 * XXX fixed at 100ms
634 */
980b24da 635
5379c8a2
S
636 bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100), sleepduration);
637 if (bs.bs_sleepduration > bs.bs_dtimperiod)
638 bs.bs_sleepduration = bs.bs_dtimperiod;
980b24da 639
5379c8a2
S
640 /* TSF out of range threshold fixed at 1 second */
641 bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD;
f078f209 642
5379c8a2
S
643 DPRINTF(sc, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu);
644 DPRINTF(sc, ATH_DBG_BEACON,
645 "bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n",
646 bs.bs_bmissthreshold, bs.bs_sleepduration,
647 bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext);
f078f209 648
5379c8a2 649 /* Set the computed STA beacon timers */
980b24da 650
5379c8a2
S
651 ath9k_hw_set_interrupts(sc->sc_ah, 0);
652 ath9k_hw_set_sta_beacon_timers(sc->sc_ah, &bs);
653 sc->imask |= ATH9K_INT_BMISS;
654 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
655}
f078f209 656
5379c8a2
S
657static void ath_beacon_config_adhoc(struct ath_softc *sc,
658 struct ath_beacon_config *conf,
2c3db3d5
JM
659 struct ath_vif *avp,
660 struct ieee80211_vif *vif)
5379c8a2
S
661{
662 u64 tsf;
663 u32 tsftu, intval, nexttbtt;
f078f209 664
5379c8a2 665 intval = conf->beacon_interval & ATH9K_BEACON_PERIOD;
f078f209 666
5379c8a2 667 /* Pull nexttbtt forward to reflect the current TSF */
4af9cf4f 668
5379c8a2
S
669 nexttbtt = TSF_TO_TU(sc->beacon.bc_tstamp >> 32, sc->beacon.bc_tstamp);
670 if (nexttbtt == 0)
671 nexttbtt = intval;
672 else if (intval)
673 nexttbtt = roundup(nexttbtt, intval);
9fc9ab0a 674
5379c8a2
S
675 tsf = ath9k_hw_gettsf64(sc->sc_ah);
676 tsftu = TSF_TO_TU((u32)(tsf>>32), (u32)tsf) + FUDGE;
677 do {
678 nexttbtt += intval;
679 } while (nexttbtt < tsftu);
f078f209 680
5379c8a2
S
681 DPRINTF(sc, ATH_DBG_BEACON,
682 "IBSS nexttbtt %u intval %u (%u)\n",
683 nexttbtt, intval, conf->beacon_interval);
9fc9ab0a 684
5379c8a2
S
685 /*
686 * In IBSS mode enable the beacon timers but only enable SWBA interrupts
687 * if we need to manually prepare beacon frames. Otherwise we use a
688 * self-linked tx descriptor and let the hardware deal with things.
689 */
690 intval |= ATH9K_BEACON_ENA;
691 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL))
692 sc->imask |= ATH9K_INT_SWBA;
9fc9ab0a 693
5379c8a2
S
694 ath_beaconq_config(sc);
695
696 /* Set the computed ADHOC beacon timers */
697
698 ath9k_hw_set_interrupts(sc->sc_ah, 0);
699 ath9k_hw_beaconinit(sc->sc_ah, nexttbtt, intval);
700 sc->beacon.bmisscnt = 0;
701 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
702
703 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)
2c3db3d5 704 ath_beacon_start_adhoc(sc, vif);
f078f209
LR
705}
706
2c3db3d5 707void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
f078f209 708{
5379c8a2 709 struct ath_beacon_config conf;
5379c8a2
S
710
711 /* Setup the beacon configuration parameters */
712
713 memset(&conf, 0, sizeof(struct ath_beacon_config));
714 conf.beacon_interval = sc->hw->conf.beacon_int ?
715 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
716 conf.listen_interval = 1;
717 conf.dtim_period = conf.beacon_interval;
718 conf.dtim_count = 1;
719 conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval;
720
2c3db3d5
JM
721 if (vif) {
722 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
5379c8a2
S
723
724 switch(avp->av_opmode) {
725 case NL80211_IFTYPE_AP:
726 ath_beacon_config_ap(sc, &conf, avp);
727 break;
728 case NL80211_IFTYPE_ADHOC:
9cb5412b 729 case NL80211_IFTYPE_MESH_POINT:
2c3db3d5 730 ath_beacon_config_adhoc(sc, &conf, avp, vif);
5379c8a2
S
731 break;
732 case NL80211_IFTYPE_STATION:
733 ath_beacon_config_sta(sc, &conf, avp);
734 break;
735 default:
736 DPRINTF(sc, ATH_DBG_CONFIG,
737 "Unsupported beaconing mode\n");
738 return;
739 }
740
741 sc->sc_flags |= SC_OP_BEACONS;
742 }
f078f209 743}
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