Commit | Line | Data |
---|---|---|
f078f209 | 1 | /* |
cee075a2 | 2 | * Copyright (c) 2008-2009 Atheros Communications Inc. |
f078f209 LR |
3 | * |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
394cf0a1 | 17 | #include "ath9k.h" |
f078f209 | 18 | |
5379c8a2 S |
19 | #define FUDGE 2 |
20 | ||
f078f209 | 21 | /* |
f078f209 LR |
22 | * This function will modify certain transmit queue properties depending on |
23 | * the operating mode of the station (AP or AdHoc). Parameters are AIFS | |
24 | * settings and channel width min/max | |
25 | */ | |
f078f209 LR |
26 | static int ath_beaconq_config(struct ath_softc *sc) |
27 | { | |
cbe61d8a | 28 | struct ath_hw *ah = sc->sc_ah; |
ea9880fb | 29 | struct ath9k_tx_queue_info qi; |
f078f209 | 30 | |
b77f483f | 31 | ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi); |
2660b81a | 32 | if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) { |
f078f209 LR |
33 | /* Always burst out beacon and CAB traffic. */ |
34 | qi.tqi_aifs = 1; | |
35 | qi.tqi_cwmin = 0; | |
36 | qi.tqi_cwmax = 0; | |
37 | } else { | |
38 | /* Adhoc mode; important thing is to use 2x cwmin. */ | |
b77f483f S |
39 | qi.tqi_aifs = sc->beacon.beacon_qi.tqi_aifs; |
40 | qi.tqi_cwmin = 2*sc->beacon.beacon_qi.tqi_cwmin; | |
41 | qi.tqi_cwmax = sc->beacon.beacon_qi.tqi_cwmax; | |
f078f209 LR |
42 | } |
43 | ||
b77f483f | 44 | if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) { |
f078f209 | 45 | DPRINTF(sc, ATH_DBG_FATAL, |
04bd4638 | 46 | "unable to update h/w beacon queue parameters\n"); |
f078f209 LR |
47 | return 0; |
48 | } else { | |
9fc9ab0a | 49 | ath9k_hw_resettxqueue(ah, sc->beacon.beaconq); |
f078f209 LR |
50 | return 1; |
51 | } | |
52 | } | |
53 | ||
54 | /* | |
f078f209 LR |
55 | * Associates the beacon frame buffer with a transmit descriptor. Will set |
56 | * up all required antenna switch parameters, rate codes, and channel flags. | |
57 | * Beacons are always sent out at the lowest rate, and are not retried. | |
58 | */ | |
9fc9ab0a S |
59 | static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp, |
60 | struct ath_buf *bf) | |
f078f209 LR |
61 | { |
62 | struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu; | |
cbe61d8a | 63 | struct ath_hw *ah = sc->sc_ah; |
f078f209 | 64 | struct ath_desc *ds; |
980b24da | 65 | struct ath9k_11n_rate_series series[4]; |
e63835b0 | 66 | struct ath_rate_table *rt; |
9fc9ab0a S |
67 | int flags, antenna, ctsrate = 0, ctsduration = 0; |
68 | u8 rate; | |
f078f209 | 69 | |
f078f209 | 70 | ds = bf->bf_desc; |
f078f209 LR |
71 | flags = ATH9K_TXDESC_NOACK; |
72 | ||
9cb5412b PE |
73 | if (((sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) || |
74 | (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) && | |
2660b81a | 75 | (ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) { |
f078f209 LR |
76 | ds->ds_link = bf->bf_daddr; /* self-linked */ |
77 | flags |= ATH9K_TXDESC_VEOL; | |
78 | /* Let hardware handle antenna switching. */ | |
79 | antenna = 0; | |
80 | } else { | |
81 | ds->ds_link = 0; | |
82 | /* | |
83 | * Switch antenna every beacon. | |
9fc9ab0a S |
84 | * Should only switch every beacon period, not for every SWBA |
85 | * XXX assumes two antennae | |
f078f209 | 86 | */ |
17d7904d | 87 | antenna = ((sc->beacon.ast_be_xmit / sc->nbcnvifs) & 1 ? 2 : 1); |
f078f209 LR |
88 | } |
89 | ||
90 | ds->ds_data = bf->bf_buf_addr; | |
91 | ||
3706de6f | 92 | rt = sc->cur_rate_table; |
9fc9ab0a | 93 | rate = rt->info[0].ratecode; |
672840ac | 94 | if (sc->sc_flags & SC_OP_PREAMBLE_SHORT) |
9fc9ab0a S |
95 | rate |= rt->info[0].short_preamble; |
96 | ||
97 | ath9k_hw_set11n_txdesc(ah, ds, skb->len + FCS_LEN, | |
98 | ATH9K_PKT_TYPE_BEACON, | |
99 | MAX_RATE_POWER, | |
100 | ATH9K_TXKEYIX_INVALID, | |
101 | ATH9K_KEY_TYPE_CLEAR, | |
102 | flags); | |
f078f209 LR |
103 | |
104 | /* NB: beacon's BufLen must be a multiple of 4 bytes */ | |
9fc9ab0a S |
105 | ath9k_hw_filltxdesc(ah, ds, roundup(skb->len, 4), |
106 | true, true, ds); | |
f078f209 | 107 | |
0345f37b | 108 | memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4); |
f078f209 LR |
109 | series[0].Tries = 1; |
110 | series[0].Rate = rate; | |
17d7904d | 111 | series[0].ChSel = sc->tx_chainmask; |
f078f209 | 112 | series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0; |
9fc9ab0a S |
113 | ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, ctsrate, ctsduration, |
114 | series, 4, 0); | |
f078f209 LR |
115 | } |
116 | ||
c52f33d0 | 117 | static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw, |
2c3db3d5 | 118 | struct ieee80211_vif *vif) |
f078f209 | 119 | { |
c52f33d0 JM |
120 | struct ath_wiphy *aphy = hw->priv; |
121 | struct ath_softc *sc = aphy->sc; | |
f078f209 | 122 | struct ath_buf *bf; |
17d7904d | 123 | struct ath_vif *avp; |
f078f209 | 124 | struct sk_buff *skb; |
f078f209 | 125 | struct ath_txq *cabq; |
147583c0 | 126 | struct ieee80211_tx_info *info; |
980b24da S |
127 | int cabq_depth; |
128 | ||
f0ed85c6 JM |
129 | if (aphy->state != ATH_WIPHY_ACTIVE) |
130 | return NULL; | |
131 | ||
5640b08e | 132 | avp = (void *)vif->drv_priv; |
b77f483f | 133 | cabq = sc->beacon.cabq; |
f078f209 | 134 | |
f078f209 | 135 | if (avp->av_bcbuf == NULL) { |
04bd4638 S |
136 | DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n", |
137 | avp, avp->av_bcbuf); | |
f078f209 LR |
138 | return NULL; |
139 | } | |
980b24da | 140 | |
9fc9ab0a S |
141 | /* Release the old beacon first */ |
142 | ||
f078f209 | 143 | bf = avp->av_bcbuf; |
980b24da | 144 | skb = (struct sk_buff *)bf->bf_mpdu; |
a8fff50e | 145 | if (skb) { |
7da3c55c | 146 | dma_unmap_single(sc->dev, bf->bf_dmacontext, |
9fc9ab0a | 147 | skb->len, DMA_TO_DEVICE); |
3fbb9d95 | 148 | dev_kfree_skb_any(skb); |
a8fff50e | 149 | } |
f078f209 | 150 | |
9fc9ab0a S |
151 | /* Get a new beacon from mac80211 */ |
152 | ||
c52f33d0 | 153 | skb = ieee80211_beacon_get(hw, vif); |
a8fff50e JM |
154 | bf->bf_mpdu = skb; |
155 | if (skb == NULL) | |
156 | return NULL; | |
4ed96f04 JM |
157 | ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp = |
158 | avp->tsf_adjust; | |
980b24da | 159 | |
147583c0 JM |
160 | info = IEEE80211_SKB_CB(skb); |
161 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
162 | /* | |
163 | * TODO: make sure the seq# gets assigned properly (vs. other | |
164 | * TX frames) | |
165 | */ | |
980b24da | 166 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
b77f483f | 167 | sc->tx.seq_no += 0x10; |
147583c0 | 168 | hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
b77f483f | 169 | hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no); |
147583c0 | 170 | } |
980b24da | 171 | |
a8fff50e | 172 | bf->bf_buf_addr = bf->bf_dmacontext = |
7da3c55c | 173 | dma_map_single(sc->dev, skb->data, |
9fc9ab0a | 174 | skb->len, DMA_TO_DEVICE); |
7da3c55c | 175 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { |
f8316df1 LR |
176 | dev_kfree_skb_any(skb); |
177 | bf->bf_mpdu = NULL; | |
9fc9ab0a | 178 | DPRINTF(sc, ATH_DBG_FATAL, "dma_mapping_error on beaconing\n"); |
f8316df1 LR |
179 | return NULL; |
180 | } | |
f078f209 | 181 | |
c52f33d0 | 182 | skb = ieee80211_get_buffered_bc(hw, vif); |
f078f209 | 183 | |
f078f209 LR |
184 | /* |
185 | * if the CABQ traffic from previous DTIM is pending and the current | |
186 | * beacon is also a DTIM. | |
17d7904d S |
187 | * 1) if there is only one vif let the cab traffic continue. |
188 | * 2) if there are more than one vif and we are using staggered | |
f078f209 | 189 | * beacons, then drain the cabq by dropping all the frames in |
17d7904d | 190 | * the cabq so that the current vifs cab traffic can be scheduled. |
f078f209 LR |
191 | */ |
192 | spin_lock_bh(&cabq->axq_lock); | |
193 | cabq_depth = cabq->axq_depth; | |
194 | spin_unlock_bh(&cabq->axq_lock); | |
195 | ||
e022edbd | 196 | if (skb && cabq_depth) { |
17d7904d | 197 | if (sc->nvifs > 1) { |
f078f209 | 198 | DPRINTF(sc, ATH_DBG_BEACON, |
9fc9ab0a S |
199 | "Flushing previous cabq traffic\n"); |
200 | ath_draintxq(sc, cabq, false); | |
f078f209 LR |
201 | } |
202 | } | |
203 | ||
f078f209 LR |
204 | ath_beacon_setup(sc, avp, bf); |
205 | ||
e022edbd | 206 | while (skb) { |
c52f33d0 JM |
207 | ath_tx_cabq(hw, skb); |
208 | skb = ieee80211_get_buffered_bc(hw, vif); | |
e022edbd | 209 | } |
f078f209 | 210 | |
f078f209 LR |
211 | return bf; |
212 | } | |
213 | ||
214 | /* | |
215 | * Startup beacon transmission for adhoc mode when they are sent entirely | |
216 | * by the hardware using the self-linked descriptor + veol trick. | |
217 | */ | |
2c3db3d5 JM |
218 | static void ath_beacon_start_adhoc(struct ath_softc *sc, |
219 | struct ieee80211_vif *vif) | |
f078f209 | 220 | { |
cbe61d8a | 221 | struct ath_hw *ah = sc->sc_ah; |
f078f209 | 222 | struct ath_buf *bf; |
17d7904d | 223 | struct ath_vif *avp; |
f078f209 LR |
224 | struct sk_buff *skb; |
225 | ||
5640b08e | 226 | avp = (void *)vif->drv_priv; |
f078f209 | 227 | |
9fc9ab0a | 228 | if (avp->av_bcbuf == NULL) |
f078f209 | 229 | return; |
9fc9ab0a | 230 | |
f078f209 LR |
231 | bf = avp->av_bcbuf; |
232 | skb = (struct sk_buff *) bf->bf_mpdu; | |
233 | ||
f078f209 LR |
234 | ath_beacon_setup(sc, avp, bf); |
235 | ||
236 | /* NB: caller is known to have already stopped tx dma */ | |
b77f483f S |
237 | ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr); |
238 | ath9k_hw_txstart(ah, sc->beacon.beaconq); | |
04bd4638 | 239 | DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n", |
b77f483f | 240 | sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc); |
f078f209 LR |
241 | } |
242 | ||
cbe61d8a | 243 | int ath_beaconq_setup(struct ath_hw *ah) |
f078f209 | 244 | { |
ea9880fb | 245 | struct ath9k_tx_queue_info qi; |
f078f209 | 246 | |
0345f37b | 247 | memset(&qi, 0, sizeof(qi)); |
f078f209 LR |
248 | qi.tqi_aifs = 1; |
249 | qi.tqi_cwmin = 0; | |
250 | qi.tqi_cwmax = 0; | |
251 | /* NB: don't enable any interrupts */ | |
252 | return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi); | |
253 | } | |
254 | ||
c52f33d0 | 255 | int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif) |
f078f209 | 256 | { |
c52f33d0 | 257 | struct ath_softc *sc = aphy->sc; |
17d7904d | 258 | struct ath_vif *avp; |
f078f209 LR |
259 | struct ath_buf *bf; |
260 | struct sk_buff *skb; | |
459f5f90 | 261 | __le64 tstamp; |
f078f209 | 262 | |
5640b08e | 263 | avp = (void *)vif->drv_priv; |
f078f209 LR |
264 | |
265 | /* Allocate a beacon descriptor if we haven't done so. */ | |
266 | if (!avp->av_bcbuf) { | |
980b24da S |
267 | /* Allocate beacon state for hostap/ibss. We know |
268 | * a buffer is available. */ | |
b77f483f | 269 | avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf, |
980b24da | 270 | struct ath_buf, list); |
f078f209 LR |
271 | list_del(&avp->av_bcbuf->list); |
272 | ||
2660b81a S |
273 | if (sc->sc_ah->opmode == NL80211_IFTYPE_AP || |
274 | !(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) { | |
f078f209 LR |
275 | int slot; |
276 | /* | |
17d7904d | 277 | * Assign the vif to a beacon xmit slot. As |
f078f209 LR |
278 | * above, this cannot fail to find one. |
279 | */ | |
280 | avp->av_bslot = 0; | |
281 | for (slot = 0; slot < ATH_BCBUF; slot++) | |
2c3db3d5 | 282 | if (sc->beacon.bslot[slot] == NULL) { |
f078f209 LR |
283 | /* |
284 | * XXX hack, space out slots to better | |
285 | * deal with misses | |
286 | */ | |
287 | if (slot+1 < ATH_BCBUF && | |
2c3db3d5 | 288 | sc->beacon.bslot[slot+1] == NULL) { |
f078f209 LR |
289 | avp->av_bslot = slot+1; |
290 | break; | |
291 | } | |
292 | avp->av_bslot = slot; | |
293 | /* NB: keep looking for a double slot */ | |
294 | } | |
2c3db3d5 JM |
295 | BUG_ON(sc->beacon.bslot[avp->av_bslot] != NULL); |
296 | sc->beacon.bslot[avp->av_bslot] = vif; | |
c52f33d0 | 297 | sc->beacon.bslot_aphy[avp->av_bslot] = aphy; |
17d7904d | 298 | sc->nbcnvifs++; |
f078f209 LR |
299 | } |
300 | } | |
301 | ||
9fc9ab0a | 302 | /* release the previous beacon frame, if it already exists. */ |
f078f209 LR |
303 | bf = avp->av_bcbuf; |
304 | if (bf->bf_mpdu != NULL) { | |
305 | skb = (struct sk_buff *)bf->bf_mpdu; | |
7da3c55c | 306 | dma_unmap_single(sc->dev, bf->bf_dmacontext, |
9fc9ab0a | 307 | skb->len, DMA_TO_DEVICE); |
f078f209 LR |
308 | dev_kfree_skb_any(skb); |
309 | bf->bf_mpdu = NULL; | |
310 | } | |
311 | ||
9fc9ab0a | 312 | /* NB: the beacon data buffer must be 32-bit aligned. */ |
5640b08e | 313 | skb = ieee80211_beacon_get(sc->hw, vif); |
f078f209 | 314 | if (skb == NULL) { |
04bd4638 | 315 | DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n"); |
f078f209 LR |
316 | return -ENOMEM; |
317 | } | |
318 | ||
459f5f90 | 319 | tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; |
b77f483f | 320 | sc->beacon.bc_tstamp = le64_to_cpu(tstamp); |
4ed96f04 | 321 | /* Calculate a TSF adjustment factor required for staggered beacons. */ |
f078f209 LR |
322 | if (avp->av_bslot > 0) { |
323 | u64 tsfadjust; | |
f078f209 LR |
324 | int intval; |
325 | ||
a8fff50e JM |
326 | intval = sc->hw->conf.beacon_int ? |
327 | sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL; | |
f078f209 LR |
328 | |
329 | /* | |
4ed96f04 JM |
330 | * Calculate the TSF offset for this beacon slot, i.e., the |
331 | * number of usecs that need to be added to the timestamp field | |
332 | * in Beacon and Probe Response frames. Beacon slot 0 is | |
333 | * processed at the correct offset, so it does not require TSF | |
334 | * adjustment. Other slots are adjusted to get the timestamp | |
335 | * close to the TBTT for the BSS. | |
f078f209 | 336 | */ |
4ed96f04 JM |
337 | tsfadjust = intval * avp->av_bslot / ATH_BCBUF; |
338 | avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust)); | |
f078f209 LR |
339 | |
340 | DPRINTF(sc, ATH_DBG_BEACON, | |
04bd4638 | 341 | "stagger beacons, bslot %d intval %u tsfadjust %llu\n", |
f078f209 LR |
342 | avp->av_bslot, intval, (unsigned long long)tsfadjust); |
343 | ||
4ed96f04 JM |
344 | ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp = |
345 | avp->tsf_adjust; | |
346 | } else | |
347 | avp->tsf_adjust = cpu_to_le64(0); | |
f078f209 | 348 | |
f8316df1 | 349 | bf->bf_mpdu = skb; |
a8fff50e | 350 | bf->bf_buf_addr = bf->bf_dmacontext = |
7da3c55c | 351 | dma_map_single(sc->dev, skb->data, |
9fc9ab0a | 352 | skb->len, DMA_TO_DEVICE); |
7da3c55c | 353 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { |
f8316df1 LR |
354 | dev_kfree_skb_any(skb); |
355 | bf->bf_mpdu = NULL; | |
9fc9ab0a S |
356 | DPRINTF(sc, ATH_DBG_FATAL, |
357 | "dma_mapping_error on beacon alloc\n"); | |
f8316df1 LR |
358 | return -ENOMEM; |
359 | } | |
f078f209 LR |
360 | |
361 | return 0; | |
362 | } | |
363 | ||
17d7904d | 364 | void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp) |
f078f209 LR |
365 | { |
366 | if (avp->av_bcbuf != NULL) { | |
367 | struct ath_buf *bf; | |
368 | ||
369 | if (avp->av_bslot != -1) { | |
2c3db3d5 | 370 | sc->beacon.bslot[avp->av_bslot] = NULL; |
c52f33d0 | 371 | sc->beacon.bslot_aphy[avp->av_bslot] = NULL; |
17d7904d | 372 | sc->nbcnvifs--; |
f078f209 LR |
373 | } |
374 | ||
375 | bf = avp->av_bcbuf; | |
376 | if (bf->bf_mpdu != NULL) { | |
377 | struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu; | |
7da3c55c | 378 | dma_unmap_single(sc->dev, bf->bf_dmacontext, |
9fc9ab0a | 379 | skb->len, DMA_TO_DEVICE); |
f078f209 LR |
380 | dev_kfree_skb_any(skb); |
381 | bf->bf_mpdu = NULL; | |
382 | } | |
b77f483f | 383 | list_add_tail(&bf->list, &sc->beacon.bbuf); |
f078f209 LR |
384 | |
385 | avp->av_bcbuf = NULL; | |
386 | } | |
387 | } | |
388 | ||
9fc9ab0a | 389 | void ath_beacon_tasklet(unsigned long data) |
f078f209 | 390 | { |
f078f209 | 391 | struct ath_softc *sc = (struct ath_softc *)data; |
cbe61d8a | 392 | struct ath_hw *ah = sc->sc_ah; |
f078f209 | 393 | struct ath_buf *bf = NULL; |
2c3db3d5 | 394 | struct ieee80211_vif *vif; |
c52f33d0 | 395 | struct ath_wiphy *aphy; |
2c3db3d5 | 396 | int slot; |
9546aae0 | 397 | u32 bfaddr, bc = 0, tsftu; |
f078f209 | 398 | u64 tsf; |
f078f209 LR |
399 | u16 intval; |
400 | ||
f078f209 LR |
401 | /* |
402 | * Check if the previous beacon has gone out. If | |
403 | * not don't try to post another, skip this period | |
404 | * and wait for the next. Missed beacons indicate | |
405 | * a problem and should not occur. If we miss too | |
406 | * many consecutive beacons reset the device. | |
407 | */ | |
b77f483f S |
408 | if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0) { |
409 | sc->beacon.bmisscnt++; | |
9546aae0 | 410 | |
b77f483f | 411 | if (sc->beacon.bmisscnt < BSTUCK_THRESH) { |
9546aae0 S |
412 | DPRINTF(sc, ATH_DBG_BEACON, |
413 | "missed %u consecutive beacons\n", | |
414 | sc->beacon.bmisscnt); | |
b77f483f | 415 | } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) { |
9546aae0 S |
416 | DPRINTF(sc, ATH_DBG_BEACON, |
417 | "beacon is officially stuck\n"); | |
418 | ath_reset(sc, false); | |
f078f209 | 419 | } |
9546aae0 | 420 | |
f078f209 LR |
421 | return; |
422 | } | |
980b24da | 423 | |
b77f483f | 424 | if (sc->beacon.bmisscnt != 0) { |
9546aae0 S |
425 | DPRINTF(sc, ATH_DBG_BEACON, |
426 | "resume beacon xmit after %u misses\n", | |
427 | sc->beacon.bmisscnt); | |
b77f483f | 428 | sc->beacon.bmisscnt = 0; |
f078f209 LR |
429 | } |
430 | ||
431 | /* | |
432 | * Generate beacon frames. we are sending frames | |
433 | * staggered so calculate the slot for this frame based | |
434 | * on the tsf to safeguard against missing an swba. | |
435 | */ | |
436 | ||
a8fff50e JM |
437 | intval = sc->hw->conf.beacon_int ? |
438 | sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL; | |
f078f209 LR |
439 | |
440 | tsf = ath9k_hw_gettsf64(ah); | |
441 | tsftu = TSF_TO_TU(tsf>>32, tsf); | |
442 | slot = ((tsftu % intval) * ATH_BCBUF) / intval; | |
4ed96f04 JM |
443 | /* |
444 | * Reverse the slot order to get slot 0 on the TBTT offset that does | |
445 | * not require TSF adjustment and other slots adding | |
446 | * slot/ATH_BCBUF * beacon_int to timestamp. For example, with | |
447 | * ATH_BCBUF = 4, we process beacon slots as follows: 3 2 1 0 3 2 1 .. | |
448 | * and slot 0 is at correct offset to TBTT. | |
449 | */ | |
450 | slot = ATH_BCBUF - slot - 1; | |
451 | vif = sc->beacon.bslot[slot]; | |
452 | aphy = sc->beacon.bslot_aphy[slot]; | |
980b24da | 453 | |
f078f209 | 454 | DPRINTF(sc, ATH_DBG_BEACON, |
2c3db3d5 JM |
455 | "slot %d [tsf %llu tsftu %u intval %u] vif %p\n", |
456 | slot, tsf, tsftu, intval, vif); | |
980b24da | 457 | |
f078f209 | 458 | bfaddr = 0; |
2c3db3d5 | 459 | if (vif) { |
c52f33d0 | 460 | bf = ath_beacon_generate(aphy->hw, vif); |
f078f209 LR |
461 | if (bf != NULL) { |
462 | bfaddr = bf->bf_daddr; | |
463 | bc = 1; | |
464 | } | |
465 | } | |
9546aae0 | 466 | |
f078f209 LR |
467 | /* |
468 | * Handle slot time change when a non-ERP station joins/leaves | |
469 | * an 11g network. The 802.11 layer notifies us via callback, | |
470 | * we mark updateslot, then wait one beacon before effecting | |
471 | * the change. This gives associated stations at least one | |
472 | * beacon interval to note the state change. | |
473 | * | |
474 | * NB: The slot time change state machine is clocked according | |
475 | * to whether we are bursting or staggering beacons. We | |
476 | * recognize the request to update and record the current | |
477 | * slot then don't transition until that slot is reached | |
478 | * again. If we miss a beacon for that slot then we'll be | |
479 | * slow to transition but we'll be sure at least one beacon | |
480 | * interval has passed. When bursting slot is always left | |
481 | * set to ATH_BCBUF so this check is a noop. | |
482 | */ | |
b77f483f S |
483 | if (sc->beacon.updateslot == UPDATE) { |
484 | sc->beacon.updateslot = COMMIT; /* commit next beacon */ | |
485 | sc->beacon.slotupdate = slot; | |
486 | } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) { | |
487 | ath9k_hw_setslottime(sc->sc_ah, sc->beacon.slottime); | |
488 | sc->beacon.updateslot = OK; | |
ff37e337 | 489 | } |
f078f209 LR |
490 | if (bfaddr != 0) { |
491 | /* | |
492 | * Stop any current dma and put the new frame(s) on the queue. | |
493 | * This should never fail since we check above that no frames | |
494 | * are still pending on the queue. | |
495 | */ | |
b77f483f | 496 | if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) { |
f078f209 | 497 | DPRINTF(sc, ATH_DBG_FATAL, |
b77f483f | 498 | "beacon queue %u did not stop?\n", sc->beacon.beaconq); |
f078f209 LR |
499 | } |
500 | ||
501 | /* NB: cabq traffic should already be queued and primed */ | |
b77f483f S |
502 | ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr); |
503 | ath9k_hw_txstart(ah, sc->beacon.beaconq); | |
f078f209 | 504 | |
17d7904d | 505 | sc->beacon.ast_be_xmit += bc; /* XXX per-vif? */ |
f078f209 | 506 | } |
f078f209 LR |
507 | } |
508 | ||
f078f209 | 509 | /* |
5379c8a2 S |
510 | * For multi-bss ap support beacons are either staggered evenly over N slots or |
511 | * burst together. For the former arrange for the SWBA to be delivered for each | |
512 | * slot. Slots that are not occupied will generate nothing. | |
f078f209 | 513 | */ |
5379c8a2 S |
514 | static void ath_beacon_config_ap(struct ath_softc *sc, |
515 | struct ath_beacon_config *conf, | |
516 | struct ath_vif *avp) | |
f078f209 | 517 | { |
980b24da | 518 | u32 nexttbtt, intval; |
f078f209 | 519 | |
b238e90e S |
520 | /* Configure the timers only when the TSF has to be reset */ |
521 | ||
522 | if (!(sc->sc_flags & SC_OP_TSF_RESET)) | |
523 | return; | |
524 | ||
5379c8a2 S |
525 | /* NB: the beacon interval is kept internally in TU's */ |
526 | intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; | |
527 | intval /= ATH_BCBUF; /* for staggered beacons */ | |
528 | nexttbtt = intval; | |
529 | intval |= ATH9K_BEACON_RESET_TSF; | |
f078f209 | 530 | |
5379c8a2 S |
531 | /* |
532 | * In AP mode we enable the beacon timers and SWBA interrupts to | |
533 | * prepare beacon frames. | |
534 | */ | |
535 | intval |= ATH9K_BEACON_ENA; | |
536 | sc->imask |= ATH9K_INT_SWBA; | |
537 | ath_beaconq_config(sc); | |
f078f209 | 538 | |
5379c8a2 | 539 | /* Set the computed AP beacon timers */ |
f078f209 | 540 | |
5379c8a2 S |
541 | ath9k_hw_set_interrupts(sc->sc_ah, 0); |
542 | ath9k_hw_beaconinit(sc->sc_ah, nexttbtt, intval); | |
543 | sc->beacon.bmisscnt = 0; | |
544 | ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); | |
b238e90e S |
545 | |
546 | /* Clear the reset TSF flag, so that subsequent beacon updation | |
547 | will not reset the HW TSF. */ | |
548 | ||
549 | sc->sc_flags &= ~SC_OP_TSF_RESET; | |
5379c8a2 | 550 | } |
459f5f90 | 551 | |
5379c8a2 S |
552 | /* |
553 | * This sets up the beacon timers according to the timestamp of the last | |
554 | * received beacon and the current TSF, configures PCF and DTIM | |
555 | * handling, programs the sleep registers so the hardware will wakeup in | |
556 | * time to receive beacons, and configures the beacon miss handling so | |
557 | * we'll receive a BMISS interrupt when we stop seeing beacons from the AP | |
558 | * we've associated with. | |
559 | */ | |
560 | static void ath_beacon_config_sta(struct ath_softc *sc, | |
561 | struct ath_beacon_config *conf, | |
562 | struct ath_vif *avp) | |
563 | { | |
564 | struct ath9k_beacon_state bs; | |
565 | int dtimperiod, dtimcount, sleepduration; | |
566 | int cfpperiod, cfpcount; | |
567 | u32 nexttbtt = 0, intval, tsftu; | |
568 | u64 tsf; | |
569 | ||
570 | memset(&bs, 0, sizeof(bs)); | |
571 | intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; | |
572 | ||
573 | /* | |
574 | * Setup dtim and cfp parameters according to | |
575 | * last beacon we received (which may be none). | |
576 | */ | |
577 | dtimperiod = conf->dtim_period; | |
578 | if (dtimperiod <= 0) /* NB: 0 if not known */ | |
579 | dtimperiod = 1; | |
580 | dtimcount = conf->dtim_count; | |
581 | if (dtimcount >= dtimperiod) /* NB: sanity check */ | |
582 | dtimcount = 0; | |
583 | cfpperiod = 1; /* NB: no PCF support yet */ | |
584 | cfpcount = 0; | |
585 | ||
586 | sleepduration = conf->listen_interval * intval; | |
587 | if (sleepduration <= 0) | |
588 | sleepduration = intval; | |
589 | ||
590 | /* | |
591 | * Pull nexttbtt forward to reflect the current | |
592 | * TSF and calculate dtim+cfp state for the result. | |
593 | */ | |
594 | tsf = ath9k_hw_gettsf64(sc->sc_ah); | |
595 | tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE; | |
596 | do { | |
597 | nexttbtt += intval; | |
598 | if (--dtimcount < 0) { | |
599 | dtimcount = dtimperiod - 1; | |
600 | if (--cfpcount < 0) | |
601 | cfpcount = cfpperiod - 1; | |
602 | } | |
603 | } while (nexttbtt < tsftu); | |
604 | ||
605 | bs.bs_intval = intval; | |
606 | bs.bs_nexttbtt = nexttbtt; | |
607 | bs.bs_dtimperiod = dtimperiod*intval; | |
608 | bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval; | |
609 | bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod; | |
610 | bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod; | |
611 | bs.bs_cfpmaxduration = 0; | |
612 | ||
613 | /* | |
614 | * Calculate the number of consecutive beacons to miss* before taking | |
615 | * a BMISS interrupt. The configuration is specified in TU so we only | |
616 | * need calculate based on the beacon interval. Note that we clamp the | |
617 | * result to at most 15 beacons. | |
618 | */ | |
619 | if (sleepduration > intval) { | |
620 | bs.bs_bmissthreshold = conf->listen_interval * | |
621 | ATH_DEFAULT_BMISS_LIMIT / 2; | |
f078f209 | 622 | } else { |
5379c8a2 S |
623 | bs.bs_bmissthreshold = DIV_ROUND_UP(conf->bmiss_timeout, intval); |
624 | if (bs.bs_bmissthreshold > 15) | |
625 | bs.bs_bmissthreshold = 15; | |
626 | else if (bs.bs_bmissthreshold <= 0) | |
627 | bs.bs_bmissthreshold = 1; | |
f078f209 LR |
628 | } |
629 | ||
5379c8a2 S |
630 | /* |
631 | * Calculate sleep duration. The configuration is given in ms. | |
632 | * We ensure a multiple of the beacon period is used. Also, if the sleep | |
633 | * duration is greater than the DTIM period then it makes senses | |
634 | * to make it a multiple of that. | |
635 | * | |
636 | * XXX fixed at 100ms | |
637 | */ | |
980b24da | 638 | |
5379c8a2 S |
639 | bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100), sleepduration); |
640 | if (bs.bs_sleepduration > bs.bs_dtimperiod) | |
641 | bs.bs_sleepduration = bs.bs_dtimperiod; | |
980b24da | 642 | |
5379c8a2 S |
643 | /* TSF out of range threshold fixed at 1 second */ |
644 | bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD; | |
f078f209 | 645 | |
5379c8a2 S |
646 | DPRINTF(sc, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu); |
647 | DPRINTF(sc, ATH_DBG_BEACON, | |
648 | "bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n", | |
649 | bs.bs_bmissthreshold, bs.bs_sleepduration, | |
650 | bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext); | |
f078f209 | 651 | |
5379c8a2 | 652 | /* Set the computed STA beacon timers */ |
980b24da | 653 | |
5379c8a2 S |
654 | ath9k_hw_set_interrupts(sc->sc_ah, 0); |
655 | ath9k_hw_set_sta_beacon_timers(sc->sc_ah, &bs); | |
656 | sc->imask |= ATH9K_INT_BMISS; | |
657 | ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); | |
658 | } | |
f078f209 | 659 | |
5379c8a2 S |
660 | static void ath_beacon_config_adhoc(struct ath_softc *sc, |
661 | struct ath_beacon_config *conf, | |
2c3db3d5 JM |
662 | struct ath_vif *avp, |
663 | struct ieee80211_vif *vif) | |
5379c8a2 S |
664 | { |
665 | u64 tsf; | |
666 | u32 tsftu, intval, nexttbtt; | |
f078f209 | 667 | |
5379c8a2 | 668 | intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; |
f078f209 | 669 | |
5379c8a2 | 670 | /* Pull nexttbtt forward to reflect the current TSF */ |
4af9cf4f | 671 | |
5379c8a2 S |
672 | nexttbtt = TSF_TO_TU(sc->beacon.bc_tstamp >> 32, sc->beacon.bc_tstamp); |
673 | if (nexttbtt == 0) | |
674 | nexttbtt = intval; | |
675 | else if (intval) | |
676 | nexttbtt = roundup(nexttbtt, intval); | |
9fc9ab0a | 677 | |
5379c8a2 S |
678 | tsf = ath9k_hw_gettsf64(sc->sc_ah); |
679 | tsftu = TSF_TO_TU((u32)(tsf>>32), (u32)tsf) + FUDGE; | |
680 | do { | |
681 | nexttbtt += intval; | |
682 | } while (nexttbtt < tsftu); | |
f078f209 | 683 | |
5379c8a2 S |
684 | DPRINTF(sc, ATH_DBG_BEACON, |
685 | "IBSS nexttbtt %u intval %u (%u)\n", | |
686 | nexttbtt, intval, conf->beacon_interval); | |
9fc9ab0a | 687 | |
5379c8a2 S |
688 | /* |
689 | * In IBSS mode enable the beacon timers but only enable SWBA interrupts | |
690 | * if we need to manually prepare beacon frames. Otherwise we use a | |
691 | * self-linked tx descriptor and let the hardware deal with things. | |
692 | */ | |
693 | intval |= ATH9K_BEACON_ENA; | |
694 | if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) | |
695 | sc->imask |= ATH9K_INT_SWBA; | |
9fc9ab0a | 696 | |
5379c8a2 S |
697 | ath_beaconq_config(sc); |
698 | ||
699 | /* Set the computed ADHOC beacon timers */ | |
700 | ||
701 | ath9k_hw_set_interrupts(sc->sc_ah, 0); | |
702 | ath9k_hw_beaconinit(sc->sc_ah, nexttbtt, intval); | |
703 | sc->beacon.bmisscnt = 0; | |
704 | ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); | |
705 | ||
706 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL) | |
2c3db3d5 | 707 | ath_beacon_start_adhoc(sc, vif); |
f078f209 LR |
708 | } |
709 | ||
2c3db3d5 | 710 | void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif) |
f078f209 | 711 | { |
5379c8a2 | 712 | struct ath_beacon_config conf; |
5379c8a2 S |
713 | |
714 | /* Setup the beacon configuration parameters */ | |
715 | ||
716 | memset(&conf, 0, sizeof(struct ath_beacon_config)); | |
717 | conf.beacon_interval = sc->hw->conf.beacon_int ? | |
718 | sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL; | |
719 | conf.listen_interval = 1; | |
720 | conf.dtim_period = conf.beacon_interval; | |
721 | conf.dtim_count = 1; | |
722 | conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval; | |
723 | ||
2c3db3d5 JM |
724 | if (vif) { |
725 | struct ath_vif *avp = (struct ath_vif *)vif->drv_priv; | |
5379c8a2 S |
726 | |
727 | switch(avp->av_opmode) { | |
728 | case NL80211_IFTYPE_AP: | |
729 | ath_beacon_config_ap(sc, &conf, avp); | |
730 | break; | |
731 | case NL80211_IFTYPE_ADHOC: | |
9cb5412b | 732 | case NL80211_IFTYPE_MESH_POINT: |
2c3db3d5 | 733 | ath_beacon_config_adhoc(sc, &conf, avp, vif); |
5379c8a2 S |
734 | break; |
735 | case NL80211_IFTYPE_STATION: | |
736 | ath_beacon_config_sta(sc, &conf, avp); | |
737 | break; | |
738 | default: | |
739 | DPRINTF(sc, ATH_DBG_CONFIG, | |
740 | "Unsupported beaconing mode\n"); | |
741 | return; | |
742 | } | |
743 | ||
744 | sc->sc_flags |= SC_OP_BEACONS; | |
745 | } | |
f078f209 | 746 | } |