Commit | Line | Data |
---|---|---|
f078f209 LR |
1 | /* |
2 | * Copyright (c) 2008 Atheros Communications Inc. | |
3 | * | |
4 | * Permission to use, copy, modify, and/or distribute this software for any | |
5 | * purpose with or without fee is hereby granted, provided that the above | |
6 | * copyright notice and this permission notice appear in all copies. | |
7 | * | |
8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | |
9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | |
10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | |
11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | |
12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | |
13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | |
14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | |
15 | */ | |
16 | ||
394cf0a1 | 17 | #include "ath9k.h" |
f078f209 | 18 | |
5379c8a2 S |
19 | #define FUDGE 2 |
20 | ||
f078f209 | 21 | /* |
f078f209 LR |
22 | * This function will modify certain transmit queue properties depending on |
23 | * the operating mode of the station (AP or AdHoc). Parameters are AIFS | |
24 | * settings and channel width min/max | |
25 | */ | |
f078f209 LR |
26 | static int ath_beaconq_config(struct ath_softc *sc) |
27 | { | |
cbe61d8a | 28 | struct ath_hw *ah = sc->sc_ah; |
ea9880fb | 29 | struct ath9k_tx_queue_info qi; |
f078f209 | 30 | |
b77f483f | 31 | ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi); |
2660b81a | 32 | if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) { |
f078f209 LR |
33 | /* Always burst out beacon and CAB traffic. */ |
34 | qi.tqi_aifs = 1; | |
35 | qi.tqi_cwmin = 0; | |
36 | qi.tqi_cwmax = 0; | |
37 | } else { | |
38 | /* Adhoc mode; important thing is to use 2x cwmin. */ | |
b77f483f S |
39 | qi.tqi_aifs = sc->beacon.beacon_qi.tqi_aifs; |
40 | qi.tqi_cwmin = 2*sc->beacon.beacon_qi.tqi_cwmin; | |
41 | qi.tqi_cwmax = sc->beacon.beacon_qi.tqi_cwmax; | |
f078f209 LR |
42 | } |
43 | ||
b77f483f | 44 | if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) { |
f078f209 | 45 | DPRINTF(sc, ATH_DBG_FATAL, |
04bd4638 | 46 | "unable to update h/w beacon queue parameters\n"); |
f078f209 LR |
47 | return 0; |
48 | } else { | |
9fc9ab0a | 49 | ath9k_hw_resettxqueue(ah, sc->beacon.beaconq); |
f078f209 LR |
50 | return 1; |
51 | } | |
52 | } | |
53 | ||
54 | /* | |
f078f209 LR |
55 | * Associates the beacon frame buffer with a transmit descriptor. Will set |
56 | * up all required antenna switch parameters, rate codes, and channel flags. | |
57 | * Beacons are always sent out at the lowest rate, and are not retried. | |
58 | */ | |
9fc9ab0a S |
59 | static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp, |
60 | struct ath_buf *bf) | |
f078f209 LR |
61 | { |
62 | struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu; | |
cbe61d8a | 63 | struct ath_hw *ah = sc->sc_ah; |
f078f209 | 64 | struct ath_desc *ds; |
980b24da | 65 | struct ath9k_11n_rate_series series[4]; |
e63835b0 | 66 | struct ath_rate_table *rt; |
9fc9ab0a S |
67 | int flags, antenna, ctsrate = 0, ctsduration = 0; |
68 | u8 rate; | |
f078f209 | 69 | |
f078f209 | 70 | ds = bf->bf_desc; |
f078f209 LR |
71 | flags = ATH9K_TXDESC_NOACK; |
72 | ||
2660b81a S |
73 | if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC && |
74 | (ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) { | |
f078f209 LR |
75 | ds->ds_link = bf->bf_daddr; /* self-linked */ |
76 | flags |= ATH9K_TXDESC_VEOL; | |
77 | /* Let hardware handle antenna switching. */ | |
78 | antenna = 0; | |
79 | } else { | |
80 | ds->ds_link = 0; | |
81 | /* | |
82 | * Switch antenna every beacon. | |
9fc9ab0a S |
83 | * Should only switch every beacon period, not for every SWBA |
84 | * XXX assumes two antennae | |
f078f209 | 85 | */ |
17d7904d | 86 | antenna = ((sc->beacon.ast_be_xmit / sc->nbcnvifs) & 1 ? 2 : 1); |
f078f209 LR |
87 | } |
88 | ||
89 | ds->ds_data = bf->bf_buf_addr; | |
90 | ||
3706de6f | 91 | rt = sc->cur_rate_table; |
9fc9ab0a | 92 | rate = rt->info[0].ratecode; |
672840ac | 93 | if (sc->sc_flags & SC_OP_PREAMBLE_SHORT) |
9fc9ab0a S |
94 | rate |= rt->info[0].short_preamble; |
95 | ||
96 | ath9k_hw_set11n_txdesc(ah, ds, skb->len + FCS_LEN, | |
97 | ATH9K_PKT_TYPE_BEACON, | |
98 | MAX_RATE_POWER, | |
99 | ATH9K_TXKEYIX_INVALID, | |
100 | ATH9K_KEY_TYPE_CLEAR, | |
101 | flags); | |
f078f209 LR |
102 | |
103 | /* NB: beacon's BufLen must be a multiple of 4 bytes */ | |
9fc9ab0a S |
104 | ath9k_hw_filltxdesc(ah, ds, roundup(skb->len, 4), |
105 | true, true, ds); | |
f078f209 | 106 | |
0345f37b | 107 | memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4); |
f078f209 LR |
108 | series[0].Tries = 1; |
109 | series[0].Rate = rate; | |
17d7904d | 110 | series[0].ChSel = sc->tx_chainmask; |
f078f209 | 111 | series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0; |
9fc9ab0a S |
112 | ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, ctsrate, ctsduration, |
113 | series, 4, 0); | |
f078f209 LR |
114 | } |
115 | ||
f078f209 LR |
116 | static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id) |
117 | { | |
f078f209 | 118 | struct ath_buf *bf; |
17d7904d | 119 | struct ath_vif *avp; |
f078f209 | 120 | struct sk_buff *skb; |
f078f209 | 121 | struct ath_txq *cabq; |
5640b08e | 122 | struct ieee80211_vif *vif; |
147583c0 | 123 | struct ieee80211_tx_info *info; |
980b24da S |
124 | int cabq_depth; |
125 | ||
17d7904d | 126 | vif = sc->vifs[if_id]; |
5640b08e | 127 | avp = (void *)vif->drv_priv; |
b77f483f | 128 | cabq = sc->beacon.cabq; |
f078f209 | 129 | |
f078f209 | 130 | if (avp->av_bcbuf == NULL) { |
04bd4638 S |
131 | DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n", |
132 | avp, avp->av_bcbuf); | |
f078f209 LR |
133 | return NULL; |
134 | } | |
980b24da | 135 | |
9fc9ab0a S |
136 | /* Release the old beacon first */ |
137 | ||
f078f209 | 138 | bf = avp->av_bcbuf; |
980b24da | 139 | skb = (struct sk_buff *)bf->bf_mpdu; |
a8fff50e | 140 | if (skb) { |
7da3c55c | 141 | dma_unmap_single(sc->dev, bf->bf_dmacontext, |
9fc9ab0a | 142 | skb->len, DMA_TO_DEVICE); |
3fbb9d95 | 143 | dev_kfree_skb_any(skb); |
a8fff50e | 144 | } |
f078f209 | 145 | |
9fc9ab0a S |
146 | /* Get a new beacon from mac80211 */ |
147 | ||
5640b08e | 148 | skb = ieee80211_beacon_get(sc->hw, vif); |
a8fff50e JM |
149 | bf->bf_mpdu = skb; |
150 | if (skb == NULL) | |
151 | return NULL; | |
980b24da | 152 | |
147583c0 JM |
153 | info = IEEE80211_SKB_CB(skb); |
154 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
155 | /* | |
156 | * TODO: make sure the seq# gets assigned properly (vs. other | |
157 | * TX frames) | |
158 | */ | |
980b24da | 159 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
b77f483f | 160 | sc->tx.seq_no += 0x10; |
147583c0 | 161 | hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
b77f483f | 162 | hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no); |
147583c0 | 163 | } |
980b24da | 164 | |
a8fff50e | 165 | bf->bf_buf_addr = bf->bf_dmacontext = |
7da3c55c | 166 | dma_map_single(sc->dev, skb->data, |
9fc9ab0a | 167 | skb->len, DMA_TO_DEVICE); |
7da3c55c | 168 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { |
f8316df1 LR |
169 | dev_kfree_skb_any(skb); |
170 | bf->bf_mpdu = NULL; | |
9fc9ab0a | 171 | DPRINTF(sc, ATH_DBG_FATAL, "dma_mapping_error on beaconing\n"); |
f8316df1 LR |
172 | return NULL; |
173 | } | |
f078f209 | 174 | |
5640b08e | 175 | skb = ieee80211_get_buffered_bc(sc->hw, vif); |
f078f209 | 176 | |
f078f209 LR |
177 | /* |
178 | * if the CABQ traffic from previous DTIM is pending and the current | |
179 | * beacon is also a DTIM. | |
17d7904d S |
180 | * 1) if there is only one vif let the cab traffic continue. |
181 | * 2) if there are more than one vif and we are using staggered | |
f078f209 | 182 | * beacons, then drain the cabq by dropping all the frames in |
17d7904d | 183 | * the cabq so that the current vifs cab traffic can be scheduled. |
f078f209 LR |
184 | */ |
185 | spin_lock_bh(&cabq->axq_lock); | |
186 | cabq_depth = cabq->axq_depth; | |
187 | spin_unlock_bh(&cabq->axq_lock); | |
188 | ||
e022edbd | 189 | if (skb && cabq_depth) { |
17d7904d | 190 | if (sc->nvifs > 1) { |
f078f209 | 191 | DPRINTF(sc, ATH_DBG_BEACON, |
9fc9ab0a S |
192 | "Flushing previous cabq traffic\n"); |
193 | ath_draintxq(sc, cabq, false); | |
f078f209 LR |
194 | } |
195 | } | |
196 | ||
f078f209 LR |
197 | ath_beacon_setup(sc, avp, bf); |
198 | ||
e022edbd JM |
199 | while (skb) { |
200 | ath_tx_cabq(sc, skb); | |
5640b08e | 201 | skb = ieee80211_get_buffered_bc(sc->hw, vif); |
e022edbd | 202 | } |
f078f209 | 203 | |
f078f209 LR |
204 | return bf; |
205 | } | |
206 | ||
207 | /* | |
208 | * Startup beacon transmission for adhoc mode when they are sent entirely | |
209 | * by the hardware using the self-linked descriptor + veol trick. | |
210 | */ | |
f078f209 LR |
211 | static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id) |
212 | { | |
5640b08e | 213 | struct ieee80211_vif *vif; |
cbe61d8a | 214 | struct ath_hw *ah = sc->sc_ah; |
f078f209 | 215 | struct ath_buf *bf; |
17d7904d | 216 | struct ath_vif *avp; |
f078f209 LR |
217 | struct sk_buff *skb; |
218 | ||
17d7904d | 219 | vif = sc->vifs[if_id]; |
5640b08e | 220 | avp = (void *)vif->drv_priv; |
f078f209 | 221 | |
9fc9ab0a | 222 | if (avp->av_bcbuf == NULL) |
f078f209 | 223 | return; |
9fc9ab0a | 224 | |
f078f209 LR |
225 | bf = avp->av_bcbuf; |
226 | skb = (struct sk_buff *) bf->bf_mpdu; | |
227 | ||
f078f209 LR |
228 | ath_beacon_setup(sc, avp, bf); |
229 | ||
230 | /* NB: caller is known to have already stopped tx dma */ | |
b77f483f S |
231 | ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr); |
232 | ath9k_hw_txstart(ah, sc->beacon.beaconq); | |
04bd4638 | 233 | DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n", |
b77f483f | 234 | sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc); |
f078f209 LR |
235 | } |
236 | ||
cbe61d8a | 237 | int ath_beaconq_setup(struct ath_hw *ah) |
f078f209 | 238 | { |
ea9880fb | 239 | struct ath9k_tx_queue_info qi; |
f078f209 | 240 | |
0345f37b | 241 | memset(&qi, 0, sizeof(qi)); |
f078f209 LR |
242 | qi.tqi_aifs = 1; |
243 | qi.tqi_cwmin = 0; | |
244 | qi.tqi_cwmax = 0; | |
245 | /* NB: don't enable any interrupts */ | |
246 | return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi); | |
247 | } | |
248 | ||
f078f209 LR |
249 | int ath_beacon_alloc(struct ath_softc *sc, int if_id) |
250 | { | |
5640b08e | 251 | struct ieee80211_vif *vif; |
17d7904d | 252 | struct ath_vif *avp; |
980b24da | 253 | struct ieee80211_hdr *hdr; |
f078f209 LR |
254 | struct ath_buf *bf; |
255 | struct sk_buff *skb; | |
459f5f90 | 256 | __le64 tstamp; |
f078f209 | 257 | |
17d7904d | 258 | vif = sc->vifs[if_id]; |
5640b08e | 259 | avp = (void *)vif->drv_priv; |
f078f209 LR |
260 | |
261 | /* Allocate a beacon descriptor if we haven't done so. */ | |
262 | if (!avp->av_bcbuf) { | |
980b24da S |
263 | /* Allocate beacon state for hostap/ibss. We know |
264 | * a buffer is available. */ | |
b77f483f | 265 | avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf, |
980b24da | 266 | struct ath_buf, list); |
f078f209 LR |
267 | list_del(&avp->av_bcbuf->list); |
268 | ||
2660b81a S |
269 | if (sc->sc_ah->opmode == NL80211_IFTYPE_AP || |
270 | !(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) { | |
f078f209 LR |
271 | int slot; |
272 | /* | |
17d7904d | 273 | * Assign the vif to a beacon xmit slot. As |
f078f209 LR |
274 | * above, this cannot fail to find one. |
275 | */ | |
276 | avp->av_bslot = 0; | |
277 | for (slot = 0; slot < ATH_BCBUF; slot++) | |
b77f483f | 278 | if (sc->beacon.bslot[slot] == ATH_IF_ID_ANY) { |
f078f209 LR |
279 | /* |
280 | * XXX hack, space out slots to better | |
281 | * deal with misses | |
282 | */ | |
283 | if (slot+1 < ATH_BCBUF && | |
b77f483f | 284 | sc->beacon.bslot[slot+1] == |
f078f209 LR |
285 | ATH_IF_ID_ANY) { |
286 | avp->av_bslot = slot+1; | |
287 | break; | |
288 | } | |
289 | avp->av_bslot = slot; | |
290 | /* NB: keep looking for a double slot */ | |
291 | } | |
b77f483f S |
292 | BUG_ON(sc->beacon.bslot[avp->av_bslot] != ATH_IF_ID_ANY); |
293 | sc->beacon.bslot[avp->av_bslot] = if_id; | |
17d7904d | 294 | sc->nbcnvifs++; |
f078f209 LR |
295 | } |
296 | } | |
297 | ||
9fc9ab0a | 298 | /* release the previous beacon frame, if it already exists. */ |
f078f209 LR |
299 | bf = avp->av_bcbuf; |
300 | if (bf->bf_mpdu != NULL) { | |
301 | skb = (struct sk_buff *)bf->bf_mpdu; | |
7da3c55c | 302 | dma_unmap_single(sc->dev, bf->bf_dmacontext, |
9fc9ab0a | 303 | skb->len, DMA_TO_DEVICE); |
f078f209 LR |
304 | dev_kfree_skb_any(skb); |
305 | bf->bf_mpdu = NULL; | |
306 | } | |
307 | ||
9fc9ab0a | 308 | /* NB: the beacon data buffer must be 32-bit aligned. */ |
5640b08e | 309 | skb = ieee80211_beacon_get(sc->hw, vif); |
f078f209 | 310 | if (skb == NULL) { |
04bd4638 | 311 | DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n"); |
f078f209 LR |
312 | return -ENOMEM; |
313 | } | |
314 | ||
459f5f90 | 315 | tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp; |
b77f483f | 316 | sc->beacon.bc_tstamp = le64_to_cpu(tstamp); |
459f5f90 | 317 | |
f078f209 LR |
318 | /* |
319 | * Calculate a TSF adjustment factor required for | |
320 | * staggered beacons. Note that we assume the format | |
321 | * of the beacon frame leaves the tstamp field immediately | |
322 | * following the header. | |
323 | */ | |
324 | if (avp->av_bslot > 0) { | |
325 | u64 tsfadjust; | |
326 | __le64 val; | |
327 | int intval; | |
328 | ||
a8fff50e JM |
329 | intval = sc->hw->conf.beacon_int ? |
330 | sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL; | |
f078f209 LR |
331 | |
332 | /* | |
333 | * The beacon interval is in TU's; the TSF in usecs. | |
334 | * We figure out how many TU's to add to align the | |
335 | * timestamp then convert to TSF units and handle | |
336 | * byte swapping before writing it in the frame. | |
337 | * The hardware will then add this each time a beacon | |
17d7904d S |
338 | * frame is sent. Note that we align vif's 1..N |
339 | * and leave vif 0 untouched. This means vap 0 | |
f078f209 LR |
340 | * has a timestamp in one beacon interval while the |
341 | * others get a timestamp aligned to the next interval. | |
342 | */ | |
343 | tsfadjust = (intval * (ATH_BCBUF - avp->av_bslot)) / ATH_BCBUF; | |
344 | val = cpu_to_le64(tsfadjust << 10); /* TU->TSF */ | |
345 | ||
346 | DPRINTF(sc, ATH_DBG_BEACON, | |
04bd4638 | 347 | "stagger beacons, bslot %d intval %u tsfadjust %llu\n", |
f078f209 LR |
348 | avp->av_bslot, intval, (unsigned long long)tsfadjust); |
349 | ||
980b24da S |
350 | hdr = (struct ieee80211_hdr *)skb->data; |
351 | memcpy(&hdr[1], &val, sizeof(val)); | |
f078f209 LR |
352 | } |
353 | ||
f8316df1 | 354 | bf->bf_mpdu = skb; |
a8fff50e | 355 | bf->bf_buf_addr = bf->bf_dmacontext = |
7da3c55c | 356 | dma_map_single(sc->dev, skb->data, |
9fc9ab0a | 357 | skb->len, DMA_TO_DEVICE); |
7da3c55c | 358 | if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { |
f8316df1 LR |
359 | dev_kfree_skb_any(skb); |
360 | bf->bf_mpdu = NULL; | |
9fc9ab0a S |
361 | DPRINTF(sc, ATH_DBG_FATAL, |
362 | "dma_mapping_error on beacon alloc\n"); | |
f8316df1 LR |
363 | return -ENOMEM; |
364 | } | |
f078f209 LR |
365 | |
366 | return 0; | |
367 | } | |
368 | ||
17d7904d | 369 | void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp) |
f078f209 LR |
370 | { |
371 | if (avp->av_bcbuf != NULL) { | |
372 | struct ath_buf *bf; | |
373 | ||
374 | if (avp->av_bslot != -1) { | |
b77f483f | 375 | sc->beacon.bslot[avp->av_bslot] = ATH_IF_ID_ANY; |
17d7904d | 376 | sc->nbcnvifs--; |
f078f209 LR |
377 | } |
378 | ||
379 | bf = avp->av_bcbuf; | |
380 | if (bf->bf_mpdu != NULL) { | |
381 | struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu; | |
7da3c55c | 382 | dma_unmap_single(sc->dev, bf->bf_dmacontext, |
9fc9ab0a | 383 | skb->len, DMA_TO_DEVICE); |
f078f209 LR |
384 | dev_kfree_skb_any(skb); |
385 | bf->bf_mpdu = NULL; | |
386 | } | |
b77f483f | 387 | list_add_tail(&bf->list, &sc->beacon.bbuf); |
f078f209 LR |
388 | |
389 | avp->av_bcbuf = NULL; | |
390 | } | |
391 | } | |
392 | ||
9fc9ab0a | 393 | void ath_beacon_tasklet(unsigned long data) |
f078f209 | 394 | { |
f078f209 | 395 | struct ath_softc *sc = (struct ath_softc *)data; |
cbe61d8a | 396 | struct ath_hw *ah = sc->sc_ah; |
f078f209 LR |
397 | struct ath_buf *bf = NULL; |
398 | int slot, if_id; | |
9546aae0 | 399 | u32 bfaddr, bc = 0, tsftu; |
f078f209 | 400 | u64 tsf; |
f078f209 LR |
401 | u16 intval; |
402 | ||
f078f209 LR |
403 | /* |
404 | * Check if the previous beacon has gone out. If | |
405 | * not don't try to post another, skip this period | |
406 | * and wait for the next. Missed beacons indicate | |
407 | * a problem and should not occur. If we miss too | |
408 | * many consecutive beacons reset the device. | |
409 | */ | |
b77f483f S |
410 | if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0) { |
411 | sc->beacon.bmisscnt++; | |
9546aae0 | 412 | |
b77f483f | 413 | if (sc->beacon.bmisscnt < BSTUCK_THRESH) { |
9546aae0 S |
414 | DPRINTF(sc, ATH_DBG_BEACON, |
415 | "missed %u consecutive beacons\n", | |
416 | sc->beacon.bmisscnt); | |
b77f483f | 417 | } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) { |
9546aae0 S |
418 | DPRINTF(sc, ATH_DBG_BEACON, |
419 | "beacon is officially stuck\n"); | |
420 | ath_reset(sc, false); | |
f078f209 | 421 | } |
9546aae0 | 422 | |
f078f209 LR |
423 | return; |
424 | } | |
980b24da | 425 | |
b77f483f | 426 | if (sc->beacon.bmisscnt != 0) { |
9546aae0 S |
427 | DPRINTF(sc, ATH_DBG_BEACON, |
428 | "resume beacon xmit after %u misses\n", | |
429 | sc->beacon.bmisscnt); | |
b77f483f | 430 | sc->beacon.bmisscnt = 0; |
f078f209 LR |
431 | } |
432 | ||
433 | /* | |
434 | * Generate beacon frames. we are sending frames | |
435 | * staggered so calculate the slot for this frame based | |
436 | * on the tsf to safeguard against missing an swba. | |
437 | */ | |
438 | ||
a8fff50e JM |
439 | intval = sc->hw->conf.beacon_int ? |
440 | sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL; | |
f078f209 LR |
441 | |
442 | tsf = ath9k_hw_gettsf64(ah); | |
443 | tsftu = TSF_TO_TU(tsf>>32, tsf); | |
444 | slot = ((tsftu % intval) * ATH_BCBUF) / intval; | |
b77f483f | 445 | if_id = sc->beacon.bslot[(slot + 1) % ATH_BCBUF]; |
980b24da | 446 | |
f078f209 | 447 | DPRINTF(sc, ATH_DBG_BEACON, |
04bd4638 | 448 | "slot %d [tsf %llu tsftu %u intval %u] if_id %d\n", |
9546aae0 | 449 | slot, tsf, tsftu, intval, if_id); |
980b24da | 450 | |
f078f209 LR |
451 | bfaddr = 0; |
452 | if (if_id != ATH_IF_ID_ANY) { | |
453 | bf = ath_beacon_generate(sc, if_id); | |
454 | if (bf != NULL) { | |
455 | bfaddr = bf->bf_daddr; | |
456 | bc = 1; | |
457 | } | |
458 | } | |
9546aae0 | 459 | |
f078f209 LR |
460 | /* |
461 | * Handle slot time change when a non-ERP station joins/leaves | |
462 | * an 11g network. The 802.11 layer notifies us via callback, | |
463 | * we mark updateslot, then wait one beacon before effecting | |
464 | * the change. This gives associated stations at least one | |
465 | * beacon interval to note the state change. | |
466 | * | |
467 | * NB: The slot time change state machine is clocked according | |
468 | * to whether we are bursting or staggering beacons. We | |
469 | * recognize the request to update and record the current | |
470 | * slot then don't transition until that slot is reached | |
471 | * again. If we miss a beacon for that slot then we'll be | |
472 | * slow to transition but we'll be sure at least one beacon | |
473 | * interval has passed. When bursting slot is always left | |
474 | * set to ATH_BCBUF so this check is a noop. | |
475 | */ | |
b77f483f S |
476 | if (sc->beacon.updateslot == UPDATE) { |
477 | sc->beacon.updateslot = COMMIT; /* commit next beacon */ | |
478 | sc->beacon.slotupdate = slot; | |
479 | } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) { | |
480 | ath9k_hw_setslottime(sc->sc_ah, sc->beacon.slottime); | |
481 | sc->beacon.updateslot = OK; | |
ff37e337 | 482 | } |
f078f209 LR |
483 | if (bfaddr != 0) { |
484 | /* | |
485 | * Stop any current dma and put the new frame(s) on the queue. | |
486 | * This should never fail since we check above that no frames | |
487 | * are still pending on the queue. | |
488 | */ | |
b77f483f | 489 | if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) { |
f078f209 | 490 | DPRINTF(sc, ATH_DBG_FATAL, |
b77f483f | 491 | "beacon queue %u did not stop?\n", sc->beacon.beaconq); |
f078f209 LR |
492 | } |
493 | ||
494 | /* NB: cabq traffic should already be queued and primed */ | |
b77f483f S |
495 | ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr); |
496 | ath9k_hw_txstart(ah, sc->beacon.beaconq); | |
f078f209 | 497 | |
17d7904d | 498 | sc->beacon.ast_be_xmit += bc; /* XXX per-vif? */ |
f078f209 | 499 | } |
f078f209 LR |
500 | } |
501 | ||
f078f209 | 502 | /* |
5379c8a2 S |
503 | * For multi-bss ap support beacons are either staggered evenly over N slots or |
504 | * burst together. For the former arrange for the SWBA to be delivered for each | |
505 | * slot. Slots that are not occupied will generate nothing. | |
f078f209 | 506 | */ |
5379c8a2 S |
507 | static void ath_beacon_config_ap(struct ath_softc *sc, |
508 | struct ath_beacon_config *conf, | |
509 | struct ath_vif *avp) | |
f078f209 | 510 | { |
980b24da | 511 | u32 nexttbtt, intval; |
f078f209 | 512 | |
b238e90e S |
513 | /* Configure the timers only when the TSF has to be reset */ |
514 | ||
515 | if (!(sc->sc_flags & SC_OP_TSF_RESET)) | |
516 | return; | |
517 | ||
5379c8a2 S |
518 | /* NB: the beacon interval is kept internally in TU's */ |
519 | intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; | |
520 | intval /= ATH_BCBUF; /* for staggered beacons */ | |
521 | nexttbtt = intval; | |
522 | intval |= ATH9K_BEACON_RESET_TSF; | |
f078f209 | 523 | |
5379c8a2 S |
524 | /* |
525 | * In AP mode we enable the beacon timers and SWBA interrupts to | |
526 | * prepare beacon frames. | |
527 | */ | |
528 | intval |= ATH9K_BEACON_ENA; | |
529 | sc->imask |= ATH9K_INT_SWBA; | |
530 | ath_beaconq_config(sc); | |
f078f209 | 531 | |
5379c8a2 | 532 | /* Set the computed AP beacon timers */ |
f078f209 | 533 | |
5379c8a2 S |
534 | ath9k_hw_set_interrupts(sc->sc_ah, 0); |
535 | ath9k_hw_beaconinit(sc->sc_ah, nexttbtt, intval); | |
536 | sc->beacon.bmisscnt = 0; | |
537 | ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); | |
b238e90e S |
538 | |
539 | /* Clear the reset TSF flag, so that subsequent beacon updation | |
540 | will not reset the HW TSF. */ | |
541 | ||
542 | sc->sc_flags &= ~SC_OP_TSF_RESET; | |
5379c8a2 | 543 | } |
459f5f90 | 544 | |
5379c8a2 S |
545 | /* |
546 | * This sets up the beacon timers according to the timestamp of the last | |
547 | * received beacon and the current TSF, configures PCF and DTIM | |
548 | * handling, programs the sleep registers so the hardware will wakeup in | |
549 | * time to receive beacons, and configures the beacon miss handling so | |
550 | * we'll receive a BMISS interrupt when we stop seeing beacons from the AP | |
551 | * we've associated with. | |
552 | */ | |
553 | static void ath_beacon_config_sta(struct ath_softc *sc, | |
554 | struct ath_beacon_config *conf, | |
555 | struct ath_vif *avp) | |
556 | { | |
557 | struct ath9k_beacon_state bs; | |
558 | int dtimperiod, dtimcount, sleepduration; | |
559 | int cfpperiod, cfpcount; | |
560 | u32 nexttbtt = 0, intval, tsftu; | |
561 | u64 tsf; | |
562 | ||
563 | memset(&bs, 0, sizeof(bs)); | |
564 | intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; | |
565 | ||
566 | /* | |
567 | * Setup dtim and cfp parameters according to | |
568 | * last beacon we received (which may be none). | |
569 | */ | |
570 | dtimperiod = conf->dtim_period; | |
571 | if (dtimperiod <= 0) /* NB: 0 if not known */ | |
572 | dtimperiod = 1; | |
573 | dtimcount = conf->dtim_count; | |
574 | if (dtimcount >= dtimperiod) /* NB: sanity check */ | |
575 | dtimcount = 0; | |
576 | cfpperiod = 1; /* NB: no PCF support yet */ | |
577 | cfpcount = 0; | |
578 | ||
579 | sleepduration = conf->listen_interval * intval; | |
580 | if (sleepduration <= 0) | |
581 | sleepduration = intval; | |
582 | ||
583 | /* | |
584 | * Pull nexttbtt forward to reflect the current | |
585 | * TSF and calculate dtim+cfp state for the result. | |
586 | */ | |
587 | tsf = ath9k_hw_gettsf64(sc->sc_ah); | |
588 | tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE; | |
589 | do { | |
590 | nexttbtt += intval; | |
591 | if (--dtimcount < 0) { | |
592 | dtimcount = dtimperiod - 1; | |
593 | if (--cfpcount < 0) | |
594 | cfpcount = cfpperiod - 1; | |
595 | } | |
596 | } while (nexttbtt < tsftu); | |
597 | ||
598 | bs.bs_intval = intval; | |
599 | bs.bs_nexttbtt = nexttbtt; | |
600 | bs.bs_dtimperiod = dtimperiod*intval; | |
601 | bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval; | |
602 | bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod; | |
603 | bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod; | |
604 | bs.bs_cfpmaxduration = 0; | |
605 | ||
606 | /* | |
607 | * Calculate the number of consecutive beacons to miss* before taking | |
608 | * a BMISS interrupt. The configuration is specified in TU so we only | |
609 | * need calculate based on the beacon interval. Note that we clamp the | |
610 | * result to at most 15 beacons. | |
611 | */ | |
612 | if (sleepduration > intval) { | |
613 | bs.bs_bmissthreshold = conf->listen_interval * | |
614 | ATH_DEFAULT_BMISS_LIMIT / 2; | |
f078f209 | 615 | } else { |
5379c8a2 S |
616 | bs.bs_bmissthreshold = DIV_ROUND_UP(conf->bmiss_timeout, intval); |
617 | if (bs.bs_bmissthreshold > 15) | |
618 | bs.bs_bmissthreshold = 15; | |
619 | else if (bs.bs_bmissthreshold <= 0) | |
620 | bs.bs_bmissthreshold = 1; | |
f078f209 LR |
621 | } |
622 | ||
5379c8a2 S |
623 | /* |
624 | * Calculate sleep duration. The configuration is given in ms. | |
625 | * We ensure a multiple of the beacon period is used. Also, if the sleep | |
626 | * duration is greater than the DTIM period then it makes senses | |
627 | * to make it a multiple of that. | |
628 | * | |
629 | * XXX fixed at 100ms | |
630 | */ | |
980b24da | 631 | |
5379c8a2 S |
632 | bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100), sleepduration); |
633 | if (bs.bs_sleepduration > bs.bs_dtimperiod) | |
634 | bs.bs_sleepduration = bs.bs_dtimperiod; | |
980b24da | 635 | |
5379c8a2 S |
636 | /* TSF out of range threshold fixed at 1 second */ |
637 | bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD; | |
f078f209 | 638 | |
5379c8a2 S |
639 | DPRINTF(sc, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu); |
640 | DPRINTF(sc, ATH_DBG_BEACON, | |
641 | "bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n", | |
642 | bs.bs_bmissthreshold, bs.bs_sleepduration, | |
643 | bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext); | |
f078f209 | 644 | |
5379c8a2 | 645 | /* Set the computed STA beacon timers */ |
980b24da | 646 | |
5379c8a2 S |
647 | ath9k_hw_set_interrupts(sc->sc_ah, 0); |
648 | ath9k_hw_set_sta_beacon_timers(sc->sc_ah, &bs); | |
649 | sc->imask |= ATH9K_INT_BMISS; | |
650 | ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); | |
651 | } | |
f078f209 | 652 | |
5379c8a2 S |
653 | static void ath_beacon_config_adhoc(struct ath_softc *sc, |
654 | struct ath_beacon_config *conf, | |
655 | struct ath_vif *avp) | |
656 | { | |
657 | u64 tsf; | |
658 | u32 tsftu, intval, nexttbtt; | |
f078f209 | 659 | |
5379c8a2 | 660 | intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; |
f078f209 | 661 | |
5379c8a2 | 662 | /* Pull nexttbtt forward to reflect the current TSF */ |
4af9cf4f | 663 | |
5379c8a2 S |
664 | nexttbtt = TSF_TO_TU(sc->beacon.bc_tstamp >> 32, sc->beacon.bc_tstamp); |
665 | if (nexttbtt == 0) | |
666 | nexttbtt = intval; | |
667 | else if (intval) | |
668 | nexttbtt = roundup(nexttbtt, intval); | |
9fc9ab0a | 669 | |
5379c8a2 S |
670 | tsf = ath9k_hw_gettsf64(sc->sc_ah); |
671 | tsftu = TSF_TO_TU((u32)(tsf>>32), (u32)tsf) + FUDGE; | |
672 | do { | |
673 | nexttbtt += intval; | |
674 | } while (nexttbtt < tsftu); | |
f078f209 | 675 | |
5379c8a2 S |
676 | DPRINTF(sc, ATH_DBG_BEACON, |
677 | "IBSS nexttbtt %u intval %u (%u)\n", | |
678 | nexttbtt, intval, conf->beacon_interval); | |
9fc9ab0a | 679 | |
5379c8a2 S |
680 | /* |
681 | * In IBSS mode enable the beacon timers but only enable SWBA interrupts | |
682 | * if we need to manually prepare beacon frames. Otherwise we use a | |
683 | * self-linked tx descriptor and let the hardware deal with things. | |
684 | */ | |
685 | intval |= ATH9K_BEACON_ENA; | |
686 | if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) | |
687 | sc->imask |= ATH9K_INT_SWBA; | |
9fc9ab0a | 688 | |
5379c8a2 S |
689 | ath_beaconq_config(sc); |
690 | ||
691 | /* Set the computed ADHOC beacon timers */ | |
692 | ||
693 | ath9k_hw_set_interrupts(sc->sc_ah, 0); | |
694 | ath9k_hw_beaconinit(sc->sc_ah, nexttbtt, intval); | |
695 | sc->beacon.bmisscnt = 0; | |
696 | ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); | |
697 | ||
698 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL) | |
699 | ath_beacon_start_adhoc(sc, 0); | |
f078f209 LR |
700 | } |
701 | ||
5379c8a2 | 702 | void ath_beacon_config(struct ath_softc *sc, int if_id) |
f078f209 | 703 | { |
5379c8a2 S |
704 | struct ath_beacon_config conf; |
705 | struct ath_vif *avp; | |
706 | struct ieee80211_vif *vif; | |
707 | ||
708 | /* Setup the beacon configuration parameters */ | |
709 | ||
710 | memset(&conf, 0, sizeof(struct ath_beacon_config)); | |
711 | conf.beacon_interval = sc->hw->conf.beacon_int ? | |
712 | sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL; | |
713 | conf.listen_interval = 1; | |
714 | conf.dtim_period = conf.beacon_interval; | |
715 | conf.dtim_count = 1; | |
716 | conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval; | |
717 | ||
718 | if (if_id != ATH_IF_ID_ANY) { | |
719 | vif = sc->vifs[if_id]; | |
720 | avp = (struct ath_vif *)vif->drv_priv; | |
721 | ||
722 | switch(avp->av_opmode) { | |
723 | case NL80211_IFTYPE_AP: | |
724 | ath_beacon_config_ap(sc, &conf, avp); | |
725 | break; | |
726 | case NL80211_IFTYPE_ADHOC: | |
727 | ath_beacon_config_adhoc(sc, &conf, avp); | |
728 | break; | |
729 | case NL80211_IFTYPE_STATION: | |
730 | ath_beacon_config_sta(sc, &conf, avp); | |
731 | break; | |
732 | default: | |
733 | DPRINTF(sc, ATH_DBG_CONFIG, | |
734 | "Unsupported beaconing mode\n"); | |
735 | return; | |
736 | } | |
737 | ||
738 | sc->sc_flags |= SC_OP_BEACONS; | |
739 | } | |
f078f209 | 740 | } |