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ipv6: On interface down/unregister, purge icmp routes too.
[deliverable/linux.git] / drivers / net / wireless / ath9k / main.c
CommitLineData
f078f209
LR		 1/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
21
22#define ATH_PCI_VERSION "0.1"
23
24#define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
f078f209
LR		 25
26static char *dev_info = "ath9k";
27
28MODULE_AUTHOR("Atheros Communications");
29MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
30MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
31MODULE_LICENSE("Dual BSD/GPL");
32
33static struct pci_device_id ath_pci_id_table[] __devinitdata = {
34 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
36 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
38 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
39 { 0 }
40};
41
42static int ath_get_channel(struct ath_softc *sc,
43 struct ieee80211_channel *chan)
44{
45 int i;
46
47 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
48 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
49 return i;
50 }
51
52 return -1;
53}
54
55static u32 ath_get_extchanmode(struct ath_softc *sc,
56 struct ieee80211_channel *chan)
57{
58 u32 chanmode = 0;
59 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
60 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
61
62 switch (chan->band) {
63 case IEEE80211_BAND_2GHZ:
64 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
65 (tx_chan_width == ATH9K_HT_MACMODE_20))
66 chanmode = CHANNEL_G_HT20;
67 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
68 (tx_chan_width == ATH9K_HT_MACMODE_2040))
69 chanmode = CHANNEL_G_HT40PLUS;
70 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
71 (tx_chan_width == ATH9K_HT_MACMODE_2040))
72 chanmode = CHANNEL_G_HT40MINUS;
73 break;
74 case IEEE80211_BAND_5GHZ:
75 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
76 (tx_chan_width == ATH9K_HT_MACMODE_20))
77 chanmode = CHANNEL_A_HT20;
78 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
79 (tx_chan_width == ATH9K_HT_MACMODE_2040))
80 chanmode = CHANNEL_A_HT40PLUS;
81 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
82 (tx_chan_width == ATH9K_HT_MACMODE_2040))
83 chanmode = CHANNEL_A_HT40MINUS;
84 break;
85 default:
86 break;
87 }
88
89 return chanmode;
90}
91
92
93static int ath_setkey_tkip(struct ath_softc *sc,
94 struct ieee80211_key_conf *key,
95 struct ath9k_keyval *hk,
96 const u8 *addr)
97{
98 u8 *key_rxmic = NULL;
99 u8 *key_txmic = NULL;
100
101 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
102 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
103
104 if (addr == NULL) {
105 /* Group key installation */
106 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
107 return ath_keyset(sc, key->keyidx, hk, addr);
108 }
109 if (!sc->sc_splitmic) {
110 /*
111 * data key goes at first index,
112 * the hal handles the MIC keys at index+64.
113 */
114 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
115 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
116 return ath_keyset(sc, key->keyidx, hk, addr);
117 }
118 /*
119 * TX key goes at first index, RX key at +32.
120 * The hal handles the MIC keys at index+64.
121 */
122 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
123 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
124 /* Txmic entry failed. No need to proceed further */
125 DPRINTF(sc, ATH_DBG_KEYCACHE,
126 "%s Setting TX MIC Key Failed\n", __func__);
127 return 0;
128 }
129
130 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
131 /* XXX delete tx key on failure? */
132 return ath_keyset(sc, key->keyidx+32, hk, addr);
133}
134
135static int ath_key_config(struct ath_softc *sc,
136 const u8 *addr,
137 struct ieee80211_key_conf *key)
138{
139 struct ieee80211_vif *vif;
140 struct ath9k_keyval hk;
141 const u8 *mac = NULL;
142 int ret = 0;
143 enum ieee80211_if_types opmode;
144
145 memset(&hk, 0, sizeof(hk));
146
147 switch (key->alg) {
148 case ALG_WEP:
149 hk.kv_type = ATH9K_CIPHER_WEP;
150 break;
151 case ALG_TKIP:
152 hk.kv_type = ATH9K_CIPHER_TKIP;
153 break;
154 case ALG_CCMP:
155 hk.kv_type = ATH9K_CIPHER_AES_CCM;
156 break;
157 default:
158 return -EINVAL;
159 }
160
161 hk.kv_len = key->keylen;
162 memcpy(hk.kv_val, key->key, key->keylen);
163
164 if (!sc->sc_vaps[0])
165 return -EIO;
166
167 vif = sc->sc_vaps[0]->av_if_data;
168 opmode = vif->type;
169
170 /*
171 * Strategy:
172 * For _M_STA mc tx, we will not setup a key at all since we never
173 * tx mc.
174 * _M_STA mc rx, we will use the keyID.
175 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
176 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
177 * peer node. BUT we will plumb a cleartext key so that we can do
178 * perSta default key table lookup in software.
179 */
180 if (is_broadcast_ether_addr(addr)) {
181 switch (opmode) {
182 case IEEE80211_IF_TYPE_STA:
183 /* default key: could be group WPA key
184 * or could be static WEP key */
185 mac = NULL;
186 break;
187 case IEEE80211_IF_TYPE_IBSS:
188 break;
189 case IEEE80211_IF_TYPE_AP:
190 break;
191 default:
192 ASSERT(0);
193 break;
194 }
195 } else {
196 mac = addr;
197 }
198
199 if (key->alg == ALG_TKIP)
200 ret = ath_setkey_tkip(sc, key, &hk, mac);
201 else
202 ret = ath_keyset(sc, key->keyidx, &hk, mac);
203
204 if (!ret)
205 return -EIO;
206
1b96175b
SB		 207 if (mac)
208 sc->sc_keytype = hk.kv_type;
f078f209
LR		 209 return 0;
210}
211
212static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
213{
f078f209
LR		 214 int freeslot;
215
ff9b662d 216 freeslot = (key->keyidx >= 4) ? 1 : 0;
f078f209 217 ath_key_reset(sc, key->keyidx, freeslot);
f078f209
LR		 218}
219
220static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
221{
60653678
S		 222#define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
223#define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
f078f209
LR		 224
225 ht_info->ht_supported = 1;
226 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
227 |(u16)IEEE80211_HT_CAP_MIMO_PS
228 |(u16)IEEE80211_HT_CAP_SGI_40
229 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
230
60653678
S		 231 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
232 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
f078f209
LR		 233 /* setup supported mcs set */
234 memset(ht_info->supp_mcs_set, 0, 16);
235 ht_info->supp_mcs_set[0] = 0xff;
236 ht_info->supp_mcs_set[1] = 0xff;
237 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
238}
239
240static int ath_rate2idx(struct ath_softc *sc, int rate)
241{
242 int i = 0, cur_band, n_rates;
243 struct ieee80211_hw *hw = sc->hw;
244
245 cur_band = hw->conf.channel->band;
246 n_rates = sc->sbands[cur_band].n_bitrates;
247
248 for (i = 0; i < n_rates; i++) {
249 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
250 break;
251 }
252
253 /*
254 * NB:mac80211 validates rx rate index against the supported legacy rate
255 * index only (should be done against ht rates also), return the highest
256 * legacy rate index for rx rate which does not match any one of the
257 * supported basic and extended rates to make mac80211 happy.
258 * The following hack will be cleaned up once the issue with
259 * the rx rate index validation in mac80211 is fixed.
260 */
261 if (i == n_rates)
262 return n_rates - 1;
263 return i;
264}
265
266static void ath9k_rx_prepare(struct ath_softc *sc,
267 struct sk_buff *skb,
268 struct ath_recv_status *status,
269 struct ieee80211_rx_status *rx_status)
270{
271 struct ieee80211_hw *hw = sc->hw;
272 struct ieee80211_channel *curchan = hw->conf.channel;
273
274 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
275
276 rx_status->mactime = status->tsf;
277 rx_status->band = curchan->band;
278 rx_status->freq = curchan->center_freq;
279 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
280 rx_status->signal = rx_status->noise + status->rssi;
281 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
282 rx_status->antenna = status->antenna;
283 rx_status->qual = status->rssi * 100 / 64;
284
285 if (status->flags & ATH_RX_MIC_ERROR)
286 rx_status->flag |= RX_FLAG_MMIC_ERROR;
287 if (status->flags & ATH_RX_FCS_ERROR)
288 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
289
290 rx_status->flag |= RX_FLAG_TSFT;
291}
292
293static u8 parse_mpdudensity(u8 mpdudensity)
294{
295 /*
296 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
297 * 0 for no restriction
298 * 1 for 1/4 us
299 * 2 for 1/2 us
300 * 3 for 1 us
301 * 4 for 2 us
302 * 5 for 4 us
303 * 6 for 8 us
304 * 7 for 16 us
305 */
306 switch (mpdudensity) {
307 case 0:
308 return 0;
309 case 1:
310 case 2:
311 case 3:
312 /* Our lower layer calculations limit our precision to
313 1 microsecond */
314 return 1;
315 case 4:
316 return 2;
317 case 5:
318 return 4;
319 case 6:
320 return 8;
321 case 7:
322 return 16;
323 default:
324 return 0;
325 }
326}
327
328static int ath9k_start(struct ieee80211_hw *hw)
329{
330 struct ath_softc *sc = hw->priv;
331 struct ieee80211_channel *curchan = hw->conf.channel;
332 int error = 0, pos;
333
334 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
335 "initial channel: %d MHz\n", __func__, curchan->center_freq);
336
337 /* setup initial channel */
338
339 pos = ath_get_channel(sc, curchan);
340 if (pos == -1) {
341 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
342 return -EINVAL;
343 }
344
345 sc->sc_ah->ah_channels[pos].chanmode =
346 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
347
348 /* open ath_dev */
349 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
350 if (error) {
351 DPRINTF(sc, ATH_DBG_FATAL,
352 "%s: Unable to complete ath_open\n", __func__);
353 return error;
354 }
355
356 ieee80211_wake_queues(hw);
357 return 0;
358}
359
360static int ath9k_tx(struct ieee80211_hw *hw,
361 struct sk_buff *skb)
362{
363 struct ath_softc *sc = hw->priv;
364 int hdrlen, padsize;
147583c0
JM		 365 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
366
367 /*
368 * As a temporary workaround, assign seq# here; this will likely need
369 * to be cleaned up to work better with Beacon transmission and virtual
370 * BSSes.
371 */
372 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
373 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
374 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
375 sc->seq_no += 0x10;
376 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
377 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
378 }
f078f209
LR		 379
380 /* Add the padding after the header if this is not already done */
381 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
382 if (hdrlen & 3) {
383 padsize = hdrlen % 4;
384 if (skb_headroom(skb) < padsize)
385 return -1;
386 skb_push(skb, padsize);
387 memmove(skb->data, skb->data + padsize, hdrlen);
388 }
389
390 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
391 __func__,
392 skb);
393
394 if (ath_tx_start(sc, skb) != 0) {
395 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
396 dev_kfree_skb_any(skb);
397 /* FIXME: Check for proper return value from ATH_DEV */
398 return 0;
399 }
400
401 return 0;
402}
403
404static void ath9k_stop(struct ieee80211_hw *hw)
405{
406 struct ath_softc *sc = hw->priv;
407 int error;
408
409 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
410
411 error = ath_suspend(sc);
412 if (error)
413 DPRINTF(sc, ATH_DBG_CONFIG,
414 "%s: Device is no longer present\n", __func__);
415
416 ieee80211_stop_queues(hw);
417}
418
419static int ath9k_add_interface(struct ieee80211_hw *hw,
420 struct ieee80211_if_init_conf *conf)
421{
422 struct ath_softc *sc = hw->priv;
423 int error, ic_opmode = 0;
424
425 /* Support only vap for now */
426
427 if (sc->sc_nvaps)
428 return -ENOBUFS;
429
430 switch (conf->type) {
431 case IEEE80211_IF_TYPE_STA:
432 ic_opmode = ATH9K_M_STA;
433 break;
434 case IEEE80211_IF_TYPE_IBSS:
435 ic_opmode = ATH9K_M_IBSS;
436 break;
2ad67de3
JM		 437 case IEEE80211_IF_TYPE_AP:
438 ic_opmode = ATH9K_M_HOSTAP;
439 break;
f078f209
LR		 440 default:
441 DPRINTF(sc, ATH_DBG_FATAL,
2ad67de3
JM		 442 "%s: Interface type %d not yet supported\n",
443 __func__, conf->type);
f078f209
LR		 444 return -EOPNOTSUPP;
445 }
446
447 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
448 __func__,
449 ic_opmode);
450
451 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
452 if (error) {
453 DPRINTF(sc, ATH_DBG_FATAL,
454 "%s: Unable to attach vap, error: %d\n",
455 __func__, error);
456 return error;
457 }
458
459 return 0;
460}
461
462static void ath9k_remove_interface(struct ieee80211_hw *hw,
463 struct ieee80211_if_init_conf *conf)
464{
465 struct ath_softc *sc = hw->priv;
466 struct ath_vap *avp;
467 int error;
468
469 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
470
471 avp = sc->sc_vaps[0];
472 if (avp == NULL) {
473 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
474 __func__);
475 return;
476 }
477
478#ifdef CONFIG_SLOW_ANT_DIV
479 ath_slow_ant_div_stop(&sc->sc_antdiv);
480#endif
481
482 /* Update ratectrl */
483 ath_rate_newstate(sc, avp);
484
485 /* Reclaim beacon resources */
b4696c8b
S		 486 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
487 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
f078f209
LR		 488 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
489 ath_beacon_return(sc, avp);
490 }
491
492 /* Set interrupt mask */
493 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
494 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
672840ac 495 sc->sc_flags &= ~SC_OP_BEACONS;
f078f209
LR		 496
497 error = ath_vap_detach(sc, 0);
498 if (error)
499 DPRINTF(sc, ATH_DBG_FATAL,
500 "%s: Unable to detach vap, error: %d\n",
501 __func__, error);
502}
503
504static int ath9k_config(struct ieee80211_hw *hw,
505 struct ieee80211_conf *conf)
506{
507 struct ath_softc *sc = hw->priv;
508 struct ieee80211_channel *curchan = hw->conf.channel;
509 int pos;
510
511 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
512 __func__,
513 curchan->center_freq);
514
515 pos = ath_get_channel(sc, curchan);
516 if (pos == -1) {
517 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
518 return -EINVAL;
519 }
520
521 sc->sc_ah->ah_channels[pos].chanmode =
86b89eed
S		 522 (curchan->band == IEEE80211_BAND_2GHZ) ?
523 CHANNEL_G : CHANNEL_A;
524
525 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
526 sc->sc_ah->ah_channels[pos].chanmode =
527 ath_get_extchanmode(sc, curchan);
528
f078f209
LR		 529 sc->sc_config.txpowlimit = 2 * conf->power_level;
530
531 /* set h/w channel */
532 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
533 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
534 __func__);
535
536 return 0;
537}
538
539static int ath9k_config_interface(struct ieee80211_hw *hw,
540 struct ieee80211_vif *vif,
541 struct ieee80211_if_conf *conf)
542{
543 struct ath_softc *sc = hw->priv;
2ad67de3 544 struct ath_hal *ah = sc->sc_ah;
f078f209
LR		 545 struct ath_vap *avp;
546 u32 rfilt = 0;
547 int error, i;
548 DECLARE_MAC_BUF(mac);
549
550 avp = sc->sc_vaps[0];
551 if (avp == NULL) {
552 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
553 __func__);
554 return -EINVAL;
555 }
556
2ad67de3
JM		 557 /* TODO: Need to decide which hw opmode to use for multi-interface
558 * cases */
559 if (vif->type == IEEE80211_IF_TYPE_AP &&
560 ah->ah_opmode != ATH9K_M_HOSTAP) {
561 ah->ah_opmode = ATH9K_M_HOSTAP;
562 ath9k_hw_setopmode(ah);
563 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
564 /* Request full reset to get hw opmode changed properly */
565 sc->sc_flags |= SC_OP_FULL_RESET;
566 }
567
f078f209
LR		 568 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
569 !is_zero_ether_addr(conf->bssid)) {
570 switch (vif->type) {
571 case IEEE80211_IF_TYPE_STA:
572 case IEEE80211_IF_TYPE_IBSS:
573 /* Update ratectrl about the new state */
574 ath_rate_newstate(sc, avp);
575
f078f209
LR		 576 /* Set BSSID */
577 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
578 sc->sc_curaid = 0;
579 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
580 sc->sc_curaid);
581
582 /* Set aggregation protection mode parameters */
583 sc->sc_config.ath_aggr_prot = 0;
584
585 /*
586 * Reset our TSF so that its value is lower than the
587 * beacon that we are trying to catch.
588 * Only then hw will update its TSF register with the
589 * new beacon. Reset the TSF before setting the BSSID
590 * to avoid allowing in any frames that would update
591 * our TSF only to have us clear it
592 * immediately thereafter.
593 */
594 ath9k_hw_reset_tsf(sc->sc_ah);
595
596 /* Disable BMISS interrupt when we're not associated */
597 ath9k_hw_set_interrupts(sc->sc_ah,
598 sc->sc_imask &
599 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
600 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
601
602 DPRINTF(sc, ATH_DBG_CONFIG,
603 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
604 __func__, rfilt,
605 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
606
607 /* need to reconfigure the beacon */
672840ac 608 sc->sc_flags &= ~SC_OP_BEACONS ;
f078f209
LR		 609
610 break;
611 default:
612 break;
613 }
614 }
615
616 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
ff9b662d
S		 617 ((vif->type == IEEE80211_IF_TYPE_IBSS) ||
618 (vif->type == IEEE80211_IF_TYPE_AP))) {
f078f209
LR		 619 /*
620 * Allocate and setup the beacon frame.
621 *
622 * Stop any previous beacon DMA. This may be
623 * necessary, for example, when an ibss merge
624 * causes reconfiguration; we may be called
625 * with beacon transmission active.
626 */
627 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
628
629 error = ath_beacon_alloc(sc, 0);
630 if (error != 0)
631 return error;
632
633 ath_beacon_sync(sc, 0);
634 }
635
636 /* Check for WLAN_CAPABILITY_PRIVACY ? */
637 if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
638 for (i = 0; i < IEEE80211_WEP_NKID; i++)
639 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
640 ath9k_hw_keysetmac(sc->sc_ah,
641 (u16)i,
642 sc->sc_curbssid);
643 }
644
645 /* Only legacy IBSS for now */
646 if (vif->type == IEEE80211_IF_TYPE_IBSS)
647 ath_update_chainmask(sc, 0);
648
649 return 0;
650}
651
652#define SUPPORTED_FILTERS \
653 (FIF_PROMISC_IN_BSS | \
654 FIF_ALLMULTI | \
655 FIF_CONTROL | \
656 FIF_OTHER_BSS | \
657 FIF_BCN_PRBRESP_PROMISC | \
658 FIF_FCSFAIL)
659
7dcfdcd9 660/* FIXME: sc->sc_full_reset ? */
f078f209
LR		 661static void ath9k_configure_filter(struct ieee80211_hw *hw,
662 unsigned int changed_flags,
663 unsigned int *total_flags,
664 int mc_count,
665 struct dev_mc_list *mclist)
666{
667 struct ath_softc *sc = hw->priv;
7dcfdcd9 668 u32 rfilt;
f078f209
LR		 669
670 changed_flags &= SUPPORTED_FILTERS;
671 *total_flags &= SUPPORTED_FILTERS;
672
7dcfdcd9
S		 673 sc->rx_filter = *total_flags;
674 rfilt = ath_calcrxfilter(sc);
675 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
676
f078f209
LR		 677 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
678 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
7dcfdcd9 679 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
f078f209 680 }
7dcfdcd9
S		 681
682 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
683 __func__, sc->rx_filter);
f078f209
LR		 684}
685
686static void ath9k_sta_notify(struct ieee80211_hw *hw,
687 struct ieee80211_vif *vif,
688 enum sta_notify_cmd cmd,
689 const u8 *addr)
690{
691 struct ath_softc *sc = hw->priv;
692 struct ath_node *an;
693 unsigned long flags;
694 DECLARE_MAC_BUF(mac);
695
696 spin_lock_irqsave(&sc->node_lock, flags);
697 an = ath_node_find(sc, (u8 *) addr);
698 spin_unlock_irqrestore(&sc->node_lock, flags);
699
700 switch (cmd) {
701 case STA_NOTIFY_ADD:
702 spin_lock_irqsave(&sc->node_lock, flags);
703 if (!an) {
704 ath_node_attach(sc, (u8 *)addr, 0);
705 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
706 __func__,
707 print_mac(mac, addr));
708 } else {
709 ath_node_get(sc, (u8 *)addr);
710 }
711 spin_unlock_irqrestore(&sc->node_lock, flags);
712 break;
713 case STA_NOTIFY_REMOVE:
714 if (!an)
715 DPRINTF(sc, ATH_DBG_FATAL,
716 "%s: Removal of a non-existent node\n",
717 __func__);
718 else {
719 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
720 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
721 __func__,
722 print_mac(mac, addr));
723 }
724 break;
725 default:
726 break;
727 }
728}
729
730static int ath9k_conf_tx(struct ieee80211_hw *hw,
731 u16 queue,
732 const struct ieee80211_tx_queue_params *params)
733{
734 struct ath_softc *sc = hw->priv;
ea9880fb 735 struct ath9k_tx_queue_info qi;
f078f209
LR		 736 int ret = 0, qnum;
737
738 if (queue >= WME_NUM_AC)
739 return 0;
740
741 qi.tqi_aifs = params->aifs;
742 qi.tqi_cwmin = params->cw_min;
743 qi.tqi_cwmax = params->cw_max;
744 qi.tqi_burstTime = params->txop;
745 qnum = ath_get_hal_qnum(queue, sc);
746
747 DPRINTF(sc, ATH_DBG_CONFIG,
748 "%s: Configure tx [queue/halq] [%d/%d], "
749 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
750 __func__,
751 queue,
752 qnum,
753 params->aifs,
754 params->cw_min,
755 params->cw_max,
756 params->txop);
757
758 ret = ath_txq_update(sc, qnum, &qi);
759 if (ret)
760 DPRINTF(sc, ATH_DBG_FATAL,
761 "%s: TXQ Update failed\n", __func__);
762
763 return ret;
764}
765
766static int ath9k_set_key(struct ieee80211_hw *hw,
767 enum set_key_cmd cmd,
768 const u8 *local_addr,
769 const u8 *addr,
770 struct ieee80211_key_conf *key)
771{
772 struct ath_softc *sc = hw->priv;
773 int ret = 0;
774
775 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
776
777 switch (cmd) {
778 case SET_KEY:
779 ret = ath_key_config(sc, addr, key);
780 if (!ret) {
781 set_bit(key->keyidx, sc->sc_keymap);
782 key->hw_key_idx = key->keyidx;
783 /* push IV and Michael MIC generation to stack */
784 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1b96175b
SB		 785 if (key->alg == ALG_TKIP)
786 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
f078f209
LR		 787 }
788 break;
789 case DISABLE_KEY:
790 ath_key_delete(sc, key);
791 clear_bit(key->keyidx, sc->sc_keymap);
792 sc->sc_keytype = ATH9K_CIPHER_CLR;
793 break;
794 default:
795 ret = -EINVAL;
796 }
797
798 return ret;
799}
800
801static void ath9k_ht_conf(struct ath_softc *sc,
802 struct ieee80211_bss_conf *bss_conf)
803{
804#define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
805 struct ath_ht_info *ht_info = &sc->sc_ht_info;
806
807 if (bss_conf->assoc_ht) {
808 ht_info->ext_chan_offset =
809 bss_conf->ht_bss_conf->bss_cap &
810 IEEE80211_HT_IE_CHA_SEC_OFFSET;
811
812 if (!(bss_conf->ht_conf->cap &
813 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
814 (bss_conf->ht_bss_conf->bss_cap &
815 IEEE80211_HT_IE_CHA_WIDTH))
816 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
817 else
818 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
819
820 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
821 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
822 bss_conf->ht_conf->ampdu_factor);
823 ht_info->mpdudensity =
824 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
825
826 }
827
828#undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
829}
830
831static void ath9k_bss_assoc_info(struct ath_softc *sc,
832 struct ieee80211_bss_conf *bss_conf)
833{
834 struct ieee80211_hw *hw = sc->hw;
835 struct ieee80211_channel *curchan = hw->conf.channel;
836 struct ath_vap *avp;
837 int pos;
838 DECLARE_MAC_BUF(mac);
839
840 if (bss_conf->assoc) {
841 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
842 __func__,
843 bss_conf->aid);
844
845 avp = sc->sc_vaps[0];
846 if (avp == NULL) {
847 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
848 __func__);
849 return;
850 }
851
852 /* New association, store aid */
853 if (avp->av_opmode == ATH9K_M_STA) {
854 sc->sc_curaid = bss_conf->aid;
855 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
856 sc->sc_curaid);
857 }
858
859 /* Configure the beacon */
860 ath_beacon_config(sc, 0);
672840ac 861 sc->sc_flags |= SC_OP_BEACONS;
f078f209
LR		 862
863 /* Reset rssi stats */
864 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
865 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
866 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
867 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
868
869 /* Update chainmask */
870 ath_update_chainmask(sc, bss_conf->assoc_ht);
871
872 DPRINTF(sc, ATH_DBG_CONFIG,
873 "%s: bssid %s aid 0x%x\n",
874 __func__,
875 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
876
877 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
878 __func__,
879 curchan->center_freq);
880
881 pos = ath_get_channel(sc, curchan);
882 if (pos == -1) {
883 DPRINTF(sc, ATH_DBG_FATAL,
884 "%s: Invalid channel\n", __func__);
885 return;
886 }
887
888 if (hw->conf.ht_conf.ht_supported)
889 sc->sc_ah->ah_channels[pos].chanmode =
890 ath_get_extchanmode(sc, curchan);
891 else
892 sc->sc_ah->ah_channels[pos].chanmode =
893 (curchan->band == IEEE80211_BAND_2GHZ) ?
894 CHANNEL_G : CHANNEL_A;
895
896 /* set h/w channel */
897 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
898 DPRINTF(sc, ATH_DBG_FATAL,
899 "%s: Unable to set channel\n",
900 __func__);
901
902 ath_rate_newstate(sc, avp);
903 /* Update ratectrl about the new state */
904 ath_rc_node_update(hw, avp->rc_node);
905 } else {
906 DPRINTF(sc, ATH_DBG_CONFIG,
907 "%s: Bss Info DISSOC\n", __func__);
908 sc->sc_curaid = 0;
909 }
910}
911
912static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
913 struct ieee80211_vif *vif,
914 struct ieee80211_bss_conf *bss_conf,
915 u32 changed)
916{
917 struct ath_softc *sc = hw->priv;
918
919 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
920 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
921 __func__,
922 bss_conf->use_short_preamble);
923 if (bss_conf->use_short_preamble)
672840ac 924 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
f078f209 925 else
672840ac 926 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
f078f209
LR		 927 }
928
929 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
930 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
931 __func__,
932 bss_conf->use_cts_prot);
933 if (bss_conf->use_cts_prot &&
934 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
672840ac 935 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
f078f209 936 else
672840ac 937 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
f078f209
LR		 938 }
939
940 if (changed & BSS_CHANGED_HT) {
941 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
942 __func__,
943 bss_conf->assoc_ht);
944 ath9k_ht_conf(sc, bss_conf);
945 }
946
947 if (changed & BSS_CHANGED_ASSOC) {
948 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
949 __func__,
950 bss_conf->assoc);
951 ath9k_bss_assoc_info(sc, bss_conf);
952 }
953}
954
955static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
956{
957 u64 tsf;
958 struct ath_softc *sc = hw->priv;
959 struct ath_hal *ah = sc->sc_ah;
960
961 tsf = ath9k_hw_gettsf64(ah);
962
963 return tsf;
964}
965
966static void ath9k_reset_tsf(struct ieee80211_hw *hw)
967{
968 struct ath_softc *sc = hw->priv;
969 struct ath_hal *ah = sc->sc_ah;
970
971 ath9k_hw_reset_tsf(ah);
972}
973
974static int ath9k_ampdu_action(struct ieee80211_hw *hw,
975 enum ieee80211_ampdu_mlme_action action,
976 const u8 *addr,
977 u16 tid,
978 u16 *ssn)
979{
980 struct ath_softc *sc = hw->priv;
981 int ret = 0;
982
983 switch (action) {
984 case IEEE80211_AMPDU_RX_START:
985 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
986 if (ret < 0)
987 DPRINTF(sc, ATH_DBG_FATAL,
988 "%s: Unable to start RX aggregation\n",
989 __func__);
990 break;
991 case IEEE80211_AMPDU_RX_STOP:
992 ret = ath_rx_aggr_stop(sc, addr, tid);
993 if (ret < 0)
994 DPRINTF(sc, ATH_DBG_FATAL,
995 "%s: Unable to stop RX aggregation\n",
996 __func__);
997 break;
998 case IEEE80211_AMPDU_TX_START:
999 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
1000 if (ret < 0)
1001 DPRINTF(sc, ATH_DBG_FATAL,
1002 "%s: Unable to start TX aggregation\n",
1003 __func__);
1004 else
1005 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1006 break;
1007 case IEEE80211_AMPDU_TX_STOP:
1008 ret = ath_tx_aggr_stop(sc, addr, tid);
1009 if (ret < 0)
1010 DPRINTF(sc, ATH_DBG_FATAL,
1011 "%s: Unable to stop TX aggregation\n",
1012 __func__);
1013
1014 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1015 break;
1016 default:
1017 DPRINTF(sc, ATH_DBG_FATAL,
1018 "%s: Unknown AMPDU action\n", __func__);
1019 }
1020
1021 return ret;
1022}
1023
1024static struct ieee80211_ops ath9k_ops = {
1025 .tx = ath9k_tx,
1026 .start = ath9k_start,
1027 .stop = ath9k_stop,
1028 .add_interface = ath9k_add_interface,
1029 .remove_interface = ath9k_remove_interface,
1030 .config = ath9k_config,
1031 .config_interface = ath9k_config_interface,
1032 .configure_filter = ath9k_configure_filter,
1033 .get_stats = NULL,
1034 .sta_notify = ath9k_sta_notify,
1035 .conf_tx = ath9k_conf_tx,
1036 .get_tx_stats = NULL,
1037 .bss_info_changed = ath9k_bss_info_changed,
1038 .set_tim = NULL,
1039 .set_key = ath9k_set_key,
1040 .hw_scan = NULL,
1041 .get_tkip_seq = NULL,
1042 .set_rts_threshold = NULL,
1043 .set_frag_threshold = NULL,
1044 .set_retry_limit = NULL,
1045 .get_tsf = ath9k_get_tsf,
1046 .reset_tsf = ath9k_reset_tsf,
1047 .tx_last_beacon = NULL,
1048 .ampdu_action = ath9k_ampdu_action
1049};
1050
1051void ath_get_beaconconfig(struct ath_softc *sc,
1052 int if_id,
1053 struct ath_beacon_config *conf)
1054{
1055 struct ieee80211_hw *hw = sc->hw;
1056
1057 /* fill in beacon config data */
1058
1059 conf->beacon_interval = hw->conf.beacon_int;
1060 conf->listen_interval = 100;
1061 conf->dtim_count = 1;
1062 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
1063}
1064
f078f209
LR		 1065void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1066 struct ath_xmit_status *tx_status, struct ath_node *an)
1067{
1068 struct ieee80211_hw *hw = sc->hw;
1069 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1070
1071 DPRINTF(sc, ATH_DBG_XMIT,
1072 "%s: TX complete: skb: %p\n", __func__, skb);
1073
1074 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
1075 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
1076 /* free driver's private data area of tx_info */
1077 if (tx_info->driver_data[0] != NULL)
1078 kfree(tx_info->driver_data[0]);
1079 tx_info->driver_data[0] = NULL;
1080 }
1081
1082 if (tx_status->flags & ATH_TX_BAR) {
1083 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1084 tx_status->flags &= ~ATH_TX_BAR;
1085 }
580f0b8a
JM		 1086
1087 if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
1088 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
1089 /* Frame was not ACKed, but an ACK was expected */
1090 tx_info->status.excessive_retries = 1;
1091 }
1092 } else {
1093 /* Frame was ACKed */
1094 tx_info->flags |= IEEE80211_TX_STAT_ACK;
1095 }
f078f209
LR		 1096
1097 tx_info->status.retry_count = tx_status->retries;
1098
1099 ieee80211_tx_status(hw, skb);
1100 if (an)
1101 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
1102}
1103
19b73c7f 1104int _ath_rx_indicate(struct ath_softc *sc,
f078f209
LR		 1105 struct sk_buff *skb,
1106 struct ath_recv_status *status,
1107 u16 keyix)
1108{
1109 struct ieee80211_hw *hw = sc->hw;
1110 struct ath_node *an = NULL;
1111 struct ieee80211_rx_status rx_status;
1112 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1113 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1114 int padsize;
1115 enum ATH_RX_TYPE st;
1116
1117 /* see if any padding is done by the hw and remove it */
1118 if (hdrlen & 3) {
1119 padsize = hdrlen % 4;
1120 memmove(skb->data + padsize, skb->data, hdrlen);
1121 skb_pull(skb, padsize);
1122 }
1123
f078f209
LR		 1124 /* Prepare rx status */
1125 ath9k_rx_prepare(sc, skb, status, &rx_status);
1126
1127 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
1128 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
1129 rx_status.flag |= RX_FLAG_DECRYPTED;
1130 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
1131 && !(status->flags & ATH_RX_DECRYPT_ERROR)
1132 && skb->len >= hdrlen + 4) {
1133 keyix = skb->data[hdrlen + 3] >> 6;
1134
1135 if (test_bit(keyix, sc->sc_keymap))
1136 rx_status.flag |= RX_FLAG_DECRYPTED;
1137 }
1138
1139 spin_lock_bh(&sc->node_lock);
1140 an = ath_node_find(sc, hdr->addr2);
1141 spin_unlock_bh(&sc->node_lock);
1142
1143 if (an) {
1144 ath_rx_input(sc, an,
1145 hw->conf.ht_conf.ht_supported,
1146 skb, status, &st);
1147 }
1148 if (!an || (st != ATH_RX_CONSUMED))
1149 __ieee80211_rx(hw, skb, &rx_status);
1150
1151 return 0;
1152}
1153
1154int ath_rx_subframe(struct ath_node *an,
1155 struct sk_buff *skb,
1156 struct ath_recv_status *status)
1157{
1158 struct ath_softc *sc = an->an_sc;
1159 struct ieee80211_hw *hw = sc->hw;
1160 struct ieee80211_rx_status rx_status;
1161
1162 /* Prepare rx status */
1163 ath9k_rx_prepare(sc, skb, status, &rx_status);
1164 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
1165 rx_status.flag |= RX_FLAG_DECRYPTED;
1166
1167 __ieee80211_rx(hw, skb, &rx_status);
1168
1169 return 0;
1170}
1171
c83be688
VT		 1172/********************************/
1173/* LED functions */
1174/********************************/
1175
1176static void ath_led_brightness(struct led_classdev *led_cdev,
1177 enum led_brightness brightness)
1178{
1179 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
1180 struct ath_softc *sc = led->sc;
1181
1182 switch (brightness) {
1183 case LED_OFF:
1184 if (led->led_type == ATH_LED_ASSOC ||
1185 led->led_type == ATH_LED_RADIO)
1186 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
1187 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
1188 (led->led_type == ATH_LED_RADIO) ? 1 :
1189 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
1190 break;
1191 case LED_FULL:
1192 if (led->led_type == ATH_LED_ASSOC)
1193 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
1194 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
1195 break;
1196 default:
1197 break;
1198 }
1199}
1200
1201static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
1202 char *trigger)
1203{
1204 int ret;
1205
1206 led->sc = sc;
1207 led->led_cdev.name = led->name;
1208 led->led_cdev.default_trigger = trigger;
1209 led->led_cdev.brightness_set = ath_led_brightness;
1210
1211 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
1212 if (ret)
1213 DPRINTF(sc, ATH_DBG_FATAL,
1214 "Failed to register led:%s", led->name);
1215 else
1216 led->registered = 1;
1217 return ret;
1218}
1219
1220static void ath_unregister_led(struct ath_led *led)
1221{
1222 if (led->registered) {
1223 led_classdev_unregister(&led->led_cdev);
1224 led->registered = 0;
1225 }
1226}
1227
1228static void ath_deinit_leds(struct ath_softc *sc)
1229{
1230 ath_unregister_led(&sc->assoc_led);
1231 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
1232 ath_unregister_led(&sc->tx_led);
1233 ath_unregister_led(&sc->rx_led);
1234 ath_unregister_led(&sc->radio_led);
1235 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1236}
1237
1238static void ath_init_leds(struct ath_softc *sc)
1239{
1240 char *trigger;
1241 int ret;
1242
1243 /* Configure gpio 1 for output */
1244 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1245 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1246 /* LED off, active low */
1247 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1248
1249 trigger = ieee80211_get_radio_led_name(sc->hw);
1250 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
1251 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
1252 ret = ath_register_led(sc, &sc->radio_led, trigger);
1253 sc->radio_led.led_type = ATH_LED_RADIO;
1254 if (ret)
1255 goto fail;
1256
1257 trigger = ieee80211_get_assoc_led_name(sc->hw);
1258 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
1259 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
1260 ret = ath_register_led(sc, &sc->assoc_led, trigger);
1261 sc->assoc_led.led_type = ATH_LED_ASSOC;
1262 if (ret)
1263 goto fail;
1264
1265 trigger = ieee80211_get_tx_led_name(sc->hw);
1266 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
1267 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
1268 ret = ath_register_led(sc, &sc->tx_led, trigger);
1269 sc->tx_led.led_type = ATH_LED_TX;
1270 if (ret)
1271 goto fail;
1272
1273 trigger = ieee80211_get_rx_led_name(sc->hw);
1274 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
1275 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
1276 ret = ath_register_led(sc, &sc->rx_led, trigger);
1277 sc->rx_led.led_type = ATH_LED_RX;
1278 if (ret)
1279 goto fail;
1280
1281 return;
1282
1283fail:
1284 ath_deinit_leds(sc);
1285}
1286
f078f209
LR		 1287static int ath_detach(struct ath_softc *sc)
1288{
1289 struct ieee80211_hw *hw = sc->hw;
1290
1291 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
1292
c83be688
VT		 1293 /* Deinit LED control */
1294 ath_deinit_leds(sc);
1295
f078f209
LR		 1296 /* Unregister hw */
1297
1298 ieee80211_unregister_hw(hw);
1299
1300 /* unregister Rate control */
1301 ath_rate_control_unregister();
1302
1303 /* tx/rx cleanup */
1304
1305 ath_rx_cleanup(sc);
1306 ath_tx_cleanup(sc);
1307
1308 /* Deinit */
1309
1310 ath_deinit(sc);
1311
1312 return 0;
1313}
1314
1315static int ath_attach(u16 devid,
1316 struct ath_softc *sc)
1317{
1318 struct ieee80211_hw *hw = sc->hw;
1319 int error = 0;
1320
1321 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
1322
1323 error = ath_init(devid, sc);
1324 if (error != 0)
1325 return error;
1326
1327 /* Init nodes */
1328
1329 INIT_LIST_HEAD(&sc->node_list);
1330 spin_lock_init(&sc->node_lock);
1331
1332 /* get mac address from hardware and set in mac80211 */
1333
1334 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
1335
1336 /* setup channels and rates */
1337
1338 sc->sbands[IEEE80211_BAND_2GHZ].channels =
1339 sc->channels[IEEE80211_BAND_2GHZ];
1340 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1341 sc->rates[IEEE80211_BAND_2GHZ];
1342 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1343
60b67f51 1344 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
f078f209
LR		 1345 /* Setup HT capabilities for 2.4Ghz*/
1346 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
1347
1348 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1349 &sc->sbands[IEEE80211_BAND_2GHZ];
1350
86b89eed 1351 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
f078f209
LR		 1352 sc->sbands[IEEE80211_BAND_5GHZ].channels =
1353 sc->channels[IEEE80211_BAND_5GHZ];
1354 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1355 sc->rates[IEEE80211_BAND_5GHZ];
1356 sc->sbands[IEEE80211_BAND_5GHZ].band =
1357 IEEE80211_BAND_5GHZ;
1358
60b67f51 1359 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
f078f209
LR		 1360 /* Setup HT capabilities for 5Ghz*/
1361 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
1362
1363 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1364 &sc->sbands[IEEE80211_BAND_5GHZ];
1365 }
1366
1367 /* FIXME: Have to figure out proper hw init values later */
1368
1369 hw->queues = 4;
1370 hw->ampdu_queues = 1;
1371
1372 /* Register rate control */
1373 hw->rate_control_algorithm = "ath9k_rate_control";
1374 error = ath_rate_control_register();
1375 if (error != 0) {
1376 DPRINTF(sc, ATH_DBG_FATAL,
1377 "%s: Unable to register rate control "
1378 "algorithm:%d\n", __func__, error);
1379 ath_rate_control_unregister();
1380 goto bad;
1381 }
1382
1383 error = ieee80211_register_hw(hw);
1384 if (error != 0) {
1385 ath_rate_control_unregister();
1386 goto bad;
1387 }
1388
c83be688
VT		 1389 /* Initialize LED control */
1390 ath_init_leds(sc);
1391
f078f209
LR		 1392 /* initialize tx/rx engine */
1393
1394 error = ath_tx_init(sc, ATH_TXBUF);
1395 if (error != 0)
c83be688 1396 goto detach;
f078f209
LR		 1397
1398 error = ath_rx_init(sc, ATH_RXBUF);
1399 if (error != 0)
c83be688 1400 goto detach;
f078f209
LR		 1401
1402 return 0;
c83be688 1403detach:
f078f209
LR		 1404 ath_detach(sc);
1405bad:
1406 return error;
1407}
1408
1409static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1410{
1411 void __iomem *mem;
1412 struct ath_softc *sc;
1413 struct ieee80211_hw *hw;
1414 const char *athname;
1415 u8 csz;
1416 u32 val;
1417 int ret = 0;
1418
1419 if (pci_enable_device(pdev))
1420 return -EIO;
1421
1422 /* XXX 32-bit addressing only */
1423 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1424 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1425 ret = -ENODEV;
1426 goto bad;
1427 }
1428
1429 /*
1430 * Cache line size is used to size and align various
1431 * structures used to communicate with the hardware.
1432 */
1433 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1434 if (csz == 0) {
1435 /*
1436 * Linux 2.4.18 (at least) writes the cache line size
1437 * register as a 16-bit wide register which is wrong.
1438 * We must have this setup properly for rx buffer
1439 * DMA to work so force a reasonable value here if it
1440 * comes up zero.
1441 */
1442 csz = L1_CACHE_BYTES / sizeof(u32);
1443 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1444 }
1445 /*
1446 * The default setting of latency timer yields poor results,
1447 * set it to the value used by other systems. It may be worth
1448 * tweaking this setting more.
1449 */
1450 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1451
1452 pci_set_master(pdev);
1453
1454 /*
1455 * Disable the RETRY_TIMEOUT register (0x41) to keep
1456 * PCI Tx retries from interfering with C3 CPU state.
1457 */
1458 pci_read_config_dword(pdev, 0x40, &val);
1459 if ((val & 0x0000ff00) != 0)
1460 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1461
1462 ret = pci_request_region(pdev, 0, "ath9k");
1463 if (ret) {
1464 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1465 ret = -ENODEV;
1466 goto bad;
1467 }
1468
1469 mem = pci_iomap(pdev, 0, 0);
1470 if (!mem) {
1471 printk(KERN_ERR "PCI memory map error\n") ;
1472 ret = -EIO;
1473 goto bad1;
1474 }
1475
1476 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1477 if (hw == NULL) {
1478 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1479 goto bad2;
1480 }
1481
19b73c7f 1482 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
e022edbd 1483 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
19b73c7f 1484 IEEE80211_HW_SIGNAL_DBM |
f078f209
LR		 1485 IEEE80211_HW_NOISE_DBM;
1486
f59ac048
LR		 1487 hw->wiphy->interface_modes =
1488 BIT(NL80211_IFTYPE_AP) |
1489 BIT(NL80211_IFTYPE_STATION) |
1490 BIT(NL80211_IFTYPE_ADHOC);
1491
f078f209
LR		 1492 SET_IEEE80211_DEV(hw, &pdev->dev);
1493 pci_set_drvdata(pdev, hw);
1494
1495 sc = hw->priv;
1496 sc->hw = hw;
1497 sc->pdev = pdev;
1498 sc->mem = mem;
1499
1500 if (ath_attach(id->device, sc) != 0) {
1501 ret = -ENODEV;
1502 goto bad3;
1503 }
1504
1505 /* setup interrupt service routine */
1506
1507 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1508 printk(KERN_ERR "%s: request_irq failed\n",
1509 wiphy_name(hw->wiphy));
1510 ret = -EIO;
1511 goto bad4;
1512 }
1513
1514 athname = ath9k_hw_probe(id->vendor, id->device);
1515
1516 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1517 wiphy_name(hw->wiphy),
1518 athname ? athname : "Atheros ???",
1519 (unsigned long)mem, pdev->irq);
1520
1521 return 0;
1522bad4:
1523 ath_detach(sc);
1524bad3:
1525 ieee80211_free_hw(hw);
1526bad2:
1527 pci_iounmap(pdev, mem);
1528bad1:
1529 pci_release_region(pdev, 0);
1530bad:
1531 pci_disable_device(pdev);
1532 return ret;
1533}
1534
1535static void ath_pci_remove(struct pci_dev *pdev)
1536{
1537 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1538 struct ath_softc *sc = hw->priv;
1539
1540 if (pdev->irq)
1541 free_irq(pdev->irq, sc);
1542 ath_detach(sc);
1543 pci_iounmap(pdev, sc->mem);
1544 pci_release_region(pdev, 0);
1545 pci_disable_device(pdev);
1546 ieee80211_free_hw(hw);
1547}
1548
1549#ifdef CONFIG_PM
1550
1551static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1552{
c83be688
VT		 1553 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1554 struct ath_softc *sc = hw->priv;
1555
1556 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
f078f209
LR		 1557 pci_save_state(pdev);
1558 pci_disable_device(pdev);
1559 pci_set_power_state(pdev, 3);
1560
1561 return 0;
1562}
1563
1564static int ath_pci_resume(struct pci_dev *pdev)
1565{
c83be688
VT		 1566 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1567 struct ath_softc *sc = hw->priv;
f078f209
LR		 1568 u32 val;
1569 int err;
1570
1571 err = pci_enable_device(pdev);
1572 if (err)
1573 return err;
1574 pci_restore_state(pdev);
1575 /*
1576 * Suspend/Resume resets the PCI configuration space, so we have to
1577 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1578 * PCI Tx retries from interfering with C3 CPU state
1579 */
1580 pci_read_config_dword(pdev, 0x40, &val);
1581 if ((val & 0x0000ff00) != 0)
1582 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1583
c83be688
VT		 1584 /* Enable LED */
1585 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1586 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1587 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1588
f078f209
LR		 1589 return 0;
1590}
1591
1592#endif /* CONFIG_PM */
1593
1594MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1595
1596static struct pci_driver ath_pci_driver = {
1597 .name = "ath9k",
1598 .id_table = ath_pci_id_table,
1599 .probe = ath_pci_probe,
1600 .remove = ath_pci_remove,
1601#ifdef CONFIG_PM
1602 .suspend = ath_pci_suspend,
1603 .resume = ath_pci_resume,
1604#endif /* CONFIG_PM */
1605};
1606
1607static int __init init_ath_pci(void)
1608{
1609 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1610
1611 if (pci_register_driver(&ath_pci_driver) < 0) {
1612 printk(KERN_ERR
1613 "ath_pci: No devices found, driver not installed.\n");
1614 pci_unregister_driver(&ath_pci_driver);
1615 return -ENODEV;
1616 }
1617
1618 return 0;
1619}
1620module_init(init_ath_pci);
1621
1622static void __exit exit_ath_pci(void)
1623{
1624 pci_unregister_driver(&ath_pci_driver);
1625 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1626}
1627module_exit(exit_ath_pci);
Linux kernel - Deliverables
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