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[PATCH] atmel: CodingStyle cleanup
[deliverable/linux.git] / drivers / net / wireless / atmel.c
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1da177e4
LT		 1/*** -*- linux-c -*- **********************************************************
2
3 Driver for Atmel at76c502 at76c504 and at76c506 wireless cards.
4
5 Copyright 2000-2001 ATMEL Corporation.
6 Copyright 2003-2004 Simon Kelley.
7
4d791aad
CP		 8 This code was developed from version 2.1.1 of the Atmel drivers,
9 released by Atmel corp. under the GPL in December 2002. It also
10 includes code from the Linux aironet drivers (C) Benjamin Reed,
1da177e4
LT		 11 and the Linux PCMCIA package, (C) David Hinds and the Linux wireless
12 extensions, (C) Jean Tourrilhes.
13
14 The firmware module for reading the MAC address of the card comes from
15 net.russotto.AtmelMACFW, written by Matthew T. Russotto and copyright
16 by him. net.russotto.AtmelMACFW is used under the GPL license version 2.
17 This file contains the module in binary form and, under the terms
18 of the GPL, in source form. The source is located at the end of the file.
19
20 This program is free software; you can redistribute it and/or modify
21 it under the terms of the GNU General Public License as published by
22 the Free Software Foundation; either version 2 of the License, or
23 (at your option) any later version.
24
25 This software is distributed in the hope that it will be useful,
26 but WITHOUT ANY WARRANTY; without even the implied warranty of
27 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 GNU General Public License for more details.
29
30 You should have received a copy of the GNU General Public License
31 along with Atmel wireless lan drivers; if not, write to the Free Software
32 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
33
4d791aad 34 For all queries about this code, please contact the current author,
1da177e4
LT		 35 Simon Kelley <simon@thekelleys.org.uk> and not Atmel Corporation.
36
37 Credit is due to HP UK and Cambridge Online Systems Ltd for supplying
38 hardware used during development of this driver.
39
40******************************************************************************/
41
42#include <linux/config.h>
43#include <linux/init.h>
44
45#include <linux/kernel.h>
46#include <linux/sched.h>
47#include <linux/ptrace.h>
48#include <linux/slab.h>
49#include <linux/string.h>
50#include <linux/ctype.h>
51#include <linux/timer.h>
52#include <asm/io.h>
53#include <asm/system.h>
54#include <asm/uaccess.h>
55#include <linux/module.h>
56#include <linux/netdevice.h>
57#include <linux/etherdevice.h>
58#include <linux/skbuff.h>
59#include <linux/if_arp.h>
60#include <linux/ioport.h>
61#include <linux/fcntl.h>
62#include <linux/delay.h>
63#include <linux/wireless.h>
64#include <net/iw_handler.h>
65#include <linux/byteorder/generic.h>
66#include <linux/crc32.h>
67#include <linux/proc_fs.h>
68#include <linux/device.h>
69#include <linux/moduleparam.h>
70#include <linux/firmware.h>
b453872c 71#include <net/ieee80211.h>
1da177e4
LT		 72#include "atmel.h"
73
74#define DRIVER_MAJOR 0
b16a228d 75#define DRIVER_MINOR 98
1da177e4
LT		 76
77MODULE_AUTHOR("Simon Kelley");
78MODULE_DESCRIPTION("Support for Atmel at76c50x 802.11 wireless ethernet cards.");
79MODULE_LICENSE("GPL");
80MODULE_SUPPORTED_DEVICE("Atmel at76c50x wireless cards");
81
4d791aad 82/* The name of the firmware file to be loaded
1da177e4
LT		 83 over-rides any automatic selection */
84static char *firmware = NULL;
85module_param(firmware, charp, 0);
86
87/* table of firmware file names */
4d791aad 88static struct {
1da177e4
LT		 89 AtmelFWType fw_type;
90 const char *fw_file;
91 const char *fw_file_ext;
92} fw_table[] = {
93 { ATMEL_FW_TYPE_502, "atmel_at76c502", "bin" },
94 { ATMEL_FW_TYPE_502D, "atmel_at76c502d", "bin" },
95 { ATMEL_FW_TYPE_502E, "atmel_at76c502e", "bin" },
96 { ATMEL_FW_TYPE_502_3COM, "atmel_at76c502_3com", "bin" },
97 { ATMEL_FW_TYPE_504, "atmel_at76c504", "bin" },
98 { ATMEL_FW_TYPE_504_2958, "atmel_at76c504_2958", "bin" },
99 { ATMEL_FW_TYPE_504A_2958,"atmel_at76c504a_2958","bin" },
100 { ATMEL_FW_TYPE_506, "atmel_at76c506", "bin" },
101 { ATMEL_FW_TYPE_NONE, NULL, NULL }
102};
103
104#define MAX_SSID_LENGTH 32
105#define MGMT_JIFFIES (256 * HZ / 100)
106
4d791aad 107#define MAX_BSS_ENTRIES 64
1da177e4
LT		 108
109/* registers */
4d791aad
CP		 110#define GCR 0x00 // (SIR0) General Configuration Register
111#define BSR 0x02 // (SIR1) Bank Switching Select Register
1da177e4
LT		 112#define AR 0x04
113#define DR 0x08
4d791aad
CP		 114#define MR1 0x12 // Mirror Register 1
115#define MR2 0x14 // Mirror Register 2
116#define MR3 0x16 // Mirror Register 3
117#define MR4 0x18 // Mirror Register 4
1da177e4
LT		 118
119#define GPR1 0x0c
120#define GPR2 0x0e
121#define GPR3 0x10
122//
123// Constants for the GCR register.
124//
125#define GCR_REMAP 0x0400 // Remap internal SRAM to 0
4d791aad 126#define GCR_SWRES 0x0080 // BIU reset (ARM and PAI are NOT reset)
1da177e4 127#define GCR_CORES 0x0060 // Core Reset (ARM and PAI are reset)
4d791aad 128#define GCR_ENINT 0x0002 // Enable Interrupts
1da177e4
LT		 129#define GCR_ACKINT 0x0008 // Acknowledge Interrupts
130
131#define BSS_SRAM 0x0200 // AMBA module selection --> SRAM
132#define BSS_IRAM 0x0100 // AMBA module selection --> IRAM
133//
134// Constants for the MR registers.
135//
136#define MAC_INIT_COMPLETE 0x0001 // MAC init has been completed
137#define MAC_BOOT_COMPLETE 0x0010 // MAC boot has been completed
138#define MAC_INIT_OK 0x0002 // MAC boot has been completed
139
140#define C80211_SUBTYPE_MGMT_ASS_REQUEST 0x00
141#define C80211_SUBTYPE_MGMT_ASS_RESPONSE 0x10
142#define C80211_SUBTYPE_MGMT_REASS_REQUEST 0x20
143#define C80211_SUBTYPE_MGMT_REASS_RESPONSE 0x30
144#define C80211_SUBTYPE_MGMT_ProbeRequest 0x40
145#define C80211_SUBTYPE_MGMT_ProbeResponse 0x50
146#define C80211_SUBTYPE_MGMT_BEACON 0x80
147#define C80211_SUBTYPE_MGMT_ATIM 0x90
148#define C80211_SUBTYPE_MGMT_DISASSOSIATION 0xA0
149#define C80211_SUBTYPE_MGMT_Authentication 0xB0
150#define C80211_SUBTYPE_MGMT_Deauthentication 0xC0
151
152#define C80211_MGMT_AAN_OPENSYSTEM 0x0000
153#define C80211_MGMT_AAN_SHAREDKEY 0x0001
154
155#define C80211_MGMT_CAPABILITY_ESS 0x0001 // see 802.11 p.58
156#define C80211_MGMT_CAPABILITY_IBSS 0x0002 // - " -
157#define C80211_MGMT_CAPABILITY_CFPollable 0x0004 // - " -
158#define C80211_MGMT_CAPABILITY_CFPollRequest 0x0008 // - " -
159#define C80211_MGMT_CAPABILITY_Privacy 0x0010 // - " -
160
161#define C80211_MGMT_SC_Success 0
162#define C80211_MGMT_SC_Unspecified 1
163#define C80211_MGMT_SC_SupportCapabilities 10
164#define C80211_MGMT_SC_ReassDenied 11
165#define C80211_MGMT_SC_AssDenied 12
166#define C80211_MGMT_SC_AuthAlgNotSupported 13
167#define C80211_MGMT_SC_AuthTransSeqNumError 14
168#define C80211_MGMT_SC_AuthRejectChallenge 15
169#define C80211_MGMT_SC_AuthRejectTimeout 16
170#define C80211_MGMT_SC_AssDeniedHandleAP 17
171#define C80211_MGMT_SC_AssDeniedBSSRate 18
172
173#define C80211_MGMT_ElementID_SSID 0
174#define C80211_MGMT_ElementID_SupportedRates 1
175#define C80211_MGMT_ElementID_ChallengeText 16
176#define C80211_MGMT_CAPABILITY_ShortPreamble 0x0020
177
178#define MIB_MAX_DATA_BYTES 212
179#define MIB_HEADER_SIZE 4 /* first four fields */
180
181struct get_set_mib {
182 u8 type;
183 u8 size;
184 u8 index;
185 u8 reserved;
186 u8 data[MIB_MAX_DATA_BYTES];
187};
188
189struct rx_desc {
190 u32 Next;
191 u16 MsduPos;
192 u16 MsduSize;
4d791aad 193
1da177e4
LT		 194 u8 State;
195 u8 Status;
196 u8 Rate;
197 u8 Rssi;
198 u8 LinkQuality;
199 u8 PreambleType;
200 u16 Duration;
201 u32 RxTime;
1da177e4
LT		 202};
203
204#define RX_DESC_FLAG_VALID 0x80
205#define RX_DESC_FLAG_CONSUMED 0x40
206#define RX_DESC_FLAG_IDLE 0x00
207
208#define RX_STATUS_SUCCESS 0x00
209
210#define RX_DESC_MSDU_POS_OFFSET 4
211#define RX_DESC_MSDU_SIZE_OFFSET 6
212#define RX_DESC_FLAGS_OFFSET 8
213#define RX_DESC_STATUS_OFFSET 9
214#define RX_DESC_RSSI_OFFSET 11
215#define RX_DESC_LINK_QUALITY_OFFSET 12
216#define RX_DESC_PREAMBLE_TYPE_OFFSET 13
217#define RX_DESC_DURATION_OFFSET 14
218#define RX_DESC_RX_TIME_OFFSET 16
219
1da177e4
LT		 220struct tx_desc {
221 u32 NextDescriptor;
222 u16 TxStartOfFrame;
223 u16 TxLength;
4d791aad 224
1da177e4
LT		 225 u8 TxState;
226 u8 TxStatus;
227 u8 RetryCount;
4d791aad 228
1da177e4
LT		 229 u8 TxRate;
230
231 u8 KeyIndex;
232 u8 ChiperType;
233 u8 ChipreLength;
234 u8 Reserved1;
235
236 u8 Reserved;
237 u8 PacketType;
238 u16 HostTxLength;
1da177e4
LT		 239};
240
1da177e4
LT		 241#define TX_DESC_NEXT_OFFSET 0
242#define TX_DESC_POS_OFFSET 4
243#define TX_DESC_SIZE_OFFSET 6
244#define TX_DESC_FLAGS_OFFSET 8
245#define TX_DESC_STATUS_OFFSET 9
246#define TX_DESC_RETRY_OFFSET 10
247#define TX_DESC_RATE_OFFSET 11
248#define TX_DESC_KEY_INDEX_OFFSET 12
249#define TX_DESC_CIPHER_TYPE_OFFSET 13
250#define TX_DESC_CIPHER_LENGTH_OFFSET 14
251#define TX_DESC_PACKET_TYPE_OFFSET 17
252#define TX_DESC_HOST_LENGTH_OFFSET 18
253
1da177e4
LT		 254///////////////////////////////////////////////////////
255// Host-MAC interface
256///////////////////////////////////////////////////////
257
258#define TX_STATUS_SUCCESS 0x00
259
260#define TX_FIRM_OWN 0x80
261#define TX_DONE 0x40
262
1da177e4
LT		 263#define TX_ERROR 0x01
264
265#define TX_PACKET_TYPE_DATA 0x01
266#define TX_PACKET_TYPE_MGMT 0x02
267
268#define ISR_EMPTY 0x00 // no bits set in ISR
269#define ISR_TxCOMPLETE 0x01 // packet transmitted
270#define ISR_RxCOMPLETE 0x02 // packet received
271#define ISR_RxFRAMELOST 0x04 // Rx Frame lost
272#define ISR_FATAL_ERROR 0x08 // Fatal error
273#define ISR_COMMAND_COMPLETE 0x10 // command completed
274#define ISR_OUT_OF_RANGE 0x20 // command completed
275#define ISR_IBSS_MERGE 0x40 // (4.1.2.30): IBSS merge
4d791aad 276#define ISR_GENERIC_IRQ 0x80
1da177e4
LT		 277
278#define Local_Mib_Type 0x01
279#define Mac_Address_Mib_Type 0x02
280#define Mac_Mib_Type 0x03
281#define Statistics_Mib_Type 0x04
282#define Mac_Mgmt_Mib_Type 0x05
283#define Mac_Wep_Mib_Type 0x06
284#define Phy_Mib_Type 0x07
285#define Multi_Domain_MIB 0x08
286
287#define MAC_MGMT_MIB_CUR_BSSID_POS 14
288#define MAC_MIB_FRAG_THRESHOLD_POS 8
289#define MAC_MIB_RTS_THRESHOLD_POS 10
290#define MAC_MIB_SHORT_RETRY_POS 16
291#define MAC_MIB_LONG_RETRY_POS 17
292#define MAC_MIB_SHORT_RETRY_LIMIT_POS 16
293#define MAC_MGMT_MIB_BEACON_PER_POS 0
294#define MAC_MGMT_MIB_STATION_ID_POS 6
295#define MAC_MGMT_MIB_CUR_PRIVACY_POS 11
296#define MAC_MGMT_MIB_CUR_BSSID_POS 14
297#define MAC_MGMT_MIB_PS_MODE_POS 53
298#define MAC_MGMT_MIB_LISTEN_INTERVAL_POS 54
299#define MAC_MGMT_MIB_MULTI_DOMAIN_IMPLEMENTED 56
300#define MAC_MGMT_MIB_MULTI_DOMAIN_ENABLED 57
301#define PHY_MIB_CHANNEL_POS 14
302#define PHY_MIB_RATE_SET_POS 20
303#define PHY_MIB_REG_DOMAIN_POS 26
304#define LOCAL_MIB_AUTO_TX_RATE_POS 3
305#define LOCAL_MIB_SSID_SIZE 5
306#define LOCAL_MIB_TX_PROMISCUOUS_POS 6
307#define LOCAL_MIB_TX_MGMT_RATE_POS 7
308#define LOCAL_MIB_TX_CONTROL_RATE_POS 8
309#define LOCAL_MIB_PREAMBLE_TYPE 9
310#define MAC_ADDR_MIB_MAC_ADDR_POS 0
311
1da177e4
LT		 312#define CMD_Set_MIB_Vars 0x01
313#define CMD_Get_MIB_Vars 0x02
314#define CMD_Scan 0x03
315#define CMD_Join 0x04
316#define CMD_Start 0x05
317#define CMD_EnableRadio 0x06
318#define CMD_DisableRadio 0x07
319#define CMD_SiteSurvey 0x0B
320
321#define CMD_STATUS_IDLE 0x00
322#define CMD_STATUS_COMPLETE 0x01
323#define CMD_STATUS_UNKNOWN 0x02
324#define CMD_STATUS_INVALID_PARAMETER 0x03
325#define CMD_STATUS_FUNCTION_NOT_SUPPORTED 0x04
326#define CMD_STATUS_TIME_OUT 0x07
327#define CMD_STATUS_IN_PROGRESS 0x08
328#define CMD_STATUS_REJECTED_RADIO_OFF 0x09
329#define CMD_STATUS_HOST_ERROR 0xFF
330#define CMD_STATUS_BUSY 0xFE
331
1da177e4
LT		 332#define CMD_BLOCK_COMMAND_OFFSET 0
333#define CMD_BLOCK_STATUS_OFFSET 1
334#define CMD_BLOCK_PARAMETERS_OFFSET 4
335
336#define SCAN_OPTIONS_SITE_SURVEY 0x80
337
338#define MGMT_FRAME_BODY_OFFSET 24
339#define MAX_AUTHENTICATION_RETRIES 3
4d791aad 340#define MAX_ASSOCIATION_RETRIES 3
1da177e4
LT		 341
342#define AUTHENTICATION_RESPONSE_TIME_OUT 1000
343
344#define MAX_WIRELESS_BODY 2316 /* mtu is 2312, CRC is 4 */
345#define LOOP_RETRY_LIMIT 500000
346
4d791aad
CP		 347#define ACTIVE_MODE 1
348#define PS_MODE 2
1da177e4
LT		 349
350#define MAX_ENCRYPTION_KEYS 4
351#define MAX_ENCRYPTION_KEY_SIZE 40
352
353///////////////////////////////////////////////////////////////////////////
354// 802.11 related definitions
355///////////////////////////////////////////////////////////////////////////
356
357//
358// Regulatory Domains
359//
360
361#define REG_DOMAIN_FCC 0x10 //Channels 1-11 USA
362#define REG_DOMAIN_DOC 0x20 //Channel 1-11 Canada
363#define REG_DOMAIN_ETSI 0x30 //Channel 1-13 Europe (ex Spain/France)
364#define REG_DOMAIN_SPAIN 0x31 //Channel 10-11 Spain
365#define REG_DOMAIN_FRANCE 0x32 //Channel 10-13 France
366#define REG_DOMAIN_MKK 0x40 //Channel 14 Japan
367#define REG_DOMAIN_MKK1 0x41 //Channel 1-14 Japan(MKK1)
368#define REG_DOMAIN_ISRAEL 0x50 //Channel 3-9 ISRAEL
369
4d791aad 370#define BSS_TYPE_AD_HOC 1
1da177e4
LT		 371#define BSS_TYPE_INFRASTRUCTURE 2
372
373#define SCAN_TYPE_ACTIVE 0
374#define SCAN_TYPE_PASSIVE 1
375
376#define LONG_PREAMBLE 0
377#define SHORT_PREAMBLE 1
378#define AUTO_PREAMBLE 2
379
380#define DATA_FRAME_WS_HEADER_SIZE 30
381
4d791aad 382/* promiscuous mode control */
1da177e4
LT		 383#define PROM_MODE_OFF 0x0
384#define PROM_MODE_UNKNOWN 0x1
385#define PROM_MODE_CRC_FAILED 0x2
386#define PROM_MODE_DUPLICATED 0x4
387#define PROM_MODE_MGMT 0x8
388#define PROM_MODE_CTRL 0x10
389#define PROM_MODE_BAD_PROTOCOL 0x20
390
4d791aad 391#define IFACE_INT_STATUS_OFFSET 0
1da177e4
LT		 392#define IFACE_INT_MASK_OFFSET 1
393#define IFACE_LOCKOUT_HOST_OFFSET 2
394#define IFACE_LOCKOUT_MAC_OFFSET 3
395#define IFACE_FUNC_CTRL_OFFSET 28
396#define IFACE_MAC_STAT_OFFSET 30
397#define IFACE_GENERIC_INT_TYPE_OFFSET 32
398
4d791aad 399#define CIPHER_SUITE_NONE 0
1da177e4
LT		 400#define CIPHER_SUITE_WEP_64 1
401#define CIPHER_SUITE_TKIP 2
402#define CIPHER_SUITE_AES 3
403#define CIPHER_SUITE_CCX 4
404#define CIPHER_SUITE_WEP_128 5
405
406//
407// IFACE MACROS & definitions
408//
409//
410
4d791aad 411// FuncCtrl field:
1da177e4
LT		 412//
413#define FUNC_CTRL_TxENABLE 0x10
414#define FUNC_CTRL_RxENABLE 0x20
4d791aad 415#define FUNC_CTRL_INIT_COMPLETE 0x01
1da177e4
LT		 416
417/* A stub firmware image which reads the MAC address from NVRAM on the card.
418 For copyright information and source see the end of this file. */
419static u8 mac_reader[] = {
420 0x06,0x00,0x00,0xea,0x04,0x00,0x00,0xea,0x03,0x00,0x00,0xea,0x02,0x00,0x00,0xea,
421 0x01,0x00,0x00,0xea,0x00,0x00,0x00,0xea,0xff,0xff,0xff,0xea,0xfe,0xff,0xff,0xea,
422 0xd3,0x00,0xa0,0xe3,0x00,0xf0,0x21,0xe1,0x0e,0x04,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
423 0x81,0x11,0xa0,0xe1,0x00,0x10,0x81,0xe3,0x00,0x10,0x80,0xe5,0x1c,0x10,0x90,0xe5,
424 0x10,0x10,0xc1,0xe3,0x1c,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,0x08,0x10,0x80,0xe5,
425 0x02,0x03,0xa0,0xe3,0x00,0x10,0xa0,0xe3,0xb0,0x10,0xc0,0xe1,0xb4,0x10,0xc0,0xe1,
426 0xb8,0x10,0xc0,0xe1,0xbc,0x10,0xc0,0xe1,0x56,0xdc,0xa0,0xe3,0x21,0x00,0x00,0xeb,
427 0x0a,0x00,0xa0,0xe3,0x1a,0x00,0x00,0xeb,0x10,0x00,0x00,0xeb,0x07,0x00,0x00,0xeb,
428 0x02,0x03,0xa0,0xe3,0x02,0x14,0xa0,0xe3,0xb4,0x10,0xc0,0xe1,0x4c,0x10,0x9f,0xe5,
429 0xbc,0x10,0xc0,0xe1,0x10,0x10,0xa0,0xe3,0xb8,0x10,0xc0,0xe1,0xfe,0xff,0xff,0xea,
430 0x00,0x40,0x2d,0xe9,0x00,0x20,0xa0,0xe3,0x02,0x3c,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
431 0x28,0x00,0x9f,0xe5,0x37,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
432 0x00,0x40,0x2d,0xe9,0x12,0x2e,0xa0,0xe3,0x06,0x30,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
433 0x02,0x04,0xa0,0xe3,0x2f,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
434 0x00,0x02,0x00,0x02,0x80,0x01,0x90,0xe0,0x01,0x00,0x00,0x0a,0x01,0x00,0x50,0xe2,
435 0xfc,0xff,0xff,0xea,0x1e,0xff,0x2f,0xe1,0x80,0x10,0xa0,0xe3,0xf3,0x06,0xa0,0xe3,
436 0x00,0x10,0x80,0xe5,0x00,0x10,0xa0,0xe3,0x00,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,
437 0x04,0x10,0x80,0xe5,0x00,0x10,0x80,0xe5,0x0e,0x34,0xa0,0xe3,0x1c,0x10,0x93,0xe5,
438 0x02,0x1a,0x81,0xe3,0x1c,0x10,0x83,0xe5,0x58,0x11,0x9f,0xe5,0x30,0x10,0x80,0xe5,
439 0x54,0x11,0x9f,0xe5,0x34,0x10,0x80,0xe5,0x38,0x10,0x80,0xe5,0x3c,0x10,0x80,0xe5,
440 0x10,0x10,0x90,0xe5,0x08,0x00,0x90,0xe5,0x1e,0xff,0x2f,0xe1,0xf3,0x16,0xa0,0xe3,
441 0x08,0x00,0x91,0xe5,0x05,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,0x10,0x00,0x91,0xe5,
442 0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0xff,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,
443 0x10,0x00,0x91,0xe5,0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
444 0x10,0x00,0x91,0xe5,0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
445 0xff,0x00,0x00,0xe2,0x1e,0xff,0x2f,0xe1,0x30,0x40,0x2d,0xe9,0x00,0x50,0xa0,0xe1,
446 0x03,0x40,0xa0,0xe1,0xa2,0x02,0xa0,0xe1,0x08,0x00,0x00,0xe2,0x03,0x00,0x80,0xe2,
447 0xd8,0x10,0x9f,0xe5,0x00,0x00,0xc1,0xe5,0x01,0x20,0xc1,0xe5,0xe2,0xff,0xff,0xeb,
448 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x1a,0x14,0x00,0xa0,0xe3,0xc4,0xff,0xff,0xeb,
449 0x04,0x20,0xa0,0xe1,0x05,0x10,0xa0,0xe1,0x02,0x00,0xa0,0xe3,0x01,0x00,0x00,0xeb,
450 0x30,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x70,0x40,0x2d,0xe9,0xf3,0x46,0xa0,0xe3,
451 0x00,0x30,0xa0,0xe3,0x00,0x00,0x50,0xe3,0x08,0x00,0x00,0x9a,0x8c,0x50,0x9f,0xe5,
452 0x03,0x60,0xd5,0xe7,0x0c,0x60,0x84,0xe5,0x10,0x60,0x94,0xe5,0x02,0x00,0x16,0xe3,
453 0xfc,0xff,0xff,0x0a,0x01,0x30,0x83,0xe2,0x00,0x00,0x53,0xe1,0xf7,0xff,0xff,0x3a,
454 0xff,0x30,0xa0,0xe3,0x0c,0x30,0x84,0xe5,0x08,0x00,0x94,0xe5,0x10,0x00,0x94,0xe5,
455 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x94,0xe5,0x00,0x00,0xa0,0xe3,
456 0x00,0x00,0x52,0xe3,0x0b,0x00,0x00,0x9a,0x10,0x50,0x94,0xe5,0x02,0x00,0x15,0xe3,
457 0xfc,0xff,0xff,0x0a,0x0c,0x30,0x84,0xe5,0x10,0x50,0x94,0xe5,0x01,0x00,0x15,0xe3,
458 0xfc,0xff,0xff,0x0a,0x08,0x50,0x94,0xe5,0x01,0x50,0xc1,0xe4,0x01,0x00,0x80,0xe2,
459 0x02,0x00,0x50,0xe1,0xf3,0xff,0xff,0x3a,0xc8,0x00,0xa0,0xe3,0x98,0xff,0xff,0xeb,
460 0x70,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x01,0x0c,0x00,0x02,0x01,0x02,0x00,0x02,
461 0x00,0x01,0x00,0x02
462};
463
464struct atmel_private {
465 void *card; /* Bus dependent stucture varies for PCcard */
466 int (*present_callback)(void *); /* And callback which uses it */
467 char firmware_id[32];
468 AtmelFWType firmware_type;
469 u8 *firmware;
470 int firmware_length;
471 struct timer_list management_timer;
472 struct net_device *dev;
473 struct device *sys_dev;
474 struct iw_statistics wstats;
475 struct net_device_stats stats; // device stats
476 spinlock_t irqlock, timerlock; // spinlocks
477 enum { BUS_TYPE_PCCARD, BUS_TYPE_PCI } bus_type;
4d791aad
CP		 478 enum {
479 CARD_TYPE_PARALLEL_FLASH,
1da177e4 480 CARD_TYPE_SPI_FLASH,
4d791aad 481 CARD_TYPE_EEPROM
1da177e4
LT		 482 } card_type;
483 int do_rx_crc; /* If we need to CRC incoming packets */
484 int probe_crc; /* set if we don't yet know */
485 int crc_ok_cnt, crc_ko_cnt; /* counters for probing */
486 u16 rx_desc_head;
487 u16 tx_desc_free, tx_desc_head, tx_desc_tail, tx_desc_previous;
488 u16 tx_free_mem, tx_buff_head, tx_buff_tail;
4d791aad 489
1da177e4 490 u16 frag_seq, frag_len, frag_no;
4d791aad
CP		 491 u8 frag_source[6];
492
1da177e4
LT		 493 u8 wep_is_on, default_key, exclude_unencrypted, encryption_level;
494 u8 group_cipher_suite, pairwise_cipher_suite;
495 u8 wep_keys[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
4d791aad 496 int wep_key_len[MAX_ENCRYPTION_KEYS];
1da177e4
LT		 497 int use_wpa, radio_on_broken; /* firmware dependent stuff. */
498
499 u16 host_info_base;
4d791aad 500 struct host_info_struct {
1da177e4
LT		 501 /* NB this is matched to the hardware, don't change. */
502 u8 volatile int_status;
503 u8 volatile int_mask;
504 u8 volatile lockout_host;
505 u8 volatile lockout_mac;
506
507 u16 tx_buff_pos;
508 u16 tx_buff_size;
509 u16 tx_desc_pos;
510 u16 tx_desc_count;
511
512 u16 rx_buff_pos;
513 u16 rx_buff_size;
514 u16 rx_desc_pos;
515 u16 rx_desc_count;
4d791aad 516
1da177e4 517 u16 build_version;
4d791aad
CP		 518 u16 command_pos;
519
1da177e4
LT		 520 u16 major_version;
521 u16 minor_version;
4d791aad 522
1da177e4
LT		 523 u16 func_ctrl;
524 u16 mac_status;
525 u16 generic_IRQ_type;
526 u8 reserved[2];
527 } host_info;
528
4d791aad 529 enum {
1da177e4
LT		 530 STATION_STATE_SCANNING,
531 STATION_STATE_JOINNING,
532 STATION_STATE_AUTHENTICATING,
533 STATION_STATE_ASSOCIATING,
534 STATION_STATE_READY,
535 STATION_STATE_REASSOCIATING,
536 STATION_STATE_DOWN,
537 STATION_STATE_MGMT_ERROR
538 } station_state;
4d791aad 539
1da177e4
LT		 540 int operating_mode, power_mode;
541 time_t last_qual;
542 int beacons_this_sec;
543 int channel;
544 int reg_domain, config_reg_domain;
545 int tx_rate;
546 int auto_tx_rate;
547 int rts_threshold;
548 int frag_threshold;
549 int long_retry, short_retry;
550 int preamble;
551 int default_beacon_period, beacon_period, listen_interval;
4d791aad 552 int CurrentAuthentTransactionSeqNum, ExpectedAuthentTransactionSeqNum;
1da177e4
LT		 553 int AuthenticationRequestRetryCnt, AssociationRequestRetryCnt, ReAssociationRequestRetryCnt;
554 enum {
555 SITE_SURVEY_IDLE,
556 SITE_SURVEY_IN_PROGRESS,
4d791aad 557 SITE_SURVEY_COMPLETED
1da177e4
LT		 558 } site_survey_state;
559 time_t last_survey;
560
561 int station_was_associated, station_is_associated;
562 int fast_scan;
4d791aad 563
1da177e4
LT		 564 struct bss_info {
565 int channel;
566 int SSIDsize;
567 int RSSI;
568 int UsingWEP;
569 int preamble;
570 int beacon_period;
571 int BSStype;
572 u8 BSSID[6];
573 u8 SSID[MAX_SSID_LENGTH];
574 } BSSinfo[MAX_BSS_ENTRIES];
575 int BSS_list_entries, current_BSS;
4d791aad 576 int connect_to_any_BSS;
1da177e4
LT		 577 int SSID_size, new_SSID_size;
578 u8 CurrentBSSID[6], BSSID[6];
579 u8 SSID[MAX_SSID_LENGTH], new_SSID[MAX_SSID_LENGTH];
580 u64 last_beacon_timestamp;
581 u8 rx_buf[MAX_WIRELESS_BODY];
1da177e4
LT		 582};
583
584static u8 atmel_basic_rates[4] = {0x82,0x84,0x0b,0x16};
585
586static const struct {
587 int reg_domain;
588 int min, max;
4d791aad 589 char *name;
1da177e4
LT		 590} channel_table[] = { { REG_DOMAIN_FCC, 1, 11, "USA" },
591 { REG_DOMAIN_DOC, 1, 11, "Canada" },
592 { REG_DOMAIN_ETSI, 1, 13, "Europe" },
593 { REG_DOMAIN_SPAIN, 10, 11, "Spain" },
4d791aad 594 { REG_DOMAIN_FRANCE, 10, 13, "France" },
1da177e4
LT		 595 { REG_DOMAIN_MKK, 14, 14, "MKK" },
596 { REG_DOMAIN_MKK1, 1, 14, "MKK1" },
597 { REG_DOMAIN_ISRAEL, 3, 9, "Israel"} };
598
599static void build_wpa_mib(struct atmel_private *priv);
600static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
4d791aad
CP		 601static void atmel_copy_to_card(struct net_device *dev, u16 dest,
602 unsigned char *src, u16 len);
603static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
604 u16 src, u16 len);
1da177e4
LT		 605static void atmel_set_gcr(struct net_device *dev, u16 mask);
606static void atmel_clear_gcr(struct net_device *dev, u16 mask);
607static int atmel_lock_mac(struct atmel_private *priv);
608static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data);
609static void atmel_command_irq(struct atmel_private *priv);
610static int atmel_validate_channel(struct atmel_private *priv, int channel);
4d791aad
CP		 611static void atmel_management_frame(struct atmel_private *priv,
612 struct ieee80211_hdr_4addr *header,
1da177e4
LT		 613 u16 frame_len, u8 rssi);
614static void atmel_management_timer(u_long a);
4d791aad
CP		 615static void atmel_send_command(struct atmel_private *priv, int command,
616 void *cmd, int cmd_size);
617static int atmel_send_command_wait(struct atmel_private *priv, int command,
618 void *cmd, int cmd_size);
619static void atmel_transmit_management_frame(struct atmel_private *priv,
620 struct ieee80211_hdr_4addr *header,
1da177e4
LT		 621 u8 *body, int body_len);
622
623static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index);
4d791aad
CP		 624static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index,
625 u8 data);
626static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
627 u16 data);
628static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
629 u8 *data, int data_len);
630static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
631 u8 *data, int data_len);
1da177e4
LT		 632static void atmel_scan(struct atmel_private *priv, int specific_ssid);
633static void atmel_join_bss(struct atmel_private *priv, int bss_index);
634static void atmel_smooth_qual(struct atmel_private *priv);
635static void atmel_writeAR(struct net_device *dev, u16 data);
636static int probe_atmel_card(struct net_device *dev);
637static int reset_atmel_card(struct net_device *dev );
638static void atmel_enter_state(struct atmel_private *priv, int new_state);
639int atmel_open (struct net_device *dev);
640
641static inline u16 atmel_hi(struct atmel_private *priv, u16 offset)
642{
643 return priv->host_info_base + offset;
644}
645
646static inline u16 atmel_co(struct atmel_private *priv, u16 offset)
647{
648 return priv->host_info.command_pos + offset;
649}
650
4d791aad 651static inline u16 atmel_rx(struct atmel_private *priv, u16 offset, u16 desc)
1da177e4
LT		 652{
653 return priv->host_info.rx_desc_pos + (sizeof(struct rx_desc) * desc) + offset;
654}
655
4d791aad 656static inline u16 atmel_tx(struct atmel_private *priv, u16 offset, u16 desc)
1da177e4
LT		 657{
658 return priv->host_info.tx_desc_pos + (sizeof(struct tx_desc) * desc) + offset;
659}
660
661static inline u8 atmel_read8(struct net_device *dev, u16 offset)
662{
663 return inb(dev->base_addr + offset);
664}
665
666static inline void atmel_write8(struct net_device *dev, u16 offset, u8 data)
667{
668 outb(data, dev->base_addr + offset);
669}
670
671static inline u16 atmel_read16(struct net_device *dev, u16 offset)
672{
673 return inw(dev->base_addr + offset);
674}
675
676static inline void atmel_write16(struct net_device *dev, u16 offset, u16 data)
677{
678 outw(data, dev->base_addr + offset);
679}
680
681static inline u8 atmel_rmem8(struct atmel_private *priv, u16 pos)
682{
4d791aad 683 atmel_writeAR(priv->dev, pos);
1da177e4
LT		 684 return atmel_read8(priv->dev, DR);
685}
686
687static inline void atmel_wmem8(struct atmel_private *priv, u16 pos, u16 data)
688{
4d791aad 689 atmel_writeAR(priv->dev, pos);
1da177e4
LT		 690 atmel_write8(priv->dev, DR, data);
691}
692
693static inline u16 atmel_rmem16(struct atmel_private *priv, u16 pos)
694{
4d791aad 695 atmel_writeAR(priv->dev, pos);
1da177e4
LT		 696 return atmel_read16(priv->dev, DR);
697}
698
699static inline void atmel_wmem16(struct atmel_private *priv, u16 pos, u16 data)
700{
4d791aad 701 atmel_writeAR(priv->dev, pos);
1da177e4
LT		 702 atmel_write16(priv->dev, DR, data);
703}
704
705static const struct iw_handler_def atmel_handler_def;
706
707static void tx_done_irq(struct atmel_private *priv)
708{
709 int i;
710
4d791aad 711 for (i = 0;
1da177e4
LT		 712 atmel_rmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head)) == TX_DONE &&
713 i < priv->host_info.tx_desc_count;
714 i++) {
1da177e4
LT		 715 u8 status = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_STATUS_OFFSET, priv->tx_desc_head));
716 u16 msdu_size = atmel_rmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_head));
717 u8 type = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_head));
718
719 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head), 0);
720
721 priv->tx_free_mem += msdu_size;
722 priv->tx_desc_free++;
723
724 if (priv->tx_buff_head + msdu_size > (priv->host_info.tx_buff_pos + priv->host_info.tx_buff_size))
725 priv->tx_buff_head = 0;
726 else
727 priv->tx_buff_head += msdu_size;
4d791aad 728
1da177e4 729 if (priv->tx_desc_head < (priv->host_info.tx_desc_count - 1))
4d791aad 730 priv->tx_desc_head++ ;
1da177e4
LT		 731 else
732 priv->tx_desc_head = 0;
4d791aad 733
1da177e4
LT		 734 if (type == TX_PACKET_TYPE_DATA) {
735 if (status == TX_STATUS_SUCCESS)
736 priv->stats.tx_packets++;
4d791aad 737 else
1da177e4
LT		 738 priv->stats.tx_errors++;
739 netif_wake_queue(priv->dev);
740 }
741 }
742}
743
744static u16 find_tx_buff(struct atmel_private *priv, u16 len)
745{
746 u16 bottom_free = priv->host_info.tx_buff_size - priv->tx_buff_tail;
747
4d791aad 748 if (priv->tx_desc_free == 3 || priv->tx_free_mem < len)
1da177e4 749 return 0;
4d791aad 750
1da177e4
LT		 751 if (bottom_free >= len)
752 return priv->host_info.tx_buff_pos + priv->tx_buff_tail;
4d791aad 753
1da177e4
LT		 754 if (priv->tx_free_mem - bottom_free >= len) {
755 priv->tx_buff_tail = 0;
756 return priv->host_info.tx_buff_pos;
757 }
4d791aad 758
1da177e4
LT		 759 return 0;
760}
761
4d791aad
CP		 762static void tx_update_descriptor(struct atmel_private *priv, int is_bcast,
763 u16 len, u16 buff, u8 type)
1da177e4
LT		 764{
765 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, priv->tx_desc_tail), buff);
766 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_tail), len);
767 if (!priv->use_wpa)
768 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_HOST_LENGTH_OFFSET, priv->tx_desc_tail), len);
769 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_tail), type);
770 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RATE_OFFSET, priv->tx_desc_tail), priv->tx_rate);
771 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RETRY_OFFSET, priv->tx_desc_tail), 0);
772 if (priv->use_wpa) {
773 int cipher_type, cipher_length;
774 if (is_bcast) {
775 cipher_type = priv->group_cipher_suite;
4d791aad
CP		 776 if (cipher_type == CIPHER_SUITE_WEP_64 ||
777 cipher_type == CIPHER_SUITE_WEP_128)
1da177e4
LT		 778 cipher_length = 8;
779 else if (cipher_type == CIPHER_SUITE_TKIP)
780 cipher_length = 12;
781 else if (priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_64 ||
782 priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_128) {
783 cipher_type = priv->pairwise_cipher_suite;
784 cipher_length = 8;
785 } else {
786 cipher_type = CIPHER_SUITE_NONE;
787 cipher_length = 0;
788 }
789 } else {
790 cipher_type = priv->pairwise_cipher_suite;
4d791aad
CP		 791 if (cipher_type == CIPHER_SUITE_WEP_64 ||
792 cipher_type == CIPHER_SUITE_WEP_128)
1da177e4
LT		 793 cipher_length = 8;
794 else if (cipher_type == CIPHER_SUITE_TKIP)
795 cipher_length = 12;
796 else if (priv->group_cipher_suite == CIPHER_SUITE_WEP_64 ||
797 priv->group_cipher_suite == CIPHER_SUITE_WEP_128) {
798 cipher_type = priv->group_cipher_suite;
799 cipher_length = 8;
800 } else {
801 cipher_type = CIPHER_SUITE_NONE;
802 cipher_length = 0;
803 }
804 }
4d791aad 805
1da177e4 806 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_TYPE_OFFSET, priv->tx_desc_tail),
4d791aad 807 cipher_type);
1da177e4
LT		 808 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_LENGTH_OFFSET, priv->tx_desc_tail),
809 cipher_length);
810 }
811 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_tail), 0x80000000L);
812 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_tail), TX_FIRM_OWN);
813 if (priv->tx_desc_previous != priv->tx_desc_tail)
814 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_previous), 0);
815 priv->tx_desc_previous = priv->tx_desc_tail;
4d791aad 816 if (priv->tx_desc_tail < (priv->host_info.tx_desc_count - 1))
1da177e4
LT		 817 priv->tx_desc_tail++;
818 else
819 priv->tx_desc_tail = 0;
820 priv->tx_desc_free--;
821 priv->tx_free_mem -= len;
1da177e4
LT		 822}
823
4d791aad 824static int start_tx(struct sk_buff *skb, struct net_device *dev)
1da177e4
LT		 825{
826 struct atmel_private *priv = netdev_priv(dev);
4ca5253d 827 struct ieee80211_hdr_4addr header;
1da177e4
LT		 828 unsigned long flags;
829 u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
830 u8 SNAP_RFC1024[6] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00};
4d791aad
CP		 831
832 if (priv->card && priv->present_callback &&
1da177e4
LT		 833 !(*priv->present_callback)(priv->card)) {
834 priv->stats.tx_errors++;
835 dev_kfree_skb(skb);
836 return 0;
837 }
4d791aad 838
1da177e4
LT		 839 if (priv->station_state != STATION_STATE_READY) {
840 priv->stats.tx_errors++;
841 dev_kfree_skb(skb);
842 return 0;
843 }
4d791aad 844
1da177e4 845 /* first ensure the timer func cannot run */
4d791aad 846 spin_lock_bh(&priv->timerlock);
1da177e4 847 /* then stop the hardware ISR */
4d791aad 848 spin_lock_irqsave(&priv->irqlock, flags);
1da177e4 849 /* nb doing the above in the opposite order will deadlock */
4d791aad 850
1da177e4 851 /* The Wireless Header is 30 bytes. In the Ethernet packet we "cut" the
4d791aad
CP		 852 12 first bytes (containing DA/SA) and put them in the appropriate
853 fields of the Wireless Header. Thus the packet length is then the
854 initial + 18 (+30-12) */
855
1da177e4
LT		 856 if (!(buff = find_tx_buff(priv, len + 18))) {
857 priv->stats.tx_dropped++;
858 spin_unlock_irqrestore(&priv->irqlock, flags);
859 spin_unlock_bh(&priv->timerlock);
860 netif_stop_queue(dev);
861 return 1;
862 }
4d791aad 863
b453872c 864 frame_ctl = IEEE80211_FTYPE_DATA;
1da177e4
LT		 865 header.duration_id = 0;
866 header.seq_ctl = 0;
867 if (priv->wep_is_on)
f13baae4 868 frame_ctl |= IEEE80211_FCTL_PROTECTED;
1da177e4
LT		 869 if (priv->operating_mode == IW_MODE_ADHOC) {
870 memcpy(&header.addr1, skb->data, 6);
871 memcpy(&header.addr2, dev->dev_addr, 6);
872 memcpy(&header.addr3, priv->BSSID, 6);
873 } else {
b453872c 874 frame_ctl |= IEEE80211_FCTL_TODS;
1da177e4
LT		 875 memcpy(&header.addr1, priv->CurrentBSSID, 6);
876 memcpy(&header.addr2, dev->dev_addr, 6);
877 memcpy(&header.addr3, skb->data, 6);
878 }
4d791aad 879
1da177e4
LT		 880 if (priv->use_wpa)
881 memcpy(&header.addr4, SNAP_RFC1024, 6);
882
883 header.frame_ctl = cpu_to_le16(frame_ctl);
884 /* Copy the wireless header into the card */
885 atmel_copy_to_card(dev, buff, (unsigned char *)&header, DATA_FRAME_WS_HEADER_SIZE);
886 /* Copy the packet sans its 802.3 header addresses which have been replaced */
887 atmel_copy_to_card(dev, buff + DATA_FRAME_WS_HEADER_SIZE, skb->data + 12, len - 12);
888 priv->tx_buff_tail += len - 12 + DATA_FRAME_WS_HEADER_SIZE;
4d791aad 889
1da177e4
LT		 890 /* low bit of first byte of destination tells us if broadcast */
891 tx_update_descriptor(priv, *(skb->data) & 0x01, len + 18, buff, TX_PACKET_TYPE_DATA);
892 dev->trans_start = jiffies;
893 priv->stats.tx_bytes += len;
4d791aad 894
1da177e4
LT		 895 spin_unlock_irqrestore(&priv->irqlock, flags);
896 spin_unlock_bh(&priv->timerlock);
897 dev_kfree_skb(skb);
4d791aad
CP		 898
899 return 0;
1da177e4
LT		 900}
901
4d791aad 902static void atmel_transmit_management_frame(struct atmel_private *priv,
4ca5253d 903 struct ieee80211_hdr_4addr *header,
1da177e4
LT		 904 u8 *body, int body_len)
905{
906 u16 buff;
4d791aad
CP		 907 int len = MGMT_FRAME_BODY_OFFSET + body_len;
908
909 if (!(buff = find_tx_buff(priv, len)))
1da177e4
LT		 910 return;
911
912 atmel_copy_to_card(priv->dev, buff, (u8 *)header, MGMT_FRAME_BODY_OFFSET);
913 atmel_copy_to_card(priv->dev, buff + MGMT_FRAME_BODY_OFFSET, body, body_len);
914 priv->tx_buff_tail += len;
915 tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT);
916}
4d791aad
CP		 917
918static void fast_rx_path(struct atmel_private *priv,
919 struct ieee80211_hdr_4addr *header,
1da177e4
LT		 920 u16 msdu_size, u16 rx_packet_loc, u32 crc)
921{
922 /* fast path: unfragmented packet copy directly into skbuf */
4d791aad
CP		 923 u8 mac4[6];
924 struct sk_buff *skb;
1da177e4 925 unsigned char *skbp;
4d791aad 926
1da177e4
LT		 927 /* get the final, mac 4 header field, this tells us encapsulation */
928 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc + 24, 6);
929 msdu_size -= 6;
4d791aad 930
1da177e4
LT		 931 if (priv->do_rx_crc) {
932 crc = crc32_le(crc, mac4, 6);
933 msdu_size -= 4;
934 }
4d791aad 935
1da177e4
LT		 936 if (!(skb = dev_alloc_skb(msdu_size + 14))) {
937 priv->stats.rx_dropped++;
938 return;
939 }
940
941 skb_reserve(skb, 2);
942 skbp = skb_put(skb, msdu_size + 12);
943 atmel_copy_to_host(priv->dev, skbp + 12, rx_packet_loc + 30, msdu_size);
4d791aad 944
1da177e4
LT		 945 if (priv->do_rx_crc) {
946 u32 netcrc;
947 crc = crc32_le(crc, skbp + 12, msdu_size);
948 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + 30 + msdu_size, 4);
949 if ((crc ^ 0xffffffff) != netcrc) {
950 priv->stats.rx_crc_errors++;
951 dev_kfree_skb(skb);
952 return;
953 }
954 }
4d791aad 955
1da177e4 956 memcpy(skbp, header->addr1, 6); /* destination address */
4d791aad 957 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
1da177e4
LT		 958 memcpy(&skbp[6], header->addr3, 6);
959 else
960 memcpy(&skbp[6], header->addr2, 6); /* source address */
4d791aad
CP		 961
962 priv->dev->last_rx = jiffies;
1da177e4
LT		 963 skb->dev = priv->dev;
964 skb->protocol = eth_type_trans(skb, priv->dev);
4d791aad 965 skb->ip_summed = CHECKSUM_NONE;
1da177e4
LT		 966 netif_rx(skb);
967 priv->stats.rx_bytes += 12 + msdu_size;
968 priv->stats.rx_packets++;
969}
970
971/* Test to see if the packet in card memory at packet_loc has a valid CRC
4d791aad
CP		 972 It doesn't matter that this is slow: it is only used to proble the first few
973 packets. */
1da177e4
LT		 974static int probe_crc(struct atmel_private *priv, u16 packet_loc, u16 msdu_size)
975{
976 int i = msdu_size - 4;
977 u32 netcrc, crc = 0xffffffff;
978
979 if (msdu_size < 4)
980 return 0;
981
982 atmel_copy_to_host(priv->dev, (void *)&netcrc, packet_loc + i, 4);
4d791aad 983
1da177e4
LT		 984 atmel_writeAR(priv->dev, packet_loc);
985 while (i--) {
986 u8 octet = atmel_read8(priv->dev, DR);
987 crc = crc32_le(crc, &octet, 1);
988 }
989
990 return (crc ^ 0xffffffff) == netcrc;
991}
992
4d791aad
CP		 993static void frag_rx_path(struct atmel_private *priv,
994 struct ieee80211_hdr_4addr *header,
995 u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no,
996 u8 frag_no, int more_frags)
1da177e4 997{
4d791aad 998 u8 mac4[6];
1da177e4
LT		 999 u8 source[6];
1000 struct sk_buff *skb;
1001
4d791aad 1002 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
1da177e4
LT		 1003 memcpy(source, header->addr3, 6);
1004 else
4d791aad
CP		 1005 memcpy(source, header->addr2, 6);
1006
1da177e4 1007 rx_packet_loc += 24; /* skip header */
4d791aad 1008
1da177e4
LT		 1009 if (priv->do_rx_crc)
1010 msdu_size -= 4;
1011
1012 if (frag_no == 0) { /* first fragment */
1013 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc, 6);
1014 msdu_size -= 6;
1015 rx_packet_loc += 6;
1016
4d791aad 1017 if (priv->do_rx_crc)
1da177e4 1018 crc = crc32_le(crc, mac4, 6);
4d791aad 1019
1da177e4
LT		 1020 priv->frag_seq = seq_no;
1021 priv->frag_no = 1;
1022 priv->frag_len = msdu_size;
4d791aad 1023 memcpy(priv->frag_source, source, 6);
1da177e4
LT		 1024 memcpy(&priv->rx_buf[6], source, 6);
1025 memcpy(priv->rx_buf, header->addr1, 6);
4d791aad 1026
1da177e4
LT		 1027 atmel_copy_to_host(priv->dev, &priv->rx_buf[12], rx_packet_loc, msdu_size);
1028
1029 if (priv->do_rx_crc) {
1030 u32 netcrc;
1031 crc = crc32_le(crc, &priv->rx_buf[12], msdu_size);
1032 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
1033 if ((crc ^ 0xffffffff) != netcrc) {
1034 priv->stats.rx_crc_errors++;
1035 memset(priv->frag_source, 0xff, 6);
1036 }
1037 }
4d791aad 1038
1da177e4
LT		 1039 } else if (priv->frag_no == frag_no &&
1040 priv->frag_seq == seq_no &&
1041 memcmp(priv->frag_source, source, 6) == 0) {
4d791aad
CP		 1042
1043 atmel_copy_to_host(priv->dev, &priv->rx_buf[12 + priv->frag_len],
1da177e4
LT		 1044 rx_packet_loc, msdu_size);
1045 if (priv->do_rx_crc) {
1046 u32 netcrc;
4d791aad
CP		 1047 crc = crc32_le(crc,
1048 &priv->rx_buf[12 + priv->frag_len],
1da177e4
LT		 1049 msdu_size);
1050 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
1051 if ((crc ^ 0xffffffff) != netcrc) {
1052 priv->stats.rx_crc_errors++;
1053 memset(priv->frag_source, 0xff, 6);
1054 more_frags = 1; /* don't send broken assembly */
1055 }
1056 }
4d791aad 1057
1da177e4
LT		 1058 priv->frag_len += msdu_size;
1059 priv->frag_no++;
1060
1061 if (!more_frags) { /* last one */
1062 memset(priv->frag_source, 0xff, 6);
1063 if (!(skb = dev_alloc_skb(priv->frag_len + 14))) {
1064 priv->stats.rx_dropped++;
1065 } else {
1066 skb_reserve(skb, 2);
4d791aad 1067 memcpy(skb_put(skb, priv->frag_len + 12),
1da177e4
LT		 1068 priv->rx_buf,
1069 priv->frag_len + 12);
1070 priv->dev->last_rx = jiffies;
1071 skb->dev = priv->dev;
1072 skb->protocol = eth_type_trans(skb, priv->dev);
4d791aad 1073 skb->ip_summed = CHECKSUM_NONE;
1da177e4
LT		 1074 netif_rx(skb);
1075 priv->stats.rx_bytes += priv->frag_len + 12;
1076 priv->stats.rx_packets++;
1077 }
1078 }
1da177e4
LT		 1079 } else
1080 priv->wstats.discard.fragment++;
1081}
4d791aad 1082
1da177e4
LT		 1083static void rx_done_irq(struct atmel_private *priv)
1084{
1085 int i;
4ca5253d 1086 struct ieee80211_hdr_4addr header;
4d791aad
CP		 1087
1088 for (i = 0;
1da177e4
LT		 1089 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID &&
1090 i < priv->host_info.rx_desc_count;
1091 i++) {
4d791aad 1092
1da177e4
LT		 1093 u16 msdu_size, rx_packet_loc, frame_ctl, seq_control;
1094 u8 status = atmel_rmem8(priv, atmel_rx(priv, RX_DESC_STATUS_OFFSET, priv->rx_desc_head));
1095 u32 crc = 0xffffffff;
4d791aad 1096
1da177e4
LT		 1097 if (status != RX_STATUS_SUCCESS) {
1098 if (status == 0xc1) /* determined by experiment */
1099 priv->wstats.discard.nwid++;
1100 else
4d791aad 1101 priv->stats.rx_errors++;
1da177e4
LT		 1102 goto next;
1103 }
1104
1105 msdu_size = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_SIZE_OFFSET, priv->rx_desc_head));
1106 rx_packet_loc = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_POS_OFFSET, priv->rx_desc_head));
4d791aad 1107
1da177e4 1108 if (msdu_size < 30) {
4d791aad 1109 priv->stats.rx_errors++;
1da177e4
LT		 1110 goto next;
1111 }
4d791aad 1112
1da177e4
LT		 1113 /* Get header as far as end of seq_ctl */
1114 atmel_copy_to_host(priv->dev, (char *)&header, rx_packet_loc, 24);
1115 frame_ctl = le16_to_cpu(header.frame_ctl);
1116 seq_control = le16_to_cpu(header.seq_ctl);
1117
4d791aad
CP		 1118 /* probe for CRC use here if needed once five packets have
1119 arrived with the same crc status, we assume we know what's
1120 happening and stop probing */
1da177e4 1121 if (priv->probe_crc) {
f13baae4 1122 if (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED)) {
1da177e4
LT		 1123 priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size);
1124 } else {
1125 priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24);
1126 }
1127 if (priv->do_rx_crc) {
1128 if (priv->crc_ok_cnt++ > 5)
1129 priv->probe_crc = 0;
1130 } else {
1131 if (priv->crc_ko_cnt++ > 5)
1132 priv->probe_crc = 0;
1133 }
1134 }
4d791aad 1135
1da177e4 1136 /* don't CRC header when WEP in use */
f13baae4 1137 if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED))) {
1da177e4
LT		 1138 crc = crc32_le(0xffffffff, (unsigned char *)&header, 24);
1139 }
1140 msdu_size -= 24; /* header */
1141
4d791aad 1142 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) {
b453872c
JG		 1143 int more_fragments = frame_ctl & IEEE80211_FCTL_MOREFRAGS;
1144 u8 packet_fragment_no = seq_control & IEEE80211_SCTL_FRAG;
1145 u16 packet_sequence_no = (seq_control & IEEE80211_SCTL_SEQ) >> 4;
4d791aad
CP		 1146
1147 if (!more_fragments && packet_fragment_no == 0) {
1da177e4
LT		 1148 fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc);
1149 } else {
1150 frag_rx_path(priv, &header, msdu_size, rx_packet_loc, crc,
1151 packet_sequence_no, packet_fragment_no, more_fragments);
1152 }
1153 }
4d791aad 1154
b453872c 1155 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1da177e4
LT		 1156 /* copy rest of packet into buffer */
1157 atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size);
4d791aad 1158
1da177e4
LT		 1159 /* we use the same buffer for frag reassembly and control packets */
1160 memset(priv->frag_source, 0xff, 6);
4d791aad 1161
1da177e4
LT		 1162 if (priv->do_rx_crc) {
1163 /* last 4 octets is crc */
1164 msdu_size -= 4;
1165 crc = crc32_le(crc, (unsigned char *)&priv->rx_buf, msdu_size);
1166 if ((crc ^ 0xffffffff) != (*((u32 *)&priv->rx_buf[msdu_size]))) {
1167 priv->stats.rx_crc_errors++;
1168 goto next;
1169 }
1170 }
1171
1172 atmel_management_frame(priv, &header, msdu_size,
1173 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_RSSI_OFFSET, priv->rx_desc_head)));
4d791aad 1174 }
1da177e4 1175
4d791aad 1176next:
1da177e4 1177 /* release descriptor */
4d791aad
CP		 1178 atmel_wmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head), RX_DESC_FLAG_CONSUMED);
1179
1da177e4 1180 if (priv->rx_desc_head < (priv->host_info.rx_desc_count - 1))
4d791aad 1181 priv->rx_desc_head++;
1da177e4
LT		 1182 else
1183 priv->rx_desc_head = 0;
1184 }
4d791aad 1185}
1da177e4
LT		 1186
1187static irqreturn_t service_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1188{
1189 struct net_device *dev = (struct net_device *) dev_id;
1190 struct atmel_private *priv = netdev_priv(dev);
1191 u8 isr;
1192 int i = -1;
4d791aad 1193 static u8 irq_order[] = {
1da177e4
LT		 1194 ISR_OUT_OF_RANGE,
1195 ISR_RxCOMPLETE,
1196 ISR_TxCOMPLETE,
1197 ISR_RxFRAMELOST,
1198 ISR_FATAL_ERROR,
1199 ISR_COMMAND_COMPLETE,
1200 ISR_IBSS_MERGE,
1201 ISR_GENERIC_IRQ
1202 };
1da177e4 1203
4d791aad 1204 if (priv->card && priv->present_callback &&
1da177e4
LT		 1205 !(*priv->present_callback)(priv->card))
1206 return IRQ_HANDLED;
1207
1208 /* In this state upper-level code assumes it can mess with
1209 the card unhampered by interrupts which may change register state.
1210 Note that even though the card shouldn't generate interrupts
4d791aad 1211 the inturrupt line may be shared. This allows card setup
1da177e4
LT		 1212 to go on without disabling interrupts for a long time. */
1213 if (priv->station_state == STATION_STATE_DOWN)
1214 return IRQ_NONE;
4d791aad 1215
1da177e4
LT		 1216 atmel_clear_gcr(dev, GCR_ENINT); /* disable interrupts */
1217
1218 while (1) {
1219 if (!atmel_lock_mac(priv)) {
1220 /* failed to contact card */
1221 printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1222 return IRQ_HANDLED;
1223 }
4d791aad 1224
1da177e4
LT		 1225 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1226 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
4d791aad 1227
1da177e4
LT		 1228 if (!isr) {
1229 atmel_set_gcr(dev, GCR_ENINT); /* enable interrupts */
1230 return i == -1 ? IRQ_NONE : IRQ_HANDLED;
1231 }
4d791aad 1232
1da177e4 1233 atmel_set_gcr(dev, GCR_ACKINT); /* acknowledge interrupt */
4d791aad 1234
1da177e4
LT		 1235 for (i = 0; i < sizeof(irq_order)/sizeof(u8); i++)
1236 if (isr & irq_order[i])
1237 break;
4d791aad 1238
1da177e4
LT		 1239 if (!atmel_lock_mac(priv)) {
1240 /* failed to contact card */
1241 printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1242 return IRQ_HANDLED;
1243 }
4d791aad 1244
1da177e4
LT		 1245 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1246 isr ^= irq_order[i];
1247 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET), isr);
1248 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
4d791aad 1249
1da177e4 1250 switch (irq_order[i]) {
4d791aad
CP		 1251
1252 case ISR_OUT_OF_RANGE:
1253 if (priv->operating_mode == IW_MODE_INFRA &&
1da177e4
LT		 1254 priv->station_state == STATION_STATE_READY) {
1255 priv->station_is_associated = 0;
1256 atmel_scan(priv, 1);
1257 }
1258 break;
1259
1260 case ISR_RxFRAMELOST:
1261 priv->wstats.discard.misc++;
1262 /* fall through */
1263 case ISR_RxCOMPLETE:
4d791aad 1264 rx_done_irq(priv);
1da177e4 1265 break;
4d791aad 1266
1da177e4 1267 case ISR_TxCOMPLETE:
4d791aad 1268 tx_done_irq(priv);
1da177e4 1269 break;
4d791aad 1270
1da177e4
LT		 1271 case ISR_FATAL_ERROR:
1272 printk(KERN_ALERT "%s: *** FATAL error interrupt ***\n", dev->name);
1273 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
1274 break;
4d791aad
CP		 1275
1276 case ISR_COMMAND_COMPLETE:
1da177e4
LT		 1277 atmel_command_irq(priv);
1278 break;
1279
1280 case ISR_IBSS_MERGE:
4d791aad 1281 atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
1da177e4
LT		 1282 priv->CurrentBSSID, 6);
1283 /* The WPA stuff cares about the current AP address */
1284 if (priv->use_wpa)
1285 build_wpa_mib(priv);
1286 break;
1287 case ISR_GENERIC_IRQ:
1288 printk(KERN_INFO "%s: Generic_irq received.\n", dev->name);
1289 break;
1290 }
4d791aad 1291 }
1da177e4
LT		 1292}
1293
4d791aad 1294static struct net_device_stats *atmel_get_stats(struct net_device *dev)
1da177e4
LT		 1295{
1296 struct atmel_private *priv = netdev_priv(dev);
1297 return &priv->stats;
1298}
1299
4d791aad 1300static struct iw_statistics *atmel_get_wireless_stats(struct net_device *dev)
1da177e4
LT		 1301{
1302 struct atmel_private *priv = netdev_priv(dev);
1303
4d791aad 1304 /* update the link quality here in case we are seeing no beacons
1da177e4
LT		 1305 at all to drive the process */
1306 atmel_smooth_qual(priv);
4d791aad 1307
1da177e4
LT		 1308 priv->wstats.status = priv->station_state;
1309
1310 if (priv->operating_mode == IW_MODE_INFRA) {
1311 if (priv->station_state != STATION_STATE_READY) {
1312 priv->wstats.qual.qual = 0;
1313 priv->wstats.qual.level = 0;
1314 priv->wstats.qual.updated = (IW_QUAL_QUAL_INVALID
1315 | IW_QUAL_LEVEL_INVALID);
1316 }
1317 priv->wstats.qual.noise = 0;
1318 priv->wstats.qual.updated |= IW_QUAL_NOISE_INVALID;
1319 } else {
1320 /* Quality levels cannot be determined in ad-hoc mode,
1321 because we can 'hear' more that one remote station. */
1322 priv->wstats.qual.qual = 0;
1323 priv->wstats.qual.level = 0;
1324 priv->wstats.qual.noise = 0;
1325 priv->wstats.qual.updated = IW_QUAL_QUAL_INVALID
1326 | IW_QUAL_LEVEL_INVALID
1327 | IW_QUAL_NOISE_INVALID;
1328 priv->wstats.miss.beacon = 0;
1329 }
4d791aad
CP		 1330
1331 return &priv->wstats;
1da177e4
LT		 1332}
1333
1334static int atmel_change_mtu(struct net_device *dev, int new_mtu)
1335{
1336 if ((new_mtu < 68) || (new_mtu > 2312))
1337 return -EINVAL;
1338 dev->mtu = new_mtu;
1339 return 0;
1340}
1341
1342static int atmel_set_mac_address(struct net_device *dev, void *p)
1343{
1344 struct sockaddr *addr = p;
4d791aad 1345
1da177e4
LT		 1346 memcpy (dev->dev_addr, addr->sa_data, dev->addr_len);
1347 return atmel_open(dev);
1348}
1349
1350EXPORT_SYMBOL(atmel_open);
1351
4d791aad 1352int atmel_open(struct net_device *dev)
1da177e4
LT		 1353{
1354 struct atmel_private *priv = netdev_priv(dev);
1355 int i, channel;
1356
1357 /* any scheduled timer is no longer needed and might screw things up.. */
1358 del_timer_sync(&priv->management_timer);
4d791aad 1359
1da177e4
LT		 1360 /* Interrupts will not touch the card once in this state... */
1361 priv->station_state = STATION_STATE_DOWN;
1362
1363 if (priv->new_SSID_size) {
1364 memcpy(priv->SSID, priv->new_SSID, priv->new_SSID_size);
1365 priv->SSID_size = priv->new_SSID_size;
1366 priv->new_SSID_size = 0;
1367 }
1368 priv->BSS_list_entries = 0;
1369
1370 priv->AuthenticationRequestRetryCnt = 0;
1371 priv->AssociationRequestRetryCnt = 0;
1372 priv->ReAssociationRequestRetryCnt = 0;
1373 priv->CurrentAuthentTransactionSeqNum = 0x0001;
1374 priv->ExpectedAuthentTransactionSeqNum = 0x0002;
1375
1376 priv->site_survey_state = SITE_SURVEY_IDLE;
1377 priv->station_is_associated = 0;
1378
4d791aad 1379 if (!reset_atmel_card(dev))
1da177e4
LT		 1380 return -EAGAIN;
1381
1382 if (priv->config_reg_domain) {
1383 priv->reg_domain = priv->config_reg_domain;
1384 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS, priv->reg_domain);
1385 } else {
1386 priv->reg_domain = atmel_get_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS);
1387 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++)
1388 if (priv->reg_domain == channel_table[i].reg_domain)
1389 break;
1390 if (i == sizeof(channel_table)/sizeof(channel_table[0])) {
1391 priv->reg_domain = REG_DOMAIN_MKK1;
1392 printk(KERN_ALERT "%s: failed to get regulatory domain: assuming MKK1.\n", dev->name);
4d791aad 1393 }
1da177e4 1394 }
4d791aad 1395
1da177e4
LT		 1396 if ((channel = atmel_validate_channel(priv, priv->channel)))
1397 priv->channel = channel;
1398
4d791aad
CP		 1399 /* this moves station_state on.... */
1400 atmel_scan(priv, 1);
1da177e4
LT		 1401
1402 atmel_set_gcr(priv->dev, GCR_ENINT); /* enable interrupts */
1403 return 0;
1404}
1405
4d791aad 1406static int atmel_close(struct net_device *dev)
1da177e4
LT		 1407{
1408 struct atmel_private *priv = netdev_priv(dev);
4d791aad 1409
1da177e4 1410 atmel_enter_state(priv, STATION_STATE_DOWN);
4d791aad
CP		 1411
1412 if (priv->bus_type == BUS_TYPE_PCCARD)
1da177e4
LT		 1413 atmel_write16(dev, GCR, 0x0060);
1414 atmel_write16(dev, GCR, 0x0040);
1415 return 0;
1416}
1417
1418static int atmel_validate_channel(struct atmel_private *priv, int channel)
1419{
1420 /* check that channel is OK, if so return zero,
1421 else return suitable default channel */
1422 int i;
1423
1424 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++)
1425 if (priv->reg_domain == channel_table[i].reg_domain) {
1426 if (channel >= channel_table[i].min &&
1427 channel <= channel_table[i].max)
1428 return 0;
1429 else
1430 return channel_table[i].min;
1431 }
1432 return 0;
1433}
1434
1435static int atmel_proc_output (char *buf, struct atmel_private *priv)
1436{
1437 int i;
1438 char *p = buf;
1439 char *s, *r, *c;
4d791aad
CP		 1440
1441 p += sprintf(p, "Driver version:\t\t%d.%d\n",
1442 DRIVER_MAJOR, DRIVER_MINOR);
1443
1da177e4 1444 if (priv->station_state != STATION_STATE_DOWN) {
4d791aad
CP		 1445 p += sprintf(p, "Firmware version:\t%d.%d build %d\n"
1446 "Firmware location:\t",
1da177e4
LT		 1447 priv->host_info.major_version,
1448 priv->host_info.minor_version,
1449 priv->host_info.build_version);
4d791aad
CP		 1450
1451 if (priv->card_type != CARD_TYPE_EEPROM)
1da177e4 1452 p += sprintf(p, "on card\n");
4d791aad
CP		 1453 else if (priv->firmware)
1454 p += sprintf(p, "%s loaded by host\n",
1455 priv->firmware_id);
1da177e4 1456 else
4d791aad
CP		 1457 p += sprintf(p, "%s loaded by hotplug\n",
1458 priv->firmware_id);
1459
1460 switch (priv->card_type) {
1da177e4
LT		 1461 case CARD_TYPE_PARALLEL_FLASH: c = "Parallel flash"; break;
1462 case CARD_TYPE_SPI_FLASH: c = "SPI flash\n"; break;
1463 case CARD_TYPE_EEPROM: c = "EEPROM"; break;
1464 default: c = "<unknown>";
1465 }
1466
1da177e4
LT		 1467 r = "<unknown>";
1468 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++)
1469 if (priv->reg_domain == channel_table[i].reg_domain)
1470 r = channel_table[i].name;
4d791aad 1471
1da177e4
LT		 1472 p += sprintf(p, "MAC memory type:\t%s\n", c);
1473 p += sprintf(p, "Regulatory domain:\t%s\n", r);
4d791aad 1474 p += sprintf(p, "Host CRC checking:\t%s\n",
1da177e4
LT		 1475 priv->do_rx_crc ? "On" : "Off");
1476 p += sprintf(p, "WPA-capable firmware:\t%s\n",
1477 priv->use_wpa ? "Yes" : "No");
1478 }
4d791aad 1479
1da177e4
LT		 1480 switch(priv->station_state) {
1481 case STATION_STATE_SCANNING: s = "Scanning"; break;
1482 case STATION_STATE_JOINNING: s = "Joining"; break;
1483 case STATION_STATE_AUTHENTICATING: s = "Authenticating"; break;
1484 case STATION_STATE_ASSOCIATING: s = "Associating"; break;
1485 case STATION_STATE_READY: s = "Ready"; break;
1486 case STATION_STATE_REASSOCIATING: s = "Reassociating"; break;
1487 case STATION_STATE_MGMT_ERROR: s = "Management error"; break;
1488 case STATION_STATE_DOWN: s = "Down"; break;
1489 default: s = "<unknown>";
1490 }
4d791aad 1491
1da177e4 1492 p += sprintf(p, "Current state:\t\t%s\n", s);
4d791aad 1493 return p - buf;
1da177e4
LT		 1494}
1495
1496static int atmel_read_proc(char *page, char **start, off_t off,
1497 int count, int *eof, void *data)
1498{
1499 struct atmel_private *priv = data;
1500 int len = atmel_proc_output (page, priv);
1501 if (len <= off+count) *eof = 1;
1502 *start = page + off;
1503 len -= off;
1504 if (len>count) len = count;
1505 if (len<0) len = 0;
1506 return len;
1507}
1508
4d791aad
CP		 1509struct net_device *init_atmel_card(unsigned short irq, unsigned long port,
1510 const AtmelFWType fw_type,
1511 struct device *sys_dev,
1512 int (*card_present)(void *), void *card)
1da177e4
LT		 1513{
1514 struct net_device *dev;
1515 struct atmel_private *priv;
1516 int rc;
1517
1518 /* Create the network device object. */
1519 dev = alloc_etherdev(sizeof(*priv));
1520 if (!dev) {
4d791aad 1521 printk(KERN_ERR "atmel: Couldn't alloc_etherdev\n");
1da177e4
LT		 1522 return NULL;
1523 }
1524 if (dev_alloc_name(dev, dev->name) < 0) {
4d791aad 1525 printk(KERN_ERR "atmel: Couldn't get name!\n");
1da177e4
LT		 1526 goto err_out_free;
1527 }
1528
1529 priv = netdev_priv(dev);
1530 priv->dev = dev;
1531 priv->sys_dev = sys_dev;
1532 priv->present_callback = card_present;
1533 priv->card = card;
1534 priv->firmware = NULL;
1535 priv->firmware_id[0] = '\0';
1536 priv->firmware_type = fw_type;
1537 if (firmware) /* module parameter */
1538 strcpy(priv->firmware_id, firmware);
1539 priv->bus_type = card_present ? BUS_TYPE_PCCARD : BUS_TYPE_PCI;
1540 priv->station_state = STATION_STATE_DOWN;
1541 priv->do_rx_crc = 0;
1542 /* For PCMCIA cards, some chips need CRC, some don't
1543 so we have to probe. */
1544 if (priv->bus_type == BUS_TYPE_PCCARD) {
1545 priv->probe_crc = 1;
1546 priv->crc_ok_cnt = priv->crc_ko_cnt = 0;
1547 } else
1548 priv->probe_crc = 0;
1549 memset(&priv->stats, 0, sizeof(priv->stats));
1550 memset(&priv->wstats, 0, sizeof(priv->wstats));
1551 priv->last_qual = jiffies;
1552 priv->last_beacon_timestamp = 0;
1553 memset(priv->frag_source, 0xff, sizeof(priv->frag_source));
1554 memset(priv->BSSID, 0, 6);
1555 priv->CurrentBSSID[0] = 0xFF; /* Initialize to something invalid.... */
1556 priv->station_was_associated = 0;
4d791aad 1557
1da177e4
LT		 1558 priv->last_survey = jiffies;
1559 priv->preamble = LONG_PREAMBLE;
1560 priv->operating_mode = IW_MODE_INFRA;
1561 priv->connect_to_any_BSS = 0;
1562 priv->config_reg_domain = 0;
1563 priv->reg_domain = 0;
1564 priv->tx_rate = 3;
1565 priv->auto_tx_rate = 1;
1566 priv->channel = 4;
1567 priv->power_mode = 0;
1568 priv->SSID[0] = '\0';
1569 priv->SSID_size = 0;
1570 priv->new_SSID_size = 0;
1571 priv->frag_threshold = 2346;
1572 priv->rts_threshold = 2347;
1573 priv->short_retry = 7;
1574 priv->long_retry = 4;
1575
1576 priv->wep_is_on = 0;
1577 priv->default_key = 0;
1578 priv->encryption_level = 0;
1579 priv->exclude_unencrypted = 0;
1580 priv->group_cipher_suite = priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1581 priv->use_wpa = 0;
1582 memset(priv->wep_keys, 0, sizeof(priv->wep_keys));
1583 memset(priv->wep_key_len, 0, sizeof(priv->wep_key_len));
1584
1585 priv->default_beacon_period = priv->beacon_period = 100;
1586 priv->listen_interval = 1;
1587
1588 init_timer(&priv->management_timer);
1589 spin_lock_init(&priv->irqlock);
1590 spin_lock_init(&priv->timerlock);
1591 priv->management_timer.function = atmel_management_timer;
1592 priv->management_timer.data = (unsigned long) dev;
4d791aad 1593
1da177e4
LT		 1594 dev->open = atmel_open;
1595 dev->stop = atmel_close;
1596 dev->change_mtu = atmel_change_mtu;
1597 dev->set_mac_address = atmel_set_mac_address;
1598 dev->hard_start_xmit = start_tx;
1599 dev->get_stats = atmel_get_stats;
1da177e4
LT		 1600 dev->wireless_handlers = (struct iw_handler_def *)&atmel_handler_def;
1601 dev->do_ioctl = atmel_ioctl;
1602 dev->irq = irq;
1603 dev->base_addr = port;
4d791aad 1604
1da177e4 1605 SET_NETDEV_DEV(dev, sys_dev);
4d791aad 1606
1da177e4 1607 if ((rc = request_irq(dev->irq, service_interrupt, SA_SHIRQ, dev->name, dev))) {
4d791aad 1608 printk(KERN_ERR "%s: register interrupt %d failed, rc %d\n", dev->name, irq, rc);
1da177e4
LT		 1609 goto err_out_free;
1610 }
1611
4d791aad 1612 if (!request_region(dev->base_addr, 32,
b16a228d 1613 priv->bus_type == BUS_TYPE_PCCARD ? "atmel_cs" : "atmel_pci")) {
1da177e4
LT		 1614 goto err_out_irq;
1615 }
4d791aad 1616
1da177e4
LT		 1617 if (register_netdev(dev))
1618 goto err_out_res;
4d791aad 1619
1da177e4
LT		 1620 if (!probe_atmel_card(dev)){
1621 unregister_netdev(dev);
1622 goto err_out_res;
1623 }
4d791aad 1624
1da177e4 1625 netif_carrier_off(dev);
4d791aad
CP		 1626
1627 create_proc_read_entry ("driver/atmel", 0, NULL, atmel_read_proc, priv);
1628
b16a228d 1629 printk(KERN_INFO "%s: Atmel at76c50x. Version %d.%d. MAC %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
1630 dev->name, DRIVER_MAJOR, DRIVER_MINOR,
1631 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1632 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5] );
4d791aad 1633
1da177e4
LT		 1634 SET_MODULE_OWNER(dev);
1635 return dev;
4d791aad
CP		 1636
1637err_out_res:
b16a228d 1638 release_region( dev->base_addr, 32);
4d791aad 1639err_out_irq:
1da177e4 1640 free_irq(dev->irq, dev);
4d791aad 1641err_out_free:
1da177e4
LT		 1642 free_netdev(dev);
1643 return NULL;
1644}
1645
1646EXPORT_SYMBOL(init_atmel_card);
1647
b16a228d 1648void stop_atmel_card(struct net_device *dev)
1da177e4
LT		 1649{
1650 struct atmel_private *priv = netdev_priv(dev);
4d791aad 1651
1da177e4 1652 /* put a brick on it... */
4d791aad 1653 if (priv->bus_type == BUS_TYPE_PCCARD)
1da177e4
LT		 1654 atmel_write16(dev, GCR, 0x0060);
1655 atmel_write16(dev, GCR, 0x0040);
4d791aad 1656
1da177e4
LT		 1657 del_timer_sync(&priv->management_timer);
1658 unregister_netdev(dev);
1659 remove_proc_entry("driver/atmel", NULL);
1660 free_irq(dev->irq, dev);
b4558ea9 1661 kfree(priv->firmware);
b16a228d 1662 release_region(dev->base_addr, 32);
1da177e4
LT		 1663 free_netdev(dev);
1664}
1665
1666EXPORT_SYMBOL(stop_atmel_card);
1667
1668static int atmel_set_essid(struct net_device *dev,
1669 struct iw_request_info *info,
1670 struct iw_point *dwrq,
1671 char *extra)
1672{
1673 struct atmel_private *priv = netdev_priv(dev);
1674
1675 /* Check if we asked for `any' */
1676 if(dwrq->flags == 0) {
1677 priv->connect_to_any_BSS = 1;
1678 } else {
1679 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1680
1681 priv->connect_to_any_BSS = 0;
4d791aad 1682
1da177e4
LT		 1683 /* Check the size of the string */
1684 if (dwrq->length > MAX_SSID_LENGTH + 1)
4d791aad 1685 return -E2BIG;
1da177e4
LT		 1686 if (index != 0)
1687 return -EINVAL;
4d791aad 1688
1da177e4
LT		 1689 memcpy(priv->new_SSID, extra, dwrq->length - 1);
1690 priv->new_SSID_size = dwrq->length - 1;
1691 }
1692
1693 return -EINPROGRESS;
1694}
1695
1696static int atmel_get_essid(struct net_device *dev,
1697 struct iw_request_info *info,
1698 struct iw_point *dwrq,
1699 char *extra)
1700{
1701 struct atmel_private *priv = netdev_priv(dev);
1702
1703 /* Get the current SSID */
1704 if (priv->new_SSID_size != 0) {
1705 memcpy(extra, priv->new_SSID, priv->new_SSID_size);
1706 extra[priv->new_SSID_size] = '\0';
1707 dwrq->length = priv->new_SSID_size + 1;
1708 } else {
1709 memcpy(extra, priv->SSID, priv->SSID_size);
1710 extra[priv->SSID_size] = '\0';
1711 dwrq->length = priv->SSID_size + 1;
1712 }
4d791aad 1713
1da177e4
LT		 1714 dwrq->flags = !priv->connect_to_any_BSS; /* active */
1715
1716 return 0;
1717}
1718
1719static int atmel_get_wap(struct net_device *dev,
1720 struct iw_request_info *info,
1721 struct sockaddr *awrq,
1722 char *extra)
1723{
1724 struct atmel_private *priv = netdev_priv(dev);
1725 memcpy(awrq->sa_data, priv->CurrentBSSID, 6);
1726 awrq->sa_family = ARPHRD_ETHER;
1727
1728 return 0;
1729}
1730
1731static int atmel_set_encode(struct net_device *dev,
1732 struct iw_request_info *info,
1733 struct iw_point *dwrq,
1734 char *extra)
1735{
1736 struct atmel_private *priv = netdev_priv(dev);
1737
1738 /* Basic checking: do we have a key to set ?
1739 * Note : with the new API, it's impossible to get a NULL pointer.
1740 * Therefore, we need to check a key size == 0 instead.
1741 * New version of iwconfig properly set the IW_ENCODE_NOKEY flag
1742 * when no key is present (only change flags), but older versions
1743 * don't do it. - Jean II */
1744 if (dwrq->length > 0) {
1745 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1746 int current_index = priv->default_key;
1747 /* Check the size of the key */
1748 if (dwrq->length > 13) {
1749 return -EINVAL;
1750 }
1751 /* Check the index (none -> use current) */
1752 if (index < 0 || index >= 4)
1753 index = current_index;
1754 else
1755 priv->default_key = index;
1756 /* Set the length */
1757 if (dwrq->length > 5)
1758 priv->wep_key_len[index] = 13;
1759 else
1760 if (dwrq->length > 0)
1761 priv->wep_key_len[index] = 5;
1762 else
1763 /* Disable the key */
1764 priv->wep_key_len[index] = 0;
1765 /* Check if the key is not marked as invalid */
1766 if(!(dwrq->flags & IW_ENCODE_NOKEY)) {
1767 /* Cleanup */
1768 memset(priv->wep_keys[index], 0, 13);
1769 /* Copy the key in the driver */
1770 memcpy(priv->wep_keys[index], extra, dwrq->length);
1771 }
1772 /* WE specify that if a valid key is set, encryption
1773 * should be enabled (user may turn it off later)
1774 * This is also how "iwconfig ethX key on" works */
4d791aad 1775 if (index == current_index &&
1da177e4
LT		 1776 priv->wep_key_len[index] > 0) {
1777 priv->wep_is_on = 1;
1778 priv->exclude_unencrypted = 1;
1779 if (priv->wep_key_len[index] > 5) {
1780 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1781 priv->encryption_level = 2;
1782 } else {
1783 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1784 priv->encryption_level = 1;
1785 }
1786 }
1787 } else {
1788 /* Do we want to just set the transmit key index ? */
1789 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
4d791aad 1790 if (index >= 0 && index < 4) {
1da177e4
LT		 1791 priv->default_key = index;
1792 } else
1793 /* Don't complain if only change the mode */
4d791aad 1794 if (!dwrq->flags & IW_ENCODE_MODE) {
1da177e4
LT		 1795 return -EINVAL;
1796 }
1797 }
1798 /* Read the flags */
4d791aad 1799 if (dwrq->flags & IW_ENCODE_DISABLED) {
1da177e4 1800 priv->wep_is_on = 0;
4d791aad 1801 priv->encryption_level = 0;
1da177e4
LT		 1802 priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1803 } else {
1804 priv->wep_is_on = 1;
1805 if (priv->wep_key_len[priv->default_key] > 5) {
1806 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1807 priv->encryption_level = 2;
1808 } else {
1809 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1810 priv->encryption_level = 1;
1811 }
1812 }
4d791aad 1813 if (dwrq->flags & IW_ENCODE_RESTRICTED)
1da177e4 1814 priv->exclude_unencrypted = 1;
4d791aad 1815 if(dwrq->flags & IW_ENCODE_OPEN)
1da177e4 1816 priv->exclude_unencrypted = 0;
4d791aad 1817
1da177e4
LT		 1818 return -EINPROGRESS; /* Call commit handler */
1819}
1820
1da177e4
LT		 1821static int atmel_get_encode(struct net_device *dev,
1822 struct iw_request_info *info,
1823 struct iw_point *dwrq,
1824 char *extra)
1825{
1826 struct atmel_private *priv = netdev_priv(dev);
1827 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
4d791aad 1828
1da177e4
LT		 1829 if (!priv->wep_is_on)
1830 dwrq->flags = IW_ENCODE_DISABLED;
b16a228d 1831 else {
1832 if (priv->exclude_unencrypted)
1833 dwrq->flags = IW_ENCODE_RESTRICTED;
1834 else
1835 dwrq->flags = IW_ENCODE_OPEN;
1836 }
1da177e4
LT		 1837 /* Which key do we want ? -1 -> tx index */
1838 if (index < 0 || index >= 4)
1839 index = priv->default_key;
1840 dwrq->flags |= index + 1;
1841 /* Copy the key to the user buffer */
1842 dwrq->length = priv->wep_key_len[index];
1843 if (dwrq->length > 16) {
1844 dwrq->length=0;
1845 } else {
1846 memset(extra, 0, 16);
1847 memcpy(extra, priv->wep_keys[index], dwrq->length);
1848 }
4d791aad 1849
1da177e4
LT		 1850 return 0;
1851}
1852
1853static int atmel_get_name(struct net_device *dev,
1854 struct iw_request_info *info,
1855 char *cwrq,
1856 char *extra)
1857{
1858 strcpy(cwrq, "IEEE 802.11-DS");
1859 return 0;
1860}
1861
1862static int atmel_set_rate(struct net_device *dev,
1863 struct iw_request_info *info,
1864 struct iw_param *vwrq,
1865 char *extra)
1866{
1867 struct atmel_private *priv = netdev_priv(dev);
4d791aad 1868
1da177e4
LT		 1869 if (vwrq->fixed == 0) {
1870 priv->tx_rate = 3;
1871 priv->auto_tx_rate = 1;
1872 } else {
1873 priv->auto_tx_rate = 0;
4d791aad 1874
1da177e4 1875 /* Which type of value ? */
4d791aad 1876 if ((vwrq->value < 4) && (vwrq->value >= 0)) {
1da177e4 1877 /* Setting by rate index */
4d791aad 1878 priv->tx_rate = vwrq->value;
1da177e4
LT		 1879 } else {
1880 /* Setting by frequency value */
1881 switch (vwrq->value) {
1882 case 1000000: priv->tx_rate = 0; break;
1883 case 2000000: priv->tx_rate = 1; break;
1884 case 5500000: priv->tx_rate = 2; break;
1885 case 11000000: priv->tx_rate = 3; break;
1886 default: return -EINVAL;
1887 }
1888 }
1889 }
1890
1891 return -EINPROGRESS;
1892}
1893
1894static int atmel_set_mode(struct net_device *dev,
1895 struct iw_request_info *info,
1896 __u32 *uwrq,
1897 char *extra)
1898{
1899 struct atmel_private *priv = netdev_priv(dev);
1900
1901 if (*uwrq != IW_MODE_ADHOC && *uwrq != IW_MODE_INFRA)
1902 return -EINVAL;
1903
1904 priv->operating_mode = *uwrq;
4d791aad 1905 return -EINPROGRESS;
1da177e4
LT		 1906}
1907
1908static int atmel_get_mode(struct net_device *dev,
1909 struct iw_request_info *info,
1910 __u32 *uwrq,
1911 char *extra)
1912{
1913 struct atmel_private *priv = netdev_priv(dev);
4d791aad 1914
1da177e4
LT		 1915 *uwrq = priv->operating_mode;
1916 return 0;
1917}
1918
1919static int atmel_get_rate(struct net_device *dev,
1920 struct iw_request_info *info,
1921 struct iw_param *vwrq,
1922 char *extra)
1923{
1924 struct atmel_private *priv = netdev_priv(dev);
1925
1926 if (priv->auto_tx_rate) {
1927 vwrq->fixed = 0;
1928 vwrq->value = 11000000;
1929 } else {
1930 vwrq->fixed = 1;
1931 switch(priv->tx_rate) {
1932 case 0: vwrq->value = 1000000; break;
1933 case 1: vwrq->value = 2000000; break;
1934 case 2: vwrq->value = 5500000; break;
1935 case 3: vwrq->value = 11000000; break;
1936 }
1937 }
1938 return 0;
1939}
1940
1941static int atmel_set_power(struct net_device *dev,
1942 struct iw_request_info *info,
1943 struct iw_param *vwrq,
1944 char *extra)
1945{
1946 struct atmel_private *priv = netdev_priv(dev);
1947 priv->power_mode = vwrq->disabled ? 0 : 1;
1948 return -EINPROGRESS;
1949}
1950
1951static int atmel_get_power(struct net_device *dev,
1952 struct iw_request_info *info,
1953 struct iw_param *vwrq,
1954 char *extra)
1955{
1956 struct atmel_private *priv = netdev_priv(dev);
1957 vwrq->disabled = priv->power_mode ? 0 : 1;
1958 vwrq->flags = IW_POWER_ON;
1959 return 0;
1960}
1961
1962static int atmel_set_retry(struct net_device *dev,
1963 struct iw_request_info *info,
1964 struct iw_param *vwrq,
1965 char *extra)
1966{
1967 struct atmel_private *priv = netdev_priv(dev);
4d791aad
CP		 1968
1969 if (!vwrq->disabled && (vwrq->flags & IW_RETRY_LIMIT)) {
1970 if (vwrq->flags & IW_RETRY_MAX)
1da177e4
LT		 1971 priv->long_retry = vwrq->value;
1972 else if (vwrq->flags & IW_RETRY_MIN)
1973 priv->short_retry = vwrq->value;
1974 else {
1975 /* No modifier : set both */
1976 priv->long_retry = vwrq->value;
1977 priv->short_retry = vwrq->value;
1978 }
4d791aad 1979 return -EINPROGRESS;
1da177e4 1980 }
4d791aad 1981
1da177e4
LT		 1982 return -EINVAL;
1983}
1984
1985static int atmel_get_retry(struct net_device *dev,
1986 struct iw_request_info *info,
1987 struct iw_param *vwrq,
1988 char *extra)
1989{
1990 struct atmel_private *priv = netdev_priv(dev);
1991
1992 vwrq->disabled = 0; /* Can't be disabled */
1993
1994 /* Note : by default, display the min retry number */
4d791aad 1995 if (vwrq->flags & IW_RETRY_MAX) {
1da177e4
LT		 1996 vwrq->flags = IW_RETRY_LIMIT | IW_RETRY_MAX;
1997 vwrq->value = priv->long_retry;
1998 } else {
1999 vwrq->flags = IW_RETRY_LIMIT;
2000 vwrq->value = priv->short_retry;
4d791aad 2001 if (priv->long_retry != priv->short_retry)
1da177e4
LT		 2002 vwrq->flags |= IW_RETRY_MIN;
2003 }
2004
2005 return 0;
2006}
2007
2008static int atmel_set_rts(struct net_device *dev,
2009 struct iw_request_info *info,
2010 struct iw_param *vwrq,
2011 char *extra)
2012{
2013 struct atmel_private *priv = netdev_priv(dev);
2014 int rthr = vwrq->value;
2015
4d791aad 2016 if (vwrq->disabled)
1da177e4 2017 rthr = 2347;
4d791aad 2018 if ((rthr < 0) || (rthr > 2347)) {
1da177e4
LT		 2019 return -EINVAL;
2020 }
2021 priv->rts_threshold = rthr;
4d791aad 2022
1da177e4
LT		 2023 return -EINPROGRESS; /* Call commit handler */
2024}
2025
2026static int atmel_get_rts(struct net_device *dev,
2027 struct iw_request_info *info,
2028 struct iw_param *vwrq,
2029 char *extra)
2030{
2031 struct atmel_private *priv = netdev_priv(dev);
4d791aad 2032
1da177e4
LT		 2033 vwrq->value = priv->rts_threshold;
2034 vwrq->disabled = (vwrq->value >= 2347);
2035 vwrq->fixed = 1;
2036
2037 return 0;
2038}
2039
2040static int atmel_set_frag(struct net_device *dev,
2041 struct iw_request_info *info,
2042 struct iw_param *vwrq,
2043 char *extra)
2044{
2045 struct atmel_private *priv = netdev_priv(dev);
2046 int fthr = vwrq->value;
2047
4d791aad 2048 if (vwrq->disabled)
1da177e4 2049 fthr = 2346;
4d791aad 2050 if ((fthr < 256) || (fthr > 2346)) {
1da177e4
LT		 2051 return -EINVAL;
2052 }
2053 fthr &= ~0x1; /* Get an even value - is it really needed ??? */
2054 priv->frag_threshold = fthr;
4d791aad 2055
1da177e4
LT		 2056 return -EINPROGRESS; /* Call commit handler */
2057}
2058
2059static int atmel_get_frag(struct net_device *dev,
2060 struct iw_request_info *info,
2061 struct iw_param *vwrq,
2062 char *extra)
2063{
2064 struct atmel_private *priv = netdev_priv(dev);
2065
2066 vwrq->value = priv->frag_threshold;
2067 vwrq->disabled = (vwrq->value >= 2346);
2068 vwrq->fixed = 1;
2069
2070 return 0;
2071}
2072
2073static const long frequency_list[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
2074 2447, 2452, 2457, 2462, 2467, 2472, 2484 };
2075
2076static int atmel_set_freq(struct net_device *dev,
2077 struct iw_request_info *info,
2078 struct iw_freq *fwrq,
2079 char *extra)
2080{
2081 struct atmel_private *priv = netdev_priv(dev);
2082 int rc = -EINPROGRESS; /* Call commit handler */
4d791aad 2083
1da177e4 2084 /* If setting by frequency, convert to a channel */
4d791aad
CP		 2085 if ((fwrq->e == 1) &&
2086 (fwrq->m >= (int) 241200000) &&
2087 (fwrq->m <= (int) 248700000)) {
1da177e4
LT		 2088 int f = fwrq->m / 100000;
2089 int c = 0;
4d791aad 2090 while ((c < 14) && (f != frequency_list[c]))
1da177e4
LT		 2091 c++;
2092 /* Hack to fall through... */
2093 fwrq->e = 0;
2094 fwrq->m = c + 1;
2095 }
2096 /* Setting by channel number */
4d791aad 2097 if ((fwrq->m > 1000) || (fwrq->e > 0))
1da177e4
LT		 2098 rc = -EOPNOTSUPP;
2099 else {
2100 int channel = fwrq->m;
2101 if (atmel_validate_channel(priv, channel) == 0) {
2102 priv->channel = channel;
2103 } else {
2104 rc = -EINVAL;
4d791aad 2105 }
1da177e4
LT		 2106 }
2107 return rc;
2108}
2109
2110static int atmel_get_freq(struct net_device *dev,
2111 struct iw_request_info *info,
2112 struct iw_freq *fwrq,
2113 char *extra)
2114{
2115 struct atmel_private *priv = netdev_priv(dev);
2116
2117 fwrq->m = priv->channel;
2118 fwrq->e = 0;
2119 return 0;
2120}
2121
2122static int atmel_set_scan(struct net_device *dev,
2123 struct iw_request_info *info,
2124 struct iw_param *vwrq,
2125 char *extra)
2126{
2127 struct atmel_private *priv = netdev_priv(dev);
2128 unsigned long flags;
2129
2130 /* Note : you may have realised that, as this is a SET operation,
2131 * this is privileged and therefore a normal user can't
2132 * perform scanning.
2133 * This is not an error, while the device perform scanning,
2134 * traffic doesn't flow, so it's a perfect DoS...
2135 * Jean II */
4d791aad 2136
1da177e4
LT		 2137 if (priv->station_state == STATION_STATE_DOWN)
2138 return -EAGAIN;
2139
2140 /* Timeout old surveys. */
2141 if ((jiffies - priv->last_survey) > (20 * HZ))
2142 priv->site_survey_state = SITE_SURVEY_IDLE;
2143 priv->last_survey = jiffies;
2144
2145 /* Initiate a scan command */
2146 if (priv->site_survey_state == SITE_SURVEY_IN_PROGRESS)
2147 return -EBUSY;
4d791aad 2148
1da177e4
LT		 2149 del_timer_sync(&priv->management_timer);
2150 spin_lock_irqsave(&priv->irqlock, flags);
4d791aad 2151
1da177e4
LT		 2152 priv->site_survey_state = SITE_SURVEY_IN_PROGRESS;
2153 priv->fast_scan = 0;
2154 atmel_scan(priv, 0);
2155 spin_unlock_irqrestore(&priv->irqlock, flags);
4d791aad 2156
1da177e4
LT		 2157 return 0;
2158}
2159
2160static int atmel_get_scan(struct net_device *dev,
2161 struct iw_request_info *info,
2162 struct iw_point *dwrq,
2163 char *extra)
2164{
2165 struct atmel_private *priv = netdev_priv(dev);
2166 int i;
2167 char *current_ev = extra;
2168 struct iw_event iwe;
4d791aad 2169
1da177e4
LT		 2170 if (priv->site_survey_state != SITE_SURVEY_COMPLETED)
2171 return -EAGAIN;
4d791aad
CP		 2172
2173 for (i = 0; i < priv->BSS_list_entries; i++) {
1da177e4
LT		 2174 iwe.cmd = SIOCGIWAP;
2175 iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
2176 memcpy(iwe.u.ap_addr.sa_data, priv->BSSinfo[i].BSSID, 6);
2177 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_ADDR_LEN);
2178
2179 iwe.u.data.length = priv->BSSinfo[i].SSIDsize;
2180 if (iwe.u.data.length > 32)
2181 iwe.u.data.length = 32;
2182 iwe.cmd = SIOCGIWESSID;
2183 iwe.u.data.flags = 1;
2184 current_ev = iwe_stream_add_point(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, priv->BSSinfo[i].SSID);
4d791aad 2185
1da177e4
LT		 2186 iwe.cmd = SIOCGIWMODE;
2187 iwe.u.mode = priv->BSSinfo[i].BSStype;
2188 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_UINT_LEN);
4d791aad 2189
1da177e4
LT		 2190 iwe.cmd = SIOCGIWFREQ;
2191 iwe.u.freq.m = priv->BSSinfo[i].channel;
2192 iwe.u.freq.e = 0;
2193 current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_FREQ_LEN);
4d791aad 2194
1da177e4
LT		 2195 iwe.cmd = SIOCGIWENCODE;
2196 if (priv->BSSinfo[i].UsingWEP)
2197 iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
2198 else
2199 iwe.u.data.flags = IW_ENCODE_DISABLED;
2200 iwe.u.data.length = 0;
2201 current_ev = iwe_stream_add_point(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, NULL);
1da177e4
LT		 2202 }
2203
2204 /* Length of data */
2205 dwrq->length = (current_ev - extra);
4d791aad
CP		 2206 dwrq->flags = 0;
2207
1da177e4
LT		 2208 return 0;
2209}
2210
2211static int atmel_get_range(struct net_device *dev,
2212 struct iw_request_info *info,
2213 struct iw_point *dwrq,
2214 char *extra)
2215{
2216 struct atmel_private *priv = netdev_priv(dev);
2217 struct iw_range *range = (struct iw_range *) extra;
4d791aad 2218 int k, i, j;
1da177e4
LT		 2219
2220 dwrq->length = sizeof(struct iw_range);
f36be621 2221 memset(range, 0, sizeof(struct iw_range));
1da177e4
LT		 2222 range->min_nwid = 0x0000;
2223 range->max_nwid = 0x0000;
2224 range->num_channels = 0;
2225 for (j = 0; j < sizeof(channel_table)/sizeof(channel_table[0]); j++)
2226 if (priv->reg_domain == channel_table[j].reg_domain) {
2227 range->num_channels = channel_table[j].max - channel_table[j].min + 1;
2228 break;
2229 }
2230 if (range->num_channels != 0) {
4d791aad 2231 for (k = 0, i = channel_table[j].min; i <= channel_table[j].max; i++) {
1da177e4 2232 range->freq[k].i = i; /* List index */
4d791aad 2233 range->freq[k].m = frequency_list[i - 1] * 100000;
1da177e4
LT		 2234 range->freq[k++].e = 1; /* Values in table in MHz -> * 10^5 * 10 */
2235 }
2236 range->num_frequency = k;
2237 }
4d791aad 2238
1da177e4
LT		 2239 range->max_qual.qual = 100;
2240 range->max_qual.level = 100;
2241 range->max_qual.noise = 0;
2242 range->max_qual.updated = IW_QUAL_NOISE_INVALID;
2243
2244 range->avg_qual.qual = 50;
2245 range->avg_qual.level = 50;
2246 range->avg_qual.noise = 0;
2247 range->avg_qual.updated = IW_QUAL_NOISE_INVALID;
2248
2249 range->sensitivity = 0;
2250
2251 range->bitrate[0] = 1000000;
2252 range->bitrate[1] = 2000000;
2253 range->bitrate[2] = 5500000;
2254 range->bitrate[3] = 11000000;
2255 range->num_bitrates = 4;
2256
2257 range->min_rts = 0;
2258 range->max_rts = 2347;
2259 range->min_frag = 256;
2260 range->max_frag = 2346;
2261
2262 range->encoding_size[0] = 5;
2263 range->encoding_size[1] = 13;
2264 range->num_encoding_sizes = 2;
2265 range->max_encoding_tokens = 4;
4d791aad 2266
1da177e4
LT		 2267 range->pmp_flags = IW_POWER_ON;
2268 range->pmt_flags = IW_POWER_ON;
2269 range->pm_capa = 0;
4d791aad 2270
1da177e4
LT		 2271 range->we_version_source = WIRELESS_EXT;
2272 range->we_version_compiled = WIRELESS_EXT;
2273 range->retry_capa = IW_RETRY_LIMIT ;
2274 range->retry_flags = IW_RETRY_LIMIT;
2275 range->r_time_flags = 0;
2276 range->min_retry = 1;
2277 range->max_retry = 65535;
2278
2279 return 0;
2280}
2281
2282static int atmel_set_wap(struct net_device *dev,
2283 struct iw_request_info *info,
2284 struct sockaddr *awrq,
2285 char *extra)
2286{
2287 struct atmel_private *priv = netdev_priv(dev);
2288 int i;
2289 static const u8 bcast[] = { 255, 255, 255, 255, 255, 255 };
2290 unsigned long flags;
2291
2292 if (awrq->sa_family != ARPHRD_ETHER)
2293 return -EINVAL;
4d791aad 2294
1da177e4
LT		 2295 if (memcmp(bcast, awrq->sa_data, 6) == 0) {
2296 del_timer_sync(&priv->management_timer);
2297 spin_lock_irqsave(&priv->irqlock, flags);
2298 atmel_scan(priv, 1);
2299 spin_unlock_irqrestore(&priv->irqlock, flags);
2300 return 0;
2301 }
4d791aad
CP		 2302
2303 for (i = 0; i < priv->BSS_list_entries; i++) {
1da177e4
LT		 2304 if (memcmp(priv->BSSinfo[i].BSSID, awrq->sa_data, 6) == 0) {
2305 if (!priv->wep_is_on && priv->BSSinfo[i].UsingWEP) {
2306 return -EINVAL;
2307 } else if (priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) {
2308 return -EINVAL;
2309 } else {
2310 del_timer_sync(&priv->management_timer);
2311 spin_lock_irqsave(&priv->irqlock, flags);
2312 atmel_join_bss(priv, i);
2313 spin_unlock_irqrestore(&priv->irqlock, flags);
2314 return 0;
2315 }
2316 }
2317 }
4d791aad 2318
1da177e4
LT		 2319 return -EINVAL;
2320}
4d791aad 2321
1da177e4
LT		 2322static int atmel_config_commit(struct net_device *dev,
2323 struct iw_request_info *info, /* NULL */
2324 void *zwrq, /* NULL */
2325 char *extra) /* NULL */
2326{
2327 return atmel_open(dev);
2328}
2329
4d791aad 2330static const iw_handler atmel_handler[] =
1da177e4
LT		 2331{
2332 (iw_handler) atmel_config_commit, /* SIOCSIWCOMMIT */
4d791aad 2333 (iw_handler) atmel_get_name, /* SIOCGIWNAME */
1da177e4
LT		 2334 (iw_handler) NULL, /* SIOCSIWNWID */
2335 (iw_handler) NULL, /* SIOCGIWNWID */
2336 (iw_handler) atmel_set_freq, /* SIOCSIWFREQ */
2337 (iw_handler) atmel_get_freq, /* SIOCGIWFREQ */
2338 (iw_handler) atmel_set_mode, /* SIOCSIWMODE */
2339 (iw_handler) atmel_get_mode, /* SIOCGIWMODE */
4d791aad
CP		 2340 (iw_handler) NULL, /* SIOCSIWSENS */
2341 (iw_handler) NULL, /* SIOCGIWSENS */
1da177e4
LT		 2342 (iw_handler) NULL, /* SIOCSIWRANGE */
2343 (iw_handler) atmel_get_range, /* SIOCGIWRANGE */
2344 (iw_handler) NULL, /* SIOCSIWPRIV */
2345 (iw_handler) NULL, /* SIOCGIWPRIV */
2346 (iw_handler) NULL, /* SIOCSIWSTATS */
2347 (iw_handler) NULL, /* SIOCGIWSTATS */
2348 (iw_handler) NULL, /* SIOCSIWSPY */
2349 (iw_handler) NULL, /* SIOCGIWSPY */
2350 (iw_handler) NULL, /* -- hole -- */
2351 (iw_handler) NULL, /* -- hole -- */
2352 (iw_handler) atmel_set_wap, /* SIOCSIWAP */
2353 (iw_handler) atmel_get_wap, /* SIOCGIWAP */
2354 (iw_handler) NULL, /* -- hole -- */
4d791aad 2355 (iw_handler) NULL, /* SIOCGIWAPLIST */
1da177e4
LT		 2356 (iw_handler) atmel_set_scan, /* SIOCSIWSCAN */
2357 (iw_handler) atmel_get_scan, /* SIOCGIWSCAN */
2358 (iw_handler) atmel_set_essid, /* SIOCSIWESSID */
2359 (iw_handler) atmel_get_essid, /* SIOCGIWESSID */
4d791aad
CP		 2360 (iw_handler) NULL, /* SIOCSIWNICKN */
2361 (iw_handler) NULL, /* SIOCGIWNICKN */
1da177e4
LT		 2362 (iw_handler) NULL, /* -- hole -- */
2363 (iw_handler) NULL, /* -- hole -- */
2364 (iw_handler) atmel_set_rate, /* SIOCSIWRATE */
2365 (iw_handler) atmel_get_rate, /* SIOCGIWRATE */
2366 (iw_handler) atmel_set_rts, /* SIOCSIWRTS */
2367 (iw_handler) atmel_get_rts, /* SIOCGIWRTS */
2368 (iw_handler) atmel_set_frag, /* SIOCSIWFRAG */
2369 (iw_handler) atmel_get_frag, /* SIOCGIWFRAG */
4d791aad
CP		 2370 (iw_handler) NULL, /* SIOCSIWTXPOW */
2371 (iw_handler) NULL, /* SIOCGIWTXPOW */
1da177e4
LT		 2372 (iw_handler) atmel_set_retry, /* SIOCSIWRETRY */
2373 (iw_handler) atmel_get_retry, /* SIOCGIWRETRY */
2374 (iw_handler) atmel_set_encode, /* SIOCSIWENCODE */
2375 (iw_handler) atmel_get_encode, /* SIOCGIWENCODE */
2376 (iw_handler) atmel_set_power, /* SIOCSIWPOWER */
2377 (iw_handler) atmel_get_power, /* SIOCGIWPOWER */
2378};
2379
4d791aad 2380static const iw_handler atmel_private_handler[] =
1da177e4
LT		 2381{
2382 NULL, /* SIOCIWFIRSTPRIV */
2383};
2384
2385typedef struct atmel_priv_ioctl {
2386 char id[32];
4d791aad
CP		 2387 unsigned char __user *data;
2388 unsigned short len;
1da177e4
LT		 2389} atmel_priv_ioctl;
2390
4d791aad
CP		 2391#define ATMELFWL SIOCIWFIRSTPRIV
2392#define ATMELIDIFC ATMELFWL + 1
2393#define ATMELRD ATMELFWL + 2
2394#define ATMELMAGIC 0x51807
1da177e4
LT		 2395#define REGDOMAINSZ 20
2396
2397static const struct iw_priv_args atmel_private_args[] = {
4d791aad
CP		 2398 {
2399 .cmd = ATMELFWL,
2400 .set_args = IW_PRIV_TYPE_BYTE
2401 | IW_PRIV_SIZE_FIXED
2402 | sizeof (atmel_priv_ioctl),
2403 .get_args = IW_PRIV_TYPE_NONE,
2404 .name = "atmelfwl"
2405 }, {
2406 .cmd = ATMELIDIFC,
2407 .set_args = IW_PRIV_TYPE_NONE,
2408 .get_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
2409 .name = "atmelidifc"
2410 }, {
2411 .cmd = ATMELRD,
2412 .set_args = IW_PRIV_TYPE_CHAR | REGDOMAINSZ,
2413 .get_args = IW_PRIV_TYPE_NONE,
2414 .name = "regdomain"
2415 },
1da177e4
LT		 2416};
2417
4d791aad 2418static const struct iw_handler_def atmel_handler_def =
1da177e4
LT		 2419{
2420 .num_standard = sizeof(atmel_handler)/sizeof(iw_handler),
4d791aad
CP		 2421 .num_private = sizeof(atmel_private_handler)/sizeof(iw_handler),
2422 .num_private_args = sizeof(atmel_private_args)/sizeof(struct iw_priv_args),
1da177e4 2423 .standard = (iw_handler *) atmel_handler,
4d791aad 2424 .private = (iw_handler *) atmel_private_handler,
72f98d38
JT		 2425 .private_args = (struct iw_priv_args *) atmel_private_args,
2426 .get_wireless_stats = atmel_get_wireless_stats
1da177e4
LT		 2427};
2428
2429static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2430{
2431 int i, rc = 0;
2432 struct atmel_private *priv = netdev_priv(dev);
2433 atmel_priv_ioctl com;
2434 struct iwreq *wrq = (struct iwreq *) rq;
2435 unsigned char *new_firmware;
4d791aad 2436 char domain[REGDOMAINSZ + 1];
1da177e4
LT		 2437
2438 switch (cmd) {
1da177e4 2439 case ATMELIDIFC:
4d791aad 2440 wrq->u.param.value = ATMELMAGIC;
1da177e4 2441 break;
4d791aad 2442
1da177e4
LT		 2443 case ATMELFWL:
2444 if (copy_from_user(&com, rq->ifr_data, sizeof(com))) {
2445 rc = -EFAULT;
2446 break;
2447 }
2448
2449 if (!capable(CAP_NET_ADMIN)) {
2450 rc = -EPERM;
2451 break;
2452 }
2453
2454 if (!(new_firmware = kmalloc(com.len, GFP_KERNEL))) {
2455 rc = -ENOMEM;
2456 break;
2457 }
2458
2459 if (copy_from_user(new_firmware, com.data, com.len)) {
2460 kfree(new_firmware);
2461 rc = -EFAULT;
2462 break;
2463 }
2464
b4558ea9 2465 kfree(priv->firmware);
4d791aad 2466
1da177e4
LT		 2467 priv->firmware = new_firmware;
2468 priv->firmware_length = com.len;
2469 strncpy(priv->firmware_id, com.id, 31);
2470 priv->firmware_id[31] = '\0';
2471 break;
2472
2473 case ATMELRD:
2474 if (copy_from_user(domain, rq->ifr_data, REGDOMAINSZ)) {
2475 rc = -EFAULT;
2476 break;
2477 }
4d791aad 2478
1da177e4
LT		 2479 if (!capable(CAP_NET_ADMIN)) {
2480 rc = -EPERM;
2481 break;
2482 }
2483
2484 domain[REGDOMAINSZ] = 0;
2485 rc = -EINVAL;
2486 for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++) {
2487 /* strcasecmp doesn't exist in the library */
2488 char *a = channel_table[i].name;
2489 char *b = domain;
2490 while (*a) {
2491 char c1 = *a++;
2492 char c2 = *b++;
2493 if (tolower(c1) != tolower(c2))
2494 break;
2495 }
2496 if (!*a && !*b) {
2497 priv->config_reg_domain = channel_table[i].reg_domain;
2498 rc = 0;
2499 }
2500 }
4d791aad 2501
1da177e4
LT		 2502 if (rc == 0 && priv->station_state != STATION_STATE_DOWN)
2503 rc = atmel_open(dev);
2504 break;
4d791aad 2505
1da177e4
LT		 2506 default:
2507 rc = -EOPNOTSUPP;
2508 }
4d791aad 2509
1da177e4
LT		 2510 return rc;
2511}
2512
2513struct auth_body {
2514 u16 alg;
2515 u16 trans_seq;
2516 u16 status;
2517 u8 el_id;
2518 u8 chall_text_len;
2519 u8 chall_text[253];
4d791aad 2520};
1da177e4
LT		 2521
2522static void atmel_enter_state(struct atmel_private *priv, int new_state)
2523{
2524 int old_state = priv->station_state;
4d791aad 2525
1da177e4
LT		 2526 if (new_state == old_state)
2527 return;
4d791aad 2528
1da177e4 2529 priv->station_state = new_state;
4d791aad 2530
1da177e4
LT		 2531 if (new_state == STATION_STATE_READY) {
2532 netif_start_queue(priv->dev);
2533 netif_carrier_on(priv->dev);
2534 }
2535
2536 if (old_state == STATION_STATE_READY) {
2537 netif_carrier_off(priv->dev);
2538 if (netif_running(priv->dev))
2539 netif_stop_queue(priv->dev);
2540 priv->last_beacon_timestamp = 0;
2541 }
2542}
2543
2544static void atmel_scan(struct atmel_private *priv, int specific_ssid)
2545{
2546 struct {
2547 u8 BSSID[6];
2548 u8 SSID[MAX_SSID_LENGTH];
2549 u8 scan_type;
2550 u8 channel;
2551 u16 BSS_type;
2552 u16 min_channel_time;
2553 u16 max_channel_time;
2554 u8 options;
2555 u8 SSID_size;
2556 } cmd;
4d791aad 2557
1da177e4
LT		 2558 memset(cmd.BSSID, 0xff, 6);
2559
2560 if (priv->fast_scan) {
2561 cmd.SSID_size = priv->SSID_size;
2562 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2563 cmd.min_channel_time = cpu_to_le16(10);
2564 cmd.max_channel_time = cpu_to_le16(50);
2565 } else {
2566 priv->BSS_list_entries = 0;
2567 cmd.SSID_size = 0;
2568 cmd.min_channel_time = cpu_to_le16(10);
2569 cmd.max_channel_time = cpu_to_le16(120);
2570 }
4d791aad 2571
1da177e4 2572 cmd.options = 0;
4d791aad 2573
1da177e4
LT		 2574 if (!specific_ssid)
2575 cmd.options |= SCAN_OPTIONS_SITE_SURVEY;
4d791aad
CP		 2576
2577 cmd.channel = (priv->channel & 0x7f);
1da177e4 2578 cmd.scan_type = SCAN_TYPE_ACTIVE;
4d791aad 2579 cmd.BSS_type = cpu_to_le16(priv->operating_mode == IW_MODE_ADHOC ?
1da177e4 2580 BSS_TYPE_AD_HOC : BSS_TYPE_INFRASTRUCTURE);
4d791aad 2581
1da177e4
LT		 2582 atmel_send_command(priv, CMD_Scan, &cmd, sizeof(cmd));
2583
2584 /* This must come after all hardware access to avoid being messed up
2585 by stuff happening in interrupt context after we leave STATE_DOWN */
2586 atmel_enter_state(priv, STATION_STATE_SCANNING);
2587}
2588
2589static void join(struct atmel_private *priv, int type)
2590{
2591 struct {
2592 u8 BSSID[6];
2593 u8 SSID[MAX_SSID_LENGTH];
2594 u8 BSS_type; /* this is a short in a scan command - weird */
2595 u8 channel;
2596 u16 timeout;
2597 u8 SSID_size;
2598 u8 reserved;
2599 } cmd;
2600
2601 cmd.SSID_size = priv->SSID_size;
2602 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2603 memcpy(cmd.BSSID, priv->CurrentBSSID, 6);
2604 cmd.channel = (priv->channel & 0x7f);
2605 cmd.BSS_type = type;
2606 cmd.timeout = cpu_to_le16(2000);
2607
4d791aad 2608 atmel_send_command(priv, CMD_Join, &cmd, sizeof(cmd));
1da177e4
LT		 2609}
2610
1da177e4
LT		 2611static void start(struct atmel_private *priv, int type)
2612{
2613 struct {
2614 u8 BSSID[6];
2615 u8 SSID[MAX_SSID_LENGTH];
4d791aad 2616 u8 BSS_type;
1da177e4
LT		 2617 u8 channel;
2618 u8 SSID_size;
2619 u8 reserved[3];
2620 } cmd;
2621
2622 cmd.SSID_size = priv->SSID_size;
2623 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2624 memcpy(cmd.BSSID, priv->BSSID, 6);
2625 cmd.BSS_type = type;
2626 cmd.channel = (priv->channel & 0x7f);
2627
4d791aad 2628 atmel_send_command(priv, CMD_Start, &cmd, sizeof(cmd));
1da177e4
LT		 2629}
2630
4d791aad
CP		 2631static void handle_beacon_probe(struct atmel_private *priv, u16 capability,
2632 u8 channel)
1da177e4
LT		 2633{
2634 int rejoin = 0;
4d791aad 2635 int new = capability & C80211_MGMT_CAPABILITY_ShortPreamble ?
1da177e4
LT		 2636 SHORT_PREAMBLE : LONG_PREAMBLE;
2637
2638 if (priv->preamble != new) {
2639 priv->preamble = new;
2640 rejoin = 1;
2641 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, new);
2642 }
4d791aad 2643
1da177e4
LT		 2644 if (priv->channel != channel) {
2645 priv->channel = channel;
2646 rejoin = 1;
2647 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_CHANNEL_POS, channel);
2648 }
4d791aad 2649
1da177e4
LT		 2650 if (rejoin) {
2651 priv->station_is_associated = 0;
2652 atmel_enter_state(priv, STATION_STATE_JOINNING);
4d791aad 2653
1da177e4
LT		 2654 if (priv->operating_mode == IW_MODE_INFRA)
2655 join(priv, BSS_TYPE_INFRASTRUCTURE);
4d791aad 2656 else
1da177e4 2657 join(priv, BSS_TYPE_AD_HOC);
4d791aad 2658 }
1da177e4
LT		 2659}
2660
4d791aad
CP		 2661static void send_authentication_request(struct atmel_private *priv, u16 system,
2662 u8 *challenge, int challenge_len)
1da177e4 2663{
4ca5253d 2664 struct ieee80211_hdr_4addr header;
1da177e4 2665 struct auth_body auth;
4d791aad
CP		 2666
2667 header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH);
2668 header.duration_id = cpu_to_le16(0x8000);
1da177e4
LT		 2669 header.seq_ctl = 0;
2670 memcpy(header.addr1, priv->CurrentBSSID, 6);
2671 memcpy(header.addr2, priv->dev->dev_addr, 6);
2672 memcpy(header.addr3, priv->CurrentBSSID, 6);
4d791aad
CP		 2673
2674 if (priv->wep_is_on && priv->CurrentAuthentTransactionSeqNum != 1)
1da177e4 2675 /* no WEP for authentication frames with TrSeqNo 1 */
b16a228d 2676 header.frame_ctl |= cpu_to_le16(IEEE80211_FCTL_PROTECTED);
4d791aad
CP		 2677
2678 auth.alg = cpu_to_le16(system);
1da177e4
LT		 2679
2680 auth.status = 0;
2681 auth.trans_seq = cpu_to_le16(priv->CurrentAuthentTransactionSeqNum);
4d791aad 2682 priv->ExpectedAuthentTransactionSeqNum = priv->CurrentAuthentTransactionSeqNum+1;
1da177e4 2683 priv->CurrentAuthentTransactionSeqNum += 2;
4d791aad 2684
1da177e4
LT		 2685 if (challenge_len != 0) {
2686 auth.el_id = 16; /* challenge_text */
2687 auth.chall_text_len = challenge_len;
2688 memcpy(auth.chall_text, challenge, challenge_len);
2689 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 8 + challenge_len);
2690 } else {
2691 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 6);
2692 }
2693}
2694
2695static void send_association_request(struct atmel_private *priv, int is_reassoc)
2696{
2697 u8 *ssid_el_p;
2698 int bodysize;
4ca5253d 2699 struct ieee80211_hdr_4addr header;
1da177e4
LT		 2700 struct ass_req_format {
2701 u16 capability;
4d791aad 2702 u16 listen_interval;
1da177e4
LT		 2703 u8 ap[6]; /* nothing after here directly accessible */
2704 u8 ssid_el_id;
2705 u8 ssid_len;
2706 u8 ssid[MAX_SSID_LENGTH];
2707 u8 sup_rates_el_id;
2708 u8 sup_rates_len;
2709 u8 rates[4];
2710 } body;
4d791aad
CP		 2711
2712 header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT |
b453872c 2713 (is_reassoc ? IEEE80211_STYPE_REASSOC_REQ : IEEE80211_STYPE_ASSOC_REQ));
1da177e4
LT		 2714 header.duration_id = cpu_to_le16(0x8000);
2715 header.seq_ctl = 0;
2716
4d791aad 2717 memcpy(header.addr1, priv->CurrentBSSID, 6);
1da177e4 2718 memcpy(header.addr2, priv->dev->dev_addr, 6);
4d791aad 2719 memcpy(header.addr3, priv->CurrentBSSID, 6);
1da177e4
LT		 2720
2721 body.capability = cpu_to_le16(C80211_MGMT_CAPABILITY_ESS);
2722 if (priv->wep_is_on)
2723 body.capability |= cpu_to_le16(C80211_MGMT_CAPABILITY_Privacy);
2724 if (priv->preamble == SHORT_PREAMBLE)
2725 body.capability |= cpu_to_le16(C80211_MGMT_CAPABILITY_ShortPreamble);
2726
2727 body.listen_interval = cpu_to_le16(priv->listen_interval * priv->beacon_period);
4d791aad 2728
1da177e4
LT		 2729 /* current AP address - only in reassoc frame */
2730 if (is_reassoc) {
4d791aad 2731 memcpy(body.ap, priv->CurrentBSSID, 6);
1da177e4
LT		 2732 ssid_el_p = (u8 *)&body.ssid_el_id;
2733 bodysize = 18 + priv->SSID_size;
2734 } else {
2735 ssid_el_p = (u8 *)&body.ap[0];
2736 bodysize = 12 + priv->SSID_size;
2737 }
4d791aad
CP		 2738
2739 ssid_el_p[0] = C80211_MGMT_ElementID_SSID;
1da177e4
LT		 2740 ssid_el_p[1] = priv->SSID_size;
2741 memcpy(ssid_el_p + 2, priv->SSID, priv->SSID_size);
2742 ssid_el_p[2 + priv->SSID_size] = C80211_MGMT_ElementID_SupportedRates;
2743 ssid_el_p[3 + priv->SSID_size] = 4; /* len of suported rates */
2744 memcpy(ssid_el_p + 4 + priv->SSID_size, atmel_basic_rates, 4);
2745
2746 atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize);
2747}
2748
4d791aad
CP		 2749static int is_frame_from_current_bss(struct atmel_private *priv,
2750 struct ieee80211_hdr_4addr *header)
1da177e4 2751{
b453872c 2752 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
1da177e4
LT		 2753 return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0;
2754 else
2755 return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0;
2756}
2757
2758static int retrieve_bss(struct atmel_private *priv)
2759{
2760 int i;
2761 int max_rssi = -128;
2762 int max_index = -1;
4d791aad 2763
1da177e4
LT		 2764 if (priv->BSS_list_entries == 0)
2765 return -1;
4d791aad 2766
1da177e4 2767 if (priv->connect_to_any_BSS) {
4d791aad
CP		 2768 /* Select a BSS with the max-RSSI but of the same type and of
2769 the same WEP mode and that it is not marked as 'bad' (i.e.
2770 we had previously failed to connect to this BSS with the
2771 settings that we currently use) */
1da177e4 2772 priv->current_BSS = 0;
4d791aad 2773 for (i = 0; i < priv->BSS_list_entries; i++) {
1da177e4 2774 if (priv->operating_mode == priv->BSSinfo[i].BSStype &&
4d791aad 2775 ((!priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) ||
1da177e4
LT		 2776 (priv->wep_is_on && priv->BSSinfo[i].UsingWEP)) &&
2777 !(priv->BSSinfo[i].channel & 0x80)) {
2778 max_rssi = priv->BSSinfo[i].RSSI;
2779 priv->current_BSS = max_index = i;
2780 }
1da177e4
LT		 2781 }
2782 return max_index;
2783 }
4d791aad
CP		 2784
2785 for (i = 0; i < priv->BSS_list_entries; i++) {
1da177e4
LT		 2786 if (priv->SSID_size == priv->BSSinfo[i].SSIDsize &&
2787 memcmp(priv->SSID, priv->BSSinfo[i].SSID, priv->SSID_size) == 0 &&
2788 priv->operating_mode == priv->BSSinfo[i].BSStype &&
2789 atmel_validate_channel(priv, priv->BSSinfo[i].channel) == 0) {
2790 if (priv->BSSinfo[i].RSSI >= max_rssi) {
2791 max_rssi = priv->BSSinfo[i].RSSI;
2792 max_index = i;
2793 }
2794 }
2795 }
2796 return max_index;
2797}
2798
4d791aad
CP		 2799static void store_bss_info(struct atmel_private *priv,
2800 struct ieee80211_hdr_4addr *header, u16 capability,
2801 u16 beacon_period, u8 channel, u8 rssi, u8 ssid_len,
2802 u8 *ssid, int is_beacon)
1da177e4
LT		 2803{
2804 u8 *bss = capability & C80211_MGMT_CAPABILITY_ESS ? header->addr2 : header->addr3;
2805 int i, index;
4d791aad
CP		 2806
2807 for (index = -1, i = 0; i < priv->BSS_list_entries; i++)
2808 if (memcmp(bss, priv->BSSinfo[i].BSSID, 6) == 0)
1da177e4
LT		 2809 index = i;
2810
4d791aad 2811 /* If we process a probe and an entry from this BSS exists
1da177e4
LT		 2812 we will update the BSS entry with the info from this BSS.
2813 If we process a beacon we will only update RSSI */
2814
2815 if (index == -1) {
2816 if (priv->BSS_list_entries == MAX_BSS_ENTRIES)
2817 return;
2818 index = priv->BSS_list_entries++;
2819 memcpy(priv->BSSinfo[index].BSSID, bss, 6);
2820 priv->BSSinfo[index].RSSI = rssi;
2821 } else {
2822 if (rssi > priv->BSSinfo[index].RSSI)
2823 priv->BSSinfo[index].RSSI = rssi;
2824 if (is_beacon)
2825 return;
2826 }
2827
2828 priv->BSSinfo[index].channel = channel;
2829 priv->BSSinfo[index].beacon_period = beacon_period;
2830 priv->BSSinfo[index].UsingWEP = capability & C80211_MGMT_CAPABILITY_Privacy;
2831 memcpy(priv->BSSinfo[index].SSID, ssid, ssid_len);
2832 priv->BSSinfo[index].SSIDsize = ssid_len;
2833
2834 if (capability & C80211_MGMT_CAPABILITY_IBSS)
2835 priv->BSSinfo[index].BSStype = IW_MODE_ADHOC;
2836 else if (capability & C80211_MGMT_CAPABILITY_ESS)
2837 priv->BSSinfo[index].BSStype =IW_MODE_INFRA;
4d791aad
CP		 2838
2839 priv->BSSinfo[index].preamble = capability & C80211_MGMT_CAPABILITY_ShortPreamble ?
1da177e4
LT		 2840 SHORT_PREAMBLE : LONG_PREAMBLE;
2841}
2842
2843static void authenticate(struct atmel_private *priv, u16 frame_len)
2844{
2845 struct auth_body *auth = (struct auth_body *)priv->rx_buf;
2846 u16 status = le16_to_cpu(auth->status);
2847 u16 trans_seq_no = le16_to_cpu(auth->trans_seq);
b16a228d 2848 u16 system = le16_to_cpu(auth->alg);
4d791aad
CP		 2849
2850 if (status == C80211_MGMT_SC_Success && !priv->wep_is_on) {
1da177e4
LT		 2851 /* no WEP */
2852 if (priv->station_was_associated) {
2853 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
2854 send_association_request(priv, 1);
2855 return;
2856 } else {
2857 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
2858 send_association_request(priv, 0);
2859 return;
4d791aad 2860 }
1da177e4 2861 }
4d791aad
CP		 2862
2863 if (status == C80211_MGMT_SC_Success && priv->wep_is_on) {
1da177e4
LT		 2864 /* WEP */
2865 if (trans_seq_no != priv->ExpectedAuthentTransactionSeqNum)
2866 return;
4d791aad 2867
1da177e4
LT		 2868 if (trans_seq_no == 0x0002 &&
2869 auth->el_id == C80211_MGMT_ElementID_ChallengeText) {
b16a228d 2870 send_authentication_request(priv, system, auth->chall_text, auth->chall_text_len);
1da177e4
LT		 2871 return;
2872 }
4d791aad 2873
1da177e4
LT		 2874 if (trans_seq_no == 0x0004) {
2875 if(priv->station_was_associated) {
2876 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
2877 send_association_request(priv, 1);
2878 return;
2879 } else {
2880 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
2881 send_association_request(priv, 0);
2882 return;
4d791aad 2883 }
1da177e4 2884 }
4d791aad
CP		 2885 }
2886
b16a228d 2887 if (status == C80211_MGMT_SC_AuthAlgNotSupported) {
2888 /* Do opensystem first, then try sharedkey */
2889 if (system == C80211_MGMT_AAN_OPENSYSTEM) {
2890 priv->CurrentAuthentTransactionSeqNum = 0x001;
2891 send_authentication_request(priv, C80211_MGMT_AAN_SHAREDKEY, NULL, 0);
2892 } else if (priv->connect_to_any_BSS) {
2893 int bss_index;
4d791aad 2894
b16a228d 2895 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
4d791aad 2896
b16a228d 2897 if ((bss_index = retrieve_bss(priv)) != -1) {
2898 atmel_join_bss(priv, bss_index);
2899 return;
2900 }
1da177e4
LT		 2901 }
2902 }
4d791aad 2903
1da177e4
LT		 2904 priv->AuthenticationRequestRetryCnt = 0;
2905 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
2906 priv->station_is_associated = 0;
2907}
2908
2909static void associate(struct atmel_private *priv, u16 frame_len, u16 subtype)
2910{
2911 struct ass_resp_format {
2912 u16 capability;
2913 u16 status;
2914 u16 ass_id;
2915 u8 el_id;
2916 u8 length;
2917 u8 rates[4];
2918 } *ass_resp = (struct ass_resp_format *)priv->rx_buf;
4d791aad
CP		 2919
2920 u16 status = le16_to_cpu(ass_resp->status);
1da177e4 2921 u16 ass_id = le16_to_cpu(ass_resp->ass_id);
4d791aad
CP		 2922 u16 rates_len = ass_resp->length > 4 ? 4 : ass_resp->length;
2923
1da177e4
LT		 2924 if (frame_len < 8 + rates_len)
2925 return;
4d791aad 2926
1da177e4
LT		 2927 if (status == C80211_MGMT_SC_Success) {
2928 if (subtype == C80211_SUBTYPE_MGMT_ASS_RESPONSE)
2929 priv->AssociationRequestRetryCnt = 0;
2930 else
2931 priv->ReAssociationRequestRetryCnt = 0;
4d791aad
CP		 2932
2933 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
2934 MAC_MGMT_MIB_STATION_ID_POS, ass_id & 0x3fff);
2935 atmel_set_mib(priv, Phy_Mib_Type,
2936 PHY_MIB_RATE_SET_POS, ass_resp->rates, rates_len);
1da177e4
LT		 2937 if (priv->power_mode == 0) {
2938 priv->listen_interval = 1;
4d791aad
CP		 2939 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
2940 MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
2941 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
2942 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
1da177e4
LT		 2943 } else {
2944 priv->listen_interval = 2;
4d791aad
CP		 2945 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
2946 MAC_MGMT_MIB_PS_MODE_POS, PS_MODE);
2947 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
2948 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 2);
1da177e4 2949 }
4d791aad 2950
1da177e4
LT		 2951 priv->station_is_associated = 1;
2952 priv->station_was_associated = 1;
2953 atmel_enter_state(priv, STATION_STATE_READY);
2954 return;
2955 }
4d791aad 2956
1da177e4
LT		 2957 if (subtype == C80211_SUBTYPE_MGMT_ASS_RESPONSE &&
2958 status != C80211_MGMT_SC_AssDeniedBSSRate &&
2959 status != C80211_MGMT_SC_SupportCapabilities &&
2960 priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
2961 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
2962 priv->AssociationRequestRetryCnt++;
2963 send_association_request(priv, 0);
2964 return;
2965 }
4d791aad 2966
1da177e4
LT		 2967 if (subtype == C80211_SUBTYPE_MGMT_REASS_RESPONSE &&
2968 status != C80211_MGMT_SC_AssDeniedBSSRate &&
2969 status != C80211_MGMT_SC_SupportCapabilities &&
2970 priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
2971 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
2972 priv->ReAssociationRequestRetryCnt++;
2973 send_association_request(priv, 1);
2974 return;
2975 }
4d791aad 2976
1da177e4
LT		 2977 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
2978 priv->station_is_associated = 0;
4d791aad
CP		 2979
2980 if (priv->connect_to_any_BSS) {
1da177e4
LT		 2981 int bss_index;
2982 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
4d791aad
CP		 2983
2984 if ((bss_index = retrieve_bss(priv)) != -1)
1da177e4 2985 atmel_join_bss(priv, bss_index);
1da177e4
LT		 2986 }
2987}
2988
2989void atmel_join_bss(struct atmel_private *priv, int bss_index)
2990{
2991 struct bss_info *bss = &priv->BSSinfo[bss_index];
2992
2993 memcpy(priv->CurrentBSSID, bss->BSSID, 6);
2994 memcpy(priv->SSID, bss->SSID, priv->SSID_size = bss->SSIDsize);
2995
2996 /* The WPA stuff cares about the current AP address */
2997 if (priv->use_wpa)
2998 build_wpa_mib(priv);
4d791aad 2999
1da177e4
LT		 3000 /* When switching to AdHoc turn OFF Power Save if needed */
3001
3002 if (bss->BSStype == IW_MODE_ADHOC &&
3003 priv->operating_mode != IW_MODE_ADHOC &&
3004 priv->power_mode) {
3005 priv->power_mode = 0;
3006 priv->listen_interval = 1;
4d791aad
CP		 3007 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3008 MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3009 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3010 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
1da177e4 3011 }
4d791aad 3012
1da177e4 3013 priv->operating_mode = bss->BSStype;
4d791aad 3014 priv->channel = bss->channel & 0x7f;
1da177e4 3015 priv->beacon_period = bss->beacon_period;
4d791aad 3016
1da177e4
LT		 3017 if (priv->preamble != bss->preamble) {
3018 priv->preamble = bss->preamble;
4d791aad
CP		 3019 atmel_set_mib8(priv, Local_Mib_Type,
3020 LOCAL_MIB_PREAMBLE_TYPE, bss->preamble);
1da177e4 3021 }
4d791aad 3022
1da177e4
LT		 3023 if (!priv->wep_is_on && bss->UsingWEP) {
3024 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3025 priv->station_is_associated = 0;
3026 return;
3027 }
4d791aad 3028
1da177e4
LT		 3029 if (priv->wep_is_on && !bss->UsingWEP) {
3030 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3031 priv->station_is_associated = 0;
3032 return;
3033 }
3034
3035 atmel_enter_state(priv, STATION_STATE_JOINNING);
4d791aad 3036
1da177e4
LT		 3037 if (priv->operating_mode == IW_MODE_INFRA)
3038 join(priv, BSS_TYPE_INFRASTRUCTURE);
4d791aad 3039 else
1da177e4
LT		 3040 join(priv, BSS_TYPE_AD_HOC);
3041}
3042
1da177e4
LT		 3043static void restart_search(struct atmel_private *priv)
3044{
3045 int bss_index;
4d791aad 3046
1da177e4
LT		 3047 if (!priv->connect_to_any_BSS) {
3048 atmel_scan(priv, 1);
3049 } else {
3050 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
4d791aad
CP		 3051
3052 if ((bss_index = retrieve_bss(priv)) != -1)
1da177e4
LT		 3053 atmel_join_bss(priv, bss_index);
3054 else
3055 atmel_scan(priv, 0);
4d791aad
CP		 3056 }
3057}
1da177e4
LT		 3058
3059static void smooth_rssi(struct atmel_private *priv, u8 rssi)
3060{
3061 u8 old = priv->wstats.qual.level;
3062 u8 max_rssi = 42; /* 502-rmfd-revd max by experiment, default for now */
3063
3064 switch (priv->firmware_type) {
3065 case ATMEL_FW_TYPE_502E:
3066 max_rssi = 63; /* 502-rmfd-reve max by experiment */
3067 break;
3068 default:
3069 break;
3070 }
3071
3072 rssi = rssi * 100 / max_rssi;
4d791aad
CP		 3073 if ((rssi + old) % 2)
3074 priv->wstats.qual.level = (rssi + old) / 2 + 1;
1da177e4 3075 else
4d791aad 3076 priv->wstats.qual.level = (rssi + old) / 2;
1da177e4
LT		 3077 priv->wstats.qual.updated |= IW_QUAL_LEVEL_UPDATED;
3078 priv->wstats.qual.updated &= ~IW_QUAL_LEVEL_INVALID;
3079}
3080
3081static void atmel_smooth_qual(struct atmel_private *priv)
3082{
4d791aad 3083 unsigned long time_diff = (jiffies - priv->last_qual) / HZ;
1da177e4
LT		 3084 while (time_diff--) {
3085 priv->last_qual += HZ;
4d791aad
CP		 3086 priv->wstats.qual.qual = priv->wstats.qual.qual / 2;
3087 priv->wstats.qual.qual +=
1da177e4
LT		 3088 priv->beacons_this_sec * priv->beacon_period * (priv->wstats.qual.level + 100) / 4000;
3089 priv->beacons_this_sec = 0;
3090 }
3091 priv->wstats.qual.updated |= IW_QUAL_QUAL_UPDATED;
3092 priv->wstats.qual.updated &= ~IW_QUAL_QUAL_INVALID;
3093}
3094
3095/* deals with incoming managment frames. */
4d791aad
CP		 3096static void atmel_management_frame(struct atmel_private *priv,
3097 struct ieee80211_hdr_4addr *header,
3098 u16 frame_len, u8 rssi)
1da177e4
LT		 3099{
3100 u16 subtype;
4d791aad
CP		 3101
3102 subtype = le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_STYPE;
3103 switch (subtype) {
3104 case C80211_SUBTYPE_MGMT_BEACON:
1da177e4 3105 case C80211_SUBTYPE_MGMT_ProbeResponse:
4d791aad 3106
1da177e4
LT		 3107 /* beacon frame has multiple variable-length fields -
3108 never let an engineer loose with a data structure design. */
3109 {
3110 struct beacon_format {
3111 u64 timestamp;
3112 u16 interval;
3113 u16 capability;
3114 u8 ssid_el_id;
3115 u8 ssid_length;
3116 /* ssid here */
3117 u8 rates_el_id;
3118 u8 rates_length;
3119 /* rates here */
3120 u8 ds_el_id;
3121 u8 ds_length;
3122 /* ds here */
3123 } *beacon = (struct beacon_format *)priv->rx_buf;
4d791aad 3124
1da177e4
LT		 3125 u8 channel, rates_length, ssid_length;
3126 u64 timestamp = le64_to_cpu(beacon->timestamp);
3127 u16 beacon_interval = le16_to_cpu(beacon->interval);
3128 u16 capability = le16_to_cpu(beacon->capability);
3129 u8 *beaconp = priv->rx_buf;
3130 ssid_length = beacon->ssid_length;
3131 /* this blows chunks. */
4d791aad 3132 if (frame_len < 14 || frame_len < ssid_length + 15)
1da177e4
LT		 3133 return;
3134 rates_length = beaconp[beacon->ssid_length + 15];
3135 if (frame_len < ssid_length + rates_length + 18)
3136 return;
3137 if (ssid_length > MAX_SSID_LENGTH)
3138 return;
3139 channel = beaconp[ssid_length + rates_length + 18];
4d791aad 3140
1da177e4
LT		 3141 if (priv->station_state == STATION_STATE_READY) {
3142 smooth_rssi(priv, rssi);
4d791aad 3143 if (is_frame_from_current_bss(priv, header)) {
1da177e4
LT		 3144 priv->beacons_this_sec++;
3145 atmel_smooth_qual(priv);
3146 if (priv->last_beacon_timestamp) {
3147 /* Note truncate this to 32 bits - kernel can't divide a long long */
3148 u32 beacon_delay = timestamp - priv->last_beacon_timestamp;
3149 int beacons = beacon_delay / (beacon_interval * 1000);
3150 if (beacons > 1)
3151 priv->wstats.miss.beacon += beacons - 1;
3152 }
3153 priv->last_beacon_timestamp = timestamp;
3154 handle_beacon_probe(priv, capability, channel);
3155 }
3156 }
4d791aad
CP		 3157
3158 if (priv->station_state == STATION_STATE_SCANNING)
3159 store_bss_info(priv, header, capability,
3160 beacon_interval, channel, rssi,
3161 ssid_length,
3162 &beacon->rates_el_id,
3163 subtype == C80211_SUBTYPE_MGMT_BEACON);
1da177e4
LT		 3164 }
3165 break;
4d791aad 3166
1da177e4
LT		 3167 case C80211_SUBTYPE_MGMT_Authentication:
3168
3169 if (priv->station_state == STATION_STATE_AUTHENTICATING)
3170 authenticate(priv, frame_len);
4d791aad 3171
1da177e4 3172 break;
4d791aad 3173
1da177e4
LT		 3174 case C80211_SUBTYPE_MGMT_ASS_RESPONSE:
3175 case C80211_SUBTYPE_MGMT_REASS_RESPONSE:
4d791aad
CP		 3176
3177 if (priv->station_state == STATION_STATE_ASSOCIATING ||
1da177e4
LT		 3178 priv->station_state == STATION_STATE_REASSOCIATING)
3179 associate(priv, frame_len, subtype);
4d791aad 3180
1da177e4
LT		 3181 break;
3182
3183 case C80211_SUBTYPE_MGMT_DISASSOSIATION:
4d791aad
CP		 3184 if (priv->station_is_associated &&
3185 priv->operating_mode == IW_MODE_INFRA &&
1da177e4
LT		 3186 is_frame_from_current_bss(priv, header)) {
3187 priv->station_was_associated = 0;
3188 priv->station_is_associated = 0;
4d791aad 3189
1da177e4
LT		 3190 atmel_enter_state(priv, STATION_STATE_JOINNING);
3191 join(priv, BSS_TYPE_INFRASTRUCTURE);
3192 }
4d791aad 3193
1da177e4
LT		 3194 break;
3195
3196 case C80211_SUBTYPE_MGMT_Deauthentication:
3197 if (priv->operating_mode == IW_MODE_INFRA &&
3198 is_frame_from_current_bss(priv, header)) {
3199 priv->station_was_associated = 0;
3200
3201 atmel_enter_state(priv, STATION_STATE_JOINNING);
3202 join(priv, BSS_TYPE_INFRASTRUCTURE);
3203 }
4d791aad 3204
1da177e4
LT		 3205 break;
3206 }
3207}
3208
3209/* run when timer expires */
3210static void atmel_management_timer(u_long a)
3211{
4d791aad
CP		 3212 struct net_device *dev = (struct net_device *) a;
3213 struct atmel_private *priv = netdev_priv(dev);
3214 unsigned long flags;
1da177e4 3215
4d791aad
CP		 3216 /* Check if the card has been yanked. */
3217 if (priv->card && priv->present_callback &&
3218 !(*priv->present_callback)(priv->card))
3219 return;
1da177e4 3220
4d791aad
CP		 3221 spin_lock_irqsave(&priv->irqlock, flags);
3222
3223 switch (priv->station_state) {
1da177e4 3224
4d791aad
CP		 3225 case STATION_STATE_AUTHENTICATING:
3226 if (priv->AuthenticationRequestRetryCnt >= MAX_AUTHENTICATION_RETRIES) {
3227 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3228 priv->station_is_associated = 0;
3229 priv->AuthenticationRequestRetryCnt = 0;
3230 restart_search(priv);
3231 } else {
3232 priv->AuthenticationRequestRetryCnt++;
3233 priv->CurrentAuthentTransactionSeqNum = 0x0001;
3234 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3235 send_authentication_request(priv, C80211_MGMT_AAN_OPENSYSTEM, NULL, 0);
3236 }
1da177e4 3237 break;
4d791aad
CP		 3238
3239 case STATION_STATE_ASSOCIATING:
3240 if (priv->AssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3241 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3242 priv->station_is_associated = 0;
3243 priv->AssociationRequestRetryCnt = 0;
3244 restart_search(priv);
3245 } else {
3246 priv->AssociationRequestRetryCnt++;
3247 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3248 send_association_request(priv, 0);
3249 }
1da177e4 3250 break;
4d791aad
CP		 3251
3252 case STATION_STATE_REASSOCIATING:
3253 if (priv->ReAssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3254 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3255 priv->station_is_associated = 0;
3256 priv->ReAssociationRequestRetryCnt = 0;
3257 restart_search(priv);
3258 } else {
3259 priv->ReAssociationRequestRetryCnt++;
3260 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3261 send_association_request(priv, 1);
3262 }
3263 break;
3264
3265 default:
3266 break;
3267 }
3268
3269 spin_unlock_irqrestore(&priv->irqlock, flags);
1da177e4 3270}
4d791aad 3271
1da177e4
LT		 3272static void atmel_command_irq(struct atmel_private *priv)
3273{
3274 u8 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
3275 u8 command = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET));
3276 int fast_scan;
4d791aad
CP		 3277
3278 if (status == CMD_STATUS_IDLE ||
1da177e4
LT		 3279 status == CMD_STATUS_IN_PROGRESS)
3280 return;
3281
3282 switch (command){
3283
3284 case CMD_Start:
3285 if (status == CMD_STATUS_COMPLETE) {
3286 priv->station_was_associated = priv->station_is_associated;
3287 atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
3288 (u8 *)priv->CurrentBSSID, 6);
3289 atmel_enter_state(priv, STATION_STATE_READY);
4d791aad 3290 }
1da177e4 3291 break;
4d791aad 3292
1da177e4
LT		 3293 case CMD_Scan:
3294 fast_scan = priv->fast_scan;
3295 priv->fast_scan = 0;
4d791aad 3296
1da177e4
LT		 3297 if (status != CMD_STATUS_COMPLETE) {
3298 atmel_scan(priv, 1);
3299 } else {
3300 int bss_index = retrieve_bss(priv);
3301 if (bss_index != -1) {
3302 atmel_join_bss(priv, bss_index);
4d791aad 3303 } else if (priv->operating_mode == IW_MODE_ADHOC &&
1da177e4
LT		 3304 priv->SSID_size != 0) {
3305 start(priv, BSS_TYPE_AD_HOC);
3306 } else {
3307 priv->fast_scan = !fast_scan;
3308 atmel_scan(priv, 1);
3309 }
3310 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3311 }
3312 break;
4d791aad 3313
1da177e4
LT		 3314 case CMD_SiteSurvey:
3315 priv->fast_scan = 0;
4d791aad 3316
1da177e4
LT		 3317 if (status != CMD_STATUS_COMPLETE)
3318 return;
4d791aad 3319
1da177e4
LT		 3320 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3321 if (priv->station_is_associated) {
4d791aad 3322 atmel_enter_state(priv, STATION_STATE_READY);
1da177e4
LT		 3323 } else {
3324 atmel_scan(priv, 1);
3325 }
3326 break;
3327
3328 case CMD_Join:
3329 if (status == CMD_STATUS_COMPLETE) {
3330 if (priv->operating_mode == IW_MODE_ADHOC) {
3331 priv->station_was_associated = priv->station_is_associated;
3332 atmel_enter_state(priv, STATION_STATE_READY);
3333 } else {
3334 priv->AuthenticationRequestRetryCnt = 0;
3335 atmel_enter_state(priv, STATION_STATE_AUTHENTICATING);
4d791aad 3336
1da177e4
LT		 3337 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3338 priv->CurrentAuthentTransactionSeqNum = 0x0001;
b16a228d 3339 send_authentication_request(priv, C80211_MGMT_AAN_SHAREDKEY, NULL, 0);
1da177e4
LT		 3340 }
3341 return;
3342 }
4d791aad 3343
1da177e4 3344 atmel_scan(priv, 1);
1da177e4
LT		 3345 }
3346}
3347
3348static int atmel_wakeup_firmware(struct atmel_private *priv)
3349{
3350 struct host_info_struct *iface = &priv->host_info;
3351 u16 mr1, mr3;
3352 int i;
3353
3354 if (priv->card_type == CARD_TYPE_SPI_FLASH)
3355 atmel_set_gcr(priv->dev, GCR_REMAP);
4d791aad 3356
1da177e4
LT		 3357 /* wake up on-board processor */
3358 atmel_clear_gcr(priv->dev, 0x0040);
3359 atmel_write16(priv->dev, BSR, BSS_SRAM);
4d791aad 3360
1da177e4
LT		 3361 if (priv->card_type == CARD_TYPE_SPI_FLASH)
3362 mdelay(100);
3363
3364 /* and wait for it */
4d791aad 3365 for (i = LOOP_RETRY_LIMIT; i; i--) {
1da177e4
LT		 3366 mr1 = atmel_read16(priv->dev, MR1);
3367 mr3 = atmel_read16(priv->dev, MR3);
4d791aad
CP		 3368
3369 if (mr3 & MAC_BOOT_COMPLETE)
1da177e4
LT		 3370 break;
3371 if (mr1 & MAC_BOOT_COMPLETE &&
3372 priv->bus_type == BUS_TYPE_PCCARD)
3373 break;
3374 }
3375
3376 if (i == 0) {
3377 printk(KERN_ALERT "%s: MAC failed to boot.\n", priv->dev->name);
3378 return 0;
3379 }
4d791aad 3380
1da177e4
LT		 3381 if ((priv->host_info_base = atmel_read16(priv->dev, MR2)) == 0xffff) {
3382 printk(KERN_ALERT "%s: card missing.\n", priv->dev->name);
3383 return 0;
3384 }
4d791aad
CP		 3385
3386 /* now check for completion of MAC initialization through
3387 the FunCtrl field of the IFACE, poll MR1 to detect completion of
3388 MAC initialization, check completion status, set interrupt mask,
3389 enables interrupts and calls Tx and Rx initialization functions */
3390
1da177e4 3391 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET), FUNC_CTRL_INIT_COMPLETE);
4d791aad
CP		 3392
3393 for (i = LOOP_RETRY_LIMIT; i; i--) {
1da177e4
LT		 3394 mr1 = atmel_read16(priv->dev, MR1);
3395 mr3 = atmel_read16(priv->dev, MR3);
4d791aad
CP		 3396
3397 if (mr3 & MAC_INIT_COMPLETE)
1da177e4
LT		 3398 break;
3399 if (mr1 & MAC_INIT_COMPLETE &&
3400 priv->bus_type == BUS_TYPE_PCCARD)
3401 break;
3402 }
4d791aad 3403
1da177e4 3404 if (i == 0) {
4d791aad
CP		 3405 printk(KERN_ALERT "%s: MAC failed to initialise.\n",
3406 priv->dev->name);
1da177e4
LT		 3407 return 0;
3408 }
4d791aad 3409
1da177e4
LT		 3410 /* Check for MAC_INIT_OK only on the register that the MAC_INIT_OK was set */
3411 if ((mr3 & MAC_INIT_COMPLETE) &&
3412 !(atmel_read16(priv->dev, MR3) & MAC_INIT_OK)) {
3413 printk(KERN_ALERT "%s: MAC failed MR3 self-test.\n", priv->dev->name);
3414 return 0;
3415 }
3416 if ((mr1 & MAC_INIT_COMPLETE) &&
3417 !(atmel_read16(priv->dev, MR1) & MAC_INIT_OK)) {
3418 printk(KERN_ALERT "%s: MAC failed MR1 self-test.\n", priv->dev->name);
3419 return 0;
3420 }
3421
4d791aad 3422 atmel_copy_to_host(priv->dev, (unsigned char *)iface,
1da177e4 3423 priv->host_info_base, sizeof(*iface));
4d791aad 3424
1da177e4
LT		 3425 iface->tx_buff_pos = le16_to_cpu(iface->tx_buff_pos);
3426 iface->tx_buff_size = le16_to_cpu(iface->tx_buff_size);
3427 iface->tx_desc_pos = le16_to_cpu(iface->tx_desc_pos);
3428 iface->tx_desc_count = le16_to_cpu(iface->tx_desc_count);
3429 iface->rx_buff_pos = le16_to_cpu(iface->rx_buff_pos);
3430 iface->rx_buff_size = le16_to_cpu(iface->rx_buff_size);
3431 iface->rx_desc_pos = le16_to_cpu(iface->rx_desc_pos);
3432 iface->rx_desc_count = le16_to_cpu(iface->rx_desc_count);
3433 iface->build_version = le16_to_cpu(iface->build_version);
3434 iface->command_pos = le16_to_cpu(iface->command_pos);
3435 iface->major_version = le16_to_cpu(iface->major_version);
3436 iface->minor_version = le16_to_cpu(iface->minor_version);
3437 iface->func_ctrl = le16_to_cpu(iface->func_ctrl);
3438 iface->mac_status = le16_to_cpu(iface->mac_status);
3439
3440 return 1;
3441}
3442
3443/* determine type of memory and MAC address */
3444static int probe_atmel_card(struct net_device *dev)
3445{
3446 int rc = 0;
3447 struct atmel_private *priv = netdev_priv(dev);
4d791aad 3448
1da177e4 3449 /* reset pccard */
4d791aad 3450 if (priv->bus_type == BUS_TYPE_PCCARD)
1da177e4 3451 atmel_write16(dev, GCR, 0x0060);
4d791aad 3452
1da177e4
LT		 3453 atmel_write16(dev, GCR, 0x0040);
3454 mdelay(500);
4d791aad 3455
1da177e4 3456 if (atmel_read16(dev, MR2) == 0) {
4d791aad 3457 /* No stored firmware so load a small stub which just
1da177e4
LT		 3458 tells us the MAC address */
3459 int i;
3460 priv->card_type = CARD_TYPE_EEPROM;
3461 atmel_write16(dev, BSR, BSS_IRAM);
3462 atmel_copy_to_card(dev, 0, mac_reader, sizeof(mac_reader));
3463 atmel_set_gcr(dev, GCR_REMAP);
3464 atmel_clear_gcr(priv->dev, 0x0040);
3465 atmel_write16(dev, BSR, BSS_SRAM);
4d791aad 3466 for (i = LOOP_RETRY_LIMIT; i; i--)
1da177e4
LT		 3467 if (atmel_read16(dev, MR3) & MAC_BOOT_COMPLETE)
3468 break;
3469 if (i == 0) {
3470 printk(KERN_ALERT "%s: MAC failed to boot MAC address reader.\n", dev->name);
3471 } else {
3472 atmel_copy_to_host(dev, dev->dev_addr, atmel_read16(dev, MR2), 6);
3473 /* got address, now squash it again until the network
3474 interface is opened */
4d791aad 3475 if (priv->bus_type == BUS_TYPE_PCCARD)
1da177e4
LT		 3476 atmel_write16(dev, GCR, 0x0060);
3477 atmel_write16(dev, GCR, 0x0040);
3478 rc = 1;
3479 }
3480 } else if (atmel_read16(dev, MR4) == 0) {
3481 /* Mac address easy in this case. */
3482 priv->card_type = CARD_TYPE_PARALLEL_FLASH;
4d791aad 3483 atmel_write16(dev, BSR, 1);
1da177e4
LT		 3484 atmel_copy_to_host(dev, dev->dev_addr, 0xc000, 6);
3485 atmel_write16(dev, BSR, 0x200);
3486 rc = 1;
3487 } else {
3488 /* Standard firmware in flash, boot it up and ask
3489 for the Mac Address */
3490 priv->card_type = CARD_TYPE_SPI_FLASH;
3491 if (atmel_wakeup_firmware(priv)) {
3492 atmel_get_mib(priv, Mac_Address_Mib_Type, 0, dev->dev_addr, 6);
4d791aad 3493
1da177e4
LT		 3494 /* got address, now squash it again until the network
3495 interface is opened */
4d791aad 3496 if (priv->bus_type == BUS_TYPE_PCCARD)
1da177e4
LT		 3497 atmel_write16(dev, GCR, 0x0060);
3498 atmel_write16(dev, GCR, 0x0040);
3499 rc = 1;
3500 }
3501 }
4d791aad 3502
1da177e4
LT		 3503 if (rc) {
3504 if (dev->dev_addr[0] == 0xFF) {
3505 u8 default_mac[] = {0x00,0x04, 0x25, 0x00, 0x00, 0x00};
3506 printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name);
3507 memcpy(dev->dev_addr, default_mac, 6);
3508 }
1da177e4 3509 }
4d791aad 3510
1da177e4
LT		 3511 return rc;
3512}
3513
1da177e4
LT		 3514/* Move the encyption information on the MIB structure.
3515 This routine is for the pre-WPA firmware: later firmware has
3516 a different format MIB and a different routine. */
4d791aad 3517static void build_wep_mib(struct atmel_private *priv)
1da177e4
LT		 3518{
3519 struct { /* NB this is matched to the hardware, don't change. */
4d791aad 3520 u8 wep_is_on;
1da177e4
LT		 3521 u8 default_key; /* 0..3 */
3522 u8 reserved;
3523 u8 exclude_unencrypted;
4d791aad 3524
1da177e4
LT		 3525 u32 WEPICV_error_count;
3526 u32 WEP_excluded_count;
4d791aad 3527
1da177e4 3528 u8 wep_keys[MAX_ENCRYPTION_KEYS][13];
4d791aad
CP		 3529 u8 encryption_level; /* 0, 1, 2 */
3530 u8 reserved2[3];
1da177e4
LT		 3531 } mib;
3532 int i;
3533
3534 mib.wep_is_on = priv->wep_is_on;
3535 if (priv->wep_is_on) {
3536 if (priv->wep_key_len[priv->default_key] > 5)
3537 mib.encryption_level = 2;
3538 else
4d791aad 3539 mib.encryption_level = 1;
1da177e4
LT		 3540 } else {
3541 mib.encryption_level = 0;
3542 }
3543
3544 mib.default_key = priv->default_key;
3545 mib.exclude_unencrypted = priv->exclude_unencrypted;
4d791aad
CP		 3546
3547 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++)
1da177e4 3548 memcpy(mib.wep_keys[i], priv->wep_keys[i], 13);
4d791aad 3549
1da177e4
LT		 3550 atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3551}
3552
3553static void build_wpa_mib(struct atmel_private *priv)
3554{
4d791aad 3555 /* This is for the later (WPA enabled) firmware. */
1da177e4
LT		 3556
3557 struct { /* NB this is matched to the hardware, don't change. */
3558 u8 cipher_default_key_value[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
3559 u8 receiver_address[6];
4d791aad 3560 u8 wep_is_on;
1da177e4
LT		 3561 u8 default_key; /* 0..3 */
3562 u8 group_key;
3563 u8 exclude_unencrypted;
3564 u8 encryption_type;
3565 u8 reserved;
4d791aad 3566
1da177e4
LT		 3567 u32 WEPICV_error_count;
3568 u32 WEP_excluded_count;
4d791aad 3569
1da177e4
LT		 3570 u8 key_RSC[4][8];
3571 } mib;
4d791aad 3572
1da177e4
LT		 3573 int i;
3574
3575 mib.wep_is_on = priv->wep_is_on;
3576 mib.exclude_unencrypted = priv->exclude_unencrypted;
3577 memcpy(mib.receiver_address, priv->CurrentBSSID, 6);
4d791aad 3578
1da177e4
LT		 3579 /* zero all the keys before adding in valid ones. */
3580 memset(mib.cipher_default_key_value, 0, sizeof(mib.cipher_default_key_value));
4d791aad 3581
1da177e4 3582 if (priv->wep_is_on) {
4d791aad
CP		 3583 /* There's a comment in the Atmel code to the effect that this
3584 is only valid when still using WEP, it may need to be set to
3585 something to use WPA */
1da177e4 3586 memset(mib.key_RSC, 0, sizeof(mib.key_RSC));
4d791aad 3587
1da177e4
LT		 3588 mib.default_key = mib.group_key = 255;
3589 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++) {
3590 if (priv->wep_key_len[i] > 0) {
3591 memcpy(mib.cipher_default_key_value[i], priv->wep_keys[i], MAX_ENCRYPTION_KEY_SIZE);
3592 if (i == priv->default_key) {
3593 mib.default_key = i;
3594 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 7;
4d791aad 3595 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->pairwise_cipher_suite;
1da177e4
LT		 3596 } else {
3597 mib.group_key = i;
3598 priv->group_cipher_suite = priv->pairwise_cipher_suite;
3599 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 1;
4d791aad 3600 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->group_cipher_suite;
1da177e4
LT		 3601 }
3602 }
3603 }
3604 if (mib.default_key == 255)
3605 mib.default_key = mib.group_key != 255 ? mib.group_key : 0;
3606 if (mib.group_key == 255)
3607 mib.group_key = mib.default_key;
4d791aad 3608
1da177e4 3609 }
4d791aad 3610
1da177e4
LT		 3611 atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3612}
4d791aad
CP		 3613
3614static int reset_atmel_card(struct net_device *dev)
1da177e4
LT		 3615{
3616 /* do everything necessary to wake up the hardware, including
3617 waiting for the lightning strike and throwing the knife switch....
3618
4d791aad 3619 set all the Mib values which matter in the card to match
1da177e4
LT		 3620 their settings in the atmel_private structure. Some of these
3621 can be altered on the fly, but many (WEP, infrastucture or ad-hoc)
3622 can only be changed by tearing down the world and coming back through
3623 here.
3624
4d791aad
CP		 3625 This routine is also responsible for initialising some
3626 hardware-specific fields in the atmel_private structure,
1da177e4
LT		 3627 including a copy of the firmware's hostinfo stucture
3628 which is the route into the rest of the firmare datastructures. */
3629
3630 struct atmel_private *priv = netdev_priv(dev);
3631 u8 configuration;
4d791aad 3632
1da177e4
LT		 3633 /* data to add to the firmware names, in priority order
3634 this implemenents firmware versioning */
4d791aad 3635
1da177e4
LT		 3636 static char *firmware_modifier[] = {
3637 "-wpa",
3638 "",
3639 NULL
3640 };
4d791aad 3641
1da177e4 3642 /* reset pccard */
4d791aad 3643 if (priv->bus_type == BUS_TYPE_PCCARD)
1da177e4 3644 atmel_write16(priv->dev, GCR, 0x0060);
4d791aad 3645
1da177e4
LT		 3646 /* stop card , disable interrupts */
3647 atmel_write16(priv->dev, GCR, 0x0040);
4d791aad 3648
1da177e4
LT		 3649 if (priv->card_type == CARD_TYPE_EEPROM) {
3650 /* copy in firmware if needed */
3651 const struct firmware *fw_entry = NULL;
3652 unsigned char *fw;
3653 int len = priv->firmware_length;
3654 if (!(fw = priv->firmware)) {
3655 if (priv->firmware_type == ATMEL_FW_TYPE_NONE) {
3656 if (strlen(priv->firmware_id) == 0) {
3657 printk(KERN_INFO
3658 "%s: card type is unknown: assuming at76c502 firmware is OK.\n",
3659 dev->name);
3660 printk(KERN_INFO
4d791aad 3661 "%s: if not, use the firmware= module parameter.\n",
1da177e4
LT		 3662 dev->name);
3663 strcpy(priv->firmware_id, "atmel_at76c502.bin");
3664 }
3665 if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) != 0) {
4d791aad
CP		 3666 printk(KERN_ALERT
3667 "%s: firmware %s is missing, cannot continue.\n",
1da177e4
LT		 3668 dev->name, priv->firmware_id);
3669 return 0;
3670 }
3671 } else {
3672 int fw_index = 0;
3673 int success = 0;
3674
3675 /* get firmware filename entry based on firmware type ID */
3676 while (fw_table[fw_index].fw_type != priv->firmware_type
3677 && fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE)
3678 fw_index++;
4d791aad 3679
1da177e4
LT		 3680 /* construct the actual firmware file name */
3681 if (fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE) {
3682 int i;
3683 for (i = 0; firmware_modifier[i]; i++) {
3684 snprintf(priv->firmware_id, 32, "%s%s.%s", fw_table[fw_index].fw_file,
3685 firmware_modifier[i], fw_table[fw_index].fw_file_ext);
3686 priv->firmware_id[31] = '\0';
3687 if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) == 0) {
3688 success = 1;
3689 break;
3690 }
3691 }
3692 }
3693 if (!success) {
4d791aad
CP		 3694 printk(KERN_ALERT
3695 "%s: firmware %s is missing, cannot start.\n",
1da177e4
LT		 3696 dev->name, priv->firmware_id);
3697 priv->firmware_id[0] = '\0';
4d791aad 3698 return 0;
1da177e4
LT		 3699 }
3700 }
4d791aad 3701
1da177e4
LT		 3702 fw = fw_entry->data;
3703 len = fw_entry->size;
3704 }
4d791aad 3705
1da177e4
LT		 3706 if (len <= 0x6000) {
3707 atmel_write16(priv->dev, BSR, BSS_IRAM);
3708 atmel_copy_to_card(priv->dev, 0, fw, len);
3709 atmel_set_gcr(priv->dev, GCR_REMAP);
3710 } else {
4d791aad 3711 /* Remap */
1da177e4
LT		 3712 atmel_set_gcr(priv->dev, GCR_REMAP);
3713 atmel_write16(priv->dev, BSR, BSS_IRAM);
3714 atmel_copy_to_card(priv->dev, 0, fw, 0x6000);
3715 atmel_write16(priv->dev, BSR, 0x2ff);
3716 atmel_copy_to_card(priv->dev, 0x8000, &fw[0x6000], len - 0x6000);
3717 }
3718
3719 if (fw_entry)
3720 release_firmware(fw_entry);
3721 }
3722
3723 if (!atmel_wakeup_firmware(priv))
3724 return 0;
3725
3726 /* Check the version and set the correct flag for wpa stuff,
3727 old and new firmware is incompatible.
3728 The pre-wpa 3com firmware reports major version 5,
3729 the wpa 3com firmware is major version 4 and doesn't need
3730 the 3com broken-ness filter. */
3731 priv->use_wpa = (priv->host_info.major_version == 4);
3732 priv->radio_on_broken = (priv->host_info.major_version == 5);
4d791aad 3733
1da177e4
LT		 3734 /* unmask all irq sources */
3735 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_MASK_OFFSET), 0xff);
4d791aad 3736
1da177e4
LT		 3737 /* int Tx system and enable Tx */
3738 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, 0), 0);
3739 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, 0), 0x80000000L);
3740 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, 0), 0);
3741 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, 0), 0);
3742
4d791aad
CP		 3743 priv->tx_desc_free = priv->host_info.tx_desc_count;
3744 priv->tx_desc_head = 0;
3745 priv->tx_desc_tail = 0;
1da177e4
LT		 3746 priv->tx_desc_previous = 0;
3747 priv->tx_free_mem = priv->host_info.tx_buff_size;
4d791aad
CP		 3748 priv->tx_buff_head = 0;
3749 priv->tx_buff_tail = 0;
3750
3751 configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3752 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
1da177e4
LT		 3753 configuration | FUNC_CTRL_TxENABLE);
3754
3755 /* init Rx system and enable */
3756 priv->rx_desc_head = 0;
4d791aad
CP		 3757
3758 configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3759 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
1da177e4 3760 configuration | FUNC_CTRL_RxENABLE);
4d791aad 3761
1da177e4 3762 if (!priv->radio_on_broken) {
4d791aad 3763 if (atmel_send_command_wait(priv, CMD_EnableRadio, NULL, 0) ==
1da177e4 3764 CMD_STATUS_REJECTED_RADIO_OFF) {
4d791aad 3765 printk(KERN_INFO
1da177e4
LT		 3766 "%s: cannot turn the radio on. (Hey radio, you're beautiful!)\n",
3767 dev->name);
3768 return 0;
3769 }
3770 }
4d791aad 3771
1da177e4
LT		 3772 /* set up enough MIB values to run. */
3773 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_AUTO_TX_RATE_POS, priv->auto_tx_rate);
3774 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_TX_PROMISCUOUS_POS, PROM_MODE_OFF);
3775 atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_RTS_THRESHOLD_POS, priv->rts_threshold);
3776 atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_FRAG_THRESHOLD_POS, priv->frag_threshold);
3777 atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_SHORT_RETRY_POS, priv->short_retry);
3778 atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_LONG_RETRY_POS, priv->long_retry);
3779 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, priv->preamble);
4d791aad 3780 atmel_set_mib(priv, Mac_Address_Mib_Type, MAC_ADDR_MIB_MAC_ADDR_POS,
1da177e4
LT		 3781 priv->dev->dev_addr, 6);
3782 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3783 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3784 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_BEACON_PER_POS, priv->default_beacon_period);
3785 atmel_set_mib(priv, Phy_Mib_Type, PHY_MIB_RATE_SET_POS, atmel_basic_rates, 4);
3786 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_PRIVACY_POS, priv->wep_is_on);
3787 if (priv->use_wpa)
3788 build_wpa_mib(priv);
3789 else
3790 build_wep_mib(priv);
4d791aad 3791
1da177e4
LT		 3792 return 1;
3793}
3794
4d791aad
CP		 3795static void atmel_send_command(struct atmel_private *priv, int command,
3796 void *cmd, int cmd_size)
1da177e4
LT		 3797{
3798 if (cmd)
4d791aad 3799 atmel_copy_to_card(priv->dev, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET),
1da177e4 3800 cmd, cmd_size);
4d791aad 3801
1da177e4
LT		 3802 atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET), command);
3803 atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET), 0);
3804}
4d791aad
CP		 3805
3806static int atmel_send_command_wait(struct atmel_private *priv, int command,
3807 void *cmd, int cmd_size)
1da177e4
LT		 3808{
3809 int i, status;
4d791aad 3810
1da177e4 3811 atmel_send_command(priv, command, cmd, cmd_size);
4d791aad 3812
1da177e4
LT		 3813 for (i = 5000; i; i--) {
3814 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
4d791aad 3815 if (status != CMD_STATUS_IDLE &&
1da177e4
LT		 3816 status != CMD_STATUS_IN_PROGRESS)
3817 break;
3818 udelay(20);
3819 }
4d791aad 3820
1da177e4
LT		 3821 if (i == 0) {
3822 printk(KERN_ALERT "%s: failed to contact MAC.\n", priv->dev->name);
3823 status = CMD_STATUS_HOST_ERROR;
4d791aad 3824 } else {
1da177e4
LT		 3825 if (command != CMD_EnableRadio)
3826 status = CMD_STATUS_COMPLETE;
3827 }
4d791aad 3828
1da177e4
LT		 3829 return status;
3830}
3831
3832static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index)
3833{
3834 struct get_set_mib m;
3835 m.type = type;
3836 m.size = 1;
3837 m.index = index;
3838
3839 atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
3840 return atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE));
3841}
3842
3843static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index, u8 data)
3844{
3845 struct get_set_mib m;
3846 m.type = type;
3847 m.size = 1;
3848 m.index = index;
3849 m.data[0] = data;
3850
3851 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
3852}
3853
4d791aad
CP		 3854static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
3855 u16 data)
1da177e4
LT		 3856{
3857 struct get_set_mib m;
3858 m.type = type;
3859 m.size = 2;
3860 m.index = index;
3861 m.data[0] = data;
3862 m.data[1] = data >> 8;
3863
3864 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 2);
3865}
3866
4d791aad
CP		 3867static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
3868 u8 *data, int data_len)
1da177e4
LT		 3869{
3870 struct get_set_mib m;
3871 m.type = type;
3872 m.size = data_len;
3873 m.index = index;
3874
3875 if (data_len > MIB_MAX_DATA_BYTES)
3876 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4d791aad 3877
1da177e4
LT		 3878 memcpy(m.data, data, data_len);
3879 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
3880}
3881
4d791aad
CP		 3882static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
3883 u8 *data, int data_len)
1da177e4
LT		 3884{
3885 struct get_set_mib m;
3886 m.type = type;
3887 m.size = data_len;
3888 m.index = index;
4d791aad 3889
1da177e4
LT		 3890 if (data_len > MIB_MAX_DATA_BYTES)
3891 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4d791aad 3892
1da177e4 3893 atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4d791aad 3894 atmel_copy_to_host(priv->dev, data,
1da177e4
LT		 3895 atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE), data_len);
3896}
3897
3898static void atmel_writeAR(struct net_device *dev, u16 data)
3899{
3900 int i;
3901 outw(data, dev->base_addr + AR);
3902 /* Address register appears to need some convincing..... */
4d791aad 3903 for (i = 0; data != inw(dev->base_addr + AR) && i < 10; i++)
1da177e4
LT		 3904 outw(data, dev->base_addr + AR);
3905}
3906
4d791aad
CP		 3907static void atmel_copy_to_card(struct net_device *dev, u16 dest,
3908 unsigned char *src, u16 len)
1da177e4
LT		 3909{
3910 int i;
3911 atmel_writeAR(dev, dest);
3912 if (dest % 2) {
3913 atmel_write8(dev, DR, *src);
3914 src++; len--;
3915 }
3916 for (i = len; i > 1 ; i -= 2) {
3917 u8 lb = *src++;
3918 u8 hb = *src++;
3919 atmel_write16(dev, DR, lb | (hb << 8));
3920 }
3921 if (i)
3922 atmel_write8(dev, DR, *src);
3923}
3924
4d791aad
CP		 3925static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
3926 u16 src, u16 len)
1da177e4
LT		 3927{
3928 int i;
3929 atmel_writeAR(dev, src);
3930 if (src % 2) {
3931 *dest = atmel_read8(dev, DR);
3932 dest++; len--;
3933 }
3934 for (i = len; i > 1 ; i -= 2) {
3935 u16 hw = atmel_read16(dev, DR);
3936 *dest++ = hw;
3937 *dest++ = hw >> 8;
3938 }
3939 if (i)
3940 *dest = atmel_read8(dev, DR);
3941}
3942
3943static void atmel_set_gcr(struct net_device *dev, u16 mask)
3944{
3945 outw(inw(dev->base_addr + GCR) | mask, dev->base_addr + GCR);
3946}
3947
3948static void atmel_clear_gcr(struct net_device *dev, u16 mask)
3949{
3950 outw(inw(dev->base_addr + GCR) & ~mask, dev->base_addr + GCR);
3951}
3952
3953static int atmel_lock_mac(struct atmel_private *priv)
3954{
3955 int i, j = 20;
3956 retry:
3957 for (i = 5000; i; i--) {
3958 if (!atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET)))
3959 break;
3960 udelay(20);
3961 }
4d791aad
CP		 3962
3963 if (!i)
3964 return 0; /* timed out */
3965
1da177e4
LT		 3966 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 1);
3967 if (atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET))) {
3968 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
4d791aad
CP		 3969 if (!j--)
3970 return 0; /* timed out */
1da177e4
LT		 3971 goto retry;
3972 }
4d791aad 3973
1da177e4
LT		 3974 return 1;
3975}
3976
3977static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data)
3978{
4d791aad 3979 atmel_writeAR(priv->dev, pos);
1da177e4
LT		 3980 atmel_write16(priv->dev, DR, data); /* card is little-endian */
3981 atmel_write16(priv->dev, DR, data >> 16);
3982}
3983
3984/***************************************************************************/
3985/* There follows the source form of the MAC address reading firmware */
3986/***************************************************************************/
3987#if 0
3988
3989/* Copyright 2003 Matthew T. Russotto */
3990/* But derived from the Atmel 76C502 firmware written by Atmel and */
3991/* included in "atmel wireless lan drivers" package */
3992/**
3993 This file is part of net.russotto.AtmelMACFW, hereto referred to
3994 as AtmelMACFW
3995
3996 AtmelMACFW is free software; you can redistribute it and/or modify
3997 it under the terms of the GNU General Public License version 2
3998 as published by the Free Software Foundation.
3999
4000 AtmelMACFW is distributed in the hope that it will be useful,
4001 but WITHOUT ANY WARRANTY; without even the implied warranty of
4002 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4003 GNU General Public License for more details.
4004
4005 You should have received a copy of the GNU General Public License
4006 along with AtmelMACFW; if not, write to the Free Software
4007 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
4008
4009****************************************************************************/
4010/* This firmware should work on the 76C502 RFMD, RFMD_D, and RFMD_E */
4011/* It will probably work on the 76C504 and 76C502 RFMD_3COM */
4012/* It only works on SPI EEPROM versions of the card. */
4013
4014/* This firmware initializes the SPI controller and clock, reads the MAC */
4015/* address from the EEPROM into SRAM, and puts the SRAM offset of the MAC */
4016/* address in MR2, and sets MR3 to 0x10 to indicate it is done */
4017/* It also puts a complete copy of the EEPROM in SRAM with the offset in */
4018/* MR4, for investigational purposes (maybe we can determine chip type */
4019/* from that?) */
4020
4021 .org 0
4022 .set MRBASE, 0x8000000
4023 .set CPSR_INITIAL, 0xD3 /* IRQ/FIQ disabled, ARM mode, Supervisor state */
4024 .set CPSR_USER, 0xD1 /* IRQ/FIQ disabled, ARM mode, USER state */
4025 .set SRAM_BASE, 0x02000000
4026 .set SP_BASE, 0x0F300000
4027 .set UNK_BASE, 0x0F000000 /* Some internal device, but which one? */
4028 .set SPI_CGEN_BASE, 0x0E000000 /* Some internal device, but which one? */
4029 .set UNK3_BASE, 0x02014000 /* Some internal device, but which one? */
4030 .set STACK_BASE, 0x5600
4031 .set SP_SR, 0x10
4032 .set SP_TDRE, 2 /* status register bit -- TDR empty */
4033 .set SP_RDRF, 1 /* status register bit -- RDR full */
4034 .set SP_SWRST, 0x80
4035 .set SP_SPIEN, 0x1
4036 .set SP_CR, 0 /* control register */
4037 .set SP_MR, 4 /* mode register */
4038 .set SP_RDR, 0x08 /* Read Data Register */
4039 .set SP_TDR, 0x0C /* Transmit Data Register */
4040 .set SP_CSR0, 0x30 /* chip select registers */
4041 .set SP_CSR1, 0x34
4042 .set SP_CSR2, 0x38
4043 .set SP_CSR3, 0x3C
4044 .set NVRAM_CMD_RDSR, 5 /* read status register */
4045 .set NVRAM_CMD_READ, 3 /* read data */
4046 .set NVRAM_SR_RDY, 1 /* RDY bit. This bit is inverted */
4047 .set SPI_8CLOCKS, 0xFF /* Writing this to the TDR doesn't do anything to the
4048 serial output, since SO is normally high. But it
4049 does cause 8 clock cycles and thus 8 bits to be
4050 clocked in to the chip. See Atmel's SPI
4d791aad 4051 controller (e.g. AT91M55800) timing and 4K
1da177e4 4052 SPI EEPROM manuals */
4d791aad 4053
1da177e4
LT		 4054 .set NVRAM_SCRATCH, 0x02000100 /* arbitrary area for scratchpad memory */
4055 .set NVRAM_IMAGE, 0x02000200
4056 .set NVRAM_LENGTH, 0x0200
4057 .set MAC_ADDRESS_MIB, SRAM_BASE
4058 .set MAC_ADDRESS_LENGTH, 6
4059 .set MAC_BOOT_FLAG, 0x10
4060 .set MR1, 0
4061 .set MR2, 4
4062 .set MR3, 8
4063 .set MR4, 0xC
4064RESET_VECTOR:
4065 b RESET_HANDLER
4d791aad 4066UNDEF_VECTOR:
1da177e4 4067 b HALT1
4d791aad 4068SWI_VECTOR:
1da177e4 4069 b HALT1
4d791aad 4070IABORT_VECTOR:
1da177e4 4071 b HALT1
4d791aad
CP		 4072DABORT_VECTOR:
4073RESERVED_VECTOR:
1da177e4 4074 b HALT1
4d791aad 4075IRQ_VECTOR:
1da177e4 4076 b HALT1
4d791aad 4077FIQ_VECTOR:
1da177e4
LT		 4078 b HALT1
4079HALT1: b HALT1
4080RESET_HANDLER:
4081 mov r0, #CPSR_INITIAL
4082 msr CPSR_c, r0 /* This is probably unnecessary */
4d791aad 4083
1da177e4
LT		 4084/* I'm guessing this is initializing clock generator electronics for SPI */
4085 ldr r0, =SPI_CGEN_BASE
4086 mov r1, #0
4087 mov r1, r1, lsl #3
4088 orr r1,r1, #0
4089 str r1, [r0]
4090 ldr r1, [r0, #28]
4091 bic r1, r1, #16
4092 str r1, [r0, #28]
4093 mov r1, #1
4094 str r1, [r0, #8]
4d791aad 4095
1da177e4
LT		 4096 ldr r0, =MRBASE
4097 mov r1, #0
4098 strh r1, [r0, #MR1]
4099 strh r1, [r0, #MR2]
4100 strh r1, [r0, #MR3]
4101 strh r1, [r0, #MR4]
4102
4103 mov sp, #STACK_BASE
4104 bl SP_INIT
4105 mov r0, #10
4106 bl DELAY9
4107 bl GET_MAC_ADDR
4108 bl GET_WHOLE_NVRAM
4109 ldr r0, =MRBASE
4110 ldr r1, =MAC_ADDRESS_MIB
4111 strh r1, [r0, #MR2]
4112 ldr r1, =NVRAM_IMAGE
4113 strh r1, [r0, #MR4]
4114 mov r1, #MAC_BOOT_FLAG
4115 strh r1, [r0, #MR3]
4116HALT2: b HALT2
4117.func Get_Whole_NVRAM, GET_WHOLE_NVRAM
4118GET_WHOLE_NVRAM:
4119 stmdb sp!, {lr}
4120 mov r2, #0 /* 0th bytes of NVRAM */
4121 mov r3, #NVRAM_LENGTH
4122 mov r1, #0 /* not used in routine */
4123 ldr r0, =NVRAM_IMAGE
4124 bl NVRAM_XFER
4125 ldmia sp!, {lr}
4126 bx lr
4127.endfunc
4d791aad 4128
1da177e4
LT		 4129.func Get_MAC_Addr, GET_MAC_ADDR
4130GET_MAC_ADDR:
4131 stmdb sp!, {lr}
4132 mov r2, #0x120 /* address of MAC Address within NVRAM */
4133 mov r3, #MAC_ADDRESS_LENGTH
4134 mov r1, #0 /* not used in routine */
4135 ldr r0, =MAC_ADDRESS_MIB
4136 bl NVRAM_XFER
4137 ldmia sp!, {lr}
4138 bx lr
4139.endfunc
4140.ltorg
4141.func Delay9, DELAY9
4142DELAY9:
4143 adds r0, r0, r0, LSL #3 /* r0 = r0 * 9 */
4d791aad 4144DELAYLOOP:
1da177e4
LT		 4145 beq DELAY9_done
4146 subs r0, r0, #1
4147 b DELAYLOOP
4d791aad 4148DELAY9_done:
1da177e4 4149 bx lr
4d791aad 4150.endfunc
1da177e4
LT		 4151
4152.func SP_Init, SP_INIT
4153SP_INIT:
4154 mov r1, #SP_SWRST
4155 ldr r0, =SP_BASE
4156 str r1, [r0, #SP_CR] /* reset the SPI */
4157 mov r1, #0
4158 str r1, [r0, #SP_CR] /* release SPI from reset state */
4159 mov r1, #SP_SPIEN
4160 str r1, [r0, #SP_MR] /* set the SPI to MASTER mode*/
4161 str r1, [r0, #SP_CR] /* enable the SPI */
4162
4163/* My guess would be this turns on the SPI clock */
4164 ldr r3, =SPI_CGEN_BASE
4165 ldr r1, [r3, #28]
4166 orr r1, r1, #0x2000
4167 str r1, [r3, #28]
4168
4169 ldr r1, =0x2000c01
4170 str r1, [r0, #SP_CSR0]
4171 ldr r1, =0x2000201
4172 str r1, [r0, #SP_CSR1]
4173 str r1, [r0, #SP_CSR2]
4174 str r1, [r0, #SP_CSR3]
4175 ldr r1, [r0, #SP_SR]
4176 ldr r0, [r0, #SP_RDR]
4177 bx lr
4178.endfunc
4d791aad 4179.func NVRAM_Init, NVRAM_INIT
1da177e4
LT		 4180NVRAM_INIT:
4181 ldr r1, =SP_BASE
4182 ldr r0, [r1, #SP_RDR]
4183 mov r0, #NVRAM_CMD_RDSR
4184 str r0, [r1, #SP_TDR]
4d791aad 4185SP_loop1:
1da177e4
LT		 4186 ldr r0, [r1, #SP_SR]
4187 tst r0, #SP_TDRE
4188 beq SP_loop1
4189
4190 mov r0, #SPI_8CLOCKS
4d791aad
CP		 4191 str r0, [r1, #SP_TDR]
4192SP_loop2:
1da177e4
LT		 4193 ldr r0, [r1, #SP_SR]
4194 tst r0, #SP_TDRE
4195 beq SP_loop2
4196
4197 ldr r0, [r1, #SP_RDR]
4d791aad 4198SP_loop3:
1da177e4
LT		 4199 ldr r0, [r1, #SP_SR]
4200 tst r0, #SP_RDRF
4201 beq SP_loop3
4202
4203 ldr r0, [r1, #SP_RDR]
4204 and r0, r0, #255
4205 bx lr
4206.endfunc
4d791aad 4207
1da177e4
LT		 4208.func NVRAM_Xfer, NVRAM_XFER
4209 /* r0 = dest address */
4210 /* r1 = not used */
4211 /* r2 = src address within NVRAM */
4212 /* r3 = length */
4213NVRAM_XFER:
4214 stmdb sp!, {r4, r5, lr}
4215 mov r5, r0 /* save r0 (dest address) */
4216 mov r4, r3 /* save r3 (length) */
4217 mov r0, r2, LSR #5 /* SPI memories put A8 in the command field */
4218 and r0, r0, #8
4d791aad 4219 add r0, r0, #NVRAM_CMD_READ
1da177e4
LT		 4220 ldr r1, =NVRAM_SCRATCH
4221 strb r0, [r1, #0] /* save command in NVRAM_SCRATCH[0] */
4222 strb r2, [r1, #1] /* save low byte of source address in NVRAM_SCRATCH[1] */
4d791aad 4223_local1:
1da177e4
LT		 4224 bl NVRAM_INIT
4225 tst r0, #NVRAM_SR_RDY
4226 bne _local1
4227 mov r0, #20
4228 bl DELAY9
4229 mov r2, r4 /* length */
4230 mov r1, r5 /* dest address */
4231 mov r0, #2 /* bytes to transfer in command */
4232 bl NVRAM_XFER2
4233 ldmia sp!, {r4, r5, lr}
4234 bx lr
4235.endfunc
4236
4237.func NVRAM_Xfer2, NVRAM_XFER2
4238NVRAM_XFER2:
4239 stmdb sp!, {r4, r5, r6, lr}
4240 ldr r4, =SP_BASE
4241 mov r3, #0
4242 cmp r0, #0
4243 bls _local2
4244 ldr r5, =NVRAM_SCRATCH
4d791aad 4245_local4:
1da177e4
LT		 4246 ldrb r6, [r5, r3]
4247 str r6, [r4, #SP_TDR]
4248_local3:
4249 ldr r6, [r4, #SP_SR]
4250 tst r6, #SP_TDRE
4251 beq _local3
4252 add r3, r3, #1
4253 cmp r3, r0 /* r0 is # of bytes to send out (command+addr) */
4254 blo _local4
4255_local2:
4256 mov r3, #SPI_8CLOCKS
4257 str r3, [r4, #SP_TDR]
4258 ldr r0, [r4, #SP_RDR]
4d791aad 4259_local5:
1da177e4
LT		 4260 ldr r0, [r4, #SP_SR]
4261 tst r0, #SP_RDRF
4262 beq _local5
4263 ldr r0, [r4, #SP_RDR] /* what's this byte? It's the byte read while writing the TDR -- nonsense, because the NVRAM doesn't read and write at the same time */
4264 mov r0, #0
4265 cmp r2, #0 /* r2 is # of bytes to copy in */
4266 bls _local6
4d791aad 4267_local7:
1da177e4
LT		 4268 ldr r5, [r4, #SP_SR]
4269 tst r5, #SP_TDRE
4270 beq _local7
4271 str r3, [r4, #SP_TDR] /* r3 has SPI_8CLOCKS */
4d791aad 4272_local8:
1da177e4
LT		 4273 ldr r5, [r4, #SP_SR]
4274 tst r5, #SP_RDRF
4275 beq _local8
4276 ldr r5, [r4, #SP_RDR] /* but didn't we read this byte above? */
4277 strb r5, [r1], #1 /* postindexed */
4278 add r0, r0, #1
4279 cmp r0, r2
4280 blo _local7 /* since we don't send another address, the NVRAM must be capable of sequential reads */
4281_local6:
4282 mov r0, #200
4283 bl DELAY9
4284 ldmia sp!, {r4, r5, r6, lr}
4285 bx lr
4286#endif
Linux kernel - Deliverables
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