Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /*** -*- linux-c -*- ********************************************************** |
2 | ||
3 | Driver for Atmel at76c502 at76c504 and at76c506 wireless cards. | |
4 | ||
5 | Copyright 2000-2001 ATMEL Corporation. | |
6 | Copyright 2003-2004 Simon Kelley. | |
7 | ||
8 | This code was developed from version 2.1.1 of the Atmel drivers, | |
9 | released by Atmel corp. under the GPL in December 2002. It also | |
10 | includes code from the Linux aironet drivers (C) Benjamin Reed, | |
11 | and the Linux PCMCIA package, (C) David Hinds and the Linux wireless | |
12 | extensions, (C) Jean Tourrilhes. | |
13 | ||
14 | The firmware module for reading the MAC address of the card comes from | |
15 | net.russotto.AtmelMACFW, written by Matthew T. Russotto and copyright | |
16 | by him. net.russotto.AtmelMACFW is used under the GPL license version 2. | |
17 | This file contains the module in binary form and, under the terms | |
18 | of the GPL, in source form. The source is located at the end of the file. | |
19 | ||
20 | This program is free software; you can redistribute it and/or modify | |
21 | it under the terms of the GNU General Public License as published by | |
22 | the Free Software Foundation; either version 2 of the License, or | |
23 | (at your option) any later version. | |
24 | ||
25 | This software is distributed in the hope that it will be useful, | |
26 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
27 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
28 | GNU General Public License for more details. | |
29 | ||
30 | You should have received a copy of the GNU General Public License | |
31 | along with Atmel wireless lan drivers; if not, write to the Free Software | |
32 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
33 | ||
34 | For all queries about this code, please contact the current author, | |
35 | Simon Kelley <simon@thekelleys.org.uk> and not Atmel Corporation. | |
36 | ||
37 | Credit is due to HP UK and Cambridge Online Systems Ltd for supplying | |
38 | hardware used during development of this driver. | |
39 | ||
40 | ******************************************************************************/ | |
41 | ||
42 | #include <linux/config.h> | |
43 | #include <linux/init.h> | |
44 | ||
45 | #include <linux/kernel.h> | |
46 | #include <linux/sched.h> | |
47 | #include <linux/ptrace.h> | |
48 | #include <linux/slab.h> | |
49 | #include <linux/string.h> | |
50 | #include <linux/ctype.h> | |
51 | #include <linux/timer.h> | |
52 | #include <asm/io.h> | |
53 | #include <asm/system.h> | |
54 | #include <asm/uaccess.h> | |
55 | #include <linux/module.h> | |
56 | #include <linux/netdevice.h> | |
57 | #include <linux/etherdevice.h> | |
58 | #include <linux/skbuff.h> | |
59 | #include <linux/if_arp.h> | |
60 | #include <linux/ioport.h> | |
61 | #include <linux/fcntl.h> | |
62 | #include <linux/delay.h> | |
63 | #include <linux/wireless.h> | |
64 | #include <net/iw_handler.h> | |
65 | #include <linux/byteorder/generic.h> | |
66 | #include <linux/crc32.h> | |
67 | #include <linux/proc_fs.h> | |
68 | #include <linux/device.h> | |
69 | #include <linux/moduleparam.h> | |
70 | #include <linux/firmware.h> | |
b453872c | 71 | #include <net/ieee80211.h> |
1da177e4 LT |
72 | #include "atmel.h" |
73 | ||
74 | #define DRIVER_MAJOR 0 | |
75 | #define DRIVER_MINOR 96 | |
76 | ||
77 | MODULE_AUTHOR("Simon Kelley"); | |
78 | MODULE_DESCRIPTION("Support for Atmel at76c50x 802.11 wireless ethernet cards."); | |
79 | MODULE_LICENSE("GPL"); | |
80 | MODULE_SUPPORTED_DEVICE("Atmel at76c50x wireless cards"); | |
81 | ||
82 | /* The name of the firmware file to be loaded | |
83 | over-rides any automatic selection */ | |
84 | static char *firmware = NULL; | |
85 | module_param(firmware, charp, 0); | |
86 | ||
87 | /* table of firmware file names */ | |
88 | static struct { | |
89 | AtmelFWType fw_type; | |
90 | const char *fw_file; | |
91 | const char *fw_file_ext; | |
92 | } fw_table[] = { | |
93 | { ATMEL_FW_TYPE_502, "atmel_at76c502", "bin" }, | |
94 | { ATMEL_FW_TYPE_502D, "atmel_at76c502d", "bin" }, | |
95 | { ATMEL_FW_TYPE_502E, "atmel_at76c502e", "bin" }, | |
96 | { ATMEL_FW_TYPE_502_3COM, "atmel_at76c502_3com", "bin" }, | |
97 | { ATMEL_FW_TYPE_504, "atmel_at76c504", "bin" }, | |
98 | { ATMEL_FW_TYPE_504_2958, "atmel_at76c504_2958", "bin" }, | |
99 | { ATMEL_FW_TYPE_504A_2958,"atmel_at76c504a_2958","bin" }, | |
100 | { ATMEL_FW_TYPE_506, "atmel_at76c506", "bin" }, | |
101 | { ATMEL_FW_TYPE_NONE, NULL, NULL } | |
102 | }; | |
103 | ||
104 | #define MAX_SSID_LENGTH 32 | |
105 | #define MGMT_JIFFIES (256 * HZ / 100) | |
106 | ||
107 | #define MAX_BSS_ENTRIES 64 | |
108 | ||
109 | /* registers */ | |
110 | #define GCR 0x00 // (SIR0) General Configuration Register | |
111 | #define BSR 0x02 // (SIR1) Bank Switching Select Register | |
112 | #define AR 0x04 | |
113 | #define DR 0x08 | |
114 | #define MR1 0x12 // Mirror Register 1 | |
115 | #define MR2 0x14 // Mirror Register 2 | |
116 | #define MR3 0x16 // Mirror Register 3 | |
117 | #define MR4 0x18 // Mirror Register 4 | |
118 | ||
119 | #define GPR1 0x0c | |
120 | #define GPR2 0x0e | |
121 | #define GPR3 0x10 | |
122 | // | |
123 | // Constants for the GCR register. | |
124 | // | |
125 | #define GCR_REMAP 0x0400 // Remap internal SRAM to 0 | |
126 | #define GCR_SWRES 0x0080 // BIU reset (ARM and PAI are NOT reset) | |
127 | #define GCR_CORES 0x0060 // Core Reset (ARM and PAI are reset) | |
128 | #define GCR_ENINT 0x0002 // Enable Interrupts | |
129 | #define GCR_ACKINT 0x0008 // Acknowledge Interrupts | |
130 | ||
131 | #define BSS_SRAM 0x0200 // AMBA module selection --> SRAM | |
132 | #define BSS_IRAM 0x0100 // AMBA module selection --> IRAM | |
133 | // | |
134 | // Constants for the MR registers. | |
135 | // | |
136 | #define MAC_INIT_COMPLETE 0x0001 // MAC init has been completed | |
137 | #define MAC_BOOT_COMPLETE 0x0010 // MAC boot has been completed | |
138 | #define MAC_INIT_OK 0x0002 // MAC boot has been completed | |
139 | ||
140 | #define C80211_SUBTYPE_MGMT_ASS_REQUEST 0x00 | |
141 | #define C80211_SUBTYPE_MGMT_ASS_RESPONSE 0x10 | |
142 | #define C80211_SUBTYPE_MGMT_REASS_REQUEST 0x20 | |
143 | #define C80211_SUBTYPE_MGMT_REASS_RESPONSE 0x30 | |
144 | #define C80211_SUBTYPE_MGMT_ProbeRequest 0x40 | |
145 | #define C80211_SUBTYPE_MGMT_ProbeResponse 0x50 | |
146 | #define C80211_SUBTYPE_MGMT_BEACON 0x80 | |
147 | #define C80211_SUBTYPE_MGMT_ATIM 0x90 | |
148 | #define C80211_SUBTYPE_MGMT_DISASSOSIATION 0xA0 | |
149 | #define C80211_SUBTYPE_MGMT_Authentication 0xB0 | |
150 | #define C80211_SUBTYPE_MGMT_Deauthentication 0xC0 | |
151 | ||
152 | #define C80211_MGMT_AAN_OPENSYSTEM 0x0000 | |
153 | #define C80211_MGMT_AAN_SHAREDKEY 0x0001 | |
154 | ||
155 | #define C80211_MGMT_CAPABILITY_ESS 0x0001 // see 802.11 p.58 | |
156 | #define C80211_MGMT_CAPABILITY_IBSS 0x0002 // - " - | |
157 | #define C80211_MGMT_CAPABILITY_CFPollable 0x0004 // - " - | |
158 | #define C80211_MGMT_CAPABILITY_CFPollRequest 0x0008 // - " - | |
159 | #define C80211_MGMT_CAPABILITY_Privacy 0x0010 // - " - | |
160 | ||
161 | #define C80211_MGMT_SC_Success 0 | |
162 | #define C80211_MGMT_SC_Unspecified 1 | |
163 | #define C80211_MGMT_SC_SupportCapabilities 10 | |
164 | #define C80211_MGMT_SC_ReassDenied 11 | |
165 | #define C80211_MGMT_SC_AssDenied 12 | |
166 | #define C80211_MGMT_SC_AuthAlgNotSupported 13 | |
167 | #define C80211_MGMT_SC_AuthTransSeqNumError 14 | |
168 | #define C80211_MGMT_SC_AuthRejectChallenge 15 | |
169 | #define C80211_MGMT_SC_AuthRejectTimeout 16 | |
170 | #define C80211_MGMT_SC_AssDeniedHandleAP 17 | |
171 | #define C80211_MGMT_SC_AssDeniedBSSRate 18 | |
172 | ||
173 | #define C80211_MGMT_ElementID_SSID 0 | |
174 | #define C80211_MGMT_ElementID_SupportedRates 1 | |
175 | #define C80211_MGMT_ElementID_ChallengeText 16 | |
176 | #define C80211_MGMT_CAPABILITY_ShortPreamble 0x0020 | |
177 | ||
178 | #define MIB_MAX_DATA_BYTES 212 | |
179 | #define MIB_HEADER_SIZE 4 /* first four fields */ | |
180 | ||
181 | struct get_set_mib { | |
182 | u8 type; | |
183 | u8 size; | |
184 | u8 index; | |
185 | u8 reserved; | |
186 | u8 data[MIB_MAX_DATA_BYTES]; | |
187 | }; | |
188 | ||
189 | struct rx_desc { | |
190 | u32 Next; | |
191 | u16 MsduPos; | |
192 | u16 MsduSize; | |
193 | ||
194 | u8 State; | |
195 | u8 Status; | |
196 | u8 Rate; | |
197 | u8 Rssi; | |
198 | u8 LinkQuality; | |
199 | u8 PreambleType; | |
200 | u16 Duration; | |
201 | u32 RxTime; | |
202 | ||
203 | }; | |
204 | ||
205 | #define RX_DESC_FLAG_VALID 0x80 | |
206 | #define RX_DESC_FLAG_CONSUMED 0x40 | |
207 | #define RX_DESC_FLAG_IDLE 0x00 | |
208 | ||
209 | #define RX_STATUS_SUCCESS 0x00 | |
210 | ||
211 | #define RX_DESC_MSDU_POS_OFFSET 4 | |
212 | #define RX_DESC_MSDU_SIZE_OFFSET 6 | |
213 | #define RX_DESC_FLAGS_OFFSET 8 | |
214 | #define RX_DESC_STATUS_OFFSET 9 | |
215 | #define RX_DESC_RSSI_OFFSET 11 | |
216 | #define RX_DESC_LINK_QUALITY_OFFSET 12 | |
217 | #define RX_DESC_PREAMBLE_TYPE_OFFSET 13 | |
218 | #define RX_DESC_DURATION_OFFSET 14 | |
219 | #define RX_DESC_RX_TIME_OFFSET 16 | |
220 | ||
221 | ||
222 | struct tx_desc { | |
223 | u32 NextDescriptor; | |
224 | u16 TxStartOfFrame; | |
225 | u16 TxLength; | |
226 | ||
227 | u8 TxState; | |
228 | u8 TxStatus; | |
229 | u8 RetryCount; | |
230 | ||
231 | u8 TxRate; | |
232 | ||
233 | u8 KeyIndex; | |
234 | u8 ChiperType; | |
235 | u8 ChipreLength; | |
236 | u8 Reserved1; | |
237 | ||
238 | u8 Reserved; | |
239 | u8 PacketType; | |
240 | u16 HostTxLength; | |
241 | ||
242 | }; | |
243 | ||
244 | ||
245 | #define TX_DESC_NEXT_OFFSET 0 | |
246 | #define TX_DESC_POS_OFFSET 4 | |
247 | #define TX_DESC_SIZE_OFFSET 6 | |
248 | #define TX_DESC_FLAGS_OFFSET 8 | |
249 | #define TX_DESC_STATUS_OFFSET 9 | |
250 | #define TX_DESC_RETRY_OFFSET 10 | |
251 | #define TX_DESC_RATE_OFFSET 11 | |
252 | #define TX_DESC_KEY_INDEX_OFFSET 12 | |
253 | #define TX_DESC_CIPHER_TYPE_OFFSET 13 | |
254 | #define TX_DESC_CIPHER_LENGTH_OFFSET 14 | |
255 | #define TX_DESC_PACKET_TYPE_OFFSET 17 | |
256 | #define TX_DESC_HOST_LENGTH_OFFSET 18 | |
257 | ||
258 | ||
259 | ||
260 | /////////////////////////////////////////////////////// | |
261 | // Host-MAC interface | |
262 | /////////////////////////////////////////////////////// | |
263 | ||
264 | #define TX_STATUS_SUCCESS 0x00 | |
265 | ||
266 | #define TX_FIRM_OWN 0x80 | |
267 | #define TX_DONE 0x40 | |
268 | ||
269 | ||
270 | #define TX_ERROR 0x01 | |
271 | ||
272 | #define TX_PACKET_TYPE_DATA 0x01 | |
273 | #define TX_PACKET_TYPE_MGMT 0x02 | |
274 | ||
275 | #define ISR_EMPTY 0x00 // no bits set in ISR | |
276 | #define ISR_TxCOMPLETE 0x01 // packet transmitted | |
277 | #define ISR_RxCOMPLETE 0x02 // packet received | |
278 | #define ISR_RxFRAMELOST 0x04 // Rx Frame lost | |
279 | #define ISR_FATAL_ERROR 0x08 // Fatal error | |
280 | #define ISR_COMMAND_COMPLETE 0x10 // command completed | |
281 | #define ISR_OUT_OF_RANGE 0x20 // command completed | |
282 | #define ISR_IBSS_MERGE 0x40 // (4.1.2.30): IBSS merge | |
283 | #define ISR_GENERIC_IRQ 0x80 | |
284 | ||
285 | ||
286 | #define Local_Mib_Type 0x01 | |
287 | #define Mac_Address_Mib_Type 0x02 | |
288 | #define Mac_Mib_Type 0x03 | |
289 | #define Statistics_Mib_Type 0x04 | |
290 | #define Mac_Mgmt_Mib_Type 0x05 | |
291 | #define Mac_Wep_Mib_Type 0x06 | |
292 | #define Phy_Mib_Type 0x07 | |
293 | #define Multi_Domain_MIB 0x08 | |
294 | ||
295 | #define MAC_MGMT_MIB_CUR_BSSID_POS 14 | |
296 | #define MAC_MIB_FRAG_THRESHOLD_POS 8 | |
297 | #define MAC_MIB_RTS_THRESHOLD_POS 10 | |
298 | #define MAC_MIB_SHORT_RETRY_POS 16 | |
299 | #define MAC_MIB_LONG_RETRY_POS 17 | |
300 | #define MAC_MIB_SHORT_RETRY_LIMIT_POS 16 | |
301 | #define MAC_MGMT_MIB_BEACON_PER_POS 0 | |
302 | #define MAC_MGMT_MIB_STATION_ID_POS 6 | |
303 | #define MAC_MGMT_MIB_CUR_PRIVACY_POS 11 | |
304 | #define MAC_MGMT_MIB_CUR_BSSID_POS 14 | |
305 | #define MAC_MGMT_MIB_PS_MODE_POS 53 | |
306 | #define MAC_MGMT_MIB_LISTEN_INTERVAL_POS 54 | |
307 | #define MAC_MGMT_MIB_MULTI_DOMAIN_IMPLEMENTED 56 | |
308 | #define MAC_MGMT_MIB_MULTI_DOMAIN_ENABLED 57 | |
309 | #define PHY_MIB_CHANNEL_POS 14 | |
310 | #define PHY_MIB_RATE_SET_POS 20 | |
311 | #define PHY_MIB_REG_DOMAIN_POS 26 | |
312 | #define LOCAL_MIB_AUTO_TX_RATE_POS 3 | |
313 | #define LOCAL_MIB_SSID_SIZE 5 | |
314 | #define LOCAL_MIB_TX_PROMISCUOUS_POS 6 | |
315 | #define LOCAL_MIB_TX_MGMT_RATE_POS 7 | |
316 | #define LOCAL_MIB_TX_CONTROL_RATE_POS 8 | |
317 | #define LOCAL_MIB_PREAMBLE_TYPE 9 | |
318 | #define MAC_ADDR_MIB_MAC_ADDR_POS 0 | |
319 | ||
320 | ||
321 | #define CMD_Set_MIB_Vars 0x01 | |
322 | #define CMD_Get_MIB_Vars 0x02 | |
323 | #define CMD_Scan 0x03 | |
324 | #define CMD_Join 0x04 | |
325 | #define CMD_Start 0x05 | |
326 | #define CMD_EnableRadio 0x06 | |
327 | #define CMD_DisableRadio 0x07 | |
328 | #define CMD_SiteSurvey 0x0B | |
329 | ||
330 | #define CMD_STATUS_IDLE 0x00 | |
331 | #define CMD_STATUS_COMPLETE 0x01 | |
332 | #define CMD_STATUS_UNKNOWN 0x02 | |
333 | #define CMD_STATUS_INVALID_PARAMETER 0x03 | |
334 | #define CMD_STATUS_FUNCTION_NOT_SUPPORTED 0x04 | |
335 | #define CMD_STATUS_TIME_OUT 0x07 | |
336 | #define CMD_STATUS_IN_PROGRESS 0x08 | |
337 | #define CMD_STATUS_REJECTED_RADIO_OFF 0x09 | |
338 | #define CMD_STATUS_HOST_ERROR 0xFF | |
339 | #define CMD_STATUS_BUSY 0xFE | |
340 | ||
341 | ||
342 | #define CMD_BLOCK_COMMAND_OFFSET 0 | |
343 | #define CMD_BLOCK_STATUS_OFFSET 1 | |
344 | #define CMD_BLOCK_PARAMETERS_OFFSET 4 | |
345 | ||
346 | #define SCAN_OPTIONS_SITE_SURVEY 0x80 | |
347 | ||
348 | #define MGMT_FRAME_BODY_OFFSET 24 | |
349 | #define MAX_AUTHENTICATION_RETRIES 3 | |
350 | #define MAX_ASSOCIATION_RETRIES 3 | |
351 | ||
352 | #define AUTHENTICATION_RESPONSE_TIME_OUT 1000 | |
353 | ||
354 | #define MAX_WIRELESS_BODY 2316 /* mtu is 2312, CRC is 4 */ | |
355 | #define LOOP_RETRY_LIMIT 500000 | |
356 | ||
357 | #define ACTIVE_MODE 1 | |
358 | #define PS_MODE 2 | |
359 | ||
360 | #define MAX_ENCRYPTION_KEYS 4 | |
361 | #define MAX_ENCRYPTION_KEY_SIZE 40 | |
362 | ||
363 | /////////////////////////////////////////////////////////////////////////// | |
364 | // 802.11 related definitions | |
365 | /////////////////////////////////////////////////////////////////////////// | |
366 | ||
367 | // | |
368 | // Regulatory Domains | |
369 | // | |
370 | ||
371 | #define REG_DOMAIN_FCC 0x10 //Channels 1-11 USA | |
372 | #define REG_DOMAIN_DOC 0x20 //Channel 1-11 Canada | |
373 | #define REG_DOMAIN_ETSI 0x30 //Channel 1-13 Europe (ex Spain/France) | |
374 | #define REG_DOMAIN_SPAIN 0x31 //Channel 10-11 Spain | |
375 | #define REG_DOMAIN_FRANCE 0x32 //Channel 10-13 France | |
376 | #define REG_DOMAIN_MKK 0x40 //Channel 14 Japan | |
377 | #define REG_DOMAIN_MKK1 0x41 //Channel 1-14 Japan(MKK1) | |
378 | #define REG_DOMAIN_ISRAEL 0x50 //Channel 3-9 ISRAEL | |
379 | ||
380 | #define BSS_TYPE_AD_HOC 1 | |
381 | #define BSS_TYPE_INFRASTRUCTURE 2 | |
382 | ||
383 | #define SCAN_TYPE_ACTIVE 0 | |
384 | #define SCAN_TYPE_PASSIVE 1 | |
385 | ||
386 | #define LONG_PREAMBLE 0 | |
387 | #define SHORT_PREAMBLE 1 | |
388 | #define AUTO_PREAMBLE 2 | |
389 | ||
390 | #define DATA_FRAME_WS_HEADER_SIZE 30 | |
391 | ||
392 | /* promiscuous mode control */ | |
393 | #define PROM_MODE_OFF 0x0 | |
394 | #define PROM_MODE_UNKNOWN 0x1 | |
395 | #define PROM_MODE_CRC_FAILED 0x2 | |
396 | #define PROM_MODE_DUPLICATED 0x4 | |
397 | #define PROM_MODE_MGMT 0x8 | |
398 | #define PROM_MODE_CTRL 0x10 | |
399 | #define PROM_MODE_BAD_PROTOCOL 0x20 | |
400 | ||
401 | ||
402 | #define IFACE_INT_STATUS_OFFSET 0 | |
403 | #define IFACE_INT_MASK_OFFSET 1 | |
404 | #define IFACE_LOCKOUT_HOST_OFFSET 2 | |
405 | #define IFACE_LOCKOUT_MAC_OFFSET 3 | |
406 | #define IFACE_FUNC_CTRL_OFFSET 28 | |
407 | #define IFACE_MAC_STAT_OFFSET 30 | |
408 | #define IFACE_GENERIC_INT_TYPE_OFFSET 32 | |
409 | ||
410 | #define CIPHER_SUITE_NONE 0 | |
411 | #define CIPHER_SUITE_WEP_64 1 | |
412 | #define CIPHER_SUITE_TKIP 2 | |
413 | #define CIPHER_SUITE_AES 3 | |
414 | #define CIPHER_SUITE_CCX 4 | |
415 | #define CIPHER_SUITE_WEP_128 5 | |
416 | ||
417 | // | |
418 | // IFACE MACROS & definitions | |
419 | // | |
420 | // | |
421 | ||
422 | // FuncCtrl field: | |
423 | // | |
424 | #define FUNC_CTRL_TxENABLE 0x10 | |
425 | #define FUNC_CTRL_RxENABLE 0x20 | |
426 | #define FUNC_CTRL_INIT_COMPLETE 0x01 | |
427 | ||
428 | /* A stub firmware image which reads the MAC address from NVRAM on the card. | |
429 | For copyright information and source see the end of this file. */ | |
430 | static u8 mac_reader[] = { | |
431 | 0x06,0x00,0x00,0xea,0x04,0x00,0x00,0xea,0x03,0x00,0x00,0xea,0x02,0x00,0x00,0xea, | |
432 | 0x01,0x00,0x00,0xea,0x00,0x00,0x00,0xea,0xff,0xff,0xff,0xea,0xfe,0xff,0xff,0xea, | |
433 | 0xd3,0x00,0xa0,0xe3,0x00,0xf0,0x21,0xe1,0x0e,0x04,0xa0,0xe3,0x00,0x10,0xa0,0xe3, | |
434 | 0x81,0x11,0xa0,0xe1,0x00,0x10,0x81,0xe3,0x00,0x10,0x80,0xe5,0x1c,0x10,0x90,0xe5, | |
435 | 0x10,0x10,0xc1,0xe3,0x1c,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,0x08,0x10,0x80,0xe5, | |
436 | 0x02,0x03,0xa0,0xe3,0x00,0x10,0xa0,0xe3,0xb0,0x10,0xc0,0xe1,0xb4,0x10,0xc0,0xe1, | |
437 | 0xb8,0x10,0xc0,0xe1,0xbc,0x10,0xc0,0xe1,0x56,0xdc,0xa0,0xe3,0x21,0x00,0x00,0xeb, | |
438 | 0x0a,0x00,0xa0,0xe3,0x1a,0x00,0x00,0xeb,0x10,0x00,0x00,0xeb,0x07,0x00,0x00,0xeb, | |
439 | 0x02,0x03,0xa0,0xe3,0x02,0x14,0xa0,0xe3,0xb4,0x10,0xc0,0xe1,0x4c,0x10,0x9f,0xe5, | |
440 | 0xbc,0x10,0xc0,0xe1,0x10,0x10,0xa0,0xe3,0xb8,0x10,0xc0,0xe1,0xfe,0xff,0xff,0xea, | |
441 | 0x00,0x40,0x2d,0xe9,0x00,0x20,0xa0,0xe3,0x02,0x3c,0xa0,0xe3,0x00,0x10,0xa0,0xe3, | |
442 | 0x28,0x00,0x9f,0xe5,0x37,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1, | |
443 | 0x00,0x40,0x2d,0xe9,0x12,0x2e,0xa0,0xe3,0x06,0x30,0xa0,0xe3,0x00,0x10,0xa0,0xe3, | |
444 | 0x02,0x04,0xa0,0xe3,0x2f,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1, | |
445 | 0x00,0x02,0x00,0x02,0x80,0x01,0x90,0xe0,0x01,0x00,0x00,0x0a,0x01,0x00,0x50,0xe2, | |
446 | 0xfc,0xff,0xff,0xea,0x1e,0xff,0x2f,0xe1,0x80,0x10,0xa0,0xe3,0xf3,0x06,0xa0,0xe3, | |
447 | 0x00,0x10,0x80,0xe5,0x00,0x10,0xa0,0xe3,0x00,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3, | |
448 | 0x04,0x10,0x80,0xe5,0x00,0x10,0x80,0xe5,0x0e,0x34,0xa0,0xe3,0x1c,0x10,0x93,0xe5, | |
449 | 0x02,0x1a,0x81,0xe3,0x1c,0x10,0x83,0xe5,0x58,0x11,0x9f,0xe5,0x30,0x10,0x80,0xe5, | |
450 | 0x54,0x11,0x9f,0xe5,0x34,0x10,0x80,0xe5,0x38,0x10,0x80,0xe5,0x3c,0x10,0x80,0xe5, | |
451 | 0x10,0x10,0x90,0xe5,0x08,0x00,0x90,0xe5,0x1e,0xff,0x2f,0xe1,0xf3,0x16,0xa0,0xe3, | |
452 | 0x08,0x00,0x91,0xe5,0x05,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,0x10,0x00,0x91,0xe5, | |
453 | 0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0xff,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5, | |
454 | 0x10,0x00,0x91,0xe5,0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5, | |
455 | 0x10,0x00,0x91,0xe5,0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5, | |
456 | 0xff,0x00,0x00,0xe2,0x1e,0xff,0x2f,0xe1,0x30,0x40,0x2d,0xe9,0x00,0x50,0xa0,0xe1, | |
457 | 0x03,0x40,0xa0,0xe1,0xa2,0x02,0xa0,0xe1,0x08,0x00,0x00,0xe2,0x03,0x00,0x80,0xe2, | |
458 | 0xd8,0x10,0x9f,0xe5,0x00,0x00,0xc1,0xe5,0x01,0x20,0xc1,0xe5,0xe2,0xff,0xff,0xeb, | |
459 | 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x1a,0x14,0x00,0xa0,0xe3,0xc4,0xff,0xff,0xeb, | |
460 | 0x04,0x20,0xa0,0xe1,0x05,0x10,0xa0,0xe1,0x02,0x00,0xa0,0xe3,0x01,0x00,0x00,0xeb, | |
461 | 0x30,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x70,0x40,0x2d,0xe9,0xf3,0x46,0xa0,0xe3, | |
462 | 0x00,0x30,0xa0,0xe3,0x00,0x00,0x50,0xe3,0x08,0x00,0x00,0x9a,0x8c,0x50,0x9f,0xe5, | |
463 | 0x03,0x60,0xd5,0xe7,0x0c,0x60,0x84,0xe5,0x10,0x60,0x94,0xe5,0x02,0x00,0x16,0xe3, | |
464 | 0xfc,0xff,0xff,0x0a,0x01,0x30,0x83,0xe2,0x00,0x00,0x53,0xe1,0xf7,0xff,0xff,0x3a, | |
465 | 0xff,0x30,0xa0,0xe3,0x0c,0x30,0x84,0xe5,0x08,0x00,0x94,0xe5,0x10,0x00,0x94,0xe5, | |
466 | 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x94,0xe5,0x00,0x00,0xa0,0xe3, | |
467 | 0x00,0x00,0x52,0xe3,0x0b,0x00,0x00,0x9a,0x10,0x50,0x94,0xe5,0x02,0x00,0x15,0xe3, | |
468 | 0xfc,0xff,0xff,0x0a,0x0c,0x30,0x84,0xe5,0x10,0x50,0x94,0xe5,0x01,0x00,0x15,0xe3, | |
469 | 0xfc,0xff,0xff,0x0a,0x08,0x50,0x94,0xe5,0x01,0x50,0xc1,0xe4,0x01,0x00,0x80,0xe2, | |
470 | 0x02,0x00,0x50,0xe1,0xf3,0xff,0xff,0x3a,0xc8,0x00,0xa0,0xe3,0x98,0xff,0xff,0xeb, | |
471 | 0x70,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x01,0x0c,0x00,0x02,0x01,0x02,0x00,0x02, | |
472 | 0x00,0x01,0x00,0x02 | |
473 | }; | |
474 | ||
475 | struct atmel_private { | |
476 | void *card; /* Bus dependent stucture varies for PCcard */ | |
477 | int (*present_callback)(void *); /* And callback which uses it */ | |
478 | char firmware_id[32]; | |
479 | AtmelFWType firmware_type; | |
480 | u8 *firmware; | |
481 | int firmware_length; | |
482 | struct timer_list management_timer; | |
483 | struct net_device *dev; | |
484 | struct device *sys_dev; | |
485 | struct iw_statistics wstats; | |
486 | struct net_device_stats stats; // device stats | |
487 | spinlock_t irqlock, timerlock; // spinlocks | |
488 | enum { BUS_TYPE_PCCARD, BUS_TYPE_PCI } bus_type; | |
489 | enum { | |
490 | CARD_TYPE_PARALLEL_FLASH, | |
491 | CARD_TYPE_SPI_FLASH, | |
492 | CARD_TYPE_EEPROM | |
493 | } card_type; | |
494 | int do_rx_crc; /* If we need to CRC incoming packets */ | |
495 | int probe_crc; /* set if we don't yet know */ | |
496 | int crc_ok_cnt, crc_ko_cnt; /* counters for probing */ | |
497 | u16 rx_desc_head; | |
498 | u16 tx_desc_free, tx_desc_head, tx_desc_tail, tx_desc_previous; | |
499 | u16 tx_free_mem, tx_buff_head, tx_buff_tail; | |
500 | ||
501 | u16 frag_seq, frag_len, frag_no; | |
502 | u8 frag_source[6]; | |
503 | ||
504 | u8 wep_is_on, default_key, exclude_unencrypted, encryption_level; | |
505 | u8 group_cipher_suite, pairwise_cipher_suite; | |
506 | u8 wep_keys[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE]; | |
507 | int wep_key_len[MAX_ENCRYPTION_KEYS]; | |
508 | int use_wpa, radio_on_broken; /* firmware dependent stuff. */ | |
509 | ||
510 | u16 host_info_base; | |
511 | struct host_info_struct { | |
512 | /* NB this is matched to the hardware, don't change. */ | |
513 | u8 volatile int_status; | |
514 | u8 volatile int_mask; | |
515 | u8 volatile lockout_host; | |
516 | u8 volatile lockout_mac; | |
517 | ||
518 | u16 tx_buff_pos; | |
519 | u16 tx_buff_size; | |
520 | u16 tx_desc_pos; | |
521 | u16 tx_desc_count; | |
522 | ||
523 | u16 rx_buff_pos; | |
524 | u16 rx_buff_size; | |
525 | u16 rx_desc_pos; | |
526 | u16 rx_desc_count; | |
527 | ||
528 | u16 build_version; | |
529 | u16 command_pos; | |
530 | ||
531 | u16 major_version; | |
532 | u16 minor_version; | |
533 | ||
534 | u16 func_ctrl; | |
535 | u16 mac_status; | |
536 | u16 generic_IRQ_type; | |
537 | u8 reserved[2]; | |
538 | } host_info; | |
539 | ||
540 | enum { | |
541 | STATION_STATE_SCANNING, | |
542 | STATION_STATE_JOINNING, | |
543 | STATION_STATE_AUTHENTICATING, | |
544 | STATION_STATE_ASSOCIATING, | |
545 | STATION_STATE_READY, | |
546 | STATION_STATE_REASSOCIATING, | |
547 | STATION_STATE_DOWN, | |
548 | STATION_STATE_MGMT_ERROR | |
549 | } station_state; | |
550 | ||
551 | int operating_mode, power_mode; | |
552 | time_t last_qual; | |
553 | int beacons_this_sec; | |
554 | int channel; | |
555 | int reg_domain, config_reg_domain; | |
556 | int tx_rate; | |
557 | int auto_tx_rate; | |
558 | int rts_threshold; | |
559 | int frag_threshold; | |
560 | int long_retry, short_retry; | |
561 | int preamble; | |
562 | int default_beacon_period, beacon_period, listen_interval; | |
563 | int CurrentAuthentTransactionSeqNum, ExpectedAuthentTransactionSeqNum; | |
564 | int AuthenticationRequestRetryCnt, AssociationRequestRetryCnt, ReAssociationRequestRetryCnt; | |
565 | enum { | |
566 | SITE_SURVEY_IDLE, | |
567 | SITE_SURVEY_IN_PROGRESS, | |
568 | SITE_SURVEY_COMPLETED | |
569 | } site_survey_state; | |
570 | time_t last_survey; | |
571 | ||
572 | int station_was_associated, station_is_associated; | |
573 | int fast_scan; | |
574 | ||
575 | struct bss_info { | |
576 | int channel; | |
577 | int SSIDsize; | |
578 | int RSSI; | |
579 | int UsingWEP; | |
580 | int preamble; | |
581 | int beacon_period; | |
582 | int BSStype; | |
583 | u8 BSSID[6]; | |
584 | u8 SSID[MAX_SSID_LENGTH]; | |
585 | } BSSinfo[MAX_BSS_ENTRIES]; | |
586 | int BSS_list_entries, current_BSS; | |
587 | int connect_to_any_BSS; | |
588 | int SSID_size, new_SSID_size; | |
589 | u8 CurrentBSSID[6], BSSID[6]; | |
590 | u8 SSID[MAX_SSID_LENGTH], new_SSID[MAX_SSID_LENGTH]; | |
591 | u64 last_beacon_timestamp; | |
592 | u8 rx_buf[MAX_WIRELESS_BODY]; | |
593 | ||
594 | }; | |
595 | ||
596 | static u8 atmel_basic_rates[4] = {0x82,0x84,0x0b,0x16}; | |
597 | ||
598 | static const struct { | |
599 | int reg_domain; | |
600 | int min, max; | |
601 | char *name; | |
602 | } channel_table[] = { { REG_DOMAIN_FCC, 1, 11, "USA" }, | |
603 | { REG_DOMAIN_DOC, 1, 11, "Canada" }, | |
604 | { REG_DOMAIN_ETSI, 1, 13, "Europe" }, | |
605 | { REG_DOMAIN_SPAIN, 10, 11, "Spain" }, | |
606 | { REG_DOMAIN_FRANCE, 10, 13, "France" }, | |
607 | { REG_DOMAIN_MKK, 14, 14, "MKK" }, | |
608 | { REG_DOMAIN_MKK1, 1, 14, "MKK1" }, | |
609 | { REG_DOMAIN_ISRAEL, 3, 9, "Israel"} }; | |
610 | ||
611 | static void build_wpa_mib(struct atmel_private *priv); | |
612 | static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | |
613 | static void atmel_copy_to_card(struct net_device *dev, u16 dest, unsigned char *src, u16 len); | |
614 | static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest, u16 src, u16 len); | |
615 | static void atmel_set_gcr(struct net_device *dev, u16 mask); | |
616 | static void atmel_clear_gcr(struct net_device *dev, u16 mask); | |
617 | static int atmel_lock_mac(struct atmel_private *priv); | |
618 | static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data); | |
619 | static void atmel_command_irq(struct atmel_private *priv); | |
620 | static int atmel_validate_channel(struct atmel_private *priv, int channel); | |
b453872c | 621 | static void atmel_management_frame(struct atmel_private *priv, struct ieee80211_hdr *header, |
1da177e4 LT |
622 | u16 frame_len, u8 rssi); |
623 | static void atmel_management_timer(u_long a); | |
624 | static void atmel_send_command(struct atmel_private *priv, int command, void *cmd, int cmd_size); | |
625 | static int atmel_send_command_wait(struct atmel_private *priv, int command, void *cmd, int cmd_size); | |
b453872c | 626 | static void atmel_transmit_management_frame(struct atmel_private *priv, struct ieee80211_hdr *header, |
1da177e4 LT |
627 | u8 *body, int body_len); |
628 | ||
629 | static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index); | |
630 | static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index, u8 data); | |
631 | static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index, u16 data); | |
632 | static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index, u8 *data, int data_len); | |
633 | static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index, u8 *data, int data_len); | |
634 | static void atmel_scan(struct atmel_private *priv, int specific_ssid); | |
635 | static void atmel_join_bss(struct atmel_private *priv, int bss_index); | |
636 | static void atmel_smooth_qual(struct atmel_private *priv); | |
637 | static void atmel_writeAR(struct net_device *dev, u16 data); | |
638 | static int probe_atmel_card(struct net_device *dev); | |
639 | static int reset_atmel_card(struct net_device *dev ); | |
640 | static void atmel_enter_state(struct atmel_private *priv, int new_state); | |
641 | int atmel_open (struct net_device *dev); | |
642 | ||
643 | static inline u16 atmel_hi(struct atmel_private *priv, u16 offset) | |
644 | { | |
645 | return priv->host_info_base + offset; | |
646 | } | |
647 | ||
648 | static inline u16 atmel_co(struct atmel_private *priv, u16 offset) | |
649 | { | |
650 | return priv->host_info.command_pos + offset; | |
651 | } | |
652 | ||
653 | static inline u16 atmel_rx(struct atmel_private *priv, u16 offset, u16 desc) | |
654 | { | |
655 | return priv->host_info.rx_desc_pos + (sizeof(struct rx_desc) * desc) + offset; | |
656 | } | |
657 | ||
658 | static inline u16 atmel_tx(struct atmel_private *priv, u16 offset, u16 desc) | |
659 | { | |
660 | return priv->host_info.tx_desc_pos + (sizeof(struct tx_desc) * desc) + offset; | |
661 | } | |
662 | ||
663 | static inline u8 atmel_read8(struct net_device *dev, u16 offset) | |
664 | { | |
665 | return inb(dev->base_addr + offset); | |
666 | } | |
667 | ||
668 | static inline void atmel_write8(struct net_device *dev, u16 offset, u8 data) | |
669 | { | |
670 | outb(data, dev->base_addr + offset); | |
671 | } | |
672 | ||
673 | static inline u16 atmel_read16(struct net_device *dev, u16 offset) | |
674 | { | |
675 | return inw(dev->base_addr + offset); | |
676 | } | |
677 | ||
678 | static inline void atmel_write16(struct net_device *dev, u16 offset, u16 data) | |
679 | { | |
680 | outw(data, dev->base_addr + offset); | |
681 | } | |
682 | ||
683 | static inline u8 atmel_rmem8(struct atmel_private *priv, u16 pos) | |
684 | { | |
685 | atmel_writeAR(priv->dev, pos); | |
686 | return atmel_read8(priv->dev, DR); | |
687 | } | |
688 | ||
689 | static inline void atmel_wmem8(struct atmel_private *priv, u16 pos, u16 data) | |
690 | { | |
691 | atmel_writeAR(priv->dev, pos); | |
692 | atmel_write8(priv->dev, DR, data); | |
693 | } | |
694 | ||
695 | static inline u16 atmel_rmem16(struct atmel_private *priv, u16 pos) | |
696 | { | |
697 | atmel_writeAR(priv->dev, pos); | |
698 | return atmel_read16(priv->dev, DR); | |
699 | } | |
700 | ||
701 | static inline void atmel_wmem16(struct atmel_private *priv, u16 pos, u16 data) | |
702 | { | |
703 | atmel_writeAR(priv->dev, pos); | |
704 | atmel_write16(priv->dev, DR, data); | |
705 | } | |
706 | ||
707 | static const struct iw_handler_def atmel_handler_def; | |
708 | ||
709 | static void tx_done_irq(struct atmel_private *priv) | |
710 | { | |
711 | int i; | |
712 | ||
713 | for (i = 0; | |
714 | atmel_rmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head)) == TX_DONE && | |
715 | i < priv->host_info.tx_desc_count; | |
716 | i++) { | |
717 | ||
718 | u8 status = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_STATUS_OFFSET, priv->tx_desc_head)); | |
719 | u16 msdu_size = atmel_rmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_head)); | |
720 | u8 type = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_head)); | |
721 | ||
722 | atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head), 0); | |
723 | ||
724 | priv->tx_free_mem += msdu_size; | |
725 | priv->tx_desc_free++; | |
726 | ||
727 | if (priv->tx_buff_head + msdu_size > (priv->host_info.tx_buff_pos + priv->host_info.tx_buff_size)) | |
728 | priv->tx_buff_head = 0; | |
729 | else | |
730 | priv->tx_buff_head += msdu_size; | |
731 | ||
732 | if (priv->tx_desc_head < (priv->host_info.tx_desc_count - 1)) | |
733 | priv->tx_desc_head++ ; | |
734 | else | |
735 | priv->tx_desc_head = 0; | |
736 | ||
737 | if (type == TX_PACKET_TYPE_DATA) { | |
738 | if (status == TX_STATUS_SUCCESS) | |
739 | priv->stats.tx_packets++; | |
740 | else | |
741 | priv->stats.tx_errors++; | |
742 | netif_wake_queue(priv->dev); | |
743 | } | |
744 | } | |
745 | } | |
746 | ||
747 | static u16 find_tx_buff(struct atmel_private *priv, u16 len) | |
748 | { | |
749 | u16 bottom_free = priv->host_info.tx_buff_size - priv->tx_buff_tail; | |
750 | ||
751 | if (priv->tx_desc_free == 3 || priv->tx_free_mem < len) | |
752 | return 0; | |
753 | ||
754 | if (bottom_free >= len) | |
755 | return priv->host_info.tx_buff_pos + priv->tx_buff_tail; | |
756 | ||
757 | if (priv->tx_free_mem - bottom_free >= len) { | |
758 | priv->tx_buff_tail = 0; | |
759 | return priv->host_info.tx_buff_pos; | |
760 | } | |
761 | ||
762 | return 0; | |
763 | } | |
764 | ||
765 | static void tx_update_descriptor(struct atmel_private *priv, int is_bcast, u16 len, u16 buff, u8 type) | |
766 | { | |
767 | atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, priv->tx_desc_tail), buff); | |
768 | atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_tail), len); | |
769 | if (!priv->use_wpa) | |
770 | atmel_wmem16(priv, atmel_tx(priv, TX_DESC_HOST_LENGTH_OFFSET, priv->tx_desc_tail), len); | |
771 | atmel_wmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_tail), type); | |
772 | atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RATE_OFFSET, priv->tx_desc_tail), priv->tx_rate); | |
773 | atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RETRY_OFFSET, priv->tx_desc_tail), 0); | |
774 | if (priv->use_wpa) { | |
775 | int cipher_type, cipher_length; | |
776 | if (is_bcast) { | |
777 | cipher_type = priv->group_cipher_suite; | |
778 | if (cipher_type == CIPHER_SUITE_WEP_64 || | |
779 | cipher_type == CIPHER_SUITE_WEP_128 ) | |
780 | cipher_length = 8; | |
781 | else if (cipher_type == CIPHER_SUITE_TKIP) | |
782 | cipher_length = 12; | |
783 | else if (priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_64 || | |
784 | priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_128) { | |
785 | cipher_type = priv->pairwise_cipher_suite; | |
786 | cipher_length = 8; | |
787 | } else { | |
788 | cipher_type = CIPHER_SUITE_NONE; | |
789 | cipher_length = 0; | |
790 | } | |
791 | } else { | |
792 | cipher_type = priv->pairwise_cipher_suite; | |
793 | if (cipher_type == CIPHER_SUITE_WEP_64 || | |
794 | cipher_type == CIPHER_SUITE_WEP_128 ) | |
795 | cipher_length = 8; | |
796 | else if (cipher_type == CIPHER_SUITE_TKIP) | |
797 | cipher_length = 12; | |
798 | else if (priv->group_cipher_suite == CIPHER_SUITE_WEP_64 || | |
799 | priv->group_cipher_suite == CIPHER_SUITE_WEP_128) { | |
800 | cipher_type = priv->group_cipher_suite; | |
801 | cipher_length = 8; | |
802 | } else { | |
803 | cipher_type = CIPHER_SUITE_NONE; | |
804 | cipher_length = 0; | |
805 | } | |
806 | } | |
807 | ||
808 | atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_TYPE_OFFSET, priv->tx_desc_tail), | |
809 | cipher_type); | |
810 | atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_LENGTH_OFFSET, priv->tx_desc_tail), | |
811 | cipher_length); | |
812 | } | |
813 | atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_tail), 0x80000000L); | |
814 | atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_tail), TX_FIRM_OWN); | |
815 | if (priv->tx_desc_previous != priv->tx_desc_tail) | |
816 | atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_previous), 0); | |
817 | priv->tx_desc_previous = priv->tx_desc_tail; | |
818 | if (priv->tx_desc_tail < (priv->host_info.tx_desc_count -1 )) | |
819 | priv->tx_desc_tail++; | |
820 | else | |
821 | priv->tx_desc_tail = 0; | |
822 | priv->tx_desc_free--; | |
823 | priv->tx_free_mem -= len; | |
824 | ||
825 | } | |
826 | ||
827 | static int start_tx (struct sk_buff *skb, struct net_device *dev) | |
828 | { | |
829 | struct atmel_private *priv = netdev_priv(dev); | |
b453872c | 830 | struct ieee80211_hdr header; |
1da177e4 LT |
831 | unsigned long flags; |
832 | u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN; | |
833 | u8 SNAP_RFC1024[6] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00}; | |
834 | ||
835 | if (priv->card && priv->present_callback && | |
836 | !(*priv->present_callback)(priv->card)) { | |
837 | priv->stats.tx_errors++; | |
838 | dev_kfree_skb(skb); | |
839 | return 0; | |
840 | } | |
841 | ||
842 | if (priv->station_state != STATION_STATE_READY) { | |
843 | priv->stats.tx_errors++; | |
844 | dev_kfree_skb(skb); | |
845 | return 0; | |
846 | } | |
847 | ||
848 | /* first ensure the timer func cannot run */ | |
849 | spin_lock_bh(&priv->timerlock); | |
850 | /* then stop the hardware ISR */ | |
851 | spin_lock_irqsave(&priv->irqlock, flags); | |
852 | /* nb doing the above in the opposite order will deadlock */ | |
853 | ||
854 | /* The Wireless Header is 30 bytes. In the Ethernet packet we "cut" the | |
855 | 12 first bytes (containing DA/SA) and put them in the appropriate fields of | |
856 | the Wireless Header. Thus the packet length is then the initial + 18 (+30-12) */ | |
857 | ||
858 | if (!(buff = find_tx_buff(priv, len + 18))) { | |
859 | priv->stats.tx_dropped++; | |
860 | spin_unlock_irqrestore(&priv->irqlock, flags); | |
861 | spin_unlock_bh(&priv->timerlock); | |
862 | netif_stop_queue(dev); | |
863 | return 1; | |
864 | } | |
865 | ||
b453872c | 866 | frame_ctl = IEEE80211_FTYPE_DATA; |
1da177e4 LT |
867 | header.duration_id = 0; |
868 | header.seq_ctl = 0; | |
869 | if (priv->wep_is_on) | |
f13baae4 | 870 | frame_ctl |= IEEE80211_FCTL_PROTECTED; |
1da177e4 LT |
871 | if (priv->operating_mode == IW_MODE_ADHOC) { |
872 | memcpy(&header.addr1, skb->data, 6); | |
873 | memcpy(&header.addr2, dev->dev_addr, 6); | |
874 | memcpy(&header.addr3, priv->BSSID, 6); | |
875 | } else { | |
b453872c | 876 | frame_ctl |= IEEE80211_FCTL_TODS; |
1da177e4 LT |
877 | memcpy(&header.addr1, priv->CurrentBSSID, 6); |
878 | memcpy(&header.addr2, dev->dev_addr, 6); | |
879 | memcpy(&header.addr3, skb->data, 6); | |
880 | } | |
881 | ||
882 | if (priv->use_wpa) | |
883 | memcpy(&header.addr4, SNAP_RFC1024, 6); | |
884 | ||
885 | header.frame_ctl = cpu_to_le16(frame_ctl); | |
886 | /* Copy the wireless header into the card */ | |
887 | atmel_copy_to_card(dev, buff, (unsigned char *)&header, DATA_FRAME_WS_HEADER_SIZE); | |
888 | /* Copy the packet sans its 802.3 header addresses which have been replaced */ | |
889 | atmel_copy_to_card(dev, buff + DATA_FRAME_WS_HEADER_SIZE, skb->data + 12, len - 12); | |
890 | priv->tx_buff_tail += len - 12 + DATA_FRAME_WS_HEADER_SIZE; | |
891 | ||
892 | /* low bit of first byte of destination tells us if broadcast */ | |
893 | tx_update_descriptor(priv, *(skb->data) & 0x01, len + 18, buff, TX_PACKET_TYPE_DATA); | |
894 | dev->trans_start = jiffies; | |
895 | priv->stats.tx_bytes += len; | |
896 | ||
897 | spin_unlock_irqrestore(&priv->irqlock, flags); | |
898 | spin_unlock_bh(&priv->timerlock); | |
899 | dev_kfree_skb(skb); | |
900 | ||
901 | return 0; | |
902 | } | |
903 | ||
904 | static void atmel_transmit_management_frame(struct atmel_private *priv, | |
b453872c | 905 | struct ieee80211_hdr *header, |
1da177e4 LT |
906 | u8 *body, int body_len) |
907 | { | |
908 | u16 buff; | |
909 | int len = MGMT_FRAME_BODY_OFFSET + body_len; | |
910 | ||
911 | if (!(buff = find_tx_buff(priv, len))) | |
912 | return; | |
913 | ||
914 | atmel_copy_to_card(priv->dev, buff, (u8 *)header, MGMT_FRAME_BODY_OFFSET); | |
915 | atmel_copy_to_card(priv->dev, buff + MGMT_FRAME_BODY_OFFSET, body, body_len); | |
916 | priv->tx_buff_tail += len; | |
917 | tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT); | |
918 | } | |
919 | ||
b453872c | 920 | static void fast_rx_path(struct atmel_private *priv, struct ieee80211_hdr *header, |
1da177e4 LT |
921 | u16 msdu_size, u16 rx_packet_loc, u32 crc) |
922 | { | |
923 | /* fast path: unfragmented packet copy directly into skbuf */ | |
924 | u8 mac4[6]; | |
925 | struct sk_buff *skb; | |
926 | unsigned char *skbp; | |
927 | ||
928 | /* get the final, mac 4 header field, this tells us encapsulation */ | |
929 | atmel_copy_to_host(priv->dev, mac4, rx_packet_loc + 24, 6); | |
930 | msdu_size -= 6; | |
931 | ||
932 | if (priv->do_rx_crc) { | |
933 | crc = crc32_le(crc, mac4, 6); | |
934 | msdu_size -= 4; | |
935 | } | |
936 | ||
937 | if (!(skb = dev_alloc_skb(msdu_size + 14))) { | |
938 | priv->stats.rx_dropped++; | |
939 | return; | |
940 | } | |
941 | ||
942 | skb_reserve(skb, 2); | |
943 | skbp = skb_put(skb, msdu_size + 12); | |
944 | atmel_copy_to_host(priv->dev, skbp + 12, rx_packet_loc + 30, msdu_size); | |
945 | ||
946 | if (priv->do_rx_crc) { | |
947 | u32 netcrc; | |
948 | crc = crc32_le(crc, skbp + 12, msdu_size); | |
949 | atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + 30 + msdu_size, 4); | |
950 | if ((crc ^ 0xffffffff) != netcrc) { | |
951 | priv->stats.rx_crc_errors++; | |
952 | dev_kfree_skb(skb); | |
953 | return; | |
954 | } | |
955 | } | |
956 | ||
957 | memcpy(skbp, header->addr1, 6); /* destination address */ | |
b453872c | 958 | if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS) |
1da177e4 LT |
959 | memcpy(&skbp[6], header->addr3, 6); |
960 | else | |
961 | memcpy(&skbp[6], header->addr2, 6); /* source address */ | |
962 | ||
963 | priv->dev->last_rx=jiffies; | |
964 | skb->dev = priv->dev; | |
965 | skb->protocol = eth_type_trans(skb, priv->dev); | |
966 | skb->ip_summed = CHECKSUM_NONE; | |
967 | netif_rx(skb); | |
968 | priv->stats.rx_bytes += 12 + msdu_size; | |
969 | priv->stats.rx_packets++; | |
970 | } | |
971 | ||
972 | /* Test to see if the packet in card memory at packet_loc has a valid CRC | |
973 | It doesn't matter that this is slow: it is only used to proble the first few packets. */ | |
974 | static int probe_crc(struct atmel_private *priv, u16 packet_loc, u16 msdu_size) | |
975 | { | |
976 | int i = msdu_size - 4; | |
977 | u32 netcrc, crc = 0xffffffff; | |
978 | ||
979 | if (msdu_size < 4) | |
980 | return 0; | |
981 | ||
982 | atmel_copy_to_host(priv->dev, (void *)&netcrc, packet_loc + i, 4); | |
983 | ||
984 | atmel_writeAR(priv->dev, packet_loc); | |
985 | while (i--) { | |
986 | u8 octet = atmel_read8(priv->dev, DR); | |
987 | crc = crc32_le(crc, &octet, 1); | |
988 | } | |
989 | ||
990 | return (crc ^ 0xffffffff) == netcrc; | |
991 | } | |
992 | ||
b453872c | 993 | static void frag_rx_path(struct atmel_private *priv, struct ieee80211_hdr *header, |
1da177e4 LT |
994 | u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no, u8 frag_no, int more_frags) |
995 | { | |
996 | u8 mac4[6]; | |
997 | u8 source[6]; | |
998 | struct sk_buff *skb; | |
999 | ||
b453872c | 1000 | if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS) |
1da177e4 LT |
1001 | memcpy(source, header->addr3, 6); |
1002 | else | |
1003 | memcpy(source, header->addr2, 6); | |
1004 | ||
1005 | rx_packet_loc += 24; /* skip header */ | |
1006 | ||
1007 | if (priv->do_rx_crc) | |
1008 | msdu_size -= 4; | |
1009 | ||
1010 | if (frag_no == 0) { /* first fragment */ | |
1011 | atmel_copy_to_host(priv->dev, mac4, rx_packet_loc, 6); | |
1012 | msdu_size -= 6; | |
1013 | rx_packet_loc += 6; | |
1014 | ||
1015 | if (priv->do_rx_crc) | |
1016 | crc = crc32_le(crc, mac4, 6); | |
1017 | ||
1018 | priv->frag_seq = seq_no; | |
1019 | priv->frag_no = 1; | |
1020 | priv->frag_len = msdu_size; | |
1021 | memcpy(priv->frag_source, source, 6); | |
1022 | memcpy(&priv->rx_buf[6], source, 6); | |
1023 | memcpy(priv->rx_buf, header->addr1, 6); | |
1024 | ||
1025 | atmel_copy_to_host(priv->dev, &priv->rx_buf[12], rx_packet_loc, msdu_size); | |
1026 | ||
1027 | if (priv->do_rx_crc) { | |
1028 | u32 netcrc; | |
1029 | crc = crc32_le(crc, &priv->rx_buf[12], msdu_size); | |
1030 | atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4); | |
1031 | if ((crc ^ 0xffffffff) != netcrc) { | |
1032 | priv->stats.rx_crc_errors++; | |
1033 | memset(priv->frag_source, 0xff, 6); | |
1034 | } | |
1035 | } | |
1036 | ||
1037 | } else if (priv->frag_no == frag_no && | |
1038 | priv->frag_seq == seq_no && | |
1039 | memcmp(priv->frag_source, source, 6) == 0) { | |
1040 | ||
1041 | atmel_copy_to_host(priv->dev, &priv->rx_buf[12 + priv->frag_len], | |
1042 | rx_packet_loc, msdu_size); | |
1043 | if (priv->do_rx_crc) { | |
1044 | u32 netcrc; | |
1045 | crc = crc32_le(crc, | |
1046 | &priv->rx_buf[12 + priv->frag_len], | |
1047 | msdu_size); | |
1048 | atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4); | |
1049 | if ((crc ^ 0xffffffff) != netcrc) { | |
1050 | priv->stats.rx_crc_errors++; | |
1051 | memset(priv->frag_source, 0xff, 6); | |
1052 | more_frags = 1; /* don't send broken assembly */ | |
1053 | } | |
1054 | } | |
1055 | ||
1056 | priv->frag_len += msdu_size; | |
1057 | priv->frag_no++; | |
1058 | ||
1059 | if (!more_frags) { /* last one */ | |
1060 | memset(priv->frag_source, 0xff, 6); | |
1061 | if (!(skb = dev_alloc_skb(priv->frag_len + 14))) { | |
1062 | priv->stats.rx_dropped++; | |
1063 | } else { | |
1064 | skb_reserve(skb, 2); | |
1065 | memcpy(skb_put(skb, priv->frag_len + 12), | |
1066 | priv->rx_buf, | |
1067 | priv->frag_len + 12); | |
1068 | priv->dev->last_rx = jiffies; | |
1069 | skb->dev = priv->dev; | |
1070 | skb->protocol = eth_type_trans(skb, priv->dev); | |
1071 | skb->ip_summed = CHECKSUM_NONE; | |
1072 | netif_rx(skb); | |
1073 | priv->stats.rx_bytes += priv->frag_len + 12; | |
1074 | priv->stats.rx_packets++; | |
1075 | } | |
1076 | } | |
1077 | ||
1078 | } else | |
1079 | priv->wstats.discard.fragment++; | |
1080 | } | |
1081 | ||
1082 | static void rx_done_irq(struct atmel_private *priv) | |
1083 | { | |
1084 | int i; | |
b453872c | 1085 | struct ieee80211_hdr header; |
1da177e4 LT |
1086 | |
1087 | for (i = 0; | |
1088 | atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID && | |
1089 | i < priv->host_info.rx_desc_count; | |
1090 | i++) { | |
1091 | ||
1092 | u16 msdu_size, rx_packet_loc, frame_ctl, seq_control; | |
1093 | u8 status = atmel_rmem8(priv, atmel_rx(priv, RX_DESC_STATUS_OFFSET, priv->rx_desc_head)); | |
1094 | u32 crc = 0xffffffff; | |
1095 | ||
1096 | if (status != RX_STATUS_SUCCESS) { | |
1097 | if (status == 0xc1) /* determined by experiment */ | |
1098 | priv->wstats.discard.nwid++; | |
1099 | else | |
1100 | priv->stats.rx_errors++; | |
1101 | goto next; | |
1102 | } | |
1103 | ||
1104 | msdu_size = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_SIZE_OFFSET, priv->rx_desc_head)); | |
1105 | rx_packet_loc = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_POS_OFFSET, priv->rx_desc_head)); | |
1106 | ||
1107 | if (msdu_size < 30) { | |
1108 | priv->stats.rx_errors++; | |
1109 | goto next; | |
1110 | } | |
1111 | ||
1112 | /* Get header as far as end of seq_ctl */ | |
1113 | atmel_copy_to_host(priv->dev, (char *)&header, rx_packet_loc, 24); | |
1114 | frame_ctl = le16_to_cpu(header.frame_ctl); | |
1115 | seq_control = le16_to_cpu(header.seq_ctl); | |
1116 | ||
1117 | /* probe for CRC use here if needed once five packets have arrived with | |
1118 | the same crc status, we assume we know what's happening and stop probing */ | |
1119 | if (priv->probe_crc) { | |
f13baae4 | 1120 | if (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED)) { |
1da177e4 LT |
1121 | priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size); |
1122 | } else { | |
1123 | priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24); | |
1124 | } | |
1125 | if (priv->do_rx_crc) { | |
1126 | if (priv->crc_ok_cnt++ > 5) | |
1127 | priv->probe_crc = 0; | |
1128 | } else { | |
1129 | if (priv->crc_ko_cnt++ > 5) | |
1130 | priv->probe_crc = 0; | |
1131 | } | |
1132 | } | |
1133 | ||
1134 | /* don't CRC header when WEP in use */ | |
f13baae4 | 1135 | if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED))) { |
1da177e4 LT |
1136 | crc = crc32_le(0xffffffff, (unsigned char *)&header, 24); |
1137 | } | |
1138 | msdu_size -= 24; /* header */ | |
1139 | ||
b453872c | 1140 | if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) { |
1da177e4 | 1141 | |
b453872c JG |
1142 | int more_fragments = frame_ctl & IEEE80211_FCTL_MOREFRAGS; |
1143 | u8 packet_fragment_no = seq_control & IEEE80211_SCTL_FRAG; | |
1144 | u16 packet_sequence_no = (seq_control & IEEE80211_SCTL_SEQ) >> 4; | |
1da177e4 LT |
1145 | |
1146 | if (!more_fragments && packet_fragment_no == 0 ) { | |
1147 | fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc); | |
1148 | } else { | |
1149 | frag_rx_path(priv, &header, msdu_size, rx_packet_loc, crc, | |
1150 | packet_sequence_no, packet_fragment_no, more_fragments); | |
1151 | } | |
1152 | } | |
1153 | ||
b453872c | 1154 | if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) { |
1da177e4 LT |
1155 | /* copy rest of packet into buffer */ |
1156 | atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size); | |
1157 | ||
1158 | /* we use the same buffer for frag reassembly and control packets */ | |
1159 | memset(priv->frag_source, 0xff, 6); | |
1160 | ||
1161 | if (priv->do_rx_crc) { | |
1162 | /* last 4 octets is crc */ | |
1163 | msdu_size -= 4; | |
1164 | crc = crc32_le(crc, (unsigned char *)&priv->rx_buf, msdu_size); | |
1165 | if ((crc ^ 0xffffffff) != (*((u32 *)&priv->rx_buf[msdu_size]))) { | |
1166 | priv->stats.rx_crc_errors++; | |
1167 | goto next; | |
1168 | } | |
1169 | } | |
1170 | ||
1171 | atmel_management_frame(priv, &header, msdu_size, | |
1172 | atmel_rmem8(priv, atmel_rx(priv, RX_DESC_RSSI_OFFSET, priv->rx_desc_head))); | |
1173 | } | |
1174 | ||
1175 | next: | |
1176 | /* release descriptor */ | |
1177 | atmel_wmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head), RX_DESC_FLAG_CONSUMED); | |
1178 | ||
1179 | if (priv->rx_desc_head < (priv->host_info.rx_desc_count - 1)) | |
1180 | priv->rx_desc_head++; | |
1181 | else | |
1182 | priv->rx_desc_head = 0; | |
1183 | } | |
1184 | } | |
1185 | ||
1186 | static irqreturn_t service_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
1187 | { | |
1188 | struct net_device *dev = (struct net_device *) dev_id; | |
1189 | struct atmel_private *priv = netdev_priv(dev); | |
1190 | u8 isr; | |
1191 | int i = -1; | |
1192 | static u8 irq_order[] = { | |
1193 | ISR_OUT_OF_RANGE, | |
1194 | ISR_RxCOMPLETE, | |
1195 | ISR_TxCOMPLETE, | |
1196 | ISR_RxFRAMELOST, | |
1197 | ISR_FATAL_ERROR, | |
1198 | ISR_COMMAND_COMPLETE, | |
1199 | ISR_IBSS_MERGE, | |
1200 | ISR_GENERIC_IRQ | |
1201 | }; | |
1202 | ||
1203 | ||
1204 | if (priv->card && priv->present_callback && | |
1205 | !(*priv->present_callback)(priv->card)) | |
1206 | return IRQ_HANDLED; | |
1207 | ||
1208 | /* In this state upper-level code assumes it can mess with | |
1209 | the card unhampered by interrupts which may change register state. | |
1210 | Note that even though the card shouldn't generate interrupts | |
1211 | the inturrupt line may be shared. This allows card setup | |
1212 | to go on without disabling interrupts for a long time. */ | |
1213 | if (priv->station_state == STATION_STATE_DOWN) | |
1214 | return IRQ_NONE; | |
1215 | ||
1216 | atmel_clear_gcr(dev, GCR_ENINT); /* disable interrupts */ | |
1217 | ||
1218 | while (1) { | |
1219 | if (!atmel_lock_mac(priv)) { | |
1220 | /* failed to contact card */ | |
1221 | printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name); | |
1222 | return IRQ_HANDLED; | |
1223 | } | |
1224 | ||
1225 | isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET)); | |
1226 | atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0); | |
1227 | ||
1228 | if (!isr) { | |
1229 | atmel_set_gcr(dev, GCR_ENINT); /* enable interrupts */ | |
1230 | return i == -1 ? IRQ_NONE : IRQ_HANDLED; | |
1231 | } | |
1232 | ||
1233 | atmel_set_gcr(dev, GCR_ACKINT); /* acknowledge interrupt */ | |
1234 | ||
1235 | for (i = 0; i < sizeof(irq_order)/sizeof(u8); i++) | |
1236 | if (isr & irq_order[i]) | |
1237 | break; | |
1238 | ||
1239 | if (!atmel_lock_mac(priv)) { | |
1240 | /* failed to contact card */ | |
1241 | printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name); | |
1242 | return IRQ_HANDLED; | |
1243 | } | |
1244 | ||
1245 | isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET)); | |
1246 | isr ^= irq_order[i]; | |
1247 | atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET), isr); | |
1248 | atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0); | |
1249 | ||
1250 | switch (irq_order[i]) { | |
1251 | ||
1252 | case ISR_OUT_OF_RANGE: | |
1253 | if (priv->operating_mode == IW_MODE_INFRA && | |
1254 | priv->station_state == STATION_STATE_READY) { | |
1255 | priv->station_is_associated = 0; | |
1256 | atmel_scan(priv, 1); | |
1257 | } | |
1258 | break; | |
1259 | ||
1260 | case ISR_RxFRAMELOST: | |
1261 | priv->wstats.discard.misc++; | |
1262 | /* fall through */ | |
1263 | case ISR_RxCOMPLETE: | |
1264 | rx_done_irq(priv); | |
1265 | break; | |
1266 | ||
1267 | case ISR_TxCOMPLETE: | |
1268 | tx_done_irq(priv); | |
1269 | break; | |
1270 | ||
1271 | case ISR_FATAL_ERROR: | |
1272 | printk(KERN_ALERT "%s: *** FATAL error interrupt ***\n", dev->name); | |
1273 | atmel_enter_state(priv, STATION_STATE_MGMT_ERROR); | |
1274 | break; | |
1275 | ||
1276 | case ISR_COMMAND_COMPLETE: | |
1277 | atmel_command_irq(priv); | |
1278 | break; | |
1279 | ||
1280 | case ISR_IBSS_MERGE: | |
1281 | atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS, | |
1282 | priv->CurrentBSSID, 6); | |
1283 | /* The WPA stuff cares about the current AP address */ | |
1284 | if (priv->use_wpa) | |
1285 | build_wpa_mib(priv); | |
1286 | break; | |
1287 | case ISR_GENERIC_IRQ: | |
1288 | printk(KERN_INFO "%s: Generic_irq received.\n", dev->name); | |
1289 | break; | |
1290 | } | |
1291 | } | |
1292 | } | |
1293 | ||
1294 | ||
1295 | static struct net_device_stats *atmel_get_stats (struct net_device *dev) | |
1296 | { | |
1297 | struct atmel_private *priv = netdev_priv(dev); | |
1298 | return &priv->stats; | |
1299 | } | |
1300 | ||
1301 | static struct iw_statistics *atmel_get_wireless_stats (struct net_device *dev) | |
1302 | { | |
1303 | struct atmel_private *priv = netdev_priv(dev); | |
1304 | ||
1305 | /* update the link quality here in case we are seeing no beacons | |
1306 | at all to drive the process */ | |
1307 | atmel_smooth_qual(priv); | |
1308 | ||
1309 | priv->wstats.status = priv->station_state; | |
1310 | ||
1311 | if (priv->operating_mode == IW_MODE_INFRA) { | |
1312 | if (priv->station_state != STATION_STATE_READY) { | |
1313 | priv->wstats.qual.qual = 0; | |
1314 | priv->wstats.qual.level = 0; | |
1315 | priv->wstats.qual.updated = (IW_QUAL_QUAL_INVALID | |
1316 | | IW_QUAL_LEVEL_INVALID); | |
1317 | } | |
1318 | priv->wstats.qual.noise = 0; | |
1319 | priv->wstats.qual.updated |= IW_QUAL_NOISE_INVALID; | |
1320 | } else { | |
1321 | /* Quality levels cannot be determined in ad-hoc mode, | |
1322 | because we can 'hear' more that one remote station. */ | |
1323 | priv->wstats.qual.qual = 0; | |
1324 | priv->wstats.qual.level = 0; | |
1325 | priv->wstats.qual.noise = 0; | |
1326 | priv->wstats.qual.updated = IW_QUAL_QUAL_INVALID | |
1327 | | IW_QUAL_LEVEL_INVALID | |
1328 | | IW_QUAL_NOISE_INVALID; | |
1329 | priv->wstats.miss.beacon = 0; | |
1330 | } | |
1331 | ||
1332 | return (&priv->wstats); | |
1333 | } | |
1334 | ||
1335 | static int atmel_change_mtu(struct net_device *dev, int new_mtu) | |
1336 | { | |
1337 | if ((new_mtu < 68) || (new_mtu > 2312)) | |
1338 | return -EINVAL; | |
1339 | dev->mtu = new_mtu; | |
1340 | return 0; | |
1341 | } | |
1342 | ||
1343 | static int atmel_set_mac_address(struct net_device *dev, void *p) | |
1344 | { | |
1345 | struct sockaddr *addr = p; | |
1346 | ||
1347 | memcpy (dev->dev_addr, addr->sa_data, dev->addr_len); | |
1348 | return atmel_open(dev); | |
1349 | } | |
1350 | ||
1351 | EXPORT_SYMBOL(atmel_open); | |
1352 | ||
1353 | int atmel_open (struct net_device *dev) | |
1354 | { | |
1355 | struct atmel_private *priv = netdev_priv(dev); | |
1356 | int i, channel; | |
1357 | ||
1358 | /* any scheduled timer is no longer needed and might screw things up.. */ | |
1359 | del_timer_sync(&priv->management_timer); | |
1360 | ||
1361 | /* Interrupts will not touch the card once in this state... */ | |
1362 | priv->station_state = STATION_STATE_DOWN; | |
1363 | ||
1364 | if (priv->new_SSID_size) { | |
1365 | memcpy(priv->SSID, priv->new_SSID, priv->new_SSID_size); | |
1366 | priv->SSID_size = priv->new_SSID_size; | |
1367 | priv->new_SSID_size = 0; | |
1368 | } | |
1369 | priv->BSS_list_entries = 0; | |
1370 | ||
1371 | priv->AuthenticationRequestRetryCnt = 0; | |
1372 | priv->AssociationRequestRetryCnt = 0; | |
1373 | priv->ReAssociationRequestRetryCnt = 0; | |
1374 | priv->CurrentAuthentTransactionSeqNum = 0x0001; | |
1375 | priv->ExpectedAuthentTransactionSeqNum = 0x0002; | |
1376 | ||
1377 | priv->site_survey_state = SITE_SURVEY_IDLE; | |
1378 | priv->station_is_associated = 0; | |
1379 | ||
1380 | if (!reset_atmel_card(dev)) | |
1381 | return -EAGAIN; | |
1382 | ||
1383 | if (priv->config_reg_domain) { | |
1384 | priv->reg_domain = priv->config_reg_domain; | |
1385 | atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS, priv->reg_domain); | |
1386 | } else { | |
1387 | priv->reg_domain = atmel_get_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS); | |
1388 | for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++) | |
1389 | if (priv->reg_domain == channel_table[i].reg_domain) | |
1390 | break; | |
1391 | if (i == sizeof(channel_table)/sizeof(channel_table[0])) { | |
1392 | priv->reg_domain = REG_DOMAIN_MKK1; | |
1393 | printk(KERN_ALERT "%s: failed to get regulatory domain: assuming MKK1.\n", dev->name); | |
1394 | } | |
1395 | } | |
1396 | ||
1397 | if ((channel = atmel_validate_channel(priv, priv->channel))) | |
1398 | priv->channel = channel; | |
1399 | ||
1400 | /* this moves station_state on.... */ | |
1401 | atmel_scan(priv, 1); | |
1402 | ||
1403 | atmel_set_gcr(priv->dev, GCR_ENINT); /* enable interrupts */ | |
1404 | return 0; | |
1405 | } | |
1406 | ||
1407 | static int atmel_close (struct net_device *dev) | |
1408 | { | |
1409 | struct atmel_private *priv = netdev_priv(dev); | |
1410 | ||
1411 | atmel_enter_state(priv, STATION_STATE_DOWN); | |
1412 | ||
1413 | if (priv->bus_type == BUS_TYPE_PCCARD) | |
1414 | atmel_write16(dev, GCR, 0x0060); | |
1415 | atmel_write16(dev, GCR, 0x0040); | |
1416 | return 0; | |
1417 | } | |
1418 | ||
1419 | static int atmel_validate_channel(struct atmel_private *priv, int channel) | |
1420 | { | |
1421 | /* check that channel is OK, if so return zero, | |
1422 | else return suitable default channel */ | |
1423 | int i; | |
1424 | ||
1425 | for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++) | |
1426 | if (priv->reg_domain == channel_table[i].reg_domain) { | |
1427 | if (channel >= channel_table[i].min && | |
1428 | channel <= channel_table[i].max) | |
1429 | return 0; | |
1430 | else | |
1431 | return channel_table[i].min; | |
1432 | } | |
1433 | return 0; | |
1434 | } | |
1435 | ||
1436 | static int atmel_proc_output (char *buf, struct atmel_private *priv) | |
1437 | { | |
1438 | int i; | |
1439 | char *p = buf; | |
1440 | char *s, *r, *c; | |
1441 | ||
1442 | p += sprintf(p, "Driver version:\t\t%d.%d\n", DRIVER_MAJOR, DRIVER_MINOR); | |
1443 | ||
1444 | if (priv->station_state != STATION_STATE_DOWN) { | |
1445 | p += sprintf(p, "Firmware version:\t%d.%d build %d\nFirmware location:\t", | |
1446 | priv->host_info.major_version, | |
1447 | priv->host_info.minor_version, | |
1448 | priv->host_info.build_version); | |
1449 | ||
1450 | if (priv->card_type != CARD_TYPE_EEPROM) | |
1451 | p += sprintf(p, "on card\n"); | |
1452 | else if (priv->firmware) | |
1453 | p += sprintf(p, "%s loaded by host\n", priv->firmware_id); | |
1454 | else | |
1455 | p += sprintf(p, "%s loaded by hotplug\n", priv->firmware_id); | |
1456 | ||
1457 | switch(priv->card_type) { | |
1458 | case CARD_TYPE_PARALLEL_FLASH: c = "Parallel flash"; break; | |
1459 | case CARD_TYPE_SPI_FLASH: c = "SPI flash\n"; break; | |
1460 | case CARD_TYPE_EEPROM: c = "EEPROM"; break; | |
1461 | default: c = "<unknown>"; | |
1462 | } | |
1463 | ||
1464 | ||
1465 | r = "<unknown>"; | |
1466 | for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++) | |
1467 | if (priv->reg_domain == channel_table[i].reg_domain) | |
1468 | r = channel_table[i].name; | |
1469 | ||
1470 | p += sprintf(p, "MAC memory type:\t%s\n", c); | |
1471 | p += sprintf(p, "Regulatory domain:\t%s\n", r); | |
1472 | p += sprintf(p, "Host CRC checking:\t%s\n", | |
1473 | priv->do_rx_crc ? "On" : "Off"); | |
1474 | p += sprintf(p, "WPA-capable firmware:\t%s\n", | |
1475 | priv->use_wpa ? "Yes" : "No"); | |
1476 | } | |
1477 | ||
1478 | switch(priv->station_state) { | |
1479 | case STATION_STATE_SCANNING: s = "Scanning"; break; | |
1480 | case STATION_STATE_JOINNING: s = "Joining"; break; | |
1481 | case STATION_STATE_AUTHENTICATING: s = "Authenticating"; break; | |
1482 | case STATION_STATE_ASSOCIATING: s = "Associating"; break; | |
1483 | case STATION_STATE_READY: s = "Ready"; break; | |
1484 | case STATION_STATE_REASSOCIATING: s = "Reassociating"; break; | |
1485 | case STATION_STATE_MGMT_ERROR: s = "Management error"; break; | |
1486 | case STATION_STATE_DOWN: s = "Down"; break; | |
1487 | default: s = "<unknown>"; | |
1488 | } | |
1489 | ||
1490 | p += sprintf(p, "Current state:\t\t%s\n", s); | |
1491 | return p - buf; | |
1492 | } | |
1493 | ||
1494 | static int atmel_read_proc(char *page, char **start, off_t off, | |
1495 | int count, int *eof, void *data) | |
1496 | { | |
1497 | struct atmel_private *priv = data; | |
1498 | int len = atmel_proc_output (page, priv); | |
1499 | if (len <= off+count) *eof = 1; | |
1500 | *start = page + off; | |
1501 | len -= off; | |
1502 | if (len>count) len = count; | |
1503 | if (len<0) len = 0; | |
1504 | return len; | |
1505 | } | |
1506 | ||
1507 | struct net_device *init_atmel_card( unsigned short irq, int port, const AtmelFWType fw_type, | |
1508 | struct device *sys_dev, int (*card_present)(void *), void *card) | |
1509 | { | |
1510 | struct net_device *dev; | |
1511 | struct atmel_private *priv; | |
1512 | int rc; | |
1513 | ||
1514 | /* Create the network device object. */ | |
1515 | dev = alloc_etherdev(sizeof(*priv)); | |
1516 | if (!dev) { | |
1517 | printk(KERN_ERR "atmel: Couldn't alloc_etherdev\n"); | |
1518 | return NULL; | |
1519 | } | |
1520 | if (dev_alloc_name(dev, dev->name) < 0) { | |
1521 | printk(KERN_ERR "atmel: Couldn't get name!\n"); | |
1522 | goto err_out_free; | |
1523 | } | |
1524 | ||
1525 | priv = netdev_priv(dev); | |
1526 | priv->dev = dev; | |
1527 | priv->sys_dev = sys_dev; | |
1528 | priv->present_callback = card_present; | |
1529 | priv->card = card; | |
1530 | priv->firmware = NULL; | |
1531 | priv->firmware_id[0] = '\0'; | |
1532 | priv->firmware_type = fw_type; | |
1533 | if (firmware) /* module parameter */ | |
1534 | strcpy(priv->firmware_id, firmware); | |
1535 | priv->bus_type = card_present ? BUS_TYPE_PCCARD : BUS_TYPE_PCI; | |
1536 | priv->station_state = STATION_STATE_DOWN; | |
1537 | priv->do_rx_crc = 0; | |
1538 | /* For PCMCIA cards, some chips need CRC, some don't | |
1539 | so we have to probe. */ | |
1540 | if (priv->bus_type == BUS_TYPE_PCCARD) { | |
1541 | priv->probe_crc = 1; | |
1542 | priv->crc_ok_cnt = priv->crc_ko_cnt = 0; | |
1543 | } else | |
1544 | priv->probe_crc = 0; | |
1545 | memset(&priv->stats, 0, sizeof(priv->stats)); | |
1546 | memset(&priv->wstats, 0, sizeof(priv->wstats)); | |
1547 | priv->last_qual = jiffies; | |
1548 | priv->last_beacon_timestamp = 0; | |
1549 | memset(priv->frag_source, 0xff, sizeof(priv->frag_source)); | |
1550 | memset(priv->BSSID, 0, 6); | |
1551 | priv->CurrentBSSID[0] = 0xFF; /* Initialize to something invalid.... */ | |
1552 | priv->station_was_associated = 0; | |
1553 | ||
1554 | priv->last_survey = jiffies; | |
1555 | priv->preamble = LONG_PREAMBLE; | |
1556 | priv->operating_mode = IW_MODE_INFRA; | |
1557 | priv->connect_to_any_BSS = 0; | |
1558 | priv->config_reg_domain = 0; | |
1559 | priv->reg_domain = 0; | |
1560 | priv->tx_rate = 3; | |
1561 | priv->auto_tx_rate = 1; | |
1562 | priv->channel = 4; | |
1563 | priv->power_mode = 0; | |
1564 | priv->SSID[0] = '\0'; | |
1565 | priv->SSID_size = 0; | |
1566 | priv->new_SSID_size = 0; | |
1567 | priv->frag_threshold = 2346; | |
1568 | priv->rts_threshold = 2347; | |
1569 | priv->short_retry = 7; | |
1570 | priv->long_retry = 4; | |
1571 | ||
1572 | priv->wep_is_on = 0; | |
1573 | priv->default_key = 0; | |
1574 | priv->encryption_level = 0; | |
1575 | priv->exclude_unencrypted = 0; | |
1576 | priv->group_cipher_suite = priv->pairwise_cipher_suite = CIPHER_SUITE_NONE; | |
1577 | priv->use_wpa = 0; | |
1578 | memset(priv->wep_keys, 0, sizeof(priv->wep_keys)); | |
1579 | memset(priv->wep_key_len, 0, sizeof(priv->wep_key_len)); | |
1580 | ||
1581 | priv->default_beacon_period = priv->beacon_period = 100; | |
1582 | priv->listen_interval = 1; | |
1583 | ||
1584 | init_timer(&priv->management_timer); | |
1585 | spin_lock_init(&priv->irqlock); | |
1586 | spin_lock_init(&priv->timerlock); | |
1587 | priv->management_timer.function = atmel_management_timer; | |
1588 | priv->management_timer.data = (unsigned long) dev; | |
1589 | ||
1590 | dev->open = atmel_open; | |
1591 | dev->stop = atmel_close; | |
1592 | dev->change_mtu = atmel_change_mtu; | |
1593 | dev->set_mac_address = atmel_set_mac_address; | |
1594 | dev->hard_start_xmit = start_tx; | |
1595 | dev->get_stats = atmel_get_stats; | |
1da177e4 LT |
1596 | dev->wireless_handlers = (struct iw_handler_def *)&atmel_handler_def; |
1597 | dev->do_ioctl = atmel_ioctl; | |
1598 | dev->irq = irq; | |
1599 | dev->base_addr = port; | |
1600 | ||
1601 | SET_NETDEV_DEV(dev, sys_dev); | |
1602 | ||
1603 | if ((rc = request_irq(dev->irq, service_interrupt, SA_SHIRQ, dev->name, dev))) { | |
1604 | printk(KERN_ERR "%s: register interrupt %d failed, rc %d\n", dev->name, irq, rc ); | |
1605 | goto err_out_free; | |
1606 | } | |
1607 | ||
1608 | if (priv->bus_type == BUS_TYPE_PCI && | |
1609 | !request_region( dev->base_addr, 64, dev->name )) { | |
1610 | goto err_out_irq; | |
1611 | } | |
1612 | ||
1613 | if (register_netdev(dev)) | |
1614 | goto err_out_res; | |
1615 | ||
1616 | if (!probe_atmel_card(dev)){ | |
1617 | unregister_netdev(dev); | |
1618 | goto err_out_res; | |
1619 | } | |
1620 | ||
1621 | netif_carrier_off(dev); | |
1622 | ||
1623 | create_proc_read_entry ("driver/atmel", 0, NULL, atmel_read_proc, priv); | |
1624 | ||
1625 | printk(KERN_INFO "%s: Atmel at76c50x wireless. Version %d.%d simon@thekelleys.org.uk\n", | |
1626 | dev->name, DRIVER_MAJOR, DRIVER_MINOR); | |
1627 | ||
1628 | SET_MODULE_OWNER(dev); | |
1629 | return dev; | |
1630 | ||
1631 | err_out_res: | |
1632 | if (priv->bus_type == BUS_TYPE_PCI) | |
1633 | release_region( dev->base_addr, 64 ); | |
1634 | err_out_irq: | |
1635 | free_irq(dev->irq, dev); | |
1636 | err_out_free: | |
1637 | free_netdev(dev); | |
1638 | return NULL; | |
1639 | } | |
1640 | ||
1641 | EXPORT_SYMBOL(init_atmel_card); | |
1642 | ||
1643 | void stop_atmel_card(struct net_device *dev, int freeres) | |
1644 | { | |
1645 | struct atmel_private *priv = netdev_priv(dev); | |
1646 | ||
1647 | /* put a brick on it... */ | |
1648 | if (priv->bus_type == BUS_TYPE_PCCARD) | |
1649 | atmel_write16(dev, GCR, 0x0060); | |
1650 | atmel_write16(dev, GCR, 0x0040); | |
1651 | ||
1652 | del_timer_sync(&priv->management_timer); | |
1653 | unregister_netdev(dev); | |
1654 | remove_proc_entry("driver/atmel", NULL); | |
1655 | free_irq(dev->irq, dev); | |
1656 | if (priv->firmware) | |
1657 | kfree(priv->firmware); | |
1658 | if (freeres) { | |
1659 | /* PCMCIA frees this stuff, so only for PCI */ | |
1660 | release_region(dev->base_addr, 64); | |
1661 | } | |
1662 | free_netdev(dev); | |
1663 | } | |
1664 | ||
1665 | EXPORT_SYMBOL(stop_atmel_card); | |
1666 | ||
1667 | static int atmel_set_essid(struct net_device *dev, | |
1668 | struct iw_request_info *info, | |
1669 | struct iw_point *dwrq, | |
1670 | char *extra) | |
1671 | { | |
1672 | struct atmel_private *priv = netdev_priv(dev); | |
1673 | ||
1674 | /* Check if we asked for `any' */ | |
1675 | if(dwrq->flags == 0) { | |
1676 | priv->connect_to_any_BSS = 1; | |
1677 | } else { | |
1678 | int index = (dwrq->flags & IW_ENCODE_INDEX) - 1; | |
1679 | ||
1680 | priv->connect_to_any_BSS = 0; | |
1681 | ||
1682 | /* Check the size of the string */ | |
1683 | if (dwrq->length > MAX_SSID_LENGTH + 1) | |
1684 | return -E2BIG ; | |
1685 | if (index != 0) | |
1686 | return -EINVAL; | |
1687 | ||
1688 | memcpy(priv->new_SSID, extra, dwrq->length - 1); | |
1689 | priv->new_SSID_size = dwrq->length - 1; | |
1690 | } | |
1691 | ||
1692 | return -EINPROGRESS; | |
1693 | } | |
1694 | ||
1695 | static int atmel_get_essid(struct net_device *dev, | |
1696 | struct iw_request_info *info, | |
1697 | struct iw_point *dwrq, | |
1698 | char *extra) | |
1699 | { | |
1700 | struct atmel_private *priv = netdev_priv(dev); | |
1701 | ||
1702 | /* Get the current SSID */ | |
1703 | if (priv->new_SSID_size != 0) { | |
1704 | memcpy(extra, priv->new_SSID, priv->new_SSID_size); | |
1705 | extra[priv->new_SSID_size] = '\0'; | |
1706 | dwrq->length = priv->new_SSID_size + 1; | |
1707 | } else { | |
1708 | memcpy(extra, priv->SSID, priv->SSID_size); | |
1709 | extra[priv->SSID_size] = '\0'; | |
1710 | dwrq->length = priv->SSID_size + 1; | |
1711 | } | |
1712 | ||
1713 | dwrq->flags = !priv->connect_to_any_BSS; /* active */ | |
1714 | ||
1715 | return 0; | |
1716 | } | |
1717 | ||
1718 | static int atmel_get_wap(struct net_device *dev, | |
1719 | struct iw_request_info *info, | |
1720 | struct sockaddr *awrq, | |
1721 | char *extra) | |
1722 | { | |
1723 | struct atmel_private *priv = netdev_priv(dev); | |
1724 | memcpy(awrq->sa_data, priv->CurrentBSSID, 6); | |
1725 | awrq->sa_family = ARPHRD_ETHER; | |
1726 | ||
1727 | return 0; | |
1728 | } | |
1729 | ||
1730 | static int atmel_set_encode(struct net_device *dev, | |
1731 | struct iw_request_info *info, | |
1732 | struct iw_point *dwrq, | |
1733 | char *extra) | |
1734 | { | |
1735 | struct atmel_private *priv = netdev_priv(dev); | |
1736 | ||
1737 | /* Basic checking: do we have a key to set ? | |
1738 | * Note : with the new API, it's impossible to get a NULL pointer. | |
1739 | * Therefore, we need to check a key size == 0 instead. | |
1740 | * New version of iwconfig properly set the IW_ENCODE_NOKEY flag | |
1741 | * when no key is present (only change flags), but older versions | |
1742 | * don't do it. - Jean II */ | |
1743 | if (dwrq->length > 0) { | |
1744 | int index = (dwrq->flags & IW_ENCODE_INDEX) - 1; | |
1745 | int current_index = priv->default_key; | |
1746 | /* Check the size of the key */ | |
1747 | if (dwrq->length > 13) { | |
1748 | return -EINVAL; | |
1749 | } | |
1750 | /* Check the index (none -> use current) */ | |
1751 | if (index < 0 || index >= 4) | |
1752 | index = current_index; | |
1753 | else | |
1754 | priv->default_key = index; | |
1755 | /* Set the length */ | |
1756 | if (dwrq->length > 5) | |
1757 | priv->wep_key_len[index] = 13; | |
1758 | else | |
1759 | if (dwrq->length > 0) | |
1760 | priv->wep_key_len[index] = 5; | |
1761 | else | |
1762 | /* Disable the key */ | |
1763 | priv->wep_key_len[index] = 0; | |
1764 | /* Check if the key is not marked as invalid */ | |
1765 | if(!(dwrq->flags & IW_ENCODE_NOKEY)) { | |
1766 | /* Cleanup */ | |
1767 | memset(priv->wep_keys[index], 0, 13); | |
1768 | /* Copy the key in the driver */ | |
1769 | memcpy(priv->wep_keys[index], extra, dwrq->length); | |
1770 | } | |
1771 | /* WE specify that if a valid key is set, encryption | |
1772 | * should be enabled (user may turn it off later) | |
1773 | * This is also how "iwconfig ethX key on" works */ | |
1774 | if (index == current_index && | |
1775 | priv->wep_key_len[index] > 0) { | |
1776 | priv->wep_is_on = 1; | |
1777 | priv->exclude_unencrypted = 1; | |
1778 | if (priv->wep_key_len[index] > 5) { | |
1779 | priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64; | |
1780 | priv->encryption_level = 2; | |
1781 | } else { | |
1782 | priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128; | |
1783 | priv->encryption_level = 1; | |
1784 | } | |
1785 | } | |
1786 | } else { | |
1787 | /* Do we want to just set the transmit key index ? */ | |
1788 | int index = (dwrq->flags & IW_ENCODE_INDEX) - 1; | |
1789 | if ( index>=0 && index < 4 ) { | |
1790 | priv->default_key = index; | |
1791 | } else | |
1792 | /* Don't complain if only change the mode */ | |
1793 | if(!dwrq->flags & IW_ENCODE_MODE) { | |
1794 | return -EINVAL; | |
1795 | } | |
1796 | } | |
1797 | /* Read the flags */ | |
1798 | if(dwrq->flags & IW_ENCODE_DISABLED) { | |
1799 | priv->wep_is_on = 0; | |
1800 | priv->encryption_level = 0; | |
1801 | priv->pairwise_cipher_suite = CIPHER_SUITE_NONE; | |
1802 | } else { | |
1803 | priv->wep_is_on = 1; | |
1804 | if (priv->wep_key_len[priv->default_key] > 5) { | |
1805 | priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128; | |
1806 | priv->encryption_level = 2; | |
1807 | } else { | |
1808 | priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64; | |
1809 | priv->encryption_level = 1; | |
1810 | } | |
1811 | } | |
1812 | if(dwrq->flags & IW_ENCODE_RESTRICTED) | |
1813 | priv->exclude_unencrypted = 1; | |
1814 | if(dwrq->flags & IW_ENCODE_OPEN) | |
1815 | priv->exclude_unencrypted = 0; | |
1816 | ||
1817 | return -EINPROGRESS; /* Call commit handler */ | |
1818 | } | |
1819 | ||
1820 | ||
1821 | static int atmel_get_encode(struct net_device *dev, | |
1822 | struct iw_request_info *info, | |
1823 | struct iw_point *dwrq, | |
1824 | char *extra) | |
1825 | { | |
1826 | struct atmel_private *priv = netdev_priv(dev); | |
1827 | int index = (dwrq->flags & IW_ENCODE_INDEX) - 1; | |
1828 | ||
1829 | if (!priv->wep_is_on) | |
1830 | dwrq->flags = IW_ENCODE_DISABLED; | |
1831 | else if (priv->exclude_unencrypted) | |
1832 | dwrq->flags = IW_ENCODE_RESTRICTED; | |
1833 | else | |
1834 | dwrq->flags = IW_ENCODE_OPEN; | |
1835 | ||
1836 | /* Which key do we want ? -1 -> tx index */ | |
1837 | if (index < 0 || index >= 4) | |
1838 | index = priv->default_key; | |
1839 | dwrq->flags |= index + 1; | |
1840 | /* Copy the key to the user buffer */ | |
1841 | dwrq->length = priv->wep_key_len[index]; | |
1842 | if (dwrq->length > 16) { | |
1843 | dwrq->length=0; | |
1844 | } else { | |
1845 | memset(extra, 0, 16); | |
1846 | memcpy(extra, priv->wep_keys[index], dwrq->length); | |
1847 | } | |
1848 | ||
1849 | return 0; | |
1850 | } | |
1851 | ||
1852 | static int atmel_get_name(struct net_device *dev, | |
1853 | struct iw_request_info *info, | |
1854 | char *cwrq, | |
1855 | char *extra) | |
1856 | { | |
1857 | strcpy(cwrq, "IEEE 802.11-DS"); | |
1858 | return 0; | |
1859 | } | |
1860 | ||
1861 | static int atmel_set_rate(struct net_device *dev, | |
1862 | struct iw_request_info *info, | |
1863 | struct iw_param *vwrq, | |
1864 | char *extra) | |
1865 | { | |
1866 | struct atmel_private *priv = netdev_priv(dev); | |
1867 | ||
1868 | if (vwrq->fixed == 0) { | |
1869 | priv->tx_rate = 3; | |
1870 | priv->auto_tx_rate = 1; | |
1871 | } else { | |
1872 | priv->auto_tx_rate = 0; | |
1873 | ||
1874 | /* Which type of value ? */ | |
1875 | if((vwrq->value < 4) && (vwrq->value >= 0)) { | |
1876 | /* Setting by rate index */ | |
1877 | priv->tx_rate = vwrq->value; | |
1878 | } else { | |
1879 | /* Setting by frequency value */ | |
1880 | switch (vwrq->value) { | |
1881 | case 1000000: priv->tx_rate = 0; break; | |
1882 | case 2000000: priv->tx_rate = 1; break; | |
1883 | case 5500000: priv->tx_rate = 2; break; | |
1884 | case 11000000: priv->tx_rate = 3; break; | |
1885 | default: return -EINVAL; | |
1886 | } | |
1887 | } | |
1888 | } | |
1889 | ||
1890 | return -EINPROGRESS; | |
1891 | } | |
1892 | ||
1893 | static int atmel_set_mode(struct net_device *dev, | |
1894 | struct iw_request_info *info, | |
1895 | __u32 *uwrq, | |
1896 | char *extra) | |
1897 | { | |
1898 | struct atmel_private *priv = netdev_priv(dev); | |
1899 | ||
1900 | if (*uwrq != IW_MODE_ADHOC && *uwrq != IW_MODE_INFRA) | |
1901 | return -EINVAL; | |
1902 | ||
1903 | priv->operating_mode = *uwrq; | |
1904 | return -EINPROGRESS; | |
1905 | } | |
1906 | ||
1907 | static int atmel_get_mode(struct net_device *dev, | |
1908 | struct iw_request_info *info, | |
1909 | __u32 *uwrq, | |
1910 | char *extra) | |
1911 | { | |
1912 | struct atmel_private *priv = netdev_priv(dev); | |
1913 | ||
1914 | *uwrq = priv->operating_mode; | |
1915 | return 0; | |
1916 | } | |
1917 | ||
1918 | static int atmel_get_rate(struct net_device *dev, | |
1919 | struct iw_request_info *info, | |
1920 | struct iw_param *vwrq, | |
1921 | char *extra) | |
1922 | { | |
1923 | struct atmel_private *priv = netdev_priv(dev); | |
1924 | ||
1925 | if (priv->auto_tx_rate) { | |
1926 | vwrq->fixed = 0; | |
1927 | vwrq->value = 11000000; | |
1928 | } else { | |
1929 | vwrq->fixed = 1; | |
1930 | switch(priv->tx_rate) { | |
1931 | case 0: vwrq->value = 1000000; break; | |
1932 | case 1: vwrq->value = 2000000; break; | |
1933 | case 2: vwrq->value = 5500000; break; | |
1934 | case 3: vwrq->value = 11000000; break; | |
1935 | } | |
1936 | } | |
1937 | return 0; | |
1938 | } | |
1939 | ||
1940 | static int atmel_set_power(struct net_device *dev, | |
1941 | struct iw_request_info *info, | |
1942 | struct iw_param *vwrq, | |
1943 | char *extra) | |
1944 | { | |
1945 | struct atmel_private *priv = netdev_priv(dev); | |
1946 | priv->power_mode = vwrq->disabled ? 0 : 1; | |
1947 | return -EINPROGRESS; | |
1948 | } | |
1949 | ||
1950 | static int atmel_get_power(struct net_device *dev, | |
1951 | struct iw_request_info *info, | |
1952 | struct iw_param *vwrq, | |
1953 | char *extra) | |
1954 | { | |
1955 | struct atmel_private *priv = netdev_priv(dev); | |
1956 | vwrq->disabled = priv->power_mode ? 0 : 1; | |
1957 | vwrq->flags = IW_POWER_ON; | |
1958 | return 0; | |
1959 | } | |
1960 | ||
1961 | static int atmel_set_retry(struct net_device *dev, | |
1962 | struct iw_request_info *info, | |
1963 | struct iw_param *vwrq, | |
1964 | char *extra) | |
1965 | { | |
1966 | struct atmel_private *priv = netdev_priv(dev); | |
1967 | ||
1968 | if(!vwrq->disabled && (vwrq->flags & IW_RETRY_LIMIT)) { | |
1969 | if(vwrq->flags & IW_RETRY_MAX) | |
1970 | priv->long_retry = vwrq->value; | |
1971 | else if (vwrq->flags & IW_RETRY_MIN) | |
1972 | priv->short_retry = vwrq->value; | |
1973 | else { | |
1974 | /* No modifier : set both */ | |
1975 | priv->long_retry = vwrq->value; | |
1976 | priv->short_retry = vwrq->value; | |
1977 | } | |
1978 | return -EINPROGRESS; | |
1979 | } | |
1980 | ||
1981 | return -EINVAL; | |
1982 | } | |
1983 | ||
1984 | static int atmel_get_retry(struct net_device *dev, | |
1985 | struct iw_request_info *info, | |
1986 | struct iw_param *vwrq, | |
1987 | char *extra) | |
1988 | { | |
1989 | struct atmel_private *priv = netdev_priv(dev); | |
1990 | ||
1991 | vwrq->disabled = 0; /* Can't be disabled */ | |
1992 | ||
1993 | /* Note : by default, display the min retry number */ | |
1994 | if((vwrq->flags & IW_RETRY_MAX)) { | |
1995 | vwrq->flags = IW_RETRY_LIMIT | IW_RETRY_MAX; | |
1996 | vwrq->value = priv->long_retry; | |
1997 | } else { | |
1998 | vwrq->flags = IW_RETRY_LIMIT; | |
1999 | vwrq->value = priv->short_retry; | |
2000 | if(priv->long_retry != priv->short_retry) | |
2001 | vwrq->flags |= IW_RETRY_MIN; | |
2002 | } | |
2003 | ||
2004 | return 0; | |
2005 | } | |
2006 | ||
2007 | static int atmel_set_rts(struct net_device *dev, | |
2008 | struct iw_request_info *info, | |
2009 | struct iw_param *vwrq, | |
2010 | char *extra) | |
2011 | { | |
2012 | struct atmel_private *priv = netdev_priv(dev); | |
2013 | int rthr = vwrq->value; | |
2014 | ||
2015 | if(vwrq->disabled) | |
2016 | rthr = 2347; | |
2017 | if((rthr < 0) || (rthr > 2347)) { | |
2018 | return -EINVAL; | |
2019 | } | |
2020 | priv->rts_threshold = rthr; | |
2021 | ||
2022 | return -EINPROGRESS; /* Call commit handler */ | |
2023 | } | |
2024 | ||
2025 | static int atmel_get_rts(struct net_device *dev, | |
2026 | struct iw_request_info *info, | |
2027 | struct iw_param *vwrq, | |
2028 | char *extra) | |
2029 | { | |
2030 | struct atmel_private *priv = netdev_priv(dev); | |
2031 | ||
2032 | vwrq->value = priv->rts_threshold; | |
2033 | vwrq->disabled = (vwrq->value >= 2347); | |
2034 | vwrq->fixed = 1; | |
2035 | ||
2036 | return 0; | |
2037 | } | |
2038 | ||
2039 | static int atmel_set_frag(struct net_device *dev, | |
2040 | struct iw_request_info *info, | |
2041 | struct iw_param *vwrq, | |
2042 | char *extra) | |
2043 | { | |
2044 | struct atmel_private *priv = netdev_priv(dev); | |
2045 | int fthr = vwrq->value; | |
2046 | ||
2047 | if(vwrq->disabled) | |
2048 | fthr = 2346; | |
2049 | if((fthr < 256) || (fthr > 2346)) { | |
2050 | return -EINVAL; | |
2051 | } | |
2052 | fthr &= ~0x1; /* Get an even value - is it really needed ??? */ | |
2053 | priv->frag_threshold = fthr; | |
2054 | ||
2055 | return -EINPROGRESS; /* Call commit handler */ | |
2056 | } | |
2057 | ||
2058 | static int atmel_get_frag(struct net_device *dev, | |
2059 | struct iw_request_info *info, | |
2060 | struct iw_param *vwrq, | |
2061 | char *extra) | |
2062 | { | |
2063 | struct atmel_private *priv = netdev_priv(dev); | |
2064 | ||
2065 | vwrq->value = priv->frag_threshold; | |
2066 | vwrq->disabled = (vwrq->value >= 2346); | |
2067 | vwrq->fixed = 1; | |
2068 | ||
2069 | return 0; | |
2070 | } | |
2071 | ||
2072 | static const long frequency_list[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442, | |
2073 | 2447, 2452, 2457, 2462, 2467, 2472, 2484 }; | |
2074 | ||
2075 | static int atmel_set_freq(struct net_device *dev, | |
2076 | struct iw_request_info *info, | |
2077 | struct iw_freq *fwrq, | |
2078 | char *extra) | |
2079 | { | |
2080 | struct atmel_private *priv = netdev_priv(dev); | |
2081 | int rc = -EINPROGRESS; /* Call commit handler */ | |
2082 | ||
2083 | /* If setting by frequency, convert to a channel */ | |
2084 | if((fwrq->e == 1) && | |
2085 | (fwrq->m >= (int) 241200000) && | |
2086 | (fwrq->m <= (int) 248700000)) { | |
2087 | int f = fwrq->m / 100000; | |
2088 | int c = 0; | |
2089 | while((c < 14) && (f != frequency_list[c])) | |
2090 | c++; | |
2091 | /* Hack to fall through... */ | |
2092 | fwrq->e = 0; | |
2093 | fwrq->m = c + 1; | |
2094 | } | |
2095 | /* Setting by channel number */ | |
2096 | if((fwrq->m > 1000) || (fwrq->e > 0)) | |
2097 | rc = -EOPNOTSUPP; | |
2098 | else { | |
2099 | int channel = fwrq->m; | |
2100 | if (atmel_validate_channel(priv, channel) == 0) { | |
2101 | priv->channel = channel; | |
2102 | } else { | |
2103 | rc = -EINVAL; | |
2104 | } | |
2105 | } | |
2106 | return rc; | |
2107 | } | |
2108 | ||
2109 | static int atmel_get_freq(struct net_device *dev, | |
2110 | struct iw_request_info *info, | |
2111 | struct iw_freq *fwrq, | |
2112 | char *extra) | |
2113 | { | |
2114 | struct atmel_private *priv = netdev_priv(dev); | |
2115 | ||
2116 | fwrq->m = priv->channel; | |
2117 | fwrq->e = 0; | |
2118 | return 0; | |
2119 | } | |
2120 | ||
2121 | static int atmel_set_scan(struct net_device *dev, | |
2122 | struct iw_request_info *info, | |
2123 | struct iw_param *vwrq, | |
2124 | char *extra) | |
2125 | { | |
2126 | struct atmel_private *priv = netdev_priv(dev); | |
2127 | unsigned long flags; | |
2128 | ||
2129 | /* Note : you may have realised that, as this is a SET operation, | |
2130 | * this is privileged and therefore a normal user can't | |
2131 | * perform scanning. | |
2132 | * This is not an error, while the device perform scanning, | |
2133 | * traffic doesn't flow, so it's a perfect DoS... | |
2134 | * Jean II */ | |
2135 | ||
2136 | if (priv->station_state == STATION_STATE_DOWN) | |
2137 | return -EAGAIN; | |
2138 | ||
2139 | /* Timeout old surveys. */ | |
2140 | if ((jiffies - priv->last_survey) > (20 * HZ)) | |
2141 | priv->site_survey_state = SITE_SURVEY_IDLE; | |
2142 | priv->last_survey = jiffies; | |
2143 | ||
2144 | /* Initiate a scan command */ | |
2145 | if (priv->site_survey_state == SITE_SURVEY_IN_PROGRESS) | |
2146 | return -EBUSY; | |
2147 | ||
2148 | del_timer_sync(&priv->management_timer); | |
2149 | spin_lock_irqsave(&priv->irqlock, flags); | |
2150 | ||
2151 | priv->site_survey_state = SITE_SURVEY_IN_PROGRESS; | |
2152 | priv->fast_scan = 0; | |
2153 | atmel_scan(priv, 0); | |
2154 | spin_unlock_irqrestore(&priv->irqlock, flags); | |
2155 | ||
2156 | return 0; | |
2157 | } | |
2158 | ||
2159 | static int atmel_get_scan(struct net_device *dev, | |
2160 | struct iw_request_info *info, | |
2161 | struct iw_point *dwrq, | |
2162 | char *extra) | |
2163 | { | |
2164 | struct atmel_private *priv = netdev_priv(dev); | |
2165 | int i; | |
2166 | char *current_ev = extra; | |
2167 | struct iw_event iwe; | |
2168 | ||
2169 | if (priv->site_survey_state != SITE_SURVEY_COMPLETED) | |
2170 | return -EAGAIN; | |
2171 | ||
2172 | for(i=0; i<priv->BSS_list_entries; i++) { | |
2173 | iwe.cmd = SIOCGIWAP; | |
2174 | iwe.u.ap_addr.sa_family = ARPHRD_ETHER; | |
2175 | memcpy(iwe.u.ap_addr.sa_data, priv->BSSinfo[i].BSSID, 6); | |
2176 | current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_ADDR_LEN); | |
2177 | ||
2178 | iwe.u.data.length = priv->BSSinfo[i].SSIDsize; | |
2179 | if (iwe.u.data.length > 32) | |
2180 | iwe.u.data.length = 32; | |
2181 | iwe.cmd = SIOCGIWESSID; | |
2182 | iwe.u.data.flags = 1; | |
2183 | current_ev = iwe_stream_add_point(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, priv->BSSinfo[i].SSID); | |
2184 | ||
2185 | iwe.cmd = SIOCGIWMODE; | |
2186 | iwe.u.mode = priv->BSSinfo[i].BSStype; | |
2187 | current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_UINT_LEN); | |
2188 | ||
2189 | iwe.cmd = SIOCGIWFREQ; | |
2190 | iwe.u.freq.m = priv->BSSinfo[i].channel; | |
2191 | iwe.u.freq.e = 0; | |
2192 | current_ev = iwe_stream_add_event(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, IW_EV_FREQ_LEN); | |
2193 | ||
2194 | iwe.cmd = SIOCGIWENCODE; | |
2195 | if (priv->BSSinfo[i].UsingWEP) | |
2196 | iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY; | |
2197 | else | |
2198 | iwe.u.data.flags = IW_ENCODE_DISABLED; | |
2199 | iwe.u.data.length = 0; | |
2200 | current_ev = iwe_stream_add_point(current_ev, extra + IW_SCAN_MAX_DATA, &iwe, NULL); | |
2201 | ||
2202 | } | |
2203 | ||
2204 | /* Length of data */ | |
2205 | dwrq->length = (current_ev - extra); | |
2206 | dwrq->flags = 0; | |
2207 | ||
2208 | return 0; | |
2209 | } | |
2210 | ||
2211 | static int atmel_get_range(struct net_device *dev, | |
2212 | struct iw_request_info *info, | |
2213 | struct iw_point *dwrq, | |
2214 | char *extra) | |
2215 | { | |
2216 | struct atmel_private *priv = netdev_priv(dev); | |
2217 | struct iw_range *range = (struct iw_range *) extra; | |
2218 | int k,i,j; | |
2219 | ||
2220 | dwrq->length = sizeof(struct iw_range); | |
2221 | memset(range, 0, sizeof(range)); | |
2222 | range->min_nwid = 0x0000; | |
2223 | range->max_nwid = 0x0000; | |
2224 | range->num_channels = 0; | |
2225 | for (j = 0; j < sizeof(channel_table)/sizeof(channel_table[0]); j++) | |
2226 | if (priv->reg_domain == channel_table[j].reg_domain) { | |
2227 | range->num_channels = channel_table[j].max - channel_table[j].min + 1; | |
2228 | break; | |
2229 | } | |
2230 | if (range->num_channels != 0) { | |
2231 | for(k = 0, i = channel_table[j].min; i <= channel_table[j].max; i++) { | |
2232 | range->freq[k].i = i; /* List index */ | |
2233 | range->freq[k].m = frequency_list[i-1] * 100000; | |
2234 | range->freq[k++].e = 1; /* Values in table in MHz -> * 10^5 * 10 */ | |
2235 | } | |
2236 | range->num_frequency = k; | |
2237 | } | |
2238 | ||
2239 | range->max_qual.qual = 100; | |
2240 | range->max_qual.level = 100; | |
2241 | range->max_qual.noise = 0; | |
2242 | range->max_qual.updated = IW_QUAL_NOISE_INVALID; | |
2243 | ||
2244 | range->avg_qual.qual = 50; | |
2245 | range->avg_qual.level = 50; | |
2246 | range->avg_qual.noise = 0; | |
2247 | range->avg_qual.updated = IW_QUAL_NOISE_INVALID; | |
2248 | ||
2249 | range->sensitivity = 0; | |
2250 | ||
2251 | range->bitrate[0] = 1000000; | |
2252 | range->bitrate[1] = 2000000; | |
2253 | range->bitrate[2] = 5500000; | |
2254 | range->bitrate[3] = 11000000; | |
2255 | range->num_bitrates = 4; | |
2256 | ||
2257 | range->min_rts = 0; | |
2258 | range->max_rts = 2347; | |
2259 | range->min_frag = 256; | |
2260 | range->max_frag = 2346; | |
2261 | ||
2262 | range->encoding_size[0] = 5; | |
2263 | range->encoding_size[1] = 13; | |
2264 | range->num_encoding_sizes = 2; | |
2265 | range->max_encoding_tokens = 4; | |
2266 | ||
2267 | range->pmp_flags = IW_POWER_ON; | |
2268 | range->pmt_flags = IW_POWER_ON; | |
2269 | range->pm_capa = 0; | |
2270 | ||
2271 | range->we_version_source = WIRELESS_EXT; | |
2272 | range->we_version_compiled = WIRELESS_EXT; | |
2273 | range->retry_capa = IW_RETRY_LIMIT ; | |
2274 | range->retry_flags = IW_RETRY_LIMIT; | |
2275 | range->r_time_flags = 0; | |
2276 | range->min_retry = 1; | |
2277 | range->max_retry = 65535; | |
2278 | ||
2279 | return 0; | |
2280 | } | |
2281 | ||
2282 | static int atmel_set_wap(struct net_device *dev, | |
2283 | struct iw_request_info *info, | |
2284 | struct sockaddr *awrq, | |
2285 | char *extra) | |
2286 | { | |
2287 | struct atmel_private *priv = netdev_priv(dev); | |
2288 | int i; | |
2289 | static const u8 bcast[] = { 255, 255, 255, 255, 255, 255 }; | |
2290 | unsigned long flags; | |
2291 | ||
2292 | if (awrq->sa_family != ARPHRD_ETHER) | |
2293 | return -EINVAL; | |
2294 | ||
2295 | if (memcmp(bcast, awrq->sa_data, 6) == 0) { | |
2296 | del_timer_sync(&priv->management_timer); | |
2297 | spin_lock_irqsave(&priv->irqlock, flags); | |
2298 | atmel_scan(priv, 1); | |
2299 | spin_unlock_irqrestore(&priv->irqlock, flags); | |
2300 | return 0; | |
2301 | } | |
2302 | ||
2303 | for(i=0; i<priv->BSS_list_entries; i++) { | |
2304 | if (memcmp(priv->BSSinfo[i].BSSID, awrq->sa_data, 6) == 0) { | |
2305 | if (!priv->wep_is_on && priv->BSSinfo[i].UsingWEP) { | |
2306 | return -EINVAL; | |
2307 | } else if (priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) { | |
2308 | return -EINVAL; | |
2309 | } else { | |
2310 | del_timer_sync(&priv->management_timer); | |
2311 | spin_lock_irqsave(&priv->irqlock, flags); | |
2312 | atmel_join_bss(priv, i); | |
2313 | spin_unlock_irqrestore(&priv->irqlock, flags); | |
2314 | return 0; | |
2315 | } | |
2316 | } | |
2317 | } | |
2318 | ||
2319 | return -EINVAL; | |
2320 | } | |
2321 | ||
2322 | static int atmel_config_commit(struct net_device *dev, | |
2323 | struct iw_request_info *info, /* NULL */ | |
2324 | void *zwrq, /* NULL */ | |
2325 | char *extra) /* NULL */ | |
2326 | { | |
2327 | return atmel_open(dev); | |
2328 | } | |
2329 | ||
2330 | static const iw_handler atmel_handler[] = | |
2331 | { | |
2332 | (iw_handler) atmel_config_commit, /* SIOCSIWCOMMIT */ | |
2333 | (iw_handler) atmel_get_name, /* SIOCGIWNAME */ | |
2334 | (iw_handler) NULL, /* SIOCSIWNWID */ | |
2335 | (iw_handler) NULL, /* SIOCGIWNWID */ | |
2336 | (iw_handler) atmel_set_freq, /* SIOCSIWFREQ */ | |
2337 | (iw_handler) atmel_get_freq, /* SIOCGIWFREQ */ | |
2338 | (iw_handler) atmel_set_mode, /* SIOCSIWMODE */ | |
2339 | (iw_handler) atmel_get_mode, /* SIOCGIWMODE */ | |
2340 | (iw_handler) NULL, /* SIOCSIWSENS */ | |
2341 | (iw_handler) NULL, /* SIOCGIWSENS */ | |
2342 | (iw_handler) NULL, /* SIOCSIWRANGE */ | |
2343 | (iw_handler) atmel_get_range, /* SIOCGIWRANGE */ | |
2344 | (iw_handler) NULL, /* SIOCSIWPRIV */ | |
2345 | (iw_handler) NULL, /* SIOCGIWPRIV */ | |
2346 | (iw_handler) NULL, /* SIOCSIWSTATS */ | |
2347 | (iw_handler) NULL, /* SIOCGIWSTATS */ | |
2348 | (iw_handler) NULL, /* SIOCSIWSPY */ | |
2349 | (iw_handler) NULL, /* SIOCGIWSPY */ | |
2350 | (iw_handler) NULL, /* -- hole -- */ | |
2351 | (iw_handler) NULL, /* -- hole -- */ | |
2352 | (iw_handler) atmel_set_wap, /* SIOCSIWAP */ | |
2353 | (iw_handler) atmel_get_wap, /* SIOCGIWAP */ | |
2354 | (iw_handler) NULL, /* -- hole -- */ | |
2355 | (iw_handler) NULL, /* SIOCGIWAPLIST */ | |
2356 | (iw_handler) atmel_set_scan, /* SIOCSIWSCAN */ | |
2357 | (iw_handler) atmel_get_scan, /* SIOCGIWSCAN */ | |
2358 | (iw_handler) atmel_set_essid, /* SIOCSIWESSID */ | |
2359 | (iw_handler) atmel_get_essid, /* SIOCGIWESSID */ | |
2360 | (iw_handler) NULL, /* SIOCSIWNICKN */ | |
2361 | (iw_handler) NULL, /* SIOCGIWNICKN */ | |
2362 | (iw_handler) NULL, /* -- hole -- */ | |
2363 | (iw_handler) NULL, /* -- hole -- */ | |
2364 | (iw_handler) atmel_set_rate, /* SIOCSIWRATE */ | |
2365 | (iw_handler) atmel_get_rate, /* SIOCGIWRATE */ | |
2366 | (iw_handler) atmel_set_rts, /* SIOCSIWRTS */ | |
2367 | (iw_handler) atmel_get_rts, /* SIOCGIWRTS */ | |
2368 | (iw_handler) atmel_set_frag, /* SIOCSIWFRAG */ | |
2369 | (iw_handler) atmel_get_frag, /* SIOCGIWFRAG */ | |
2370 | (iw_handler) NULL, /* SIOCSIWTXPOW */ | |
2371 | (iw_handler) NULL, /* SIOCGIWTXPOW */ | |
2372 | (iw_handler) atmel_set_retry, /* SIOCSIWRETRY */ | |
2373 | (iw_handler) atmel_get_retry, /* SIOCGIWRETRY */ | |
2374 | (iw_handler) atmel_set_encode, /* SIOCSIWENCODE */ | |
2375 | (iw_handler) atmel_get_encode, /* SIOCGIWENCODE */ | |
2376 | (iw_handler) atmel_set_power, /* SIOCSIWPOWER */ | |
2377 | (iw_handler) atmel_get_power, /* SIOCGIWPOWER */ | |
2378 | }; | |
2379 | ||
2380 | ||
2381 | static const iw_handler atmel_private_handler[] = | |
2382 | { | |
2383 | NULL, /* SIOCIWFIRSTPRIV */ | |
2384 | }; | |
2385 | ||
2386 | typedef struct atmel_priv_ioctl { | |
2387 | char id[32]; | |
2388 | unsigned char __user *data; | |
2389 | unsigned short len; | |
2390 | } atmel_priv_ioctl; | |
2391 | ||
2392 | ||
2393 | #define ATMELFWL SIOCIWFIRSTPRIV | |
2394 | #define ATMELIDIFC ATMELFWL + 1 | |
2395 | #define ATMELRD ATMELFWL + 2 | |
2396 | #define ATMELMAGIC 0x51807 | |
2397 | #define REGDOMAINSZ 20 | |
2398 | ||
2399 | static const struct iw_priv_args atmel_private_args[] = { | |
2400 | /*{ cmd, set_args, get_args, name } */ | |
2401 | { ATMELFWL, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | sizeof (atmel_priv_ioctl), IW_PRIV_TYPE_NONE, "atmelfwl" }, | |
2402 | { ATMELIDIFC, IW_PRIV_TYPE_NONE, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "atmelidifc" }, | |
2403 | { ATMELRD, IW_PRIV_TYPE_CHAR | REGDOMAINSZ, IW_PRIV_TYPE_NONE, "regdomain" }, | |
2404 | }; | |
2405 | ||
2406 | static const struct iw_handler_def atmel_handler_def = | |
2407 | { | |
2408 | .num_standard = sizeof(atmel_handler)/sizeof(iw_handler), | |
2409 | .num_private = sizeof(atmel_private_handler)/sizeof(iw_handler), | |
2410 | .num_private_args = sizeof(atmel_private_args)/sizeof(struct iw_priv_args), | |
2411 | .standard = (iw_handler *) atmel_handler, | |
2412 | .private = (iw_handler *) atmel_private_handler, | |
72f98d38 JT |
2413 | .private_args = (struct iw_priv_args *) atmel_private_args, |
2414 | .get_wireless_stats = atmel_get_wireless_stats | |
1da177e4 LT |
2415 | }; |
2416 | ||
2417 | static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
2418 | { | |
2419 | int i, rc = 0; | |
2420 | struct atmel_private *priv = netdev_priv(dev); | |
2421 | atmel_priv_ioctl com; | |
2422 | struct iwreq *wrq = (struct iwreq *) rq; | |
2423 | unsigned char *new_firmware; | |
2424 | char domain[REGDOMAINSZ+1]; | |
2425 | ||
2426 | switch (cmd) { | |
1da177e4 LT |
2427 | case ATMELIDIFC: |
2428 | wrq->u.param.value = ATMELMAGIC; | |
2429 | break; | |
2430 | ||
2431 | case ATMELFWL: | |
2432 | if (copy_from_user(&com, rq->ifr_data, sizeof(com))) { | |
2433 | rc = -EFAULT; | |
2434 | break; | |
2435 | } | |
2436 | ||
2437 | if (!capable(CAP_NET_ADMIN)) { | |
2438 | rc = -EPERM; | |
2439 | break; | |
2440 | } | |
2441 | ||
2442 | if (!(new_firmware = kmalloc(com.len, GFP_KERNEL))) { | |
2443 | rc = -ENOMEM; | |
2444 | break; | |
2445 | } | |
2446 | ||
2447 | if (copy_from_user(new_firmware, com.data, com.len)) { | |
2448 | kfree(new_firmware); | |
2449 | rc = -EFAULT; | |
2450 | break; | |
2451 | } | |
2452 | ||
2453 | if (priv->firmware) | |
2454 | kfree(priv->firmware); | |
2455 | ||
2456 | priv->firmware = new_firmware; | |
2457 | priv->firmware_length = com.len; | |
2458 | strncpy(priv->firmware_id, com.id, 31); | |
2459 | priv->firmware_id[31] = '\0'; | |
2460 | break; | |
2461 | ||
2462 | case ATMELRD: | |
2463 | if (copy_from_user(domain, rq->ifr_data, REGDOMAINSZ)) { | |
2464 | rc = -EFAULT; | |
2465 | break; | |
2466 | } | |
2467 | ||
2468 | if (!capable(CAP_NET_ADMIN)) { | |
2469 | rc = -EPERM; | |
2470 | break; | |
2471 | } | |
2472 | ||
2473 | domain[REGDOMAINSZ] = 0; | |
2474 | rc = -EINVAL; | |
2475 | for (i = 0; i < sizeof(channel_table)/sizeof(channel_table[0]); i++) { | |
2476 | /* strcasecmp doesn't exist in the library */ | |
2477 | char *a = channel_table[i].name; | |
2478 | char *b = domain; | |
2479 | while (*a) { | |
2480 | char c1 = *a++; | |
2481 | char c2 = *b++; | |
2482 | if (tolower(c1) != tolower(c2)) | |
2483 | break; | |
2484 | } | |
2485 | if (!*a && !*b) { | |
2486 | priv->config_reg_domain = channel_table[i].reg_domain; | |
2487 | rc = 0; | |
2488 | } | |
2489 | } | |
2490 | ||
2491 | if (rc == 0 && priv->station_state != STATION_STATE_DOWN) | |
2492 | rc = atmel_open(dev); | |
2493 | break; | |
2494 | ||
2495 | default: | |
2496 | rc = -EOPNOTSUPP; | |
2497 | } | |
2498 | ||
2499 | return rc; | |
2500 | } | |
2501 | ||
2502 | struct auth_body { | |
2503 | u16 alg; | |
2504 | u16 trans_seq; | |
2505 | u16 status; | |
2506 | u8 el_id; | |
2507 | u8 chall_text_len; | |
2508 | u8 chall_text[253]; | |
2509 | }; | |
2510 | ||
2511 | static void atmel_enter_state(struct atmel_private *priv, int new_state) | |
2512 | { | |
2513 | int old_state = priv->station_state; | |
2514 | ||
2515 | if (new_state == old_state) | |
2516 | return; | |
2517 | ||
2518 | priv->station_state = new_state; | |
2519 | ||
2520 | if (new_state == STATION_STATE_READY) { | |
2521 | netif_start_queue(priv->dev); | |
2522 | netif_carrier_on(priv->dev); | |
2523 | } | |
2524 | ||
2525 | if (old_state == STATION_STATE_READY) { | |
2526 | netif_carrier_off(priv->dev); | |
2527 | if (netif_running(priv->dev)) | |
2528 | netif_stop_queue(priv->dev); | |
2529 | priv->last_beacon_timestamp = 0; | |
2530 | } | |
2531 | } | |
2532 | ||
2533 | static void atmel_scan(struct atmel_private *priv, int specific_ssid) | |
2534 | { | |
2535 | struct { | |
2536 | u8 BSSID[6]; | |
2537 | u8 SSID[MAX_SSID_LENGTH]; | |
2538 | u8 scan_type; | |
2539 | u8 channel; | |
2540 | u16 BSS_type; | |
2541 | u16 min_channel_time; | |
2542 | u16 max_channel_time; | |
2543 | u8 options; | |
2544 | u8 SSID_size; | |
2545 | } cmd; | |
2546 | ||
2547 | memset(cmd.BSSID, 0xff, 6); | |
2548 | ||
2549 | if (priv->fast_scan) { | |
2550 | cmd.SSID_size = priv->SSID_size; | |
2551 | memcpy(cmd.SSID, priv->SSID, priv->SSID_size); | |
2552 | cmd.min_channel_time = cpu_to_le16(10); | |
2553 | cmd.max_channel_time = cpu_to_le16(50); | |
2554 | } else { | |
2555 | priv->BSS_list_entries = 0; | |
2556 | cmd.SSID_size = 0; | |
2557 | cmd.min_channel_time = cpu_to_le16(10); | |
2558 | cmd.max_channel_time = cpu_to_le16(120); | |
2559 | } | |
2560 | ||
2561 | cmd.options = 0; | |
2562 | ||
2563 | if (!specific_ssid) | |
2564 | cmd.options |= SCAN_OPTIONS_SITE_SURVEY; | |
2565 | ||
2566 | cmd.channel = (priv->channel & 0x7f); | |
2567 | cmd.scan_type = SCAN_TYPE_ACTIVE; | |
2568 | cmd.BSS_type = cpu_to_le16(priv->operating_mode == IW_MODE_ADHOC ? | |
2569 | BSS_TYPE_AD_HOC : BSS_TYPE_INFRASTRUCTURE); | |
2570 | ||
2571 | atmel_send_command(priv, CMD_Scan, &cmd, sizeof(cmd)); | |
2572 | ||
2573 | /* This must come after all hardware access to avoid being messed up | |
2574 | by stuff happening in interrupt context after we leave STATE_DOWN */ | |
2575 | atmel_enter_state(priv, STATION_STATE_SCANNING); | |
2576 | } | |
2577 | ||
2578 | static void join(struct atmel_private *priv, int type) | |
2579 | { | |
2580 | struct { | |
2581 | u8 BSSID[6]; | |
2582 | u8 SSID[MAX_SSID_LENGTH]; | |
2583 | u8 BSS_type; /* this is a short in a scan command - weird */ | |
2584 | u8 channel; | |
2585 | u16 timeout; | |
2586 | u8 SSID_size; | |
2587 | u8 reserved; | |
2588 | } cmd; | |
2589 | ||
2590 | cmd.SSID_size = priv->SSID_size; | |
2591 | memcpy(cmd.SSID, priv->SSID, priv->SSID_size); | |
2592 | memcpy(cmd.BSSID, priv->CurrentBSSID, 6); | |
2593 | cmd.channel = (priv->channel & 0x7f); | |
2594 | cmd.BSS_type = type; | |
2595 | cmd.timeout = cpu_to_le16(2000); | |
2596 | ||
2597 | atmel_send_command(priv, CMD_Join, &cmd, sizeof(cmd)); | |
2598 | } | |
2599 | ||
2600 | ||
2601 | static void start(struct atmel_private *priv, int type) | |
2602 | { | |
2603 | struct { | |
2604 | u8 BSSID[6]; | |
2605 | u8 SSID[MAX_SSID_LENGTH]; | |
2606 | u8 BSS_type; | |
2607 | u8 channel; | |
2608 | u8 SSID_size; | |
2609 | u8 reserved[3]; | |
2610 | } cmd; | |
2611 | ||
2612 | cmd.SSID_size = priv->SSID_size; | |
2613 | memcpy(cmd.SSID, priv->SSID, priv->SSID_size); | |
2614 | memcpy(cmd.BSSID, priv->BSSID, 6); | |
2615 | cmd.BSS_type = type; | |
2616 | cmd.channel = (priv->channel & 0x7f); | |
2617 | ||
2618 | atmel_send_command(priv, CMD_Start, &cmd, sizeof(cmd)); | |
2619 | } | |
2620 | ||
2621 | static void handle_beacon_probe(struct atmel_private *priv, u16 capability, u8 channel) | |
2622 | { | |
2623 | int rejoin = 0; | |
2624 | int new = capability & C80211_MGMT_CAPABILITY_ShortPreamble ? | |
2625 | SHORT_PREAMBLE : LONG_PREAMBLE; | |
2626 | ||
2627 | if (priv->preamble != new) { | |
2628 | priv->preamble = new; | |
2629 | rejoin = 1; | |
2630 | atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, new); | |
2631 | } | |
2632 | ||
2633 | if (priv->channel != channel) { | |
2634 | priv->channel = channel; | |
2635 | rejoin = 1; | |
2636 | atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_CHANNEL_POS, channel); | |
2637 | } | |
2638 | ||
2639 | if (rejoin) { | |
2640 | priv->station_is_associated = 0; | |
2641 | atmel_enter_state(priv, STATION_STATE_JOINNING); | |
2642 | ||
2643 | if (priv->operating_mode == IW_MODE_INFRA) | |
2644 | join(priv, BSS_TYPE_INFRASTRUCTURE); | |
2645 | else | |
2646 | join(priv, BSS_TYPE_AD_HOC); | |
2647 | } | |
2648 | } | |
2649 | ||
2650 | ||
2651 | static void send_authentication_request(struct atmel_private *priv, u8 *challenge, int challenge_len) | |
2652 | { | |
b453872c | 2653 | struct ieee80211_hdr header; |
1da177e4 LT |
2654 | struct auth_body auth; |
2655 | ||
b453872c | 2656 | header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH); |
1da177e4 LT |
2657 | header.duration_id = cpu_to_le16(0x8000); |
2658 | header.seq_ctl = 0; | |
2659 | memcpy(header.addr1, priv->CurrentBSSID, 6); | |
2660 | memcpy(header.addr2, priv->dev->dev_addr, 6); | |
2661 | memcpy(header.addr3, priv->CurrentBSSID, 6); | |
2662 | ||
2663 | if (priv->wep_is_on) { | |
2664 | auth.alg = cpu_to_le16(C80211_MGMT_AAN_SHAREDKEY); | |
2665 | /* no WEP for authentication frames with TrSeqNo 1 */ | |
2666 | if (priv->CurrentAuthentTransactionSeqNum != 1) | |
f13baae4 | 2667 | header.frame_ctl |= cpu_to_le16(IEEE80211_FCTL_PROTECTED); |
1da177e4 LT |
2668 | } else { |
2669 | auth.alg = cpu_to_le16(C80211_MGMT_AAN_OPENSYSTEM); | |
2670 | } | |
2671 | ||
2672 | auth.status = 0; | |
2673 | auth.trans_seq = cpu_to_le16(priv->CurrentAuthentTransactionSeqNum); | |
2674 | priv->ExpectedAuthentTransactionSeqNum = priv->CurrentAuthentTransactionSeqNum+1; | |
2675 | priv->CurrentAuthentTransactionSeqNum += 2; | |
2676 | ||
2677 | if (challenge_len != 0) { | |
2678 | auth.el_id = 16; /* challenge_text */ | |
2679 | auth.chall_text_len = challenge_len; | |
2680 | memcpy(auth.chall_text, challenge, challenge_len); | |
2681 | atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 8 + challenge_len); | |
2682 | } else { | |
2683 | atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 6); | |
2684 | } | |
2685 | } | |
2686 | ||
2687 | static void send_association_request(struct atmel_private *priv, int is_reassoc) | |
2688 | { | |
2689 | u8 *ssid_el_p; | |
2690 | int bodysize; | |
b453872c | 2691 | struct ieee80211_hdr header; |
1da177e4 LT |
2692 | struct ass_req_format { |
2693 | u16 capability; | |
2694 | u16 listen_interval; | |
2695 | u8 ap[6]; /* nothing after here directly accessible */ | |
2696 | u8 ssid_el_id; | |
2697 | u8 ssid_len; | |
2698 | u8 ssid[MAX_SSID_LENGTH]; | |
2699 | u8 sup_rates_el_id; | |
2700 | u8 sup_rates_len; | |
2701 | u8 rates[4]; | |
2702 | } body; | |
2703 | ||
b453872c JG |
2704 | header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT | |
2705 | (is_reassoc ? IEEE80211_STYPE_REASSOC_REQ : IEEE80211_STYPE_ASSOC_REQ)); | |
1da177e4 LT |
2706 | header.duration_id = cpu_to_le16(0x8000); |
2707 | header.seq_ctl = 0; | |
2708 | ||
2709 | memcpy(header.addr1, priv->CurrentBSSID, 6); | |
2710 | memcpy(header.addr2, priv->dev->dev_addr, 6); | |
2711 | memcpy(header.addr3, priv->CurrentBSSID, 6); | |
2712 | ||
2713 | body.capability = cpu_to_le16(C80211_MGMT_CAPABILITY_ESS); | |
2714 | if (priv->wep_is_on) | |
2715 | body.capability |= cpu_to_le16(C80211_MGMT_CAPABILITY_Privacy); | |
2716 | if (priv->preamble == SHORT_PREAMBLE) | |
2717 | body.capability |= cpu_to_le16(C80211_MGMT_CAPABILITY_ShortPreamble); | |
2718 | ||
2719 | body.listen_interval = cpu_to_le16(priv->listen_interval * priv->beacon_period); | |
2720 | ||
2721 | /* current AP address - only in reassoc frame */ | |
2722 | if (is_reassoc) { | |
2723 | memcpy(body.ap, priv->CurrentBSSID, 6); | |
2724 | ssid_el_p = (u8 *)&body.ssid_el_id; | |
2725 | bodysize = 18 + priv->SSID_size; | |
2726 | } else { | |
2727 | ssid_el_p = (u8 *)&body.ap[0]; | |
2728 | bodysize = 12 + priv->SSID_size; | |
2729 | } | |
2730 | ||
2731 | ssid_el_p[0]= C80211_MGMT_ElementID_SSID; | |
2732 | ssid_el_p[1] = priv->SSID_size; | |
2733 | memcpy(ssid_el_p + 2, priv->SSID, priv->SSID_size); | |
2734 | ssid_el_p[2 + priv->SSID_size] = C80211_MGMT_ElementID_SupportedRates; | |
2735 | ssid_el_p[3 + priv->SSID_size] = 4; /* len of suported rates */ | |
2736 | memcpy(ssid_el_p + 4 + priv->SSID_size, atmel_basic_rates, 4); | |
2737 | ||
2738 | atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize); | |
2739 | } | |
2740 | ||
b453872c | 2741 | static int is_frame_from_current_bss(struct atmel_private *priv, struct ieee80211_hdr *header) |
1da177e4 | 2742 | { |
b453872c | 2743 | if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS) |
1da177e4 LT |
2744 | return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0; |
2745 | else | |
2746 | return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0; | |
2747 | } | |
2748 | ||
2749 | static int retrieve_bss(struct atmel_private *priv) | |
2750 | { | |
2751 | int i; | |
2752 | int max_rssi = -128; | |
2753 | int max_index = -1; | |
2754 | ||
2755 | if (priv->BSS_list_entries == 0) | |
2756 | return -1; | |
2757 | ||
2758 | if (priv->connect_to_any_BSS) { | |
2759 | /* Select a BSS with the max-RSSI but of the same type and of the same WEP mode | |
2760 | and that it is not marked as 'bad' (i.e. we had previously failed to connect to | |
2761 | this BSS with the settings that we currently use) */ | |
2762 | priv->current_BSS = 0; | |
2763 | for(i=0; i<priv->BSS_list_entries; i++) { | |
2764 | if (priv->operating_mode == priv->BSSinfo[i].BSStype && | |
2765 | ((!priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) || | |
2766 | (priv->wep_is_on && priv->BSSinfo[i].UsingWEP)) && | |
2767 | !(priv->BSSinfo[i].channel & 0x80)) { | |
2768 | max_rssi = priv->BSSinfo[i].RSSI; | |
2769 | priv->current_BSS = max_index = i; | |
2770 | } | |
2771 | ||
2772 | } | |
2773 | return max_index; | |
2774 | } | |
2775 | ||
2776 | for(i=0; i<priv->BSS_list_entries; i++) { | |
2777 | if (priv->SSID_size == priv->BSSinfo[i].SSIDsize && | |
2778 | memcmp(priv->SSID, priv->BSSinfo[i].SSID, priv->SSID_size) == 0 && | |
2779 | priv->operating_mode == priv->BSSinfo[i].BSStype && | |
2780 | atmel_validate_channel(priv, priv->BSSinfo[i].channel) == 0) { | |
2781 | if (priv->BSSinfo[i].RSSI >= max_rssi) { | |
2782 | max_rssi = priv->BSSinfo[i].RSSI; | |
2783 | max_index = i; | |
2784 | } | |
2785 | } | |
2786 | } | |
2787 | return max_index; | |
2788 | } | |
2789 | ||
2790 | ||
b453872c | 2791 | static void store_bss_info(struct atmel_private *priv, struct ieee80211_hdr *header, |
1da177e4 LT |
2792 | u16 capability, u16 beacon_period, u8 channel, u8 rssi, |
2793 | u8 ssid_len, u8 *ssid, int is_beacon) | |
2794 | { | |
2795 | u8 *bss = capability & C80211_MGMT_CAPABILITY_ESS ? header->addr2 : header->addr3; | |
2796 | int i, index; | |
2797 | ||
2798 | for (index = -1, i = 0; i < priv->BSS_list_entries; i++) | |
2799 | if (memcmp(bss, priv->BSSinfo[i].BSSID, 6) == 0) | |
2800 | index = i; | |
2801 | ||
2802 | /* If we process a probe and an entry from this BSS exists | |
2803 | we will update the BSS entry with the info from this BSS. | |
2804 | If we process a beacon we will only update RSSI */ | |
2805 | ||
2806 | if (index == -1) { | |
2807 | if (priv->BSS_list_entries == MAX_BSS_ENTRIES) | |
2808 | return; | |
2809 | index = priv->BSS_list_entries++; | |
2810 | memcpy(priv->BSSinfo[index].BSSID, bss, 6); | |
2811 | priv->BSSinfo[index].RSSI = rssi; | |
2812 | } else { | |
2813 | if (rssi > priv->BSSinfo[index].RSSI) | |
2814 | priv->BSSinfo[index].RSSI = rssi; | |
2815 | if (is_beacon) | |
2816 | return; | |
2817 | } | |
2818 | ||
2819 | priv->BSSinfo[index].channel = channel; | |
2820 | priv->BSSinfo[index].beacon_period = beacon_period; | |
2821 | priv->BSSinfo[index].UsingWEP = capability & C80211_MGMT_CAPABILITY_Privacy; | |
2822 | memcpy(priv->BSSinfo[index].SSID, ssid, ssid_len); | |
2823 | priv->BSSinfo[index].SSIDsize = ssid_len; | |
2824 | ||
2825 | if (capability & C80211_MGMT_CAPABILITY_IBSS) | |
2826 | priv->BSSinfo[index].BSStype = IW_MODE_ADHOC; | |
2827 | else if (capability & C80211_MGMT_CAPABILITY_ESS) | |
2828 | priv->BSSinfo[index].BSStype =IW_MODE_INFRA; | |
2829 | ||
2830 | priv->BSSinfo[index].preamble = capability & C80211_MGMT_CAPABILITY_ShortPreamble ? | |
2831 | SHORT_PREAMBLE : LONG_PREAMBLE; | |
2832 | } | |
2833 | ||
2834 | static void authenticate(struct atmel_private *priv, u16 frame_len) | |
2835 | { | |
2836 | struct auth_body *auth = (struct auth_body *)priv->rx_buf; | |
2837 | u16 status = le16_to_cpu(auth->status); | |
2838 | u16 trans_seq_no = le16_to_cpu(auth->trans_seq); | |
2839 | ||
2840 | if (status == C80211_MGMT_SC_Success && !priv->wep_is_on) { | |
2841 | /* no WEP */ | |
2842 | if (priv->station_was_associated) { | |
2843 | atmel_enter_state(priv, STATION_STATE_REASSOCIATING); | |
2844 | send_association_request(priv, 1); | |
2845 | return; | |
2846 | } else { | |
2847 | atmel_enter_state(priv, STATION_STATE_ASSOCIATING); | |
2848 | send_association_request(priv, 0); | |
2849 | return; | |
2850 | } | |
2851 | } | |
2852 | ||
2853 | if (status == C80211_MGMT_SC_Success && priv->wep_is_on) { | |
2854 | /* WEP */ | |
2855 | if (trans_seq_no != priv->ExpectedAuthentTransactionSeqNum) | |
2856 | return; | |
2857 | ||
2858 | if (trans_seq_no == 0x0002 && | |
2859 | auth->el_id == C80211_MGMT_ElementID_ChallengeText) { | |
2860 | send_authentication_request(priv, auth->chall_text, auth->chall_text_len); | |
2861 | return; | |
2862 | } | |
2863 | ||
2864 | if (trans_seq_no == 0x0004) { | |
2865 | if(priv->station_was_associated) { | |
2866 | atmel_enter_state(priv, STATION_STATE_REASSOCIATING); | |
2867 | send_association_request(priv, 1); | |
2868 | return; | |
2869 | } else { | |
2870 | atmel_enter_state(priv, STATION_STATE_ASSOCIATING); | |
2871 | send_association_request(priv, 0); | |
2872 | return; | |
2873 | } | |
2874 | } | |
2875 | } | |
2876 | ||
2877 | if (status == C80211_MGMT_SC_AuthAlgNotSupported && priv->connect_to_any_BSS) { | |
2878 | int bss_index; | |
2879 | ||
2880 | priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80; | |
2881 | ||
2882 | if ((bss_index = retrieve_bss(priv)) != -1) { | |
2883 | atmel_join_bss(priv, bss_index); | |
2884 | return; | |
2885 | } | |
2886 | } | |
2887 | ||
2888 | ||
2889 | priv->AuthenticationRequestRetryCnt = 0; | |
2890 | atmel_enter_state(priv, STATION_STATE_MGMT_ERROR); | |
2891 | priv->station_is_associated = 0; | |
2892 | } | |
2893 | ||
2894 | static void associate(struct atmel_private *priv, u16 frame_len, u16 subtype) | |
2895 | { | |
2896 | struct ass_resp_format { | |
2897 | u16 capability; | |
2898 | u16 status; | |
2899 | u16 ass_id; | |
2900 | u8 el_id; | |
2901 | u8 length; | |
2902 | u8 rates[4]; | |
2903 | } *ass_resp = (struct ass_resp_format *)priv->rx_buf; | |
2904 | ||
2905 | u16 status = le16_to_cpu(ass_resp->status); | |
2906 | u16 ass_id = le16_to_cpu(ass_resp->ass_id); | |
2907 | u16 rates_len = ass_resp->length > 4 ? 4 : ass_resp->length; | |
2908 | ||
2909 | if (frame_len < 8 + rates_len) | |
2910 | return; | |
2911 | ||
2912 | if (status == C80211_MGMT_SC_Success) { | |
2913 | if (subtype == C80211_SUBTYPE_MGMT_ASS_RESPONSE) | |
2914 | priv->AssociationRequestRetryCnt = 0; | |
2915 | else | |
2916 | priv->ReAssociationRequestRetryCnt = 0; | |
2917 | ||
2918 | atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_STATION_ID_POS, ass_id & 0x3fff); | |
2919 | atmel_set_mib(priv, Phy_Mib_Type, PHY_MIB_RATE_SET_POS, ass_resp->rates, rates_len); | |
2920 | if (priv->power_mode == 0) { | |
2921 | priv->listen_interval = 1; | |
2922 | atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE); | |
2923 | atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1); | |
2924 | } else { | |
2925 | priv->listen_interval = 2; | |
2926 | atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS, PS_MODE); | |
2927 | atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 2); | |
2928 | } | |
2929 | ||
2930 | priv->station_is_associated = 1; | |
2931 | priv->station_was_associated = 1; | |
2932 | atmel_enter_state(priv, STATION_STATE_READY); | |
2933 | return; | |
2934 | } | |
2935 | ||
2936 | if (subtype == C80211_SUBTYPE_MGMT_ASS_RESPONSE && | |
2937 | status != C80211_MGMT_SC_AssDeniedBSSRate && | |
2938 | status != C80211_MGMT_SC_SupportCapabilities && | |
2939 | priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) { | |
2940 | mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES); | |
2941 | priv->AssociationRequestRetryCnt++; | |
2942 | send_association_request(priv, 0); | |
2943 | return; | |
2944 | } | |
2945 | ||
2946 | if (subtype == C80211_SUBTYPE_MGMT_REASS_RESPONSE && | |
2947 | status != C80211_MGMT_SC_AssDeniedBSSRate && | |
2948 | status != C80211_MGMT_SC_SupportCapabilities && | |
2949 | priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) { | |
2950 | mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES); | |
2951 | priv->ReAssociationRequestRetryCnt++; | |
2952 | send_association_request(priv, 1); | |
2953 | return; | |
2954 | } | |
2955 | ||
2956 | atmel_enter_state(priv, STATION_STATE_MGMT_ERROR); | |
2957 | priv->station_is_associated = 0; | |
2958 | ||
2959 | if(priv->connect_to_any_BSS) { | |
2960 | int bss_index; | |
2961 | priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80; | |
2962 | ||
2963 | if ((bss_index = retrieve_bss(priv)) != -1) | |
2964 | atmel_join_bss(priv, bss_index); | |
2965 | ||
2966 | } | |
2967 | } | |
2968 | ||
2969 | void atmel_join_bss(struct atmel_private *priv, int bss_index) | |
2970 | { | |
2971 | struct bss_info *bss = &priv->BSSinfo[bss_index]; | |
2972 | ||
2973 | memcpy(priv->CurrentBSSID, bss->BSSID, 6); | |
2974 | memcpy(priv->SSID, bss->SSID, priv->SSID_size = bss->SSIDsize); | |
2975 | ||
2976 | /* The WPA stuff cares about the current AP address */ | |
2977 | if (priv->use_wpa) | |
2978 | build_wpa_mib(priv); | |
2979 | ||
2980 | /* When switching to AdHoc turn OFF Power Save if needed */ | |
2981 | ||
2982 | if (bss->BSStype == IW_MODE_ADHOC && | |
2983 | priv->operating_mode != IW_MODE_ADHOC && | |
2984 | priv->power_mode) { | |
2985 | priv->power_mode = 0; | |
2986 | priv->listen_interval = 1; | |
2987 | atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE); | |
2988 | atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1); | |
2989 | } | |
2990 | ||
2991 | priv->operating_mode = bss->BSStype; | |
2992 | priv->channel = bss->channel & 0x7f; | |
2993 | priv->beacon_period = bss->beacon_period; | |
2994 | ||
2995 | if (priv->preamble != bss->preamble) { | |
2996 | priv->preamble = bss->preamble; | |
2997 | atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, bss->preamble); | |
2998 | } | |
2999 | ||
3000 | if (!priv->wep_is_on && bss->UsingWEP) { | |
3001 | atmel_enter_state(priv, STATION_STATE_MGMT_ERROR); | |
3002 | priv->station_is_associated = 0; | |
3003 | return; | |
3004 | } | |
3005 | ||
3006 | if (priv->wep_is_on && !bss->UsingWEP) { | |
3007 | atmel_enter_state(priv, STATION_STATE_MGMT_ERROR); | |
3008 | priv->station_is_associated = 0; | |
3009 | return; | |
3010 | } | |
3011 | ||
3012 | atmel_enter_state(priv, STATION_STATE_JOINNING); | |
3013 | ||
3014 | if (priv->operating_mode == IW_MODE_INFRA) | |
3015 | join(priv, BSS_TYPE_INFRASTRUCTURE); | |
3016 | else | |
3017 | join(priv, BSS_TYPE_AD_HOC); | |
3018 | } | |
3019 | ||
3020 | ||
3021 | static void restart_search(struct atmel_private *priv) | |
3022 | { | |
3023 | int bss_index; | |
3024 | ||
3025 | if (!priv->connect_to_any_BSS) { | |
3026 | atmel_scan(priv, 1); | |
3027 | } else { | |
3028 | priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80; | |
3029 | ||
3030 | if ((bss_index = retrieve_bss(priv)) != -1) | |
3031 | atmel_join_bss(priv, bss_index); | |
3032 | else | |
3033 | atmel_scan(priv, 0); | |
3034 | ||
3035 | } | |
3036 | } | |
3037 | ||
3038 | static void smooth_rssi(struct atmel_private *priv, u8 rssi) | |
3039 | { | |
3040 | u8 old = priv->wstats.qual.level; | |
3041 | u8 max_rssi = 42; /* 502-rmfd-revd max by experiment, default for now */ | |
3042 | ||
3043 | switch (priv->firmware_type) { | |
3044 | case ATMEL_FW_TYPE_502E: | |
3045 | max_rssi = 63; /* 502-rmfd-reve max by experiment */ | |
3046 | break; | |
3047 | default: | |
3048 | break; | |
3049 | } | |
3050 | ||
3051 | rssi = rssi * 100 / max_rssi; | |
3052 | if((rssi + old) % 2) | |
3053 | priv->wstats.qual.level = ((rssi + old)/2) + 1; | |
3054 | else | |
3055 | priv->wstats.qual.level = ((rssi + old)/2); | |
3056 | priv->wstats.qual.updated |= IW_QUAL_LEVEL_UPDATED; | |
3057 | priv->wstats.qual.updated &= ~IW_QUAL_LEVEL_INVALID; | |
3058 | } | |
3059 | ||
3060 | static void atmel_smooth_qual(struct atmel_private *priv) | |
3061 | { | |
3062 | unsigned long time_diff = (jiffies - priv->last_qual)/HZ; | |
3063 | while (time_diff--) { | |
3064 | priv->last_qual += HZ; | |
3065 | priv->wstats.qual.qual = priv->wstats.qual.qual/2; | |
3066 | priv->wstats.qual.qual += | |
3067 | priv->beacons_this_sec * priv->beacon_period * (priv->wstats.qual.level + 100) / 4000; | |
3068 | priv->beacons_this_sec = 0; | |
3069 | } | |
3070 | priv->wstats.qual.updated |= IW_QUAL_QUAL_UPDATED; | |
3071 | priv->wstats.qual.updated &= ~IW_QUAL_QUAL_INVALID; | |
3072 | } | |
3073 | ||
3074 | /* deals with incoming managment frames. */ | |
b453872c | 3075 | static void atmel_management_frame(struct atmel_private *priv, struct ieee80211_hdr *header, |
1da177e4 LT |
3076 | u16 frame_len, u8 rssi) |
3077 | { | |
3078 | u16 subtype; | |
3079 | ||
b453872c | 3080 | switch (subtype = le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_STYPE) { |
1da177e4 LT |
3081 | case C80211_SUBTYPE_MGMT_BEACON : |
3082 | case C80211_SUBTYPE_MGMT_ProbeResponse: | |
3083 | ||
3084 | /* beacon frame has multiple variable-length fields - | |
3085 | never let an engineer loose with a data structure design. */ | |
3086 | { | |
3087 | struct beacon_format { | |
3088 | u64 timestamp; | |
3089 | u16 interval; | |
3090 | u16 capability; | |
3091 | u8 ssid_el_id; | |
3092 | u8 ssid_length; | |
3093 | /* ssid here */ | |
3094 | u8 rates_el_id; | |
3095 | u8 rates_length; | |
3096 | /* rates here */ | |
3097 | u8 ds_el_id; | |
3098 | u8 ds_length; | |
3099 | /* ds here */ | |
3100 | } *beacon = (struct beacon_format *)priv->rx_buf; | |
3101 | ||
3102 | u8 channel, rates_length, ssid_length; | |
3103 | u64 timestamp = le64_to_cpu(beacon->timestamp); | |
3104 | u16 beacon_interval = le16_to_cpu(beacon->interval); | |
3105 | u16 capability = le16_to_cpu(beacon->capability); | |
3106 | u8 *beaconp = priv->rx_buf; | |
3107 | ssid_length = beacon->ssid_length; | |
3108 | /* this blows chunks. */ | |
3109 | if (frame_len < 14 || frame_len < ssid_length + 15) | |
3110 | return; | |
3111 | rates_length = beaconp[beacon->ssid_length + 15]; | |
3112 | if (frame_len < ssid_length + rates_length + 18) | |
3113 | return; | |
3114 | if (ssid_length > MAX_SSID_LENGTH) | |
3115 | return; | |
3116 | channel = beaconp[ssid_length + rates_length + 18]; | |
3117 | ||
3118 | if (priv->station_state == STATION_STATE_READY) { | |
3119 | smooth_rssi(priv, rssi); | |
3120 | if (is_frame_from_current_bss(priv, header)) { | |
3121 | priv->beacons_this_sec++; | |
3122 | atmel_smooth_qual(priv); | |
3123 | if (priv->last_beacon_timestamp) { | |
3124 | /* Note truncate this to 32 bits - kernel can't divide a long long */ | |
3125 | u32 beacon_delay = timestamp - priv->last_beacon_timestamp; | |
3126 | int beacons = beacon_delay / (beacon_interval * 1000); | |
3127 | if (beacons > 1) | |
3128 | priv->wstats.miss.beacon += beacons - 1; | |
3129 | } | |
3130 | priv->last_beacon_timestamp = timestamp; | |
3131 | handle_beacon_probe(priv, capability, channel); | |
3132 | } | |
3133 | } | |
3134 | ||
3135 | if (priv->station_state == STATION_STATE_SCANNING ) | |
3136 | store_bss_info(priv, header, capability, beacon_interval, channel, | |
3137 | rssi, ssid_length, &beacon->rates_el_id, | |
3138 | subtype == C80211_SUBTYPE_MGMT_BEACON) ; | |
3139 | } | |
3140 | break; | |
3141 | ||
3142 | case C80211_SUBTYPE_MGMT_Authentication: | |
3143 | ||
3144 | if (priv->station_state == STATION_STATE_AUTHENTICATING) | |
3145 | authenticate(priv, frame_len); | |
3146 | ||
3147 | break; | |
3148 | ||
3149 | case C80211_SUBTYPE_MGMT_ASS_RESPONSE: | |
3150 | case C80211_SUBTYPE_MGMT_REASS_RESPONSE: | |
3151 | ||
3152 | if (priv->station_state == STATION_STATE_ASSOCIATING || | |
3153 | priv->station_state == STATION_STATE_REASSOCIATING) | |
3154 | associate(priv, frame_len, subtype); | |
3155 | ||
3156 | break; | |
3157 | ||
3158 | case C80211_SUBTYPE_MGMT_DISASSOSIATION: | |
3159 | if (priv->station_is_associated && | |
3160 | priv->operating_mode == IW_MODE_INFRA && | |
3161 | is_frame_from_current_bss(priv, header)) { | |
3162 | priv->station_was_associated = 0; | |
3163 | priv->station_is_associated = 0; | |
3164 | ||
3165 | atmel_enter_state(priv, STATION_STATE_JOINNING); | |
3166 | join(priv, BSS_TYPE_INFRASTRUCTURE); | |
3167 | } | |
3168 | ||
3169 | break; | |
3170 | ||
3171 | case C80211_SUBTYPE_MGMT_Deauthentication: | |
3172 | if (priv->operating_mode == IW_MODE_INFRA && | |
3173 | is_frame_from_current_bss(priv, header)) { | |
3174 | priv->station_was_associated = 0; | |
3175 | ||
3176 | atmel_enter_state(priv, STATION_STATE_JOINNING); | |
3177 | join(priv, BSS_TYPE_INFRASTRUCTURE); | |
3178 | } | |
3179 | ||
3180 | break; | |
3181 | } | |
3182 | } | |
3183 | ||
3184 | /* run when timer expires */ | |
3185 | static void atmel_management_timer(u_long a) | |
3186 | { | |
3187 | struct net_device *dev = (struct net_device *) a; | |
3188 | struct atmel_private *priv = netdev_priv(dev); | |
3189 | unsigned long flags; | |
3190 | ||
3191 | /* Check if the card has been yanked. */ | |
3192 | if (priv->card && priv->present_callback && | |
3193 | !(*priv->present_callback)(priv->card)) | |
3194 | return; | |
3195 | ||
3196 | spin_lock_irqsave(&priv->irqlock, flags); | |
3197 | ||
3198 | switch (priv->station_state) { | |
3199 | ||
3200 | case STATION_STATE_AUTHENTICATING: | |
3201 | if (priv->AuthenticationRequestRetryCnt >= MAX_AUTHENTICATION_RETRIES) { | |
3202 | atmel_enter_state(priv, STATION_STATE_MGMT_ERROR); | |
3203 | priv->station_is_associated = 0; | |
3204 | priv->AuthenticationRequestRetryCnt = 0; | |
3205 | restart_search(priv); | |
3206 | } else { | |
3207 | priv->AuthenticationRequestRetryCnt++; | |
3208 | priv->CurrentAuthentTransactionSeqNum = 0x0001; | |
3209 | mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES); | |
3210 | send_authentication_request(priv, NULL, 0); | |
3211 | } | |
3212 | ||
3213 | break; | |
3214 | ||
3215 | case STATION_STATE_ASSOCIATING: | |
3216 | if (priv->AssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) { | |
3217 | atmel_enter_state(priv, STATION_STATE_MGMT_ERROR); | |
3218 | priv->station_is_associated = 0; | |
3219 | priv->AssociationRequestRetryCnt = 0; | |
3220 | restart_search(priv); | |
3221 | } else { | |
3222 | priv->AssociationRequestRetryCnt++; | |
3223 | mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES); | |
3224 | send_association_request(priv, 0); | |
3225 | } | |
3226 | ||
3227 | break; | |
3228 | ||
3229 | case STATION_STATE_REASSOCIATING: | |
3230 | if (priv->ReAssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) { | |
3231 | atmel_enter_state(priv, STATION_STATE_MGMT_ERROR); | |
3232 | priv->station_is_associated = 0; | |
3233 | priv->ReAssociationRequestRetryCnt = 0; | |
3234 | restart_search(priv); | |
3235 | } else { | |
3236 | priv->ReAssociationRequestRetryCnt++; | |
3237 | mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES); | |
3238 | send_association_request(priv, 1); | |
3239 | } | |
3240 | ||
3241 | break; | |
3242 | ||
3243 | default: | |
3244 | break; | |
3245 | } | |
3246 | ||
3247 | spin_unlock_irqrestore(&priv->irqlock, flags); | |
3248 | } | |
3249 | ||
3250 | static void atmel_command_irq(struct atmel_private *priv) | |
3251 | { | |
3252 | u8 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET)); | |
3253 | u8 command = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET)); | |
3254 | int fast_scan; | |
3255 | ||
3256 | if (status == CMD_STATUS_IDLE || | |
3257 | status == CMD_STATUS_IN_PROGRESS) | |
3258 | return; | |
3259 | ||
3260 | switch (command){ | |
3261 | ||
3262 | case CMD_Start: | |
3263 | if (status == CMD_STATUS_COMPLETE) { | |
3264 | priv->station_was_associated = priv->station_is_associated; | |
3265 | atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS, | |
3266 | (u8 *)priv->CurrentBSSID, 6); | |
3267 | atmel_enter_state(priv, STATION_STATE_READY); | |
3268 | } | |
3269 | break; | |
3270 | ||
3271 | case CMD_Scan: | |
3272 | fast_scan = priv->fast_scan; | |
3273 | priv->fast_scan = 0; | |
3274 | ||
3275 | if (status != CMD_STATUS_COMPLETE) { | |
3276 | atmel_scan(priv, 1); | |
3277 | } else { | |
3278 | int bss_index = retrieve_bss(priv); | |
3279 | if (bss_index != -1) { | |
3280 | atmel_join_bss(priv, bss_index); | |
3281 | } else if (priv->operating_mode == IW_MODE_ADHOC && | |
3282 | priv->SSID_size != 0) { | |
3283 | start(priv, BSS_TYPE_AD_HOC); | |
3284 | } else { | |
3285 | priv->fast_scan = !fast_scan; | |
3286 | atmel_scan(priv, 1); | |
3287 | } | |
3288 | priv->site_survey_state = SITE_SURVEY_COMPLETED; | |
3289 | } | |
3290 | break; | |
3291 | ||
3292 | case CMD_SiteSurvey: | |
3293 | priv->fast_scan = 0; | |
3294 | ||
3295 | if (status != CMD_STATUS_COMPLETE) | |
3296 | return; | |
3297 | ||
3298 | priv->site_survey_state = SITE_SURVEY_COMPLETED; | |
3299 | if (priv->station_is_associated) { | |
3300 | atmel_enter_state(priv, STATION_STATE_READY); | |
3301 | } else { | |
3302 | atmel_scan(priv, 1); | |
3303 | } | |
3304 | break; | |
3305 | ||
3306 | case CMD_Join: | |
3307 | if (status == CMD_STATUS_COMPLETE) { | |
3308 | if (priv->operating_mode == IW_MODE_ADHOC) { | |
3309 | priv->station_was_associated = priv->station_is_associated; | |
3310 | atmel_enter_state(priv, STATION_STATE_READY); | |
3311 | } else { | |
3312 | priv->AuthenticationRequestRetryCnt = 0; | |
3313 | atmel_enter_state(priv, STATION_STATE_AUTHENTICATING); | |
3314 | ||
3315 | mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES); | |
3316 | priv->CurrentAuthentTransactionSeqNum = 0x0001; | |
3317 | send_authentication_request(priv, NULL, 0); | |
3318 | } | |
3319 | return; | |
3320 | } | |
3321 | ||
3322 | atmel_scan(priv, 1); | |
3323 | ||
3324 | } | |
3325 | } | |
3326 | ||
3327 | static int atmel_wakeup_firmware(struct atmel_private *priv) | |
3328 | { | |
3329 | struct host_info_struct *iface = &priv->host_info; | |
3330 | u16 mr1, mr3; | |
3331 | int i; | |
3332 | ||
3333 | if (priv->card_type == CARD_TYPE_SPI_FLASH) | |
3334 | atmel_set_gcr(priv->dev, GCR_REMAP); | |
3335 | ||
3336 | /* wake up on-board processor */ | |
3337 | atmel_clear_gcr(priv->dev, 0x0040); | |
3338 | atmel_write16(priv->dev, BSR, BSS_SRAM); | |
3339 | ||
3340 | if (priv->card_type == CARD_TYPE_SPI_FLASH) | |
3341 | mdelay(100); | |
3342 | ||
3343 | /* and wait for it */ | |
3344 | for (i = LOOP_RETRY_LIMIT; i; i--) { | |
3345 | mr1 = atmel_read16(priv->dev, MR1); | |
3346 | mr3 = atmel_read16(priv->dev, MR3); | |
3347 | ||
3348 | if (mr3 & MAC_BOOT_COMPLETE) | |
3349 | break; | |
3350 | if (mr1 & MAC_BOOT_COMPLETE && | |
3351 | priv->bus_type == BUS_TYPE_PCCARD) | |
3352 | break; | |
3353 | } | |
3354 | ||
3355 | if (i == 0) { | |
3356 | printk(KERN_ALERT "%s: MAC failed to boot.\n", priv->dev->name); | |
3357 | return 0; | |
3358 | } | |
3359 | ||
3360 | if ((priv->host_info_base = atmel_read16(priv->dev, MR2)) == 0xffff) { | |
3361 | printk(KERN_ALERT "%s: card missing.\n", priv->dev->name); | |
3362 | return 0; | |
3363 | } | |
3364 | ||
3365 | /* now check for completion of MAC initialization through | |
3366 | the FunCtrl field of the IFACE, poll MR1 to detect completion of | |
3367 | MAC initialization, check completion status, set interrupt mask, | |
3368 | enables interrupts and calls Tx and Rx initialization functions */ | |
3369 | ||
3370 | atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET), FUNC_CTRL_INIT_COMPLETE); | |
3371 | ||
3372 | for (i = LOOP_RETRY_LIMIT; i; i--) { | |
3373 | mr1 = atmel_read16(priv->dev, MR1); | |
3374 | mr3 = atmel_read16(priv->dev, MR3); | |
3375 | ||
3376 | if (mr3 & MAC_INIT_COMPLETE) | |
3377 | break; | |
3378 | if (mr1 & MAC_INIT_COMPLETE && | |
3379 | priv->bus_type == BUS_TYPE_PCCARD) | |
3380 | break; | |
3381 | } | |
3382 | ||
3383 | if (i == 0) { | |
3384 | printk(KERN_ALERT "%s: MAC failed to initialise.\n", priv->dev->name); | |
3385 | return 0; | |
3386 | } | |
3387 | ||
3388 | /* Check for MAC_INIT_OK only on the register that the MAC_INIT_OK was set */ | |
3389 | if ((mr3 & MAC_INIT_COMPLETE) && | |
3390 | !(atmel_read16(priv->dev, MR3) & MAC_INIT_OK)) { | |
3391 | printk(KERN_ALERT "%s: MAC failed MR3 self-test.\n", priv->dev->name); | |
3392 | return 0; | |
3393 | } | |
3394 | if ((mr1 & MAC_INIT_COMPLETE) && | |
3395 | !(atmel_read16(priv->dev, MR1) & MAC_INIT_OK)) { | |
3396 | printk(KERN_ALERT "%s: MAC failed MR1 self-test.\n", priv->dev->name); | |
3397 | return 0; | |
3398 | } | |
3399 | ||
3400 | atmel_copy_to_host(priv->dev, (unsigned char *)iface, | |
3401 | priv->host_info_base, sizeof(*iface)); | |
3402 | ||
3403 | iface->tx_buff_pos = le16_to_cpu(iface->tx_buff_pos); | |
3404 | iface->tx_buff_size = le16_to_cpu(iface->tx_buff_size); | |
3405 | iface->tx_desc_pos = le16_to_cpu(iface->tx_desc_pos); | |
3406 | iface->tx_desc_count = le16_to_cpu(iface->tx_desc_count); | |
3407 | iface->rx_buff_pos = le16_to_cpu(iface->rx_buff_pos); | |
3408 | iface->rx_buff_size = le16_to_cpu(iface->rx_buff_size); | |
3409 | iface->rx_desc_pos = le16_to_cpu(iface->rx_desc_pos); | |
3410 | iface->rx_desc_count = le16_to_cpu(iface->rx_desc_count); | |
3411 | iface->build_version = le16_to_cpu(iface->build_version); | |
3412 | iface->command_pos = le16_to_cpu(iface->command_pos); | |
3413 | iface->major_version = le16_to_cpu(iface->major_version); | |
3414 | iface->minor_version = le16_to_cpu(iface->minor_version); | |
3415 | iface->func_ctrl = le16_to_cpu(iface->func_ctrl); | |
3416 | iface->mac_status = le16_to_cpu(iface->mac_status); | |
3417 | ||
3418 | return 1; | |
3419 | } | |
3420 | ||
3421 | /* determine type of memory and MAC address */ | |
3422 | static int probe_atmel_card(struct net_device *dev) | |
3423 | { | |
3424 | int rc = 0; | |
3425 | struct atmel_private *priv = netdev_priv(dev); | |
3426 | ||
3427 | /* reset pccard */ | |
3428 | if (priv->bus_type == BUS_TYPE_PCCARD) | |
3429 | atmel_write16(dev, GCR, 0x0060); | |
3430 | ||
3431 | atmel_write16(dev, GCR, 0x0040); | |
3432 | mdelay(500); | |
3433 | ||
3434 | if (atmel_read16(dev, MR2) == 0) { | |
3435 | /* No stored firmware so load a small stub which just | |
3436 | tells us the MAC address */ | |
3437 | int i; | |
3438 | priv->card_type = CARD_TYPE_EEPROM; | |
3439 | atmel_write16(dev, BSR, BSS_IRAM); | |
3440 | atmel_copy_to_card(dev, 0, mac_reader, sizeof(mac_reader)); | |
3441 | atmel_set_gcr(dev, GCR_REMAP); | |
3442 | atmel_clear_gcr(priv->dev, 0x0040); | |
3443 | atmel_write16(dev, BSR, BSS_SRAM); | |
3444 | for (i = LOOP_RETRY_LIMIT; i; i--) | |
3445 | if (atmel_read16(dev, MR3) & MAC_BOOT_COMPLETE) | |
3446 | break; | |
3447 | if (i == 0) { | |
3448 | printk(KERN_ALERT "%s: MAC failed to boot MAC address reader.\n", dev->name); | |
3449 | } else { | |
3450 | atmel_copy_to_host(dev, dev->dev_addr, atmel_read16(dev, MR2), 6); | |
3451 | /* got address, now squash it again until the network | |
3452 | interface is opened */ | |
3453 | if (priv->bus_type == BUS_TYPE_PCCARD) | |
3454 | atmel_write16(dev, GCR, 0x0060); | |
3455 | atmel_write16(dev, GCR, 0x0040); | |
3456 | rc = 1; | |
3457 | } | |
3458 | } else if (atmel_read16(dev, MR4) == 0) { | |
3459 | /* Mac address easy in this case. */ | |
3460 | priv->card_type = CARD_TYPE_PARALLEL_FLASH; | |
3461 | atmel_write16(dev, BSR, 1); | |
3462 | atmel_copy_to_host(dev, dev->dev_addr, 0xc000, 6); | |
3463 | atmel_write16(dev, BSR, 0x200); | |
3464 | rc = 1; | |
3465 | } else { | |
3466 | /* Standard firmware in flash, boot it up and ask | |
3467 | for the Mac Address */ | |
3468 | priv->card_type = CARD_TYPE_SPI_FLASH; | |
3469 | if (atmel_wakeup_firmware(priv)) { | |
3470 | atmel_get_mib(priv, Mac_Address_Mib_Type, 0, dev->dev_addr, 6); | |
3471 | ||
3472 | /* got address, now squash it again until the network | |
3473 | interface is opened */ | |
3474 | if (priv->bus_type == BUS_TYPE_PCCARD) | |
3475 | atmel_write16(dev, GCR, 0x0060); | |
3476 | atmel_write16(dev, GCR, 0x0040); | |
3477 | rc = 1; | |
3478 | } | |
3479 | } | |
3480 | ||
3481 | if (rc) { | |
3482 | if (dev->dev_addr[0] == 0xFF) { | |
3483 | u8 default_mac[] = {0x00,0x04, 0x25, 0x00, 0x00, 0x00}; | |
3484 | printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name); | |
3485 | memcpy(dev->dev_addr, default_mac, 6); | |
3486 | } | |
3487 | printk(KERN_INFO "%s: MAC address %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n", | |
3488 | dev->name, | |
3489 | dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], | |
3490 | dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5] ); | |
3491 | ||
3492 | } | |
3493 | ||
3494 | return rc; | |
3495 | } | |
3496 | ||
3497 | static void build_wep_mib(struct atmel_private *priv) | |
3498 | /* Move the encyption information on the MIB structure. | |
3499 | This routine is for the pre-WPA firmware: later firmware has | |
3500 | a different format MIB and a different routine. */ | |
3501 | { | |
3502 | struct { /* NB this is matched to the hardware, don't change. */ | |
3503 | u8 wep_is_on; | |
3504 | u8 default_key; /* 0..3 */ | |
3505 | u8 reserved; | |
3506 | u8 exclude_unencrypted; | |
3507 | ||
3508 | u32 WEPICV_error_count; | |
3509 | u32 WEP_excluded_count; | |
3510 | ||
3511 | u8 wep_keys[MAX_ENCRYPTION_KEYS][13]; | |
3512 | u8 encryption_level; /* 0, 1, 2 */ | |
3513 | u8 reserved2[3]; | |
3514 | } mib; | |
3515 | int i; | |
3516 | ||
3517 | mib.wep_is_on = priv->wep_is_on; | |
3518 | if (priv->wep_is_on) { | |
3519 | if (priv->wep_key_len[priv->default_key] > 5) | |
3520 | mib.encryption_level = 2; | |
3521 | else | |
3522 | mib.encryption_level = 1; | |
3523 | } else { | |
3524 | mib.encryption_level = 0; | |
3525 | } | |
3526 | ||
3527 | mib.default_key = priv->default_key; | |
3528 | mib.exclude_unencrypted = priv->exclude_unencrypted; | |
3529 | ||
3530 | for(i = 0; i < MAX_ENCRYPTION_KEYS; i++) | |
3531 | memcpy(mib.wep_keys[i], priv->wep_keys[i], 13); | |
3532 | ||
3533 | atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib)); | |
3534 | } | |
3535 | ||
3536 | static void build_wpa_mib(struct atmel_private *priv) | |
3537 | { | |
3538 | /* This is for the later (WPA enabled) firmware. */ | |
3539 | ||
3540 | struct { /* NB this is matched to the hardware, don't change. */ | |
3541 | u8 cipher_default_key_value[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE]; | |
3542 | u8 receiver_address[6]; | |
3543 | u8 wep_is_on; | |
3544 | u8 default_key; /* 0..3 */ | |
3545 | u8 group_key; | |
3546 | u8 exclude_unencrypted; | |
3547 | u8 encryption_type; | |
3548 | u8 reserved; | |
3549 | ||
3550 | u32 WEPICV_error_count; | |
3551 | u32 WEP_excluded_count; | |
3552 | ||
3553 | u8 key_RSC[4][8]; | |
3554 | } mib; | |
3555 | ||
3556 | int i; | |
3557 | ||
3558 | mib.wep_is_on = priv->wep_is_on; | |
3559 | mib.exclude_unencrypted = priv->exclude_unencrypted; | |
3560 | memcpy(mib.receiver_address, priv->CurrentBSSID, 6); | |
3561 | ||
3562 | /* zero all the keys before adding in valid ones. */ | |
3563 | memset(mib.cipher_default_key_value, 0, sizeof(mib.cipher_default_key_value)); | |
3564 | ||
3565 | if (priv->wep_is_on) { | |
3566 | /* There's a comment in the Atmel code to the effect that this is only valid | |
3567 | when still using WEP, it may need to be set to something to use WPA */ | |
3568 | memset(mib.key_RSC, 0, sizeof(mib.key_RSC)); | |
3569 | ||
3570 | mib.default_key = mib.group_key = 255; | |
3571 | for (i = 0; i < MAX_ENCRYPTION_KEYS; i++) { | |
3572 | if (priv->wep_key_len[i] > 0) { | |
3573 | memcpy(mib.cipher_default_key_value[i], priv->wep_keys[i], MAX_ENCRYPTION_KEY_SIZE); | |
3574 | if (i == priv->default_key) { | |
3575 | mib.default_key = i; | |
3576 | mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 7; | |
3577 | mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->pairwise_cipher_suite; | |
3578 | } else { | |
3579 | mib.group_key = i; | |
3580 | priv->group_cipher_suite = priv->pairwise_cipher_suite; | |
3581 | mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 1; | |
3582 | mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->group_cipher_suite; | |
3583 | } | |
3584 | } | |
3585 | } | |
3586 | if (mib.default_key == 255) | |
3587 | mib.default_key = mib.group_key != 255 ? mib.group_key : 0; | |
3588 | if (mib.group_key == 255) | |
3589 | mib.group_key = mib.default_key; | |
3590 | ||
3591 | } | |
3592 | ||
3593 | atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib)); | |
3594 | } | |
3595 | ||
3596 | static int reset_atmel_card(struct net_device *dev) | |
3597 | { | |
3598 | /* do everything necessary to wake up the hardware, including | |
3599 | waiting for the lightning strike and throwing the knife switch.... | |
3600 | ||
3601 | set all the Mib values which matter in the card to match | |
3602 | their settings in the atmel_private structure. Some of these | |
3603 | can be altered on the fly, but many (WEP, infrastucture or ad-hoc) | |
3604 | can only be changed by tearing down the world and coming back through | |
3605 | here. | |
3606 | ||
3607 | This routine is also responsible for initialising some | |
3608 | hardware-specific fields in the atmel_private structure, | |
3609 | including a copy of the firmware's hostinfo stucture | |
3610 | which is the route into the rest of the firmare datastructures. */ | |
3611 | ||
3612 | struct atmel_private *priv = netdev_priv(dev); | |
3613 | u8 configuration; | |
3614 | ||
3615 | /* data to add to the firmware names, in priority order | |
3616 | this implemenents firmware versioning */ | |
3617 | ||
3618 | static char *firmware_modifier[] = { | |
3619 | "-wpa", | |
3620 | "", | |
3621 | NULL | |
3622 | }; | |
3623 | ||
3624 | /* reset pccard */ | |
3625 | if (priv->bus_type == BUS_TYPE_PCCARD) | |
3626 | atmel_write16(priv->dev, GCR, 0x0060); | |
3627 | ||
3628 | /* stop card , disable interrupts */ | |
3629 | atmel_write16(priv->dev, GCR, 0x0040); | |
3630 | ||
3631 | if (priv->card_type == CARD_TYPE_EEPROM) { | |
3632 | /* copy in firmware if needed */ | |
3633 | const struct firmware *fw_entry = NULL; | |
3634 | unsigned char *fw; | |
3635 | int len = priv->firmware_length; | |
3636 | if (!(fw = priv->firmware)) { | |
3637 | if (priv->firmware_type == ATMEL_FW_TYPE_NONE) { | |
3638 | if (strlen(priv->firmware_id) == 0) { | |
3639 | printk(KERN_INFO | |
3640 | "%s: card type is unknown: assuming at76c502 firmware is OK.\n", | |
3641 | dev->name); | |
3642 | printk(KERN_INFO | |
3643 | "%s: if not, use the firmware= module parameter.\n", | |
3644 | dev->name); | |
3645 | strcpy(priv->firmware_id, "atmel_at76c502.bin"); | |
3646 | } | |
3647 | if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) != 0) { | |
3648 | printk(KERN_ALERT | |
3649 | "%s: firmware %s is missing, cannot continue.\n", | |
3650 | dev->name, priv->firmware_id); | |
3651 | return 0; | |
3652 | } | |
3653 | } else { | |
3654 | int fw_index = 0; | |
3655 | int success = 0; | |
3656 | ||
3657 | /* get firmware filename entry based on firmware type ID */ | |
3658 | while (fw_table[fw_index].fw_type != priv->firmware_type | |
3659 | && fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE) | |
3660 | fw_index++; | |
3661 | ||
3662 | /* construct the actual firmware file name */ | |
3663 | if (fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE) { | |
3664 | int i; | |
3665 | for (i = 0; firmware_modifier[i]; i++) { | |
3666 | snprintf(priv->firmware_id, 32, "%s%s.%s", fw_table[fw_index].fw_file, | |
3667 | firmware_modifier[i], fw_table[fw_index].fw_file_ext); | |
3668 | priv->firmware_id[31] = '\0'; | |
3669 | if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) == 0) { | |
3670 | success = 1; | |
3671 | break; | |
3672 | } | |
3673 | } | |
3674 | } | |
3675 | if (!success) { | |
3676 | printk(KERN_ALERT | |
3677 | "%s: firmware %s is missing, cannot start.\n", | |
3678 | dev->name, priv->firmware_id); | |
3679 | priv->firmware_id[0] = '\0'; | |
3680 | return 0; | |
3681 | } | |
3682 | } | |
3683 | ||
3684 | fw = fw_entry->data; | |
3685 | len = fw_entry->size; | |
3686 | } | |
3687 | ||
3688 | if (len <= 0x6000) { | |
3689 | atmel_write16(priv->dev, BSR, BSS_IRAM); | |
3690 | atmel_copy_to_card(priv->dev, 0, fw, len); | |
3691 | atmel_set_gcr(priv->dev, GCR_REMAP); | |
3692 | } else { | |
3693 | /* Remap */ | |
3694 | atmel_set_gcr(priv->dev, GCR_REMAP); | |
3695 | atmel_write16(priv->dev, BSR, BSS_IRAM); | |
3696 | atmel_copy_to_card(priv->dev, 0, fw, 0x6000); | |
3697 | atmel_write16(priv->dev, BSR, 0x2ff); | |
3698 | atmel_copy_to_card(priv->dev, 0x8000, &fw[0x6000], len - 0x6000); | |
3699 | } | |
3700 | ||
3701 | if (fw_entry) | |
3702 | release_firmware(fw_entry); | |
3703 | } | |
3704 | ||
3705 | if (!atmel_wakeup_firmware(priv)) | |
3706 | return 0; | |
3707 | ||
3708 | /* Check the version and set the correct flag for wpa stuff, | |
3709 | old and new firmware is incompatible. | |
3710 | The pre-wpa 3com firmware reports major version 5, | |
3711 | the wpa 3com firmware is major version 4 and doesn't need | |
3712 | the 3com broken-ness filter. */ | |
3713 | priv->use_wpa = (priv->host_info.major_version == 4); | |
3714 | priv->radio_on_broken = (priv->host_info.major_version == 5); | |
3715 | ||
3716 | /* unmask all irq sources */ | |
3717 | atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_MASK_OFFSET), 0xff); | |
3718 | ||
3719 | /* int Tx system and enable Tx */ | |
3720 | atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, 0), 0); | |
3721 | atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, 0), 0x80000000L); | |
3722 | atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, 0), 0); | |
3723 | atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, 0), 0); | |
3724 | ||
3725 | priv->tx_desc_free = priv->host_info.tx_desc_count; | |
3726 | priv->tx_desc_head = 0; | |
3727 | priv->tx_desc_tail = 0; | |
3728 | priv->tx_desc_previous = 0; | |
3729 | priv->tx_free_mem = priv->host_info.tx_buff_size; | |
3730 | priv->tx_buff_head = 0; | |
3731 | priv->tx_buff_tail = 0; | |
3732 | ||
3733 | configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET)); | |
3734 | atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET), | |
3735 | configuration | FUNC_CTRL_TxENABLE); | |
3736 | ||
3737 | /* init Rx system and enable */ | |
3738 | priv->rx_desc_head = 0; | |
3739 | ||
3740 | configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET)); | |
3741 | atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET), | |
3742 | configuration | FUNC_CTRL_RxENABLE); | |
3743 | ||
3744 | if (!priv->radio_on_broken) { | |
3745 | if (atmel_send_command_wait(priv, CMD_EnableRadio, NULL, 0) == | |
3746 | CMD_STATUS_REJECTED_RADIO_OFF) { | |
3747 | printk(KERN_INFO | |
3748 | "%s: cannot turn the radio on. (Hey radio, you're beautiful!)\n", | |
3749 | dev->name); | |
3750 | return 0; | |
3751 | } | |
3752 | } | |
3753 | ||
3754 | /* set up enough MIB values to run. */ | |
3755 | atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_AUTO_TX_RATE_POS, priv->auto_tx_rate); | |
3756 | atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_TX_PROMISCUOUS_POS, PROM_MODE_OFF); | |
3757 | atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_RTS_THRESHOLD_POS, priv->rts_threshold); | |
3758 | atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_FRAG_THRESHOLD_POS, priv->frag_threshold); | |
3759 | atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_SHORT_RETRY_POS, priv->short_retry); | |
3760 | atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_LONG_RETRY_POS, priv->long_retry); | |
3761 | atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, priv->preamble); | |
3762 | atmel_set_mib(priv, Mac_Address_Mib_Type, MAC_ADDR_MIB_MAC_ADDR_POS, | |
3763 | priv->dev->dev_addr, 6); | |
3764 | atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE); | |
3765 | atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1); | |
3766 | atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_BEACON_PER_POS, priv->default_beacon_period); | |
3767 | atmel_set_mib(priv, Phy_Mib_Type, PHY_MIB_RATE_SET_POS, atmel_basic_rates, 4); | |
3768 | atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_PRIVACY_POS, priv->wep_is_on); | |
3769 | if (priv->use_wpa) | |
3770 | build_wpa_mib(priv); | |
3771 | else | |
3772 | build_wep_mib(priv); | |
3773 | ||
3774 | return 1; | |
3775 | } | |
3776 | ||
3777 | static void atmel_send_command(struct atmel_private *priv, int command, void *cmd, int cmd_size) | |
3778 | { | |
3779 | if (cmd) | |
3780 | atmel_copy_to_card(priv->dev, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET), | |
3781 | cmd, cmd_size); | |
3782 | ||
3783 | atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET), command); | |
3784 | atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET), 0); | |
3785 | } | |
3786 | ||
3787 | static int atmel_send_command_wait(struct atmel_private *priv, int command, void *cmd, int cmd_size) | |
3788 | { | |
3789 | int i, status; | |
3790 | ||
3791 | atmel_send_command(priv, command, cmd, cmd_size); | |
3792 | ||
3793 | for (i = 5000; i; i--) { | |
3794 | status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET)); | |
3795 | if (status != CMD_STATUS_IDLE && | |
3796 | status != CMD_STATUS_IN_PROGRESS) | |
3797 | break; | |
3798 | udelay(20); | |
3799 | } | |
3800 | ||
3801 | if (i == 0) { | |
3802 | printk(KERN_ALERT "%s: failed to contact MAC.\n", priv->dev->name); | |
3803 | status = CMD_STATUS_HOST_ERROR; | |
3804 | } else { | |
3805 | if (command != CMD_EnableRadio) | |
3806 | status = CMD_STATUS_COMPLETE; | |
3807 | } | |
3808 | ||
3809 | return status; | |
3810 | } | |
3811 | ||
3812 | static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index) | |
3813 | { | |
3814 | struct get_set_mib m; | |
3815 | m.type = type; | |
3816 | m.size = 1; | |
3817 | m.index = index; | |
3818 | ||
3819 | atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + 1); | |
3820 | return atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE)); | |
3821 | } | |
3822 | ||
3823 | static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index, u8 data) | |
3824 | { | |
3825 | struct get_set_mib m; | |
3826 | m.type = type; | |
3827 | m.size = 1; | |
3828 | m.index = index; | |
3829 | m.data[0] = data; | |
3830 | ||
3831 | atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 1); | |
3832 | } | |
3833 | ||
3834 | static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index, u16 data) | |
3835 | { | |
3836 | struct get_set_mib m; | |
3837 | m.type = type; | |
3838 | m.size = 2; | |
3839 | m.index = index; | |
3840 | m.data[0] = data; | |
3841 | m.data[1] = data >> 8; | |
3842 | ||
3843 | atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 2); | |
3844 | } | |
3845 | ||
3846 | static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index, u8 *data, int data_len) | |
3847 | { | |
3848 | struct get_set_mib m; | |
3849 | m.type = type; | |
3850 | m.size = data_len; | |
3851 | m.index = index; | |
3852 | ||
3853 | if (data_len > MIB_MAX_DATA_BYTES) | |
3854 | printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name); | |
3855 | ||
3856 | memcpy(m.data, data, data_len); | |
3857 | atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + data_len); | |
3858 | } | |
3859 | ||
3860 | static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index, u8 *data, int data_len) | |
3861 | { | |
3862 | struct get_set_mib m; | |
3863 | m.type = type; | |
3864 | m.size = data_len; | |
3865 | m.index = index; | |
3866 | ||
3867 | if (data_len > MIB_MAX_DATA_BYTES) | |
3868 | printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name); | |
3869 | ||
3870 | atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + data_len); | |
3871 | atmel_copy_to_host(priv->dev, data, | |
3872 | atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE), data_len); | |
3873 | } | |
3874 | ||
3875 | static void atmel_writeAR(struct net_device *dev, u16 data) | |
3876 | { | |
3877 | int i; | |
3878 | outw(data, dev->base_addr + AR); | |
3879 | /* Address register appears to need some convincing..... */ | |
3880 | for (i = 0; data != inw(dev->base_addr + AR) && i<10; i++) | |
3881 | outw(data, dev->base_addr + AR); | |
3882 | } | |
3883 | ||
3884 | static void atmel_copy_to_card(struct net_device *dev, u16 dest, unsigned char *src, u16 len) | |
3885 | { | |
3886 | int i; | |
3887 | atmel_writeAR(dev, dest); | |
3888 | if (dest % 2) { | |
3889 | atmel_write8(dev, DR, *src); | |
3890 | src++; len--; | |
3891 | } | |
3892 | for (i = len; i > 1 ; i -= 2) { | |
3893 | u8 lb = *src++; | |
3894 | u8 hb = *src++; | |
3895 | atmel_write16(dev, DR, lb | (hb << 8)); | |
3896 | } | |
3897 | if (i) | |
3898 | atmel_write8(dev, DR, *src); | |
3899 | } | |
3900 | ||
3901 | static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest, u16 src, u16 len) | |
3902 | { | |
3903 | int i; | |
3904 | atmel_writeAR(dev, src); | |
3905 | if (src % 2) { | |
3906 | *dest = atmel_read8(dev, DR); | |
3907 | dest++; len--; | |
3908 | } | |
3909 | for (i = len; i > 1 ; i -= 2) { | |
3910 | u16 hw = atmel_read16(dev, DR); | |
3911 | *dest++ = hw; | |
3912 | *dest++ = hw >> 8; | |
3913 | } | |
3914 | if (i) | |
3915 | *dest = atmel_read8(dev, DR); | |
3916 | } | |
3917 | ||
3918 | static void atmel_set_gcr(struct net_device *dev, u16 mask) | |
3919 | { | |
3920 | outw(inw(dev->base_addr + GCR) | mask, dev->base_addr + GCR); | |
3921 | } | |
3922 | ||
3923 | static void atmel_clear_gcr(struct net_device *dev, u16 mask) | |
3924 | { | |
3925 | outw(inw(dev->base_addr + GCR) & ~mask, dev->base_addr + GCR); | |
3926 | } | |
3927 | ||
3928 | static int atmel_lock_mac(struct atmel_private *priv) | |
3929 | { | |
3930 | int i, j = 20; | |
3931 | retry: | |
3932 | for (i = 5000; i; i--) { | |
3933 | if (!atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET))) | |
3934 | break; | |
3935 | udelay(20); | |
3936 | } | |
3937 | ||
3938 | if (!i) return 0; /* timed out */ | |
3939 | ||
3940 | atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 1); | |
3941 | if (atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET))) { | |
3942 | atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0); | |
3943 | if (!j--) return 0; /* timed out */ | |
3944 | goto retry; | |
3945 | } | |
3946 | ||
3947 | return 1; | |
3948 | } | |
3949 | ||
3950 | static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data) | |
3951 | { | |
3952 | atmel_writeAR(priv->dev, pos); | |
3953 | atmel_write16(priv->dev, DR, data); /* card is little-endian */ | |
3954 | atmel_write16(priv->dev, DR, data >> 16); | |
3955 | } | |
3956 | ||
3957 | /***************************************************************************/ | |
3958 | /* There follows the source form of the MAC address reading firmware */ | |
3959 | /***************************************************************************/ | |
3960 | #if 0 | |
3961 | ||
3962 | /* Copyright 2003 Matthew T. Russotto */ | |
3963 | /* But derived from the Atmel 76C502 firmware written by Atmel and */ | |
3964 | /* included in "atmel wireless lan drivers" package */ | |
3965 | /** | |
3966 | This file is part of net.russotto.AtmelMACFW, hereto referred to | |
3967 | as AtmelMACFW | |
3968 | ||
3969 | AtmelMACFW is free software; you can redistribute it and/or modify | |
3970 | it under the terms of the GNU General Public License version 2 | |
3971 | as published by the Free Software Foundation. | |
3972 | ||
3973 | AtmelMACFW is distributed in the hope that it will be useful, | |
3974 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
3975 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
3976 | GNU General Public License for more details. | |
3977 | ||
3978 | You should have received a copy of the GNU General Public License | |
3979 | along with AtmelMACFW; if not, write to the Free Software | |
3980 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
3981 | ||
3982 | ****************************************************************************/ | |
3983 | /* This firmware should work on the 76C502 RFMD, RFMD_D, and RFMD_E */ | |
3984 | /* It will probably work on the 76C504 and 76C502 RFMD_3COM */ | |
3985 | /* It only works on SPI EEPROM versions of the card. */ | |
3986 | ||
3987 | /* This firmware initializes the SPI controller and clock, reads the MAC */ | |
3988 | /* address from the EEPROM into SRAM, and puts the SRAM offset of the MAC */ | |
3989 | /* address in MR2, and sets MR3 to 0x10 to indicate it is done */ | |
3990 | /* It also puts a complete copy of the EEPROM in SRAM with the offset in */ | |
3991 | /* MR4, for investigational purposes (maybe we can determine chip type */ | |
3992 | /* from that?) */ | |
3993 | ||
3994 | .org 0 | |
3995 | .set MRBASE, 0x8000000 | |
3996 | .set CPSR_INITIAL, 0xD3 /* IRQ/FIQ disabled, ARM mode, Supervisor state */ | |
3997 | .set CPSR_USER, 0xD1 /* IRQ/FIQ disabled, ARM mode, USER state */ | |
3998 | .set SRAM_BASE, 0x02000000 | |
3999 | .set SP_BASE, 0x0F300000 | |
4000 | .set UNK_BASE, 0x0F000000 /* Some internal device, but which one? */ | |
4001 | .set SPI_CGEN_BASE, 0x0E000000 /* Some internal device, but which one? */ | |
4002 | .set UNK3_BASE, 0x02014000 /* Some internal device, but which one? */ | |
4003 | .set STACK_BASE, 0x5600 | |
4004 | .set SP_SR, 0x10 | |
4005 | .set SP_TDRE, 2 /* status register bit -- TDR empty */ | |
4006 | .set SP_RDRF, 1 /* status register bit -- RDR full */ | |
4007 | .set SP_SWRST, 0x80 | |
4008 | .set SP_SPIEN, 0x1 | |
4009 | .set SP_CR, 0 /* control register */ | |
4010 | .set SP_MR, 4 /* mode register */ | |
4011 | .set SP_RDR, 0x08 /* Read Data Register */ | |
4012 | .set SP_TDR, 0x0C /* Transmit Data Register */ | |
4013 | .set SP_CSR0, 0x30 /* chip select registers */ | |
4014 | .set SP_CSR1, 0x34 | |
4015 | .set SP_CSR2, 0x38 | |
4016 | .set SP_CSR3, 0x3C | |
4017 | .set NVRAM_CMD_RDSR, 5 /* read status register */ | |
4018 | .set NVRAM_CMD_READ, 3 /* read data */ | |
4019 | .set NVRAM_SR_RDY, 1 /* RDY bit. This bit is inverted */ | |
4020 | .set SPI_8CLOCKS, 0xFF /* Writing this to the TDR doesn't do anything to the | |
4021 | serial output, since SO is normally high. But it | |
4022 | does cause 8 clock cycles and thus 8 bits to be | |
4023 | clocked in to the chip. See Atmel's SPI | |
4024 | controller (e.g. AT91M55800) timing and 4K | |
4025 | SPI EEPROM manuals */ | |
4026 | ||
4027 | .set NVRAM_SCRATCH, 0x02000100 /* arbitrary area for scratchpad memory */ | |
4028 | .set NVRAM_IMAGE, 0x02000200 | |
4029 | .set NVRAM_LENGTH, 0x0200 | |
4030 | .set MAC_ADDRESS_MIB, SRAM_BASE | |
4031 | .set MAC_ADDRESS_LENGTH, 6 | |
4032 | .set MAC_BOOT_FLAG, 0x10 | |
4033 | .set MR1, 0 | |
4034 | .set MR2, 4 | |
4035 | .set MR3, 8 | |
4036 | .set MR4, 0xC | |
4037 | RESET_VECTOR: | |
4038 | b RESET_HANDLER | |
4039 | UNDEF_VECTOR: | |
4040 | b HALT1 | |
4041 | SWI_VECTOR: | |
4042 | b HALT1 | |
4043 | IABORT_VECTOR: | |
4044 | b HALT1 | |
4045 | DABORT_VECTOR: | |
4046 | RESERVED_VECTOR: | |
4047 | b HALT1 | |
4048 | IRQ_VECTOR: | |
4049 | b HALT1 | |
4050 | FIQ_VECTOR: | |
4051 | b HALT1 | |
4052 | HALT1: b HALT1 | |
4053 | RESET_HANDLER: | |
4054 | mov r0, #CPSR_INITIAL | |
4055 | msr CPSR_c, r0 /* This is probably unnecessary */ | |
4056 | ||
4057 | /* I'm guessing this is initializing clock generator electronics for SPI */ | |
4058 | ldr r0, =SPI_CGEN_BASE | |
4059 | mov r1, #0 | |
4060 | mov r1, r1, lsl #3 | |
4061 | orr r1,r1, #0 | |
4062 | str r1, [r0] | |
4063 | ldr r1, [r0, #28] | |
4064 | bic r1, r1, #16 | |
4065 | str r1, [r0, #28] | |
4066 | mov r1, #1 | |
4067 | str r1, [r0, #8] | |
4068 | ||
4069 | ldr r0, =MRBASE | |
4070 | mov r1, #0 | |
4071 | strh r1, [r0, #MR1] | |
4072 | strh r1, [r0, #MR2] | |
4073 | strh r1, [r0, #MR3] | |
4074 | strh r1, [r0, #MR4] | |
4075 | ||
4076 | mov sp, #STACK_BASE | |
4077 | bl SP_INIT | |
4078 | mov r0, #10 | |
4079 | bl DELAY9 | |
4080 | bl GET_MAC_ADDR | |
4081 | bl GET_WHOLE_NVRAM | |
4082 | ldr r0, =MRBASE | |
4083 | ldr r1, =MAC_ADDRESS_MIB | |
4084 | strh r1, [r0, #MR2] | |
4085 | ldr r1, =NVRAM_IMAGE | |
4086 | strh r1, [r0, #MR4] | |
4087 | mov r1, #MAC_BOOT_FLAG | |
4088 | strh r1, [r0, #MR3] | |
4089 | HALT2: b HALT2 | |
4090 | .func Get_Whole_NVRAM, GET_WHOLE_NVRAM | |
4091 | GET_WHOLE_NVRAM: | |
4092 | stmdb sp!, {lr} | |
4093 | mov r2, #0 /* 0th bytes of NVRAM */ | |
4094 | mov r3, #NVRAM_LENGTH | |
4095 | mov r1, #0 /* not used in routine */ | |
4096 | ldr r0, =NVRAM_IMAGE | |
4097 | bl NVRAM_XFER | |
4098 | ldmia sp!, {lr} | |
4099 | bx lr | |
4100 | .endfunc | |
4101 | ||
4102 | .func Get_MAC_Addr, GET_MAC_ADDR | |
4103 | GET_MAC_ADDR: | |
4104 | stmdb sp!, {lr} | |
4105 | mov r2, #0x120 /* address of MAC Address within NVRAM */ | |
4106 | mov r3, #MAC_ADDRESS_LENGTH | |
4107 | mov r1, #0 /* not used in routine */ | |
4108 | ldr r0, =MAC_ADDRESS_MIB | |
4109 | bl NVRAM_XFER | |
4110 | ldmia sp!, {lr} | |
4111 | bx lr | |
4112 | .endfunc | |
4113 | .ltorg | |
4114 | .func Delay9, DELAY9 | |
4115 | DELAY9: | |
4116 | adds r0, r0, r0, LSL #3 /* r0 = r0 * 9 */ | |
4117 | DELAYLOOP: | |
4118 | beq DELAY9_done | |
4119 | subs r0, r0, #1 | |
4120 | b DELAYLOOP | |
4121 | DELAY9_done: | |
4122 | bx lr | |
4123 | .endfunc | |
4124 | ||
4125 | .func SP_Init, SP_INIT | |
4126 | SP_INIT: | |
4127 | mov r1, #SP_SWRST | |
4128 | ldr r0, =SP_BASE | |
4129 | str r1, [r0, #SP_CR] /* reset the SPI */ | |
4130 | mov r1, #0 | |
4131 | str r1, [r0, #SP_CR] /* release SPI from reset state */ | |
4132 | mov r1, #SP_SPIEN | |
4133 | str r1, [r0, #SP_MR] /* set the SPI to MASTER mode*/ | |
4134 | str r1, [r0, #SP_CR] /* enable the SPI */ | |
4135 | ||
4136 | /* My guess would be this turns on the SPI clock */ | |
4137 | ldr r3, =SPI_CGEN_BASE | |
4138 | ldr r1, [r3, #28] | |
4139 | orr r1, r1, #0x2000 | |
4140 | str r1, [r3, #28] | |
4141 | ||
4142 | ldr r1, =0x2000c01 | |
4143 | str r1, [r0, #SP_CSR0] | |
4144 | ldr r1, =0x2000201 | |
4145 | str r1, [r0, #SP_CSR1] | |
4146 | str r1, [r0, #SP_CSR2] | |
4147 | str r1, [r0, #SP_CSR3] | |
4148 | ldr r1, [r0, #SP_SR] | |
4149 | ldr r0, [r0, #SP_RDR] | |
4150 | bx lr | |
4151 | .endfunc | |
4152 | .func NVRAM_Init, NVRAM_INIT | |
4153 | NVRAM_INIT: | |
4154 | ldr r1, =SP_BASE | |
4155 | ldr r0, [r1, #SP_RDR] | |
4156 | mov r0, #NVRAM_CMD_RDSR | |
4157 | str r0, [r1, #SP_TDR] | |
4158 | SP_loop1: | |
4159 | ldr r0, [r1, #SP_SR] | |
4160 | tst r0, #SP_TDRE | |
4161 | beq SP_loop1 | |
4162 | ||
4163 | mov r0, #SPI_8CLOCKS | |
4164 | str r0, [r1, #SP_TDR] | |
4165 | SP_loop2: | |
4166 | ldr r0, [r1, #SP_SR] | |
4167 | tst r0, #SP_TDRE | |
4168 | beq SP_loop2 | |
4169 | ||
4170 | ldr r0, [r1, #SP_RDR] | |
4171 | SP_loop3: | |
4172 | ldr r0, [r1, #SP_SR] | |
4173 | tst r0, #SP_RDRF | |
4174 | beq SP_loop3 | |
4175 | ||
4176 | ldr r0, [r1, #SP_RDR] | |
4177 | and r0, r0, #255 | |
4178 | bx lr | |
4179 | .endfunc | |
4180 | ||
4181 | .func NVRAM_Xfer, NVRAM_XFER | |
4182 | /* r0 = dest address */ | |
4183 | /* r1 = not used */ | |
4184 | /* r2 = src address within NVRAM */ | |
4185 | /* r3 = length */ | |
4186 | NVRAM_XFER: | |
4187 | stmdb sp!, {r4, r5, lr} | |
4188 | mov r5, r0 /* save r0 (dest address) */ | |
4189 | mov r4, r3 /* save r3 (length) */ | |
4190 | mov r0, r2, LSR #5 /* SPI memories put A8 in the command field */ | |
4191 | and r0, r0, #8 | |
4192 | add r0, r0, #NVRAM_CMD_READ | |
4193 | ldr r1, =NVRAM_SCRATCH | |
4194 | strb r0, [r1, #0] /* save command in NVRAM_SCRATCH[0] */ | |
4195 | strb r2, [r1, #1] /* save low byte of source address in NVRAM_SCRATCH[1] */ | |
4196 | _local1: | |
4197 | bl NVRAM_INIT | |
4198 | tst r0, #NVRAM_SR_RDY | |
4199 | bne _local1 | |
4200 | mov r0, #20 | |
4201 | bl DELAY9 | |
4202 | mov r2, r4 /* length */ | |
4203 | mov r1, r5 /* dest address */ | |
4204 | mov r0, #2 /* bytes to transfer in command */ | |
4205 | bl NVRAM_XFER2 | |
4206 | ldmia sp!, {r4, r5, lr} | |
4207 | bx lr | |
4208 | .endfunc | |
4209 | ||
4210 | .func NVRAM_Xfer2, NVRAM_XFER2 | |
4211 | NVRAM_XFER2: | |
4212 | stmdb sp!, {r4, r5, r6, lr} | |
4213 | ldr r4, =SP_BASE | |
4214 | mov r3, #0 | |
4215 | cmp r0, #0 | |
4216 | bls _local2 | |
4217 | ldr r5, =NVRAM_SCRATCH | |
4218 | _local4: | |
4219 | ldrb r6, [r5, r3] | |
4220 | str r6, [r4, #SP_TDR] | |
4221 | _local3: | |
4222 | ldr r6, [r4, #SP_SR] | |
4223 | tst r6, #SP_TDRE | |
4224 | beq _local3 | |
4225 | add r3, r3, #1 | |
4226 | cmp r3, r0 /* r0 is # of bytes to send out (command+addr) */ | |
4227 | blo _local4 | |
4228 | _local2: | |
4229 | mov r3, #SPI_8CLOCKS | |
4230 | str r3, [r4, #SP_TDR] | |
4231 | ldr r0, [r4, #SP_RDR] | |
4232 | _local5: | |
4233 | ldr r0, [r4, #SP_SR] | |
4234 | tst r0, #SP_RDRF | |
4235 | beq _local5 | |
4236 | ldr r0, [r4, #SP_RDR] /* what's this byte? It's the byte read while writing the TDR -- nonsense, because the NVRAM doesn't read and write at the same time */ | |
4237 | mov r0, #0 | |
4238 | cmp r2, #0 /* r2 is # of bytes to copy in */ | |
4239 | bls _local6 | |
4240 | _local7: | |
4241 | ldr r5, [r4, #SP_SR] | |
4242 | tst r5, #SP_TDRE | |
4243 | beq _local7 | |
4244 | str r3, [r4, #SP_TDR] /* r3 has SPI_8CLOCKS */ | |
4245 | _local8: | |
4246 | ldr r5, [r4, #SP_SR] | |
4247 | tst r5, #SP_RDRF | |
4248 | beq _local8 | |
4249 | ldr r5, [r4, #SP_RDR] /* but didn't we read this byte above? */ | |
4250 | strb r5, [r1], #1 /* postindexed */ | |
4251 | add r0, r0, #1 | |
4252 | cmp r0, r2 | |
4253 | blo _local7 /* since we don't send another address, the NVRAM must be capable of sequential reads */ | |
4254 | _local6: | |
4255 | mov r0, #200 | |
4256 | bl DELAY9 | |
4257 | ldmia sp!, {r4, r5, r6, lr} | |
4258 | bx lr | |
4259 | #endif |