net: convert print_mac to %pM
[deliverable/linux.git] / drivers / net / wireless / atmel.c
CommitLineData
1da177e4
LT
1/*** -*- linux-c -*- **********************************************************
2
3 Driver for Atmel at76c502 at76c504 and at76c506 wireless cards.
4
5 Copyright 2000-2001 ATMEL Corporation.
6 Copyright 2003-2004 Simon Kelley.
7
4d791aad
CP
8 This code was developed from version 2.1.1 of the Atmel drivers,
9 released by Atmel corp. under the GPL in December 2002. It also
10 includes code from the Linux aironet drivers (C) Benjamin Reed,
1da177e4
LT
11 and the Linux PCMCIA package, (C) David Hinds and the Linux wireless
12 extensions, (C) Jean Tourrilhes.
13
14 The firmware module for reading the MAC address of the card comes from
15 net.russotto.AtmelMACFW, written by Matthew T. Russotto and copyright
16 by him. net.russotto.AtmelMACFW is used under the GPL license version 2.
17 This file contains the module in binary form and, under the terms
18 of the GPL, in source form. The source is located at the end of the file.
19
20 This program is free software; you can redistribute it and/or modify
21 it under the terms of the GNU General Public License as published by
22 the Free Software Foundation; either version 2 of the License, or
23 (at your option) any later version.
24
25 This software is distributed in the hope that it will be useful,
26 but WITHOUT ANY WARRANTY; without even the implied warranty of
27 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 GNU General Public License for more details.
29
30 You should have received a copy of the GNU General Public License
31 along with Atmel wireless lan drivers; if not, write to the Free Software
32 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
33
4d791aad 34 For all queries about this code, please contact the current author,
1da177e4
LT
35 Simon Kelley <simon@thekelleys.org.uk> and not Atmel Corporation.
36
37 Credit is due to HP UK and Cambridge Online Systems Ltd for supplying
38 hardware used during development of this driver.
39
40******************************************************************************/
41
1da177e4
LT
42#include <linux/init.h>
43
44#include <linux/kernel.h>
1da177e4
LT
45#include <linux/ptrace.h>
46#include <linux/slab.h>
47#include <linux/string.h>
48#include <linux/ctype.h>
49#include <linux/timer.h>
9a6ab769 50#include <asm/byteorder.h>
1da177e4
LT
51#include <asm/io.h>
52#include <asm/system.h>
53#include <asm/uaccess.h>
54#include <linux/module.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/skbuff.h>
58#include <linux/if_arp.h>
59#include <linux/ioport.h>
60#include <linux/fcntl.h>
61#include <linux/delay.h>
62#include <linux/wireless.h>
63#include <net/iw_handler.h>
1da177e4
LT
64#include <linux/crc32.h>
65#include <linux/proc_fs.h>
66#include <linux/device.h>
67#include <linux/moduleparam.h>
68#include <linux/firmware.h>
6e33e30d 69#include <linux/jiffies.h>
b453872c 70#include <net/ieee80211.h>
1da177e4
LT
71#include "atmel.h"
72
73#define DRIVER_MAJOR 0
b16a228d 74#define DRIVER_MINOR 98
1da177e4
LT
75
76MODULE_AUTHOR("Simon Kelley");
77MODULE_DESCRIPTION("Support for Atmel at76c50x 802.11 wireless ethernet cards.");
78MODULE_LICENSE("GPL");
79MODULE_SUPPORTED_DEVICE("Atmel at76c50x wireless cards");
80
4d791aad 81/* The name of the firmware file to be loaded
1da177e4
LT
82 over-rides any automatic selection */
83static char *firmware = NULL;
84module_param(firmware, charp, 0);
85
86/* table of firmware file names */
4d791aad 87static struct {
1da177e4
LT
88 AtmelFWType fw_type;
89 const char *fw_file;
90 const char *fw_file_ext;
91} fw_table[] = {
92 { ATMEL_FW_TYPE_502, "atmel_at76c502", "bin" },
93 { ATMEL_FW_TYPE_502D, "atmel_at76c502d", "bin" },
94 { ATMEL_FW_TYPE_502E, "atmel_at76c502e", "bin" },
95 { ATMEL_FW_TYPE_502_3COM, "atmel_at76c502_3com", "bin" },
96 { ATMEL_FW_TYPE_504, "atmel_at76c504", "bin" },
97 { ATMEL_FW_TYPE_504_2958, "atmel_at76c504_2958", "bin" },
98 { ATMEL_FW_TYPE_504A_2958,"atmel_at76c504a_2958","bin" },
99 { ATMEL_FW_TYPE_506, "atmel_at76c506", "bin" },
100 { ATMEL_FW_TYPE_NONE, NULL, NULL }
101};
102
103#define MAX_SSID_LENGTH 32
104#define MGMT_JIFFIES (256 * HZ / 100)
105
4d791aad 106#define MAX_BSS_ENTRIES 64
1da177e4
LT
107
108/* registers */
4d791aad
CP
109#define GCR 0x00 // (SIR0) General Configuration Register
110#define BSR 0x02 // (SIR1) Bank Switching Select Register
1da177e4
LT
111#define AR 0x04
112#define DR 0x08
4d791aad
CP
113#define MR1 0x12 // Mirror Register 1
114#define MR2 0x14 // Mirror Register 2
115#define MR3 0x16 // Mirror Register 3
116#define MR4 0x18 // Mirror Register 4
1da177e4
LT
117
118#define GPR1 0x0c
119#define GPR2 0x0e
120#define GPR3 0x10
121//
122// Constants for the GCR register.
123//
124#define GCR_REMAP 0x0400 // Remap internal SRAM to 0
4d791aad 125#define GCR_SWRES 0x0080 // BIU reset (ARM and PAI are NOT reset)
1da177e4 126#define GCR_CORES 0x0060 // Core Reset (ARM and PAI are reset)
4d791aad 127#define GCR_ENINT 0x0002 // Enable Interrupts
1da177e4
LT
128#define GCR_ACKINT 0x0008 // Acknowledge Interrupts
129
130#define BSS_SRAM 0x0200 // AMBA module selection --> SRAM
131#define BSS_IRAM 0x0100 // AMBA module selection --> IRAM
132//
133// Constants for the MR registers.
134//
135#define MAC_INIT_COMPLETE 0x0001 // MAC init has been completed
136#define MAC_BOOT_COMPLETE 0x0010 // MAC boot has been completed
137#define MAC_INIT_OK 0x0002 // MAC boot has been completed
138
1da177e4
LT
139#define MIB_MAX_DATA_BYTES 212
140#define MIB_HEADER_SIZE 4 /* first four fields */
141
142struct get_set_mib {
143 u8 type;
144 u8 size;
145 u8 index;
146 u8 reserved;
147 u8 data[MIB_MAX_DATA_BYTES];
148};
149
150struct rx_desc {
151 u32 Next;
152 u16 MsduPos;
153 u16 MsduSize;
4d791aad 154
1da177e4
LT
155 u8 State;
156 u8 Status;
157 u8 Rate;
158 u8 Rssi;
159 u8 LinkQuality;
160 u8 PreambleType;
161 u16 Duration;
162 u32 RxTime;
1da177e4
LT
163};
164
165#define RX_DESC_FLAG_VALID 0x80
166#define RX_DESC_FLAG_CONSUMED 0x40
167#define RX_DESC_FLAG_IDLE 0x00
168
169#define RX_STATUS_SUCCESS 0x00
170
171#define RX_DESC_MSDU_POS_OFFSET 4
172#define RX_DESC_MSDU_SIZE_OFFSET 6
173#define RX_DESC_FLAGS_OFFSET 8
174#define RX_DESC_STATUS_OFFSET 9
175#define RX_DESC_RSSI_OFFSET 11
176#define RX_DESC_LINK_QUALITY_OFFSET 12
177#define RX_DESC_PREAMBLE_TYPE_OFFSET 13
178#define RX_DESC_DURATION_OFFSET 14
179#define RX_DESC_RX_TIME_OFFSET 16
180
1da177e4
LT
181struct tx_desc {
182 u32 NextDescriptor;
183 u16 TxStartOfFrame;
184 u16 TxLength;
4d791aad 185
1da177e4
LT
186 u8 TxState;
187 u8 TxStatus;
188 u8 RetryCount;
4d791aad 189
1da177e4
LT
190 u8 TxRate;
191
192 u8 KeyIndex;
193 u8 ChiperType;
194 u8 ChipreLength;
195 u8 Reserved1;
196
197 u8 Reserved;
198 u8 PacketType;
199 u16 HostTxLength;
1da177e4
LT
200};
201
1da177e4
LT
202#define TX_DESC_NEXT_OFFSET 0
203#define TX_DESC_POS_OFFSET 4
204#define TX_DESC_SIZE_OFFSET 6
205#define TX_DESC_FLAGS_OFFSET 8
206#define TX_DESC_STATUS_OFFSET 9
207#define TX_DESC_RETRY_OFFSET 10
208#define TX_DESC_RATE_OFFSET 11
209#define TX_DESC_KEY_INDEX_OFFSET 12
210#define TX_DESC_CIPHER_TYPE_OFFSET 13
211#define TX_DESC_CIPHER_LENGTH_OFFSET 14
212#define TX_DESC_PACKET_TYPE_OFFSET 17
213#define TX_DESC_HOST_LENGTH_OFFSET 18
214
1da177e4
LT
215///////////////////////////////////////////////////////
216// Host-MAC interface
217///////////////////////////////////////////////////////
218
219#define TX_STATUS_SUCCESS 0x00
220
221#define TX_FIRM_OWN 0x80
222#define TX_DONE 0x40
223
1da177e4
LT
224#define TX_ERROR 0x01
225
226#define TX_PACKET_TYPE_DATA 0x01
227#define TX_PACKET_TYPE_MGMT 0x02
228
229#define ISR_EMPTY 0x00 // no bits set in ISR
230#define ISR_TxCOMPLETE 0x01 // packet transmitted
231#define ISR_RxCOMPLETE 0x02 // packet received
232#define ISR_RxFRAMELOST 0x04 // Rx Frame lost
233#define ISR_FATAL_ERROR 0x08 // Fatal error
234#define ISR_COMMAND_COMPLETE 0x10 // command completed
235#define ISR_OUT_OF_RANGE 0x20 // command completed
236#define ISR_IBSS_MERGE 0x40 // (4.1.2.30): IBSS merge
4d791aad 237#define ISR_GENERIC_IRQ 0x80
1da177e4
LT
238
239#define Local_Mib_Type 0x01
240#define Mac_Address_Mib_Type 0x02
241#define Mac_Mib_Type 0x03
242#define Statistics_Mib_Type 0x04
243#define Mac_Mgmt_Mib_Type 0x05
244#define Mac_Wep_Mib_Type 0x06
245#define Phy_Mib_Type 0x07
246#define Multi_Domain_MIB 0x08
247
248#define MAC_MGMT_MIB_CUR_BSSID_POS 14
249#define MAC_MIB_FRAG_THRESHOLD_POS 8
250#define MAC_MIB_RTS_THRESHOLD_POS 10
251#define MAC_MIB_SHORT_RETRY_POS 16
252#define MAC_MIB_LONG_RETRY_POS 17
253#define MAC_MIB_SHORT_RETRY_LIMIT_POS 16
254#define MAC_MGMT_MIB_BEACON_PER_POS 0
255#define MAC_MGMT_MIB_STATION_ID_POS 6
256#define MAC_MGMT_MIB_CUR_PRIVACY_POS 11
257#define MAC_MGMT_MIB_CUR_BSSID_POS 14
258#define MAC_MGMT_MIB_PS_MODE_POS 53
259#define MAC_MGMT_MIB_LISTEN_INTERVAL_POS 54
260#define MAC_MGMT_MIB_MULTI_DOMAIN_IMPLEMENTED 56
261#define MAC_MGMT_MIB_MULTI_DOMAIN_ENABLED 57
262#define PHY_MIB_CHANNEL_POS 14
263#define PHY_MIB_RATE_SET_POS 20
264#define PHY_MIB_REG_DOMAIN_POS 26
265#define LOCAL_MIB_AUTO_TX_RATE_POS 3
266#define LOCAL_MIB_SSID_SIZE 5
267#define LOCAL_MIB_TX_PROMISCUOUS_POS 6
268#define LOCAL_MIB_TX_MGMT_RATE_POS 7
269#define LOCAL_MIB_TX_CONTROL_RATE_POS 8
270#define LOCAL_MIB_PREAMBLE_TYPE 9
271#define MAC_ADDR_MIB_MAC_ADDR_POS 0
272
1da177e4
LT
273#define CMD_Set_MIB_Vars 0x01
274#define CMD_Get_MIB_Vars 0x02
275#define CMD_Scan 0x03
276#define CMD_Join 0x04
277#define CMD_Start 0x05
278#define CMD_EnableRadio 0x06
279#define CMD_DisableRadio 0x07
280#define CMD_SiteSurvey 0x0B
281
282#define CMD_STATUS_IDLE 0x00
283#define CMD_STATUS_COMPLETE 0x01
284#define CMD_STATUS_UNKNOWN 0x02
285#define CMD_STATUS_INVALID_PARAMETER 0x03
286#define CMD_STATUS_FUNCTION_NOT_SUPPORTED 0x04
287#define CMD_STATUS_TIME_OUT 0x07
288#define CMD_STATUS_IN_PROGRESS 0x08
289#define CMD_STATUS_REJECTED_RADIO_OFF 0x09
290#define CMD_STATUS_HOST_ERROR 0xFF
291#define CMD_STATUS_BUSY 0xFE
292
1da177e4
LT
293#define CMD_BLOCK_COMMAND_OFFSET 0
294#define CMD_BLOCK_STATUS_OFFSET 1
295#define CMD_BLOCK_PARAMETERS_OFFSET 4
296
297#define SCAN_OPTIONS_SITE_SURVEY 0x80
298
299#define MGMT_FRAME_BODY_OFFSET 24
300#define MAX_AUTHENTICATION_RETRIES 3
4d791aad 301#define MAX_ASSOCIATION_RETRIES 3
1da177e4
LT
302
303#define AUTHENTICATION_RESPONSE_TIME_OUT 1000
304
305#define MAX_WIRELESS_BODY 2316 /* mtu is 2312, CRC is 4 */
306#define LOOP_RETRY_LIMIT 500000
307
4d791aad
CP
308#define ACTIVE_MODE 1
309#define PS_MODE 2
1da177e4
LT
310
311#define MAX_ENCRYPTION_KEYS 4
312#define MAX_ENCRYPTION_KEY_SIZE 40
313
314///////////////////////////////////////////////////////////////////////////
315// 802.11 related definitions
316///////////////////////////////////////////////////////////////////////////
317
318//
319// Regulatory Domains
320//
321
322#define REG_DOMAIN_FCC 0x10 //Channels 1-11 USA
323#define REG_DOMAIN_DOC 0x20 //Channel 1-11 Canada
324#define REG_DOMAIN_ETSI 0x30 //Channel 1-13 Europe (ex Spain/France)
325#define REG_DOMAIN_SPAIN 0x31 //Channel 10-11 Spain
326#define REG_DOMAIN_FRANCE 0x32 //Channel 10-13 France
327#define REG_DOMAIN_MKK 0x40 //Channel 14 Japan
328#define REG_DOMAIN_MKK1 0x41 //Channel 1-14 Japan(MKK1)
329#define REG_DOMAIN_ISRAEL 0x50 //Channel 3-9 ISRAEL
330
4d791aad 331#define BSS_TYPE_AD_HOC 1
1da177e4
LT
332#define BSS_TYPE_INFRASTRUCTURE 2
333
334#define SCAN_TYPE_ACTIVE 0
335#define SCAN_TYPE_PASSIVE 1
336
337#define LONG_PREAMBLE 0
338#define SHORT_PREAMBLE 1
339#define AUTO_PREAMBLE 2
340
341#define DATA_FRAME_WS_HEADER_SIZE 30
342
4d791aad 343/* promiscuous mode control */
1da177e4
LT
344#define PROM_MODE_OFF 0x0
345#define PROM_MODE_UNKNOWN 0x1
346#define PROM_MODE_CRC_FAILED 0x2
347#define PROM_MODE_DUPLICATED 0x4
348#define PROM_MODE_MGMT 0x8
349#define PROM_MODE_CTRL 0x10
350#define PROM_MODE_BAD_PROTOCOL 0x20
351
4d791aad 352#define IFACE_INT_STATUS_OFFSET 0
1da177e4
LT
353#define IFACE_INT_MASK_OFFSET 1
354#define IFACE_LOCKOUT_HOST_OFFSET 2
355#define IFACE_LOCKOUT_MAC_OFFSET 3
356#define IFACE_FUNC_CTRL_OFFSET 28
357#define IFACE_MAC_STAT_OFFSET 30
358#define IFACE_GENERIC_INT_TYPE_OFFSET 32
359
4d791aad 360#define CIPHER_SUITE_NONE 0
1da177e4
LT
361#define CIPHER_SUITE_WEP_64 1
362#define CIPHER_SUITE_TKIP 2
363#define CIPHER_SUITE_AES 3
364#define CIPHER_SUITE_CCX 4
365#define CIPHER_SUITE_WEP_128 5
366
367//
368// IFACE MACROS & definitions
369//
370//
371
4d791aad 372// FuncCtrl field:
1da177e4
LT
373//
374#define FUNC_CTRL_TxENABLE 0x10
375#define FUNC_CTRL_RxENABLE 0x20
4d791aad 376#define FUNC_CTRL_INIT_COMPLETE 0x01
1da177e4
LT
377
378/* A stub firmware image which reads the MAC address from NVRAM on the card.
379 For copyright information and source see the end of this file. */
380static u8 mac_reader[] = {
381 0x06,0x00,0x00,0xea,0x04,0x00,0x00,0xea,0x03,0x00,0x00,0xea,0x02,0x00,0x00,0xea,
382 0x01,0x00,0x00,0xea,0x00,0x00,0x00,0xea,0xff,0xff,0xff,0xea,0xfe,0xff,0xff,0xea,
383 0xd3,0x00,0xa0,0xe3,0x00,0xf0,0x21,0xe1,0x0e,0x04,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
384 0x81,0x11,0xa0,0xe1,0x00,0x10,0x81,0xe3,0x00,0x10,0x80,0xe5,0x1c,0x10,0x90,0xe5,
385 0x10,0x10,0xc1,0xe3,0x1c,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,0x08,0x10,0x80,0xe5,
386 0x02,0x03,0xa0,0xe3,0x00,0x10,0xa0,0xe3,0xb0,0x10,0xc0,0xe1,0xb4,0x10,0xc0,0xe1,
387 0xb8,0x10,0xc0,0xe1,0xbc,0x10,0xc0,0xe1,0x56,0xdc,0xa0,0xe3,0x21,0x00,0x00,0xeb,
388 0x0a,0x00,0xa0,0xe3,0x1a,0x00,0x00,0xeb,0x10,0x00,0x00,0xeb,0x07,0x00,0x00,0xeb,
389 0x02,0x03,0xa0,0xe3,0x02,0x14,0xa0,0xe3,0xb4,0x10,0xc0,0xe1,0x4c,0x10,0x9f,0xe5,
390 0xbc,0x10,0xc0,0xe1,0x10,0x10,0xa0,0xe3,0xb8,0x10,0xc0,0xe1,0xfe,0xff,0xff,0xea,
391 0x00,0x40,0x2d,0xe9,0x00,0x20,0xa0,0xe3,0x02,0x3c,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
392 0x28,0x00,0x9f,0xe5,0x37,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
393 0x00,0x40,0x2d,0xe9,0x12,0x2e,0xa0,0xe3,0x06,0x30,0xa0,0xe3,0x00,0x10,0xa0,0xe3,
394 0x02,0x04,0xa0,0xe3,0x2f,0x00,0x00,0xeb,0x00,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,
395 0x00,0x02,0x00,0x02,0x80,0x01,0x90,0xe0,0x01,0x00,0x00,0x0a,0x01,0x00,0x50,0xe2,
396 0xfc,0xff,0xff,0xea,0x1e,0xff,0x2f,0xe1,0x80,0x10,0xa0,0xe3,0xf3,0x06,0xa0,0xe3,
397 0x00,0x10,0x80,0xe5,0x00,0x10,0xa0,0xe3,0x00,0x10,0x80,0xe5,0x01,0x10,0xa0,0xe3,
398 0x04,0x10,0x80,0xe5,0x00,0x10,0x80,0xe5,0x0e,0x34,0xa0,0xe3,0x1c,0x10,0x93,0xe5,
399 0x02,0x1a,0x81,0xe3,0x1c,0x10,0x83,0xe5,0x58,0x11,0x9f,0xe5,0x30,0x10,0x80,0xe5,
400 0x54,0x11,0x9f,0xe5,0x34,0x10,0x80,0xe5,0x38,0x10,0x80,0xe5,0x3c,0x10,0x80,0xe5,
401 0x10,0x10,0x90,0xe5,0x08,0x00,0x90,0xe5,0x1e,0xff,0x2f,0xe1,0xf3,0x16,0xa0,0xe3,
402 0x08,0x00,0x91,0xe5,0x05,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,0x10,0x00,0x91,0xe5,
403 0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0xff,0x00,0xa0,0xe3,0x0c,0x00,0x81,0xe5,
404 0x10,0x00,0x91,0xe5,0x02,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
405 0x10,0x00,0x91,0xe5,0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x91,0xe5,
406 0xff,0x00,0x00,0xe2,0x1e,0xff,0x2f,0xe1,0x30,0x40,0x2d,0xe9,0x00,0x50,0xa0,0xe1,
407 0x03,0x40,0xa0,0xe1,0xa2,0x02,0xa0,0xe1,0x08,0x00,0x00,0xe2,0x03,0x00,0x80,0xe2,
408 0xd8,0x10,0x9f,0xe5,0x00,0x00,0xc1,0xe5,0x01,0x20,0xc1,0xe5,0xe2,0xff,0xff,0xeb,
409 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x1a,0x14,0x00,0xa0,0xe3,0xc4,0xff,0xff,0xeb,
410 0x04,0x20,0xa0,0xe1,0x05,0x10,0xa0,0xe1,0x02,0x00,0xa0,0xe3,0x01,0x00,0x00,0xeb,
411 0x30,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x70,0x40,0x2d,0xe9,0xf3,0x46,0xa0,0xe3,
412 0x00,0x30,0xa0,0xe3,0x00,0x00,0x50,0xe3,0x08,0x00,0x00,0x9a,0x8c,0x50,0x9f,0xe5,
413 0x03,0x60,0xd5,0xe7,0x0c,0x60,0x84,0xe5,0x10,0x60,0x94,0xe5,0x02,0x00,0x16,0xe3,
414 0xfc,0xff,0xff,0x0a,0x01,0x30,0x83,0xe2,0x00,0x00,0x53,0xe1,0xf7,0xff,0xff,0x3a,
415 0xff,0x30,0xa0,0xe3,0x0c,0x30,0x84,0xe5,0x08,0x00,0x94,0xe5,0x10,0x00,0x94,0xe5,
416 0x01,0x00,0x10,0xe3,0xfc,0xff,0xff,0x0a,0x08,0x00,0x94,0xe5,0x00,0x00,0xa0,0xe3,
417 0x00,0x00,0x52,0xe3,0x0b,0x00,0x00,0x9a,0x10,0x50,0x94,0xe5,0x02,0x00,0x15,0xe3,
418 0xfc,0xff,0xff,0x0a,0x0c,0x30,0x84,0xe5,0x10,0x50,0x94,0xe5,0x01,0x00,0x15,0xe3,
419 0xfc,0xff,0xff,0x0a,0x08,0x50,0x94,0xe5,0x01,0x50,0xc1,0xe4,0x01,0x00,0x80,0xe2,
420 0x02,0x00,0x50,0xe1,0xf3,0xff,0xff,0x3a,0xc8,0x00,0xa0,0xe3,0x98,0xff,0xff,0xeb,
421 0x70,0x40,0xbd,0xe8,0x1e,0xff,0x2f,0xe1,0x01,0x0c,0x00,0x02,0x01,0x02,0x00,0x02,
422 0x00,0x01,0x00,0x02
423};
424
425struct atmel_private {
426 void *card; /* Bus dependent stucture varies for PCcard */
427 int (*present_callback)(void *); /* And callback which uses it */
428 char firmware_id[32];
429 AtmelFWType firmware_type;
430 u8 *firmware;
431 int firmware_length;
432 struct timer_list management_timer;
433 struct net_device *dev;
434 struct device *sys_dev;
435 struct iw_statistics wstats;
1da177e4
LT
436 spinlock_t irqlock, timerlock; // spinlocks
437 enum { BUS_TYPE_PCCARD, BUS_TYPE_PCI } bus_type;
4d791aad
CP
438 enum {
439 CARD_TYPE_PARALLEL_FLASH,
1da177e4 440 CARD_TYPE_SPI_FLASH,
4d791aad 441 CARD_TYPE_EEPROM
1da177e4
LT
442 } card_type;
443 int do_rx_crc; /* If we need to CRC incoming packets */
444 int probe_crc; /* set if we don't yet know */
445 int crc_ok_cnt, crc_ko_cnt; /* counters for probing */
446 u16 rx_desc_head;
447 u16 tx_desc_free, tx_desc_head, tx_desc_tail, tx_desc_previous;
448 u16 tx_free_mem, tx_buff_head, tx_buff_tail;
4d791aad 449
1da177e4 450 u16 frag_seq, frag_len, frag_no;
4d791aad
CP
451 u8 frag_source[6];
452
1da177e4
LT
453 u8 wep_is_on, default_key, exclude_unencrypted, encryption_level;
454 u8 group_cipher_suite, pairwise_cipher_suite;
455 u8 wep_keys[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
4d791aad 456 int wep_key_len[MAX_ENCRYPTION_KEYS];
1da177e4
LT
457 int use_wpa, radio_on_broken; /* firmware dependent stuff. */
458
459 u16 host_info_base;
4d791aad 460 struct host_info_struct {
1da177e4
LT
461 /* NB this is matched to the hardware, don't change. */
462 u8 volatile int_status;
463 u8 volatile int_mask;
464 u8 volatile lockout_host;
465 u8 volatile lockout_mac;
466
467 u16 tx_buff_pos;
468 u16 tx_buff_size;
469 u16 tx_desc_pos;
470 u16 tx_desc_count;
471
472 u16 rx_buff_pos;
473 u16 rx_buff_size;
474 u16 rx_desc_pos;
475 u16 rx_desc_count;
4d791aad 476
1da177e4 477 u16 build_version;
4d791aad
CP
478 u16 command_pos;
479
1da177e4
LT
480 u16 major_version;
481 u16 minor_version;
4d791aad 482
1da177e4
LT
483 u16 func_ctrl;
484 u16 mac_status;
485 u16 generic_IRQ_type;
486 u8 reserved[2];
487 } host_info;
488
4d791aad 489 enum {
1da177e4
LT
490 STATION_STATE_SCANNING,
491 STATION_STATE_JOINNING,
492 STATION_STATE_AUTHENTICATING,
493 STATION_STATE_ASSOCIATING,
494 STATION_STATE_READY,
495 STATION_STATE_REASSOCIATING,
496 STATION_STATE_DOWN,
497 STATION_STATE_MGMT_ERROR
498 } station_state;
4d791aad 499
1da177e4
LT
500 int operating_mode, power_mode;
501 time_t last_qual;
502 int beacons_this_sec;
503 int channel;
504 int reg_domain, config_reg_domain;
505 int tx_rate;
506 int auto_tx_rate;
507 int rts_threshold;
508 int frag_threshold;
509 int long_retry, short_retry;
510 int preamble;
511 int default_beacon_period, beacon_period, listen_interval;
4d791aad 512 int CurrentAuthentTransactionSeqNum, ExpectedAuthentTransactionSeqNum;
1da177e4
LT
513 int AuthenticationRequestRetryCnt, AssociationRequestRetryCnt, ReAssociationRequestRetryCnt;
514 enum {
515 SITE_SURVEY_IDLE,
516 SITE_SURVEY_IN_PROGRESS,
4d791aad 517 SITE_SURVEY_COMPLETED
1da177e4 518 } site_survey_state;
6e33e30d 519 unsigned long last_survey;
1da177e4
LT
520
521 int station_was_associated, station_is_associated;
522 int fast_scan;
4d791aad 523
1da177e4
LT
524 struct bss_info {
525 int channel;
526 int SSIDsize;
527 int RSSI;
528 int UsingWEP;
529 int preamble;
530 int beacon_period;
531 int BSStype;
532 u8 BSSID[6];
533 u8 SSID[MAX_SSID_LENGTH];
534 } BSSinfo[MAX_BSS_ENTRIES];
535 int BSS_list_entries, current_BSS;
4d791aad 536 int connect_to_any_BSS;
1da177e4
LT
537 int SSID_size, new_SSID_size;
538 u8 CurrentBSSID[6], BSSID[6];
539 u8 SSID[MAX_SSID_LENGTH], new_SSID[MAX_SSID_LENGTH];
540 u64 last_beacon_timestamp;
541 u8 rx_buf[MAX_WIRELESS_BODY];
1da177e4
LT
542};
543
544static u8 atmel_basic_rates[4] = {0x82,0x84,0x0b,0x16};
545
546static const struct {
547 int reg_domain;
548 int min, max;
4d791aad 549 char *name;
1da177e4
LT
550} channel_table[] = { { REG_DOMAIN_FCC, 1, 11, "USA" },
551 { REG_DOMAIN_DOC, 1, 11, "Canada" },
552 { REG_DOMAIN_ETSI, 1, 13, "Europe" },
553 { REG_DOMAIN_SPAIN, 10, 11, "Spain" },
4d791aad 554 { REG_DOMAIN_FRANCE, 10, 13, "France" },
1da177e4
LT
555 { REG_DOMAIN_MKK, 14, 14, "MKK" },
556 { REG_DOMAIN_MKK1, 1, 14, "MKK1" },
557 { REG_DOMAIN_ISRAEL, 3, 9, "Israel"} };
558
559static void build_wpa_mib(struct atmel_private *priv);
560static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
4d791aad 561static void atmel_copy_to_card(struct net_device *dev, u16 dest,
2f26e8af 562 const unsigned char *src, u16 len);
4d791aad
CP
563static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
564 u16 src, u16 len);
1da177e4
LT
565static void atmel_set_gcr(struct net_device *dev, u16 mask);
566static void atmel_clear_gcr(struct net_device *dev, u16 mask);
567static int atmel_lock_mac(struct atmel_private *priv);
568static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data);
569static void atmel_command_irq(struct atmel_private *priv);
570static int atmel_validate_channel(struct atmel_private *priv, int channel);
4d791aad
CP
571static void atmel_management_frame(struct atmel_private *priv,
572 struct ieee80211_hdr_4addr *header,
1da177e4
LT
573 u16 frame_len, u8 rssi);
574static void atmel_management_timer(u_long a);
4d791aad
CP
575static void atmel_send_command(struct atmel_private *priv, int command,
576 void *cmd, int cmd_size);
577static int atmel_send_command_wait(struct atmel_private *priv, int command,
578 void *cmd, int cmd_size);
579static void atmel_transmit_management_frame(struct atmel_private *priv,
580 struct ieee80211_hdr_4addr *header,
1da177e4
LT
581 u8 *body, int body_len);
582
583static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index);
4d791aad
CP
584static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index,
585 u8 data);
586static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
587 u16 data);
588static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
589 u8 *data, int data_len);
590static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
591 u8 *data, int data_len);
1da177e4
LT
592static void atmel_scan(struct atmel_private *priv, int specific_ssid);
593static void atmel_join_bss(struct atmel_private *priv, int bss_index);
594static void atmel_smooth_qual(struct atmel_private *priv);
595static void atmel_writeAR(struct net_device *dev, u16 data);
596static int probe_atmel_card(struct net_device *dev);
5c877fe5 597static int reset_atmel_card(struct net_device *dev);
1da177e4
LT
598static void atmel_enter_state(struct atmel_private *priv, int new_state);
599int atmel_open (struct net_device *dev);
600
601static inline u16 atmel_hi(struct atmel_private *priv, u16 offset)
602{
603 return priv->host_info_base + offset;
604}
605
606static inline u16 atmel_co(struct atmel_private *priv, u16 offset)
607{
608 return priv->host_info.command_pos + offset;
609}
610
4d791aad 611static inline u16 atmel_rx(struct atmel_private *priv, u16 offset, u16 desc)
1da177e4
LT
612{
613 return priv->host_info.rx_desc_pos + (sizeof(struct rx_desc) * desc) + offset;
614}
615
4d791aad 616static inline u16 atmel_tx(struct atmel_private *priv, u16 offset, u16 desc)
1da177e4
LT
617{
618 return priv->host_info.tx_desc_pos + (sizeof(struct tx_desc) * desc) + offset;
619}
620
621static inline u8 atmel_read8(struct net_device *dev, u16 offset)
622{
623 return inb(dev->base_addr + offset);
624}
625
626static inline void atmel_write8(struct net_device *dev, u16 offset, u8 data)
627{
628 outb(data, dev->base_addr + offset);
629}
630
631static inline u16 atmel_read16(struct net_device *dev, u16 offset)
632{
633 return inw(dev->base_addr + offset);
634}
635
636static inline void atmel_write16(struct net_device *dev, u16 offset, u16 data)
637{
638 outw(data, dev->base_addr + offset);
639}
640
641static inline u8 atmel_rmem8(struct atmel_private *priv, u16 pos)
642{
4d791aad 643 atmel_writeAR(priv->dev, pos);
1da177e4
LT
644 return atmel_read8(priv->dev, DR);
645}
646
647static inline void atmel_wmem8(struct atmel_private *priv, u16 pos, u16 data)
648{
4d791aad 649 atmel_writeAR(priv->dev, pos);
1da177e4
LT
650 atmel_write8(priv->dev, DR, data);
651}
652
653static inline u16 atmel_rmem16(struct atmel_private *priv, u16 pos)
654{
4d791aad 655 atmel_writeAR(priv->dev, pos);
1da177e4
LT
656 return atmel_read16(priv->dev, DR);
657}
658
659static inline void atmel_wmem16(struct atmel_private *priv, u16 pos, u16 data)
660{
4d791aad 661 atmel_writeAR(priv->dev, pos);
1da177e4
LT
662 atmel_write16(priv->dev, DR, data);
663}
664
665static const struct iw_handler_def atmel_handler_def;
666
667static void tx_done_irq(struct atmel_private *priv)
668{
669 int i;
670
4d791aad 671 for (i = 0;
1da177e4
LT
672 atmel_rmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head)) == TX_DONE &&
673 i < priv->host_info.tx_desc_count;
674 i++) {
1da177e4
LT
675 u8 status = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_STATUS_OFFSET, priv->tx_desc_head));
676 u16 msdu_size = atmel_rmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_head));
677 u8 type = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_head));
678
679 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head), 0);
680
681 priv->tx_free_mem += msdu_size;
682 priv->tx_desc_free++;
683
684 if (priv->tx_buff_head + msdu_size > (priv->host_info.tx_buff_pos + priv->host_info.tx_buff_size))
685 priv->tx_buff_head = 0;
686 else
687 priv->tx_buff_head += msdu_size;
4d791aad 688
1da177e4 689 if (priv->tx_desc_head < (priv->host_info.tx_desc_count - 1))
4d791aad 690 priv->tx_desc_head++ ;
1da177e4
LT
691 else
692 priv->tx_desc_head = 0;
4d791aad 693
1da177e4
LT
694 if (type == TX_PACKET_TYPE_DATA) {
695 if (status == TX_STATUS_SUCCESS)
736bc924 696 priv->dev->stats.tx_packets++;
4d791aad 697 else
736bc924 698 priv->dev->stats.tx_errors++;
1da177e4
LT
699 netif_wake_queue(priv->dev);
700 }
701 }
702}
703
704static u16 find_tx_buff(struct atmel_private *priv, u16 len)
705{
706 u16 bottom_free = priv->host_info.tx_buff_size - priv->tx_buff_tail;
707
4d791aad 708 if (priv->tx_desc_free == 3 || priv->tx_free_mem < len)
1da177e4 709 return 0;
4d791aad 710
1da177e4
LT
711 if (bottom_free >= len)
712 return priv->host_info.tx_buff_pos + priv->tx_buff_tail;
4d791aad 713
1da177e4
LT
714 if (priv->tx_free_mem - bottom_free >= len) {
715 priv->tx_buff_tail = 0;
716 return priv->host_info.tx_buff_pos;
717 }
4d791aad 718
1da177e4
LT
719 return 0;
720}
721
4d791aad
CP
722static void tx_update_descriptor(struct atmel_private *priv, int is_bcast,
723 u16 len, u16 buff, u8 type)
1da177e4
LT
724{
725 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, priv->tx_desc_tail), buff);
726 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_tail), len);
727 if (!priv->use_wpa)
728 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_HOST_LENGTH_OFFSET, priv->tx_desc_tail), len);
729 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_tail), type);
730 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RATE_OFFSET, priv->tx_desc_tail), priv->tx_rate);
731 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RETRY_OFFSET, priv->tx_desc_tail), 0);
732 if (priv->use_wpa) {
733 int cipher_type, cipher_length;
734 if (is_bcast) {
735 cipher_type = priv->group_cipher_suite;
4d791aad
CP
736 if (cipher_type == CIPHER_SUITE_WEP_64 ||
737 cipher_type == CIPHER_SUITE_WEP_128)
1da177e4
LT
738 cipher_length = 8;
739 else if (cipher_type == CIPHER_SUITE_TKIP)
740 cipher_length = 12;
741 else if (priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_64 ||
742 priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_128) {
743 cipher_type = priv->pairwise_cipher_suite;
744 cipher_length = 8;
745 } else {
746 cipher_type = CIPHER_SUITE_NONE;
747 cipher_length = 0;
748 }
749 } else {
750 cipher_type = priv->pairwise_cipher_suite;
4d791aad
CP
751 if (cipher_type == CIPHER_SUITE_WEP_64 ||
752 cipher_type == CIPHER_SUITE_WEP_128)
1da177e4
LT
753 cipher_length = 8;
754 else if (cipher_type == CIPHER_SUITE_TKIP)
755 cipher_length = 12;
756 else if (priv->group_cipher_suite == CIPHER_SUITE_WEP_64 ||
757 priv->group_cipher_suite == CIPHER_SUITE_WEP_128) {
758 cipher_type = priv->group_cipher_suite;
759 cipher_length = 8;
760 } else {
761 cipher_type = CIPHER_SUITE_NONE;
762 cipher_length = 0;
763 }
764 }
4d791aad 765
1da177e4 766 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_TYPE_OFFSET, priv->tx_desc_tail),
4d791aad 767 cipher_type);
1da177e4
LT
768 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_LENGTH_OFFSET, priv->tx_desc_tail),
769 cipher_length);
770 }
771 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_tail), 0x80000000L);
772 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_tail), TX_FIRM_OWN);
773 if (priv->tx_desc_previous != priv->tx_desc_tail)
774 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_previous), 0);
775 priv->tx_desc_previous = priv->tx_desc_tail;
4d791aad 776 if (priv->tx_desc_tail < (priv->host_info.tx_desc_count - 1))
1da177e4
LT
777 priv->tx_desc_tail++;
778 else
779 priv->tx_desc_tail = 0;
780 priv->tx_desc_free--;
781 priv->tx_free_mem -= len;
1da177e4
LT
782}
783
4d791aad 784static int start_tx(struct sk_buff *skb, struct net_device *dev)
1da177e4 785{
00a5ebf8 786 static const u8 SNAP_RFC1024[6] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 };
1da177e4 787 struct atmel_private *priv = netdev_priv(dev);
4ca5253d 788 struct ieee80211_hdr_4addr header;
1da177e4
LT
789 unsigned long flags;
790 u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
4d791aad
CP
791
792 if (priv->card && priv->present_callback &&
1da177e4 793 !(*priv->present_callback)(priv->card)) {
736bc924 794 dev->stats.tx_errors++;
1da177e4
LT
795 dev_kfree_skb(skb);
796 return 0;
797 }
4d791aad 798
1da177e4 799 if (priv->station_state != STATION_STATE_READY) {
736bc924 800 dev->stats.tx_errors++;
1da177e4
LT
801 dev_kfree_skb(skb);
802 return 0;
803 }
4d791aad 804
1da177e4 805 /* first ensure the timer func cannot run */
4d791aad 806 spin_lock_bh(&priv->timerlock);
1da177e4 807 /* then stop the hardware ISR */
4d791aad 808 spin_lock_irqsave(&priv->irqlock, flags);
1da177e4 809 /* nb doing the above in the opposite order will deadlock */
4d791aad 810
1da177e4 811 /* The Wireless Header is 30 bytes. In the Ethernet packet we "cut" the
4d791aad
CP
812 12 first bytes (containing DA/SA) and put them in the appropriate
813 fields of the Wireless Header. Thus the packet length is then the
814 initial + 18 (+30-12) */
815
1da177e4 816 if (!(buff = find_tx_buff(priv, len + 18))) {
736bc924 817 dev->stats.tx_dropped++;
1da177e4
LT
818 spin_unlock_irqrestore(&priv->irqlock, flags);
819 spin_unlock_bh(&priv->timerlock);
820 netif_stop_queue(dev);
821 return 1;
822 }
4d791aad 823
b453872c 824 frame_ctl = IEEE80211_FTYPE_DATA;
1da177e4
LT
825 header.duration_id = 0;
826 header.seq_ctl = 0;
827 if (priv->wep_is_on)
f13baae4 828 frame_ctl |= IEEE80211_FCTL_PROTECTED;
1da177e4 829 if (priv->operating_mode == IW_MODE_ADHOC) {
d626f62b 830 skb_copy_from_linear_data(skb, &header.addr1, 6);
1da177e4
LT
831 memcpy(&header.addr2, dev->dev_addr, 6);
832 memcpy(&header.addr3, priv->BSSID, 6);
833 } else {
b453872c 834 frame_ctl |= IEEE80211_FCTL_TODS;
1da177e4
LT
835 memcpy(&header.addr1, priv->CurrentBSSID, 6);
836 memcpy(&header.addr2, dev->dev_addr, 6);
d626f62b 837 skb_copy_from_linear_data(skb, &header.addr3, 6);
1da177e4 838 }
4d791aad 839
1da177e4
LT
840 if (priv->use_wpa)
841 memcpy(&header.addr4, SNAP_RFC1024, 6);
842
843 header.frame_ctl = cpu_to_le16(frame_ctl);
844 /* Copy the wireless header into the card */
845 atmel_copy_to_card(dev, buff, (unsigned char *)&header, DATA_FRAME_WS_HEADER_SIZE);
846 /* Copy the packet sans its 802.3 header addresses which have been replaced */
847 atmel_copy_to_card(dev, buff + DATA_FRAME_WS_HEADER_SIZE, skb->data + 12, len - 12);
848 priv->tx_buff_tail += len - 12 + DATA_FRAME_WS_HEADER_SIZE;
4d791aad 849
1da177e4
LT
850 /* low bit of first byte of destination tells us if broadcast */
851 tx_update_descriptor(priv, *(skb->data) & 0x01, len + 18, buff, TX_PACKET_TYPE_DATA);
852 dev->trans_start = jiffies;
736bc924 853 dev->stats.tx_bytes += len;
4d791aad 854
1da177e4
LT
855 spin_unlock_irqrestore(&priv->irqlock, flags);
856 spin_unlock_bh(&priv->timerlock);
857 dev_kfree_skb(skb);
4d791aad
CP
858
859 return 0;
1da177e4
LT
860}
861
4d791aad 862static void atmel_transmit_management_frame(struct atmel_private *priv,
4ca5253d 863 struct ieee80211_hdr_4addr *header,
1da177e4
LT
864 u8 *body, int body_len)
865{
866 u16 buff;
4d791aad
CP
867 int len = MGMT_FRAME_BODY_OFFSET + body_len;
868
869 if (!(buff = find_tx_buff(priv, len)))
1da177e4
LT
870 return;
871
872 atmel_copy_to_card(priv->dev, buff, (u8 *)header, MGMT_FRAME_BODY_OFFSET);
873 atmel_copy_to_card(priv->dev, buff + MGMT_FRAME_BODY_OFFSET, body, body_len);
874 priv->tx_buff_tail += len;
875 tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT);
876}
4d791aad
CP
877
878static void fast_rx_path(struct atmel_private *priv,
879 struct ieee80211_hdr_4addr *header,
1da177e4
LT
880 u16 msdu_size, u16 rx_packet_loc, u32 crc)
881{
882 /* fast path: unfragmented packet copy directly into skbuf */
4d791aad
CP
883 u8 mac4[6];
884 struct sk_buff *skb;
1da177e4 885 unsigned char *skbp;
4d791aad 886
1da177e4
LT
887 /* get the final, mac 4 header field, this tells us encapsulation */
888 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc + 24, 6);
889 msdu_size -= 6;
4d791aad 890
1da177e4
LT
891 if (priv->do_rx_crc) {
892 crc = crc32_le(crc, mac4, 6);
893 msdu_size -= 4;
894 }
4d791aad 895
1da177e4 896 if (!(skb = dev_alloc_skb(msdu_size + 14))) {
736bc924 897 priv->dev->stats.rx_dropped++;
1da177e4
LT
898 return;
899 }
900
901 skb_reserve(skb, 2);
902 skbp = skb_put(skb, msdu_size + 12);
903 atmel_copy_to_host(priv->dev, skbp + 12, rx_packet_loc + 30, msdu_size);
4d791aad 904
1da177e4
LT
905 if (priv->do_rx_crc) {
906 u32 netcrc;
907 crc = crc32_le(crc, skbp + 12, msdu_size);
908 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + 30 + msdu_size, 4);
909 if ((crc ^ 0xffffffff) != netcrc) {
736bc924 910 priv->dev->stats.rx_crc_errors++;
1da177e4
LT
911 dev_kfree_skb(skb);
912 return;
913 }
914 }
4d791aad 915
1da177e4 916 memcpy(skbp, header->addr1, 6); /* destination address */
4d791aad 917 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
1da177e4
LT
918 memcpy(&skbp[6], header->addr3, 6);
919 else
920 memcpy(&skbp[6], header->addr2, 6); /* source address */
4d791aad
CP
921
922 priv->dev->last_rx = jiffies;
1da177e4 923 skb->protocol = eth_type_trans(skb, priv->dev);
4d791aad 924 skb->ip_summed = CHECKSUM_NONE;
1da177e4 925 netif_rx(skb);
736bc924
PZ
926 priv->dev->stats.rx_bytes += 12 + msdu_size;
927 priv->dev->stats.rx_packets++;
1da177e4
LT
928}
929
930/* Test to see if the packet in card memory at packet_loc has a valid CRC
4d791aad
CP
931 It doesn't matter that this is slow: it is only used to proble the first few
932 packets. */
1da177e4
LT
933static int probe_crc(struct atmel_private *priv, u16 packet_loc, u16 msdu_size)
934{
935 int i = msdu_size - 4;
936 u32 netcrc, crc = 0xffffffff;
937
938 if (msdu_size < 4)
939 return 0;
940
941 atmel_copy_to_host(priv->dev, (void *)&netcrc, packet_loc + i, 4);
4d791aad 942
1da177e4
LT
943 atmel_writeAR(priv->dev, packet_loc);
944 while (i--) {
945 u8 octet = atmel_read8(priv->dev, DR);
946 crc = crc32_le(crc, &octet, 1);
947 }
948
949 return (crc ^ 0xffffffff) == netcrc;
950}
951
4d791aad
CP
952static void frag_rx_path(struct atmel_private *priv,
953 struct ieee80211_hdr_4addr *header,
954 u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no,
955 u8 frag_no, int more_frags)
1da177e4 956{
4d791aad 957 u8 mac4[6];
1da177e4
LT
958 u8 source[6];
959 struct sk_buff *skb;
960
4d791aad 961 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
1da177e4
LT
962 memcpy(source, header->addr3, 6);
963 else
4d791aad
CP
964 memcpy(source, header->addr2, 6);
965
1da177e4 966 rx_packet_loc += 24; /* skip header */
4d791aad 967
1da177e4
LT
968 if (priv->do_rx_crc)
969 msdu_size -= 4;
970
971 if (frag_no == 0) { /* first fragment */
972 atmel_copy_to_host(priv->dev, mac4, rx_packet_loc, 6);
973 msdu_size -= 6;
974 rx_packet_loc += 6;
975
4d791aad 976 if (priv->do_rx_crc)
1da177e4 977 crc = crc32_le(crc, mac4, 6);
4d791aad 978
1da177e4
LT
979 priv->frag_seq = seq_no;
980 priv->frag_no = 1;
981 priv->frag_len = msdu_size;
4d791aad 982 memcpy(priv->frag_source, source, 6);
1da177e4
LT
983 memcpy(&priv->rx_buf[6], source, 6);
984 memcpy(priv->rx_buf, header->addr1, 6);
4d791aad 985
1da177e4
LT
986 atmel_copy_to_host(priv->dev, &priv->rx_buf[12], rx_packet_loc, msdu_size);
987
988 if (priv->do_rx_crc) {
989 u32 netcrc;
990 crc = crc32_le(crc, &priv->rx_buf[12], msdu_size);
991 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
992 if ((crc ^ 0xffffffff) != netcrc) {
736bc924 993 priv->dev->stats.rx_crc_errors++;
1da177e4
LT
994 memset(priv->frag_source, 0xff, 6);
995 }
996 }
4d791aad 997
1da177e4
LT
998 } else if (priv->frag_no == frag_no &&
999 priv->frag_seq == seq_no &&
1000 memcmp(priv->frag_source, source, 6) == 0) {
4d791aad
CP
1001
1002 atmel_copy_to_host(priv->dev, &priv->rx_buf[12 + priv->frag_len],
1da177e4
LT
1003 rx_packet_loc, msdu_size);
1004 if (priv->do_rx_crc) {
1005 u32 netcrc;
4d791aad
CP
1006 crc = crc32_le(crc,
1007 &priv->rx_buf[12 + priv->frag_len],
1da177e4
LT
1008 msdu_size);
1009 atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
1010 if ((crc ^ 0xffffffff) != netcrc) {
736bc924 1011 priv->dev->stats.rx_crc_errors++;
1da177e4
LT
1012 memset(priv->frag_source, 0xff, 6);
1013 more_frags = 1; /* don't send broken assembly */
1014 }
1015 }
4d791aad 1016
1da177e4
LT
1017 priv->frag_len += msdu_size;
1018 priv->frag_no++;
1019
1020 if (!more_frags) { /* last one */
1021 memset(priv->frag_source, 0xff, 6);
1022 if (!(skb = dev_alloc_skb(priv->frag_len + 14))) {
736bc924 1023 priv->dev->stats.rx_dropped++;
1da177e4
LT
1024 } else {
1025 skb_reserve(skb, 2);
4d791aad 1026 memcpy(skb_put(skb, priv->frag_len + 12),
1da177e4
LT
1027 priv->rx_buf,
1028 priv->frag_len + 12);
1029 priv->dev->last_rx = jiffies;
1da177e4 1030 skb->protocol = eth_type_trans(skb, priv->dev);
4d791aad 1031 skb->ip_summed = CHECKSUM_NONE;
1da177e4 1032 netif_rx(skb);
736bc924
PZ
1033 priv->dev->stats.rx_bytes += priv->frag_len + 12;
1034 priv->dev->stats.rx_packets++;
1da177e4
LT
1035 }
1036 }
1da177e4
LT
1037 } else
1038 priv->wstats.discard.fragment++;
1039}
4d791aad 1040
1da177e4
LT
1041static void rx_done_irq(struct atmel_private *priv)
1042{
1043 int i;
4ca5253d 1044 struct ieee80211_hdr_4addr header;
4d791aad
CP
1045
1046 for (i = 0;
1da177e4
LT
1047 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID &&
1048 i < priv->host_info.rx_desc_count;
1049 i++) {
4d791aad 1050
1da177e4
LT
1051 u16 msdu_size, rx_packet_loc, frame_ctl, seq_control;
1052 u8 status = atmel_rmem8(priv, atmel_rx(priv, RX_DESC_STATUS_OFFSET, priv->rx_desc_head));
1053 u32 crc = 0xffffffff;
4d791aad 1054
1da177e4
LT
1055 if (status != RX_STATUS_SUCCESS) {
1056 if (status == 0xc1) /* determined by experiment */
1057 priv->wstats.discard.nwid++;
1058 else
736bc924 1059 priv->dev->stats.rx_errors++;
1da177e4
LT
1060 goto next;
1061 }
1062
1063 msdu_size = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_SIZE_OFFSET, priv->rx_desc_head));
1064 rx_packet_loc = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_POS_OFFSET, priv->rx_desc_head));
4d791aad 1065
1da177e4 1066 if (msdu_size < 30) {
736bc924 1067 priv->dev->stats.rx_errors++;
1da177e4
LT
1068 goto next;
1069 }
4d791aad 1070
1da177e4
LT
1071 /* Get header as far as end of seq_ctl */
1072 atmel_copy_to_host(priv->dev, (char *)&header, rx_packet_loc, 24);
1073 frame_ctl = le16_to_cpu(header.frame_ctl);
1074 seq_control = le16_to_cpu(header.seq_ctl);
1075
4d791aad
CP
1076 /* probe for CRC use here if needed once five packets have
1077 arrived with the same crc status, we assume we know what's
1078 happening and stop probing */
1da177e4 1079 if (priv->probe_crc) {
f13baae4 1080 if (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED)) {
1da177e4
LT
1081 priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size);
1082 } else {
1083 priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24);
1084 }
1085 if (priv->do_rx_crc) {
1086 if (priv->crc_ok_cnt++ > 5)
1087 priv->probe_crc = 0;
1088 } else {
1089 if (priv->crc_ko_cnt++ > 5)
1090 priv->probe_crc = 0;
1091 }
1092 }
4d791aad 1093
1da177e4 1094 /* don't CRC header when WEP in use */
f13baae4 1095 if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED))) {
1da177e4
LT
1096 crc = crc32_le(0xffffffff, (unsigned char *)&header, 24);
1097 }
1098 msdu_size -= 24; /* header */
1099
4d791aad 1100 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) {
b453872c
JG
1101 int more_fragments = frame_ctl & IEEE80211_FCTL_MOREFRAGS;
1102 u8 packet_fragment_no = seq_control & IEEE80211_SCTL_FRAG;
1103 u16 packet_sequence_no = (seq_control & IEEE80211_SCTL_SEQ) >> 4;
4d791aad
CP
1104
1105 if (!more_fragments && packet_fragment_no == 0) {
1da177e4
LT
1106 fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc);
1107 } else {
1108 frag_rx_path(priv, &header, msdu_size, rx_packet_loc, crc,
1109 packet_sequence_no, packet_fragment_no, more_fragments);
1110 }
1111 }
4d791aad 1112
b453872c 1113 if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1da177e4
LT
1114 /* copy rest of packet into buffer */
1115 atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size);
4d791aad 1116
1da177e4
LT
1117 /* we use the same buffer for frag reassembly and control packets */
1118 memset(priv->frag_source, 0xff, 6);
4d791aad 1119
1da177e4
LT
1120 if (priv->do_rx_crc) {
1121 /* last 4 octets is crc */
1122 msdu_size -= 4;
1123 crc = crc32_le(crc, (unsigned char *)&priv->rx_buf, msdu_size);
1124 if ((crc ^ 0xffffffff) != (*((u32 *)&priv->rx_buf[msdu_size]))) {
736bc924 1125 priv->dev->stats.rx_crc_errors++;
1da177e4
LT
1126 goto next;
1127 }
1128 }
1129
1130 atmel_management_frame(priv, &header, msdu_size,
1131 atmel_rmem8(priv, atmel_rx(priv, RX_DESC_RSSI_OFFSET, priv->rx_desc_head)));
4d791aad 1132 }
1da177e4 1133
4d791aad 1134next:
1da177e4 1135 /* release descriptor */
4d791aad
CP
1136 atmel_wmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head), RX_DESC_FLAG_CONSUMED);
1137
1da177e4 1138 if (priv->rx_desc_head < (priv->host_info.rx_desc_count - 1))
4d791aad 1139 priv->rx_desc_head++;
1da177e4
LT
1140 else
1141 priv->rx_desc_head = 0;
1142 }
4d791aad 1143}
1da177e4 1144
7d12e780 1145static irqreturn_t service_interrupt(int irq, void *dev_id)
1da177e4
LT
1146{
1147 struct net_device *dev = (struct net_device *) dev_id;
1148 struct atmel_private *priv = netdev_priv(dev);
1149 u8 isr;
1150 int i = -1;
4d791aad 1151 static u8 irq_order[] = {
1da177e4
LT
1152 ISR_OUT_OF_RANGE,
1153 ISR_RxCOMPLETE,
1154 ISR_TxCOMPLETE,
1155 ISR_RxFRAMELOST,
1156 ISR_FATAL_ERROR,
1157 ISR_COMMAND_COMPLETE,
1158 ISR_IBSS_MERGE,
1159 ISR_GENERIC_IRQ
1160 };
1da177e4 1161
4d791aad 1162 if (priv->card && priv->present_callback &&
1da177e4
LT
1163 !(*priv->present_callback)(priv->card))
1164 return IRQ_HANDLED;
1165
1166 /* In this state upper-level code assumes it can mess with
1167 the card unhampered by interrupts which may change register state.
1168 Note that even though the card shouldn't generate interrupts
4d791aad 1169 the inturrupt line may be shared. This allows card setup
1da177e4
LT
1170 to go on without disabling interrupts for a long time. */
1171 if (priv->station_state == STATION_STATE_DOWN)
1172 return IRQ_NONE;
4d791aad 1173
1da177e4
LT
1174 atmel_clear_gcr(dev, GCR_ENINT); /* disable interrupts */
1175
1176 while (1) {
1177 if (!atmel_lock_mac(priv)) {
1178 /* failed to contact card */
1179 printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1180 return IRQ_HANDLED;
1181 }
4d791aad 1182
1da177e4
LT
1183 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1184 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
4d791aad 1185
1da177e4
LT
1186 if (!isr) {
1187 atmel_set_gcr(dev, GCR_ENINT); /* enable interrupts */
1188 return i == -1 ? IRQ_NONE : IRQ_HANDLED;
1189 }
4d791aad 1190
1da177e4 1191 atmel_set_gcr(dev, GCR_ACKINT); /* acknowledge interrupt */
4d791aad 1192
b4341135 1193 for (i = 0; i < ARRAY_SIZE(irq_order); i++)
1da177e4
LT
1194 if (isr & irq_order[i])
1195 break;
4d791aad 1196
1da177e4
LT
1197 if (!atmel_lock_mac(priv)) {
1198 /* failed to contact card */
1199 printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1200 return IRQ_HANDLED;
1201 }
4d791aad 1202
1da177e4
LT
1203 isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1204 isr ^= irq_order[i];
1205 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET), isr);
1206 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
4d791aad 1207
1da177e4 1208 switch (irq_order[i]) {
4d791aad
CP
1209
1210 case ISR_OUT_OF_RANGE:
1211 if (priv->operating_mode == IW_MODE_INFRA &&
1da177e4
LT
1212 priv->station_state == STATION_STATE_READY) {
1213 priv->station_is_associated = 0;
1214 atmel_scan(priv, 1);
1215 }
1216 break;
1217
1218 case ISR_RxFRAMELOST:
1219 priv->wstats.discard.misc++;
1220 /* fall through */
1221 case ISR_RxCOMPLETE:
4d791aad 1222 rx_done_irq(priv);
1da177e4 1223 break;
4d791aad 1224
1da177e4 1225 case ISR_TxCOMPLETE:
4d791aad 1226 tx_done_irq(priv);
1da177e4 1227 break;
4d791aad 1228
1da177e4
LT
1229 case ISR_FATAL_ERROR:
1230 printk(KERN_ALERT "%s: *** FATAL error interrupt ***\n", dev->name);
1231 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
1232 break;
4d791aad
CP
1233
1234 case ISR_COMMAND_COMPLETE:
1da177e4
LT
1235 atmel_command_irq(priv);
1236 break;
1237
1238 case ISR_IBSS_MERGE:
4d791aad 1239 atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
1da177e4
LT
1240 priv->CurrentBSSID, 6);
1241 /* The WPA stuff cares about the current AP address */
1242 if (priv->use_wpa)
1243 build_wpa_mib(priv);
1244 break;
1245 case ISR_GENERIC_IRQ:
1246 printk(KERN_INFO "%s: Generic_irq received.\n", dev->name);
1247 break;
1248 }
4d791aad 1249 }
1da177e4
LT
1250}
1251
4d791aad 1252static struct iw_statistics *atmel_get_wireless_stats(struct net_device *dev)
1da177e4
LT
1253{
1254 struct atmel_private *priv = netdev_priv(dev);
1255
4d791aad 1256 /* update the link quality here in case we are seeing no beacons
1da177e4
LT
1257 at all to drive the process */
1258 atmel_smooth_qual(priv);
4d791aad 1259
1da177e4
LT
1260 priv->wstats.status = priv->station_state;
1261
1262 if (priv->operating_mode == IW_MODE_INFRA) {
1263 if (priv->station_state != STATION_STATE_READY) {
1264 priv->wstats.qual.qual = 0;
1265 priv->wstats.qual.level = 0;
1266 priv->wstats.qual.updated = (IW_QUAL_QUAL_INVALID
1267 | IW_QUAL_LEVEL_INVALID);
1268 }
1269 priv->wstats.qual.noise = 0;
1270 priv->wstats.qual.updated |= IW_QUAL_NOISE_INVALID;
1271 } else {
1272 /* Quality levels cannot be determined in ad-hoc mode,
1273 because we can 'hear' more that one remote station. */
1274 priv->wstats.qual.qual = 0;
1275 priv->wstats.qual.level = 0;
1276 priv->wstats.qual.noise = 0;
1277 priv->wstats.qual.updated = IW_QUAL_QUAL_INVALID
1278 | IW_QUAL_LEVEL_INVALID
1279 | IW_QUAL_NOISE_INVALID;
1280 priv->wstats.miss.beacon = 0;
1281 }
4d791aad
CP
1282
1283 return &priv->wstats;
1da177e4
LT
1284}
1285
1286static int atmel_change_mtu(struct net_device *dev, int new_mtu)
1287{
1288 if ((new_mtu < 68) || (new_mtu > 2312))
1289 return -EINVAL;
1290 dev->mtu = new_mtu;
1291 return 0;
1292}
1293
1294static int atmel_set_mac_address(struct net_device *dev, void *p)
1295{
1296 struct sockaddr *addr = p;
4d791aad 1297
1da177e4
LT
1298 memcpy (dev->dev_addr, addr->sa_data, dev->addr_len);
1299 return atmel_open(dev);
1300}
1301
1302EXPORT_SYMBOL(atmel_open);
1303
4d791aad 1304int atmel_open(struct net_device *dev)
1da177e4
LT
1305{
1306 struct atmel_private *priv = netdev_priv(dev);
3c34a5d8 1307 int i, channel, err;
1da177e4
LT
1308
1309 /* any scheduled timer is no longer needed and might screw things up.. */
1310 del_timer_sync(&priv->management_timer);
4d791aad 1311
1da177e4
LT
1312 /* Interrupts will not touch the card once in this state... */
1313 priv->station_state = STATION_STATE_DOWN;
1314
1315 if (priv->new_SSID_size) {
1316 memcpy(priv->SSID, priv->new_SSID, priv->new_SSID_size);
1317 priv->SSID_size = priv->new_SSID_size;
1318 priv->new_SSID_size = 0;
1319 }
1320 priv->BSS_list_entries = 0;
1321
1322 priv->AuthenticationRequestRetryCnt = 0;
1323 priv->AssociationRequestRetryCnt = 0;
1324 priv->ReAssociationRequestRetryCnt = 0;
1325 priv->CurrentAuthentTransactionSeqNum = 0x0001;
1326 priv->ExpectedAuthentTransactionSeqNum = 0x0002;
1327
1328 priv->site_survey_state = SITE_SURVEY_IDLE;
1329 priv->station_is_associated = 0;
1330
3c34a5d8
DW
1331 err = reset_atmel_card(dev);
1332 if (err)
1333 return err;
1da177e4
LT
1334
1335 if (priv->config_reg_domain) {
1336 priv->reg_domain = priv->config_reg_domain;
1337 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS, priv->reg_domain);
1338 } else {
1339 priv->reg_domain = atmel_get_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS);
b4341135 1340 for (i = 0; i < ARRAY_SIZE(channel_table); i++)
1da177e4
LT
1341 if (priv->reg_domain == channel_table[i].reg_domain)
1342 break;
b4341135 1343 if (i == ARRAY_SIZE(channel_table)) {
1da177e4
LT
1344 priv->reg_domain = REG_DOMAIN_MKK1;
1345 printk(KERN_ALERT "%s: failed to get regulatory domain: assuming MKK1.\n", dev->name);
4d791aad 1346 }
1da177e4 1347 }
4d791aad 1348
1da177e4
LT
1349 if ((channel = atmel_validate_channel(priv, priv->channel)))
1350 priv->channel = channel;
1351
4d791aad
CP
1352 /* this moves station_state on.... */
1353 atmel_scan(priv, 1);
1da177e4
LT
1354
1355 atmel_set_gcr(priv->dev, GCR_ENINT); /* enable interrupts */
1356 return 0;
1357}
1358
4d791aad 1359static int atmel_close(struct net_device *dev)
1da177e4
LT
1360{
1361 struct atmel_private *priv = netdev_priv(dev);
4d791aad 1362
9a6301c1
DW
1363 /* Send event to userspace that we are disassociating */
1364 if (priv->station_state == STATION_STATE_READY) {
1365 union iwreq_data wrqu;
1366
1367 wrqu.data.length = 0;
1368 wrqu.data.flags = 0;
1369 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
1370 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
1371 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
1372 }
1373
1da177e4 1374 atmel_enter_state(priv, STATION_STATE_DOWN);
4d791aad
CP
1375
1376 if (priv->bus_type == BUS_TYPE_PCCARD)
1da177e4
LT
1377 atmel_write16(dev, GCR, 0x0060);
1378 atmel_write16(dev, GCR, 0x0040);
1379 return 0;
1380}
1381
1382static int atmel_validate_channel(struct atmel_private *priv, int channel)
1383{
1384 /* check that channel is OK, if so return zero,
1385 else return suitable default channel */
1386 int i;
1387
b4341135 1388 for (i = 0; i < ARRAY_SIZE(channel_table); i++)
1da177e4
LT
1389 if (priv->reg_domain == channel_table[i].reg_domain) {
1390 if (channel >= channel_table[i].min &&
1391 channel <= channel_table[i].max)
1392 return 0;
1393 else
1394 return channel_table[i].min;
1395 }
1396 return 0;
1397}
1398
1399static int atmel_proc_output (char *buf, struct atmel_private *priv)
1400{
1401 int i;
1402 char *p = buf;
1403 char *s, *r, *c;
4d791aad
CP
1404
1405 p += sprintf(p, "Driver version:\t\t%d.%d\n",
1406 DRIVER_MAJOR, DRIVER_MINOR);
1407
1da177e4 1408 if (priv->station_state != STATION_STATE_DOWN) {
4d791aad
CP
1409 p += sprintf(p, "Firmware version:\t%d.%d build %d\n"
1410 "Firmware location:\t",
1da177e4
LT
1411 priv->host_info.major_version,
1412 priv->host_info.minor_version,
1413 priv->host_info.build_version);
4d791aad
CP
1414
1415 if (priv->card_type != CARD_TYPE_EEPROM)
1da177e4 1416 p += sprintf(p, "on card\n");
4d791aad
CP
1417 else if (priv->firmware)
1418 p += sprintf(p, "%s loaded by host\n",
1419 priv->firmware_id);
1da177e4 1420 else
4d791aad
CP
1421 p += sprintf(p, "%s loaded by hotplug\n",
1422 priv->firmware_id);
1423
1424 switch (priv->card_type) {
1da177e4
LT
1425 case CARD_TYPE_PARALLEL_FLASH: c = "Parallel flash"; break;
1426 case CARD_TYPE_SPI_FLASH: c = "SPI flash\n"; break;
1427 case CARD_TYPE_EEPROM: c = "EEPROM"; break;
1428 default: c = "<unknown>";
1429 }
1430
1da177e4 1431 r = "<unknown>";
b4341135 1432 for (i = 0; i < ARRAY_SIZE(channel_table); i++)
1da177e4
LT
1433 if (priv->reg_domain == channel_table[i].reg_domain)
1434 r = channel_table[i].name;
4d791aad 1435
1da177e4
LT
1436 p += sprintf(p, "MAC memory type:\t%s\n", c);
1437 p += sprintf(p, "Regulatory domain:\t%s\n", r);
4d791aad 1438 p += sprintf(p, "Host CRC checking:\t%s\n",
1da177e4
LT
1439 priv->do_rx_crc ? "On" : "Off");
1440 p += sprintf(p, "WPA-capable firmware:\t%s\n",
1441 priv->use_wpa ? "Yes" : "No");
1442 }
4d791aad 1443
1da177e4
LT
1444 switch(priv->station_state) {
1445 case STATION_STATE_SCANNING: s = "Scanning"; break;
1446 case STATION_STATE_JOINNING: s = "Joining"; break;
1447 case STATION_STATE_AUTHENTICATING: s = "Authenticating"; break;
1448 case STATION_STATE_ASSOCIATING: s = "Associating"; break;
1449 case STATION_STATE_READY: s = "Ready"; break;
1450 case STATION_STATE_REASSOCIATING: s = "Reassociating"; break;
1451 case STATION_STATE_MGMT_ERROR: s = "Management error"; break;
1452 case STATION_STATE_DOWN: s = "Down"; break;
1453 default: s = "<unknown>";
1454 }
4d791aad 1455
1da177e4 1456 p += sprintf(p, "Current state:\t\t%s\n", s);
4d791aad 1457 return p - buf;
1da177e4
LT
1458}
1459
1460static int atmel_read_proc(char *page, char **start, off_t off,
1461 int count, int *eof, void *data)
1462{
1463 struct atmel_private *priv = data;
1464 int len = atmel_proc_output (page, priv);
1465 if (len <= off+count) *eof = 1;
1466 *start = page + off;
1467 len -= off;
1468 if (len>count) len = count;
1469 if (len<0) len = 0;
1470 return len;
1471}
1472
4d791aad
CP
1473struct net_device *init_atmel_card(unsigned short irq, unsigned long port,
1474 const AtmelFWType fw_type,
1475 struct device *sys_dev,
1476 int (*card_present)(void *), void *card)
1da177e4 1477{
5bc4c36d 1478 struct proc_dir_entry *ent;
1da177e4
LT
1479 struct net_device *dev;
1480 struct atmel_private *priv;
1481 int rc;
1482
1483 /* Create the network device object. */
1484 dev = alloc_etherdev(sizeof(*priv));
1485 if (!dev) {
4d791aad 1486 printk(KERN_ERR "atmel: Couldn't alloc_etherdev\n");
1da177e4
LT
1487 return NULL;
1488 }
1489 if (dev_alloc_name(dev, dev->name) < 0) {
4d791aad 1490 printk(KERN_ERR "atmel: Couldn't get name!\n");
1da177e4
LT
1491 goto err_out_free;
1492 }
1493
1494 priv = netdev_priv(dev);
1495 priv->dev = dev;
1496 priv->sys_dev = sys_dev;
1497 priv->present_callback = card_present;
1498 priv->card = card;
1499 priv->firmware = NULL;
1500 priv->firmware_id[0] = '\0';
1501 priv->firmware_type = fw_type;
1502 if (firmware) /* module parameter */
1503 strcpy(priv->firmware_id, firmware);
1504 priv->bus_type = card_present ? BUS_TYPE_PCCARD : BUS_TYPE_PCI;
1505 priv->station_state = STATION_STATE_DOWN;
1506 priv->do_rx_crc = 0;
1507 /* For PCMCIA cards, some chips need CRC, some don't
1508 so we have to probe. */
1509 if (priv->bus_type == BUS_TYPE_PCCARD) {
1510 priv->probe_crc = 1;
1511 priv->crc_ok_cnt = priv->crc_ko_cnt = 0;
1512 } else
1513 priv->probe_crc = 0;
1da177e4
LT
1514 priv->last_qual = jiffies;
1515 priv->last_beacon_timestamp = 0;
1516 memset(priv->frag_source, 0xff, sizeof(priv->frag_source));
1517 memset(priv->BSSID, 0, 6);
1518 priv->CurrentBSSID[0] = 0xFF; /* Initialize to something invalid.... */
1519 priv->station_was_associated = 0;
4d791aad 1520
1da177e4
LT
1521 priv->last_survey = jiffies;
1522 priv->preamble = LONG_PREAMBLE;
1523 priv->operating_mode = IW_MODE_INFRA;
1524 priv->connect_to_any_BSS = 0;
1525 priv->config_reg_domain = 0;
1526 priv->reg_domain = 0;
1527 priv->tx_rate = 3;
1528 priv->auto_tx_rate = 1;
1529 priv->channel = 4;
1530 priv->power_mode = 0;
1531 priv->SSID[0] = '\0';
1532 priv->SSID_size = 0;
1533 priv->new_SSID_size = 0;
1534 priv->frag_threshold = 2346;
1535 priv->rts_threshold = 2347;
1536 priv->short_retry = 7;
1537 priv->long_retry = 4;
1538
1539 priv->wep_is_on = 0;
1540 priv->default_key = 0;
1541 priv->encryption_level = 0;
1542 priv->exclude_unencrypted = 0;
1543 priv->group_cipher_suite = priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1544 priv->use_wpa = 0;
1545 memset(priv->wep_keys, 0, sizeof(priv->wep_keys));
1546 memset(priv->wep_key_len, 0, sizeof(priv->wep_key_len));
1547
1548 priv->default_beacon_period = priv->beacon_period = 100;
1549 priv->listen_interval = 1;
1550
1551 init_timer(&priv->management_timer);
1552 spin_lock_init(&priv->irqlock);
1553 spin_lock_init(&priv->timerlock);
1554 priv->management_timer.function = atmel_management_timer;
1555 priv->management_timer.data = (unsigned long) dev;
4d791aad 1556
1da177e4
LT
1557 dev->open = atmel_open;
1558 dev->stop = atmel_close;
1559 dev->change_mtu = atmel_change_mtu;
1560 dev->set_mac_address = atmel_set_mac_address;
1561 dev->hard_start_xmit = start_tx;
1da177e4
LT
1562 dev->wireless_handlers = (struct iw_handler_def *)&atmel_handler_def;
1563 dev->do_ioctl = atmel_ioctl;
1564 dev->irq = irq;
1565 dev->base_addr = port;
4d791aad 1566
1da177e4 1567 SET_NETDEV_DEV(dev, sys_dev);
4d791aad 1568
1fb9df5d 1569 if ((rc = request_irq(dev->irq, service_interrupt, IRQF_SHARED, dev->name, dev))) {
4d791aad 1570 printk(KERN_ERR "%s: register interrupt %d failed, rc %d\n", dev->name, irq, rc);
1da177e4
LT
1571 goto err_out_free;
1572 }
1573
4d791aad 1574 if (!request_region(dev->base_addr, 32,
b16a228d 1575 priv->bus_type == BUS_TYPE_PCCARD ? "atmel_cs" : "atmel_pci")) {
1da177e4
LT
1576 goto err_out_irq;
1577 }
4d791aad 1578
1da177e4
LT
1579 if (register_netdev(dev))
1580 goto err_out_res;
4d791aad 1581
1da177e4
LT
1582 if (!probe_atmel_card(dev)){
1583 unregister_netdev(dev);
1584 goto err_out_res;
1585 }
4d791aad 1586
1da177e4 1587 netif_carrier_off(dev);
4d791aad 1588
5bc4c36d
CL
1589 ent = create_proc_read_entry ("driver/atmel", 0, NULL, atmel_read_proc, priv);
1590 if (!ent)
1591 printk(KERN_WARNING "atmel: unable to create /proc entry.\n");
4d791aad 1592
e174961c
JB
1593 printk(KERN_INFO "%s: Atmel at76c50x. Version %d.%d. MAC %pM\n",
1594 dev->name, DRIVER_MAJOR, DRIVER_MINOR, dev->dev_addr);
4d791aad 1595
1da177e4 1596 return dev;
4d791aad
CP
1597
1598err_out_res:
b16a228d 1599 release_region( dev->base_addr, 32);
4d791aad 1600err_out_irq:
1da177e4 1601 free_irq(dev->irq, dev);
4d791aad 1602err_out_free:
1da177e4
LT
1603 free_netdev(dev);
1604 return NULL;
1605}
1606
1607EXPORT_SYMBOL(init_atmel_card);
1608
b16a228d 1609void stop_atmel_card(struct net_device *dev)
1da177e4
LT
1610{
1611 struct atmel_private *priv = netdev_priv(dev);
4d791aad 1612
1da177e4 1613 /* put a brick on it... */
4d791aad 1614 if (priv->bus_type == BUS_TYPE_PCCARD)
1da177e4
LT
1615 atmel_write16(dev, GCR, 0x0060);
1616 atmel_write16(dev, GCR, 0x0040);
4d791aad 1617
1da177e4
LT
1618 del_timer_sync(&priv->management_timer);
1619 unregister_netdev(dev);
1620 remove_proc_entry("driver/atmel", NULL);
1621 free_irq(dev->irq, dev);
b4558ea9 1622 kfree(priv->firmware);
b16a228d 1623 release_region(dev->base_addr, 32);
1da177e4
LT
1624 free_netdev(dev);
1625}
1626
1627EXPORT_SYMBOL(stop_atmel_card);
1628
1629static int atmel_set_essid(struct net_device *dev,
1630 struct iw_request_info *info,
1631 struct iw_point *dwrq,
1632 char *extra)
1633{
1634 struct atmel_private *priv = netdev_priv(dev);
1635
1636 /* Check if we asked for `any' */
1637 if(dwrq->flags == 0) {
1638 priv->connect_to_any_BSS = 1;
1639 } else {
1640 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1641
1642 priv->connect_to_any_BSS = 0;
4d791aad 1643
1da177e4 1644 /* Check the size of the string */
6a484db4 1645 if (dwrq->length > MAX_SSID_LENGTH)
4d791aad 1646 return -E2BIG;
1da177e4
LT
1647 if (index != 0)
1648 return -EINVAL;
4d791aad 1649
6a484db4
JT
1650 memcpy(priv->new_SSID, extra, dwrq->length);
1651 priv->new_SSID_size = dwrq->length;
1da177e4
LT
1652 }
1653
1654 return -EINPROGRESS;
1655}
1656
1657static int atmel_get_essid(struct net_device *dev,
1658 struct iw_request_info *info,
1659 struct iw_point *dwrq,
1660 char *extra)
1661{
1662 struct atmel_private *priv = netdev_priv(dev);
1663
1664 /* Get the current SSID */
1665 if (priv->new_SSID_size != 0) {
1666 memcpy(extra, priv->new_SSID, priv->new_SSID_size);
d6a13a24 1667 dwrq->length = priv->new_SSID_size;
1da177e4
LT
1668 } else {
1669 memcpy(extra, priv->SSID, priv->SSID_size);
d6a13a24 1670 dwrq->length = priv->SSID_size;
1da177e4 1671 }
4d791aad 1672
1da177e4
LT
1673 dwrq->flags = !priv->connect_to_any_BSS; /* active */
1674
1675 return 0;
1676}
1677
1678static int atmel_get_wap(struct net_device *dev,
1679 struct iw_request_info *info,
1680 struct sockaddr *awrq,
1681 char *extra)
1682{
1683 struct atmel_private *priv = netdev_priv(dev);
1684 memcpy(awrq->sa_data, priv->CurrentBSSID, 6);
1685 awrq->sa_family = ARPHRD_ETHER;
1686
1687 return 0;
1688}
1689
1690static int atmel_set_encode(struct net_device *dev,
1691 struct iw_request_info *info,
1692 struct iw_point *dwrq,
1693 char *extra)
1694{
1695 struct atmel_private *priv = netdev_priv(dev);
1696
1697 /* Basic checking: do we have a key to set ?
1698 * Note : with the new API, it's impossible to get a NULL pointer.
1699 * Therefore, we need to check a key size == 0 instead.
1700 * New version of iwconfig properly set the IW_ENCODE_NOKEY flag
1701 * when no key is present (only change flags), but older versions
1702 * don't do it. - Jean II */
1703 if (dwrq->length > 0) {
1704 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1705 int current_index = priv->default_key;
1706 /* Check the size of the key */
1707 if (dwrq->length > 13) {
1708 return -EINVAL;
1709 }
1710 /* Check the index (none -> use current) */
1711 if (index < 0 || index >= 4)
1712 index = current_index;
1713 else
1714 priv->default_key = index;
1715 /* Set the length */
1716 if (dwrq->length > 5)
1717 priv->wep_key_len[index] = 13;
1718 else
1719 if (dwrq->length > 0)
1720 priv->wep_key_len[index] = 5;
1721 else
1722 /* Disable the key */
1723 priv->wep_key_len[index] = 0;
1724 /* Check if the key is not marked as invalid */
5c877fe5 1725 if (!(dwrq->flags & IW_ENCODE_NOKEY)) {
1da177e4
LT
1726 /* Cleanup */
1727 memset(priv->wep_keys[index], 0, 13);
1728 /* Copy the key in the driver */
1729 memcpy(priv->wep_keys[index], extra, dwrq->length);
1730 }
1731 /* WE specify that if a valid key is set, encryption
1732 * should be enabled (user may turn it off later)
1733 * This is also how "iwconfig ethX key on" works */
4d791aad 1734 if (index == current_index &&
1da177e4
LT
1735 priv->wep_key_len[index] > 0) {
1736 priv->wep_is_on = 1;
1737 priv->exclude_unencrypted = 1;
1738 if (priv->wep_key_len[index] > 5) {
9a6301c1 1739 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1da177e4
LT
1740 priv->encryption_level = 2;
1741 } else {
9a6301c1 1742 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1da177e4
LT
1743 priv->encryption_level = 1;
1744 }
1745 }
1746 } else {
1747 /* Do we want to just set the transmit key index ? */
1748 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
4d791aad 1749 if (index >= 0 && index < 4) {
1da177e4
LT
1750 priv->default_key = index;
1751 } else
1752 /* Don't complain if only change the mode */
93a3b607 1753 if (!(dwrq->flags & IW_ENCODE_MODE))
1da177e4 1754 return -EINVAL;
1da177e4
LT
1755 }
1756 /* Read the flags */
4d791aad 1757 if (dwrq->flags & IW_ENCODE_DISABLED) {
1da177e4 1758 priv->wep_is_on = 0;
4d791aad 1759 priv->encryption_level = 0;
1da177e4
LT
1760 priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1761 } else {
1762 priv->wep_is_on = 1;
1763 if (priv->wep_key_len[priv->default_key] > 5) {
1764 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1765 priv->encryption_level = 2;
1766 } else {
1767 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1768 priv->encryption_level = 1;
1769 }
1770 }
4d791aad 1771 if (dwrq->flags & IW_ENCODE_RESTRICTED)
1da177e4 1772 priv->exclude_unencrypted = 1;
4d791aad 1773 if(dwrq->flags & IW_ENCODE_OPEN)
1da177e4 1774 priv->exclude_unencrypted = 0;
4d791aad 1775
1da177e4
LT
1776 return -EINPROGRESS; /* Call commit handler */
1777}
1778
1da177e4
LT
1779static int atmel_get_encode(struct net_device *dev,
1780 struct iw_request_info *info,
1781 struct iw_point *dwrq,
1782 char *extra)
1783{
1784 struct atmel_private *priv = netdev_priv(dev);
1785 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
4d791aad 1786
1da177e4
LT
1787 if (!priv->wep_is_on)
1788 dwrq->flags = IW_ENCODE_DISABLED;
b16a228d 1789 else {
1790 if (priv->exclude_unencrypted)
1791 dwrq->flags = IW_ENCODE_RESTRICTED;
1792 else
1793 dwrq->flags = IW_ENCODE_OPEN;
1794 }
1da177e4
LT
1795 /* Which key do we want ? -1 -> tx index */
1796 if (index < 0 || index >= 4)
1797 index = priv->default_key;
1798 dwrq->flags |= index + 1;
1799 /* Copy the key to the user buffer */
1800 dwrq->length = priv->wep_key_len[index];
1801 if (dwrq->length > 16) {
1802 dwrq->length=0;
1803 } else {
1804 memset(extra, 0, 16);
1805 memcpy(extra, priv->wep_keys[index], dwrq->length);
1806 }
4d791aad 1807
1da177e4
LT
1808 return 0;
1809}
1810
9a6301c1
DW
1811static int atmel_set_encodeext(struct net_device *dev,
1812 struct iw_request_info *info,
1813 union iwreq_data *wrqu,
1814 char *extra)
1815{
1816 struct atmel_private *priv = netdev_priv(dev);
1817 struct iw_point *encoding = &wrqu->encoding;
1818 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
0d467502 1819 int idx, key_len, alg = ext->alg, set_key = 1;
9a6301c1
DW
1820
1821 /* Determine and validate the key index */
1822 idx = encoding->flags & IW_ENCODE_INDEX;
1823 if (idx) {
1824 if (idx < 1 || idx > WEP_KEYS)
1825 return -EINVAL;
1826 idx--;
1827 } else
1828 idx = priv->default_key;
1829
0d467502
DW
1830 if (encoding->flags & IW_ENCODE_DISABLED)
1831 alg = IW_ENCODE_ALG_NONE;
9a6301c1 1832
0d467502 1833 if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
9a6301c1 1834 priv->default_key = idx;
0d467502
DW
1835 set_key = ext->key_len > 0 ? 1 : 0;
1836 }
9a6301c1 1837
0d467502
DW
1838 if (set_key) {
1839 /* Set the requested key first */
1840 switch (alg) {
1841 case IW_ENCODE_ALG_NONE:
1842 priv->wep_is_on = 0;
1843 priv->encryption_level = 0;
1844 priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1845 break;
1846 case IW_ENCODE_ALG_WEP:
1847 if (ext->key_len > 5) {
1848 priv->wep_key_len[idx] = 13;
1849 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1850 priv->encryption_level = 2;
1851 } else if (ext->key_len > 0) {
1852 priv->wep_key_len[idx] = 5;
1853 priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1854 priv->encryption_level = 1;
1855 } else {
1856 return -EINVAL;
1857 }
1858 priv->wep_is_on = 1;
1859 memset(priv->wep_keys[idx], 0, 13);
1860 key_len = min ((int)ext->key_len, priv->wep_key_len[idx]);
1861 memcpy(priv->wep_keys[idx], ext->key, key_len);
1862 break;
1863 default:
9a6301c1
DW
1864 return -EINVAL;
1865 }
9a6301c1
DW
1866 }
1867
1868 return -EINPROGRESS;
1869}
1870
1871static int atmel_get_encodeext(struct net_device *dev,
1872 struct iw_request_info *info,
1873 union iwreq_data *wrqu,
1874 char *extra)
1875{
1876 struct atmel_private *priv = netdev_priv(dev);
1877 struct iw_point *encoding = &wrqu->encoding;
1878 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1879 int idx, max_key_len;
1880
1881 max_key_len = encoding->length - sizeof(*ext);
1882 if (max_key_len < 0)
1883 return -EINVAL;
1884
1885 idx = encoding->flags & IW_ENCODE_INDEX;
1886 if (idx) {
1887 if (idx < 1 || idx > WEP_KEYS)
1888 return -EINVAL;
1889 idx--;
1890 } else
1891 idx = priv->default_key;
1892
1893 encoding->flags = idx + 1;
1894 memset(ext, 0, sizeof(*ext));
5c877fe5 1895
9a6301c1
DW
1896 if (!priv->wep_is_on) {
1897 ext->alg = IW_ENCODE_ALG_NONE;
1898 ext->key_len = 0;
1899 encoding->flags |= IW_ENCODE_DISABLED;
1900 } else {
1901 if (priv->encryption_level > 0)
1902 ext->alg = IW_ENCODE_ALG_WEP;
1903 else
1904 return -EINVAL;
1905
1906 ext->key_len = priv->wep_key_len[idx];
1907 memcpy(ext->key, priv->wep_keys[idx], ext->key_len);
1908 encoding->flags |= IW_ENCODE_ENABLED;
1909 }
1910
1911 return 0;
1912}
1913
1914static int atmel_set_auth(struct net_device *dev,
1915 struct iw_request_info *info,
1916 union iwreq_data *wrqu, char *extra)
1917{
1918 struct atmel_private *priv = netdev_priv(dev);
1919 struct iw_param *param = &wrqu->param;
1920
1921 switch (param->flags & IW_AUTH_INDEX) {
1922 case IW_AUTH_WPA_VERSION:
1923 case IW_AUTH_CIPHER_PAIRWISE:
1924 case IW_AUTH_CIPHER_GROUP:
1925 case IW_AUTH_KEY_MGMT:
1926 case IW_AUTH_RX_UNENCRYPTED_EAPOL:
1927 case IW_AUTH_PRIVACY_INVOKED:
1928 /*
1929 * atmel does not use these parameters
1930 */
1931 break;
1932
1933 case IW_AUTH_DROP_UNENCRYPTED:
1934 priv->exclude_unencrypted = param->value ? 1 : 0;
1935 break;
1936
1937 case IW_AUTH_80211_AUTH_ALG: {
1938 if (param->value & IW_AUTH_ALG_SHARED_KEY) {
1939 priv->exclude_unencrypted = 1;
1940 } else if (param->value & IW_AUTH_ALG_OPEN_SYSTEM) {
1941 priv->exclude_unencrypted = 0;
1942 } else
1943 return -EINVAL;
1944 break;
1945 }
1946
1947 case IW_AUTH_WPA_ENABLED:
1948 /* Silently accept disable of WPA */
1949 if (param->value > 0)
1950 return -EOPNOTSUPP;
1951 break;
1952
1953 default:
1954 return -EOPNOTSUPP;
1955 }
1956 return -EINPROGRESS;
1957}
1958
1959static int atmel_get_auth(struct net_device *dev,
1960 struct iw_request_info *info,
1961 union iwreq_data *wrqu, char *extra)
1962{
1963 struct atmel_private *priv = netdev_priv(dev);
1964 struct iw_param *param = &wrqu->param;
1965
1966 switch (param->flags & IW_AUTH_INDEX) {
1967 case IW_AUTH_DROP_UNENCRYPTED:
1968 param->value = priv->exclude_unencrypted;
1969 break;
1970
1971 case IW_AUTH_80211_AUTH_ALG:
1972 if (priv->exclude_unencrypted == 1)
1973 param->value = IW_AUTH_ALG_SHARED_KEY;
1974 else
1975 param->value = IW_AUTH_ALG_OPEN_SYSTEM;
1976 break;
1977
1978 case IW_AUTH_WPA_ENABLED:
1979 param->value = 0;
1980 break;
1981
1982 default:
1983 return -EOPNOTSUPP;
1984 }
1985 return 0;
1986}
1987
1988
1da177e4
LT
1989static int atmel_get_name(struct net_device *dev,
1990 struct iw_request_info *info,
1991 char *cwrq,
1992 char *extra)
1993{
1994 strcpy(cwrq, "IEEE 802.11-DS");
1995 return 0;
1996}
1997
1998static int atmel_set_rate(struct net_device *dev,
1999 struct iw_request_info *info,
2000 struct iw_param *vwrq,
2001 char *extra)
2002{
2003 struct atmel_private *priv = netdev_priv(dev);
4d791aad 2004
1da177e4
LT
2005 if (vwrq->fixed == 0) {
2006 priv->tx_rate = 3;
2007 priv->auto_tx_rate = 1;
2008 } else {
2009 priv->auto_tx_rate = 0;
4d791aad 2010
1da177e4 2011 /* Which type of value ? */
4d791aad 2012 if ((vwrq->value < 4) && (vwrq->value >= 0)) {
1da177e4 2013 /* Setting by rate index */
4d791aad 2014 priv->tx_rate = vwrq->value;
1da177e4
LT
2015 } else {
2016 /* Setting by frequency value */
2017 switch (vwrq->value) {
2018 case 1000000: priv->tx_rate = 0; break;
2019 case 2000000: priv->tx_rate = 1; break;
2020 case 5500000: priv->tx_rate = 2; break;
2021 case 11000000: priv->tx_rate = 3; break;
2022 default: return -EINVAL;
2023 }
2024 }
2025 }
2026
2027 return -EINPROGRESS;
2028}
2029
2030static int atmel_set_mode(struct net_device *dev,
2031 struct iw_request_info *info,
2032 __u32 *uwrq,
2033 char *extra)
2034{
2035 struct atmel_private *priv = netdev_priv(dev);
2036
2037 if (*uwrq != IW_MODE_ADHOC && *uwrq != IW_MODE_INFRA)
2038 return -EINVAL;
2039
2040 priv->operating_mode = *uwrq;
4d791aad 2041 return -EINPROGRESS;
1da177e4
LT
2042}
2043
2044static int atmel_get_mode(struct net_device *dev,
2045 struct iw_request_info *info,
2046 __u32 *uwrq,
2047 char *extra)
2048{
2049 struct atmel_private *priv = netdev_priv(dev);
4d791aad 2050
1da177e4
LT
2051 *uwrq = priv->operating_mode;
2052 return 0;
2053}
2054
2055static int atmel_get_rate(struct net_device *dev,
2056 struct iw_request_info *info,
2057 struct iw_param *vwrq,
2058 char *extra)
2059{
2060 struct atmel_private *priv = netdev_priv(dev);
2061
2062 if (priv->auto_tx_rate) {
2063 vwrq->fixed = 0;
2064 vwrq->value = 11000000;
2065 } else {
2066 vwrq->fixed = 1;
2067 switch(priv->tx_rate) {
2068 case 0: vwrq->value = 1000000; break;
2069 case 1: vwrq->value = 2000000; break;
2070 case 2: vwrq->value = 5500000; break;
2071 case 3: vwrq->value = 11000000; break;
2072 }
2073 }
2074 return 0;
2075}
2076
2077static int atmel_set_power(struct net_device *dev,
2078 struct iw_request_info *info,
2079 struct iw_param *vwrq,
2080 char *extra)
2081{
2082 struct atmel_private *priv = netdev_priv(dev);
2083 priv->power_mode = vwrq->disabled ? 0 : 1;
2084 return -EINPROGRESS;
2085}
2086
2087static int atmel_get_power(struct net_device *dev,
2088 struct iw_request_info *info,
2089 struct iw_param *vwrq,
2090 char *extra)
2091{
2092 struct atmel_private *priv = netdev_priv(dev);
2093 vwrq->disabled = priv->power_mode ? 0 : 1;
2094 vwrq->flags = IW_POWER_ON;
2095 return 0;
2096}
2097
2098static int atmel_set_retry(struct net_device *dev,
2099 struct iw_request_info *info,
2100 struct iw_param *vwrq,
2101 char *extra)
2102{
2103 struct atmel_private *priv = netdev_priv(dev);
4d791aad
CP
2104
2105 if (!vwrq->disabled && (vwrq->flags & IW_RETRY_LIMIT)) {
6a484db4 2106 if (vwrq->flags & IW_RETRY_LONG)
1da177e4 2107 priv->long_retry = vwrq->value;
6a484db4 2108 else if (vwrq->flags & IW_RETRY_SHORT)
1da177e4
LT
2109 priv->short_retry = vwrq->value;
2110 else {
2111 /* No modifier : set both */
2112 priv->long_retry = vwrq->value;
2113 priv->short_retry = vwrq->value;
2114 }
4d791aad 2115 return -EINPROGRESS;
1da177e4 2116 }
4d791aad 2117
1da177e4
LT
2118 return -EINVAL;
2119}
2120
2121static int atmel_get_retry(struct net_device *dev,
2122 struct iw_request_info *info,
2123 struct iw_param *vwrq,
2124 char *extra)
2125{
2126 struct atmel_private *priv = netdev_priv(dev);
2127
2128 vwrq->disabled = 0; /* Can't be disabled */
2129
6a484db4
JT
2130 /* Note : by default, display the short retry number */
2131 if (vwrq->flags & IW_RETRY_LONG) {
2132 vwrq->flags = IW_RETRY_LIMIT | IW_RETRY_LONG;
1da177e4
LT
2133 vwrq->value = priv->long_retry;
2134 } else {
2135 vwrq->flags = IW_RETRY_LIMIT;
2136 vwrq->value = priv->short_retry;
4d791aad 2137 if (priv->long_retry != priv->short_retry)
6a484db4 2138 vwrq->flags |= IW_RETRY_SHORT;
1da177e4
LT
2139 }
2140
2141 return 0;
2142}
2143
2144static int atmel_set_rts(struct net_device *dev,
2145 struct iw_request_info *info,
2146 struct iw_param *vwrq,
2147 char *extra)
2148{
2149 struct atmel_private *priv = netdev_priv(dev);
2150 int rthr = vwrq->value;
2151
4d791aad 2152 if (vwrq->disabled)
1da177e4 2153 rthr = 2347;
4d791aad 2154 if ((rthr < 0) || (rthr > 2347)) {
1da177e4
LT
2155 return -EINVAL;
2156 }
2157 priv->rts_threshold = rthr;
4d791aad 2158
1da177e4
LT
2159 return -EINPROGRESS; /* Call commit handler */
2160}
2161
2162static int atmel_get_rts(struct net_device *dev,
2163 struct iw_request_info *info,
2164 struct iw_param *vwrq,
2165 char *extra)
2166{
2167 struct atmel_private *priv = netdev_priv(dev);
4d791aad 2168
1da177e4
LT
2169 vwrq->value = priv->rts_threshold;
2170 vwrq->disabled = (vwrq->value >= 2347);
2171 vwrq->fixed = 1;
2172
2173 return 0;
2174}
2175
2176static int atmel_set_frag(struct net_device *dev,
2177 struct iw_request_info *info,
2178 struct iw_param *vwrq,
2179 char *extra)
2180{
2181 struct atmel_private *priv = netdev_priv(dev);
2182 int fthr = vwrq->value;
2183
4d791aad 2184 if (vwrq->disabled)
1da177e4 2185 fthr = 2346;
4d791aad 2186 if ((fthr < 256) || (fthr > 2346)) {
1da177e4
LT
2187 return -EINVAL;
2188 }
2189 fthr &= ~0x1; /* Get an even value - is it really needed ??? */
2190 priv->frag_threshold = fthr;
4d791aad 2191
1da177e4
LT
2192 return -EINPROGRESS; /* Call commit handler */
2193}
2194
2195static int atmel_get_frag(struct net_device *dev,
2196 struct iw_request_info *info,
2197 struct iw_param *vwrq,
2198 char *extra)
2199{
2200 struct atmel_private *priv = netdev_priv(dev);
2201
2202 vwrq->value = priv->frag_threshold;
2203 vwrq->disabled = (vwrq->value >= 2346);
2204 vwrq->fixed = 1;
2205
2206 return 0;
2207}
2208
2209static const long frequency_list[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
2210 2447, 2452, 2457, 2462, 2467, 2472, 2484 };
2211
2212static int atmel_set_freq(struct net_device *dev,
2213 struct iw_request_info *info,
2214 struct iw_freq *fwrq,
2215 char *extra)
2216{
2217 struct atmel_private *priv = netdev_priv(dev);
2218 int rc = -EINPROGRESS; /* Call commit handler */
4d791aad 2219
1da177e4 2220 /* If setting by frequency, convert to a channel */
4d791aad
CP
2221 if ((fwrq->e == 1) &&
2222 (fwrq->m >= (int) 241200000) &&
2223 (fwrq->m <= (int) 248700000)) {
1da177e4
LT
2224 int f = fwrq->m / 100000;
2225 int c = 0;
4d791aad 2226 while ((c < 14) && (f != frequency_list[c]))
1da177e4
LT
2227 c++;
2228 /* Hack to fall through... */
2229 fwrq->e = 0;
2230 fwrq->m = c + 1;
2231 }
2232 /* Setting by channel number */
4d791aad 2233 if ((fwrq->m > 1000) || (fwrq->e > 0))
1da177e4
LT
2234 rc = -EOPNOTSUPP;
2235 else {
2236 int channel = fwrq->m;
2237 if (atmel_validate_channel(priv, channel) == 0) {
2238 priv->channel = channel;
2239 } else {
2240 rc = -EINVAL;
4d791aad 2241 }
1da177e4
LT
2242 }
2243 return rc;
2244}
2245
2246static int atmel_get_freq(struct net_device *dev,
2247 struct iw_request_info *info,
2248 struct iw_freq *fwrq,
2249 char *extra)
2250{
2251 struct atmel_private *priv = netdev_priv(dev);
2252
2253 fwrq->m = priv->channel;
2254 fwrq->e = 0;
2255 return 0;
2256}
2257
2258static int atmel_set_scan(struct net_device *dev,
2259 struct iw_request_info *info,
9930ccee 2260 struct iw_point *dwrq,
1da177e4
LT
2261 char *extra)
2262{
2263 struct atmel_private *priv = netdev_priv(dev);
2264 unsigned long flags;
2265
2266 /* Note : you may have realised that, as this is a SET operation,
2267 * this is privileged and therefore a normal user can't
2268 * perform scanning.
2269 * This is not an error, while the device perform scanning,
2270 * traffic doesn't flow, so it's a perfect DoS...
2271 * Jean II */
4d791aad 2272
1da177e4
LT
2273 if (priv->station_state == STATION_STATE_DOWN)
2274 return -EAGAIN;
2275
2276 /* Timeout old surveys. */
6e33e30d 2277 if (time_after(jiffies, priv->last_survey + 20 * HZ))
1da177e4
LT
2278 priv->site_survey_state = SITE_SURVEY_IDLE;
2279 priv->last_survey = jiffies;
2280
2281 /* Initiate a scan command */
2282 if (priv->site_survey_state == SITE_SURVEY_IN_PROGRESS)
2283 return -EBUSY;
4d791aad 2284
1da177e4
LT
2285 del_timer_sync(&priv->management_timer);
2286 spin_lock_irqsave(&priv->irqlock, flags);
4d791aad 2287
1da177e4
LT
2288 priv->site_survey_state = SITE_SURVEY_IN_PROGRESS;
2289 priv->fast_scan = 0;
2290 atmel_scan(priv, 0);
2291 spin_unlock_irqrestore(&priv->irqlock, flags);
4d791aad 2292
1da177e4
LT
2293 return 0;
2294}
2295
2296static int atmel_get_scan(struct net_device *dev,
2297 struct iw_request_info *info,
2298 struct iw_point *dwrq,
2299 char *extra)
2300{
2301 struct atmel_private *priv = netdev_priv(dev);
2302 int i;
2303 char *current_ev = extra;
2304 struct iw_event iwe;
4d791aad 2305
1da177e4
LT
2306 if (priv->site_survey_state != SITE_SURVEY_COMPLETED)
2307 return -EAGAIN;
4d791aad
CP
2308
2309 for (i = 0; i < priv->BSS_list_entries; i++) {
1da177e4
LT
2310 iwe.cmd = SIOCGIWAP;
2311 iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
2312 memcpy(iwe.u.ap_addr.sa_data, priv->BSSinfo[i].BSSID, 6);
ccc58057
DM
2313 current_ev = iwe_stream_add_event(info, current_ev,
2314 extra + IW_SCAN_MAX_DATA,
2315 &iwe, IW_EV_ADDR_LEN);
1da177e4
LT
2316
2317 iwe.u.data.length = priv->BSSinfo[i].SSIDsize;
2318 if (iwe.u.data.length > 32)
2319 iwe.u.data.length = 32;
2320 iwe.cmd = SIOCGIWESSID;
2321 iwe.u.data.flags = 1;
ccc58057
DM
2322 current_ev = iwe_stream_add_point(info, current_ev,
2323 extra + IW_SCAN_MAX_DATA,
2324 &iwe, priv->BSSinfo[i].SSID);
4d791aad 2325
1da177e4
LT
2326 iwe.cmd = SIOCGIWMODE;
2327 iwe.u.mode = priv->BSSinfo[i].BSStype;
ccc58057
DM
2328 current_ev = iwe_stream_add_event(info, current_ev,
2329 extra + IW_SCAN_MAX_DATA,
2330 &iwe, IW_EV_UINT_LEN);
4d791aad 2331
1da177e4
LT
2332 iwe.cmd = SIOCGIWFREQ;
2333 iwe.u.freq.m = priv->BSSinfo[i].channel;
2334 iwe.u.freq.e = 0;
ccc58057
DM
2335 current_ev = iwe_stream_add_event(info, current_ev,
2336 extra + IW_SCAN_MAX_DATA,
2337 &iwe, IW_EV_FREQ_LEN);
4d791aad 2338
3b31dc32
HK
2339 /* Add quality statistics */
2340 iwe.cmd = IWEVQUAL;
2341 iwe.u.qual.level = priv->BSSinfo[i].RSSI;
2342 iwe.u.qual.qual = iwe.u.qual.level;
2343 /* iwe.u.qual.noise = SOMETHING */
ccc58057
DM
2344 current_ev = iwe_stream_add_event(info, current_ev,
2345 extra + IW_SCAN_MAX_DATA,
2346 &iwe, IW_EV_QUAL_LEN);
3b31dc32
HK
2347
2348
1da177e4
LT
2349 iwe.cmd = SIOCGIWENCODE;
2350 if (priv->BSSinfo[i].UsingWEP)
2351 iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
2352 else
2353 iwe.u.data.flags = IW_ENCODE_DISABLED;
2354 iwe.u.data.length = 0;
ccc58057
DM
2355 current_ev = iwe_stream_add_point(info, current_ev,
2356 extra + IW_SCAN_MAX_DATA,
2357 &iwe, NULL);
1da177e4
LT
2358 }
2359
2360 /* Length of data */
2361 dwrq->length = (current_ev - extra);
4d791aad
CP
2362 dwrq->flags = 0;
2363
1da177e4
LT
2364 return 0;
2365}
2366
2367static int atmel_get_range(struct net_device *dev,
2368 struct iw_request_info *info,
2369 struct iw_point *dwrq,
2370 char *extra)
2371{
2372 struct atmel_private *priv = netdev_priv(dev);
2373 struct iw_range *range = (struct iw_range *) extra;
4d791aad 2374 int k, i, j;
1da177e4
LT
2375
2376 dwrq->length = sizeof(struct iw_range);
f36be621 2377 memset(range, 0, sizeof(struct iw_range));
1da177e4
LT
2378 range->min_nwid = 0x0000;
2379 range->max_nwid = 0x0000;
2380 range->num_channels = 0;
b4341135 2381 for (j = 0; j < ARRAY_SIZE(channel_table); j++)
1da177e4
LT
2382 if (priv->reg_domain == channel_table[j].reg_domain) {
2383 range->num_channels = channel_table[j].max - channel_table[j].min + 1;
2384 break;
2385 }
2386 if (range->num_channels != 0) {
4d791aad 2387 for (k = 0, i = channel_table[j].min; i <= channel_table[j].max; i++) {
1da177e4 2388 range->freq[k].i = i; /* List index */
4d791aad 2389 range->freq[k].m = frequency_list[i - 1] * 100000;
1da177e4
LT
2390 range->freq[k++].e = 1; /* Values in table in MHz -> * 10^5 * 10 */
2391 }
2392 range->num_frequency = k;
2393 }
4d791aad 2394
1da177e4
LT
2395 range->max_qual.qual = 100;
2396 range->max_qual.level = 100;
2397 range->max_qual.noise = 0;
2398 range->max_qual.updated = IW_QUAL_NOISE_INVALID;
2399
2400 range->avg_qual.qual = 50;
2401 range->avg_qual.level = 50;
2402 range->avg_qual.noise = 0;
2403 range->avg_qual.updated = IW_QUAL_NOISE_INVALID;
2404
2405 range->sensitivity = 0;
2406
2407 range->bitrate[0] = 1000000;
2408 range->bitrate[1] = 2000000;
2409 range->bitrate[2] = 5500000;
2410 range->bitrate[3] = 11000000;
2411 range->num_bitrates = 4;
2412
2413 range->min_rts = 0;
2414 range->max_rts = 2347;
2415 range->min_frag = 256;
2416 range->max_frag = 2346;
2417
2418 range->encoding_size[0] = 5;
2419 range->encoding_size[1] = 13;
2420 range->num_encoding_sizes = 2;
2421 range->max_encoding_tokens = 4;
4d791aad 2422
1da177e4
LT
2423 range->pmp_flags = IW_POWER_ON;
2424 range->pmt_flags = IW_POWER_ON;
2425 range->pm_capa = 0;
4d791aad 2426
1da177e4
LT
2427 range->we_version_source = WIRELESS_EXT;
2428 range->we_version_compiled = WIRELESS_EXT;
2429 range->retry_capa = IW_RETRY_LIMIT ;
2430 range->retry_flags = IW_RETRY_LIMIT;
2431 range->r_time_flags = 0;
2432 range->min_retry = 1;
2433 range->max_retry = 65535;
2434
2435 return 0;
2436}
2437
2438static int atmel_set_wap(struct net_device *dev,
2439 struct iw_request_info *info,
2440 struct sockaddr *awrq,
2441 char *extra)
2442{
2443 struct atmel_private *priv = netdev_priv(dev);
2444 int i;
9a6301c1
DW
2445 static const u8 any[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
2446 static const u8 off[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1da177e4
LT
2447 unsigned long flags;
2448
2449 if (awrq->sa_family != ARPHRD_ETHER)
2450 return -EINVAL;
4d791aad 2451
9a6301c1
DW
2452 if (!memcmp(any, awrq->sa_data, 6) ||
2453 !memcmp(off, awrq->sa_data, 6)) {
1da177e4
LT
2454 del_timer_sync(&priv->management_timer);
2455 spin_lock_irqsave(&priv->irqlock, flags);
2456 atmel_scan(priv, 1);
2457 spin_unlock_irqrestore(&priv->irqlock, flags);
2458 return 0;
2459 }
4d791aad
CP
2460
2461 for (i = 0; i < priv->BSS_list_entries; i++) {
1da177e4
LT
2462 if (memcmp(priv->BSSinfo[i].BSSID, awrq->sa_data, 6) == 0) {
2463 if (!priv->wep_is_on && priv->BSSinfo[i].UsingWEP) {
2464 return -EINVAL;
2465 } else if (priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) {
2466 return -EINVAL;
2467 } else {
2468 del_timer_sync(&priv->management_timer);
2469 spin_lock_irqsave(&priv->irqlock, flags);
2470 atmel_join_bss(priv, i);
2471 spin_unlock_irqrestore(&priv->irqlock, flags);
2472 return 0;
2473 }
2474 }
2475 }
4d791aad 2476
1da177e4
LT
2477 return -EINVAL;
2478}
4d791aad 2479
1da177e4
LT
2480static int atmel_config_commit(struct net_device *dev,
2481 struct iw_request_info *info, /* NULL */
2482 void *zwrq, /* NULL */
2483 char *extra) /* NULL */
2484{
2485 return atmel_open(dev);
2486}
2487
4d791aad 2488static const iw_handler atmel_handler[] =
1da177e4
LT
2489{
2490 (iw_handler) atmel_config_commit, /* SIOCSIWCOMMIT */
4d791aad 2491 (iw_handler) atmel_get_name, /* SIOCGIWNAME */
1da177e4
LT
2492 (iw_handler) NULL, /* SIOCSIWNWID */
2493 (iw_handler) NULL, /* SIOCGIWNWID */
2494 (iw_handler) atmel_set_freq, /* SIOCSIWFREQ */
2495 (iw_handler) atmel_get_freq, /* SIOCGIWFREQ */
2496 (iw_handler) atmel_set_mode, /* SIOCSIWMODE */
2497 (iw_handler) atmel_get_mode, /* SIOCGIWMODE */
4d791aad
CP
2498 (iw_handler) NULL, /* SIOCSIWSENS */
2499 (iw_handler) NULL, /* SIOCGIWSENS */
1da177e4
LT
2500 (iw_handler) NULL, /* SIOCSIWRANGE */
2501 (iw_handler) atmel_get_range, /* SIOCGIWRANGE */
2502 (iw_handler) NULL, /* SIOCSIWPRIV */
2503 (iw_handler) NULL, /* SIOCGIWPRIV */
2504 (iw_handler) NULL, /* SIOCSIWSTATS */
2505 (iw_handler) NULL, /* SIOCGIWSTATS */
2506 (iw_handler) NULL, /* SIOCSIWSPY */
2507 (iw_handler) NULL, /* SIOCGIWSPY */
2508 (iw_handler) NULL, /* -- hole -- */
2509 (iw_handler) NULL, /* -- hole -- */
2510 (iw_handler) atmel_set_wap, /* SIOCSIWAP */
2511 (iw_handler) atmel_get_wap, /* SIOCGIWAP */
2512 (iw_handler) NULL, /* -- hole -- */
4d791aad 2513 (iw_handler) NULL, /* SIOCGIWAPLIST */
1da177e4
LT
2514 (iw_handler) atmel_set_scan, /* SIOCSIWSCAN */
2515 (iw_handler) atmel_get_scan, /* SIOCGIWSCAN */
2516 (iw_handler) atmel_set_essid, /* SIOCSIWESSID */
2517 (iw_handler) atmel_get_essid, /* SIOCGIWESSID */
4d791aad
CP
2518 (iw_handler) NULL, /* SIOCSIWNICKN */
2519 (iw_handler) NULL, /* SIOCGIWNICKN */
1da177e4
LT
2520 (iw_handler) NULL, /* -- hole -- */
2521 (iw_handler) NULL, /* -- hole -- */
2522 (iw_handler) atmel_set_rate, /* SIOCSIWRATE */
2523 (iw_handler) atmel_get_rate, /* SIOCGIWRATE */
2524 (iw_handler) atmel_set_rts, /* SIOCSIWRTS */
2525 (iw_handler) atmel_get_rts, /* SIOCGIWRTS */
2526 (iw_handler) atmel_set_frag, /* SIOCSIWFRAG */
2527 (iw_handler) atmel_get_frag, /* SIOCGIWFRAG */
4d791aad
CP
2528 (iw_handler) NULL, /* SIOCSIWTXPOW */
2529 (iw_handler) NULL, /* SIOCGIWTXPOW */
1da177e4
LT
2530 (iw_handler) atmel_set_retry, /* SIOCSIWRETRY */
2531 (iw_handler) atmel_get_retry, /* SIOCGIWRETRY */
2532 (iw_handler) atmel_set_encode, /* SIOCSIWENCODE */
2533 (iw_handler) atmel_get_encode, /* SIOCGIWENCODE */
2534 (iw_handler) atmel_set_power, /* SIOCSIWPOWER */
2535 (iw_handler) atmel_get_power, /* SIOCGIWPOWER */
9a6301c1
DW
2536 (iw_handler) NULL, /* -- hole -- */
2537 (iw_handler) NULL, /* -- hole -- */
2538 (iw_handler) NULL, /* SIOCSIWGENIE */
2539 (iw_handler) NULL, /* SIOCGIWGENIE */
2540 (iw_handler) atmel_set_auth, /* SIOCSIWAUTH */
2541 (iw_handler) atmel_get_auth, /* SIOCGIWAUTH */
2542 (iw_handler) atmel_set_encodeext, /* SIOCSIWENCODEEXT */
2543 (iw_handler) atmel_get_encodeext, /* SIOCGIWENCODEEXT */
2544 (iw_handler) NULL, /* SIOCSIWPMKSA */
1da177e4
LT
2545};
2546
4d791aad 2547static const iw_handler atmel_private_handler[] =
1da177e4
LT
2548{
2549 NULL, /* SIOCIWFIRSTPRIV */
2550};
2551
2552typedef struct atmel_priv_ioctl {
2553 char id[32];
4d791aad
CP
2554 unsigned char __user *data;
2555 unsigned short len;
1da177e4
LT
2556} atmel_priv_ioctl;
2557
4d791aad
CP
2558#define ATMELFWL SIOCIWFIRSTPRIV
2559#define ATMELIDIFC ATMELFWL + 1
2560#define ATMELRD ATMELFWL + 2
2561#define ATMELMAGIC 0x51807
1da177e4
LT
2562#define REGDOMAINSZ 20
2563
2564static const struct iw_priv_args atmel_private_args[] = {
4d791aad
CP
2565 {
2566 .cmd = ATMELFWL,
2567 .set_args = IW_PRIV_TYPE_BYTE
2568 | IW_PRIV_SIZE_FIXED
2569 | sizeof (atmel_priv_ioctl),
2570 .get_args = IW_PRIV_TYPE_NONE,
2571 .name = "atmelfwl"
2572 }, {
2573 .cmd = ATMELIDIFC,
2574 .set_args = IW_PRIV_TYPE_NONE,
2575 .get_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
2576 .name = "atmelidifc"
2577 }, {
2578 .cmd = ATMELRD,
2579 .set_args = IW_PRIV_TYPE_CHAR | REGDOMAINSZ,
2580 .get_args = IW_PRIV_TYPE_NONE,
2581 .name = "regdomain"
2582 },
1da177e4
LT
2583};
2584
4d791aad 2585static const struct iw_handler_def atmel_handler_def =
1da177e4 2586{
b4341135
DT
2587 .num_standard = ARRAY_SIZE(atmel_handler),
2588 .num_private = ARRAY_SIZE(atmel_private_handler),
2589 .num_private_args = ARRAY_SIZE(atmel_private_args),
1da177e4 2590 .standard = (iw_handler *) atmel_handler,
4d791aad 2591 .private = (iw_handler *) atmel_private_handler,
72f98d38
JT
2592 .private_args = (struct iw_priv_args *) atmel_private_args,
2593 .get_wireless_stats = atmel_get_wireless_stats
1da177e4
LT
2594};
2595
2596static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2597{
2598 int i, rc = 0;
2599 struct atmel_private *priv = netdev_priv(dev);
2600 atmel_priv_ioctl com;
2601 struct iwreq *wrq = (struct iwreq *) rq;
2602 unsigned char *new_firmware;
4d791aad 2603 char domain[REGDOMAINSZ + 1];
1da177e4
LT
2604
2605 switch (cmd) {
1da177e4 2606 case ATMELIDIFC:
4d791aad 2607 wrq->u.param.value = ATMELMAGIC;
1da177e4 2608 break;
4d791aad 2609
1da177e4
LT
2610 case ATMELFWL:
2611 if (copy_from_user(&com, rq->ifr_data, sizeof(com))) {
2612 rc = -EFAULT;
2613 break;
2614 }
2615
2616 if (!capable(CAP_NET_ADMIN)) {
2617 rc = -EPERM;
2618 break;
2619 }
2620
2621 if (!(new_firmware = kmalloc(com.len, GFP_KERNEL))) {
2622 rc = -ENOMEM;
2623 break;
2624 }
2625
2626 if (copy_from_user(new_firmware, com.data, com.len)) {
2627 kfree(new_firmware);
2628 rc = -EFAULT;
2629 break;
2630 }
2631
b4558ea9 2632 kfree(priv->firmware);
4d791aad 2633
1da177e4
LT
2634 priv->firmware = new_firmware;
2635 priv->firmware_length = com.len;
2636 strncpy(priv->firmware_id, com.id, 31);
2637 priv->firmware_id[31] = '\0';
2638 break;
2639
2640 case ATMELRD:
2641 if (copy_from_user(domain, rq->ifr_data, REGDOMAINSZ)) {
2642 rc = -EFAULT;
2643 break;
2644 }
4d791aad 2645
1da177e4
LT
2646 if (!capable(CAP_NET_ADMIN)) {
2647 rc = -EPERM;
2648 break;
2649 }
2650
2651 domain[REGDOMAINSZ] = 0;
2652 rc = -EINVAL;
b4341135 2653 for (i = 0; i < ARRAY_SIZE(channel_table); i++) {
1da177e4
LT
2654 /* strcasecmp doesn't exist in the library */
2655 char *a = channel_table[i].name;
2656 char *b = domain;
2657 while (*a) {
2658 char c1 = *a++;
2659 char c2 = *b++;
2660 if (tolower(c1) != tolower(c2))
2661 break;
2662 }
2663 if (!*a && !*b) {
2664 priv->config_reg_domain = channel_table[i].reg_domain;
2665 rc = 0;
2666 }
2667 }
4d791aad 2668
1da177e4
LT
2669 if (rc == 0 && priv->station_state != STATION_STATE_DOWN)
2670 rc = atmel_open(dev);
2671 break;
4d791aad 2672
1da177e4
LT
2673 default:
2674 rc = -EOPNOTSUPP;
2675 }
4d791aad 2676
1da177e4
LT
2677 return rc;
2678}
2679
2680struct auth_body {
0e5ce1f3
AV
2681 __le16 alg;
2682 __le16 trans_seq;
2683 __le16 status;
1da177e4
LT
2684 u8 el_id;
2685 u8 chall_text_len;
2686 u8 chall_text[253];
4d791aad 2687};
1da177e4
LT
2688
2689static void atmel_enter_state(struct atmel_private *priv, int new_state)
2690{
2691 int old_state = priv->station_state;
4d791aad 2692
1da177e4
LT
2693 if (new_state == old_state)
2694 return;
4d791aad 2695
1da177e4 2696 priv->station_state = new_state;
4d791aad 2697
1da177e4
LT
2698 if (new_state == STATION_STATE_READY) {
2699 netif_start_queue(priv->dev);
2700 netif_carrier_on(priv->dev);
2701 }
2702
2703 if (old_state == STATION_STATE_READY) {
2704 netif_carrier_off(priv->dev);
2705 if (netif_running(priv->dev))
2706 netif_stop_queue(priv->dev);
2707 priv->last_beacon_timestamp = 0;
2708 }
2709}
2710
2711static void atmel_scan(struct atmel_private *priv, int specific_ssid)
2712{
2713 struct {
2714 u8 BSSID[6];
2715 u8 SSID[MAX_SSID_LENGTH];
2716 u8 scan_type;
2717 u8 channel;
0e5ce1f3
AV
2718 __le16 BSS_type;
2719 __le16 min_channel_time;
2720 __le16 max_channel_time;
1da177e4
LT
2721 u8 options;
2722 u8 SSID_size;
2723 } cmd;
4d791aad 2724
1da177e4
LT
2725 memset(cmd.BSSID, 0xff, 6);
2726
2727 if (priv->fast_scan) {
2728 cmd.SSID_size = priv->SSID_size;
2729 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2730 cmd.min_channel_time = cpu_to_le16(10);
2731 cmd.max_channel_time = cpu_to_le16(50);
2732 } else {
2733 priv->BSS_list_entries = 0;
2734 cmd.SSID_size = 0;
2735 cmd.min_channel_time = cpu_to_le16(10);
2736 cmd.max_channel_time = cpu_to_le16(120);
2737 }
4d791aad 2738
1da177e4 2739 cmd.options = 0;
4d791aad 2740
1da177e4
LT
2741 if (!specific_ssid)
2742 cmd.options |= SCAN_OPTIONS_SITE_SURVEY;
4d791aad
CP
2743
2744 cmd.channel = (priv->channel & 0x7f);
1da177e4 2745 cmd.scan_type = SCAN_TYPE_ACTIVE;
4d791aad 2746 cmd.BSS_type = cpu_to_le16(priv->operating_mode == IW_MODE_ADHOC ?
1da177e4 2747 BSS_TYPE_AD_HOC : BSS_TYPE_INFRASTRUCTURE);
4d791aad 2748
1da177e4
LT
2749 atmel_send_command(priv, CMD_Scan, &cmd, sizeof(cmd));
2750
2751 /* This must come after all hardware access to avoid being messed up
2752 by stuff happening in interrupt context after we leave STATE_DOWN */
2753 atmel_enter_state(priv, STATION_STATE_SCANNING);
2754}
2755
2756static void join(struct atmel_private *priv, int type)
2757{
2758 struct {
2759 u8 BSSID[6];
2760 u8 SSID[MAX_SSID_LENGTH];
2761 u8 BSS_type; /* this is a short in a scan command - weird */
2762 u8 channel;
0e5ce1f3 2763 __le16 timeout;
1da177e4
LT
2764 u8 SSID_size;
2765 u8 reserved;
2766 } cmd;
2767
2768 cmd.SSID_size = priv->SSID_size;
2769 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2770 memcpy(cmd.BSSID, priv->CurrentBSSID, 6);
2771 cmd.channel = (priv->channel & 0x7f);
2772 cmd.BSS_type = type;
2773 cmd.timeout = cpu_to_le16(2000);
2774
4d791aad 2775 atmel_send_command(priv, CMD_Join, &cmd, sizeof(cmd));
1da177e4
LT
2776}
2777
1da177e4
LT
2778static void start(struct atmel_private *priv, int type)
2779{
2780 struct {
2781 u8 BSSID[6];
2782 u8 SSID[MAX_SSID_LENGTH];
4d791aad 2783 u8 BSS_type;
1da177e4
LT
2784 u8 channel;
2785 u8 SSID_size;
2786 u8 reserved[3];
2787 } cmd;
2788
2789 cmd.SSID_size = priv->SSID_size;
2790 memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2791 memcpy(cmd.BSSID, priv->BSSID, 6);
2792 cmd.BSS_type = type;
2793 cmd.channel = (priv->channel & 0x7f);
2794
4d791aad 2795 atmel_send_command(priv, CMD_Start, &cmd, sizeof(cmd));
1da177e4
LT
2796}
2797
4d791aad
CP
2798static void handle_beacon_probe(struct atmel_private *priv, u16 capability,
2799 u8 channel)
1da177e4
LT
2800{
2801 int rejoin = 0;
4861dd79 2802 int new = capability & MFIE_TYPE_POWER_CONSTRAINT ?
1da177e4
LT
2803 SHORT_PREAMBLE : LONG_PREAMBLE;
2804
2805 if (priv->preamble != new) {
2806 priv->preamble = new;
2807 rejoin = 1;
2808 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, new);
2809 }
4d791aad 2810
1da177e4
LT
2811 if (priv->channel != channel) {
2812 priv->channel = channel;
2813 rejoin = 1;
2814 atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_CHANNEL_POS, channel);
2815 }
4d791aad 2816
1da177e4
LT
2817 if (rejoin) {
2818 priv->station_is_associated = 0;
2819 atmel_enter_state(priv, STATION_STATE_JOINNING);
4d791aad 2820
1da177e4
LT
2821 if (priv->operating_mode == IW_MODE_INFRA)
2822 join(priv, BSS_TYPE_INFRASTRUCTURE);
4d791aad 2823 else
1da177e4 2824 join(priv, BSS_TYPE_AD_HOC);
4d791aad 2825 }
1da177e4
LT
2826}
2827
4d791aad
CP
2828static void send_authentication_request(struct atmel_private *priv, u16 system,
2829 u8 *challenge, int challenge_len)
1da177e4 2830{
4ca5253d 2831 struct ieee80211_hdr_4addr header;
1da177e4 2832 struct auth_body auth;
4d791aad
CP
2833
2834 header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH);
2835 header.duration_id = cpu_to_le16(0x8000);
1da177e4
LT
2836 header.seq_ctl = 0;
2837 memcpy(header.addr1, priv->CurrentBSSID, 6);
2838 memcpy(header.addr2, priv->dev->dev_addr, 6);
2839 memcpy(header.addr3, priv->CurrentBSSID, 6);
4d791aad
CP
2840
2841 if (priv->wep_is_on && priv->CurrentAuthentTransactionSeqNum != 1)
1da177e4 2842 /* no WEP for authentication frames with TrSeqNo 1 */
b16a228d 2843 header.frame_ctl |= cpu_to_le16(IEEE80211_FCTL_PROTECTED);
4d791aad
CP
2844
2845 auth.alg = cpu_to_le16(system);
1da177e4
LT
2846
2847 auth.status = 0;
2848 auth.trans_seq = cpu_to_le16(priv->CurrentAuthentTransactionSeqNum);
4d791aad 2849 priv->ExpectedAuthentTransactionSeqNum = priv->CurrentAuthentTransactionSeqNum+1;
1da177e4 2850 priv->CurrentAuthentTransactionSeqNum += 2;
4d791aad 2851
1da177e4
LT
2852 if (challenge_len != 0) {
2853 auth.el_id = 16; /* challenge_text */
2854 auth.chall_text_len = challenge_len;
2855 memcpy(auth.chall_text, challenge, challenge_len);
2856 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 8 + challenge_len);
2857 } else {
2858 atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 6);
2859 }
2860}
2861
2862static void send_association_request(struct atmel_private *priv, int is_reassoc)
2863{
2864 u8 *ssid_el_p;
2865 int bodysize;
4ca5253d 2866 struct ieee80211_hdr_4addr header;
1da177e4 2867 struct ass_req_format {
0e5ce1f3
AV
2868 __le16 capability;
2869 __le16 listen_interval;
1da177e4
LT
2870 u8 ap[6]; /* nothing after here directly accessible */
2871 u8 ssid_el_id;
2872 u8 ssid_len;
2873 u8 ssid[MAX_SSID_LENGTH];
2874 u8 sup_rates_el_id;
2875 u8 sup_rates_len;
2876 u8 rates[4];
2877 } body;
4d791aad
CP
2878
2879 header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT |
b453872c 2880 (is_reassoc ? IEEE80211_STYPE_REASSOC_REQ : IEEE80211_STYPE_ASSOC_REQ));
1da177e4
LT
2881 header.duration_id = cpu_to_le16(0x8000);
2882 header.seq_ctl = 0;
2883
4d791aad 2884 memcpy(header.addr1, priv->CurrentBSSID, 6);
1da177e4 2885 memcpy(header.addr2, priv->dev->dev_addr, 6);
4d791aad 2886 memcpy(header.addr3, priv->CurrentBSSID, 6);
1da177e4 2887
4861dd79 2888 body.capability = cpu_to_le16(WLAN_CAPABILITY_ESS);
1da177e4 2889 if (priv->wep_is_on)
4861dd79 2890 body.capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
1da177e4 2891 if (priv->preamble == SHORT_PREAMBLE)
4861dd79 2892 body.capability |= cpu_to_le16(MFIE_TYPE_POWER_CONSTRAINT);
1da177e4
LT
2893
2894 body.listen_interval = cpu_to_le16(priv->listen_interval * priv->beacon_period);
4d791aad 2895
1da177e4
LT
2896 /* current AP address - only in reassoc frame */
2897 if (is_reassoc) {
4d791aad 2898 memcpy(body.ap, priv->CurrentBSSID, 6);
1da177e4
LT
2899 ssid_el_p = (u8 *)&body.ssid_el_id;
2900 bodysize = 18 + priv->SSID_size;
2901 } else {
2902 ssid_el_p = (u8 *)&body.ap[0];
2903 bodysize = 12 + priv->SSID_size;
2904 }
4d791aad 2905
4861dd79 2906 ssid_el_p[0] = MFIE_TYPE_SSID;
1da177e4
LT
2907 ssid_el_p[1] = priv->SSID_size;
2908 memcpy(ssid_el_p + 2, priv->SSID, priv->SSID_size);
4861dd79 2909 ssid_el_p[2 + priv->SSID_size] = MFIE_TYPE_RATES;
1da177e4
LT
2910 ssid_el_p[3 + priv->SSID_size] = 4; /* len of suported rates */
2911 memcpy(ssid_el_p + 4 + priv->SSID_size, atmel_basic_rates, 4);
2912
2913 atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize);
2914}
2915
4d791aad
CP
2916static int is_frame_from_current_bss(struct atmel_private *priv,
2917 struct ieee80211_hdr_4addr *header)
1da177e4 2918{
b453872c 2919 if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS)
1da177e4
LT
2920 return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0;
2921 else
2922 return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0;
2923}
2924
2925static int retrieve_bss(struct atmel_private *priv)
2926{
2927 int i;
2928 int max_rssi = -128;
2929 int max_index = -1;
4d791aad 2930
1da177e4
LT
2931 if (priv->BSS_list_entries == 0)
2932 return -1;
4d791aad 2933
1da177e4 2934 if (priv->connect_to_any_BSS) {
4d791aad
CP
2935 /* Select a BSS with the max-RSSI but of the same type and of
2936 the same WEP mode and that it is not marked as 'bad' (i.e.
2937 we had previously failed to connect to this BSS with the
2938 settings that we currently use) */
1da177e4 2939 priv->current_BSS = 0;
4d791aad 2940 for (i = 0; i < priv->BSS_list_entries; i++) {
1da177e4 2941 if (priv->operating_mode == priv->BSSinfo[i].BSStype &&
4d791aad 2942 ((!priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) ||
1da177e4
LT
2943 (priv->wep_is_on && priv->BSSinfo[i].UsingWEP)) &&
2944 !(priv->BSSinfo[i].channel & 0x80)) {
2945 max_rssi = priv->BSSinfo[i].RSSI;
2946 priv->current_BSS = max_index = i;
2947 }
1da177e4
LT
2948 }
2949 return max_index;
2950 }
4d791aad
CP
2951
2952 for (i = 0; i < priv->BSS_list_entries; i++) {
1da177e4
LT
2953 if (priv->SSID_size == priv->BSSinfo[i].SSIDsize &&
2954 memcmp(priv->SSID, priv->BSSinfo[i].SSID, priv->SSID_size) == 0 &&
2955 priv->operating_mode == priv->BSSinfo[i].BSStype &&
2956 atmel_validate_channel(priv, priv->BSSinfo[i].channel) == 0) {
2957 if (priv->BSSinfo[i].RSSI >= max_rssi) {
2958 max_rssi = priv->BSSinfo[i].RSSI;
2959 max_index = i;
2960 }
2961 }
2962 }
2963 return max_index;
2964}
2965
4d791aad
CP
2966static void store_bss_info(struct atmel_private *priv,
2967 struct ieee80211_hdr_4addr *header, u16 capability,
2968 u16 beacon_period, u8 channel, u8 rssi, u8 ssid_len,
2969 u8 *ssid, int is_beacon)
1da177e4 2970{
4861dd79 2971 u8 *bss = capability & WLAN_CAPABILITY_ESS ? header->addr2 : header->addr3;
1da177e4 2972 int i, index;
4d791aad
CP
2973
2974 for (index = -1, i = 0; i < priv->BSS_list_entries; i++)
2975 if (memcmp(bss, priv->BSSinfo[i].BSSID, 6) == 0)
1da177e4
LT
2976 index = i;
2977
4d791aad 2978 /* If we process a probe and an entry from this BSS exists
1da177e4
LT
2979 we will update the BSS entry with the info from this BSS.
2980 If we process a beacon we will only update RSSI */
2981
2982 if (index == -1) {
2983 if (priv->BSS_list_entries == MAX_BSS_ENTRIES)
2984 return;
2985 index = priv->BSS_list_entries++;
2986 memcpy(priv->BSSinfo[index].BSSID, bss, 6);
2987 priv->BSSinfo[index].RSSI = rssi;
2988 } else {
2989 if (rssi > priv->BSSinfo[index].RSSI)
2990 priv->BSSinfo[index].RSSI = rssi;
2991 if (is_beacon)
2992 return;
2993 }
2994
2995 priv->BSSinfo[index].channel = channel;
2996 priv->BSSinfo[index].beacon_period = beacon_period;
4861dd79 2997 priv->BSSinfo[index].UsingWEP = capability & WLAN_CAPABILITY_PRIVACY;
1da177e4
LT
2998 memcpy(priv->BSSinfo[index].SSID, ssid, ssid_len);
2999 priv->BSSinfo[index].SSIDsize = ssid_len;
3000
4861dd79 3001 if (capability & WLAN_CAPABILITY_IBSS)
1da177e4 3002 priv->BSSinfo[index].BSStype = IW_MODE_ADHOC;
4861dd79 3003 else if (capability & WLAN_CAPABILITY_ESS)
1da177e4 3004 priv->BSSinfo[index].BSStype =IW_MODE_INFRA;
4d791aad 3005
4861dd79 3006 priv->BSSinfo[index].preamble = capability & MFIE_TYPE_POWER_CONSTRAINT ?
1da177e4
LT
3007 SHORT_PREAMBLE : LONG_PREAMBLE;
3008}
3009
3010static void authenticate(struct atmel_private *priv, u16 frame_len)
3011{
3012 struct auth_body *auth = (struct auth_body *)priv->rx_buf;
3013 u16 status = le16_to_cpu(auth->status);
3014 u16 trans_seq_no = le16_to_cpu(auth->trans_seq);
b16a228d 3015 u16 system = le16_to_cpu(auth->alg);
4d791aad 3016
4861dd79 3017 if (status == WLAN_STATUS_SUCCESS && !priv->wep_is_on) {
1da177e4
LT
3018 /* no WEP */
3019 if (priv->station_was_associated) {
3020 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
3021 send_association_request(priv, 1);
3022 return;
3023 } else {
3024 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
3025 send_association_request(priv, 0);
3026 return;
4d791aad 3027 }
1da177e4 3028 }
4d791aad 3029
4861dd79 3030 if (status == WLAN_STATUS_SUCCESS && priv->wep_is_on) {
73451379 3031 int should_associate = 0;
1da177e4
LT
3032 /* WEP */
3033 if (trans_seq_no != priv->ExpectedAuthentTransactionSeqNum)
3034 return;
4d791aad 3035
4861dd79 3036 if (system == WLAN_AUTH_OPEN) {
73451379
DW
3037 if (trans_seq_no == 0x0002) {
3038 should_associate = 1;
3039 }
4861dd79 3040 } else if (system == WLAN_AUTH_SHARED_KEY) {
73451379 3041 if (trans_seq_no == 0x0002 &&
4861dd79 3042 auth->el_id == MFIE_TYPE_CHALLENGE) {
73451379
DW
3043 send_authentication_request(priv, system, auth->chall_text, auth->chall_text_len);
3044 return;
3045 } else if (trans_seq_no == 0x0004) {
3046 should_associate = 1;
3047 }
1da177e4 3048 }
4d791aad 3049
73451379 3050 if (should_associate) {
1da177e4
LT
3051 if(priv->station_was_associated) {
3052 atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
3053 send_association_request(priv, 1);
3054 return;
3055 } else {
3056 atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
3057 send_association_request(priv, 0);
3058 return;
4d791aad 3059 }
1da177e4 3060 }
4d791aad
CP
3061 }
3062
73451379 3063 if (status == WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG) {
d0c2912f
DW
3064 /* Flip back and forth between WEP auth modes until the max
3065 * authentication tries has been exceeded.
3066 */
73451379 3067 if (system == WLAN_AUTH_OPEN) {
b16a228d 3068 priv->CurrentAuthentTransactionSeqNum = 0x001;
73451379
DW
3069 priv->exclude_unencrypted = 1;
3070 send_authentication_request(priv, WLAN_AUTH_SHARED_KEY, NULL, 0);
3071 return;
d0c2912f
DW
3072 } else if ( system == WLAN_AUTH_SHARED_KEY
3073 && priv->wep_is_on) {
3074 priv->CurrentAuthentTransactionSeqNum = 0x001;
3075 priv->exclude_unencrypted = 0;
3076 send_authentication_request(priv, WLAN_AUTH_OPEN, NULL, 0);
3077 return;
b16a228d 3078 } else if (priv->connect_to_any_BSS) {
3079 int bss_index;
4d791aad 3080
b16a228d 3081 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
4d791aad 3082
b16a228d 3083 if ((bss_index = retrieve_bss(priv)) != -1) {
3084 atmel_join_bss(priv, bss_index);
3085 return;
3086 }
1da177e4
LT
3087 }
3088 }
4d791aad 3089
1da177e4
LT
3090 priv->AuthenticationRequestRetryCnt = 0;
3091 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3092 priv->station_is_associated = 0;
3093}
3094
3095static void associate(struct atmel_private *priv, u16 frame_len, u16 subtype)
3096{
3097 struct ass_resp_format {
0e5ce1f3
AV
3098 __le16 capability;
3099 __le16 status;
3100 __le16 ass_id;
1da177e4
LT
3101 u8 el_id;
3102 u8 length;
3103 u8 rates[4];
3104 } *ass_resp = (struct ass_resp_format *)priv->rx_buf;
4d791aad
CP
3105
3106 u16 status = le16_to_cpu(ass_resp->status);
1da177e4 3107 u16 ass_id = le16_to_cpu(ass_resp->ass_id);
4d791aad
CP
3108 u16 rates_len = ass_resp->length > 4 ? 4 : ass_resp->length;
3109
9a6301c1
DW
3110 union iwreq_data wrqu;
3111
1da177e4
LT
3112 if (frame_len < 8 + rates_len)
3113 return;
4d791aad 3114
4861dd79
DW
3115 if (status == WLAN_STATUS_SUCCESS) {
3116 if (subtype == IEEE80211_STYPE_ASSOC_RESP)
1da177e4
LT
3117 priv->AssociationRequestRetryCnt = 0;
3118 else
3119 priv->ReAssociationRequestRetryCnt = 0;
4d791aad
CP
3120
3121 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3122 MAC_MGMT_MIB_STATION_ID_POS, ass_id & 0x3fff);
3123 atmel_set_mib(priv, Phy_Mib_Type,
3124 PHY_MIB_RATE_SET_POS, ass_resp->rates, rates_len);
1da177e4
LT
3125 if (priv->power_mode == 0) {
3126 priv->listen_interval = 1;
4d791aad
CP
3127 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3128 MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3129 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3130 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
1da177e4
LT
3131 } else {
3132 priv->listen_interval = 2;
4d791aad
CP
3133 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3134 MAC_MGMT_MIB_PS_MODE_POS, PS_MODE);
3135 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3136 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 2);
1da177e4 3137 }
4d791aad 3138
1da177e4
LT
3139 priv->station_is_associated = 1;
3140 priv->station_was_associated = 1;
3141 atmel_enter_state(priv, STATION_STATE_READY);
9a6301c1
DW
3142
3143 /* Send association event to userspace */
3144 wrqu.data.length = 0;
3145 wrqu.data.flags = 0;
3146 memcpy(wrqu.ap_addr.sa_data, priv->CurrentBSSID, ETH_ALEN);
3147 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
3148 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
3149
1da177e4
LT
3150 return;
3151 }
4d791aad 3152
4861dd79
DW
3153 if (subtype == IEEE80211_STYPE_ASSOC_RESP &&
3154 status != WLAN_STATUS_ASSOC_DENIED_RATES &&
3155 status != WLAN_STATUS_CAPS_UNSUPPORTED &&
1da177e4
LT
3156 priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
3157 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3158 priv->AssociationRequestRetryCnt++;
3159 send_association_request(priv, 0);
3160 return;
3161 }
4d791aad 3162
4861dd79
DW
3163 if (subtype == IEEE80211_STYPE_REASSOC_RESP &&
3164 status != WLAN_STATUS_ASSOC_DENIED_RATES &&
3165 status != WLAN_STATUS_CAPS_UNSUPPORTED &&
1da177e4
LT
3166 priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
3167 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3168 priv->ReAssociationRequestRetryCnt++;
3169 send_association_request(priv, 1);
3170 return;
3171 }
4d791aad 3172
1da177e4
LT
3173 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3174 priv->station_is_associated = 0;
4d791aad
CP
3175
3176 if (priv->connect_to_any_BSS) {
1da177e4
LT
3177 int bss_index;
3178 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
4d791aad
CP
3179
3180 if ((bss_index = retrieve_bss(priv)) != -1)
1da177e4 3181 atmel_join_bss(priv, bss_index);
1da177e4
LT
3182 }
3183}
3184
3185void atmel_join_bss(struct atmel_private *priv, int bss_index)
3186{
3187 struct bss_info *bss = &priv->BSSinfo[bss_index];
3188
3189 memcpy(priv->CurrentBSSID, bss->BSSID, 6);
3190 memcpy(priv->SSID, bss->SSID, priv->SSID_size = bss->SSIDsize);
3191
3192 /* The WPA stuff cares about the current AP address */
3193 if (priv->use_wpa)
3194 build_wpa_mib(priv);
4d791aad 3195
1da177e4
LT
3196 /* When switching to AdHoc turn OFF Power Save if needed */
3197
3198 if (bss->BSStype == IW_MODE_ADHOC &&
3199 priv->operating_mode != IW_MODE_ADHOC &&
3200 priv->power_mode) {
3201 priv->power_mode = 0;
3202 priv->listen_interval = 1;
4d791aad
CP
3203 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3204 MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3205 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3206 MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
1da177e4 3207 }
4d791aad 3208
1da177e4 3209 priv->operating_mode = bss->BSStype;
4d791aad 3210 priv->channel = bss->channel & 0x7f;
1da177e4 3211 priv->beacon_period = bss->beacon_period;
4d791aad 3212
1da177e4
LT
3213 if (priv->preamble != bss->preamble) {
3214 priv->preamble = bss->preamble;
4d791aad
CP
3215 atmel_set_mib8(priv, Local_Mib_Type,
3216 LOCAL_MIB_PREAMBLE_TYPE, bss->preamble);
1da177e4 3217 }
4d791aad 3218
1da177e4
LT
3219 if (!priv->wep_is_on && bss->UsingWEP) {
3220 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3221 priv->station_is_associated = 0;
3222 return;
3223 }
4d791aad 3224
1da177e4
LT
3225 if (priv->wep_is_on && !bss->UsingWEP) {
3226 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3227 priv->station_is_associated = 0;
3228 return;
3229 }
3230
3231 atmel_enter_state(priv, STATION_STATE_JOINNING);
4d791aad 3232
1da177e4
LT
3233 if (priv->operating_mode == IW_MODE_INFRA)
3234 join(priv, BSS_TYPE_INFRASTRUCTURE);
4d791aad 3235 else
1da177e4
LT
3236 join(priv, BSS_TYPE_AD_HOC);
3237}
3238
1da177e4
LT
3239static void restart_search(struct atmel_private *priv)
3240{
3241 int bss_index;
4d791aad 3242
1da177e4
LT
3243 if (!priv->connect_to_any_BSS) {
3244 atmel_scan(priv, 1);
3245 } else {
3246 priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
4d791aad
CP
3247
3248 if ((bss_index = retrieve_bss(priv)) != -1)
1da177e4
LT
3249 atmel_join_bss(priv, bss_index);
3250 else
3251 atmel_scan(priv, 0);
4d791aad
CP
3252 }
3253}
1da177e4
LT
3254
3255static void smooth_rssi(struct atmel_private *priv, u8 rssi)
3256{
3257 u8 old = priv->wstats.qual.level;
3258 u8 max_rssi = 42; /* 502-rmfd-revd max by experiment, default for now */
3259
3260 switch (priv->firmware_type) {
3261 case ATMEL_FW_TYPE_502E:
3262 max_rssi = 63; /* 502-rmfd-reve max by experiment */
3263 break;
3264 default:
3265 break;
3266 }
3267
3268 rssi = rssi * 100 / max_rssi;
4d791aad
CP
3269 if ((rssi + old) % 2)
3270 priv->wstats.qual.level = (rssi + old) / 2 + 1;
1da177e4 3271 else
4d791aad 3272 priv->wstats.qual.level = (rssi + old) / 2;
1da177e4
LT
3273 priv->wstats.qual.updated |= IW_QUAL_LEVEL_UPDATED;
3274 priv->wstats.qual.updated &= ~IW_QUAL_LEVEL_INVALID;
3275}
3276
3277static void atmel_smooth_qual(struct atmel_private *priv)
3278{
4d791aad 3279 unsigned long time_diff = (jiffies - priv->last_qual) / HZ;
1da177e4
LT
3280 while (time_diff--) {
3281 priv->last_qual += HZ;
4d791aad
CP
3282 priv->wstats.qual.qual = priv->wstats.qual.qual / 2;
3283 priv->wstats.qual.qual +=
1da177e4
LT
3284 priv->beacons_this_sec * priv->beacon_period * (priv->wstats.qual.level + 100) / 4000;
3285 priv->beacons_this_sec = 0;
3286 }
3287 priv->wstats.qual.updated |= IW_QUAL_QUAL_UPDATED;
3288 priv->wstats.qual.updated &= ~IW_QUAL_QUAL_INVALID;
3289}
3290
3291/* deals with incoming managment frames. */
4d791aad
CP
3292static void atmel_management_frame(struct atmel_private *priv,
3293 struct ieee80211_hdr_4addr *header,
3294 u16 frame_len, u8 rssi)
1da177e4
LT
3295{
3296 u16 subtype;
4d791aad
CP
3297
3298 subtype = le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_STYPE;
3299 switch (subtype) {
4861dd79
DW
3300 case IEEE80211_STYPE_BEACON:
3301 case IEEE80211_STYPE_PROBE_RESP:
4d791aad 3302
1da177e4
LT
3303 /* beacon frame has multiple variable-length fields -
3304 never let an engineer loose with a data structure design. */
3305 {
3306 struct beacon_format {
0e5ce1f3
AV
3307 __le64 timestamp;
3308 __le16 interval;
3309 __le16 capability;
1da177e4
LT
3310 u8 ssid_el_id;
3311 u8 ssid_length;
3312 /* ssid here */
3313 u8 rates_el_id;
3314 u8 rates_length;
3315 /* rates here */
3316 u8 ds_el_id;
3317 u8 ds_length;
3318 /* ds here */
3319 } *beacon = (struct beacon_format *)priv->rx_buf;
4d791aad 3320
1da177e4
LT
3321 u8 channel, rates_length, ssid_length;
3322 u64 timestamp = le64_to_cpu(beacon->timestamp);
3323 u16 beacon_interval = le16_to_cpu(beacon->interval);
3324 u16 capability = le16_to_cpu(beacon->capability);
3325 u8 *beaconp = priv->rx_buf;
3326 ssid_length = beacon->ssid_length;
3327 /* this blows chunks. */
4d791aad 3328 if (frame_len < 14 || frame_len < ssid_length + 15)
1da177e4
LT
3329 return;
3330 rates_length = beaconp[beacon->ssid_length + 15];
3331 if (frame_len < ssid_length + rates_length + 18)
3332 return;
3333 if (ssid_length > MAX_SSID_LENGTH)
3334 return;
3335 channel = beaconp[ssid_length + rates_length + 18];
4d791aad 3336
1da177e4
LT
3337 if (priv->station_state == STATION_STATE_READY) {
3338 smooth_rssi(priv, rssi);
4d791aad 3339 if (is_frame_from_current_bss(priv, header)) {
1da177e4
LT
3340 priv->beacons_this_sec++;
3341 atmel_smooth_qual(priv);
3342 if (priv->last_beacon_timestamp) {
3343 /* Note truncate this to 32 bits - kernel can't divide a long long */
3344 u32 beacon_delay = timestamp - priv->last_beacon_timestamp;
3345 int beacons = beacon_delay / (beacon_interval * 1000);
3346 if (beacons > 1)
3347 priv->wstats.miss.beacon += beacons - 1;
3348 }
3349 priv->last_beacon_timestamp = timestamp;
3350 handle_beacon_probe(priv, capability, channel);
3351 }
3352 }
4d791aad
CP
3353
3354 if (priv->station_state == STATION_STATE_SCANNING)
3355 store_bss_info(priv, header, capability,
3356 beacon_interval, channel, rssi,
3357 ssid_length,
3358 &beacon->rates_el_id,
4861dd79 3359 subtype == IEEE80211_STYPE_BEACON);
1da177e4
LT
3360 }
3361 break;
4d791aad 3362
4861dd79 3363 case IEEE80211_STYPE_AUTH:
1da177e4
LT
3364
3365 if (priv->station_state == STATION_STATE_AUTHENTICATING)
3366 authenticate(priv, frame_len);
4d791aad 3367
1da177e4 3368 break;
4d791aad 3369
4861dd79
DW
3370 case IEEE80211_STYPE_ASSOC_RESP:
3371 case IEEE80211_STYPE_REASSOC_RESP:
4d791aad
CP
3372
3373 if (priv->station_state == STATION_STATE_ASSOCIATING ||
1da177e4
LT
3374 priv->station_state == STATION_STATE_REASSOCIATING)
3375 associate(priv, frame_len, subtype);
4d791aad 3376
1da177e4
LT
3377 break;
3378
4861dd79 3379 case IEEE80211_STYPE_DISASSOC:
4d791aad
CP
3380 if (priv->station_is_associated &&
3381 priv->operating_mode == IW_MODE_INFRA &&
1da177e4
LT
3382 is_frame_from_current_bss(priv, header)) {
3383 priv->station_was_associated = 0;
3384 priv->station_is_associated = 0;
4d791aad 3385
1da177e4
LT
3386 atmel_enter_state(priv, STATION_STATE_JOINNING);
3387 join(priv, BSS_TYPE_INFRASTRUCTURE);
3388 }
4d791aad 3389
1da177e4
LT
3390 break;
3391
4861dd79 3392 case IEEE80211_STYPE_DEAUTH:
1da177e4
LT
3393 if (priv->operating_mode == IW_MODE_INFRA &&
3394 is_frame_from_current_bss(priv, header)) {
3395 priv->station_was_associated = 0;
3396
3397 atmel_enter_state(priv, STATION_STATE_JOINNING);
3398 join(priv, BSS_TYPE_INFRASTRUCTURE);
3399 }
4d791aad 3400
1da177e4
LT
3401 break;
3402 }
3403}
3404
3405/* run when timer expires */
3406static void atmel_management_timer(u_long a)
3407{
4d791aad
CP
3408 struct net_device *dev = (struct net_device *) a;
3409 struct atmel_private *priv = netdev_priv(dev);
3410 unsigned long flags;
1da177e4 3411
4d791aad
CP
3412 /* Check if the card has been yanked. */
3413 if (priv->card && priv->present_callback &&
3414 !(*priv->present_callback)(priv->card))
3415 return;
1da177e4 3416
4d791aad
CP
3417 spin_lock_irqsave(&priv->irqlock, flags);
3418
3419 switch (priv->station_state) {
1da177e4 3420
4d791aad
CP
3421 case STATION_STATE_AUTHENTICATING:
3422 if (priv->AuthenticationRequestRetryCnt >= MAX_AUTHENTICATION_RETRIES) {
3423 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3424 priv->station_is_associated = 0;
3425 priv->AuthenticationRequestRetryCnt = 0;
3426 restart_search(priv);
3427 } else {
4861dd79 3428 int auth = WLAN_AUTH_OPEN;
4d791aad
CP
3429 priv->AuthenticationRequestRetryCnt++;
3430 priv->CurrentAuthentTransactionSeqNum = 0x0001;
3431 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
73451379 3432 if (priv->wep_is_on && priv->exclude_unencrypted)
4861dd79 3433 auth = WLAN_AUTH_SHARED_KEY;
73451379 3434 send_authentication_request(priv, auth, NULL, 0);
4d791aad 3435 }
1da177e4 3436 break;
4d791aad
CP
3437
3438 case STATION_STATE_ASSOCIATING:
3439 if (priv->AssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3440 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3441 priv->station_is_associated = 0;
3442 priv->AssociationRequestRetryCnt = 0;
3443 restart_search(priv);
3444 } else {
3445 priv->AssociationRequestRetryCnt++;
3446 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3447 send_association_request(priv, 0);
3448 }
1da177e4 3449 break;
4d791aad
CP
3450
3451 case STATION_STATE_REASSOCIATING:
3452 if (priv->ReAssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3453 atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3454 priv->station_is_associated = 0;
3455 priv->ReAssociationRequestRetryCnt = 0;
3456 restart_search(priv);
3457 } else {
3458 priv->ReAssociationRequestRetryCnt++;
3459 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3460 send_association_request(priv, 1);
3461 }
3462 break;
3463
3464 default:
3465 break;
3466 }
3467
3468 spin_unlock_irqrestore(&priv->irqlock, flags);
1da177e4 3469}
4d791aad 3470
1da177e4
LT
3471static void atmel_command_irq(struct atmel_private *priv)
3472{
3473 u8 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
3474 u8 command = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET));
3475 int fast_scan;
3a1af6ff 3476 union iwreq_data wrqu;
4d791aad
CP
3477
3478 if (status == CMD_STATUS_IDLE ||
1da177e4
LT
3479 status == CMD_STATUS_IN_PROGRESS)
3480 return;
3481
3482 switch (command){
3483
3484 case CMD_Start:
3485 if (status == CMD_STATUS_COMPLETE) {
3486 priv->station_was_associated = priv->station_is_associated;
3487 atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
3488 (u8 *)priv->CurrentBSSID, 6);
3489 atmel_enter_state(priv, STATION_STATE_READY);
4d791aad 3490 }
1da177e4 3491 break;
4d791aad 3492
1da177e4
LT
3493 case CMD_Scan:
3494 fast_scan = priv->fast_scan;
3495 priv->fast_scan = 0;
4d791aad 3496
1da177e4
LT
3497 if (status != CMD_STATUS_COMPLETE) {
3498 atmel_scan(priv, 1);
3499 } else {
3500 int bss_index = retrieve_bss(priv);
3a1af6ff 3501 int notify_scan_complete = 1;
1da177e4
LT
3502 if (bss_index != -1) {
3503 atmel_join_bss(priv, bss_index);
4d791aad 3504 } else if (priv->operating_mode == IW_MODE_ADHOC &&
1da177e4
LT
3505 priv->SSID_size != 0) {
3506 start(priv, BSS_TYPE_AD_HOC);
3507 } else {
3508 priv->fast_scan = !fast_scan;
3509 atmel_scan(priv, 1);
3a1af6ff 3510 notify_scan_complete = 0;
1da177e4
LT
3511 }
3512 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3a1af6ff
DW
3513 if (notify_scan_complete) {
3514 wrqu.data.length = 0;
3515 wrqu.data.flags = 0;
3516 wireless_send_event(priv->dev, SIOCGIWSCAN, &wrqu, NULL);
3517 }
1da177e4
LT
3518 }
3519 break;
4d791aad 3520
1da177e4
LT
3521 case CMD_SiteSurvey:
3522 priv->fast_scan = 0;
4d791aad 3523
1da177e4
LT
3524 if (status != CMD_STATUS_COMPLETE)
3525 return;
4d791aad 3526
1da177e4
LT
3527 priv->site_survey_state = SITE_SURVEY_COMPLETED;
3528 if (priv->station_is_associated) {
4d791aad 3529 atmel_enter_state(priv, STATION_STATE_READY);
3a1af6ff
DW
3530 wrqu.data.length = 0;
3531 wrqu.data.flags = 0;
3532 wireless_send_event(priv->dev, SIOCGIWSCAN, &wrqu, NULL);
1da177e4
LT
3533 } else {
3534 atmel_scan(priv, 1);
3535 }
3536 break;
3537
3538 case CMD_Join:
3539 if (status == CMD_STATUS_COMPLETE) {
3540 if (priv->operating_mode == IW_MODE_ADHOC) {
3541 priv->station_was_associated = priv->station_is_associated;
3542 atmel_enter_state(priv, STATION_STATE_READY);
3543 } else {
4861dd79 3544 int auth = WLAN_AUTH_OPEN;
1da177e4
LT
3545 priv->AuthenticationRequestRetryCnt = 0;
3546 atmel_enter_state(priv, STATION_STATE_AUTHENTICATING);
4d791aad 3547
1da177e4
LT
3548 mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3549 priv->CurrentAuthentTransactionSeqNum = 0x0001;
73451379 3550 if (priv->wep_is_on && priv->exclude_unencrypted)
4861dd79 3551 auth = WLAN_AUTH_SHARED_KEY;
73451379 3552 send_authentication_request(priv, auth, NULL, 0);
1da177e4
LT
3553 }
3554 return;
3555 }
4d791aad 3556
1da177e4 3557 atmel_scan(priv, 1);
1da177e4
LT
3558 }
3559}
3560
3561static int atmel_wakeup_firmware(struct atmel_private *priv)
3562{
3563 struct host_info_struct *iface = &priv->host_info;
3564 u16 mr1, mr3;
3565 int i;
3566
3567 if (priv->card_type == CARD_TYPE_SPI_FLASH)
3568 atmel_set_gcr(priv->dev, GCR_REMAP);
4d791aad 3569
1da177e4
LT
3570 /* wake up on-board processor */
3571 atmel_clear_gcr(priv->dev, 0x0040);
3572 atmel_write16(priv->dev, BSR, BSS_SRAM);
4d791aad 3573
1da177e4
LT
3574 if (priv->card_type == CARD_TYPE_SPI_FLASH)
3575 mdelay(100);
3576
3577 /* and wait for it */
4d791aad 3578 for (i = LOOP_RETRY_LIMIT; i; i--) {
1da177e4
LT
3579 mr1 = atmel_read16(priv->dev, MR1);
3580 mr3 = atmel_read16(priv->dev, MR3);
4d791aad
CP
3581
3582 if (mr3 & MAC_BOOT_COMPLETE)
1da177e4
LT
3583 break;
3584 if (mr1 & MAC_BOOT_COMPLETE &&
3585 priv->bus_type == BUS_TYPE_PCCARD)
3586 break;
3587 }
3588
3589 if (i == 0) {
3590 printk(KERN_ALERT "%s: MAC failed to boot.\n", priv->dev->name);
3c34a5d8 3591 return -EIO;
1da177e4 3592 }
4d791aad 3593
1da177e4
LT
3594 if ((priv->host_info_base = atmel_read16(priv->dev, MR2)) == 0xffff) {
3595 printk(KERN_ALERT "%s: card missing.\n", priv->dev->name);
3c34a5d8 3596 return -ENODEV;
1da177e4 3597 }
4d791aad
CP
3598
3599 /* now check for completion of MAC initialization through
3600 the FunCtrl field of the IFACE, poll MR1 to detect completion of
3601 MAC initialization, check completion status, set interrupt mask,
3602 enables interrupts and calls Tx and Rx initialization functions */
3603
1da177e4 3604 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET), FUNC_CTRL_INIT_COMPLETE);
4d791aad
CP
3605
3606 for (i = LOOP_RETRY_LIMIT; i; i--) {
1da177e4
LT
3607 mr1 = atmel_read16(priv->dev, MR1);
3608 mr3 = atmel_read16(priv->dev, MR3);
4d791aad
CP
3609
3610 if (mr3 & MAC_INIT_COMPLETE)
1da177e4
LT
3611 break;
3612 if (mr1 & MAC_INIT_COMPLETE &&
3613 priv->bus_type == BUS_TYPE_PCCARD)
3614 break;
3615 }
4d791aad 3616
1da177e4 3617 if (i == 0) {
4d791aad
CP
3618 printk(KERN_ALERT "%s: MAC failed to initialise.\n",
3619 priv->dev->name);
3c34a5d8 3620 return -EIO;
1da177e4 3621 }
4d791aad 3622
1da177e4
LT
3623 /* Check for MAC_INIT_OK only on the register that the MAC_INIT_OK was set */
3624 if ((mr3 & MAC_INIT_COMPLETE) &&
3625 !(atmel_read16(priv->dev, MR3) & MAC_INIT_OK)) {
3626 printk(KERN_ALERT "%s: MAC failed MR3 self-test.\n", priv->dev->name);
3c34a5d8 3627 return -EIO;
1da177e4
LT
3628 }
3629 if ((mr1 & MAC_INIT_COMPLETE) &&
3630 !(atmel_read16(priv->dev, MR1) & MAC_INIT_OK)) {
3631 printk(KERN_ALERT "%s: MAC failed MR1 self-test.\n", priv->dev->name);
3c34a5d8 3632 return -EIO;
1da177e4
LT
3633 }
3634
4d791aad 3635 atmel_copy_to_host(priv->dev, (unsigned char *)iface,
1da177e4 3636 priv->host_info_base, sizeof(*iface));
4d791aad 3637
1da177e4
LT
3638 iface->tx_buff_pos = le16_to_cpu(iface->tx_buff_pos);
3639 iface->tx_buff_size = le16_to_cpu(iface->tx_buff_size);
3640 iface->tx_desc_pos = le16_to_cpu(iface->tx_desc_pos);
3641 iface->tx_desc_count = le16_to_cpu(iface->tx_desc_count);
3642 iface->rx_buff_pos = le16_to_cpu(iface->rx_buff_pos);
3643 iface->rx_buff_size = le16_to_cpu(iface->rx_buff_size);
3644 iface->rx_desc_pos = le16_to_cpu(iface->rx_desc_pos);
3645 iface->rx_desc_count = le16_to_cpu(iface->rx_desc_count);
3646 iface->build_version = le16_to_cpu(iface->build_version);
3647 iface->command_pos = le16_to_cpu(iface->command_pos);
3648 iface->major_version = le16_to_cpu(iface->major_version);
3649 iface->minor_version = le16_to_cpu(iface->minor_version);
3650 iface->func_ctrl = le16_to_cpu(iface->func_ctrl);
3651 iface->mac_status = le16_to_cpu(iface->mac_status);
3652
3c34a5d8 3653 return 0;
1da177e4
LT
3654}
3655
3656/* determine type of memory and MAC address */
3657static int probe_atmel_card(struct net_device *dev)
3658{
3659 int rc = 0;
3660 struct atmel_private *priv = netdev_priv(dev);
4d791aad 3661
1da177e4 3662 /* reset pccard */
4d791aad 3663 if (priv->bus_type == BUS_TYPE_PCCARD)
1da177e4 3664 atmel_write16(dev, GCR, 0x0060);
4d791aad 3665
1da177e4
LT
3666 atmel_write16(dev, GCR, 0x0040);
3667 mdelay(500);
4d791aad 3668
1da177e4 3669 if (atmel_read16(dev, MR2) == 0) {
4d791aad 3670 /* No stored firmware so load a small stub which just
1da177e4
LT
3671 tells us the MAC address */
3672 int i;
3673 priv->card_type = CARD_TYPE_EEPROM;
3674 atmel_write16(dev, BSR, BSS_IRAM);
3675 atmel_copy_to_card(dev, 0, mac_reader, sizeof(mac_reader));
3676 atmel_set_gcr(dev, GCR_REMAP);
3677 atmel_clear_gcr(priv->dev, 0x0040);
3678 atmel_write16(dev, BSR, BSS_SRAM);
4d791aad 3679 for (i = LOOP_RETRY_LIMIT; i; i--)
1da177e4
LT
3680 if (atmel_read16(dev, MR3) & MAC_BOOT_COMPLETE)
3681 break;
3682 if (i == 0) {
3683 printk(KERN_ALERT "%s: MAC failed to boot MAC address reader.\n", dev->name);
3684 } else {
3685 atmel_copy_to_host(dev, dev->dev_addr, atmel_read16(dev, MR2), 6);
3686 /* got address, now squash it again until the network
3687 interface is opened */
4d791aad 3688 if (priv->bus_type == BUS_TYPE_PCCARD)
1da177e4
LT
3689 atmel_write16(dev, GCR, 0x0060);
3690 atmel_write16(dev, GCR, 0x0040);
3691 rc = 1;
3692 }
3693 } else if (atmel_read16(dev, MR4) == 0) {
3694 /* Mac address easy in this case. */
3695 priv->card_type = CARD_TYPE_PARALLEL_FLASH;
4d791aad 3696 atmel_write16(dev, BSR, 1);
1da177e4
LT
3697 atmel_copy_to_host(dev, dev->dev_addr, 0xc000, 6);
3698 atmel_write16(dev, BSR, 0x200);
3699 rc = 1;
3700 } else {
3701 /* Standard firmware in flash, boot it up and ask
3702 for the Mac Address */
3703 priv->card_type = CARD_TYPE_SPI_FLASH;
3c34a5d8 3704 if (atmel_wakeup_firmware(priv) == 0) {
1da177e4 3705 atmel_get_mib(priv, Mac_Address_Mib_Type, 0, dev->dev_addr, 6);
4d791aad 3706
1da177e4
LT
3707 /* got address, now squash it again until the network
3708 interface is opened */
4d791aad 3709 if (priv->bus_type == BUS_TYPE_PCCARD)
1da177e4
LT
3710 atmel_write16(dev, GCR, 0x0060);
3711 atmel_write16(dev, GCR, 0x0040);
3712 rc = 1;
3713 }
3714 }
4d791aad 3715
1da177e4
LT
3716 if (rc) {
3717 if (dev->dev_addr[0] == 0xFF) {
3718 u8 default_mac[] = {0x00,0x04, 0x25, 0x00, 0x00, 0x00};
3719 printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name);
3720 memcpy(dev->dev_addr, default_mac, 6);
3721 }
1da177e4 3722 }
4d791aad 3723
1da177e4
LT
3724 return rc;
3725}
3726
1da177e4
LT
3727/* Move the encyption information on the MIB structure.
3728 This routine is for the pre-WPA firmware: later firmware has
3729 a different format MIB and a different routine. */
4d791aad 3730static void build_wep_mib(struct atmel_private *priv)
1da177e4
LT
3731{
3732 struct { /* NB this is matched to the hardware, don't change. */
4d791aad 3733 u8 wep_is_on;
1da177e4
LT
3734 u8 default_key; /* 0..3 */
3735 u8 reserved;
3736 u8 exclude_unencrypted;
4d791aad 3737
1da177e4
LT
3738 u32 WEPICV_error_count;
3739 u32 WEP_excluded_count;
4d791aad 3740
1da177e4 3741 u8 wep_keys[MAX_ENCRYPTION_KEYS][13];
4d791aad
CP
3742 u8 encryption_level; /* 0, 1, 2 */
3743 u8 reserved2[3];
1da177e4
LT
3744 } mib;
3745 int i;
3746
3747 mib.wep_is_on = priv->wep_is_on;
3748 if (priv->wep_is_on) {
3749 if (priv->wep_key_len[priv->default_key] > 5)
3750 mib.encryption_level = 2;
3751 else
4d791aad 3752 mib.encryption_level = 1;
1da177e4
LT
3753 } else {
3754 mib.encryption_level = 0;
3755 }
3756
3757 mib.default_key = priv->default_key;
3758 mib.exclude_unencrypted = priv->exclude_unencrypted;
4d791aad
CP
3759
3760 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++)
1da177e4 3761 memcpy(mib.wep_keys[i], priv->wep_keys[i], 13);
4d791aad 3762
1da177e4
LT
3763 atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3764}
3765
3766static void build_wpa_mib(struct atmel_private *priv)
3767{
4d791aad 3768 /* This is for the later (WPA enabled) firmware. */
1da177e4
LT
3769
3770 struct { /* NB this is matched to the hardware, don't change. */
3771 u8 cipher_default_key_value[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
3772 u8 receiver_address[6];
4d791aad 3773 u8 wep_is_on;
1da177e4
LT
3774 u8 default_key; /* 0..3 */
3775 u8 group_key;
3776 u8 exclude_unencrypted;
3777 u8 encryption_type;
3778 u8 reserved;
4d791aad 3779
1da177e4
LT
3780 u32 WEPICV_error_count;
3781 u32 WEP_excluded_count;
4d791aad 3782
1da177e4
LT
3783 u8 key_RSC[4][8];
3784 } mib;
4d791aad 3785
1da177e4
LT
3786 int i;
3787
3788 mib.wep_is_on = priv->wep_is_on;
3789 mib.exclude_unencrypted = priv->exclude_unencrypted;
3790 memcpy(mib.receiver_address, priv->CurrentBSSID, 6);
4d791aad 3791
1da177e4
LT
3792 /* zero all the keys before adding in valid ones. */
3793 memset(mib.cipher_default_key_value, 0, sizeof(mib.cipher_default_key_value));
4d791aad 3794
1da177e4 3795 if (priv->wep_is_on) {
4d791aad
CP
3796 /* There's a comment in the Atmel code to the effect that this
3797 is only valid when still using WEP, it may need to be set to
3798 something to use WPA */
1da177e4 3799 memset(mib.key_RSC, 0, sizeof(mib.key_RSC));
4d791aad 3800
1da177e4
LT
3801 mib.default_key = mib.group_key = 255;
3802 for (i = 0; i < MAX_ENCRYPTION_KEYS; i++) {
3803 if (priv->wep_key_len[i] > 0) {
3804 memcpy(mib.cipher_default_key_value[i], priv->wep_keys[i], MAX_ENCRYPTION_KEY_SIZE);
3805 if (i == priv->default_key) {
3806 mib.default_key = i;
3807 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 7;
4d791aad 3808 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->pairwise_cipher_suite;
1da177e4
LT
3809 } else {
3810 mib.group_key = i;
3811 priv->group_cipher_suite = priv->pairwise_cipher_suite;
3812 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 1;
4d791aad 3813 mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->group_cipher_suite;
1da177e4
LT
3814 }
3815 }
3816 }
3817 if (mib.default_key == 255)
3818 mib.default_key = mib.group_key != 255 ? mib.group_key : 0;
3819 if (mib.group_key == 255)
3820 mib.group_key = mib.default_key;
4d791aad 3821
1da177e4 3822 }
4d791aad 3823
1da177e4
LT
3824 atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3825}
4d791aad
CP
3826
3827static int reset_atmel_card(struct net_device *dev)
1da177e4
LT
3828{
3829 /* do everything necessary to wake up the hardware, including
3830 waiting for the lightning strike and throwing the knife switch....
3831
4d791aad 3832 set all the Mib values which matter in the card to match
1da177e4
LT
3833 their settings in the atmel_private structure. Some of these
3834 can be altered on the fly, but many (WEP, infrastucture or ad-hoc)
3835 can only be changed by tearing down the world and coming back through
3836 here.
3837
4d791aad
CP
3838 This routine is also responsible for initialising some
3839 hardware-specific fields in the atmel_private structure,
1da177e4
LT
3840 including a copy of the firmware's hostinfo stucture
3841 which is the route into the rest of the firmare datastructures. */
3842
3843 struct atmel_private *priv = netdev_priv(dev);
3844 u8 configuration;
9a6301c1 3845 int old_state = priv->station_state;
3c34a5d8 3846 int err = 0;
4d791aad 3847
1da177e4
LT
3848 /* data to add to the firmware names, in priority order
3849 this implemenents firmware versioning */
4d791aad 3850
1da177e4
LT
3851 static char *firmware_modifier[] = {
3852 "-wpa",
3853 "",
3854 NULL
3855 };
4d791aad 3856
1da177e4 3857 /* reset pccard */
4d791aad 3858 if (priv->bus_type == BUS_TYPE_PCCARD)
1da177e4 3859 atmel_write16(priv->dev, GCR, 0x0060);
4d791aad 3860
1da177e4
LT
3861 /* stop card , disable interrupts */
3862 atmel_write16(priv->dev, GCR, 0x0040);
4d791aad 3863
1da177e4
LT
3864 if (priv->card_type == CARD_TYPE_EEPROM) {
3865 /* copy in firmware if needed */
3866 const struct firmware *fw_entry = NULL;
2f26e8af 3867 const unsigned char *fw;
1da177e4
LT
3868 int len = priv->firmware_length;
3869 if (!(fw = priv->firmware)) {
3870 if (priv->firmware_type == ATMEL_FW_TYPE_NONE) {
3871 if (strlen(priv->firmware_id) == 0) {
3872 printk(KERN_INFO
3873 "%s: card type is unknown: assuming at76c502 firmware is OK.\n",
3874 dev->name);
3875 printk(KERN_INFO
4d791aad 3876 "%s: if not, use the firmware= module parameter.\n",
1da177e4
LT
3877 dev->name);
3878 strcpy(priv->firmware_id, "atmel_at76c502.bin");
3879 }
3c34a5d8
DW
3880 err = request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev);
3881 if (err != 0) {
4d791aad
CP
3882 printk(KERN_ALERT
3883 "%s: firmware %s is missing, cannot continue.\n",
1da177e4 3884 dev->name, priv->firmware_id);
3c34a5d8 3885 return err;
1da177e4
LT
3886 }
3887 } else {
3888 int fw_index = 0;
3889 int success = 0;
3890
3891 /* get firmware filename entry based on firmware type ID */
3892 while (fw_table[fw_index].fw_type != priv->firmware_type
3893 && fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE)
3894 fw_index++;
4d791aad 3895
1da177e4
LT
3896 /* construct the actual firmware file name */
3897 if (fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE) {
3898 int i;
3899 for (i = 0; firmware_modifier[i]; i++) {
3900 snprintf(priv->firmware_id, 32, "%s%s.%s", fw_table[fw_index].fw_file,
3901 firmware_modifier[i], fw_table[fw_index].fw_file_ext);
3902 priv->firmware_id[31] = '\0';
3903 if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) == 0) {
3904 success = 1;
3905 break;
3906 }
3907 }
3908 }
3909 if (!success) {
4d791aad
CP
3910 printk(KERN_ALERT
3911 "%s: firmware %s is missing, cannot start.\n",
1da177e4
LT
3912 dev->name, priv->firmware_id);
3913 priv->firmware_id[0] = '\0';
3c34a5d8 3914 return -ENOENT;
1da177e4
LT
3915 }
3916 }
4d791aad 3917
1da177e4
LT
3918 fw = fw_entry->data;
3919 len = fw_entry->size;
3920 }
4d791aad 3921
1da177e4
LT
3922 if (len <= 0x6000) {
3923 atmel_write16(priv->dev, BSR, BSS_IRAM);
3924 atmel_copy_to_card(priv->dev, 0, fw, len);
3925 atmel_set_gcr(priv->dev, GCR_REMAP);
3926 } else {
4d791aad 3927 /* Remap */
1da177e4
LT
3928 atmel_set_gcr(priv->dev, GCR_REMAP);
3929 atmel_write16(priv->dev, BSR, BSS_IRAM);
3930 atmel_copy_to_card(priv->dev, 0, fw, 0x6000);
3931 atmel_write16(priv->dev, BSR, 0x2ff);
3932 atmel_copy_to_card(priv->dev, 0x8000, &fw[0x6000], len - 0x6000);
3933 }
3934
3935 if (fw_entry)
3936 release_firmware(fw_entry);
3937 }
3938
3c34a5d8
DW
3939 err = atmel_wakeup_firmware(priv);
3940 if (err != 0)
3941 return err;
1da177e4
LT
3942
3943 /* Check the version and set the correct flag for wpa stuff,
3944 old and new firmware is incompatible.
3945 The pre-wpa 3com firmware reports major version 5,
3946 the wpa 3com firmware is major version 4 and doesn't need
3947 the 3com broken-ness filter. */
3948 priv->use_wpa = (priv->host_info.major_version == 4);
3949 priv->radio_on_broken = (priv->host_info.major_version == 5);
4d791aad 3950
1da177e4
LT
3951 /* unmask all irq sources */
3952 atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_MASK_OFFSET), 0xff);
4d791aad 3953
1da177e4
LT
3954 /* int Tx system and enable Tx */
3955 atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, 0), 0);
3956 atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, 0), 0x80000000L);
3957 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, 0), 0);
3958 atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, 0), 0);
3959
4d791aad
CP
3960 priv->tx_desc_free = priv->host_info.tx_desc_count;
3961 priv->tx_desc_head = 0;
3962 priv->tx_desc_tail = 0;
1da177e4
LT
3963 priv->tx_desc_previous = 0;
3964 priv->tx_free_mem = priv->host_info.tx_buff_size;
4d791aad
CP
3965 priv->tx_buff_head = 0;
3966 priv->tx_buff_tail = 0;
3967
3968 configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3969 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
1da177e4
LT
3970 configuration | FUNC_CTRL_TxENABLE);
3971
3972 /* init Rx system and enable */
3973 priv->rx_desc_head = 0;
4d791aad
CP
3974
3975 configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3976 atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
1da177e4 3977 configuration | FUNC_CTRL_RxENABLE);
4d791aad 3978
1da177e4 3979 if (!priv->radio_on_broken) {
4d791aad 3980 if (atmel_send_command_wait(priv, CMD_EnableRadio, NULL, 0) ==
1da177e4 3981 CMD_STATUS_REJECTED_RADIO_OFF) {
3c34a5d8 3982 printk(KERN_INFO "%s: cannot turn the radio on.\n",
1da177e4 3983 dev->name);
3c34a5d8 3984 return -EIO;
1da177e4
LT
3985 }
3986 }
4d791aad 3987
1da177e4
LT
3988 /* set up enough MIB values to run. */
3989 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_AUTO_TX_RATE_POS, priv->auto_tx_rate);
3990 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_TX_PROMISCUOUS_POS, PROM_MODE_OFF);
3991 atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_RTS_THRESHOLD_POS, priv->rts_threshold);
3992 atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_FRAG_THRESHOLD_POS, priv->frag_threshold);
3993 atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_SHORT_RETRY_POS, priv->short_retry);
3994 atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_LONG_RETRY_POS, priv->long_retry);
3995 atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, priv->preamble);
4d791aad 3996 atmel_set_mib(priv, Mac_Address_Mib_Type, MAC_ADDR_MIB_MAC_ADDR_POS,
1da177e4
LT
3997 priv->dev->dev_addr, 6);
3998 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3999 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
4000 atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_BEACON_PER_POS, priv->default_beacon_period);
4001 atmel_set_mib(priv, Phy_Mib_Type, PHY_MIB_RATE_SET_POS, atmel_basic_rates, 4);
4002 atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_PRIVACY_POS, priv->wep_is_on);
4003 if (priv->use_wpa)
4004 build_wpa_mib(priv);
4005 else
4006 build_wep_mib(priv);
4d791aad 4007
9a6301c1
DW
4008 if (old_state == STATION_STATE_READY)
4009 {
4010 union iwreq_data wrqu;
4011
4012 wrqu.data.length = 0;
4013 wrqu.data.flags = 0;
4014 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
4015 memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
4016 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
4017 }
4018
3c34a5d8 4019 return 0;
1da177e4
LT
4020}
4021
4d791aad
CP
4022static void atmel_send_command(struct atmel_private *priv, int command,
4023 void *cmd, int cmd_size)
1da177e4
LT
4024{
4025 if (cmd)
4d791aad 4026 atmel_copy_to_card(priv->dev, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET),
1da177e4 4027 cmd, cmd_size);
4d791aad 4028
1da177e4
LT
4029 atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET), command);
4030 atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET), 0);
4031}
4d791aad
CP
4032
4033static int atmel_send_command_wait(struct atmel_private *priv, int command,
4034 void *cmd, int cmd_size)
1da177e4
LT
4035{
4036 int i, status;
4d791aad 4037
1da177e4 4038 atmel_send_command(priv, command, cmd, cmd_size);
4d791aad 4039
1da177e4
LT
4040 for (i = 5000; i; i--) {
4041 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
4d791aad 4042 if (status != CMD_STATUS_IDLE &&
1da177e4
LT
4043 status != CMD_STATUS_IN_PROGRESS)
4044 break;
4045 udelay(20);
4046 }
4d791aad 4047
1da177e4
LT
4048 if (i == 0) {
4049 printk(KERN_ALERT "%s: failed to contact MAC.\n", priv->dev->name);
4050 status = CMD_STATUS_HOST_ERROR;
4d791aad 4051 } else {
1da177e4
LT
4052 if (command != CMD_EnableRadio)
4053 status = CMD_STATUS_COMPLETE;
4054 }
4d791aad 4055
1da177e4
LT
4056 return status;
4057}
4058
4059static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index)
4060{
4061 struct get_set_mib m;
4062 m.type = type;
4063 m.size = 1;
4064 m.index = index;
4065
4066 atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
4067 return atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE));
4068}
4069
4070static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index, u8 data)
4071{
4072 struct get_set_mib m;
4073 m.type = type;
4074 m.size = 1;
4075 m.index = index;
4076 m.data[0] = data;
4077
4078 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
4079}
4080
4d791aad
CP
4081static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
4082 u16 data)
1da177e4
LT
4083{
4084 struct get_set_mib m;
4085 m.type = type;
4086 m.size = 2;
4087 m.index = index;
4088 m.data[0] = data;
4089 m.data[1] = data >> 8;
4090
4091 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 2);
4092}
4093
4d791aad
CP
4094static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
4095 u8 *data, int data_len)
1da177e4
LT
4096{
4097 struct get_set_mib m;
4098 m.type = type;
4099 m.size = data_len;
4100 m.index = index;
4101
4102 if (data_len > MIB_MAX_DATA_BYTES)
4103 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4d791aad 4104
1da177e4
LT
4105 memcpy(m.data, data, data_len);
4106 atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4107}
4108
4d791aad
CP
4109static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
4110 u8 *data, int data_len)
1da177e4
LT
4111{
4112 struct get_set_mib m;
4113 m.type = type;
4114 m.size = data_len;
4115 m.index = index;
4d791aad 4116
1da177e4
LT
4117 if (data_len > MIB_MAX_DATA_BYTES)
4118 printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4d791aad 4119
1da177e4 4120 atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4d791aad 4121 atmel_copy_to_host(priv->dev, data,
1da177e4
LT
4122 atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE), data_len);
4123}
4124
4125static void atmel_writeAR(struct net_device *dev, u16 data)
4126{
4127 int i;
4128 outw(data, dev->base_addr + AR);
4129 /* Address register appears to need some convincing..... */
4d791aad 4130 for (i = 0; data != inw(dev->base_addr + AR) && i < 10; i++)
1da177e4
LT
4131 outw(data, dev->base_addr + AR);
4132}
4133
4d791aad 4134static void atmel_copy_to_card(struct net_device *dev, u16 dest,
2f26e8af 4135 const unsigned char *src, u16 len)
1da177e4
LT
4136{
4137 int i;
4138 atmel_writeAR(dev, dest);
4139 if (dest % 2) {
4140 atmel_write8(dev, DR, *src);
4141 src++; len--;
4142 }
4143 for (i = len; i > 1 ; i -= 2) {
4144 u8 lb = *src++;
4145 u8 hb = *src++;
4146 atmel_write16(dev, DR, lb | (hb << 8));
4147 }
4148 if (i)
4149 atmel_write8(dev, DR, *src);
4150}
4151
4d791aad
CP
4152static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
4153 u16 src, u16 len)
1da177e4
LT
4154{
4155 int i;
4156 atmel_writeAR(dev, src);
4157 if (src % 2) {
4158 *dest = atmel_read8(dev, DR);
4159 dest++; len--;
4160 }
4161 for (i = len; i > 1 ; i -= 2) {
4162 u16 hw = atmel_read16(dev, DR);
4163 *dest++ = hw;
4164 *dest++ = hw >> 8;
4165 }
4166 if (i)
4167 *dest = atmel_read8(dev, DR);
4168}
4169
4170static void atmel_set_gcr(struct net_device *dev, u16 mask)
4171{
4172 outw(inw(dev->base_addr + GCR) | mask, dev->base_addr + GCR);
4173}
4174
4175static void atmel_clear_gcr(struct net_device *dev, u16 mask)
4176{
4177 outw(inw(dev->base_addr + GCR) & ~mask, dev->base_addr + GCR);
4178}
4179
4180static int atmel_lock_mac(struct atmel_private *priv)
4181{
4182 int i, j = 20;
4183 retry:
4184 for (i = 5000; i; i--) {
4185 if (!atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET)))
4186 break;
4187 udelay(20);
4188 }
4d791aad
CP
4189
4190 if (!i)
4191 return 0; /* timed out */
4192
1da177e4
LT
4193 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 1);
4194 if (atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET))) {
4195 atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
4d791aad
CP
4196 if (!j--)
4197 return 0; /* timed out */
1da177e4
LT
4198 goto retry;
4199 }
4d791aad 4200
1da177e4
LT
4201 return 1;
4202}
4203
4204static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data)
4205{
4d791aad 4206 atmel_writeAR(priv->dev, pos);
1da177e4
LT
4207 atmel_write16(priv->dev, DR, data); /* card is little-endian */
4208 atmel_write16(priv->dev, DR, data >> 16);
4209}
4210
4211/***************************************************************************/
4212/* There follows the source form of the MAC address reading firmware */
4213/***************************************************************************/
4214#if 0
4215
4216/* Copyright 2003 Matthew T. Russotto */
4217/* But derived from the Atmel 76C502 firmware written by Atmel and */
4218/* included in "atmel wireless lan drivers" package */
4219/**
4220 This file is part of net.russotto.AtmelMACFW, hereto referred to
4221 as AtmelMACFW
4222
4223 AtmelMACFW is free software; you can redistribute it and/or modify
4224 it under the terms of the GNU General Public License version 2
4225 as published by the Free Software Foundation.
4226
4227 AtmelMACFW is distributed in the hope that it will be useful,
4228 but WITHOUT ANY WARRANTY; without even the implied warranty of
4229 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4230 GNU General Public License for more details.
4231
4232 You should have received a copy of the GNU General Public License
4233 along with AtmelMACFW; if not, write to the Free Software
4234 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
4235
4236****************************************************************************/
4237/* This firmware should work on the 76C502 RFMD, RFMD_D, and RFMD_E */
4238/* It will probably work on the 76C504 and 76C502 RFMD_3COM */
4239/* It only works on SPI EEPROM versions of the card. */
4240
4241/* This firmware initializes the SPI controller and clock, reads the MAC */
4242/* address from the EEPROM into SRAM, and puts the SRAM offset of the MAC */
4243/* address in MR2, and sets MR3 to 0x10 to indicate it is done */
4244/* It also puts a complete copy of the EEPROM in SRAM with the offset in */
4245/* MR4, for investigational purposes (maybe we can determine chip type */
4246/* from that?) */
4247
4248 .org 0
4249 .set MRBASE, 0x8000000
4250 .set CPSR_INITIAL, 0xD3 /* IRQ/FIQ disabled, ARM mode, Supervisor state */
4251 .set CPSR_USER, 0xD1 /* IRQ/FIQ disabled, ARM mode, USER state */
4252 .set SRAM_BASE, 0x02000000
4253 .set SP_BASE, 0x0F300000
4254 .set UNK_BASE, 0x0F000000 /* Some internal device, but which one? */
4255 .set SPI_CGEN_BASE, 0x0E000000 /* Some internal device, but which one? */
4256 .set UNK3_BASE, 0x02014000 /* Some internal device, but which one? */
4257 .set STACK_BASE, 0x5600
4258 .set SP_SR, 0x10
4259 .set SP_TDRE, 2 /* status register bit -- TDR empty */
4260 .set SP_RDRF, 1 /* status register bit -- RDR full */
4261 .set SP_SWRST, 0x80
4262 .set SP_SPIEN, 0x1
4263 .set SP_CR, 0 /* control register */
4264 .set SP_MR, 4 /* mode register */
4265 .set SP_RDR, 0x08 /* Read Data Register */
4266 .set SP_TDR, 0x0C /* Transmit Data Register */
4267 .set SP_CSR0, 0x30 /* chip select registers */
4268 .set SP_CSR1, 0x34
4269 .set SP_CSR2, 0x38
4270 .set SP_CSR3, 0x3C
4271 .set NVRAM_CMD_RDSR, 5 /* read status register */
4272 .set NVRAM_CMD_READ, 3 /* read data */
4273 .set NVRAM_SR_RDY, 1 /* RDY bit. This bit is inverted */
4274 .set SPI_8CLOCKS, 0xFF /* Writing this to the TDR doesn't do anything to the
4275 serial output, since SO is normally high. But it
4276 does cause 8 clock cycles and thus 8 bits to be
4277 clocked in to the chip. See Atmel's SPI
4d791aad 4278 controller (e.g. AT91M55800) timing and 4K
1da177e4 4279 SPI EEPROM manuals */
4d791aad 4280
1da177e4
LT
4281 .set NVRAM_SCRATCH, 0x02000100 /* arbitrary area for scratchpad memory */
4282 .set NVRAM_IMAGE, 0x02000200
4283 .set NVRAM_LENGTH, 0x0200
4284 .set MAC_ADDRESS_MIB, SRAM_BASE
4285 .set MAC_ADDRESS_LENGTH, 6
4286 .set MAC_BOOT_FLAG, 0x10
4287 .set MR1, 0
4288 .set MR2, 4
4289 .set MR3, 8
4290 .set MR4, 0xC
4291RESET_VECTOR:
4292 b RESET_HANDLER
4d791aad 4293UNDEF_VECTOR:
1da177e4 4294 b HALT1
4d791aad 4295SWI_VECTOR:
1da177e4 4296 b HALT1
4d791aad 4297IABORT_VECTOR:
1da177e4 4298 b HALT1
4d791aad
CP
4299DABORT_VECTOR:
4300RESERVED_VECTOR:
1da177e4 4301 b HALT1
4d791aad 4302IRQ_VECTOR:
1da177e4 4303 b HALT1
4d791aad 4304FIQ_VECTOR:
1da177e4
LT
4305 b HALT1
4306HALT1: b HALT1
4307RESET_HANDLER:
4308 mov r0, #CPSR_INITIAL
4309 msr CPSR_c, r0 /* This is probably unnecessary */
4d791aad 4310
1da177e4
LT
4311/* I'm guessing this is initializing clock generator electronics for SPI */
4312 ldr r0, =SPI_CGEN_BASE
4313 mov r1, #0
4314 mov r1, r1, lsl #3
4315 orr r1,r1, #0
4316 str r1, [r0]
4317 ldr r1, [r0, #28]
4318 bic r1, r1, #16
4319 str r1, [r0, #28]
4320 mov r1, #1
4321 str r1, [r0, #8]
4d791aad 4322
1da177e4
LT
4323 ldr r0, =MRBASE
4324 mov r1, #0
4325 strh r1, [r0, #MR1]
4326 strh r1, [r0, #MR2]
4327 strh r1, [r0, #MR3]
4328 strh r1, [r0, #MR4]
4329
4330 mov sp, #STACK_BASE
4331 bl SP_INIT
4332 mov r0, #10
4333 bl DELAY9
4334 bl GET_MAC_ADDR
4335 bl GET_WHOLE_NVRAM
4336 ldr r0, =MRBASE
4337 ldr r1, =MAC_ADDRESS_MIB
4338 strh r1, [r0, #MR2]
4339 ldr r1, =NVRAM_IMAGE
4340 strh r1, [r0, #MR4]
4341 mov r1, #MAC_BOOT_FLAG
4342 strh r1, [r0, #MR3]
4343HALT2: b HALT2
4344.func Get_Whole_NVRAM, GET_WHOLE_NVRAM
4345GET_WHOLE_NVRAM:
4346 stmdb sp!, {lr}
4347 mov r2, #0 /* 0th bytes of NVRAM */
4348 mov r3, #NVRAM_LENGTH
4349 mov r1, #0 /* not used in routine */
4350 ldr r0, =NVRAM_IMAGE
4351 bl NVRAM_XFER
4352 ldmia sp!, {lr}
4353 bx lr
4354.endfunc
4d791aad 4355
1da177e4
LT
4356.func Get_MAC_Addr, GET_MAC_ADDR
4357GET_MAC_ADDR:
4358 stmdb sp!, {lr}
4359 mov r2, #0x120 /* address of MAC Address within NVRAM */
4360 mov r3, #MAC_ADDRESS_LENGTH
4361 mov r1, #0 /* not used in routine */
4362 ldr r0, =MAC_ADDRESS_MIB
4363 bl NVRAM_XFER
4364 ldmia sp!, {lr}
4365 bx lr
4366.endfunc
4367.ltorg
4368.func Delay9, DELAY9
4369DELAY9:
4370 adds r0, r0, r0, LSL #3 /* r0 = r0 * 9 */
4d791aad 4371DELAYLOOP:
1da177e4
LT
4372 beq DELAY9_done
4373 subs r0, r0, #1
4374 b DELAYLOOP
4d791aad 4375DELAY9_done:
1da177e4 4376 bx lr
4d791aad 4377.endfunc
1da177e4
LT
4378
4379.func SP_Init, SP_INIT
4380SP_INIT:
4381 mov r1, #SP_SWRST
4382 ldr r0, =SP_BASE
4383 str r1, [r0, #SP_CR] /* reset the SPI */
4384 mov r1, #0
4385 str r1, [r0, #SP_CR] /* release SPI from reset state */
4386 mov r1, #SP_SPIEN
4387 str r1, [r0, #SP_MR] /* set the SPI to MASTER mode*/
4388 str r1, [r0, #SP_CR] /* enable the SPI */
4389
4390/* My guess would be this turns on the SPI clock */
4391 ldr r3, =SPI_CGEN_BASE
4392 ldr r1, [r3, #28]
4393 orr r1, r1, #0x2000
4394 str r1, [r3, #28]
4395
4396 ldr r1, =0x2000c01
4397 str r1, [r0, #SP_CSR0]
4398 ldr r1, =0x2000201
4399 str r1, [r0, #SP_CSR1]
4400 str r1, [r0, #SP_CSR2]
4401 str r1, [r0, #SP_CSR3]
4402 ldr r1, [r0, #SP_SR]
4403 ldr r0, [r0, #SP_RDR]
4404 bx lr
4405.endfunc
4d791aad 4406.func NVRAM_Init, NVRAM_INIT
1da177e4
LT
4407NVRAM_INIT:
4408 ldr r1, =SP_BASE
4409 ldr r0, [r1, #SP_RDR]
4410 mov r0, #NVRAM_CMD_RDSR
4411 str r0, [r1, #SP_TDR]
4d791aad 4412SP_loop1:
1da177e4
LT
4413 ldr r0, [r1, #SP_SR]
4414 tst r0, #SP_TDRE
4415 beq SP_loop1
4416
4417 mov r0, #SPI_8CLOCKS
4d791aad
CP
4418 str r0, [r1, #SP_TDR]
4419SP_loop2:
1da177e4
LT
4420 ldr r0, [r1, #SP_SR]
4421 tst r0, #SP_TDRE
4422 beq SP_loop2
4423
4424 ldr r0, [r1, #SP_RDR]
4d791aad 4425SP_loop3:
1da177e4
LT
4426 ldr r0, [r1, #SP_SR]
4427 tst r0, #SP_RDRF
4428 beq SP_loop3
4429
4430 ldr r0, [r1, #SP_RDR]
4431 and r0, r0, #255
4432 bx lr
4433.endfunc
4d791aad 4434
1da177e4
LT
4435.func NVRAM_Xfer, NVRAM_XFER
4436 /* r0 = dest address */
4437 /* r1 = not used */
4438 /* r2 = src address within NVRAM */
4439 /* r3 = length */
4440NVRAM_XFER:
4441 stmdb sp!, {r4, r5, lr}
4442 mov r5, r0 /* save r0 (dest address) */
4443 mov r4, r3 /* save r3 (length) */
4444 mov r0, r2, LSR #5 /* SPI memories put A8 in the command field */
4445 and r0, r0, #8
4d791aad 4446 add r0, r0, #NVRAM_CMD_READ
1da177e4
LT
4447 ldr r1, =NVRAM_SCRATCH
4448 strb r0, [r1, #0] /* save command in NVRAM_SCRATCH[0] */
4449 strb r2, [r1, #1] /* save low byte of source address in NVRAM_SCRATCH[1] */
4d791aad 4450_local1:
1da177e4
LT
4451 bl NVRAM_INIT
4452 tst r0, #NVRAM_SR_RDY
4453 bne _local1
4454 mov r0, #20
4455 bl DELAY9
4456 mov r2, r4 /* length */
4457 mov r1, r5 /* dest address */
4458 mov r0, #2 /* bytes to transfer in command */
4459 bl NVRAM_XFER2
4460 ldmia sp!, {r4, r5, lr}
4461 bx lr
4462.endfunc
4463
4464.func NVRAM_Xfer2, NVRAM_XFER2
4465NVRAM_XFER2:
4466 stmdb sp!, {r4, r5, r6, lr}
4467 ldr r4, =SP_BASE
4468 mov r3, #0
4469 cmp r0, #0
4470 bls _local2
4471 ldr r5, =NVRAM_SCRATCH
4d791aad 4472_local4:
1da177e4
LT
4473 ldrb r6, [r5, r3]
4474 str r6, [r4, #SP_TDR]
4475_local3:
4476 ldr r6, [r4, #SP_SR]
4477 tst r6, #SP_TDRE
4478 beq _local3
4479 add r3, r3, #1
4480 cmp r3, r0 /* r0 is # of bytes to send out (command+addr) */
4481 blo _local4
4482_local2:
4483 mov r3, #SPI_8CLOCKS
4484 str r3, [r4, #SP_TDR]
4485 ldr r0, [r4, #SP_RDR]
4d791aad 4486_local5:
1da177e4
LT
4487 ldr r0, [r4, #SP_SR]
4488 tst r0, #SP_RDRF
4489 beq _local5
4490 ldr r0, [r4, #SP_RDR] /* what's this byte? It's the byte read while writing the TDR -- nonsense, because the NVRAM doesn't read and write at the same time */
4491 mov r0, #0
4492 cmp r2, #0 /* r2 is # of bytes to copy in */
4493 bls _local6
4d791aad 4494_local7:
1da177e4
LT
4495 ldr r5, [r4, #SP_SR]
4496 tst r5, #SP_TDRE
4497 beq _local7
4498 str r3, [r4, #SP_TDR] /* r3 has SPI_8CLOCKS */
4d791aad 4499_local8:
1da177e4
LT
4500 ldr r5, [r4, #SP_SR]
4501 tst r5, #SP_RDRF
4502 beq _local8
4503 ldr r5, [r4, #SP_RDR] /* but didn't we read this byte above? */
4504 strb r5, [r1], #1 /* postindexed */
4505 add r0, r0, #1
4506 cmp r0, r2
4507 blo _local7 /* since we don't send another address, the NVRAM must be capable of sequential reads */
4508_local6:
4509 mov r0, #200
4510 bl DELAY9
4511 ldmia sp!, {r4, r5, r6, lr}
4512 bx lr
4513#endif
This page took 0.701353 seconds and 5 git commands to generate.