[deliverable/linux.git] / drivers / net / wireless / b43 / phy_common.c

/*

  Broadcom B43 wireless driver
  Common PHY routines

  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
  Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
  Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
  Copyright (c) 2005, 2006 Danny van Dyk <kugelfang@gentoo.org>
  Copyright (c) 2005, 2006 Andreas Jaggi <andreas.jaggi@waterwave.ch>

  This program is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
  the Free Software Foundation; either version 2 of the License, or
  (at your option) any later version.

  This program is distributed in the hope that it will be useful,
  but WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  GNU General Public License for more details.

  You should have received a copy of the GNU General Public License
  along with this program; see the file COPYING.  If not, write to
  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  Boston, MA 02110-1301, USA.

*/

#include "phy_common.h"
#include "phy_g.h"
#include "phy_a.h"
#include "phy_n.h"
#include "b43.h"
#include "main.h"


int b43_phy_operations_setup(struct b43_wldev *dev)
{
	struct b43_phy *phy = &(dev->phy);
	int err;

	phy->ops = NULL;

	switch (phy->type) {
	case B43_PHYTYPE_A:
		phy->ops = &b43_phyops_a;
		break;
	case B43_PHYTYPE_G:
		phy->ops = &b43_phyops_g;
		break;
	case B43_PHYTYPE_N:
#ifdef CONFIG_B43_NPHY
		phy->ops = &b43_phyops_n;
#endif
		break;
	case B43_PHYTYPE_LP:
		/* FIXME: Not yet */
		break;
	}
	if (B43_WARN_ON(!phy->ops))
		return -ENODEV;

	err = phy->ops->allocate(dev);
	if (err)
		phy->ops = NULL;

	return err;
}

int b43_phy_init(struct b43_wldev *dev)
{
	struct b43_phy *phy = &dev->phy;
	const struct b43_phy_operations *ops = phy->ops;
	int err;

	phy->channel = ops->get_default_chan(dev);

	ops->software_rfkill(dev, RFKILL_STATE_UNBLOCKED);
	err = ops->init(dev);
	if (err) {
		b43err(dev->wl, "PHY init failed\n");
		goto err_block_rf;
	}
	/* Make sure to switch hardware and firmware (SHM) to
	 * the default channel. */
	err = b43_switch_channel(dev, ops->get_default_chan(dev));
	if (err) {
		b43err(dev->wl, "PHY init: Channel switch to default failed\n");
		goto err_phy_exit;
	}

	return 0;

err_phy_exit:
	if (ops->exit)
		ops->exit(dev);
err_block_rf:
	ops->software_rfkill(dev, RFKILL_STATE_SOFT_BLOCKED);

	return err;
}

void b43_phy_exit(struct b43_wldev *dev)
{
	const struct b43_phy_operations *ops = dev->phy.ops;

	ops->software_rfkill(dev, RFKILL_STATE_SOFT_BLOCKED);
	if (ops->exit)
		ops->exit(dev);
}

bool b43_has_hardware_pctl(struct b43_wldev *dev)
{
	if (!dev->phy.hardware_power_control)
		return 0;
	if (!dev->phy.ops->supports_hwpctl)
		return 0;
	return dev->phy.ops->supports_hwpctl(dev);
}

void b43_radio_lock(struct b43_wldev *dev)
{
	u32 macctl;

	macctl = b43_read32(dev, B43_MMIO_MACCTL);
	B43_WARN_ON(macctl & B43_MACCTL_RADIOLOCK);
	macctl |= B43_MACCTL_RADIOLOCK;
	b43_write32(dev, B43_MMIO_MACCTL, macctl);
	/* Commit the write and wait for the device
	 * to exit any radio register access. */
	b43_read32(dev, B43_MMIO_MACCTL);
	udelay(10);
}

void b43_radio_unlock(struct b43_wldev *dev)
{
	u32 macctl;

	/* Commit any write */
	b43_read16(dev, B43_MMIO_PHY_VER);
	/* unlock */
	macctl = b43_read32(dev, B43_MMIO_MACCTL);
	B43_WARN_ON(!(macctl & B43_MACCTL_RADIOLOCK));
	macctl &= ~B43_MACCTL_RADIOLOCK;
	b43_write32(dev, B43_MMIO_MACCTL, macctl);
}

void b43_phy_lock(struct b43_wldev *dev)
{
#if B43_DEBUG
	B43_WARN_ON(dev->phy.phy_locked);
	dev->phy.phy_locked = 1;
#endif
	B43_WARN_ON(dev->dev->id.revision < 3);

	if (!b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
		b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
}

void b43_phy_unlock(struct b43_wldev *dev)
{
#if B43_DEBUG
	B43_WARN_ON(!dev->phy.phy_locked);
	dev->phy.phy_locked = 0;
#endif
	B43_WARN_ON(dev->dev->id.revision < 3);

	if (!b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
		b43_power_saving_ctl_bits(dev, 0);
}

u16 b43_radio_read(struct b43_wldev *dev, u16 reg)
{
	return dev->phy.ops->radio_read(dev, reg);
}

void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
{
	dev->phy.ops->radio_write(dev, reg, value);
}

void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask)
{
	b43_radio_write16(dev, offset,
			  b43_radio_read16(dev, offset) & mask);
}

void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set)
{
	b43_radio_write16(dev, offset,
			  b43_radio_read16(dev, offset) | set);
}

void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set)
{
	b43_radio_write16(dev, offset,
			  (b43_radio_read16(dev, offset) & mask) | set);
}

u16 b43_phy_read(struct b43_wldev *dev, u16 reg)
{
	return dev->phy.ops->phy_read(dev, reg);
}

void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value)
{
	dev->phy.ops->phy_write(dev, reg, value);
}

void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask)
{
	b43_phy_write(dev, offset,
		      b43_phy_read(dev, offset) & mask);
}

void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set)
{
	b43_phy_write(dev, offset,
		      b43_phy_read(dev, offset) | set);
}

void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set)
{
	b43_phy_write(dev, offset,
		      (b43_phy_read(dev, offset) & mask) | set);
}

int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel)
{
	struct b43_phy *phy = &(dev->phy);
	u16 channelcookie, savedcookie;
	int err;

	if (new_channel == B43_DEFAULT_CHANNEL)
		new_channel = phy->ops->get_default_chan(dev);

	/* First we set the channel radio code to prevent the
	 * firmware from sending ghost packets.
	 */
	channelcookie = new_channel;
	if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
		channelcookie |= 0x100;
	//FIXME set 40Mhz flag if required
	savedcookie = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN);
	b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN, channelcookie);

	/* Now try to switch the PHY hardware channel. */
	err = phy->ops->switch_channel(dev, new_channel);
	if (err)
		goto err_restore_cookie;

	dev->phy.channel = new_channel;
	/* Wait for the radio to tune to the channel and stabilize. */
	msleep(8);

	return 0;

err_restore_cookie:
	b43_shm_write16(dev, B43_SHM_SHARED,
			B43_SHM_SH_CHAN, savedcookie);

	return err;
}

void b43_software_rfkill(struct b43_wldev *dev, enum rfkill_state state)
{
	struct b43_phy *phy = &dev->phy;

	if (state == RFKILL_STATE_HARD_BLOCKED) {
		/* We cannot hardware-block the device */
		state = RFKILL_STATE_SOFT_BLOCKED;
	}

	phy->ops->software_rfkill(dev, state);
	phy->radio_on = (state == RFKILL_STATE_UNBLOCKED);
}

/**
 * b43_phy_txpower_adjust_work - TX power workqueue.
 *
 * Workqueue for updating the TX power parameters in hardware.
 */
void b43_phy_txpower_adjust_work(struct work_struct *work)
{
	struct b43_wl *wl = container_of(work, struct b43_wl,
					 txpower_adjust_work);
	struct b43_wldev *dev;

	mutex_lock(&wl->mutex);
	dev = wl->current_dev;

	if (likely(dev && (b43_status(dev) >= B43_STAT_STARTED)))
		dev->phy.ops->adjust_txpower(dev);

	mutex_unlock(&wl->mutex);
}

/* Called with wl->irq_lock locked */
void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags)
{
	struct b43_phy *phy = &dev->phy;
	unsigned long now = jiffies;
	enum b43_txpwr_result result;

	if (!(flags & B43_TXPWR_IGNORE_TIME)) {
		/* Check if it's time for a TXpower check. */
		if (time_before(now, phy->next_txpwr_check_time))
			return; /* Not yet */
	}
	/* The next check will be needed in two seconds, or later. */
	phy->next_txpwr_check_time = round_jiffies(now + (HZ * 2));

	if ((dev->dev->bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) &&
	    (dev->dev->bus->boardinfo.type == SSB_BOARD_BU4306))
		return; /* No software txpower adjustment needed */

	result = phy->ops->recalc_txpower(dev, !!(flags & B43_TXPWR_IGNORE_TSSI));
	if (result == B43_TXPWR_RES_DONE)
		return; /* We are done. */
	B43_WARN_ON(result != B43_TXPWR_RES_NEED_ADJUST);
	B43_WARN_ON(phy->ops->adjust_txpower == NULL);

	/* We must adjust the transmission power in hardware.
	 * Schedule b43_phy_txpower_adjust_work(). */
	queue_work(dev->wl->hw->workqueue, &dev->wl->txpower_adjust_work);
}

int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset)
{
	const bool is_ofdm = (shm_offset != B43_SHM_SH_TSSI_CCK);
	unsigned int a, b, c, d;
	unsigned int average;
	u32 tmp;

	tmp = b43_shm_read32(dev, B43_SHM_SHARED, shm_offset);
	a = tmp & 0xFF;
	b = (tmp >> 8) & 0xFF;
	c = (tmp >> 16) & 0xFF;
	d = (tmp >> 24) & 0xFF;
	if (a == 0 || a == B43_TSSI_MAX ||
	    b == 0 || b == B43_TSSI_MAX ||
	    c == 0 || c == B43_TSSI_MAX ||
	    d == 0 || d == B43_TSSI_MAX)
		return -ENOENT;
	/* The values are OK. Clear them. */
	tmp = B43_TSSI_MAX | (B43_TSSI_MAX << 8) |
	      (B43_TSSI_MAX << 16) | (B43_TSSI_MAX << 24);
	b43_shm_write32(dev, B43_SHM_SHARED, shm_offset, tmp);

	if (is_ofdm) {
		a = (a + 32) & 0x3F;
		b = (b + 32) & 0x3F;
		c = (c + 32) & 0x3F;
		d = (d + 32) & 0x3F;
	}

	/* Get the average of the values with 0.5 added to each value. */
	average = (a + b + c + d + 2) / 4;
	if (is_ofdm) {
		/* Adjust for CCK-boost */
		if (b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFLO)
		    & B43_HF_CCKBOOST)
			average = (average >= 13) ? (average - 13) : 0;
	}

	return average;
}
Commit	Line	Data
ef1a628d MB	1	/*
	2
	3	Broadcom B43 wireless driver
	4	Common PHY routines
	5
	6	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
	7	Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
	8	Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
	9	Copyright (c) 2005, 2006 Danny van Dyk <kugelfang@gentoo.org>
	10	Copyright (c) 2005, 2006 Andreas Jaggi <andreas.jaggi@waterwave.ch>
	11
	12	This program is free software; you can redistribute it and/or modify
	13	it under the terms of the GNU General Public License as published by
	14	the Free Software Foundation; either version 2 of the License, or
	15	(at your option) any later version.
	16
	17	This program is distributed in the hope that it will be useful,
	18	but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	GNU General Public License for more details.
	21
	22	You should have received a copy of the GNU General Public License
	23	along with this program; see the file COPYING. If not, write to
	24	the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
	25	Boston, MA 02110-1301, USA.
	26
	27	*/
	28
	29	#include "phy_common.h"
	30	#include "phy_g.h"
	31	#include "phy_a.h"
3d0da751	32	#include "phy_n.h"
ef1a628d MB	33	#include "b43.h"
	34	#include "main.h"
	35
	36
	37	int b43_phy_operations_setup(struct b43_wldev *dev)
	38	{
	39	struct b43_phy *phy = &(dev->phy);
	40	int err;
	41
	42	phy->ops = NULL;
	43
	44	switch (phy->type) {
	45	case B43_PHYTYPE_A:
	46	phy->ops = &b43_phyops_a;
	47	break;
	48	case B43_PHYTYPE_G:
	49	phy->ops = &b43_phyops_g;
	50	break;
	51	case B43_PHYTYPE_N:
	52	#ifdef CONFIG_B43_NPHY
	53	phy->ops = &b43_phyops_n;
	54	#endif
	55	break;
	56	case B43_PHYTYPE_LP:
	57	/* FIXME: Not yet */
	58	break;
	59	}
	60	if (B43_WARN_ON(!phy->ops))
	61	return -ENODEV;
	62
	63	err = phy->ops->allocate(dev);
	64	if (err)
	65	phy->ops = NULL;
	66
	67	return err;
	68	}
	69
	70	int b43_phy_init(struct b43_wldev *dev)
	71	{
	72	struct b43_phy *phy = &dev->phy;
	73	const struct b43_phy_operations *ops = phy->ops;
	74	int err;
	75
	76	phy->channel = ops->get_default_chan(dev);
	77
	78	ops->software_rfkill(dev, RFKILL_STATE_UNBLOCKED);
	79	err = ops->init(dev);
	80	if (err) {
	81	b43err(dev->wl, "PHY init failed\n");
	82	goto err_block_rf;
	83	}
	84	/* Make sure to switch hardware and firmware (SHM) to
	85	* the default channel. */
	86	err = b43_switch_channel(dev, ops->get_default_chan(dev));
	87	if (err) {
	88	b43err(dev->wl, "PHY init: Channel switch to default failed\n");
	89	goto err_phy_exit;
	90	}
	91
	92	return 0;
	93
	94	err_phy_exit:
	95	if (ops->exit)
	96	ops->exit(dev);
97	err_block_rf:
98	ops->software_rfkill(dev, RFKILL_STATE_SOFT_BLOCKED);
99
100	return err;
101	}
102
103	void b43_phy_exit(struct b43_wldev *dev)
104	{
105	const struct b43_phy_operations *ops = dev->phy.ops;
106
107	ops->software_rfkill(dev, RFKILL_STATE_SOFT_BLOCKED);
108	if (ops->exit)
109	ops->exit(dev);
110	}
111
112	bool b43_has_hardware_pctl(struct b43_wldev *dev)
113	{
114	if (!dev->phy.hardware_power_control)
115	return 0;
116	if (!dev->phy.ops->supports_hwpctl)
117	return 0;
118	return dev->phy.ops->supports_hwpctl(dev);
119	}
120
121	void b43_radio_lock(struct b43_wldev *dev)
122	{
123	u32 macctl;
124
125	macctl = b43_read32(dev, B43_MMIO_MACCTL);
126	B43_WARN_ON(macctl & B43_MACCTL_RADIOLOCK);
127	macctl \|= B43_MACCTL_RADIOLOCK;
128	b43_write32(dev, B43_MMIO_MACCTL, macctl);
129	/* Commit the write and wait for the device
130	* to exit any radio register access. */
131	b43_read32(dev, B43_MMIO_MACCTL);
132	udelay(10);
133	}
134
135	void b43_radio_unlock(struct b43_wldev *dev)
136	{
137	u32 macctl;
138
139	/* Commit any write */
140	b43_read16(dev, B43_MMIO_PHY_VER);
141	/* unlock */
142	macctl = b43_read32(dev, B43_MMIO_MACCTL);
143	B43_WARN_ON(!(macctl & B43_MACCTL_RADIOLOCK));
144	macctl &= ~B43_MACCTL_RADIOLOCK;
145	b43_write32(dev, B43_MMIO_MACCTL, macctl);
146	}
147
148	void b43_phy_lock(struct b43_wldev *dev)
149	{
150	#if B43_DEBUG
151	B43_WARN_ON(dev->phy.phy_locked);
152	dev->phy.phy_locked = 1;
153	#endif
154	B43_WARN_ON(dev->dev->id.revision < 3);
155
156	if (!b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
157	b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
158	}
159
160	void b43_phy_unlock(struct b43_wldev *dev)
161	{
162	#if B43_DEBUG
163	B43_WARN_ON(!dev->phy.phy_locked);
164	dev->phy.phy_locked = 0;
165	#endif
166	B43_WARN_ON(dev->dev->id.revision < 3);
167
168	if (!b43_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
169	b43_power_saving_ctl_bits(dev, 0);
170	}
171
172	u16 b43_radio_read(struct b43_wldev *dev, u16 reg)
173	{
174	return dev->phy.ops->radio_read(dev, reg);
175	}
176
177	void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
178	{
179	dev->phy.ops->radio_write(dev, reg, value);
180	}
181
182	void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask)
183	{
184	b43_radio_write16(dev, offset,
185	b43_radio_read16(dev, offset) & mask);
186	}
187
188	void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set)
189	{
190	b43_radio_write16(dev, offset,
191	b43_radio_read16(dev, offset) \| set);
192	}
193
194	void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set)
195	{
196	b43_radio_write16(dev, offset,
197	(b43_radio_read16(dev, offset) & mask) \| set);
198	}
199
200	u16 b43_phy_read(struct b43_wldev *dev, u16 reg)
201	{
202	return dev->phy.ops->phy_read(dev, reg);
203	}
204
205	void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value)
206	{
207	dev->phy.ops->phy_write(dev, reg, value);
208	}
209
210	void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask)
211	{
212	b43_phy_write(dev, offset,
213	b43_phy_read(dev, offset) & mask);
214	}
215
216	void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set)
217	{
218	b43_phy_write(dev, offset,
219	b43_phy_read(dev, offset) \| set);
220	}
221
222	void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set)
223	{
224	b43_phy_write(dev, offset,
225	(b43_phy_read(dev, offset) & mask) \| set);
226	}
227
228	int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel)
229	{
230	struct b43_phy *phy = &(dev->phy);
231	u16 channelcookie, savedcookie;
232	int err;
233
234	if (new_channel == B43_DEFAULT_CHANNEL)
235	new_channel = phy->ops->get_default_chan(dev);
236
237	/* First we set the channel radio code to prevent the
238	* firmware from sending ghost packets.
239	*/
240	channelcookie = new_channel;
241	if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
242	channelcookie \|= 0x100;
243	//FIXME set 40Mhz flag if required
244	savedcookie = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN);
245	b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN, channelcookie);
246
247	/* Now try to switch the PHY hardware channel. */
248	err = phy->ops->switch_channel(dev, new_channel);
249	if (err)
250	goto err_restore_cookie;
251
252	dev->phy.channel = new_channel;
253	/* Wait for the radio to tune to the channel and stabilize. */
254	msleep(8);
255
256	return 0;
257
258	err_restore_cookie:
259	b43_shm_write16(dev, B43_SHM_SHARED,
260	B43_SHM_SH_CHAN, savedcookie);
261
262	return err;
263	}
264
265	void b43_software_rfkill(struct b43_wldev *dev, enum rfkill_state state)
266	{
267	struct b43_phy *phy = &dev->phy;
268
269	if (state == RFKILL_STATE_HARD_BLOCKED) {
270	/* We cannot hardware-block the device */
271	state = RFKILL_STATE_SOFT_BLOCKED;
272	}
273
274	phy->ops->software_rfkill(dev, state);
275	phy->radio_on = (state == RFKILL_STATE_UNBLOCKED);
276	}
18c8adeb MB	277
	278	/**
	279	* b43_phy_txpower_adjust_work - TX power workqueue.
	280	*
	281	* Workqueue for updating the TX power parameters in hardware.
	282	*/
	283	void b43_phy_txpower_adjust_work(struct work_struct *work)
	284	{
	285	struct b43_wl *wl = container_of(work, struct b43_wl,
	286	txpower_adjust_work);
	287	struct b43_wldev *dev;
	288
	289	mutex_lock(&wl->mutex);
	290	dev = wl->current_dev;
	291
	292	if (likely(dev && (b43_status(dev) >= B43_STAT_STARTED)))
	293	dev->phy.ops->adjust_txpower(dev);
	294
	295	mutex_unlock(&wl->mutex);
	296	}
	297
	298	/* Called with wl->irq_lock locked */
	299	void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags)
	300	{
	301	struct b43_phy *phy = &dev->phy;
	302	unsigned long now = jiffies;
	303	enum b43_txpwr_result result;
	304
	305	if (!(flags & B43_TXPWR_IGNORE_TIME)) {
	306	/* Check if it's time for a TXpower check. */
	307	if (time_before(now, phy->next_txpwr_check_time))
	308	return; /* Not yet */
	309	}
	310	/* The next check will be needed in two seconds, or later. */
	311	phy->next_txpwr_check_time = round_jiffies(now + (HZ * 2));
	312
	313	if ((dev->dev->bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) &&
	314	(dev->dev->bus->boardinfo.type == SSB_BOARD_BU4306))
	315	return; /* No software txpower adjustment needed */
	316
	317	result = phy->ops->recalc_txpower(dev, !!(flags & B43_TXPWR_IGNORE_TSSI));
	318	if (result == B43_TXPWR_RES_DONE)
	319	return; /* We are done. */
	320	B43_WARN_ON(result != B43_TXPWR_RES_NEED_ADJUST);
	321	B43_WARN_ON(phy->ops->adjust_txpower == NULL);
	322
	323	/* We must adjust the transmission power in hardware.
	324	* Schedule b43_phy_txpower_adjust_work(). */
	325	queue_work(dev->wl->hw->workqueue, &dev->wl->txpower_adjust_work);
	326	}
	327
	328	int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset)
	329	{
	330	const bool is_ofdm = (shm_offset != B43_SHM_SH_TSSI_CCK);
	331	unsigned int a, b, c, d;
	332	unsigned int average;
	333	u32 tmp;
	334
	335	tmp = b43_shm_read32(dev, B43_SHM_SHARED, shm_offset);
	336	a = tmp & 0xFF;
	337	b = (tmp >> 8) & 0xFF;
	338	c = (tmp >> 16) & 0xFF;
	339	d = (tmp >> 24) & 0xFF;
	340	if (a == 0 \|\| a == B43_TSSI_MAX \|\|
341	b == 0 \|\| b == B43_TSSI_MAX \|\|
342	c == 0 \|\| c == B43_TSSI_MAX \|\|
343	d == 0 \|\| d == B43_TSSI_MAX)
344	return -ENOENT;
345	/* The values are OK. Clear them. */
346	tmp = B43_TSSI_MAX \| (B43_TSSI_MAX << 8) \|
347	(B43_TSSI_MAX << 16) \| (B43_TSSI_MAX << 24);
348	b43_shm_write32(dev, B43_SHM_SHARED, shm_offset, tmp);
349
350	if (is_ofdm) {
351	a = (a + 32) & 0x3F;
352	b = (b + 32) & 0x3F;
353	c = (c + 32) & 0x3F;
354	d = (d + 32) & 0x3F;
355	}
356
357	/* Get the average of the values with 0.5 added to each value. */
358	average = (a + b + c + d + 2) / 4;
359	if (is_ofdm) {
360	/* Adjust for CCK-boost */
361	if (b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFLO)
362	& B43_HF_CCKBOOST)
363	average = (average >= 13) ? (average - 13) : 0;
364	}
365
366	return average;
367	}