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b43: Implement dynamic PHY API
[deliverable/linux.git] / drivers / net / wireless / b43 / phy_common.h
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ef1a628d
MB		 1#ifndef LINUX_B43_PHY_COMMON_H_
2#define LINUX_B43_PHY_COMMON_H_
3
4#include <linux/rfkill.h>
5
6struct b43_wldev;
7
8
9/* PHY register routing bits */
10#define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */
11#define B43_PHYROUTE_BASE 0x0000 /* Base registers */
12#define B43_PHYROUTE_OFDM_GPHY 0x0400 /* OFDM register routing for G-PHYs */
13#define B43_PHYROUTE_EXT_GPHY 0x0800 /* Extended G-PHY registers */
14#define B43_PHYROUTE_N_BMODE 0x0C00 /* N-PHY BMODE registers */
15
16/* CCK (B-PHY) registers. */
17#define B43_PHY_CCK(reg) ((reg) | B43_PHYROUTE_BASE)
18/* N-PHY registers. */
19#define B43_PHY_N(reg) ((reg) | B43_PHYROUTE_BASE)
20/* N-PHY BMODE registers. */
21#define B43_PHY_N_BMODE(reg) ((reg) | B43_PHYROUTE_N_BMODE)
22/* OFDM (A-PHY) registers. */
23#define B43_PHY_OFDM(reg) ((reg) | B43_PHYROUTE_OFDM_GPHY)
24/* Extended G-PHY registers. */
25#define B43_PHY_EXTG(reg) ((reg) | B43_PHYROUTE_EXT_GPHY)
26
27
28/* Masks for the PHY versioning registers. */
29#define B43_PHYVER_ANALOG 0xF000
30#define B43_PHYVER_ANALOG_SHIFT 12
31#define B43_PHYVER_TYPE 0x0F00
32#define B43_PHYVER_TYPE_SHIFT 8
33#define B43_PHYVER_VERSION 0x00FF
34
35/**
36 * enum b43_interference_mitigation - Interference Mitigation mode
37 *
38 * @B43_INTERFMODE_NONE: Disabled
39 * @B43_INTERFMODE_NONWLAN: Non-WLAN Interference Mitigation
40 * @B43_INTERFMODE_MANUALWLAN: WLAN Interference Mitigation
41 * @B43_INTERFMODE_AUTOWLAN: Automatic WLAN Interference Mitigation
42 */
43enum b43_interference_mitigation {
44 B43_INTERFMODE_NONE,
45 B43_INTERFMODE_NONWLAN,
46 B43_INTERFMODE_MANUALWLAN,
47 B43_INTERFMODE_AUTOWLAN,
48};
49
50/* Antenna identifiers */
51enum {
52 B43_ANTENNA0, /* Antenna 0 */
53 B43_ANTENNA1, /* Antenna 0 */
54 B43_ANTENNA_AUTO1, /* Automatic, starting with antenna 1 */
55 B43_ANTENNA_AUTO0, /* Automatic, starting with antenna 0 */
56 B43_ANTENNA2,
57 B43_ANTENNA3 = 8,
58
59 B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
60 B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
61};
62
63/**
64 * struct b43_phy_operations - Function pointers for PHY ops.
65 *
66 * @prepare: Prepare the PHY. This is called before @init.
67 * Can be NULL, if not required.
68 * @init: Initialize the PHY.
69 * Must not be NULL.
70 * @exit: Shutdown the PHY and free all data structures.
71 * Can be NULL, if not required.
72 *
73 * @phy_read: Read from a PHY register.
74 * Must not be NULL.
75 * @phy_write: Write to a PHY register.
76 * Must not be NULL.
77 * @radio_read: Read from a Radio register.
78 * Must not be NULL.
79 * @radio_write: Write to a Radio register.
80 * Must not be NULL.
81 *
82 * @supports_hwpctl: Returns a boolean whether Hardware Power Control
83 * is supported or not.
84 * If NULL, hwpctl is assumed to be never supported.
85 * @software_rfkill: Turn the radio ON or OFF.
86 * Possible state values are
87 * RFKILL_STATE_SOFT_BLOCKED or
88 * RFKILL_STATE_UNBLOCKED
89 * Must not be NULL.
90 * @switch_channel: Switch the radio to another channel.
91 * Must not be NULL.
92 * @get_default_chan: Just returns the default channel number.
93 * Must not be NULL.
94 * @set_rx_antenna: Set the antenna used for RX.
95 * Can be NULL, if not supported.
96 * @interf_mitigation: Switch the Interference Mitigation mode.
97 * Can be NULL, if not supported.
98 *
99 * @xmitpower: FIXME REMOVEME
100 * Must not be NULL.
101 *
102 * @pwork_15sec: Periodic work. Called every 15 seconds.
103 * Can be NULL, if not required.
104 * @pwork_60sec: Periodic work. Called every 60 seconds.
105 * Can be NULL, if not required.
106 */
107struct b43_phy_operations {
108 /* Initialisation */
109 int (*allocate)(struct b43_wldev *dev);
110 int (*prepare)(struct b43_wldev *dev);
111 int (*init)(struct b43_wldev *dev);
112 void (*exit)(struct b43_wldev *dev);
113
114 /* Register access */
115 u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
116 void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
117 u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
118 void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
119
120 /* Radio */
121 bool (*supports_hwpctl)(struct b43_wldev *dev);
122 void (*software_rfkill)(struct b43_wldev *dev, enum rfkill_state state);
123 int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
124 unsigned int (*get_default_chan)(struct b43_wldev *dev);
125 void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
126 int (*interf_mitigation)(struct b43_wldev *dev,
127 enum b43_interference_mitigation new_mode);
128
129 /* Transmission power adjustment */
130 void (*xmitpower)(struct b43_wldev *dev);
131
132 /* Misc */
133 void (*pwork_15sec)(struct b43_wldev *dev);
134 void (*pwork_60sec)(struct b43_wldev *dev);
135};
136
137struct b43_phy_a;
138struct b43_phy_g;
139struct b43_phy_n;
140
141struct b43_phy {
142 /* Hardware operation callbacks. */
143 const struct b43_phy_operations *ops;
144
145 /* Most hardware context information is stored in the standard-
146 * specific data structures pointed to by the pointers below.
147 * Only one of them is valid (the currently enabled PHY). */
148#ifdef CONFIG_B43_DEBUG
149 /* No union for debug build to force NULL derefs in buggy code. */
150 struct {
151#else
152 union {
153#endif
154 /* A-PHY specific information */
155 struct b43_phy_a *a;
156 /* G-PHY specific information */
157 struct b43_phy_g *g;
158 /* N-PHY specific information */
159 struct b43_phy_n *n;
160 };
161
162 /* Band support flags. */
163 bool supports_2ghz;
164 bool supports_5ghz;
165
166 /* GMODE bit enabled? */
167 bool gmode;
168
169 /* Analog Type */
170 u8 analog;
171 /* B43_PHYTYPE_ */
172 u8 type;
173 /* PHY revision number. */
174 u8 rev;
175
176 /* Radio versioning */
177 u16 radio_manuf; /* Radio manufacturer */
178 u16 radio_ver; /* Radio version */
179 u8 radio_rev; /* Radio revision */
180
181 /* Software state of the radio */
182 bool radio_on;
183
184 /* Desired TX power level (in dBm).
185 * This is set by the user and adjusted in b43_phy_xmitpower(). */
186 u8 power_level;
187
188 /* Hardware Power Control enabled? */
189 bool hardware_power_control;
190
191 /* current channel */
192 unsigned int channel;
193
194 /* PHY TX errors counter. */
195 atomic_t txerr_cnt;
196
197#ifdef CONFIG_B43_DEBUG
198 /* PHY registers locked by b43_phy_lock()? */
199 bool phy_locked;
200#endif /* B43_DEBUG */
201};
202
203
204/**
205 * b43_phy_operations_setup - Initialize the PHY operations datastructure
206 * based on the current PHY type.
207 */
208int b43_phy_operations_setup(struct b43_wldev *dev);
209
210/**
211 * b43_phy_init - Initialise the PHY
212 */
213int b43_phy_init(struct b43_wldev *dev);
214
215/**
216 * b43_phy_exit - Cleanup PHY
217 */
218void b43_phy_exit(struct b43_wldev *dev);
219
220/**
221 * b43_has_hardware_pctl - Hardware Power Control supported?
222 * Returns a boolean, whether hardware power control is supported.
223 */
224bool b43_has_hardware_pctl(struct b43_wldev *dev);
225
226/**
227 * b43_phy_read - 16bit PHY register read access
228 */
229u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
230
231/**
232 * b43_phy_write - 16bit PHY register write access
233 */
234void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
235
236/**
237 * b43_phy_mask - Mask a PHY register with a mask
238 */
239void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
240
241/**
242 * b43_phy_set - OR a PHY register with a bitmap
243 */
244void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
245
246/**
247 * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
248 */
249void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
250
251/**
252 * b43_radio_read - 16bit Radio register read access
253 */
254u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
255#define b43_radio_read16 b43_radio_read /* DEPRECATED */
256
257/**
258 * b43_radio_write - 16bit Radio register write access
259 */
260void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
261#define b43_radio_write16 b43_radio_write /* DEPRECATED */
262
263/**
264 * b43_radio_mask - Mask a 16bit radio register with a mask
265 */
266void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
267
268/**
269 * b43_radio_set - OR a 16bit radio register with a bitmap
270 */
271void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
272
273/**
274 * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
275 */
276void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
277
278/**
279 * b43_radio_lock - Lock firmware radio register access
280 */
281void b43_radio_lock(struct b43_wldev *dev);
282
283/**
284 * b43_radio_unlock - Unlock firmware radio register access
285 */
286void b43_radio_unlock(struct b43_wldev *dev);
287
288/**
289 * b43_phy_lock - Lock firmware PHY register access
290 */
291void b43_phy_lock(struct b43_wldev *dev);
292
293/**
294 * b43_phy_unlock - Unlock firmware PHY register access
295 */
296void b43_phy_unlock(struct b43_wldev *dev);
297
298/**
299 * b43_switch_channel - Switch to another channel
300 */
301int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
302/**
303 * B43_DEFAULT_CHANNEL - Switch to the default channel.
304 */
305#define B43_DEFAULT_CHANNEL UINT_MAX
306
307/**
308 * b43_software_rfkill - Turn the radio ON or OFF in software.
309 */
310void b43_software_rfkill(struct b43_wldev *dev, enum rfkill_state state);
311
312#endif /* LINUX_B43_PHY_COMMON_H_ */
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