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b43: use enum for firmware header format
[deliverable/linux.git] / drivers / net / wireless / b43 / xmit.c
CommitLineData
e4d6b795
MB		 1/*
2
3 Broadcom B43 wireless driver
4
5 Transmission (TX/RX) related functions.
6
7 Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
1f21ad2a 8 Copyright (C) 2005 Stefano Brivio <stefano.brivio@polimi.it>
eb032b98 9 Copyright (C) 2005, 2006 Michael Buesch <m@bues.ch>
e4d6b795
MB		 10 Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
11 Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
12
13 This program is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 2 of the License, or
16 (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; see the file COPYING. If not, write to
25 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
26 Boston, MA 02110-1301, USA.
27
28*/
29
88499ab3 30#include "xmit.h"
ef1a628d 31#include "phy_common.h"
e4d6b795 32#include "dma.h"
5100d5ac 33#include "pio.h"
03b29773 34
3311abbb
RM		 35static const struct b43_tx_legacy_rate_phy_ctl_entry b43_tx_legacy_rate_phy_ctl[] = {
36 { B43_CCK_RATE_1MB, 0x0, 0x0 },
37 { B43_CCK_RATE_2MB, 0x0, 0x1 },
38 { B43_CCK_RATE_5MB, 0x0, 0x2 },
39 { B43_CCK_RATE_11MB, 0x0, 0x3 },
40 { B43_OFDM_RATE_6MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_BPSK },
41 { B43_OFDM_RATE_9MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_BPSK },
42 { B43_OFDM_RATE_12MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QPSK },
43 { B43_OFDM_RATE_18MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QPSK },
44 { B43_OFDM_RATE_24MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QAM16 },
45 { B43_OFDM_RATE_36MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM16 },
46 { B43_OFDM_RATE_48MB, B43_TXH_PHY1_CRATE_2_3, B43_TXH_PHY1_MODUL_QAM64 },
47 { B43_OFDM_RATE_54MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM64 },
48};
49
50static const struct b43_tx_legacy_rate_phy_ctl_entry *
51b43_tx_legacy_rate_phy_ctl_ent(u8 bitrate)
52{
53 const struct b43_tx_legacy_rate_phy_ctl_entry *e;
54 unsigned int i;
55
56 for (i = 0; i < ARRAY_SIZE(b43_tx_legacy_rate_phy_ctl); i++) {
57 e = &(b43_tx_legacy_rate_phy_ctl[i]);
58 if (e->bitrate == bitrate)
59 return e;
60 }
61
62 B43_WARN_ON(1);
63 return NULL;
64}
e4d6b795 65
8318d78a
JB		 66/* Extract the bitrate index out of a CCK PLCP header. */
67static int b43_plcp_get_bitrate_idx_cck(struct b43_plcp_hdr6 *plcp)
e4d6b795
MB		 68{
69 switch (plcp->raw[0]) {
70 case 0x0A:
8318d78a 71 return 0;
e4d6b795 72 case 0x14:
8318d78a 73 return 1;
e4d6b795 74 case 0x37:
8318d78a 75 return 2;
e4d6b795 76 case 0x6E:
8318d78a 77 return 3;
e4d6b795 78 }
8318d78a 79 return -1;
e4d6b795
MB		 80}
81
8318d78a 82/* Extract the bitrate index out of an OFDM PLCP header. */
a3c0b87c 83static int b43_plcp_get_bitrate_idx_ofdm(struct b43_plcp_hdr6 *plcp, bool aphy)
e4d6b795 84{
8318d78a
JB		 85 int base = aphy ? 0 : 4;
86
e4d6b795
MB		 87 switch (plcp->raw[0] & 0xF) {
88 case 0xB:
8318d78a 89 return base + 0;
e4d6b795 90 case 0xF:
8318d78a 91 return base + 1;
e4d6b795 92 case 0xA:
8318d78a 93 return base + 2;
e4d6b795 94 case 0xE:
8318d78a 95 return base + 3;
e4d6b795 96 case 0x9:
8318d78a 97 return base + 4;
e4d6b795 98 case 0xD:
8318d78a 99 return base + 5;
e4d6b795 100 case 0x8:
8318d78a 101 return base + 6;
e4d6b795 102 case 0xC:
8318d78a 103 return base + 7;
e4d6b795 104 }
8318d78a 105 return -1;
e4d6b795
MB		 106}
107
108u8 b43_plcp_get_ratecode_cck(const u8 bitrate)
109{
110 switch (bitrate) {
111 case B43_CCK_RATE_1MB:
112 return 0x0A;
113 case B43_CCK_RATE_2MB:
114 return 0x14;
115 case B43_CCK_RATE_5MB:
116 return 0x37;
117 case B43_CCK_RATE_11MB:
118 return 0x6E;
119 }
120 B43_WARN_ON(1);
121 return 0;
122}
123
124u8 b43_plcp_get_ratecode_ofdm(const u8 bitrate)
125{
126 switch (bitrate) {
127 case B43_OFDM_RATE_6MB:
128 return 0xB;
129 case B43_OFDM_RATE_9MB:
130 return 0xF;
131 case B43_OFDM_RATE_12MB:
132 return 0xA;
133 case B43_OFDM_RATE_18MB:
134 return 0xE;
135 case B43_OFDM_RATE_24MB:
136 return 0x9;
137 case B43_OFDM_RATE_36MB:
138 return 0xD;
139 case B43_OFDM_RATE_48MB:
140 return 0x8;
141 case B43_OFDM_RATE_54MB:
142 return 0xC;
143 }
144 B43_WARN_ON(1);
145 return 0;
146}
147
148void b43_generate_plcp_hdr(struct b43_plcp_hdr4 *plcp,
149 const u16 octets, const u8 bitrate)
150{
e4d6b795
MB		 151 __u8 *raw = plcp->raw;
152
153 if (b43_is_ofdm_rate(bitrate)) {
1a09404a
MB		 154 u32 d;
155
156 d = b43_plcp_get_ratecode_ofdm(bitrate);
e4d6b795 157 B43_WARN_ON(octets & 0xF000);
1a09404a 158 d |= (octets << 5);
b52a033c 159 plcp->data = cpu_to_le32(d);
e4d6b795
MB		 160 } else {
161 u32 plen;
162
163 plen = octets * 16 / bitrate;
164 if ((octets * 16 % bitrate) > 0) {
165 plen++;
166 if ((bitrate == B43_CCK_RATE_11MB)
167 && ((octets * 8 % 11) < 4)) {
168 raw[1] = 0x84;
169 } else
170 raw[1] = 0x04;
171 } else
172 raw[1] = 0x04;
b52a033c 173 plcp->data |= cpu_to_le32(plen << 16);
e4d6b795
MB		 174 raw[0] = b43_plcp_get_ratecode_cck(bitrate);
175 }
176}
177
3311abbb
RM		 178static u16 b43_generate_tx_phy_ctl1(struct b43_wldev *dev, u8 bitrate)
179{
180 const struct b43_phy *phy = &dev->phy;
181 const struct b43_tx_legacy_rate_phy_ctl_entry *e;
182 u16 control = 0;
183 u16 bw;
184
185 if (phy->type == B43_PHYTYPE_LP)
186 bw = B43_TXH_PHY1_BW_20;
187 else /* FIXME */
188 bw = B43_TXH_PHY1_BW_20;
189
190 if (0) { /* FIXME: MIMO */
191 } else if (b43_is_cck_rate(bitrate) && phy->type != B43_PHYTYPE_LP) {
192 control = bw;
193 } else {
194 control = bw;
195 e = b43_tx_legacy_rate_phy_ctl_ent(bitrate);
196 if (e) {
197 control |= e->coding_rate;
198 control |= e->modulation;
199 }
200 control |= B43_TXH_PHY1_MODE_SISO;
201 }
202
203 return control;
204}
205
e4d6b795
MB		 206static u8 b43_calc_fallback_rate(u8 bitrate)
207{
208 switch (bitrate) {
209 case B43_CCK_RATE_1MB:
210 return B43_CCK_RATE_1MB;
211 case B43_CCK_RATE_2MB:
212 return B43_CCK_RATE_1MB;
213 case B43_CCK_RATE_5MB:
214 return B43_CCK_RATE_2MB;
215 case B43_CCK_RATE_11MB:
216 return B43_CCK_RATE_5MB;
217 case B43_OFDM_RATE_6MB:
218 return B43_CCK_RATE_5MB;
219 case B43_OFDM_RATE_9MB:
220 return B43_OFDM_RATE_6MB;
221 case B43_OFDM_RATE_12MB:
222 return B43_OFDM_RATE_9MB;
223 case B43_OFDM_RATE_18MB:
224 return B43_OFDM_RATE_12MB;
225 case B43_OFDM_RATE_24MB:
226 return B43_OFDM_RATE_18MB;
227 case B43_OFDM_RATE_36MB:
228 return B43_OFDM_RATE_24MB;
229 case B43_OFDM_RATE_48MB:
230 return B43_OFDM_RATE_36MB;
231 case B43_OFDM_RATE_54MB:
232 return B43_OFDM_RATE_48MB;
233 }
234 B43_WARN_ON(1);
235 return 0;
236}
237
eb189d8b 238/* Generate a TX data header. */
09552ccd
MB		 239int b43_generate_txhdr(struct b43_wldev *dev,
240 u8 *_txhdr,
035d0243 241 struct sk_buff *skb_frag,
e6a9854b 242 struct ieee80211_tx_info *info,
09552ccd 243 u16 cookie)
e4d6b795 244{
035d0243 245 const unsigned char *fragment_data = skb_frag->data;
246 unsigned int fragment_len = skb_frag->len;
eb189d8b 247 struct b43_txhdr *txhdr = (struct b43_txhdr *)_txhdr;
e4d6b795
MB		 248 const struct b43_phy *phy = &dev->phy;
249 const struct ieee80211_hdr *wlhdr =
250 (const struct ieee80211_hdr *)fragment_data;
d0f09804 251 int use_encryption = !!info->control.hw_key;
f37d9234 252 __le16 fctl = wlhdr->frame_control;
8318d78a 253 struct ieee80211_rate *fbrate;
e4d6b795
MB		 254 u8 rate, rate_fb;
255 int rate_ofdm, rate_fb_ofdm;
256 unsigned int plcp_fragment_len;
257 u32 mac_ctl = 0;
258 u16 phy_ctl = 0;
259 u8 extra_ft = 0;
2e92e6f2 260 struct ieee80211_rate *txrate;
e6a9854b 261 struct ieee80211_tx_rate *rates;
e4d6b795
MB		 262
263 memset(txhdr, 0, sizeof(*txhdr));
264
e039fa4a 265 txrate = ieee80211_get_tx_rate(dev->wl->hw, info);
2e92e6f2 266 rate = txrate ? txrate->hw_value : B43_CCK_RATE_1MB;
e4d6b795 267 rate_ofdm = b43_is_ofdm_rate(rate);
870abdf6 268 fbrate = ieee80211_get_alt_retry_rate(dev->wl->hw, info, 0) ? : txrate;
8318d78a 269 rate_fb = fbrate->hw_value;
e4d6b795
MB		 270 rate_fb_ofdm = b43_is_ofdm_rate(rate_fb);
271
272 if (rate_ofdm)
273 txhdr->phy_rate = b43_plcp_get_ratecode_ofdm(rate);
274 else
275 txhdr->phy_rate = b43_plcp_get_ratecode_cck(rate);
276 txhdr->mac_frame_ctl = wlhdr->frame_control;
277 memcpy(txhdr->tx_receiver, wlhdr->addr1, 6);
278
279 /* Calculate duration for fallback rate */
280 if ((rate_fb == rate) ||
281 (wlhdr->duration_id & cpu_to_le16(0x8000)) ||
282 (wlhdr->duration_id == cpu_to_le16(0))) {
283 /* If the fallback rate equals the normal rate or the
284 * dur_id field contains an AID, CFP magic or 0,
285 * use the original dur_id field. */
286 txhdr->dur_fb = wlhdr->duration_id;
287 } else {
e039fa4a
JB		 288 txhdr->dur_fb = ieee80211_generic_frame_duration(
289 dev->wl->hw, info->control.vif, fragment_len, fbrate);
e4d6b795
MB		 290 }
291
292 plcp_fragment_len = fragment_len + FCS_LEN;
293 if (use_encryption) {
e039fa4a 294 u8 key_idx = info->control.hw_key->hw_key_idx;
e4d6b795
MB		 295 struct b43_key *key;
296 int wlhdr_len;
297 size_t iv_len;
298
66d2d089 299 B43_WARN_ON(key_idx >= ARRAY_SIZE(dev->key));
e4d6b795 300 key = &(dev->key[key_idx]);
7be1bb6b 301
09552ccd
MB		 302 if (unlikely(!key->keyconf)) {
303 /* This key is invalid. This might only happen
304 * in a short timeframe after machine resume before
305 * we were able to reconfigure keys.
306 * Drop this packet completely. Do not transmit it
307 * unencrypted to avoid leaking information. */
308 return -ENOKEY;
7be1bb6b 309 }
09552ccd
MB		 310
311 /* Hardware appends ICV. */
76708dee 312 plcp_fragment_len += info->control.hw_key->icv_len;
09552ccd
MB		 313
314 key_idx = b43_kidx_to_fw(dev, key_idx);
315 mac_ctl |= (key_idx << B43_TXH_MAC_KEYIDX_SHIFT) &
316 B43_TXH_MAC_KEYIDX;
317 mac_ctl |= (key->algorithm << B43_TXH_MAC_KEYALG_SHIFT) &
318 B43_TXH_MAC_KEYALG;
f37d9234 319 wlhdr_len = ieee80211_hdrlen(fctl);
035d0243 320 if (key->algorithm == B43_SEC_ALGO_TKIP) {
321 u16 phase1key[5];
322 int i;
323 /* we give the phase1key and iv16 here, the key is stored in
324 * shm. With that the hardware can do phase 2 and encryption.
325 */
523b02ea 326 ieee80211_get_tkip_p1k(info->control.hw_key, skb_frag, phase1key);
cde1b55b
MB		 327 /* phase1key is in host endian. Copy to little-endian txhdr->iv. */
328 for (i = 0; i < 5; i++) {
329 txhdr->iv[i * 2 + 0] = phase1key[i];
330 txhdr->iv[i * 2 + 1] = phase1key[i] >> 8;
331 }
035d0243 332 /* iv16 */
333 memcpy(txhdr->iv + 10, ((u8 *) wlhdr) + wlhdr_len, 3);
334 } else {
335 iv_len = min((size_t) info->control.hw_key->iv_len,
336 ARRAY_SIZE(txhdr->iv));
337 memcpy(txhdr->iv, ((u8 *) wlhdr) + wlhdr_len, iv_len);
338 }
e4d6b795 339 }
efe0249b
RM		 340 switch (dev->fw.hdr_format) {
341 case B43_FW_HDR_351:
2391b7e8 342 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_351.plcp),
eb189d8b 343 plcp_fragment_len, rate);
efe0249b
RM		 344 break;
345 case B43_FW_HDR_410:
2391b7e8 346 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_410.plcp),
eb189d8b 347 plcp_fragment_len, rate);
efe0249b 348 break;
eb189d8b 349 }
e4d6b795
MB		 350 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->plcp_fb),
351 plcp_fragment_len, rate_fb);
352
353 /* Extra Frame Types */
354 if (rate_fb_ofdm)
eb189d8b
MB		 355 extra_ft |= B43_TXH_EFT_FB_OFDM;
356 else
357 extra_ft |= B43_TXH_EFT_FB_CCK;
e4d6b795
MB		 358
359 /* Set channel radio code. Note that the micrcode ORs 0x100 to
360 * this value before comparing it to the value in SHM, if this
361 * is a 5Ghz packet.
362 */
363 txhdr->chan_radio_code = phy->channel;
364
365 /* PHY TX Control word */
366 if (rate_ofdm)
eb189d8b
MB		 367 phy_ctl |= B43_TXH_PHY_ENC_OFDM;
368 else
369 phy_ctl |= B43_TXH_PHY_ENC_CCK;
e6a9854b 370 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
eb189d8b 371 phy_ctl |= B43_TXH_PHY_SHORTPRMBL;
9db1f6d7 372
e039fa4a 373 switch (b43_ieee80211_antenna_sanitize(dev, info->antenna_sel_tx)) {
9db1f6d7 374 case 0: /* Default */
eb189d8b 375 phy_ctl |= B43_TXH_PHY_ANT01AUTO;
e4d6b795 376 break;
9db1f6d7 377 case 1: /* Antenna 0 */
eb189d8b 378 phy_ctl |= B43_TXH_PHY_ANT0;
e4d6b795 379 break;
9db1f6d7 380 case 2: /* Antenna 1 */
eb189d8b
MB		 381 phy_ctl |= B43_TXH_PHY_ANT1;
382 break;
383 case 3: /* Antenna 2 */
384 phy_ctl |= B43_TXH_PHY_ANT2;
385 break;
386 case 4: /* Antenna 3 */
387 phy_ctl |= B43_TXH_PHY_ANT3;
e4d6b795
MB		 388 break;
389 default:
390 B43_WARN_ON(1);
391 }
392
e6a9854b 393 rates = info->control.rates;
e4d6b795 394 /* MAC control */
e039fa4a 395 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK))
eb189d8b 396 mac_ctl |= B43_TXH_MAC_ACK;
f591fa5d
JB		 397 /* use hardware sequence counter as the non-TID counter */
398 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
eb189d8b 399 mac_ctl |= B43_TXH_MAC_HWSEQ;
e039fa4a 400 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
eb189d8b 401 mac_ctl |= B43_TXH_MAC_STMSDU;
e4d6b795 402 if (phy->type == B43_PHYTYPE_A)
eb189d8b 403 mac_ctl |= B43_TXH_MAC_5GHZ;
e6a9854b
JB		 404
405 /* Overwrite rates[0].count to make the retry calculation
406 * in the tx status easier. need the actual retry limit to
407 * detect whether the fallback rate was used.
408 */
409 if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) ||
410 (rates[0].count <= dev->wl->hw->conf.long_frame_max_tx_count)) {
411 rates[0].count = dev->wl->hw->conf.long_frame_max_tx_count;
eb189d8b 412 mac_ctl |= B43_TXH_MAC_LONGFRAME;
e6a9854b
JB		 413 } else {
414 rates[0].count = dev->wl->hw->conf.short_frame_max_tx_count;
415 }
e4d6b795
MB		 416
417 /* Generate the RTS or CTS-to-self frame */
e6a9854b
JB		 418 if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) ||
419 (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)) {
e4d6b795 420 unsigned int len;
efe0249b 421 struct ieee80211_hdr *uninitialized_var(hdr);
e4d6b795
MB		 422 int rts_rate, rts_rate_fb;
423 int rts_rate_ofdm, rts_rate_fb_ofdm;
efe0249b 424 struct b43_plcp_hdr6 *uninitialized_var(plcp);
2e92e6f2 425 struct ieee80211_rate *rts_cts_rate;
e4d6b795 426
e039fa4a 427 rts_cts_rate = ieee80211_get_rts_cts_rate(dev->wl->hw, info);
2e92e6f2
JB		 428
429 rts_rate = rts_cts_rate ? rts_cts_rate->hw_value : B43_CCK_RATE_1MB;
e4d6b795
MB		 430 rts_rate_ofdm = b43_is_ofdm_rate(rts_rate);
431 rts_rate_fb = b43_calc_fallback_rate(rts_rate);
432 rts_rate_fb_ofdm = b43_is_ofdm_rate(rts_rate_fb);
433
e6a9854b 434 if (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
efe0249b 435 struct ieee80211_cts *uninitialized_var(cts);
eb189d8b 436
efe0249b
RM		 437 switch (dev->fw.hdr_format) {
438 case B43_FW_HDR_351:
eb189d8b 439 cts = (struct ieee80211_cts *)
2391b7e8 440 (txhdr->format_351.rts_frame);
efe0249b
RM		 441 break;
442 case B43_FW_HDR_410:
eb189d8b 443 cts = (struct ieee80211_cts *)
2391b7e8 444 (txhdr->format_410.rts_frame);
efe0249b 445 break;
eb189d8b 446 }
e039fa4a 447 ieee80211_ctstoself_get(dev->wl->hw, info->control.vif,
e4d6b795 448 fragment_data, fragment_len,
e039fa4a 449 info, cts);
eb189d8b 450 mac_ctl |= B43_TXH_MAC_SENDCTS;
e4d6b795
MB		 451 len = sizeof(struct ieee80211_cts);
452 } else {
efe0249b 453 struct ieee80211_rts *uninitialized_var(rts);
eb189d8b 454
efe0249b
RM		 455 switch (dev->fw.hdr_format) {
456 case B43_FW_HDR_351:
eb189d8b 457 rts = (struct ieee80211_rts *)
2391b7e8 458 (txhdr->format_351.rts_frame);
efe0249b
RM		 459 break;
460 case B43_FW_HDR_410:
eb189d8b 461 rts = (struct ieee80211_rts *)
2391b7e8 462 (txhdr->format_410.rts_frame);
efe0249b 463 break;
eb189d8b 464 }
e039fa4a 465 ieee80211_rts_get(dev->wl->hw, info->control.vif,
eb189d8b 466 fragment_data, fragment_len,
e039fa4a 467 info, rts);
eb189d8b 468 mac_ctl |= B43_TXH_MAC_SENDRTS;
e4d6b795
MB		 469 len = sizeof(struct ieee80211_rts);
470 }
471 len += FCS_LEN;
eb189d8b
MB		 472
473 /* Generate the PLCP headers for the RTS/CTS frame */
efe0249b
RM		 474 switch (dev->fw.hdr_format) {
475 case B43_FW_HDR_351:
2391b7e8 476 plcp = &txhdr->format_351.rts_plcp;
efe0249b
RM		 477 break;
478 case B43_FW_HDR_410:
2391b7e8 479 plcp = &txhdr->format_410.rts_plcp;
efe0249b
RM		 480 break;
481 }
eb189d8b
MB		 482 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp,
483 len, rts_rate);
484 plcp = &txhdr->rts_plcp_fb;
485 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp,
e4d6b795 486 len, rts_rate_fb);
eb189d8b 487
efe0249b
RM		 488 switch (dev->fw.hdr_format) {
489 case B43_FW_HDR_351:
eb189d8b 490 hdr = (struct ieee80211_hdr *)
2391b7e8 491 (&txhdr->format_351.rts_frame);
efe0249b
RM		 492 break;
493 case B43_FW_HDR_410:
eb189d8b 494 hdr = (struct ieee80211_hdr *)
2391b7e8 495 (&txhdr->format_410.rts_frame);
efe0249b 496 break;
eb189d8b 497 }
e4d6b795 498 txhdr->rts_dur_fb = hdr->duration_id;
eb189d8b 499
e4d6b795 500 if (rts_rate_ofdm) {
eb189d8b 501 extra_ft |= B43_TXH_EFT_RTS_OFDM;
e4d6b795
MB		 502 txhdr->phy_rate_rts =
503 b43_plcp_get_ratecode_ofdm(rts_rate);
eb189d8b
MB		 504 } else {
505 extra_ft |= B43_TXH_EFT_RTS_CCK;
e4d6b795
MB		 506 txhdr->phy_rate_rts =
507 b43_plcp_get_ratecode_cck(rts_rate);
eb189d8b 508 }
e4d6b795 509 if (rts_rate_fb_ofdm)
eb189d8b
MB		 510 extra_ft |= B43_TXH_EFT_RTSFB_OFDM;
511 else
512 extra_ft |= B43_TXH_EFT_RTSFB_CCK;
3311abbb
RM		 513
514 if (rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS &&
515 phy->type == B43_PHYTYPE_N) {
516 txhdr->phy_ctl1_rts = cpu_to_le16(
517 b43_generate_tx_phy_ctl1(dev, rts_rate));
518 txhdr->phy_ctl1_rts_fb = cpu_to_le16(
519 b43_generate_tx_phy_ctl1(dev, rts_rate_fb));
520 }
e4d6b795
MB		 521 }
522
523 /* Magic cookie */
efe0249b
RM		 524 switch (dev->fw.hdr_format) {
525 case B43_FW_HDR_351:
2391b7e8 526 txhdr->format_351.cookie = cpu_to_le16(cookie);
efe0249b
RM		 527 break;
528 case B43_FW_HDR_410:
2391b7e8 529 txhdr->format_410.cookie = cpu_to_le16(cookie);
efe0249b
RM		 530 break;
531 }
e4d6b795 532
3311abbb
RM		 533 if (phy->type == B43_PHYTYPE_N) {
534 txhdr->phy_ctl1 =
535 cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate));
536 txhdr->phy_ctl1_fb =
537 cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate_fb));
538 }
539
e4d6b795
MB		 540 /* Apply the bitfields */
541 txhdr->mac_ctl = cpu_to_le32(mac_ctl);
542 txhdr->phy_ctl = cpu_to_le16(phy_ctl);
543 txhdr->extra_ft = extra_ft;
e4d6b795 544
09552ccd 545 return 0;
e4d6b795
MB		 546}
547
548static s8 b43_rssi_postprocess(struct b43_wldev *dev,
549 u8 in_rssi, int ofdm,
550 int adjust_2053, int adjust_2050)
551{
552 struct b43_phy *phy = &dev->phy;
ef1a628d 553 struct b43_phy_g *gphy = phy->g;
e4d6b795
MB		 554 s32 tmp;
555
556 switch (phy->radio_ver) {
557 case 0x2050:
558 if (ofdm) {
559 tmp = in_rssi;
560 if (tmp > 127)
561 tmp -= 256;
562 tmp *= 73;
563 tmp /= 64;
564 if (adjust_2050)
565 tmp += 25;
566 else
567 tmp -= 3;
568 } else {
0581483a 569 if (dev->dev->bus_sprom->
e4d6b795
MB		 570 boardflags_lo & B43_BFL_RSSI) {
571 if (in_rssi > 63)
572 in_rssi = 63;
ef1a628d
MB		 573 B43_WARN_ON(phy->type != B43_PHYTYPE_G);
574 tmp = gphy->nrssi_lt[in_rssi];
e4d6b795
MB		 575 tmp = 31 - tmp;
576 tmp *= -131;
577 tmp /= 128;
578 tmp -= 57;
579 } else {
580 tmp = in_rssi;
581 tmp = 31 - tmp;
582 tmp *= -149;
583 tmp /= 128;
584 tmp -= 68;
585 }
586 if (phy->type == B43_PHYTYPE_G && adjust_2050)
587 tmp += 25;
588 }
589 break;
590 case 0x2060:
591 if (in_rssi > 127)
592 tmp = in_rssi - 256;
593 else
594 tmp = in_rssi;
595 break;
596 default:
597 tmp = in_rssi;
598 tmp -= 11;
599 tmp *= 103;
600 tmp /= 64;
601 if (adjust_2053)
602 tmp -= 109;
603 else
604 tmp -= 83;
605 }
606
607 return (s8) tmp;
608}
609
610//TODO
611#if 0
612static s8 b43_rssinoise_postprocess(struct b43_wldev *dev, u8 in_rssi)
613{
614 struct b43_phy *phy = &dev->phy;
615 s8 ret;
616
617 if (phy->type == B43_PHYTYPE_A) {
618 //TODO: Incomplete specs.
619 ret = 0;
620 } else
621 ret = b43_rssi_postprocess(dev, in_rssi, 0, 1, 1);
622
623 return ret;
624}
625#endif
626
627void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
628{
629 struct ieee80211_rx_status status;
630 struct b43_plcp_hdr6 *plcp;
631 struct ieee80211_hdr *wlhdr;
632 const struct b43_rxhdr_fw4 *rxhdr = _rxhdr;
f37d9234 633 __le16 fctl;
e4d6b795
MB		 634 u16 phystat0, phystat3, chanstat, mactime;
635 u32 macstat;
636 u16 chanid;
8318d78a 637 u16 phytype;
e4d6b795
MB		 638 int padding;
639
640 memset(&status, 0, sizeof(status));
641
642 /* Get metadata about the frame from the header. */
643 phystat0 = le16_to_cpu(rxhdr->phy_status0);
644 phystat3 = le16_to_cpu(rxhdr->phy_status3);
e4d6b795
MB		 645 macstat = le32_to_cpu(rxhdr->mac_status);
646 mactime = le16_to_cpu(rxhdr->mac_time);
647 chanstat = le16_to_cpu(rxhdr->channel);
8318d78a 648 phytype = chanstat & B43_RX_CHAN_PHYTYPE;
e4d6b795 649
ce4fbdbf 650 if (unlikely(macstat & B43_RX_MAC_FCSERR)) {
e4d6b795 651 dev->wl->ieee_stats.dot11FCSErrorCount++;
ce4fbdbf
MB		 652 status.flag |= RX_FLAG_FAILED_FCS_CRC;
653 }
654 if (unlikely(phystat0 & (B43_RX_PHYST0_PLCPHCF | B43_RX_PHYST0_PLCPFV)))
655 status.flag |= RX_FLAG_FAILED_PLCP_CRC;
656 if (phystat0 & B43_RX_PHYST0_SHORTPRMBL)
657 status.flag |= RX_FLAG_SHORTPRE;
e4d6b795
MB		 658 if (macstat & B43_RX_MAC_DECERR) {
659 /* Decryption with the given key failed.
660 * Drop the packet. We also won't be able to decrypt it with
661 * the key in software. */
662 goto drop;
663 }
664
665 /* Skip PLCP and padding */
666 padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
667 if (unlikely(skb->len < (sizeof(struct b43_plcp_hdr6) + padding))) {
668 b43dbg(dev->wl, "RX: Packet size underrun (1)\n");
669 goto drop;
670 }
671 plcp = (struct b43_plcp_hdr6 *)(skb->data + padding);
672 skb_pull(skb, sizeof(struct b43_plcp_hdr6) + padding);
673 /* The skb contains the Wireless Header + payload data now */
674 if (unlikely(skb->len < (2 + 2 + 6 /*minimum hdr */ + FCS_LEN))) {
675 b43dbg(dev->wl, "RX: Packet size underrun (2)\n");
676 goto drop;
677 }
678 wlhdr = (struct ieee80211_hdr *)(skb->data);
f37d9234 679 fctl = wlhdr->frame_control;
e4d6b795
MB		 680
681 if (macstat & B43_RX_MAC_DEC) {
682 unsigned int keyidx;
683 int wlhdr_len;
684
685 keyidx = ((macstat & B43_RX_MAC_KEYIDX)
686 >> B43_RX_MAC_KEYIDX_SHIFT);
687 /* We must adjust the key index here. We want the "physical"
688 * key index, but the ucode passed it slightly different.
689 */
690 keyidx = b43_kidx_to_raw(dev, keyidx);
66d2d089 691 B43_WARN_ON(keyidx >= ARRAY_SIZE(dev->key));
e4d6b795
MB		 692
693 if (dev->key[keyidx].algorithm != B43_SEC_ALGO_NONE) {
f37d9234 694 wlhdr_len = ieee80211_hdrlen(fctl);
e4d6b795
MB		 695 if (unlikely(skb->len < (wlhdr_len + 3))) {
696 b43dbg(dev->wl,
697 "RX: Packet size underrun (3)\n");
698 goto drop;
699 }
700 status.flag |= RX_FLAG_DECRYPTED;
701 }
702 }
703
7b584163 704 /* Link quality statistics */
7b584163
MB		 705 if ((chanstat & B43_RX_CHAN_PHYTYPE) == B43_PHYTYPE_N) {
706// s8 rssi = max(rxhdr->power0, rxhdr->power1);
707 //TODO: Find out what the rssi value is (dBm or percentage?)
708 // and also find out what the maximum possible value is.
709 // Fill status.ssi and status.signal fields.
710 } else {
566bfe5a 711 status.signal = b43_rssi_postprocess(dev, rxhdr->jssi,
7b584163
MB		 712 (phystat0 & B43_RX_PHYST0_OFDM),
713 (phystat0 & B43_RX_PHYST0_GAINCTL),
714 (phystat3 & B43_RX_PHYST3_TRSTATE));
7b584163
MB		 715 }
716
e4d6b795 717 if (phystat0 & B43_RX_PHYST0_OFDM)
8318d78a
JB		 718 status.rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
719 phytype == B43_PHYTYPE_A);
e4d6b795 720 else
8318d78a 721 status.rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
ce4fbdbf
MB		 722 if (unlikely(status.rate_idx == -1)) {
723 /* PLCP seems to be corrupted.
724 * Drop the frame, if we are not interested in corrupted frames. */
725 if (!(dev->wl->filter_flags & FIF_PLCPFAIL))
726 goto drop;
727 }
e4d6b795 728 status.antenna = !!(phystat0 & B43_RX_PHYST0_ANT);
c0ddd04d
JL		 729
730 /*
d007b7f4
JB		 731 * All frames on monitor interfaces and beacons always need a full
732 * 64-bit timestamp. Monitor interfaces need it for diagnostic
733 * purposes and beacons for IBSS merging.
734 * This code assumes we get to process the packet within 16 bits
735 * of timestamp, i.e. about 65 milliseconds after the PHY received
736 * the first symbol.
c0ddd04d 737 */
f37d9234 738 if (ieee80211_is_beacon(fctl) || dev->wl->radiotap_enabled) {
c0ddd04d
JL		 739 u16 low_mactime_now;
740
741 b43_tsf_read(dev, &status.mactime);
742 low_mactime_now = status.mactime;
743 status.mactime = status.mactime & ~0xFFFFULL;
744 status.mactime += mactime;
745 if (low_mactime_now <= mactime)
746 status.mactime -= 0x10000;
6ebacbb7 747 status.flag |= RX_FLAG_MACTIME_MPDU;
c0ddd04d 748 }
e4d6b795
MB		 749
750 chanid = (chanstat & B43_RX_CHAN_ID) >> B43_RX_CHAN_ID_SHIFT;
751 switch (chanstat & B43_RX_CHAN_PHYTYPE) {
752 case B43_PHYTYPE_A:
8318d78a 753 status.band = IEEE80211_BAND_5GHZ;
d987160b
MB		 754 B43_WARN_ON(1);
755 /* FIXME: We don't really know which value the "chanid" contains.
756 * So the following assignment might be wrong. */
8318d78a 757 status.freq = b43_channel_to_freq_5ghz(chanid);
e4d6b795
MB		 758 break;
759 case B43_PHYTYPE_G:
8318d78a 760 status.band = IEEE80211_BAND_2GHZ;
d987160b
MB		 761 /* chanid is the radio channel cookie value as used
762 * to tune the radio. */
e4d6b795 763 status.freq = chanid + 2400;
d987160b
MB		 764 break;
765 case B43_PHYTYPE_N:
826ee706 766 case B43_PHYTYPE_LP:
d987160b
MB		 767 /* chanid is the SHM channel cookie. Which is the plain
768 * channel number in b43. */
8318d78a
JB		 769 if (chanstat & B43_RX_CHAN_5GHZ) {
770 status.band = IEEE80211_BAND_5GHZ;
771 status.freq = b43_freq_to_channel_5ghz(chanid);
772 } else {
773 status.band = IEEE80211_BAND_2GHZ;
774 status.freq = b43_freq_to_channel_2ghz(chanid);
775 }
e4d6b795
MB		 776 break;
777 default:
778 B43_WARN_ON(1);
d987160b 779 goto drop;
e4d6b795
MB		 780 }
781
f1d58c25 782 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
72f5f457 783 ieee80211_rx_ni(dev->wl->hw, skb);
e4d6b795 784
990b86f4
MB		 785#if B43_DEBUG
786 dev->rx_count++;
787#endif
e4d6b795
MB		 788 return;
789drop:
790 b43dbg(dev->wl, "RX: Packet dropped\n");
791 dev_kfree_skb_any(skb);
792}
793
794void b43_handle_txstatus(struct b43_wldev *dev,
795 const struct b43_txstatus *status)
796{
797 b43_debugfs_log_txstat(dev, status);
798
799 if (status->intermediate)
800 return;
801 if (status->for_ampdu)
802 return;
803 if (!status->acked)
804 dev->wl->ieee_stats.dot11ACKFailureCount++;
805 if (status->rts_count) {
806 if (status->rts_count == 0xF) //FIXME
807 dev->wl->ieee_stats.dot11RTSFailureCount++;
808 else
809 dev->wl->ieee_stats.dot11RTSSuccessCount++;
810 }
811
5100d5ac
MB		 812 if (b43_using_pio_transfers(dev))
813 b43_pio_handle_txstatus(dev, status);
814 else
815 b43_dma_handle_txstatus(dev, status);
18c8adeb
MB		 816
817 b43_phy_txpower_check(dev, 0);
e4d6b795
MB		 818}
819
5100d5ac
MB		 820/* Fill out the mac80211 TXstatus report based on the b43-specific
821 * txstatus report data. This returns a boolean whether the frame was
822 * successfully transmitted. */
e6a9854b
JB		 823bool b43_fill_txstatus_report(struct b43_wldev *dev,
824 struct ieee80211_tx_info *report,
5100d5ac 825 const struct b43_txstatus *status)
e4d6b795 826{
5100d5ac 827 bool frame_success = 1;
e6a9854b
JB		 828 int retry_limit;
829
830 /* preserve the confiured retry limit before clearing the status
831 * The xmit function has overwritten the rc's value with the actual
832 * retry limit done by the hardware */
833 retry_limit = report->status.rates[0].count;
834 ieee80211_tx_info_clear_status(report);
5100d5ac
MB		 835
836 if (status->acked) {
837 /* The frame was ACKed. */
e039fa4a 838 report->flags |= IEEE80211_TX_STAT_ACK;
5100d5ac
MB		 839 } else {
840 /* The frame was not ACKed... */
e039fa4a 841 if (!(report->flags & IEEE80211_TX_CTL_NO_ACK)) {
5100d5ac
MB		 842 /* ...but we expected an ACK. */
843 frame_success = 0;
5100d5ac
MB		 844 }
845 }
846 if (status->frame_count == 0) {
847 /* The frame was not transmitted at all. */
e6a9854b
JB		 848 report->status.rates[0].count = 0;
849 } else if (status->rts_count > dev->wl->hw->conf.short_frame_max_tx_count) {
850 /*
851 * If the short retries (RTS, not data frame) have exceeded
852 * the limit, the hw will not have tried the selected rate,
853 * but will have used the fallback rate instead.
854 * Don't let the rate control count attempts for the selected
855 * rate in this case, otherwise the statistics will be off.
856 */
857 report->status.rates[0].count = 0;
858 report->status.rates[1].count = status->frame_count;
859 } else {
860 if (status->frame_count > retry_limit) {
861 report->status.rates[0].count = retry_limit;
862 report->status.rates[1].count = status->frame_count -
863 retry_limit;
864
865 } else {
866 report->status.rates[0].count = status->frame_count;
867 report->status.rates[1].idx = -1;
868 }
869 }
5100d5ac
MB		 870
871 return frame_success;
e4d6b795
MB		 872}
873
874/* Stop any TX operation on the device (suspend the hardware queues) */
875void b43_tx_suspend(struct b43_wldev *dev)
876{
5100d5ac
MB		 877 if (b43_using_pio_transfers(dev))
878 b43_pio_tx_suspend(dev);
879 else
880 b43_dma_tx_suspend(dev);
e4d6b795
MB		 881}
882
883/* Resume any TX operation on the device (resume the hardware queues) */
884void b43_tx_resume(struct b43_wldev *dev)
885{
5100d5ac
MB		 886 if (b43_using_pio_transfers(dev))
887 b43_pio_tx_resume(dev);
888 else
889 b43_dma_tx_resume(dev);
e4d6b795 890}
Linux kernel - Deliverables
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