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Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband
[deliverable/linux.git] / drivers / net / wireless / bcm43xx / bcm43xx_phy.c
CommitLineData
f222313a
JL		 1/*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29*/
30
31#include <linux/delay.h>
32#include <linux/pci.h>
33#include <linux/types.h>
34
35#include "bcm43xx.h"
36#include "bcm43xx_phy.h"
37#include "bcm43xx_main.h"
38#include "bcm43xx_radio.h"
39#include "bcm43xx_ilt.h"
40#include "bcm43xx_power.h"
41
42
43static const s8 bcm43xx_tssi2dbm_b_table[] = {
44 0x4D, 0x4C, 0x4B, 0x4A,
45 0x4A, 0x49, 0x48, 0x47,
46 0x47, 0x46, 0x45, 0x45,
47 0x44, 0x43, 0x42, 0x42,
48 0x41, 0x40, 0x3F, 0x3E,
49 0x3D, 0x3C, 0x3B, 0x3A,
50 0x39, 0x38, 0x37, 0x36,
51 0x35, 0x34, 0x32, 0x31,
52 0x30, 0x2F, 0x2D, 0x2C,
53 0x2B, 0x29, 0x28, 0x26,
54 0x25, 0x23, 0x21, 0x1F,
55 0x1D, 0x1A, 0x17, 0x14,
56 0x10, 0x0C, 0x06, 0x00,
57 -7, -7, -7, -7,
58 -7, -7, -7, -7,
59 -7, -7, -7, -7,
60};
61
62static const s8 bcm43xx_tssi2dbm_g_table[] = {
63 77, 77, 77, 76,
64 76, 76, 75, 75,
65 74, 74, 73, 73,
66 73, 72, 72, 71,
67 71, 70, 70, 69,
68 68, 68, 67, 67,
69 66, 65, 65, 64,
70 63, 63, 62, 61,
71 60, 59, 58, 57,
72 56, 55, 54, 53,
73 52, 50, 49, 47,
74 45, 43, 40, 37,
75 33, 28, 22, 14,
76 5, -7, -20, -20,
77 -20, -20, -20, -20,
78 -20, -20, -20, -20,
79};
80
81static void bcm43xx_phy_initg(struct bcm43xx_private *bcm);
82
83
2087da5d
MB		 84static inline
85void bcm43xx_voluntary_preempt(void)
86{
87 assert(!in_atomic() && !in_irq() &&
88 !in_interrupt() && !irqs_disabled());
89#ifndef CONFIG_PREEMPT
90 cond_resched();
91#endif /* CONFIG_PREEMPT */
92}
93
f222313a
JL		 94void bcm43xx_raw_phy_lock(struct bcm43xx_private *bcm)
95{
e9357c05 96 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 97
98 assert(irqs_disabled());
99 if (bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD) == 0x00000000) {
100 phy->is_locked = 0;
101 return;
102 }
103 if (bcm->current_core->rev < 3) {
104 bcm43xx_mac_suspend(bcm);
105 spin_lock(&phy->lock);
106 } else {
107 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
108 bcm43xx_power_saving_ctl_bits(bcm, -1, 1);
109 }
110 phy->is_locked = 1;
111}
112
113void bcm43xx_raw_phy_unlock(struct bcm43xx_private *bcm)
114{
e9357c05 115 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 116
117 assert(irqs_disabled());
118 if (bcm->current_core->rev < 3) {
119 if (phy->is_locked) {
120 spin_unlock(&phy->lock);
121 bcm43xx_mac_enable(bcm);
122 }
123 } else {
124 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
125 bcm43xx_power_saving_ctl_bits(bcm, -1, -1);
126 }
127 phy->is_locked = 0;
128}
129
130u16 bcm43xx_phy_read(struct bcm43xx_private *bcm, u16 offset)
131{
132 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
133 return bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_DATA);
134}
135
136void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val)
137{
138 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
73733847 139 mmiowb();
f222313a
JL		 140 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_DATA, val);
141}
142
143void bcm43xx_phy_calibrate(struct bcm43xx_private *bcm)
144{
e9357c05 145 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 146
147 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* Dummy read. */
148 if (phy->calibrated)
149 return;
150 if (phy->type == BCM43xx_PHYTYPE_G && phy->rev == 1) {
f222313a
JL		 151 bcm43xx_wireless_core_reset(bcm, 0);
152 bcm43xx_phy_initg(bcm);
153 bcm43xx_wireless_core_reset(bcm, 1);
f222313a
JL		 154 }
155 phy->calibrated = 1;
156}
157
158/* Connect the PHY
159 * http://bcm-specs.sipsolutions.net/SetPHY
160 */
161int bcm43xx_phy_connect(struct bcm43xx_private *bcm, int connect)
162{
e9357c05 163 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 164 u32 flags;
165
e9357c05
MB		 166 if (bcm->current_core->rev < 5)
167 goto out;
168
f222313a
JL		 169 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH);
170 if (connect) {
171 if (!(flags & 0x00010000))
172 return -ENODEV;
f222313a
JL		 173 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
174 flags |= (0x800 << 18);
175 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
f222313a
JL		 176 } else {
177 if (!(flags & 0x00020000))
178 return -ENODEV;
f222313a
JL		 179 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
180 flags &= ~(0x800 << 18);
181 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
f222313a 182 }
e9357c05
MB		 183out:
184 phy->connected = connect;
185 if (connect)
186 dprintk(KERN_INFO PFX "PHY connected\n");
187 else
188 dprintk(KERN_INFO PFX "PHY disconnected\n");
f222313a
JL		 189
190 return 0;
191}
192
193/* intialize B PHY power control
194 * as described in http://bcm-specs.sipsolutions.net/InitPowerControl
195 */
196static void bcm43xx_phy_init_pctl(struct bcm43xx_private *bcm)
197{
e9357c05
MB		 198 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
199 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
f222313a
JL		 200 u16 saved_batt = 0, saved_ratt = 0, saved_txctl1 = 0;
201 int must_reset_txpower = 0;
202
203 assert(phy->type != BCM43xx_PHYTYPE_A);
204 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
205 (bcm->board_type == 0x0416))
206 return;
207
f222313a 208 bcm43xx_phy_write(bcm, 0x0028, 0x8018);
740ac4fb 209 bcm43xx_write16(bcm, 0x03E6, bcm43xx_read16(bcm, 0x03E6) & 0xFFDF);
f222313a
JL		 210
211 if (phy->type == BCM43xx_PHYTYPE_G) {
212 if (!phy->connected)
213 return;
214 bcm43xx_phy_write(bcm, 0x047A, 0xC111);
215 }
216 if (phy->savedpctlreg != 0xFFFF)
217 return;
218
219 if (phy->type == BCM43xx_PHYTYPE_B &&
220 phy->rev >= 2 &&
221 radio->version == 0x2050) {
222 bcm43xx_radio_write16(bcm, 0x0076,
223 bcm43xx_radio_read16(bcm, 0x0076) | 0x0084);
224 } else {
6ecb2690
MB		 225 saved_batt = radio->baseband_atten;
226 saved_ratt = radio->radio_atten;
227 saved_txctl1 = radio->txctl1;
f222313a
JL		 228 if ((radio->revision >= 6) && (radio->revision <= 8)
229 && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)
230 bcm43xx_radio_set_txpower_bg(bcm, 0xB, 0x1F, 0);
231 else
232 bcm43xx_radio_set_txpower_bg(bcm, 0xB, 9, 0);
233 must_reset_txpower = 1;
234 }
235 bcm43xx_dummy_transmission(bcm);
236
237 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_PCTL);
238
239 if (must_reset_txpower)
240 bcm43xx_radio_set_txpower_bg(bcm, saved_batt, saved_ratt, saved_txctl1);
241 else
242 bcm43xx_radio_write16(bcm, 0x0076, bcm43xx_radio_read16(bcm, 0x0076) & 0xFF7B);
243 bcm43xx_radio_clear_tssi(bcm);
244}
245
246static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm)
247{
e9357c05 248 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 249 u16 offset = 0x0000;
250
251 if (phy->rev == 1)
252 offset = 0x4C00;
253
73733847
MB		 254 bcm43xx_ilt_write(bcm, offset, 0x00FE);
255 bcm43xx_ilt_write(bcm, offset + 1, 0x000D);
256 bcm43xx_ilt_write(bcm, offset + 2, 0x0013);
257 bcm43xx_ilt_write(bcm, offset + 3, 0x0019);
f222313a
JL		 258
259 if (phy->rev == 1) {
73733847
MB		 260 bcm43xx_ilt_write(bcm, 0x1800, 0x2710);
261 bcm43xx_ilt_write(bcm, 0x1801, 0x9B83);
262 bcm43xx_ilt_write(bcm, 0x1802, 0x9B83);
263 bcm43xx_ilt_write(bcm, 0x1803, 0x0F8D);
f222313a
JL		 264 bcm43xx_phy_write(bcm, 0x0455, 0x0004);
265 }
266
267 bcm43xx_phy_write(bcm, 0x04A5, (bcm43xx_phy_read(bcm, 0x04A5) & 0x00FF) | 0x5700);
268 bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xFF80) | 0x000F);
269 bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xC07F) | 0x2B80);
270 bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xF0FF) | 0x0300);
271
272 bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0008);
273
274 bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xFFF0) | 0x0008);
275 bcm43xx_phy_write(bcm, 0x04A1, (bcm43xx_phy_read(bcm, 0x04A1) & 0xF0FF) | 0x0600);
276 bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xF0FF) | 0x0700);
277 bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xF0FF) | 0x0100);
278
279 if (phy->rev == 1)
280 bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xFFF0) | 0x0007);
281
282 bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xFF00) | 0x001C);
283 bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xC0FF) | 0x0200);
284 bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0xFF00) | 0x001C);
285 bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xFF00) | 0x0020);
286 bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xC0FF) | 0x0200);
287 bcm43xx_phy_write(bcm, 0x0482, (bcm43xx_phy_read(bcm, 0x0482) & 0xFF00) | 0x002E);
288 bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0x00FF) | 0x1A00);
289 bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0xFF00) | 0x0028);
290 bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0x00FF) | 0x2C00);
291
292 if (phy->rev == 1) {
293 bcm43xx_phy_write(bcm, 0x0430, 0x092B);
294 bcm43xx_phy_write(bcm, 0x041B, (bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1) | 0x0002);
295 } else {
296 bcm43xx_phy_write(bcm, 0x041B, bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1);
297 bcm43xx_phy_write(bcm, 0x041F, 0x287A);
298 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0xFFF0) | 0x0004);
299 }
300
301 if (phy->rev > 2) {
302 bcm43xx_phy_write(bcm, 0x0422, 0x287A);
303 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0x0FFF) | 0x3000);
304 }
305
306 bcm43xx_phy_write(bcm, 0x04A8, (bcm43xx_phy_read(bcm, 0x04A8) & 0x8080) | 0x7874);
307 bcm43xx_phy_write(bcm, 0x048E, 0x1C00);
308
309 if (phy->rev == 1) {
310 bcm43xx_phy_write(bcm, 0x04AB, (bcm43xx_phy_read(bcm, 0x04AB) & 0xF0FF) | 0x0600);
311 bcm43xx_phy_write(bcm, 0x048B, 0x005E);
312 bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xFF00) | 0x001E);
313 bcm43xx_phy_write(bcm, 0x048D, 0x0002);
314 }
315
73733847
MB		 316 bcm43xx_ilt_write(bcm, offset + 0x0800, 0);
317 bcm43xx_ilt_write(bcm, offset + 0x0801, 7);
318 bcm43xx_ilt_write(bcm, offset + 0x0802, 16);
319 bcm43xx_ilt_write(bcm, offset + 0x0803, 28);
740ac4fb
LF		 320
321 if (phy->rev >= 6) {
322 bcm43xx_phy_write(bcm, 0x0426, (bcm43xx_phy_read(bcm, 0x0426)
323 & 0xFFFC));
324 bcm43xx_phy_write(bcm, 0x0426, (bcm43xx_phy_read(bcm, 0x0426)
325 & 0xEFFF));
326 }
f222313a
JL		 327}
328
329static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
330{
e9357c05 331 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 332 u16 i;
333
334 assert(phy->type == BCM43xx_PHYTYPE_G);
335 if (phy->rev == 1) {
336 bcm43xx_phy_write(bcm, 0x0406, 0x4F19);
337 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
338 (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0xFC3F) | 0x0340);
339 bcm43xx_phy_write(bcm, 0x042C, 0x005A);
340 bcm43xx_phy_write(bcm, 0x0427, 0x001A);
341
342 for (i = 0; i < BCM43xx_ILT_FINEFREQG_SIZE; i++)
73733847 343 bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]);
f222313a 344 for (i = 0; i < BCM43xx_ILT_NOISEG1_SIZE; i++)
73733847 345 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]);
f222313a 346 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
a5d79d1e 347 bcm43xx_ilt_write32(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
f222313a
JL		 348 } else {
349 /* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */
350 bcm43xx_nrssi_hw_write(bcm, 0xBA98, (s16)0x7654);
351
352 if (phy->rev == 2) {
353 bcm43xx_phy_write(bcm, 0x04C0, 0x1861);
354 bcm43xx_phy_write(bcm, 0x04C1, 0x0271);
355 } else if (phy->rev > 2) {
356 bcm43xx_phy_write(bcm, 0x04C0, 0x0098);
357 bcm43xx_phy_write(bcm, 0x04C1, 0x0070);
358 bcm43xx_phy_write(bcm, 0x04C9, 0x0080);
359 }
360 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x800);
361
362 for (i = 0; i < 64; i++)
73733847 363 bcm43xx_ilt_write(bcm, 0x4000 + i, i);
f222313a 364 for (i = 0; i < BCM43xx_ILT_NOISEG2_SIZE; i++)
73733847 365 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]);
f222313a
JL		 366 }
367
368 if (phy->rev <= 2)
369 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
73733847 370 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]);
a271ca5b 371 else if ((phy->rev >= 7) && (bcm43xx_phy_read(bcm, 0x0449) & 0x0200))
f222313a 372 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
73733847 373 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]);
f222313a
JL		 374 else
375 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
73733847 376 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]);
f222313a
JL		 377
378 if (phy->rev == 2)
379 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
73733847 380 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
a271ca5b 381 else if ((phy->rev > 2) && (phy->rev <= 8))
f222313a 382 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
73733847 383 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]);
f222313a
JL		 384
385 if (phy->rev == 1) {
386 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
a5d79d1e 387 bcm43xx_ilt_write32(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
f222313a 388 for (i = 0; i < 4; i++) {
73733847
MB		 389 bcm43xx_ilt_write(bcm, 0x5404 + i, 0x0020);
390 bcm43xx_ilt_write(bcm, 0x5408 + i, 0x0020);
391 bcm43xx_ilt_write(bcm, 0x540C + i, 0x0020);
392 bcm43xx_ilt_write(bcm, 0x5410 + i, 0x0020);
f222313a
JL		 393 }
394 bcm43xx_phy_agcsetup(bcm);
395
396 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
397 (bcm->board_type == 0x0416) &&
398 (bcm->board_revision == 0x0017))
399 return;
400
73733847
MB		 401 bcm43xx_ilt_write(bcm, 0x5001, 0x0002);
402 bcm43xx_ilt_write(bcm, 0x5002, 0x0001);
f222313a
JL		 403 } else {
404 for (i = 0; i <= 0x2F; i++)
73733847 405 bcm43xx_ilt_write(bcm, 0x1000 + i, 0x0820);
f222313a
JL		 406 bcm43xx_phy_agcsetup(bcm);
407 bcm43xx_phy_read(bcm, 0x0400); /* dummy read */
408 bcm43xx_phy_write(bcm, 0x0403, 0x1000);
73733847
MB		 409 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
410 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
f222313a
JL		 411
412 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
413 (bcm->board_type == 0x0416) &&
414 (bcm->board_revision == 0x0017))
415 return;
416
73733847
MB		 417 bcm43xx_ilt_write(bcm, 0x0401, 0x0002);
418 bcm43xx_ilt_write(bcm, 0x0402, 0x0001);
f222313a
JL		 419 }
420}
421
422/* Initialize the noisescaletable for APHY */
423static void bcm43xx_phy_init_noisescaletbl(struct bcm43xx_private *bcm)
424{
e9357c05 425 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 426 int i;
427
428 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, 0x1400);
429 for (i = 0; i < 12; i++) {
430 if (phy->rev == 2)
431 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
432 else
433 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
434 }
435 if (phy->rev == 2)
436 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6700);
437 else
438 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2300);
439 for (i = 0; i < 11; i++) {
440 if (phy->rev == 2)
441 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
442 else
443 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
444 }
445 if (phy->rev == 2)
446 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0067);
447 else
448 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0023);
449}
450
451static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm)
452{
e9357c05 453 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 454 u16 i;
455
e9357c05
MB		 456 assert(phy->type == BCM43xx_PHYTYPE_A);
457 switch (phy->rev) {
f222313a
JL		 458 case 2:
459 bcm43xx_phy_write(bcm, 0x008E, 0x3800);
460 bcm43xx_phy_write(bcm, 0x0035, 0x03FF);
461 bcm43xx_phy_write(bcm, 0x0036, 0x0400);
462
73733847 463 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
f222313a
JL		 464
465 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
466 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
73733847 467 bcm43xx_ilt_write(bcm, 0x3C0C, 0x07BF);
f222313a
JL		 468 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
469
470 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
471 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
472 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
473 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
474
475 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
476 bcm43xx_phy_write(bcm, 0x002B, bcm43xx_phy_read(bcm, 0x002B) & 0xFBFF);
477 bcm43xx_phy_write(bcm, 0x008E, 0x58C1);
478
73733847
MB		 479 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
480 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
481 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
482 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
483 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
f222313a 484
73733847
MB		 485 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
486 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
487 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
488 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
489 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
490 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
491 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
f222313a 492
73733847
MB		 493 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
494 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
495 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
f222313a
JL		 496
497 for (i = 0; i < 16; i++)
73733847 498 bcm43xx_ilt_write(bcm, 0x4000 + i, (0x8 + i) & 0x000F);
f222313a 499
73733847
MB		 500 bcm43xx_ilt_write(bcm, 0x3003, 0x1044);
501 bcm43xx_ilt_write(bcm, 0x3004, 0x7201);
502 bcm43xx_ilt_write(bcm, 0x3006, 0x0040);
503 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
f222313a
JL		 504
505 for (i = 0; i < BCM43xx_ILT_FINEFREQA_SIZE; i++)
73733847 506 bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqa[i]);
f222313a 507 for (i = 0; i < BCM43xx_ILT_NOISEA2_SIZE; i++)
73733847 508 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea2[i]);
f222313a 509 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
a5d79d1e 510 bcm43xx_ilt_write32(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
f222313a
JL		 511 bcm43xx_phy_init_noisescaletbl(bcm);
512 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
a5d79d1e 513 bcm43xx_ilt_write32(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
f222313a
JL		 514 break;
515 case 3:
516 for (i = 0; i < 64; i++)
73733847 517 bcm43xx_ilt_write(bcm, 0x4000 + i, i);
f222313a 518
73733847 519 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
f222313a
JL		 520
521 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
522 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
523 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
524
525 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
526 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
527 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
528 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
529 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
530
73733847 531 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
f222313a 532 for (i = 0; i < BCM43xx_ILT_NOISEA3_SIZE; i++)
73733847 533 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea3[i]);
f222313a
JL		 534 bcm43xx_phy_init_noisescaletbl(bcm);
535 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
73733847 536 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
f222313a
JL		 537
538 bcm43xx_phy_write(bcm, 0x0003, 0x1808);
539
73733847
MB		 540 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
541 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
542 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
543 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
544 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
545
546 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
547 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
548 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
549 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
550 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
551 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
552 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
553
554 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
555 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
556 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
557
558 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
559 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
f222313a
JL		 560 break;
561 default:
562 assert(0);
563 }
564}
565
566/* Initialize APHY. This is also called for the GPHY in some cases. */
567static void bcm43xx_phy_inita(struct bcm43xx_private *bcm)
568{
e9357c05
MB		 569 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
570 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
f222313a
JL		 571 u16 tval;
572
573 if (phy->type == BCM43xx_PHYTYPE_A) {
574 bcm43xx_phy_setupa(bcm);
575 } else {
576 bcm43xx_phy_setupg(bcm);
577 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
578 bcm43xx_phy_write(bcm, 0x046E, 0x03CF);
579 return;
580 }
581
582 bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
583 (bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) & 0xF83C) | 0x0340);
584 bcm43xx_phy_write(bcm, 0x0034, 0x0001);
585
586 TODO();//TODO: RSSI AGC
587 bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
588 bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) | (1 << 14));
589 bcm43xx_radio_init2060(bcm);
590
591 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM)
592 && ((bcm->board_type == 0x0416) || (bcm->board_type == 0x040A))) {
e9357c05 593 if (radio->lofcal == 0xFFFF) {
f222313a
JL		 594 TODO();//TODO: LOF Cal
595 bcm43xx_radio_set_tx_iq(bcm);
596 } else
e9357c05 597 bcm43xx_radio_write16(bcm, 0x001E, radio->lofcal);
f222313a
JL		 598 }
599
600 bcm43xx_phy_write(bcm, 0x007A, 0xF111);
601
602 if (phy->savedpctlreg == 0xFFFF) {
603 bcm43xx_radio_write16(bcm, 0x0019, 0x0000);
604 bcm43xx_radio_write16(bcm, 0x0017, 0x0020);
605
73733847 606 tval = bcm43xx_ilt_read(bcm, 0x3001);
f222313a 607 if (phy->rev == 1) {
73733847
MB		 608 bcm43xx_ilt_write(bcm, 0x3001,
609 (bcm43xx_ilt_read(bcm, 0x3001) & 0xFF87)
610 | 0x0058);
f222313a 611 } else {
73733847
MB		 612 bcm43xx_ilt_write(bcm, 0x3001,
613 (bcm43xx_ilt_read(bcm, 0x3001) & 0xFFC3)
614 | 0x002C);
f222313a
JL		 615 }
616 bcm43xx_dummy_transmission(bcm);
617 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_A_PCTL);
73733847 618 bcm43xx_ilt_write(bcm, 0x3001, tval);
f222313a
JL		 619
620 bcm43xx_radio_set_txpower_a(bcm, 0x0018);
621 }
622 bcm43xx_radio_clear_tssi(bcm);
623}
624
625static void bcm43xx_phy_initb2(struct bcm43xx_private *bcm)
626{
e9357c05 627 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
f222313a
JL		 628 u16 offset, val;
629
630 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
631 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
632 bcm43xx_phy_write(bcm, 0x0026, 0x0000);
633 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
634 bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
635 val = 0x3C3D;
636 for (offset = 0x0089; offset < 0x00A7; offset++) {
637 bcm43xx_phy_write(bcm, offset, val);
638 val -= 0x0202;
639 }
640 bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
641 if (radio->channel == 0xFF)
642 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
643 else
644 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
645 if (radio->version != 0x2050) {
646 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
647 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
648 }
649 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
650 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
651 if (radio->version == 0x2050) {
652 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
653 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
654 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
655 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
656 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
657 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
658 bcm43xx_radio_init2050(bcm);
659 }
660 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
661 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
662 bcm43xx_phy_write(bcm, 0x0032, 0x00CC);
663 bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
664 bcm43xx_phy_lo_b_measure(bcm);
665 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
666 if (radio->version != 0x2050)
667 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
668 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1000);
669 bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
670 if (radio->version != 0x2050)
671 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
672 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
673 bcm43xx_phy_init_pctl(bcm);
674}
675
676static void bcm43xx_phy_initb4(struct bcm43xx_private *bcm)
677{
e9357c05 678 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
f222313a
JL		 679 u16 offset, val;
680
681 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
682 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
683 bcm43xx_phy_write(bcm, 0x0026, 0x0000);
684 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
685 bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
686 val = 0x3C3D;
687 for (offset = 0x0089; offset < 0x00A7; offset++) {
688 bcm43xx_phy_write(bcm, offset, val);
689 val -= 0x0202;
690 }
691 bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
692 if (radio->channel == 0xFF)
693 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
694 else
695 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
696 if (radio->version != 0x2050) {
697 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
698 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
699 }
700 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
701 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
702 if (radio->version == 0x2050) {
703 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
704 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
705 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
706 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
707 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
708 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
709 bcm43xx_radio_init2050(bcm);
710 }
711 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
712 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
713 if (radio->version == 0x2050)
714 bcm43xx_phy_write(bcm, 0x0032, 0x00E0);
715 bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
716
717 bcm43xx_phy_lo_b_measure(bcm);
718
719 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
720 if (radio->version == 0x2050)
721 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
722 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1100);
723 bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
724 if (radio->version == 0x2050)
725 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
726 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
727 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
728 bcm43xx_calc_nrssi_slope(bcm);
729 bcm43xx_calc_nrssi_threshold(bcm);
730 }
731 bcm43xx_phy_init_pctl(bcm);
732}
733
734static void bcm43xx_phy_initb5(struct bcm43xx_private *bcm)
735{
e9357c05
MB		 736 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
737 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
f222313a 738 u16 offset;
740ac4fb
LF		 739 u16 value;
740 u8 old_channel;
f222313a 741
740ac4fb 742 if (phy->analog == 1)
f222313a
JL		 743 bcm43xx_radio_write16(bcm, 0x007A,
744 bcm43xx_radio_read16(bcm, 0x007A)
745 | 0x0050);
f222313a
JL		 746 if ((bcm->board_vendor != PCI_VENDOR_ID_BROADCOM) &&
747 (bcm->board_type != 0x0416)) {
740ac4fb 748 value = 0x2120;
f222313a 749 for (offset = 0x00A8 ; offset < 0x00C7; offset++) {
740ac4fb
LF		 750 bcm43xx_phy_write(bcm, offset, value);
751 value += 0x0202;
f222313a
JL		 752 }
753 }
754 bcm43xx_phy_write(bcm, 0x0035,
755 (bcm43xx_phy_read(bcm, 0x0035) & 0xF0FF)
756 | 0x0700);
757 if (radio->version == 0x2050)
758 bcm43xx_phy_write(bcm, 0x0038, 0x0667);
759
83b5db89 760 if (phy->connected) {
f222313a
JL		 761 if (radio->version == 0x2050) {
762 bcm43xx_radio_write16(bcm, 0x007A,
763 bcm43xx_radio_read16(bcm, 0x007A)
764 | 0x0020);
765 bcm43xx_radio_write16(bcm, 0x0051,
766 bcm43xx_radio_read16(bcm, 0x0051)
767 | 0x0004);
768 }
769 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO, 0x0000);
770
771 bcm43xx_phy_write(bcm, 0x0802, bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
772 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
773
774 bcm43xx_phy_write(bcm, 0x001C, 0x186A);
775
776 bcm43xx_phy_write(bcm, 0x0013, (bcm43xx_phy_read(bcm, 0x0013) & 0x00FF) | 0x1900);
777 bcm43xx_phy_write(bcm, 0x0035, (bcm43xx_phy_read(bcm, 0x0035) & 0xFFC0) | 0x0064);
778 bcm43xx_phy_write(bcm, 0x005D, (bcm43xx_phy_read(bcm, 0x005D) & 0xFF80) | 0x000A);
779 }
780
781 if (bcm->bad_frames_preempt) {
782 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
783 bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | (1 << 11));
784 }
785
740ac4fb 786 if (phy->analog == 1) {
f222313a
JL		 787 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
788 bcm43xx_phy_write(bcm, 0x0021, 0x3763);
789 bcm43xx_phy_write(bcm, 0x0022, 0x1BC3);
790 bcm43xx_phy_write(bcm, 0x0023, 0x06F9);
791 bcm43xx_phy_write(bcm, 0x0024, 0x037E);
792 } else
793 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
794 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
795 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
796
740ac4fb 797 if (phy->analog == 1)
f222313a
JL		 798 bcm43xx_phy_write(bcm, 0x0020, 0x3E1C);
799 else
800 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
801
740ac4fb 802 if (phy->analog == 0)
f222313a
JL		 803 bcm43xx_write16(bcm, 0x03E4, 0x3000);
804
740ac4fb 805 old_channel = radio->channel;
f222313a
JL		 806 /* Force to channel 7, even if not supported. */
807 bcm43xx_radio_selectchannel(bcm, 7, 0);
808
809 if (radio->version != 0x2050) {
810 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
811 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
812 }
813
814 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
815 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
816
817 if (radio->version == 0x2050) {
818 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
819 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
820 }
821
822 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
823 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
824
825 bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0007);
826
740ac4fb 827 bcm43xx_radio_selectchannel(bcm, old_channel, 0);
f222313a
JL		 828
829 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
830 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
740ac4fb 831 bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
f222313a
JL		 832
833 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
834
835 if (radio->version == 0x2050)
836 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
837
838 bcm43xx_write16(bcm, 0x03E4, (bcm43xx_read16(bcm, 0x03E4) & 0xFFC0) | 0x0004);
839}
840
841static void bcm43xx_phy_initb6(struct bcm43xx_private *bcm)
842{
e9357c05
MB		 843 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
844 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
f222313a 845 u16 offset, val;
740ac4fb 846 u8 old_channel;
f222313a
JL		 847
848 bcm43xx_phy_write(bcm, 0x003E, 0x817A);
849 bcm43xx_radio_write16(bcm, 0x007A,
850 (bcm43xx_radio_read16(bcm, 0x007A) | 0x0058));
740ac4fb
LF		 851 if (radio->revision == 4 ||
852 radio->revision == 5) {
853 bcm43xx_radio_write16(bcm, 0x0051, 0x0037);
854 bcm43xx_radio_write16(bcm, 0x0052, 0x0070);
855 bcm43xx_radio_write16(bcm, 0x0053, 0x00B3);
856 bcm43xx_radio_write16(bcm, 0x0054, 0x009B);
f222313a
JL		 857 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
858 bcm43xx_radio_write16(bcm, 0x005B, 0x0088);
859 bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
860 bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
861 bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
01a59776
LF		 862 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
863 BCM43xx_UCODEFLAGS_OFFSET,
864 (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
865 BCM43xx_UCODEFLAGS_OFFSET)
866 | 0x00000200));
f222313a 867 }
740ac4fb 868 if (radio->revision == 8) {
f222313a
JL		 869 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
870 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
871 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
872 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
873 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
874 bcm43xx_radio_write16(bcm, 0x005B, 0x006B);
875 bcm43xx_radio_write16(bcm, 0x005C, 0x000F);
876 if (bcm->sprom.boardflags & 0x8000) {
877 bcm43xx_radio_write16(bcm, 0x005D, 0x00FA);
878 bcm43xx_radio_write16(bcm, 0x005E, 0x00D8);
879 } else {
880 bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
881 bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
882 }
883 bcm43xx_radio_write16(bcm, 0x0073, 0x0003);
884 bcm43xx_radio_write16(bcm, 0x007D, 0x00A8);
885 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
886 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
887 }
888 val = 0x1E1F;
889 for (offset = 0x0088; offset < 0x0098; offset++) {
890 bcm43xx_phy_write(bcm, offset, val);
891 val -= 0x0202;
892 }
893 val = 0x3E3F;
894 for (offset = 0x0098; offset < 0x00A8; offset++) {
895 bcm43xx_phy_write(bcm, offset, val);
896 val -= 0x0202;
897 }
898 val = 0x2120;
899 for (offset = 0x00A8; offset < 0x00C8; offset++) {
900 bcm43xx_phy_write(bcm, offset, (val & 0x3F3F));
901 val += 0x0202;
902 }
903 if (phy->type == BCM43xx_PHYTYPE_G) {
904 bcm43xx_radio_write16(bcm, 0x007A,
905 bcm43xx_radio_read16(bcm, 0x007A) | 0x0020);
906 bcm43xx_radio_write16(bcm, 0x0051,
907 bcm43xx_radio_read16(bcm, 0x0051) | 0x0004);
908 bcm43xx_phy_write(bcm, 0x0802,
909 bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
910 bcm43xx_phy_write(bcm, 0x042B,
911 bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
740ac4fb
LF		 912 bcm43xx_phy_write(bcm, 0x5B, 0x0000);
913 bcm43xx_phy_write(bcm, 0x5C, 0x0000);
f222313a
JL		 914 }
915
740ac4fb
LF		 916 old_channel = radio->channel;
917 if (old_channel >= 8)
918 bcm43xx_radio_selectchannel(bcm, 1, 0);
919 else
920 bcm43xx_radio_selectchannel(bcm, 13, 0);
f222313a
JL		 921
922 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
923 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
924 udelay(40);
740ac4fb
LF		 925 if (radio->revision < 6 || radio-> revision == 8) {
926 bcm43xx_radio_write16(bcm, 0x007C, (bcm43xx_radio_read16(bcm, 0x007C)
927 | 0x0002));
f222313a 928 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
740ac4fb
LF		 929 }
930 if (radio->revision <= 2) {
931 bcm43xx_radio_write16(bcm, 0x007C, 0x0020);
f222313a
JL		 932 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
933 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
934 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
935 }
936 bcm43xx_radio_write16(bcm, 0x007A,
937 (bcm43xx_radio_read16(bcm, 0x007A) & 0x00F8) | 0x0007);
938
740ac4fb 939 bcm43xx_radio_selectchannel(bcm, old_channel, 0);
f222313a
JL		 940
941 bcm43xx_phy_write(bcm, 0x0014, 0x0200);
740ac4fb
LF		 942 if (radio->revision >= 6)
943 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
944 else
945 bcm43xx_phy_write(bcm, 0x002A, 0x8AC0);
f222313a
JL		 946 bcm43xx_phy_write(bcm, 0x0038, 0x0668);
947 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
740ac4fb 948 if (radio->revision <= 5)
01a59776
LF		 949 bcm43xx_phy_write(bcm, 0x005D, (bcm43xx_phy_read(bcm, 0x005D)
950 & 0xFF80) | 0x0003);
740ac4fb
LF		 951 if (radio->revision <= 2)
952 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
f222313a 953
740ac4fb 954 if (phy->analog == 4){
f222313a 955 bcm43xx_write16(bcm, 0x03E4, 0x0009);
740ac4fb
LF		 956 bcm43xx_phy_write(bcm, 0x61, bcm43xx_phy_read(bcm, 0x61) & 0xFFF);
957 } else {
958 bcm43xx_phy_write(bcm, 0x0002, (bcm43xx_phy_read(bcm, 0x0002) & 0xFFC0) | 0x0004);
959 }
960 if (phy->type == BCM43xx_PHYTYPE_G)
961 bcm43xx_write16(bcm, 0x03E6, 0x0);
f222313a
JL		 962 if (phy->type == BCM43xx_PHYTYPE_B) {
963 bcm43xx_write16(bcm, 0x03E6, 0x8140);
67093a65
DD		 964 bcm43xx_phy_write(bcm, 0x0016, 0x0410);
965 bcm43xx_phy_write(bcm, 0x0017, 0x0820);
966 bcm43xx_phy_write(bcm, 0x0062, 0x0007);
01a59776 967 bcm43xx_radio_init2050(bcm);
740ac4fb 968 bcm43xx_phy_lo_g_measure(bcm);
67093a65
DD		 969 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
970 bcm43xx_calc_nrssi_slope(bcm);
971 bcm43xx_calc_nrssi_threshold(bcm);
972 }
f222313a 973 bcm43xx_phy_init_pctl(bcm);
740ac4fb 974 }
f222313a
JL		 975}
976
adc40e97
MB		 977static void bcm43xx_calc_loopback_gain(struct bcm43xx_private *bcm)
978{
979 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
980 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
981 u16 backup_phy[15];
982 u16 backup_radio[3];
983 u16 backup_bband;
984 u16 i;
985 u16 loop1_cnt, loop1_done, loop1_omitted;
986 u16 loop2_done;
987
988 backup_phy[0] = bcm43xx_phy_read(bcm, 0x0429);
989 backup_phy[1] = bcm43xx_phy_read(bcm, 0x0001);
990 backup_phy[2] = bcm43xx_phy_read(bcm, 0x0811);
991 backup_phy[3] = bcm43xx_phy_read(bcm, 0x0812);
992 backup_phy[4] = bcm43xx_phy_read(bcm, 0x0814);
993 backup_phy[5] = bcm43xx_phy_read(bcm, 0x0815);
994 backup_phy[6] = bcm43xx_phy_read(bcm, 0x005A);
995 backup_phy[7] = bcm43xx_phy_read(bcm, 0x0059);
996 backup_phy[8] = bcm43xx_phy_read(bcm, 0x0058);
997 backup_phy[9] = bcm43xx_phy_read(bcm, 0x000A);
998 backup_phy[10] = bcm43xx_phy_read(bcm, 0x0003);
999 backup_phy[11] = bcm43xx_phy_read(bcm, 0x080F);
1000 backup_phy[12] = bcm43xx_phy_read(bcm, 0x0810);
1001 backup_phy[13] = bcm43xx_phy_read(bcm, 0x002B);
1002 backup_phy[14] = bcm43xx_phy_read(bcm, 0x0015);
1003 bcm43xx_phy_read(bcm, 0x002D); /* dummy read */
1004 backup_bband = radio->baseband_atten;
1005 backup_radio[0] = bcm43xx_radio_read16(bcm, 0x0052);
1006 backup_radio[1] = bcm43xx_radio_read16(bcm, 0x0043);
1007 backup_radio[2] = bcm43xx_radio_read16(bcm, 0x007A);
1008
1009 bcm43xx_phy_write(bcm, 0x0429,
1010 bcm43xx_phy_read(bcm, 0x0429) & 0x3FFF);
1011 bcm43xx_phy_write(bcm, 0x0001,
1012 bcm43xx_phy_read(bcm, 0x0001) & 0x8000);
1013 bcm43xx_phy_write(bcm, 0x0811,
1014 bcm43xx_phy_read(bcm, 0x0811) | 0x0002);
1015 bcm43xx_phy_write(bcm, 0x0812,
1016 bcm43xx_phy_read(bcm, 0x0812) & 0xFFFD);
1017 bcm43xx_phy_write(bcm, 0x0811,
1018 bcm43xx_phy_read(bcm, 0x0811) | 0x0001);
1019 bcm43xx_phy_write(bcm, 0x0812,
1020 bcm43xx_phy_read(bcm, 0x0812) & 0xFFFE);
1021 bcm43xx_phy_write(bcm, 0x0814,
1022 bcm43xx_phy_read(bcm, 0x0814) | 0x0001);
1023 bcm43xx_phy_write(bcm, 0x0815,
1024 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFE);
1025 bcm43xx_phy_write(bcm, 0x0814,
1026 bcm43xx_phy_read(bcm, 0x0814) | 0x0002);
1027 bcm43xx_phy_write(bcm, 0x0815,
1028 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFD);
1029 bcm43xx_phy_write(bcm, 0x0811,
1030 bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
1031 bcm43xx_phy_write(bcm, 0x0812,
1032 bcm43xx_phy_read(bcm, 0x0812) | 0x000C);
1033
1034 bcm43xx_phy_write(bcm, 0x0811,
1035 (bcm43xx_phy_read(bcm, 0x0811)
1036 & 0xFFCF) | 0x0030);
1037 bcm43xx_phy_write(bcm, 0x0812,
1038 (bcm43xx_phy_read(bcm, 0x0812)
1039 & 0xFFCF) | 0x0010);
1040
1041 bcm43xx_phy_write(bcm, 0x005A, 0x0780);
1042 bcm43xx_phy_write(bcm, 0x0059, 0xC810);
1043 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
740ac4fb 1044 if (phy->analog == 0) {
adc40e97
MB		 1045 bcm43xx_phy_write(bcm, 0x0003, 0x0122);
1046 } else {
1047 bcm43xx_phy_write(bcm, 0x000A,
1048 bcm43xx_phy_read(bcm, 0x000A)
1049 | 0x2000);
1050 }
1051 bcm43xx_phy_write(bcm, 0x0814,
1052 bcm43xx_phy_read(bcm, 0x0814) | 0x0004);
1053 bcm43xx_phy_write(bcm, 0x0815,
1054 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFB);
1055 bcm43xx_phy_write(bcm, 0x0003,
1056 (bcm43xx_phy_read(bcm, 0x0003)
1057 & 0xFF9F) | 0x0040);
1058 if (radio->version == 0x2050 && radio->revision == 2) {
1059 bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1060 bcm43xx_radio_write16(bcm, 0x0043,
1061 (bcm43xx_radio_read16(bcm, 0x0043)
1062 & 0xFFF0) | 0x0009);
1063 loop1_cnt = 9;
1064 } else if (radio->revision == 8) {
1065 bcm43xx_radio_write16(bcm, 0x0043, 0x000F);
1066 loop1_cnt = 15;
1067 } else
1068 loop1_cnt = 0;
1069
1070 bcm43xx_phy_set_baseband_attenuation(bcm, 11);
1071
1072 if (phy->rev >= 3)
1073 bcm43xx_phy_write(bcm, 0x080F, 0xC020);
1074 else
1075 bcm43xx_phy_write(bcm, 0x080F, 0x8020);
1076 bcm43xx_phy_write(bcm, 0x0810, 0x0000);
1077
1078 bcm43xx_phy_write(bcm, 0x002B,
1079 (bcm43xx_phy_read(bcm, 0x002B)
1080 & 0xFFC0) | 0x0001);
1081 bcm43xx_phy_write(bcm, 0x002B,
1082 (bcm43xx_phy_read(bcm, 0x002B)
1083 & 0xC0FF) | 0x0800);
1084 bcm43xx_phy_write(bcm, 0x0811,
1085 bcm43xx_phy_read(bcm, 0x0811) | 0x0100);
1086 bcm43xx_phy_write(bcm, 0x0812,
1087 bcm43xx_phy_read(bcm, 0x0812) & 0xCFFF);
1088 if (bcm->sprom.boardflags & BCM43xx_BFL_EXTLNA) {
1089 if (phy->rev >= 7) {
1090 bcm43xx_phy_write(bcm, 0x0811,
1091 bcm43xx_phy_read(bcm, 0x0811)
1092 | 0x0800);
1093 bcm43xx_phy_write(bcm, 0x0812,
1094 bcm43xx_phy_read(bcm, 0x0812)
1095 | 0x8000);
1096 }
1097 }
1098 bcm43xx_radio_write16(bcm, 0x007A,
1099 bcm43xx_radio_read16(bcm, 0x007A)
1100 & 0x00F7);
1101
1102 for (i = 0; i < loop1_cnt; i++) {
1103 bcm43xx_radio_write16(bcm, 0x0043, loop1_cnt);
1104 bcm43xx_phy_write(bcm, 0x0812,
1105 (bcm43xx_phy_read(bcm, 0x0812)
1106 & 0xF0FF) | (i << 8));
1107 bcm43xx_phy_write(bcm, 0x0015,
1108 (bcm43xx_phy_read(bcm, 0x0015)
1109 & 0x0FFF) | 0xA000);
1110 bcm43xx_phy_write(bcm, 0x0015,
1111 (bcm43xx_phy_read(bcm, 0x0015)
1112 & 0x0FFF) | 0xF000);
1113 udelay(20);
1114 if (bcm43xx_phy_read(bcm, 0x002D) >= 0x0DFC)
1115 break;
1116 }
1117 loop1_done = i;
1118 loop1_omitted = loop1_cnt - loop1_done;
1119
1120 loop2_done = 0;
1121 if (loop1_done >= 8) {
1122 bcm43xx_phy_write(bcm, 0x0812,
1123 bcm43xx_phy_read(bcm, 0x0812)
1124 | 0x0030);
1125 for (i = loop1_done - 8; i < 16; i++) {
1126 bcm43xx_phy_write(bcm, 0x0812,
1127 (bcm43xx_phy_read(bcm, 0x0812)
1128 & 0xF0FF) | (i << 8));
1129 bcm43xx_phy_write(bcm, 0x0015,
1130 (bcm43xx_phy_read(bcm, 0x0015)
1131 & 0x0FFF) | 0xA000);
1132 bcm43xx_phy_write(bcm, 0x0015,
1133 (bcm43xx_phy_read(bcm, 0x0015)
1134 & 0x0FFF) | 0xF000);
1135 udelay(20);
1136 if (bcm43xx_phy_read(bcm, 0x002D) >= 0x0DFC)
1137 break;
1138 }
1139 }
1140
1141 bcm43xx_phy_write(bcm, 0x0814, backup_phy[4]);
1142 bcm43xx_phy_write(bcm, 0x0815, backup_phy[5]);
1143 bcm43xx_phy_write(bcm, 0x005A, backup_phy[6]);
1144 bcm43xx_phy_write(bcm, 0x0059, backup_phy[7]);
1145 bcm43xx_phy_write(bcm, 0x0058, backup_phy[8]);
1146 bcm43xx_phy_write(bcm, 0x000A, backup_phy[9]);
1147 bcm43xx_phy_write(bcm, 0x0003, backup_phy[10]);
1148 bcm43xx_phy_write(bcm, 0x080F, backup_phy[11]);
1149 bcm43xx_phy_write(bcm, 0x0810, backup_phy[12]);
1150 bcm43xx_phy_write(bcm, 0x002B, backup_phy[13]);
1151 bcm43xx_phy_write(bcm, 0x0015, backup_phy[14]);
1152
1153 bcm43xx_phy_set_baseband_attenuation(bcm, backup_bband);
1154
1155 bcm43xx_radio_write16(bcm, 0x0052, backup_radio[0]);
1156 bcm43xx_radio_write16(bcm, 0x0043, backup_radio[1]);
1157 bcm43xx_radio_write16(bcm, 0x007A, backup_radio[2]);
1158
1159 bcm43xx_phy_write(bcm, 0x0811, backup_phy[2] | 0x0003);
1160 udelay(10);
1161 bcm43xx_phy_write(bcm, 0x0811, backup_phy[2]);
1162 bcm43xx_phy_write(bcm, 0x0812, backup_phy[3]);
1163 bcm43xx_phy_write(bcm, 0x0429, backup_phy[0]);
1164 bcm43xx_phy_write(bcm, 0x0001, backup_phy[1]);
1165
1166 phy->loopback_gain[0] = ((loop1_done * 6) - (loop1_omitted * 4)) - 11;
1167 phy->loopback_gain[1] = (24 - (3 * loop2_done)) * 2;
1168}
1169
f222313a
JL		 1170static void bcm43xx_phy_initg(struct bcm43xx_private *bcm)
1171{
e9357c05
MB		 1172 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1173 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
f222313a 1174 u16 tmp;
adc40e97 1175
f222313a
JL		 1176 if (phy->rev == 1)
1177 bcm43xx_phy_initb5(bcm);
a271ca5b 1178 else
f222313a
JL		 1179 bcm43xx_phy_initb6(bcm);
1180 if (phy->rev >= 2 || phy->connected)
1181 bcm43xx_phy_inita(bcm);
1182
1183 if (phy->rev >= 2) {
1184 bcm43xx_phy_write(bcm, 0x0814, 0x0000);
1185 bcm43xx_phy_write(bcm, 0x0815, 0x0000);
740ac4fb
LF		 1186 }
1187 if (phy->rev == 2) {
1188 bcm43xx_phy_write(bcm, 0x0811, 0x0000);
f222313a 1189 bcm43xx_phy_write(bcm, 0x0015, 0x00C0);
740ac4fb
LF		 1190 }
1191 if (phy->rev >= 3) {
1192 bcm43xx_phy_write(bcm, 0x0811, 0x0400);
1193 bcm43xx_phy_write(bcm, 0x0015, 0x00C0);
1194 }
83b5db89 1195 if (phy->rev >= 2 && phy->connected) {
740ac4fb
LF		 1196 tmp = bcm43xx_phy_read(bcm, 0x0400) & 0xFF;
1197 if (tmp < 6) {
1198 bcm43xx_phy_write(bcm, 0x04C2, 0x1816);
1199 bcm43xx_phy_write(bcm, 0x04C3, 0x8006);
1200 if (tmp != 3) {
1201 bcm43xx_phy_write(bcm, 0x04CC,
1202 (bcm43xx_phy_read(bcm, 0x04CC)
1203 & 0x00FF) | 0x1F00);
adc40e97 1204 }
f222313a
JL		 1205 }
1206 }
adc40e97 1207 if (phy->rev < 3 && phy->connected)
f222313a 1208 bcm43xx_phy_write(bcm, 0x047E, 0x0078);
740ac4fb 1209 if (radio->revision == 8) {
f222313a
JL		 1210 bcm43xx_phy_write(bcm, 0x0801, bcm43xx_phy_read(bcm, 0x0801) | 0x0080);
1211 bcm43xx_phy_write(bcm, 0x043E, bcm43xx_phy_read(bcm, 0x043E) | 0x0004);
1212 }
adc40e97
MB		 1213 if (phy->rev >= 2 && phy->connected)
1214 bcm43xx_calc_loopback_gain(bcm);
1215 if (radio->revision != 8) {
1216 if (radio->initval == 0xFFFF)
1217 radio->initval = bcm43xx_radio_init2050(bcm);
1218 else
1219 bcm43xx_radio_write16(bcm, 0x0078, radio->initval);
1220 }
1221 if (radio->txctl2 == 0xFFFF) {
f222313a
JL		 1222 bcm43xx_phy_lo_g_measure(bcm);
1223 } else {
adc40e97 1224 if (radio->version == 0x2050 && radio->revision == 8) {
a271ca5b
LF		 1225 bcm43xx_radio_write16(bcm, 0x0052,
1226 (radio->txctl1 << 4) | radio->txctl2);
adc40e97
MB		 1227 } else {
1228 bcm43xx_radio_write16(bcm, 0x0052,
1229 (bcm43xx_radio_read16(bcm, 0x0052)
1230 & 0xFFF0) | radio->txctl1);
1231 }
1232 if (phy->rev >= 6) {
adc40e97
MB		 1233 bcm43xx_phy_write(bcm, 0x0036,
1234 (bcm43xx_phy_read(bcm, 0x0036)
a271ca5b 1235 & 0xF000) | (radio->txctl2 << 12));
adc40e97 1236 }
f222313a 1237 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
f222313a 1238 bcm43xx_phy_write(bcm, 0x002E, 0x8075);
adc40e97 1239 else
a271ca5b 1240 bcm43xx_phy_write(bcm, 0x002E, 0x807F);
f222313a
JL		 1241 if (phy->rev < 2)
1242 bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1243 else
1244 bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1245 }
adc40e97
MB		 1246 if (phy->connected) {
1247 bcm43xx_phy_lo_adjust(bcm, 0);
1248 bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1249 }
f222313a 1250
8afceb1e
MB		 1251 if (!(bcm->sprom.boardflags & BCM43xx_BFL_RSSI)) {
1252 /* The specs state to update the NRSSI LT with
1253 * the value 0x7FFFFFFF here. I think that is some weird
1254 * compiler optimization in the original driver.
1255 * Essentially, what we do here is resetting all NRSSI LT
1256 * entries to -32 (see the limit_value() in nrssi_hw_update())
1257 */
1258 bcm43xx_nrssi_hw_update(bcm, 0xFFFF);
f222313a
JL		 1259 bcm43xx_calc_nrssi_threshold(bcm);
1260 } else if (phy->connected) {
1261 if (radio->nrssi[0] == -1000) {
1262 assert(radio->nrssi[1] == -1000);
1263 bcm43xx_calc_nrssi_slope(bcm);
adc40e97
MB		 1264 } else {
1265 assert(radio->nrssi[1] != -1000);
f222313a 1266 bcm43xx_calc_nrssi_threshold(bcm);
adc40e97 1267 }
f222313a 1268 }
adc40e97
MB		 1269 if (radio->revision == 8)
1270 bcm43xx_phy_write(bcm, 0x0805, 0x3230);
f222313a 1271 bcm43xx_phy_init_pctl(bcm);
178e0cc5 1272 if (bcm->chip_id == 0x4306 && bcm->chip_package == 2) {
adc40e97
MB		 1273 bcm43xx_phy_write(bcm, 0x0429,
1274 bcm43xx_phy_read(bcm, 0x0429) & 0xBFFF);
1275 bcm43xx_phy_write(bcm, 0x04C3,
1276 bcm43xx_phy_read(bcm, 0x04C3) & 0x7FFF);
1277 }
f222313a
JL		 1278}
1279
1280static u16 bcm43xx_phy_lo_b_r15_loop(struct bcm43xx_private *bcm)
1281{
1282 int i;
1283 u16 ret = 0;
2087da5d 1284 unsigned long flags;
f222313a 1285
2087da5d 1286 local_irq_save(flags);
f222313a
JL		 1287 for (i = 0; i < 10; i++){
1288 bcm43xx_phy_write(bcm, 0x0015, 0xAFA0);
1289 udelay(1);
1290 bcm43xx_phy_write(bcm, 0x0015, 0xEFA0);
1291 udelay(10);
1292 bcm43xx_phy_write(bcm, 0x0015, 0xFFA0);
1293 udelay(40);
1294 ret += bcm43xx_phy_read(bcm, 0x002C);
1295 }
2087da5d
MB		 1296 local_irq_restore(flags);
1297 bcm43xx_voluntary_preempt();
f222313a
JL		 1298
1299 return ret;
1300}
1301
1302void bcm43xx_phy_lo_b_measure(struct bcm43xx_private *bcm)
1303{
e9357c05
MB		 1304 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1305 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 1306 u16 regstack[12] = { 0 };
1307 u16 mls;
1308 u16 fval;
1309 int i, j;
1310
1311 regstack[0] = bcm43xx_phy_read(bcm, 0x0015);
1312 regstack[1] = bcm43xx_radio_read16(bcm, 0x0052) & 0xFFF0;
1313
1314 if (radio->version == 0x2053) {
1315 regstack[2] = bcm43xx_phy_read(bcm, 0x000A);
1316 regstack[3] = bcm43xx_phy_read(bcm, 0x002A);
1317 regstack[4] = bcm43xx_phy_read(bcm, 0x0035);
1318 regstack[5] = bcm43xx_phy_read(bcm, 0x0003);
1319 regstack[6] = bcm43xx_phy_read(bcm, 0x0001);
1320 regstack[7] = bcm43xx_phy_read(bcm, 0x0030);
1321
1322 regstack[8] = bcm43xx_radio_read16(bcm, 0x0043);
1323 regstack[9] = bcm43xx_radio_read16(bcm, 0x007A);
1324 regstack[10] = bcm43xx_read16(bcm, 0x03EC);
1325 regstack[11] = bcm43xx_radio_read16(bcm, 0x0052) & 0x00F0;
1326
1327 bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
1328 bcm43xx_write16(bcm, 0x03EC, 0x3F3F);
1329 bcm43xx_phy_write(bcm, 0x0035, regstack[4] & 0xFF7F);
1330 bcm43xx_radio_write16(bcm, 0x007A, regstack[9] & 0xFFF0);
1331 }
1332 bcm43xx_phy_write(bcm, 0x0015, 0xB000);
1333 bcm43xx_phy_write(bcm, 0x002B, 0x0004);
1334
1335 if (radio->version == 0x2053) {
1336 bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1337 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1338 }
1339
1340 phy->minlowsig[0] = 0xFFFF;
1341
1342 for (i = 0; i < 4; i++) {
1343 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1344 bcm43xx_phy_lo_b_r15_loop(bcm);
1345 }
1346 for (i = 0; i < 10; i++) {
1347 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1348 mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1349 if (mls < phy->minlowsig[0]) {
1350 phy->minlowsig[0] = mls;
1351 phy->minlowsigpos[0] = i;
1352 }
1353 }
1354 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | phy->minlowsigpos[0]);
1355
1356 phy->minlowsig[1] = 0xFFFF;
1357
1358 for (i = -4; i < 5; i += 2) {
1359 for (j = -4; j < 5; j += 2) {
1360 if (j < 0)
1361 fval = (0x0100 * i) + j + 0x0100;
1362 else
1363 fval = (0x0100 * i) + j;
1364 bcm43xx_phy_write(bcm, 0x002F, fval);
1365 mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1366 if (mls < phy->minlowsig[1]) {
1367 phy->minlowsig[1] = mls;
1368 phy->minlowsigpos[1] = fval;
1369 }
1370 }
1371 }
1372 phy->minlowsigpos[1] += 0x0101;
1373
1374 bcm43xx_phy_write(bcm, 0x002F, phy->minlowsigpos[1]);
ea72ab22 1375 if (radio->version == 0x2053) {
f222313a
JL		 1376 bcm43xx_phy_write(bcm, 0x000A, regstack[2]);
1377 bcm43xx_phy_write(bcm, 0x002A, regstack[3]);
1378 bcm43xx_phy_write(bcm, 0x0035, regstack[4]);
1379 bcm43xx_phy_write(bcm, 0x0003, regstack[5]);
1380 bcm43xx_phy_write(bcm, 0x0001, regstack[6]);
1381 bcm43xx_phy_write(bcm, 0x0030, regstack[7]);
1382
1383 bcm43xx_radio_write16(bcm, 0x0043, regstack[8]);
1384 bcm43xx_radio_write16(bcm, 0x007A, regstack[9]);
1385
1386 bcm43xx_radio_write16(bcm, 0x0052,
1387 (bcm43xx_radio_read16(bcm, 0x0052) & 0x000F)
1388 | regstack[11]);
1389
1390 bcm43xx_write16(bcm, 0x03EC, regstack[10]);
1391 }
1392 bcm43xx_phy_write(bcm, 0x0015, regstack[0]);
1393}
1394
1395static inline
1396u16 bcm43xx_phy_lo_g_deviation_subval(struct bcm43xx_private *bcm, u16 control)
1397{
e9357c05 1398 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
91769e7d
MB		 1399 u16 ret;
1400 unsigned long flags;
e9357c05 1401
91769e7d 1402 local_irq_save(flags);
e9357c05 1403 if (phy->connected) {
f222313a
JL		 1404 bcm43xx_phy_write(bcm, 0x15, 0xE300);
1405 control <<= 8;
1406 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B0);
1407 udelay(5);
1408 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B2);
1409 udelay(2);
1410 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B3);
1411 udelay(4);
1412 bcm43xx_phy_write(bcm, 0x0015, 0xF300);
1413 udelay(8);
1414 } else {
1415 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFA0);
1416 udelay(2);
1417 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFE0);
1418 udelay(4);
1419 bcm43xx_phy_write(bcm, 0x0015, control | 0xFFE0);
1420 udelay(8);
1421 }
91769e7d
MB		 1422 ret = bcm43xx_phy_read(bcm, 0x002D);
1423 local_irq_restore(flags);
2087da5d 1424 bcm43xx_voluntary_preempt();
f222313a 1425
91769e7d 1426 return ret;
f222313a
JL		 1427}
1428
1429static u32 bcm43xx_phy_lo_g_singledeviation(struct bcm43xx_private *bcm, u16 control)
1430{
1431 int i;
1432 u32 ret = 0;
1433
1434 for (i = 0; i < 8; i++)
1435 ret += bcm43xx_phy_lo_g_deviation_subval(bcm, control);
1436
1437 return ret;
1438}
1439
1440/* Write the LocalOscillator CONTROL */
1441static inline
1442void bcm43xx_lo_write(struct bcm43xx_private *bcm,
1443 struct bcm43xx_lopair *pair)
1444{
1445 u16 value;
1446
1447 value = (u8)(pair->low);
1448 value |= ((u8)(pair->high)) << 8;
1449
1450#ifdef CONFIG_BCM43XX_DEBUG
1451 /* Sanity check. */
1452 if (pair->low < -8 || pair->low > 8 ||
1453 pair->high < -8 || pair->high > 8) {
1454 printk(KERN_WARNING PFX
1455 "WARNING: Writing invalid LOpair "
1456 "(low: %d, high: %d, index: %lu)\n",
1457 pair->low, pair->high,
e9357c05 1458 (unsigned long)(pair - bcm43xx_current_phy(bcm)->_lo_pairs));
f222313a
JL		 1459 dump_stack();
1460 }
1461#endif
1462
1463 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, value);
1464}
1465
1466static inline
1467struct bcm43xx_lopair * bcm43xx_find_lopair(struct bcm43xx_private *bcm,
1468 u16 baseband_attenuation,
1469 u16 radio_attenuation,
1470 u16 tx)
1471{
1472 static const u8 dict[10] = { 11, 10, 11, 12, 13, 12, 13, 12, 13, 12 };
e9357c05 1473 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 1474
1475 if (baseband_attenuation > 6)
1476 baseband_attenuation = 6;
1477 assert(radio_attenuation < 10);
f222313a
JL		 1478
1479 if (tx == 3) {
1480 return bcm43xx_get_lopair(phy,
1481 radio_attenuation,
1482 baseband_attenuation);
1483 }
1484 return bcm43xx_get_lopair(phy, dict[radio_attenuation], baseband_attenuation);
1485}
1486
1487static inline
1488struct bcm43xx_lopair * bcm43xx_current_lopair(struct bcm43xx_private *bcm)
1489{
e9357c05
MB		 1490 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1491
f222313a 1492 return bcm43xx_find_lopair(bcm,
6ecb2690
MB		 1493 radio->baseband_atten,
1494 radio->radio_atten,
1495 radio->txctl1);
f222313a
JL		 1496}
1497
1498/* Adjust B/G LO */
1499void bcm43xx_phy_lo_adjust(struct bcm43xx_private *bcm, int fixed)
1500{
1501 struct bcm43xx_lopair *pair;
1502
1503 if (fixed) {
1504 /* Use fixed values. Only for initialization. */
1505 pair = bcm43xx_find_lopair(bcm, 2, 3, 0);
1506 } else
1507 pair = bcm43xx_current_lopair(bcm);
1508 bcm43xx_lo_write(bcm, pair);
1509}
1510
e9357c05 1511static void bcm43xx_phy_lo_g_measure_txctl2(struct bcm43xx_private *bcm)
f222313a 1512{
e9357c05 1513 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
f222313a
JL		 1514 u16 txctl2 = 0, i;
1515 u32 smallest, tmp;
1516
1517 bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1518 udelay(10);
1519 smallest = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1520 for (i = 0; i < 16; i++) {
1521 bcm43xx_radio_write16(bcm, 0x0052, i);
1522 udelay(10);
1523 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1524 if (tmp < smallest) {
1525 smallest = tmp;
1526 txctl2 = i;
1527 }
1528 }
6ecb2690 1529 radio->txctl2 = txctl2;
f222313a
JL		 1530}
1531
1532static
1533void bcm43xx_phy_lo_g_state(struct bcm43xx_private *bcm,
1534 const struct bcm43xx_lopair *in_pair,
1535 struct bcm43xx_lopair *out_pair,
1536 u16 r27)
1537{
1538 static const struct bcm43xx_lopair transitions[8] = {
1539 { .high = 1, .low = 1, },
1540 { .high = 1, .low = 0, },
1541 { .high = 1, .low = -1, },
1542 { .high = 0, .low = -1, },
1543 { .high = -1, .low = -1, },
1544 { .high = -1, .low = 0, },
1545 { .high = -1, .low = 1, },
1546 { .high = 0, .low = 1, },
1547 };
1548 struct bcm43xx_lopair lowest_transition = {
1549 .high = in_pair->high,
1550 .low = in_pair->low,
1551 };
1552 struct bcm43xx_lopair tmp_pair;
1553 struct bcm43xx_lopair transition;
1554 int i = 12;
1555 int state = 0;
1556 int found_lower;
1557 int j, begin, end;
1558 u32 lowest_deviation;
1559 u32 tmp;
1560
1561 /* Note that in_pair and out_pair can point to the same pair. Be careful. */
1562
1563 bcm43xx_lo_write(bcm, &lowest_transition);
1564 lowest_deviation = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1565 do {
1566 found_lower = 0;
1567 assert(state >= 0 && state <= 8);
1568 if (state == 0) {
1569 begin = 1;
1570 end = 8;
1571 } else if (state % 2 == 0) {
1572 begin = state - 1;
1573 end = state + 1;
1574 } else {
1575 begin = state - 2;
1576 end = state + 2;
1577 }
1578 if (begin < 1)
1579 begin += 8;
1580 if (end > 8)
1581 end -= 8;
1582
1583 j = begin;
1584 tmp_pair.high = lowest_transition.high;
1585 tmp_pair.low = lowest_transition.low;
1586 while (1) {
1587 assert(j >= 1 && j <= 8);
1588 transition.high = tmp_pair.high + transitions[j - 1].high;
1589 transition.low = tmp_pair.low + transitions[j - 1].low;
1590 if ((abs(transition.low) < 9) && (abs(transition.high) < 9)) {
1591 bcm43xx_lo_write(bcm, &transition);
1592 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1593 if (tmp < lowest_deviation) {
1594 lowest_deviation = tmp;
1595 state = j;
1596 found_lower = 1;
1597
1598 lowest_transition.high = transition.high;
1599 lowest_transition.low = transition.low;
1600 }
1601 }
1602 if (j == end)
1603 break;
1604 if (j == 8)
1605 j = 1;
1606 else
1607 j++;
1608 }
1609 } while (i-- && found_lower);
1610
1611 out_pair->high = lowest_transition.high;
1612 out_pair->low = lowest_transition.low;
1613}
1614
1615/* Set the baseband attenuation value on chip. */
1616void bcm43xx_phy_set_baseband_attenuation(struct bcm43xx_private *bcm,
1617 u16 baseband_attenuation)
1618{
e9357c05 1619 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 1620 u16 value;
1621
740ac4fb 1622 if (phy->analog == 0) {
f222313a
JL		 1623 value = (bcm43xx_read16(bcm, 0x03E6) & 0xFFF0);
1624 value |= (baseband_attenuation & 0x000F);
1625 bcm43xx_write16(bcm, 0x03E6, value);
1626 return;
1627 }
1628
740ac4fb 1629 if (phy->analog > 1) {
f222313a
JL		 1630 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x003C;
1631 value |= (baseband_attenuation << 2) & 0x003C;
1632 } else {
1633 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x0078;
1634 value |= (baseband_attenuation << 3) & 0x0078;
1635 }
1636 bcm43xx_phy_write(bcm, 0x0060, value);
1637}
1638
1639/* http://bcm-specs.sipsolutions.net/LocalOscillator/Measure */
1640void bcm43xx_phy_lo_g_measure(struct bcm43xx_private *bcm)
1641{
1642 static const u8 pairorder[10] = { 3, 1, 5, 7, 9, 2, 0, 4, 6, 8 };
78ff56a0 1643 const int is_initializing = (bcm43xx_status(bcm) == BCM43xx_STAT_INITIALIZING);
e9357c05
MB		 1644 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1645 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
f222313a
JL		 1646 u16 h, i, oldi = 0, j;
1647 struct bcm43xx_lopair control;
1648 struct bcm43xx_lopair *tmp_control;
1649 u16 tmp;
1650 u16 regstack[16] = { 0 };
1651 u8 oldchannel;
1652
1653 //XXX: What are these?
1654 u8 r27 = 0, r31;
1655
1656 oldchannel = radio->channel;
1657 /* Setup */
1658 if (phy->connected) {
1659 regstack[0] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS);
1660 regstack[1] = bcm43xx_phy_read(bcm, 0x0802);
1661 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1662 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1663 }
1664 regstack[3] = bcm43xx_read16(bcm, 0x03E2);
1665 bcm43xx_write16(bcm, 0x03E2, regstack[3] | 0x8000);
1666 regstack[4] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
1667 regstack[5] = bcm43xx_phy_read(bcm, 0x15);
1668 regstack[6] = bcm43xx_phy_read(bcm, 0x2A);
1669 regstack[7] = bcm43xx_phy_read(bcm, 0x35);
1670 regstack[8] = bcm43xx_phy_read(bcm, 0x60);
1671 regstack[9] = bcm43xx_radio_read16(bcm, 0x43);
1672 regstack[10] = bcm43xx_radio_read16(bcm, 0x7A);
1673 regstack[11] = bcm43xx_radio_read16(bcm, 0x52);
1674 if (phy->connected) {
1675 regstack[12] = bcm43xx_phy_read(bcm, 0x0811);
1676 regstack[13] = bcm43xx_phy_read(bcm, 0x0812);
1677 regstack[14] = bcm43xx_phy_read(bcm, 0x0814);
1678 regstack[15] = bcm43xx_phy_read(bcm, 0x0815);
1679 }
1680 bcm43xx_radio_selectchannel(bcm, 6, 0);
1681 if (phy->connected) {
1682 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1683 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1684 bcm43xx_dummy_transmission(bcm);
1685 }
1686 bcm43xx_radio_write16(bcm, 0x0043, 0x0006);
1687
1688 bcm43xx_phy_set_baseband_attenuation(bcm, 2);
1689
1690 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x0000);
1691 bcm43xx_phy_write(bcm, 0x002E, 0x007F);
1692 bcm43xx_phy_write(bcm, 0x080F, 0x0078);
1693 bcm43xx_phy_write(bcm, 0x0035, regstack[7] & ~(1 << 7));
1694 bcm43xx_radio_write16(bcm, 0x007A, regstack[10] & 0xFFF0);
1695 bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1696 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1697 if (phy->connected) {
1698 bcm43xx_phy_write(bcm, 0x0814, regstack[14] | 0x0003);
1699 bcm43xx_phy_write(bcm, 0x0815, regstack[15] & 0xFFFC);
1700 bcm43xx_phy_write(bcm, 0x0811, 0x01B3);
1701 bcm43xx_phy_write(bcm, 0x0812, 0x00B2);
1702 }
1703 if (is_initializing)
1704 bcm43xx_phy_lo_g_measure_txctl2(bcm);
1705 bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1706
1707 /* Measure */
1708 control.low = 0;
1709 control.high = 0;
1710 for (h = 0; h < 10; h++) {
1711 /* Loop over each possible RadioAttenuation (0-9) */
1712 i = pairorder[h];
1713 if (is_initializing) {
1714 if (i == 3) {
1715 control.low = 0;
1716 control.high = 0;
1717 } else if (((i % 2 == 1) && (oldi % 2 == 1)) ||
1718 ((i % 2 == 0) && (oldi % 2 == 0))) {
1719 tmp_control = bcm43xx_get_lopair(phy, oldi, 0);
1720 memcpy(&control, tmp_control, sizeof(control));
1721 } else {
1722 tmp_control = bcm43xx_get_lopair(phy, 3, 0);
1723 memcpy(&control, tmp_control, sizeof(control));
1724 }
1725 }
1726 /* Loop over each possible BasebandAttenuation/2 */
1727 for (j = 0; j < 4; j++) {
1728 if (is_initializing) {
1729 tmp = i * 2 + j;
1730 r27 = 0;
1731 r31 = 0;
1732 if (tmp > 14) {
1733 r31 = 1;
1734 if (tmp > 17)
1735 r27 = 1;
1736 if (tmp > 19)
1737 r27 = 2;
1738 }
1739 } else {
1740 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1741 if (!tmp_control->used)
1742 continue;
1743 memcpy(&control, tmp_control, sizeof(control));
1744 r27 = 3;
1745 r31 = 0;
1746 }
1747 bcm43xx_radio_write16(bcm, 0x43, i);
6ecb2690 1748 bcm43xx_radio_write16(bcm, 0x52, radio->txctl2);
f222313a 1749 udelay(10);
2087da5d 1750 bcm43xx_voluntary_preempt();
f222313a
JL		 1751
1752 bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1753
1754 tmp = (regstack[10] & 0xFFF0);
1755 if (r31)
1756 tmp |= 0x0008;
1757 bcm43xx_radio_write16(bcm, 0x007A, tmp);
1758
1759 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1760 bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1761 }
1762 oldi = i;
1763 }
1764 /* Loop over each possible RadioAttenuation (10-13) */
1765 for (i = 10; i < 14; i++) {
1766 /* Loop over each possible BasebandAttenuation/2 */
1767 for (j = 0; j < 4; j++) {
1768 if (is_initializing) {
1769 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1770 memcpy(&control, tmp_control, sizeof(control));
1771 tmp = (i - 9) * 2 + j - 5;//FIXME: This is wrong, as the following if statement can never trigger.
1772 r27 = 0;
1773 r31 = 0;
1774 if (tmp > 14) {
1775 r31 = 1;
1776 if (tmp > 17)
1777 r27 = 1;
1778 if (tmp > 19)
1779 r27 = 2;
1780 }
1781 } else {
1782 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1783 if (!tmp_control->used)
1784 continue;
1785 memcpy(&control, tmp_control, sizeof(control));
1786 r27 = 3;
1787 r31 = 0;
1788 }
1789 bcm43xx_radio_write16(bcm, 0x43, i - 9);
1790 bcm43xx_radio_write16(bcm, 0x52,
6ecb2690 1791 radio->txctl2
f222313a
JL		 1792 | (3/*txctl1*/ << 4));//FIXME: shouldn't txctl1 be zero here and 3 in the loop above?
1793 udelay(10);
2087da5d 1794 bcm43xx_voluntary_preempt();
f222313a
JL		 1795
1796 bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1797
1798 tmp = (regstack[10] & 0xFFF0);
1799 if (r31)
1800 tmp |= 0x0008;
1801 bcm43xx_radio_write16(bcm, 0x7A, tmp);
1802
1803 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1804 bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1805 }
1806 }
1807
1808 /* Restoration */
1809 if (phy->connected) {
1810 bcm43xx_phy_write(bcm, 0x0015, 0xE300);
1811 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA0);
1812 udelay(5);
1813 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA2);
1814 udelay(2);
1815 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA3);
2087da5d 1816 bcm43xx_voluntary_preempt();
f222313a
JL		 1817 } else
1818 bcm43xx_phy_write(bcm, 0x0015, r27 | 0xEFA0);
1819 bcm43xx_phy_lo_adjust(bcm, is_initializing);
1820 bcm43xx_phy_write(bcm, 0x002E, 0x807F);
1821 if (phy->connected)
1822 bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1823 else
1824 bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1825 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, regstack[4]);
1826 bcm43xx_phy_write(bcm, 0x0015, regstack[5]);
1827 bcm43xx_phy_write(bcm, 0x002A, regstack[6]);
1828 bcm43xx_phy_write(bcm, 0x0035, regstack[7]);
1829 bcm43xx_phy_write(bcm, 0x0060, regstack[8]);
1830 bcm43xx_radio_write16(bcm, 0x0043, regstack[9]);
1831 bcm43xx_radio_write16(bcm, 0x007A, regstack[10]);
1832 regstack[11] &= 0x00F0;
1833 regstack[11] |= (bcm43xx_radio_read16(bcm, 0x52) & 0x000F);
1834 bcm43xx_radio_write16(bcm, 0x52, regstack[11]);
1835 bcm43xx_write16(bcm, 0x03E2, regstack[3]);
1836 if (phy->connected) {
1837 bcm43xx_phy_write(bcm, 0x0811, regstack[12]);
1838 bcm43xx_phy_write(bcm, 0x0812, regstack[13]);
1839 bcm43xx_phy_write(bcm, 0x0814, regstack[14]);
1840 bcm43xx_phy_write(bcm, 0x0815, regstack[15]);
1841 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0]);
1842 bcm43xx_phy_write(bcm, 0x0802, regstack[1]);
1843 }
1844 bcm43xx_radio_selectchannel(bcm, oldchannel, 1);
1845
1846#ifdef CONFIG_BCM43XX_DEBUG
1847 {
1848 /* Sanity check for all lopairs. */
1849 for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1850 tmp_control = phy->_lo_pairs + i;
1851 if (tmp_control->low < -8 || tmp_control->low > 8 ||
1852 tmp_control->high < -8 || tmp_control->high > 8) {
1853 printk(KERN_WARNING PFX
1854 "WARNING: Invalid LOpair (low: %d, high: %d, index: %d)\n",
1855 tmp_control->low, tmp_control->high, i);
1856 }
1857 }
1858 }
1859#endif /* CONFIG_BCM43XX_DEBUG */
1860}
1861
1862static
1863void bcm43xx_phy_lo_mark_current_used(struct bcm43xx_private *bcm)
1864{
1865 struct bcm43xx_lopair *pair;
1866
1867 pair = bcm43xx_current_lopair(bcm);
1868 pair->used = 1;
1869}
1870
1871void bcm43xx_phy_lo_mark_all_unused(struct bcm43xx_private *bcm)
1872{
e9357c05 1873 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 1874 struct bcm43xx_lopair *pair;
1875 int i;
1876
1877 for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1878 pair = phy->_lo_pairs + i;
1879 pair->used = 0;
1880 }
1881}
1882
1883/* http://bcm-specs.sipsolutions.net/EstimatePowerOut
1884 * This function converts a TSSI value to dBm in Q5.2
1885 */
1886static s8 bcm43xx_phy_estimate_power_out(struct bcm43xx_private *bcm, s8 tssi)
1887{
e9357c05 1888 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 1889 s8 dbm = 0;
1890 s32 tmp;
1891
1892 tmp = phy->idle_tssi;
1893 tmp += tssi;
1894 tmp -= phy->savedpctlreg;
1895
1896 switch (phy->type) {
1897 case BCM43xx_PHYTYPE_A:
1898 tmp += 0x80;
1899 tmp = limit_value(tmp, 0x00, 0xFF);
1900 dbm = phy->tssi2dbm[tmp];
1901 TODO(); //TODO: There's a FIXME on the specs
1902 break;
1903 case BCM43xx_PHYTYPE_B:
1904 case BCM43xx_PHYTYPE_G:
1905 tmp = limit_value(tmp, 0x00, 0x3F);
1906 dbm = phy->tssi2dbm[tmp];
1907 break;
1908 default:
1909 assert(0);
1910 }
1911
1912 return dbm;
1913}
1914
1915/* http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower */
1916void bcm43xx_phy_xmitpower(struct bcm43xx_private *bcm)
1917{
e9357c05
MB		 1918 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1919 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 1920
1921 if (phy->savedpctlreg == 0xFFFF)
1922 return;
1923 if ((bcm->board_type == 0x0416) &&
1924 (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM))
1925 return;
1926
1927 switch (phy->type) {
1928 case BCM43xx_PHYTYPE_A: {
1929
1930 TODO(); //TODO: Nothing for A PHYs yet :-/
1931
1932 break;
1933 }
1934 case BCM43xx_PHYTYPE_B:
1935 case BCM43xx_PHYTYPE_G: {
1936 u16 tmp;
1937 u16 txpower;
1938 s8 v0, v1, v2, v3;
1939 s8 average;
1940 u8 max_pwr;
1941 s16 desired_pwr, estimated_pwr, pwr_adjust;
1942 s16 radio_att_delta, baseband_att_delta;
1943 s16 radio_attenuation, baseband_attenuation;
1944 unsigned long phylock_flags;
1945
1946 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0058);
1947 v0 = (s8)(tmp & 0x00FF);
1948 v1 = (s8)((tmp & 0xFF00) >> 8);
1949 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005A);
1950 v2 = (s8)(tmp & 0x00FF);
1951 v3 = (s8)((tmp & 0xFF00) >> 8);
1952 tmp = 0;
1953
1954 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) {
1955 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0070);
1956 v0 = (s8)(tmp & 0x00FF);
1957 v1 = (s8)((tmp & 0xFF00) >> 8);
1958 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0072);
1959 v2 = (s8)(tmp & 0x00FF);
1960 v3 = (s8)((tmp & 0xFF00) >> 8);
1961 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F)
1962 return;
1963 v0 = (v0 + 0x20) & 0x3F;
1964 v1 = (v1 + 0x20) & 0x3F;
1965 v2 = (v2 + 0x20) & 0x3F;
1966 v3 = (v3 + 0x20) & 0x3F;
1967 tmp = 1;
1968 }
1969 bcm43xx_radio_clear_tssi(bcm);
1970
1971 average = (v0 + v1 + v2 + v3 + 2) / 4;
1972
1973 if (tmp && (bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005E) & 0x8))
1974 average -= 13;
1975
1976 estimated_pwr = bcm43xx_phy_estimate_power_out(bcm, average);
1977
1978 max_pwr = bcm->sprom.maxpower_bgphy;
1979
1980 if ((bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) &&
1981 (phy->type == BCM43xx_PHYTYPE_G))
1982 max_pwr -= 0x3;
1983
1984 /*TODO:
1985 max_pwr = min(REG - bcm->sprom.antennagain_bgphy - 0x6, max_pwr)
1986 where REG is the max power as per the regulatory domain
1987 */
1988
393344f6
MB		 1989 desired_pwr = limit_value(radio->txpower_desired, 0, max_pwr);
1990 /* Check if we need to adjust the current power. */
f222313a 1991 pwr_adjust = desired_pwr - estimated_pwr;
f222313a
JL		 1992 radio_att_delta = -(pwr_adjust + 7) >> 3;
1993 baseband_att_delta = -(pwr_adjust >> 1) - (4 * radio_att_delta);
1994 if ((radio_att_delta == 0) && (baseband_att_delta == 0)) {
1995 bcm43xx_phy_lo_mark_current_used(bcm);
1996 return;
1997 }
1998
1999 /* Calculate the new attenuation values. */
6ecb2690 2000 baseband_attenuation = radio->baseband_atten;
f222313a 2001 baseband_attenuation += baseband_att_delta;
6ecb2690 2002 radio_attenuation = radio->radio_atten;
f222313a
JL		 2003 radio_attenuation += radio_att_delta;
2004
2005 /* Get baseband and radio attenuation values into their permitted ranges.
2006 * baseband 0-11, radio 0-9.
2007 * Radio attenuation affects power level 4 times as much as baseband.
2008 */
2009 if (radio_attenuation < 0) {
2010 baseband_attenuation -= (4 * -radio_attenuation);
2011 radio_attenuation = 0;
2012 } else if (radio_attenuation > 9) {
2013 baseband_attenuation += (4 * (radio_attenuation - 9));
2014 radio_attenuation = 9;
2015 } else {
2016 while (baseband_attenuation < 0 && radio_attenuation > 0) {
2017 baseband_attenuation += 4;
2018 radio_attenuation--;
2019 }
2020 while (baseband_attenuation > 11 && radio_attenuation < 9) {
2021 baseband_attenuation -= 4;
2022 radio_attenuation++;
2023 }
2024 }
2025 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
2026
6ecb2690 2027 txpower = radio->txctl1;
f222313a
JL		 2028 if ((radio->version == 0x2050) && (radio->revision == 2)) {
2029 if (radio_attenuation <= 1) {
2030 if (txpower == 0) {
2031 txpower = 3;
2032 radio_attenuation += 2;
2033 baseband_attenuation += 2;
2034 } else if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) {
2035 baseband_attenuation += 4 * (radio_attenuation - 2);
2036 radio_attenuation = 2;
2037 }
2038 } else if (radio_attenuation > 4 && txpower != 0) {
2039 txpower = 0;
2040 if (baseband_attenuation < 3) {
2041 radio_attenuation -= 3;
2042 baseband_attenuation += 2;
2043 } else {
2044 radio_attenuation -= 2;
2045 baseband_attenuation -= 2;
2046 }
2047 }
2048 }
6ecb2690 2049 radio->txctl1 = txpower;
f222313a
JL		 2050 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
2051 radio_attenuation = limit_value(radio_attenuation, 0, 9);
2052
2053 bcm43xx_phy_lock(bcm, phylock_flags);
2054 bcm43xx_radio_lock(bcm);
2055 bcm43xx_radio_set_txpower_bg(bcm, baseband_attenuation,
2056 radio_attenuation, txpower);
2057 bcm43xx_phy_lo_mark_current_used(bcm);
2058 bcm43xx_radio_unlock(bcm);
2059 bcm43xx_phy_unlock(bcm, phylock_flags);
2060 break;
2061 }
2062 default:
2063 assert(0);
2064 }
2065}
2066
2067static inline
2068s32 bcm43xx_tssi2dbm_ad(s32 num, s32 den)
2069{
2070 if (num < 0)
2071 return num/den;
2072 else
2073 return (num+den/2)/den;
2074}
2075
2076static inline
2077s8 bcm43xx_tssi2dbm_entry(s8 entry [], u8 index, s16 pab0, s16 pab1, s16 pab2)
2078{
2079 s32 m1, m2, f = 256, q, delta;
2080 s8 i = 0;
2081
2082 m1 = bcm43xx_tssi2dbm_ad(16 * pab0 + index * pab1, 32);
2083 m2 = max(bcm43xx_tssi2dbm_ad(32768 + index * pab2, 256), 1);
2084 do {
2085 if (i > 15)
2086 return -EINVAL;
2087 q = bcm43xx_tssi2dbm_ad(f * 4096 -
2088 bcm43xx_tssi2dbm_ad(m2 * f, 16) * f, 2048);
2089 delta = abs(q - f);
2090 f = q;
2091 i++;
2092 } while (delta >= 2);
2093 entry[index] = limit_value(bcm43xx_tssi2dbm_ad(m1 * f, 8192), -127, 128);
2094 return 0;
2095}
2096
2097/* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table */
2098int bcm43xx_phy_init_tssi2dbm_table(struct bcm43xx_private *bcm)
2099{
e9357c05
MB		 2100 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2101 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
f222313a
JL		 2102 s16 pab0, pab1, pab2;
2103 u8 idx;
2104 s8 *dyn_tssi2dbm;
2105
2106 if (phy->type == BCM43xx_PHYTYPE_A) {
2107 pab0 = (s16)(bcm->sprom.pa1b0);
2108 pab1 = (s16)(bcm->sprom.pa1b1);
2109 pab2 = (s16)(bcm->sprom.pa1b2);
2110 } else {
2111 pab0 = (s16)(bcm->sprom.pa0b0);
2112 pab1 = (s16)(bcm->sprom.pa0b1);
2113 pab2 = (s16)(bcm->sprom.pa0b2);
2114 }
2115
2116 if ((bcm->chip_id == 0x4301) && (radio->version != 0x2050)) {
2117 phy->idle_tssi = 0x34;
2118 phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
2119 return 0;
2120 }
2121
2122 if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
2123 pab0 != -1 && pab1 != -1 && pab2 != -1) {
2124 /* The pabX values are set in SPROM. Use them. */
2125 if (phy->type == BCM43xx_PHYTYPE_A) {
2126 if ((s8)bcm->sprom.idle_tssi_tgt_aphy != 0 &&
2127 (s8)bcm->sprom.idle_tssi_tgt_aphy != -1)
2128 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_aphy);
2129 else
2130 phy->idle_tssi = 62;
2131 } else {
2132 if ((s8)bcm->sprom.idle_tssi_tgt_bgphy != 0 &&
2133 (s8)bcm->sprom.idle_tssi_tgt_bgphy != -1)
2134 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_bgphy);
2135 else
2136 phy->idle_tssi = 62;
2137 }
2138 dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
2139 if (dyn_tssi2dbm == NULL) {
2140 printk(KERN_ERR PFX "Could not allocate memory"
2141 "for tssi2dbm table\n");
2142 return -ENOMEM;
2143 }
2144 for (idx = 0; idx < 64; idx++)
2145 if (bcm43xx_tssi2dbm_entry(dyn_tssi2dbm, idx, pab0, pab1, pab2)) {
2146 phy->tssi2dbm = NULL;
2147 printk(KERN_ERR PFX "Could not generate "
2148 "tssi2dBm table\n");
2230daa0 2149 kfree(dyn_tssi2dbm);
f222313a
JL		 2150 return -ENODEV;
2151 }
2152 phy->tssi2dbm = dyn_tssi2dbm;
2153 phy->dyn_tssi_tbl = 1;
2154 } else {
2155 /* pabX values not set in SPROM. */
2156 switch (phy->type) {
2157 case BCM43xx_PHYTYPE_A:
2158 /* APHY needs a generated table. */
2159 phy->tssi2dbm = NULL;
2160 printk(KERN_ERR PFX "Could not generate tssi2dBm "
2161 "table (wrong SPROM info)!\n");
2162 return -ENODEV;
2163 case BCM43xx_PHYTYPE_B:
2164 phy->idle_tssi = 0x34;
2165 phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
2166 break;
2167 case BCM43xx_PHYTYPE_G:
2168 phy->idle_tssi = 0x34;
2169 phy->tssi2dbm = bcm43xx_tssi2dbm_g_table;
2170 break;
2171 }
2172 }
2173
2174 return 0;
2175}
2176
2177int bcm43xx_phy_init(struct bcm43xx_private *bcm)
2178{
e9357c05 2179 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a 2180 int err = -ENODEV;
f222313a
JL		 2181
2182 switch (phy->type) {
2183 case BCM43xx_PHYTYPE_A:
2184 if (phy->rev == 2 || phy->rev == 3) {
2185 bcm43xx_phy_inita(bcm);
2186 err = 0;
2187 }
2188 break;
2189 case BCM43xx_PHYTYPE_B:
2190 switch (phy->rev) {
2191 case 2:
2192 bcm43xx_phy_initb2(bcm);
2193 err = 0;
2194 break;
2195 case 4:
2196 bcm43xx_phy_initb4(bcm);
2197 err = 0;
2198 break;
2199 case 5:
2200 bcm43xx_phy_initb5(bcm);
2201 err = 0;
2202 break;
2203 case 6:
2204 bcm43xx_phy_initb6(bcm);
2205 err = 0;
2206 break;
2207 }
2208 break;
2209 case BCM43xx_PHYTYPE_G:
2210 bcm43xx_phy_initg(bcm);
2211 err = 0;
2212 break;
2213 }
f222313a
JL		 2214 if (err)
2215 printk(KERN_WARNING PFX "Unknown PHYTYPE found!\n");
2216
2217 return err;
2218}
2219
2220void bcm43xx_phy_set_antenna_diversity(struct bcm43xx_private *bcm)
2221{
e9357c05 2222 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
f222313a
JL		 2223 u16 antennadiv;
2224 u16 offset;
2225 u16 value;
2226 u32 ucodeflags;
2227
2228 antennadiv = phy->antenna_diversity;
2229
2230 if (antennadiv == 0xFFFF)
2231 antennadiv = 3;
2232 assert(antennadiv <= 3);
2233
2234 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2235 BCM43xx_UCODEFLAGS_OFFSET);
2236 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2237 BCM43xx_UCODEFLAGS_OFFSET,
2238 ucodeflags & ~BCM43xx_UCODEFLAG_AUTODIV);
2239
2240 switch (phy->type) {
2241 case BCM43xx_PHYTYPE_A:
2242 case BCM43xx_PHYTYPE_G:
2243 if (phy->type == BCM43xx_PHYTYPE_A)
2244 offset = 0x0000;
2245 else
2246 offset = 0x0400;
2247
2248 if (antennadiv == 2)
2249 value = (3/*automatic*/ << 7);
2250 else
2251 value = (antennadiv << 7);
2252 bcm43xx_phy_write(bcm, offset + 1,
2253 (bcm43xx_phy_read(bcm, offset + 1)
2254 & 0x7E7F) | value);
2255
2256 if (antennadiv >= 2) {
2257 if (antennadiv == 2)
2258 value = (antennadiv << 7);
2259 else
2260 value = (0/*force0*/ << 7);
2261 bcm43xx_phy_write(bcm, offset + 0x2B,
2262 (bcm43xx_phy_read(bcm, offset + 0x2B)
2263 & 0xFEFF) | value);
2264 }
2265
2266 if (phy->type == BCM43xx_PHYTYPE_G) {
2267 if (antennadiv >= 2)
2268 bcm43xx_phy_write(bcm, 0x048C,
2269 bcm43xx_phy_read(bcm, 0x048C)
2270 | 0x2000);
2271 else
2272 bcm43xx_phy_write(bcm, 0x048C,
2273 bcm43xx_phy_read(bcm, 0x048C)
2274 & ~0x2000);
2275 if (phy->rev >= 2) {
2276 bcm43xx_phy_write(bcm, 0x0461,
2277 bcm43xx_phy_read(bcm, 0x0461)
2278 | 0x0010);
2279 bcm43xx_phy_write(bcm, 0x04AD,
2280 (bcm43xx_phy_read(bcm, 0x04AD)
2281 & 0x00FF) | 0x0015);
2282 if (phy->rev == 2)
2283 bcm43xx_phy_write(bcm, 0x0427, 0x0008);
2284 else
2285 bcm43xx_phy_write(bcm, 0x0427,
2286 (bcm43xx_phy_read(bcm, 0x0427)
2287 & 0x00FF) | 0x0008);
2288 }
2289 else if (phy->rev >= 6)
2290 bcm43xx_phy_write(bcm, 0x049B, 0x00DC);
2291 } else {
2292 if (phy->rev < 3)
2293 bcm43xx_phy_write(bcm, 0x002B,
2294 (bcm43xx_phy_read(bcm, 0x002B)
2295 & 0x00FF) | 0x0024);
2296 else {
2297 bcm43xx_phy_write(bcm, 0x0061,
2298 bcm43xx_phy_read(bcm, 0x0061)
2299 | 0x0010);
2300 if (phy->rev == 3) {
2301 bcm43xx_phy_write(bcm, 0x0093, 0x001D);
2302 bcm43xx_phy_write(bcm, 0x0027, 0x0008);
2303 } else {
2304 bcm43xx_phy_write(bcm, 0x0093, 0x003A);
2305 bcm43xx_phy_write(bcm, 0x0027,
2306 (bcm43xx_phy_read(bcm, 0x0027)
2307 & 0x00FF) | 0x0008);
2308 }
2309 }
2310 }
2311 break;
2312 case BCM43xx_PHYTYPE_B:
2313 if (bcm->current_core->rev == 2)
2314 value = (3/*automatic*/ << 7);
2315 else
2316 value = (antennadiv << 7);
2317 bcm43xx_phy_write(bcm, 0x03E2,
2318 (bcm43xx_phy_read(bcm, 0x03E2)
2319 & 0xFE7F) | value);
2320 break;
2321 default:
2322 assert(0);
2323 }
2324
2325 if (antennadiv >= 2) {
2326 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2327 BCM43xx_UCODEFLAGS_OFFSET);
2328 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2329 BCM43xx_UCODEFLAGS_OFFSET,
2330 ucodeflags | BCM43xx_UCODEFLAG_AUTODIV);
2331 }
2332
2333 phy->antenna_diversity = antennadiv;
2334}
Linux kernel - Deliverables
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