brcm80211: fmac: separate receiving skb chain from other receive path
[deliverable/linux.git] / drivers / net / wireless / brcm80211 / brcmfmac / sdio_host.h
CommitLineData
5b435de0
AS
1/*
2 * Copyright (c) 2010 Broadcom Corporation
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef _BRCM_SDH_H_
18#define _BRCM_SDH_H_
19
20#include <linux/skbuff.h>
21
22#define SDIO_FUNC_0 0
23#define SDIO_FUNC_1 1
24#define SDIO_FUNC_2 2
25
26#define SDIOD_FBR_SIZE 0x100
27
28/* io_en */
29#define SDIO_FUNC_ENABLE_1 0x02
30#define SDIO_FUNC_ENABLE_2 0x04
31
32/* io_rdys */
33#define SDIO_FUNC_READY_1 0x02
34#define SDIO_FUNC_READY_2 0x04
35
36/* intr_status */
37#define INTR_STATUS_FUNC1 0x2
38#define INTR_STATUS_FUNC2 0x4
39
40/* Maximum number of I/O funcs */
41#define SDIOD_MAX_IOFUNCS 7
42
43/* as of sdiod rev 0, supports 3 functions */
44#define SBSDIO_NUM_FUNCTION 3
45
46/* function 1 miscellaneous registers */
47
48/* sprom command and status */
49#define SBSDIO_SPROM_CS 0x10000
50/* sprom info register */
51#define SBSDIO_SPROM_INFO 0x10001
52/* sprom indirect access data byte 0 */
53#define SBSDIO_SPROM_DATA_LOW 0x10002
54/* sprom indirect access data byte 1 */
55#define SBSDIO_SPROM_DATA_HIGH 0x10003
56/* sprom indirect access addr byte 0 */
57#define SBSDIO_SPROM_ADDR_LOW 0x10004
58/* sprom indirect access addr byte 0 */
59#define SBSDIO_SPROM_ADDR_HIGH 0x10005
60/* xtal_pu (gpio) output */
61#define SBSDIO_CHIP_CTRL_DATA 0x10006
62/* xtal_pu (gpio) enable */
63#define SBSDIO_CHIP_CTRL_EN 0x10007
64/* rev < 7, watermark for sdio device */
65#define SBSDIO_WATERMARK 0x10008
66/* control busy signal generation */
67#define SBSDIO_DEVICE_CTL 0x10009
68
69/* SB Address Window Low (b15) */
70#define SBSDIO_FUNC1_SBADDRLOW 0x1000A
71/* SB Address Window Mid (b23:b16) */
72#define SBSDIO_FUNC1_SBADDRMID 0x1000B
73/* SB Address Window High (b31:b24) */
74#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C
75/* Frame Control (frame term/abort) */
76#define SBSDIO_FUNC1_FRAMECTRL 0x1000D
77/* ChipClockCSR (ALP/HT ctl/status) */
78#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E
79/* SdioPullUp (on cmd, d0-d2) */
80#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F
81/* Write Frame Byte Count Low */
82#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019
83/* Write Frame Byte Count High */
84#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A
85/* Read Frame Byte Count Low */
86#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B
87/* Read Frame Byte Count High */
88#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C
89
90#define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */
91#define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */
92
93/* function 1 OCP space */
94
95/* sb offset addr is <= 15 bits, 32k */
96#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF
97#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000
98/* with b15, maps to 32-bit SB access */
99#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000
100
101/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
102
103#define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */
104#define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */
105#define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */
106/* Address bits from SBADDR regs */
107#define SBSDIO_SBWINDOW_MASK 0xffff8000
108
109#define SDIOH_READ 0 /* Read request */
110#define SDIOH_WRITE 1 /* Write request */
111
112#define SDIOH_DATA_FIX 0 /* Fixed addressing */
113#define SDIOH_DATA_INC 1 /* Incremental addressing */
114
115/* internal return code */
116#define SUCCESS 0
117#define ERROR 1
118
119struct brcmf_sdreg {
120 int func;
121 int offset;
122 int value;
123};
124
125struct brcmf_sdio_dev {
126 struct sdio_func *func[SDIO_MAX_FUNCS];
127 u8 num_funcs; /* Supported funcs on client */
128 u32 func_cis_ptr[SDIOD_MAX_IOFUNCS];
129 u32 sbwad; /* Save backplane window address */
130 bool regfail; /* status of last reg_r/w call */
131 void *bus;
132 atomic_t suspend; /* suspend flag */
133 wait_queue_head_t request_byte_wait;
134 wait_queue_head_t request_word_wait;
135 wait_queue_head_t request_packet_wait;
136 wait_queue_head_t request_buffer_wait;
137
138};
139
140/* Register/deregister device interrupt handler. */
141extern int
142brcmf_sdcard_intr_reg(struct brcmf_sdio_dev *sdiodev);
143
144extern int brcmf_sdcard_intr_dereg(struct brcmf_sdio_dev *sdiodev);
145
146/* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface).
147 * fn: function number
148 * addr: unmodified SDIO-space address
149 * data: data byte to write
150 * err: pointer to error code (or NULL)
151 */
152extern u8 brcmf_sdcard_cfg_read(struct brcmf_sdio_dev *sdiodev, uint func,
153 u32 addr, int *err);
154extern void brcmf_sdcard_cfg_write(struct brcmf_sdio_dev *sdiodev, uint func,
155 u32 addr, u8 data, int *err);
156
157/* Synchronous access to device (client) core registers via CMD53 to F1.
158 * addr: backplane address (i.e. >= regsva from attach)
159 * size: register width in bytes (2 or 4)
160 * data: data for register write
161 */
162extern u32
163brcmf_sdcard_reg_read(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size);
164
165extern u32
166brcmf_sdcard_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size,
167 u32 data);
168
169/* Indicate if last reg read/write failed */
170extern bool brcmf_sdcard_regfail(struct brcmf_sdio_dev *sdiodev);
171
172/* Buffer transfer to/from device (client) core via cmd53.
173 * fn: function number
174 * addr: backplane address (i.e. >= regsva from attach)
175 * flags: backplane width, address increment, sync/async
176 * buf: pointer to memory data buffer
177 * nbytes: number of bytes to transfer to/from buf
178 * pkt: pointer to packet associated with buf (if any)
179 * complete: callback function for command completion (async only)
180 * handle: handle for completion callback (first arg in callback)
181 * Returns 0 or error code.
182 * NOTE: Async operation is not currently supported.
183 */
184extern int
5adfeb63
AS
185brcmf_sdcard_send_pkt(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
186 uint flags, struct sk_buff *pkt);
187extern int
5b435de0 188brcmf_sdcard_send_buf(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
5adfeb63
AS
189 uint flags, u8 *buf, uint nbytes);
190
191extern int
192brcmf_sdcard_recv_pkt(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
193 uint flags, struct sk_buff *pkt);
5b435de0
AS
194extern int
195brcmf_sdcard_recv_buf(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
5adfeb63
AS
196 uint flags, u8 *buf, uint nbytes);
197extern int
198brcmf_sdcard_recv_chain(struct brcmf_sdio_dev *sdiodev, u32 addr, uint fn,
199 uint flags, struct sk_buff_head *pktq);
5b435de0
AS
200
201/* Flags bits */
202
203/* Four-byte target (backplane) width (vs. two-byte) */
204#define SDIO_REQ_4BYTE 0x1
205/* Fixed address (FIFO) (vs. incrementing address) */
206#define SDIO_REQ_FIXED 0x2
207/* Async request (vs. sync request) */
208#define SDIO_REQ_ASYNC 0x4
209
210/* Read/write to memory block (F1, no FIFO) via CMD53 (sync only).
211 * rw: read or write (0/1)
212 * addr: direct SDIO address
213 * buf: pointer to memory data buffer
214 * nbytes: number of bytes to transfer to/from buf
215 * Returns 0 or error code.
216 */
217extern int brcmf_sdcard_rwdata(struct brcmf_sdio_dev *sdiodev, uint rw,
218 u32 addr, u8 *buf, uint nbytes);
219
220/* Issue an abort to the specified function */
221extern int brcmf_sdcard_abort(struct brcmf_sdio_dev *sdiodev, uint fn);
222
223/* platform specific/high level functions */
224extern int brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev);
225extern int brcmf_sdio_remove(struct brcmf_sdio_dev *sdiodev);
226
227extern int brcmf_sdcard_set_sbaddr_window(struct brcmf_sdio_dev *sdiodev,
228 u32 address);
229
230/* attach, return handler on success, NULL if failed.
231 * The handler shall be provided by all subsequent calls. No local cache
232 * cfghdl points to the starting address of pci device mapped memory
233 */
234extern int brcmf_sdioh_attach(struct brcmf_sdio_dev *sdiodev);
235extern void brcmf_sdioh_detach(struct brcmf_sdio_dev *sdiodev);
236
237/* read or write one byte using cmd52 */
238extern int brcmf_sdioh_request_byte(struct brcmf_sdio_dev *sdiodev, uint rw,
239 uint fnc, uint addr, u8 *byte);
240
241/* read or write 2/4 bytes using cmd53 */
242extern int
243brcmf_sdioh_request_word(struct brcmf_sdio_dev *sdiodev,
244 uint rw, uint fnc, uint addr,
245 u32 *word, uint nbyte);
246
247/* read or write any buffer using cmd53 */
248extern int
249brcmf_sdioh_request_buffer(struct brcmf_sdio_dev *sdiodev,
250 uint fix_inc, uint rw, uint fnc_num,
251 u32 addr, uint regwidth,
252 u32 buflen, u8 *buffer, struct sk_buff *pkt);
5adfeb63
AS
253extern int
254brcmf_sdioh_request_chain(struct brcmf_sdio_dev *sdiodev, uint fix_inc,
255 uint write, uint func, uint addr,
256 struct sk_buff_head *pktq);
5b435de0
AS
257
258/* Watchdog timer interface for pm ops */
259extern void brcmf_sdio_wdtmr_enable(struct brcmf_sdio_dev *sdiodev,
260 bool enable);
261
262extern void *brcmf_sdbrcm_probe(u16 bus_no, u16 slot, u16 func, uint bustype,
263 u32 regsva, struct brcmf_sdio_dev *sdiodev);
264extern void brcmf_sdbrcm_disconnect(void *ptr);
265extern void brcmf_sdbrcm_isr(void *arg);
266#endif /* _BRCM_SDH_H_ */
This page took 0.071354 seconds and 5 git commands to generate.