[deliverable/linux.git] / drivers / net / wireless / brcm80211 / include / brcmu_d11.h

/*
 * Copyright (c) 2010 Broadcom Corporation
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#ifndef	_BRCMU_D11_H_
#define	_BRCMU_D11_H_

/* d11 io type */
#define BRCMU_D11N_IOTYPE		1
#define BRCMU_D11AC_IOTYPE		2

/* A chanspec (channel specification) holds the channel number, band,
 * bandwidth and control sideband
 */

/* chanspec binary format */

#define BRCMU_CHSPEC_INVALID		255
/* bit 0~7 channel number
 * for 80+80 channels: bit 0~3 low channel id, bit 4~7 high channel id
 */
#define BRCMU_CHSPEC_CH_MASK		0x00ff
#define BRCMU_CHSPEC_CH_SHIFT		0
#define BRCMU_CHSPEC_CHL_MASK		0x000f
#define BRCMU_CHSPEC_CHL_SHIFT		0
#define BRCMU_CHSPEC_CHH_MASK		0x00f0
#define BRCMU_CHSPEC_CHH_SHIFT		4

/* bit 8~16 for dot 11n IO types
 * bit 8~9 sideband
 * bit 10~11 bandwidth
 * bit 12~13 spectral band
 * bit 14~15 not used
 */
#define BRCMU_CHSPEC_D11N_SB_MASK	0x0300
#define BRCMU_CHSPEC_D11N_SB_SHIFT	8
#define  BRCMU_CHSPEC_D11N_SB_L		0x0100	/* control lower */
#define  BRCMU_CHSPEC_D11N_SB_U		0x0200	/* control upper */
#define  BRCMU_CHSPEC_D11N_SB_N		0x0300	/* none */
#define BRCMU_CHSPEC_D11N_BW_MASK	0x0c00
#define BRCMU_CHSPEC_D11N_BW_SHIFT	10
#define  BRCMU_CHSPEC_D11N_BW_10	0x0400
#define  BRCMU_CHSPEC_D11N_BW_20	0x0800
#define  BRCMU_CHSPEC_D11N_BW_40	0x0c00
#define BRCMU_CHSPEC_D11N_BND_MASK	0x3000
#define BRCMU_CHSPEC_D11N_BND_SHIFT	12
#define  BRCMU_CHSPEC_D11N_BND_5G	0x1000
#define  BRCMU_CHSPEC_D11N_BND_2G	0x2000

/* bit 8~16 for dot 11ac IO types
 * bit 8~10 sideband
 * bit 11~13 bandwidth
 * bit 14~15 spectral band
 */
#define BRCMU_CHSPEC_D11AC_SB_MASK	0x0700
#define BRCMU_CHSPEC_D11AC_SB_SHIFT	8
#define  BRCMU_CHSPEC_D11AC_SB_LLL	0x0000
#define  BRCMU_CHSPEC_D11AC_SB_LLU	0x0100
#define  BRCMU_CHSPEC_D11AC_SB_LUL	0x0200
#define  BRCMU_CHSPEC_D11AC_SB_LUU	0x0300
#define  BRCMU_CHSPEC_D11AC_SB_ULL	0x0400
#define  BRCMU_CHSPEC_D11AC_SB_ULU	0x0500
#define  BRCMU_CHSPEC_D11AC_SB_UUL	0x0600
#define  BRCMU_CHSPEC_D11AC_SB_UUU	0x0700
#define  BRCMU_CHSPEC_D11AC_SB_LL	BRCMU_CHSPEC_D11AC_SB_LLL
#define  BRCMU_CHSPEC_D11AC_SB_LU	BRCMU_CHSPEC_D11AC_SB_LLU
#define  BRCMU_CHSPEC_D11AC_SB_UL	BRCMU_CHSPEC_D11AC_SB_LUL
#define  BRCMU_CHSPEC_D11AC_SB_UU	BRCMU_CHSPEC_D11AC_SB_LUU
#define  BRCMU_CHSPEC_D11AC_SB_L	BRCMU_CHSPEC_D11AC_SB_LLL
#define  BRCMU_CHSPEC_D11AC_SB_U	BRCMU_CHSPEC_D11AC_SB_LLU
#define BRCMU_CHSPEC_D11AC_BW_MASK	0x3800
#define BRCMU_CHSPEC_D11AC_BW_SHIFT	11
#define  BRCMU_CHSPEC_D11AC_BW_5	0x0000
#define  BRCMU_CHSPEC_D11AC_BW_10	0x0800
#define  BRCMU_CHSPEC_D11AC_BW_20	0x1000
#define  BRCMU_CHSPEC_D11AC_BW_40	0x1800
#define  BRCMU_CHSPEC_D11AC_BW_80	0x2000
#define  BRCMU_CHSPEC_D11AC_BW_160	0x2800
#define  BRCMU_CHSPEC_D11AC_BW_8080	0x3000
#define BRCMU_CHSPEC_D11AC_BND_MASK	0xc000
#define BRCMU_CHSPEC_D11AC_BND_SHIFT	14
#define  BRCMU_CHSPEC_D11AC_BND_2G	0x0000
#define  BRCMU_CHSPEC_D11AC_BND_3G	0x4000
#define  BRCMU_CHSPEC_D11AC_BND_4G	0x8000
#define  BRCMU_CHSPEC_D11AC_BND_5G	0xc000

#define BRCMU_CHAN_BAND_2G		0
#define BRCMU_CHAN_BAND_5G		1

enum brcmu_chan_bw {
	BRCMU_CHAN_BW_20,
	BRCMU_CHAN_BW_40,
	BRCMU_CHAN_BW_80,
	BRCMU_CHAN_BW_80P80,
	BRCMU_CHAN_BW_160,
};

enum brcmu_chan_sb {
	BRCMU_CHAN_SB_NONE = -1,
	BRCMU_CHAN_SB_LLL,
	BRCMU_CHAN_SB_LLU,
	BRCMU_CHAN_SB_LUL,
	BRCMU_CHAN_SB_LUU,
	BRCMU_CHAN_SB_ULL,
	BRCMU_CHAN_SB_ULU,
	BRCMU_CHAN_SB_UUL,
	BRCMU_CHAN_SB_UUU,
	BRCMU_CHAN_SB_L = BRCMU_CHAN_SB_LLL,
	BRCMU_CHAN_SB_U = BRCMU_CHAN_SB_LLU,
	BRCMU_CHAN_SB_LL = BRCMU_CHAN_SB_LLL,
	BRCMU_CHAN_SB_LU = BRCMU_CHAN_SB_LLU,
	BRCMU_CHAN_SB_UL = BRCMU_CHAN_SB_LUL,
	BRCMU_CHAN_SB_UU = BRCMU_CHAN_SB_LUU,
};

struct brcmu_chan {
	u16 chspec;
	u8 chnum;
	u8 band;
	enum brcmu_chan_bw bw;
	enum brcmu_chan_sb sb;
};

struct brcmu_d11inf {
	u8 io_type;

	void (*encchspec)(struct brcmu_chan *ch);
	void (*decchspec)(struct brcmu_chan *ch);
};

void brcmu_d11_attach(struct brcmu_d11inf *d11inf);

#endif	/* _BRCMU_CHANNELS_H_ */
Commit	Line	Data
e3b919d8 FL	1	/*
	2	* Copyright (c) 2010 Broadcom Corporation
	3	*
	4	* Permission to use, copy, modify, and/or distribute this software for any
	5	* purpose with or without fee is hereby granted, provided that the above
	6	* copyright notice and this permission notice appear in all copies.
	7	*
	8	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	9	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	10	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
	11	* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	12	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
	13	* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
	14	* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	15	*/
	16
	17	#ifndef _BRCMU_D11_H_
	18	#define _BRCMU_D11_H_
	19
	20	/* d11 io type */
	21	#define BRCMU_D11N_IOTYPE 1
	22	#define BRCMU_D11AC_IOTYPE 2
	23
	24	/* A chanspec (channel specification) holds the channel number, band,
	25	* bandwidth and control sideband
	26	*/
	27
	28	/* chanspec binary format */
	29
	30	#define BRCMU_CHSPEC_INVALID 255
	31	/* bit 0~7 channel number
	32	* for 80+80 channels: bit 0~3 low channel id, bit 4~7 high channel id
	33	*/
	34	#define BRCMU_CHSPEC_CH_MASK 0x00ff
	35	#define BRCMU_CHSPEC_CH_SHIFT 0
	36	#define BRCMU_CHSPEC_CHL_MASK 0x000f
	37	#define BRCMU_CHSPEC_CHL_SHIFT 0
	38	#define BRCMU_CHSPEC_CHH_MASK 0x00f0
	39	#define BRCMU_CHSPEC_CHH_SHIFT 4
	40
	41	/* bit 8~16 for dot 11n IO types
	42	* bit 8~9 sideband
	43	* bit 10~11 bandwidth
	44	* bit 12~13 spectral band
	45	* bit 14~15 not used
	46	*/
	47	#define BRCMU_CHSPEC_D11N_SB_MASK 0x0300
	48	#define BRCMU_CHSPEC_D11N_SB_SHIFT 8
	49	#define BRCMU_CHSPEC_D11N_SB_L 0x0100 /* control lower */
	50	#define BRCMU_CHSPEC_D11N_SB_U 0x0200 /* control upper */
	51	#define BRCMU_CHSPEC_D11N_SB_N 0x0300 /* none */
	52	#define BRCMU_CHSPEC_D11N_BW_MASK 0x0c00
	53	#define BRCMU_CHSPEC_D11N_BW_SHIFT 10
	54	#define BRCMU_CHSPEC_D11N_BW_10 0x0400
	55	#define BRCMU_CHSPEC_D11N_BW_20 0x0800
	56	#define BRCMU_CHSPEC_D11N_BW_40 0x0c00
	57	#define BRCMU_CHSPEC_D11N_BND_MASK 0x3000
	58	#define BRCMU_CHSPEC_D11N_BND_SHIFT 12
	59	#define BRCMU_CHSPEC_D11N_BND_5G 0x1000
	60	#define BRCMU_CHSPEC_D11N_BND_2G 0x2000
	61
	62	/* bit 8~16 for dot 11ac IO types
	63	* bit 8~10 sideband
	64	* bit 11~13 bandwidth
65	* bit 14~15 spectral band
66	*/
67	#define BRCMU_CHSPEC_D11AC_SB_MASK 0x0700
68	#define BRCMU_CHSPEC_D11AC_SB_SHIFT 8
69	#define BRCMU_CHSPEC_D11AC_SB_LLL 0x0000
70	#define BRCMU_CHSPEC_D11AC_SB_LLU 0x0100
71	#define BRCMU_CHSPEC_D11AC_SB_LUL 0x0200
72	#define BRCMU_CHSPEC_D11AC_SB_LUU 0x0300
73	#define BRCMU_CHSPEC_D11AC_SB_ULL 0x0400
74	#define BRCMU_CHSPEC_D11AC_SB_ULU 0x0500
75	#define BRCMU_CHSPEC_D11AC_SB_UUL 0x0600
76	#define BRCMU_CHSPEC_D11AC_SB_UUU 0x0700
77	#define BRCMU_CHSPEC_D11AC_SB_LL BRCMU_CHSPEC_D11AC_SB_LLL
78	#define BRCMU_CHSPEC_D11AC_SB_LU BRCMU_CHSPEC_D11AC_SB_LLU
79	#define BRCMU_CHSPEC_D11AC_SB_UL BRCMU_CHSPEC_D11AC_SB_LUL
80	#define BRCMU_CHSPEC_D11AC_SB_UU BRCMU_CHSPEC_D11AC_SB_LUU
81	#define BRCMU_CHSPEC_D11AC_SB_L BRCMU_CHSPEC_D11AC_SB_LLL
82	#define BRCMU_CHSPEC_D11AC_SB_U BRCMU_CHSPEC_D11AC_SB_LLU
83	#define BRCMU_CHSPEC_D11AC_BW_MASK 0x3800
84	#define BRCMU_CHSPEC_D11AC_BW_SHIFT 11
85	#define BRCMU_CHSPEC_D11AC_BW_5 0x0000
86	#define BRCMU_CHSPEC_D11AC_BW_10 0x0800
87	#define BRCMU_CHSPEC_D11AC_BW_20 0x1000
88	#define BRCMU_CHSPEC_D11AC_BW_40 0x1800
89	#define BRCMU_CHSPEC_D11AC_BW_80 0x2000
90	#define BRCMU_CHSPEC_D11AC_BW_160 0x2800
91	#define BRCMU_CHSPEC_D11AC_BW_8080 0x3000
92	#define BRCMU_CHSPEC_D11AC_BND_MASK 0xc000
93	#define BRCMU_CHSPEC_D11AC_BND_SHIFT 14
94	#define BRCMU_CHSPEC_D11AC_BND_2G 0x0000
95	#define BRCMU_CHSPEC_D11AC_BND_3G 0x4000
96	#define BRCMU_CHSPEC_D11AC_BND_4G 0x8000
97	#define BRCMU_CHSPEC_D11AC_BND_5G 0xc000
98
99	#define BRCMU_CHAN_BAND_2G 0
100	#define BRCMU_CHAN_BAND_5G 1
101
102	enum brcmu_chan_bw {
103	BRCMU_CHAN_BW_20,
104	BRCMU_CHAN_BW_40,
105	BRCMU_CHAN_BW_80,
106	BRCMU_CHAN_BW_80P80,
107	BRCMU_CHAN_BW_160,
108	};
109
110	enum brcmu_chan_sb {
4439cbcd	111	BRCMU_CHAN_SB_NONE = -1,
e3b919d8 FL	112	BRCMU_CHAN_SB_LLL,
	113	BRCMU_CHAN_SB_LLU,
	114	BRCMU_CHAN_SB_LUL,
	115	BRCMU_CHAN_SB_LUU,
	116	BRCMU_CHAN_SB_ULL,
	117	BRCMU_CHAN_SB_ULU,
	118	BRCMU_CHAN_SB_UUL,
	119	BRCMU_CHAN_SB_UUU,
4439cbcd AS	120	BRCMU_CHAN_SB_L = BRCMU_CHAN_SB_LLL,
	121	BRCMU_CHAN_SB_U = BRCMU_CHAN_SB_LLU,
	122	BRCMU_CHAN_SB_LL = BRCMU_CHAN_SB_LLL,
	123	BRCMU_CHAN_SB_LU = BRCMU_CHAN_SB_LLU,
	124	BRCMU_CHAN_SB_UL = BRCMU_CHAN_SB_LUL,
	125	BRCMU_CHAN_SB_UU = BRCMU_CHAN_SB_LUU,
e3b919d8 FL	126	};
	127
	128	struct brcmu_chan {
	129	u16 chspec;
	130	u8 chnum;
	131	u8 band;
	132	enum brcmu_chan_bw bw;
	133	enum brcmu_chan_sb sb;
	134	};
	135
	136	struct brcmu_d11inf {
	137	u8 io_type;
	138
	139	void (encchspec)(struct brcmu_chan ch);
	140	void (decchspec)(struct brcmu_chan ch);
	141	};
	142
9bd91f3c	143	void brcmu_d11_attach(struct brcmu_d11inf *d11inf);
e3b919d8 FL	144
e3b919d8 FL	145	#endif /* _BRCMU_CHANNELS_H_ */