Commit | Line | Data |
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ff1d2767 JM |
1 | #define PRISM2_PCI |
2 | ||
3 | /* Host AP driver's support for Intersil Prism2.5 PCI cards is based on | |
4 | * driver patches from Reyk Floeter <reyk@vantronix.net> and | |
5 | * Andy Warner <andyw@pobox.com> */ | |
6 | ||
7 | #include <linux/config.h> | |
8 | #include <linux/version.h> | |
9 | #include <linux/module.h> | |
10 | #include <linux/init.h> | |
11 | #include <linux/if.h> | |
12 | #include <linux/skbuff.h> | |
13 | #include <linux/netdevice.h> | |
14 | #include <linux/workqueue.h> | |
15 | #include <linux/wireless.h> | |
16 | #include <net/iw_handler.h> | |
17 | ||
18 | #include <linux/ioport.h> | |
19 | #include <linux/pci.h> | |
20 | #include <asm/io.h> | |
21 | ||
22 | #include "hostap_wlan.h" | |
23 | ||
24 | ||
25 | static char *version = PRISM2_VERSION " (Jouni Malinen <jkmaline@cc.hut.fi>)"; | |
26 | static char *dev_info = "hostap_pci"; | |
27 | ||
28 | ||
29 | MODULE_AUTHOR("Jouni Malinen"); | |
30 | MODULE_DESCRIPTION("Support for Intersil Prism2.5-based 802.11 wireless LAN " | |
31 | "PCI cards."); | |
32 | MODULE_SUPPORTED_DEVICE("Intersil Prism2.5-based WLAN PCI cards"); | |
33 | MODULE_LICENSE("GPL"); | |
f06ac319 | 34 | MODULE_VERSION(PRISM2_VERSION); |
ff1d2767 JM |
35 | |
36 | ||
67e0e473 JM |
37 | /* struct local_info::hw_priv */ |
38 | struct hostap_pci_priv { | |
39 | void __iomem *mem_start; | |
40 | }; | |
41 | ||
42 | ||
ff1d2767 JM |
43 | /* FIX: do we need mb/wmb/rmb with memory operations? */ |
44 | ||
45 | ||
46 | static struct pci_device_id prism2_pci_id_table[] __devinitdata = { | |
47 | /* Intersil Prism3 ISL3872 11Mb/s WLAN Controller */ | |
48 | { 0x1260, 0x3872, PCI_ANY_ID, PCI_ANY_ID }, | |
49 | /* Intersil Prism2.5 ISL3874 11Mb/s WLAN Controller */ | |
50 | { 0x1260, 0x3873, PCI_ANY_ID, PCI_ANY_ID }, | |
51 | /* Samsung MagicLAN SWL-2210P */ | |
52 | { 0x167d, 0xa000, PCI_ANY_ID, PCI_ANY_ID }, | |
53 | { 0 } | |
54 | }; | |
55 | ||
56 | ||
57 | #ifdef PRISM2_IO_DEBUG | |
58 | ||
59 | static inline void hfa384x_outb_debug(struct net_device *dev, int a, u8 v) | |
60 | { | |
61 | struct hostap_interface *iface; | |
62 | local_info_t *local; | |
63 | unsigned long flags; | |
64 | ||
65 | iface = netdev_priv(dev); | |
66 | local = iface->local; | |
67 | ||
68 | spin_lock_irqsave(&local->lock, flags); | |
69 | prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTB, a, v); | |
67e0e473 | 70 | writeb(v, hw_priv->mem_start + a); |
ff1d2767 JM |
71 | spin_unlock_irqrestore(&local->lock, flags); |
72 | } | |
73 | ||
74 | static inline u8 hfa384x_inb_debug(struct net_device *dev, int a) | |
75 | { | |
76 | struct hostap_interface *iface; | |
77 | local_info_t *local; | |
78 | unsigned long flags; | |
79 | u8 v; | |
80 | ||
81 | iface = netdev_priv(dev); | |
82 | local = iface->local; | |
83 | ||
84 | spin_lock_irqsave(&local->lock, flags); | |
67e0e473 | 85 | v = readb(hw_priv->mem_start + a); |
ff1d2767 JM |
86 | prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INB, a, v); |
87 | spin_unlock_irqrestore(&local->lock, flags); | |
88 | return v; | |
89 | } | |
90 | ||
91 | static inline void hfa384x_outw_debug(struct net_device *dev, int a, u16 v) | |
92 | { | |
93 | struct hostap_interface *iface; | |
94 | local_info_t *local; | |
95 | unsigned long flags; | |
96 | ||
97 | iface = netdev_priv(dev); | |
98 | local = iface->local; | |
99 | ||
100 | spin_lock_irqsave(&local->lock, flags); | |
101 | prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTW, a, v); | |
67e0e473 | 102 | writew(v, hw_priv->mem_start + a); |
ff1d2767 JM |
103 | spin_unlock_irqrestore(&local->lock, flags); |
104 | } | |
105 | ||
106 | static inline u16 hfa384x_inw_debug(struct net_device *dev, int a) | |
107 | { | |
108 | struct hostap_interface *iface; | |
109 | local_info_t *local; | |
110 | unsigned long flags; | |
111 | u16 v; | |
112 | ||
113 | iface = netdev_priv(dev); | |
114 | local = iface->local; | |
115 | ||
116 | spin_lock_irqsave(&local->lock, flags); | |
67e0e473 | 117 | v = readw(hw_priv->mem_start + a); |
ff1d2767 JM |
118 | prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INW, a, v); |
119 | spin_unlock_irqrestore(&local->lock, flags); | |
120 | return v; | |
121 | } | |
122 | ||
123 | #define HFA384X_OUTB(v,a) hfa384x_outb_debug(dev, (a), (v)) | |
124 | #define HFA384X_INB(a) hfa384x_inb_debug(dev, (a)) | |
125 | #define HFA384X_OUTW(v,a) hfa384x_outw_debug(dev, (a), (v)) | |
126 | #define HFA384X_INW(a) hfa384x_inw_debug(dev, (a)) | |
127 | #define HFA384X_OUTW_DATA(v,a) hfa384x_outw_debug(dev, (a), cpu_to_le16((v))) | |
128 | #define HFA384X_INW_DATA(a) (u16) le16_to_cpu(hfa384x_inw_debug(dev, (a))) | |
129 | ||
130 | #else /* PRISM2_IO_DEBUG */ | |
131 | ||
132 | static inline void hfa384x_outb(struct net_device *dev, int a, u8 v) | |
133 | { | |
134 | struct hostap_interface *iface; | |
67e0e473 | 135 | struct hostap_pci_priv *hw_priv; |
ff1d2767 | 136 | iface = netdev_priv(dev); |
67e0e473 JM |
137 | hw_priv = iface->local->hw_priv; |
138 | writeb(v, hw_priv->mem_start + a); | |
ff1d2767 JM |
139 | } |
140 | ||
141 | static inline u8 hfa384x_inb(struct net_device *dev, int a) | |
142 | { | |
143 | struct hostap_interface *iface; | |
67e0e473 | 144 | struct hostap_pci_priv *hw_priv; |
ff1d2767 | 145 | iface = netdev_priv(dev); |
67e0e473 JM |
146 | hw_priv = iface->local->hw_priv; |
147 | return readb(hw_priv->mem_start + a); | |
ff1d2767 JM |
148 | } |
149 | ||
150 | static inline void hfa384x_outw(struct net_device *dev, int a, u16 v) | |
151 | { | |
152 | struct hostap_interface *iface; | |
67e0e473 | 153 | struct hostap_pci_priv *hw_priv; |
ff1d2767 | 154 | iface = netdev_priv(dev); |
67e0e473 JM |
155 | hw_priv = iface->local->hw_priv; |
156 | writew(v, hw_priv->mem_start + a); | |
ff1d2767 JM |
157 | } |
158 | ||
159 | static inline u16 hfa384x_inw(struct net_device *dev, int a) | |
160 | { | |
161 | struct hostap_interface *iface; | |
67e0e473 | 162 | struct hostap_pci_priv *hw_priv; |
ff1d2767 | 163 | iface = netdev_priv(dev); |
67e0e473 JM |
164 | hw_priv = iface->local->hw_priv; |
165 | return readw(hw_priv->mem_start + a); | |
ff1d2767 JM |
166 | } |
167 | ||
168 | #define HFA384X_OUTB(v,a) hfa384x_outb(dev, (a), (v)) | |
169 | #define HFA384X_INB(a) hfa384x_inb(dev, (a)) | |
170 | #define HFA384X_OUTW(v,a) hfa384x_outw(dev, (a), (v)) | |
171 | #define HFA384X_INW(a) hfa384x_inw(dev, (a)) | |
172 | #define HFA384X_OUTW_DATA(v,a) hfa384x_outw(dev, (a), cpu_to_le16((v))) | |
173 | #define HFA384X_INW_DATA(a) (u16) le16_to_cpu(hfa384x_inw(dev, (a))) | |
174 | ||
175 | #endif /* PRISM2_IO_DEBUG */ | |
176 | ||
177 | ||
178 | static int hfa384x_from_bap(struct net_device *dev, u16 bap, void *buf, | |
179 | int len) | |
180 | { | |
181 | u16 d_off; | |
182 | u16 *pos; | |
183 | ||
184 | d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF; | |
185 | pos = (u16 *) buf; | |
186 | ||
187 | for ( ; len > 1; len -= 2) | |
188 | *pos++ = HFA384X_INW_DATA(d_off); | |
189 | ||
190 | if (len & 1) | |
191 | *((char *) pos) = HFA384X_INB(d_off); | |
192 | ||
193 | return 0; | |
194 | } | |
195 | ||
196 | ||
197 | static int hfa384x_to_bap(struct net_device *dev, u16 bap, void *buf, int len) | |
198 | { | |
199 | u16 d_off; | |
200 | u16 *pos; | |
201 | ||
202 | d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF; | |
203 | pos = (u16 *) buf; | |
204 | ||
205 | for ( ; len > 1; len -= 2) | |
206 | HFA384X_OUTW_DATA(*pos++, d_off); | |
207 | ||
208 | if (len & 1) | |
209 | HFA384X_OUTB(*((char *) pos), d_off); | |
210 | ||
211 | return 0; | |
212 | } | |
213 | ||
214 | ||
215 | /* FIX: This might change at some point.. */ | |
216 | #include "hostap_hw.c" | |
217 | ||
218 | static void prism2_pci_cor_sreset(local_info_t *local) | |
219 | { | |
220 | struct net_device *dev = local->dev; | |
221 | u16 reg; | |
222 | ||
223 | reg = HFA384X_INB(HFA384X_PCICOR_OFF); | |
224 | printk(KERN_DEBUG "%s: Original COR value: 0x%0x\n", dev->name, reg); | |
225 | ||
226 | /* linux-wlan-ng uses extremely long hold and settle times for | |
227 | * COR sreset. A comment in the driver code mentions that the long | |
228 | * delays appear to be necessary. However, at least IBM 22P6901 seems | |
229 | * to work fine with shorter delays. | |
230 | * | |
231 | * Longer delays can be configured by uncommenting following line: */ | |
232 | /* #define PRISM2_PCI_USE_LONG_DELAYS */ | |
233 | ||
234 | #ifdef PRISM2_PCI_USE_LONG_DELAYS | |
235 | int i; | |
236 | ||
237 | HFA384X_OUTW(reg | 0x0080, HFA384X_PCICOR_OFF); | |
238 | mdelay(250); | |
239 | ||
240 | HFA384X_OUTW(reg & ~0x0080, HFA384X_PCICOR_OFF); | |
241 | mdelay(500); | |
242 | ||
243 | /* Wait for f/w to complete initialization (CMD:BUSY == 0) */ | |
244 | i = 2000000 / 10; | |
245 | while ((HFA384X_INW(HFA384X_CMD_OFF) & HFA384X_CMD_BUSY) && --i) | |
246 | udelay(10); | |
247 | ||
248 | #else /* PRISM2_PCI_USE_LONG_DELAYS */ | |
249 | ||
250 | HFA384X_OUTW(reg | 0x0080, HFA384X_PCICOR_OFF); | |
251 | mdelay(2); | |
252 | HFA384X_OUTW(reg & ~0x0080, HFA384X_PCICOR_OFF); | |
253 | mdelay(2); | |
254 | ||
255 | #endif /* PRISM2_PCI_USE_LONG_DELAYS */ | |
256 | ||
257 | if (HFA384X_INW(HFA384X_CMD_OFF) & HFA384X_CMD_BUSY) { | |
258 | printk(KERN_DEBUG "%s: COR sreset timeout\n", dev->name); | |
259 | } | |
260 | } | |
261 | ||
262 | ||
263 | static void prism2_pci_genesis_reset(local_info_t *local, int hcr) | |
264 | { | |
265 | struct net_device *dev = local->dev; | |
266 | ||
267 | HFA384X_OUTW(0x00C5, HFA384X_PCICOR_OFF); | |
268 | mdelay(10); | |
269 | HFA384X_OUTW(hcr, HFA384X_PCIHCR_OFF); | |
270 | mdelay(10); | |
271 | HFA384X_OUTW(0x0045, HFA384X_PCICOR_OFF); | |
272 | mdelay(10); | |
273 | } | |
274 | ||
275 | ||
276 | static struct prism2_helper_functions prism2_pci_funcs = | |
277 | { | |
278 | .card_present = NULL, | |
279 | .cor_sreset = prism2_pci_cor_sreset, | |
280 | .dev_open = NULL, | |
281 | .dev_close = NULL, | |
282 | .genesis_reset = prism2_pci_genesis_reset, | |
283 | .hw_type = HOSTAP_HW_PCI, | |
284 | }; | |
285 | ||
286 | ||
287 | static int prism2_pci_probe(struct pci_dev *pdev, | |
288 | const struct pci_device_id *id) | |
289 | { | |
290 | unsigned long phymem; | |
291 | void __iomem *mem = NULL; | |
292 | local_info_t *local = NULL; | |
293 | struct net_device *dev = NULL; | |
294 | static int cards_found /* = 0 */; | |
295 | int irq_registered = 0; | |
296 | struct hostap_interface *iface; | |
67e0e473 JM |
297 | struct hostap_pci_priv *hw_priv; |
298 | ||
299 | hw_priv = kmalloc(sizeof(*hw_priv), GFP_KERNEL); | |
300 | if (hw_priv == NULL) | |
301 | return -ENOMEM; | |
302 | memset(hw_priv, 0, sizeof(*hw_priv)); | |
ff1d2767 JM |
303 | |
304 | if (pci_enable_device(pdev)) | |
305 | return -EIO; | |
306 | ||
307 | phymem = pci_resource_start(pdev, 0); | |
308 | ||
309 | if (!request_mem_region(phymem, pci_resource_len(pdev, 0), "Prism2")) { | |
310 | printk(KERN_ERR "prism2: Cannot reserve PCI memory region\n"); | |
311 | goto err_out_disable; | |
312 | } | |
313 | ||
314 | mem = ioremap(phymem, pci_resource_len(pdev, 0)); | |
315 | if (mem == NULL) { | |
316 | printk(KERN_ERR "prism2: Cannot remap PCI memory region\n") ; | |
317 | goto fail; | |
318 | } | |
319 | ||
0cd545d6 DH |
320 | dev = prism2_init_local_data(&prism2_pci_funcs, cards_found, |
321 | &pdev->dev); | |
ff1d2767 JM |
322 | if (dev == NULL) |
323 | goto fail; | |
324 | iface = netdev_priv(dev); | |
325 | local = iface->local; | |
67e0e473 | 326 | local->hw_priv = hw_priv; |
ff1d2767 JM |
327 | cards_found++; |
328 | ||
329 | dev->irq = pdev->irq; | |
67e0e473 | 330 | hw_priv->mem_start = mem; |
ff1d2767 JM |
331 | |
332 | prism2_pci_cor_sreset(local); | |
333 | ||
334 | pci_set_drvdata(pdev, dev); | |
335 | ||
336 | if (request_irq(dev->irq, prism2_interrupt, SA_SHIRQ, dev->name, | |
337 | dev)) { | |
338 | printk(KERN_WARNING "%s: request_irq failed\n", dev->name); | |
339 | goto fail; | |
340 | } else | |
341 | irq_registered = 1; | |
342 | ||
343 | if (!local->pri_only && prism2_hw_config(dev, 1)) { | |
344 | printk(KERN_DEBUG "%s: hardware initialization failed\n", | |
345 | dev_info); | |
346 | goto fail; | |
347 | } | |
348 | ||
349 | printk(KERN_INFO "%s: Intersil Prism2.5 PCI: " | |
350 | "mem=0x%lx, irq=%d\n", dev->name, phymem, dev->irq); | |
351 | ||
352 | return hostap_hw_ready(dev); | |
353 | ||
354 | fail: | |
67e0e473 JM |
355 | kfree(hw_priv); |
356 | ||
ff1d2767 JM |
357 | if (irq_registered && dev) |
358 | free_irq(dev->irq, dev); | |
359 | ||
360 | if (mem) | |
361 | iounmap(mem); | |
362 | ||
363 | release_mem_region(phymem, pci_resource_len(pdev, 0)); | |
364 | ||
365 | err_out_disable: | |
366 | pci_disable_device(pdev); | |
67e0e473 JM |
367 | kfree(hw_priv); |
368 | if (local) | |
369 | local->hw_priv = NULL; | |
ff1d2767 JM |
370 | prism2_free_local_data(dev); |
371 | ||
372 | return -ENODEV; | |
373 | } | |
374 | ||
375 | ||
376 | static void prism2_pci_remove(struct pci_dev *pdev) | |
377 | { | |
378 | struct net_device *dev; | |
379 | struct hostap_interface *iface; | |
380 | void __iomem *mem_start; | |
67e0e473 | 381 | struct hostap_pci_priv *hw_priv; |
ff1d2767 JM |
382 | |
383 | dev = pci_get_drvdata(pdev); | |
384 | iface = netdev_priv(dev); | |
67e0e473 | 385 | hw_priv = iface->local->hw_priv; |
ff1d2767 JM |
386 | |
387 | /* Reset the hardware, and ensure interrupts are disabled. */ | |
388 | prism2_pci_cor_sreset(iface->local); | |
389 | hfa384x_disable_interrupts(dev); | |
390 | ||
391 | if (dev->irq) | |
392 | free_irq(dev->irq, dev); | |
393 | ||
67e0e473 JM |
394 | mem_start = hw_priv->mem_start; |
395 | kfree(hw_priv); | |
396 | iface->local->hw_priv = NULL; | |
ff1d2767 JM |
397 | prism2_free_local_data(dev); |
398 | ||
399 | iounmap(mem_start); | |
400 | ||
401 | release_mem_region(pci_resource_start(pdev, 0), | |
402 | pci_resource_len(pdev, 0)); | |
403 | pci_disable_device(pdev); | |
404 | } | |
405 | ||
406 | ||
407 | #ifdef CONFIG_PM | |
b2dabd5a | 408 | static int prism2_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
ff1d2767 JM |
409 | { |
410 | struct net_device *dev = pci_get_drvdata(pdev); | |
411 | ||
412 | if (netif_running(dev)) { | |
413 | netif_stop_queue(dev); | |
414 | netif_device_detach(dev); | |
415 | } | |
416 | prism2_suspend(dev); | |
417 | pci_save_state(pdev); | |
418 | pci_disable_device(pdev); | |
419 | pci_set_power_state(pdev, 3); | |
420 | ||
421 | return 0; | |
422 | } | |
423 | ||
424 | static int prism2_pci_resume(struct pci_dev *pdev) | |
425 | { | |
426 | struct net_device *dev = pci_get_drvdata(pdev); | |
427 | ||
428 | pci_enable_device(pdev); | |
429 | pci_restore_state(pdev); | |
430 | prism2_hw_config(dev, 0); | |
431 | if (netif_running(dev)) { | |
432 | netif_device_attach(dev); | |
433 | netif_start_queue(dev); | |
434 | } | |
435 | ||
436 | return 0; | |
437 | } | |
438 | #endif /* CONFIG_PM */ | |
439 | ||
440 | ||
441 | MODULE_DEVICE_TABLE(pci, prism2_pci_id_table); | |
442 | ||
443 | static struct pci_driver prism2_pci_drv_id = { | |
444 | .name = "prism2_pci", | |
445 | .id_table = prism2_pci_id_table, | |
446 | .probe = prism2_pci_probe, | |
447 | .remove = prism2_pci_remove, | |
448 | #ifdef CONFIG_PM | |
449 | .suspend = prism2_pci_suspend, | |
450 | .resume = prism2_pci_resume, | |
451 | #endif /* CONFIG_PM */ | |
452 | /* Linux 2.4.6 added save_state and enable_wake that are not used here | |
453 | */ | |
454 | }; | |
455 | ||
456 | ||
457 | static int __init init_prism2_pci(void) | |
458 | { | |
459 | printk(KERN_INFO "%s: %s\n", dev_info, version); | |
460 | ||
461 | return pci_register_driver(&prism2_pci_drv_id); | |
462 | } | |
463 | ||
464 | ||
465 | static void __exit exit_prism2_pci(void) | |
466 | { | |
467 | pci_unregister_driver(&prism2_pci_drv_id); | |
468 | printk(KERN_INFO "%s: Driver unloaded\n", dev_info); | |
469 | } | |
470 | ||
471 | ||
472 | module_init(init_prism2_pci); | |
473 | module_exit(exit_prism2_pci); |