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931d4160 EG |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved. |
741c4cfb | 9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
931d4160 EG |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of version 2 of the GNU General Public License as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but | |
16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
23 | * USA | |
24 | * | |
25 | * The full GNU General Public License is included in this distribution | |
26 | * in the file called COPYING. | |
27 | * | |
28 | * Contact Information: | |
29 | * Intel Linux Wireless <ilw@linux.intel.com> | |
30 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
31 | * | |
32 | * BSD LICENSE | |
33 | * | |
51368bf7 | 34 | * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved. |
741c4cfb | 35 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
931d4160 EG |
36 | * All rights reserved. |
37 | * | |
38 | * Redistribution and use in source and binary forms, with or without | |
39 | * modification, are permitted provided that the following conditions | |
40 | * are met: | |
41 | * | |
42 | * * Redistributions of source code must retain the above copyright | |
43 | * notice, this list of conditions and the following disclaimer. | |
44 | * * Redistributions in binary form must reproduce the above copyright | |
45 | * notice, this list of conditions and the following disclaimer in | |
46 | * the documentation and/or other materials provided with the | |
47 | * distribution. | |
48 | * * Neither the name Intel Corporation nor the names of its | |
49 | * contributors may be used to endorse or promote products derived | |
50 | * from this software without specific prior written permission. | |
51 | * | |
52 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
53 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
54 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
55 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
56 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
57 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
58 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
59 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
60 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
61 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
62 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
63 | * | |
64 | *****************************************************************************/ | |
65 | ||
ee7bea58 EG |
66 | #include <linux/ieee80211.h> |
67 | #include <linux/etherdevice.h> | |
2b76ef13 EG |
68 | #include <net/mac80211.h> |
69 | ||
5b7ff615 | 70 | #include "fw-api-coex.h" |
931d4160 EG |
71 | #include "iwl-modparams.h" |
72 | #include "mvm.h" | |
f421f9c3 | 73 | #include "iwl-debug.h" |
931d4160 | 74 | |
dac94da8 EG |
75 | /* 20MHz / 40MHz below / 40Mhz above*/ |
76 | static const __le64 iwl_ci_mask[][3] = { | |
77 | /* dummy entry for channel 0 */ | |
78 | {cpu_to_le64(0), cpu_to_le64(0), cpu_to_le64(0)}, | |
79 | { | |
80 | cpu_to_le64(0x0000001FFFULL), | |
81 | cpu_to_le64(0x0ULL), | |
82 | cpu_to_le64(0x00007FFFFFULL), | |
83 | }, | |
84 | { | |
85 | cpu_to_le64(0x000000FFFFULL), | |
86 | cpu_to_le64(0x0ULL), | |
87 | cpu_to_le64(0x0003FFFFFFULL), | |
88 | }, | |
89 | { | |
90 | cpu_to_le64(0x000003FFFCULL), | |
91 | cpu_to_le64(0x0ULL), | |
92 | cpu_to_le64(0x000FFFFFFCULL), | |
93 | }, | |
94 | { | |
95 | cpu_to_le64(0x00001FFFE0ULL), | |
96 | cpu_to_le64(0x0ULL), | |
97 | cpu_to_le64(0x007FFFFFE0ULL), | |
98 | }, | |
99 | { | |
100 | cpu_to_le64(0x00007FFF80ULL), | |
101 | cpu_to_le64(0x00007FFFFFULL), | |
102 | cpu_to_le64(0x01FFFFFF80ULL), | |
103 | }, | |
104 | { | |
105 | cpu_to_le64(0x0003FFFC00ULL), | |
106 | cpu_to_le64(0x0003FFFFFFULL), | |
107 | cpu_to_le64(0x0FFFFFFC00ULL), | |
108 | }, | |
109 | { | |
110 | cpu_to_le64(0x000FFFF000ULL), | |
111 | cpu_to_le64(0x000FFFFFFCULL), | |
112 | cpu_to_le64(0x3FFFFFF000ULL), | |
113 | }, | |
114 | { | |
115 | cpu_to_le64(0x007FFF8000ULL), | |
116 | cpu_to_le64(0x007FFFFFE0ULL), | |
117 | cpu_to_le64(0xFFFFFF8000ULL), | |
118 | }, | |
119 | { | |
120 | cpu_to_le64(0x01FFFE0000ULL), | |
121 | cpu_to_le64(0x01FFFFFF80ULL), | |
122 | cpu_to_le64(0xFFFFFE0000ULL), | |
123 | }, | |
124 | { | |
125 | cpu_to_le64(0x0FFFF00000ULL), | |
126 | cpu_to_le64(0x0FFFFFFC00ULL), | |
127 | cpu_to_le64(0x0ULL), | |
128 | }, | |
129 | { | |
130 | cpu_to_le64(0x3FFFC00000ULL), | |
131 | cpu_to_le64(0x3FFFFFF000ULL), | |
132 | cpu_to_le64(0x0) | |
133 | }, | |
134 | { | |
135 | cpu_to_le64(0xFFFE000000ULL), | |
136 | cpu_to_le64(0xFFFFFF8000ULL), | |
137 | cpu_to_le64(0x0) | |
138 | }, | |
139 | { | |
140 | cpu_to_le64(0xFFF8000000ULL), | |
141 | cpu_to_le64(0xFFFFFE0000ULL), | |
142 | cpu_to_le64(0x0) | |
143 | }, | |
144 | { | |
d2ccc902 | 145 | cpu_to_le64(0xFFC0000000ULL), |
dac94da8 | 146 | cpu_to_le64(0x0ULL), |
d2ccc902 | 147 | cpu_to_le64(0x0ULL) |
dac94da8 | 148 | }, |
931d4160 EG |
149 | }; |
150 | ||
b9fae2d5 EG |
151 | struct corunning_block_luts { |
152 | u8 range; | |
153 | __le32 lut20[BT_COEX_CORUN_LUT_SIZE]; | |
154 | }; | |
155 | ||
156 | /* | |
157 | * Ranges for the antenna coupling calibration / co-running block LUT: | |
158 | * LUT0: [ 0, 12[ | |
159 | * LUT1: [12, 20[ | |
160 | * LUT2: [20, 21[ | |
161 | * LUT3: [21, 23[ | |
162 | * LUT4: [23, 27[ | |
163 | * LUT5: [27, 30[ | |
164 | * LUT6: [30, 32[ | |
165 | * LUT7: [32, 33[ | |
166 | * LUT8: [33, - [ | |
167 | */ | |
168 | static const struct corunning_block_luts antenna_coupling_ranges[] = { | |
169 | { | |
170 | .range = 0, | |
171 | .lut20 = { | |
172 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
173 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
174 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
175 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
176 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
177 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
178 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
179 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
180 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
181 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
182 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
183 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
184 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
185 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
186 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
187 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
188 | }, | |
189 | }, | |
190 | { | |
191 | .range = 12, | |
192 | .lut20 = { | |
e583b50c | 193 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
b9fae2d5 EG |
194 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
195 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
196 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
197 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
198 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
199 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
200 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
201 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
202 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
203 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
204 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
205 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
206 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
207 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
208 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
209 | }, | |
210 | }, | |
211 | { | |
212 | .range = 20, | |
213 | .lut20 = { | |
e583b50c | 214 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
b9fae2d5 EG |
215 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
216 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
217 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
218 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
219 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
220 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
221 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
222 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
223 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
224 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
225 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
226 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
227 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
228 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
229 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
230 | }, | |
231 | }, | |
232 | { | |
233 | .range = 21, | |
234 | .lut20 = { | |
e583b50c | 235 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
b9fae2d5 EG |
236 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
237 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
238 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
239 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
240 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
241 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
242 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
243 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
244 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
245 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
246 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
247 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
248 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
249 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
250 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
251 | }, | |
252 | }, | |
253 | { | |
254 | .range = 23, | |
255 | .lut20 = { | |
e583b50c | 256 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
b9fae2d5 EG |
257 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
258 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
259 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
260 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
261 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
262 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
263 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
264 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
265 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
266 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
267 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
268 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
269 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
270 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
271 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
272 | }, | |
273 | }, | |
274 | { | |
275 | .range = 27, | |
276 | .lut20 = { | |
e583b50c | 277 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
b9fae2d5 EG |
278 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
279 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
280 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
281 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
282 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
283 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
284 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
285 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
286 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
287 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
288 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
289 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
290 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
291 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
292 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
293 | }, | |
294 | }, | |
295 | { | |
296 | .range = 30, | |
297 | .lut20 = { | |
e583b50c | 298 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
b9fae2d5 EG |
299 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
300 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
301 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
302 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
303 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
304 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
305 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
306 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
307 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
308 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
309 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
310 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
311 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
312 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
313 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
314 | }, | |
315 | }, | |
316 | { | |
317 | .range = 32, | |
318 | .lut20 = { | |
e583b50c | 319 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
b9fae2d5 EG |
320 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
321 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
322 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
323 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
324 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
325 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
326 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
327 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
328 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
329 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
330 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
331 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
332 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
333 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
334 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
335 | }, | |
336 | }, | |
337 | { | |
338 | .range = 33, | |
339 | .lut20 = { | |
e583b50c | 340 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
b9fae2d5 EG |
341 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
342 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
343 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
344 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
345 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
346 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
347 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
348 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
349 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
350 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
351 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
352 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
353 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
354 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
355 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
356 | }, | |
357 | }, | |
358 | }; | |
359 | ||
4515f30f EG |
360 | static enum iwl_bt_coex_lut_type |
361 | iwl_get_coex_type(struct iwl_mvm *mvm, const struct ieee80211_vif *vif) | |
362 | { | |
363 | struct ieee80211_chanctx_conf *chanctx_conf; | |
364 | enum iwl_bt_coex_lut_type ret; | |
365 | u16 phy_ctx_id; | |
430a3bba | 366 | u32 primary_ch_phy_id, secondary_ch_phy_id; |
4515f30f | 367 | |
9145d151 EG |
368 | /* |
369 | * Checking that we hold mvm->mutex is a good idea, but the rate | |
370 | * control can't acquire the mutex since it runs in Tx path. | |
371 | * So this is racy in that case, but in the worst case, the AMPDU | |
372 | * size limit will be wrong for a short time which is not a big | |
373 | * issue. | |
374 | */ | |
4515f30f EG |
375 | |
376 | rcu_read_lock(); | |
377 | ||
378 | chanctx_conf = rcu_dereference(vif->chanctx_conf); | |
379 | ||
380 | if (!chanctx_conf || | |
381 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) { | |
382 | rcu_read_unlock(); | |
7fa4fa0c | 383 | return BT_COEX_INVALID_LUT; |
4515f30f EG |
384 | } |
385 | ||
386 | ret = BT_COEX_TX_DIS_LUT; | |
387 | ||
39149911 EG |
388 | if (mvm->cfg->bt_shared_single_ant) { |
389 | rcu_read_unlock(); | |
390 | return ret; | |
391 | } | |
392 | ||
4515f30f | 393 | phy_ctx_id = *((u16 *)chanctx_conf->drv_priv); |
430a3bba EG |
394 | primary_ch_phy_id = le32_to_cpu(mvm->last_bt_ci_cmd.primary_ch_phy_id); |
395 | secondary_ch_phy_id = | |
396 | le32_to_cpu(mvm->last_bt_ci_cmd.secondary_ch_phy_id); | |
4515f30f | 397 | |
430a3bba | 398 | if (primary_ch_phy_id == phy_ctx_id) |
4515f30f | 399 | ret = le32_to_cpu(mvm->last_bt_notif.primary_ch_lut); |
430a3bba | 400 | else if (secondary_ch_phy_id == phy_ctx_id) |
4515f30f EG |
401 | ret = le32_to_cpu(mvm->last_bt_notif.secondary_ch_lut); |
402 | /* else - default = TX TX disallowed */ | |
403 | ||
404 | rcu_read_unlock(); | |
405 | ||
406 | return ret; | |
407 | } | |
408 | ||
931d4160 EG |
409 | int iwl_send_bt_init_conf(struct iwl_mvm *mvm) |
410 | { | |
741c4cfb | 411 | struct iwl_bt_coex_cmd bt_cmd = {}; |
430a3bba | 412 | u32 mode; |
dac94da8 | 413 | |
859d914c | 414 | if (!fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
0ea8d043 EG |
415 | return iwl_send_bt_init_conf_old(mvm); |
416 | ||
a39979a8 EG |
417 | lockdep_assert_held(&mvm->mutex); |
418 | ||
419 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) { | |
420 | switch (mvm->bt_force_ant_mode) { | |
a39979a8 | 421 | case BT_FORCE_ANT_BT: |
430a3bba | 422 | mode = BT_COEX_BT; |
a39979a8 EG |
423 | break; |
424 | case BT_FORCE_ANT_WIFI: | |
430a3bba | 425 | mode = BT_COEX_WIFI; |
a39979a8 EG |
426 | break; |
427 | default: | |
428 | WARN_ON(1); | |
430a3bba | 429 | mode = 0; |
a39979a8 EG |
430 | } |
431 | ||
741c4cfb | 432 | bt_cmd.mode = cpu_to_le32(mode); |
a39979a8 EG |
433 | goto send_cmd; |
434 | } | |
435 | ||
430a3bba | 436 | mode = iwlwifi_mod_params.bt_coex_active ? BT_COEX_NW : BT_COEX_DISABLE; |
741c4cfb | 437 | bt_cmd.mode = cpu_to_le32(mode); |
dac94da8 | 438 | |
741e703b | 439 | if (IWL_MVM_BT_COEX_SYNC2SCO) |
741c4cfb | 440 | bt_cmd.enabled_modules |= |
430a3bba | 441 | cpu_to_le32(BT_COEX_SYNC2SCO_ENABLED); |
741e703b | 442 | |
0522588d | 443 | if (iwl_mvm_bt_is_plcr_supported(mvm)) |
741c4cfb | 444 | bt_cmd.enabled_modules |= cpu_to_le32(BT_COEX_CORUN_ENABLED); |
b9fae2d5 | 445 | |
e7c2e1fd | 446 | if (iwl_mvm_is_mplut_supported(mvm)) |
741c4cfb | 447 | bt_cmd.enabled_modules |= cpu_to_le32(BT_COEX_MPLUT_ENABLED); |
cdb00563 | 448 | |
741c4cfb | 449 | bt_cmd.enabled_modules |= cpu_to_le32(BT_COEX_HIGH_BAND_RET); |
261c0ec0 | 450 | |
a39979a8 | 451 | send_cmd: |
2b76ef13 | 452 | memset(&mvm->last_bt_notif, 0, sizeof(mvm->last_bt_notif)); |
dac94da8 | 453 | memset(&mvm->last_bt_ci_cmd, 0, sizeof(mvm->last_bt_ci_cmd)); |
2b76ef13 | 454 | |
741c4cfb | 455 | return iwl_mvm_send_cmd_pdu(mvm, BT_CONFIG, 0, sizeof(bt_cmd), &bt_cmd); |
931d4160 | 456 | } |
f421f9c3 | 457 | |
1fa477c6 EG |
458 | static int iwl_mvm_bt_coex_reduced_txp(struct iwl_mvm *mvm, u8 sta_id, |
459 | bool enable) | |
2b76ef13 | 460 | { |
455e7ac5 | 461 | struct iwl_bt_coex_reduced_txp_update_cmd cmd = {}; |
2b76ef13 | 462 | struct iwl_mvm_sta *mvmsta; |
455e7ac5 | 463 | u32 value; |
03e304e4 | 464 | int ret; |
2b76ef13 | 465 | |
f327b04c EG |
466 | mvmsta = iwl_mvm_sta_from_staid_protected(mvm, sta_id); |
467 | if (!mvmsta) | |
2b76ef13 EG |
468 | return 0; |
469 | ||
2b76ef13 | 470 | /* nothing to do */ |
1fa477c6 | 471 | if (mvmsta->bt_reduced_txpower == enable) |
2b76ef13 EG |
472 | return 0; |
473 | ||
455e7ac5 | 474 | value = mvmsta->sta_id; |
03e304e4 | 475 | |
2b76ef13 | 476 | if (enable) |
455e7ac5 | 477 | value |= BT_REDUCED_TX_POWER_BIT; |
2b76ef13 EG |
478 | |
479 | IWL_DEBUG_COEX(mvm, "%sable reduced Tx Power for sta %d\n", | |
480 | enable ? "en" : "dis", sta_id); | |
481 | ||
455e7ac5 | 482 | cmd.reduced_txp = cpu_to_le32(value); |
2b76ef13 EG |
483 | mvmsta->bt_reduced_txpower = enable; |
484 | ||
455e7ac5 EG |
485 | ret = iwl_mvm_send_cmd_pdu(mvm, BT_COEX_UPDATE_REDUCED_TXP, CMD_ASYNC, |
486 | sizeof(cmd), &cmd); | |
03e304e4 | 487 | |
03e304e4 | 488 | return ret; |
2b76ef13 EG |
489 | } |
490 | ||
491 | struct iwl_bt_iterator_data { | |
430a3bba | 492 | struct iwl_bt_coex_profile_notif *notif; |
2b76ef13 | 493 | struct iwl_mvm *mvm; |
dac94da8 EG |
494 | struct ieee80211_chanctx_conf *primary; |
495 | struct ieee80211_chanctx_conf *secondary; | |
0ee5bcdd | 496 | bool primary_ll; |
7da052b8 EG |
497 | }; |
498 | ||
f6fc5775 EG |
499 | static inline |
500 | void iwl_mvm_bt_coex_enable_rssi_event(struct iwl_mvm *mvm, | |
501 | struct ieee80211_vif *vif, | |
502 | bool enable, int rssi) | |
503 | { | |
504 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
505 | ||
506 | mvmvif->bf_data.last_bt_coex_event = rssi; | |
507 | mvmvif->bf_data.bt_coex_max_thold = | |
8286d9f5 | 508 | enable ? -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH : 0; |
f6fc5775 | 509 | mvmvif->bf_data.bt_coex_min_thold = |
8286d9f5 | 510 | enable ? -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH : 0; |
f6fc5775 EG |
511 | } |
512 | ||
dac94da8 | 513 | /* must be called under rcu_read_lock */ |
7da052b8 EG |
514 | static void iwl_mvm_bt_notif_iterator(void *_data, u8 *mac, |
515 | struct ieee80211_vif *vif) | |
516 | { | |
517 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
2b76ef13 EG |
518 | struct iwl_bt_iterator_data *data = _data; |
519 | struct iwl_mvm *mvm = data->mvm; | |
7da052b8 | 520 | struct ieee80211_chanctx_conf *chanctx_conf; |
582de30a JB |
521 | /* default smps_mode is AUTOMATIC - only used for client modes */ |
522 | enum ieee80211_smps_mode smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
f6415f6b | 523 | u32 bt_activity_grading; |
2b76ef13 | 524 | int ave_rssi; |
7da052b8 | 525 | |
9ee718aa | 526 | lockdep_assert_held(&mvm->mutex); |
7da052b8 | 527 | |
f6415f6b EG |
528 | switch (vif->type) { |
529 | case NL80211_IFTYPE_STATION: | |
f6415f6b EG |
530 | break; |
531 | case NL80211_IFTYPE_AP: | |
45bbb2ca | 532 | if (!mvmvif->ap_ibss_active) |
f6415f6b | 533 | return; |
f6415f6b EG |
534 | break; |
535 | default: | |
536 | return; | |
537 | } | |
7da052b8 | 538 | |
dac94da8 EG |
539 | chanctx_conf = rcu_dereference(vif->chanctx_conf); |
540 | ||
541 | /* If channel context is invalid or not on 2.4GHz .. */ | |
542 | if ((!chanctx_conf || | |
543 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ)) { | |
0f618e6e | 544 | if (vif->type == NL80211_IFTYPE_STATION) { |
45bbb2ca EG |
545 | /* ... relax constraints and disable rssi events */ |
546 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
547 | smps_mode); | |
0f618e6e EG |
548 | iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, |
549 | false); | |
f6415f6b | 550 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); |
0f618e6e | 551 | } |
41069b46 | 552 | return; |
dac94da8 EG |
553 | } |
554 | ||
f6415f6b EG |
555 | bt_activity_grading = le32_to_cpu(data->notif->bt_activity_grading); |
556 | if (bt_activity_grading >= BT_HIGH_TRAFFIC) | |
557 | smps_mode = IEEE80211_SMPS_STATIC; | |
558 | else if (bt_activity_grading >= BT_LOW_TRAFFIC) | |
45bbb2ca | 559 | smps_mode = IEEE80211_SMPS_DYNAMIC; |
4d66449a | 560 | |
582de30a | 561 | /* relax SMPS constraints for next association */ |
4d66449a EG |
562 | if (!vif->bss_conf.assoc) |
563 | smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
564 | ||
4cd4b50c EG |
565 | if (mvmvif->phy_ctxt && |
566 | IWL_COEX_IS_RRC_ON(mvm->last_bt_notif.ttc_rrc_status, | |
4c86f938 EG |
567 | mvmvif->phy_ctxt->id)) |
568 | smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
569 | ||
f6415f6b | 570 | IWL_DEBUG_COEX(data->mvm, |
430a3bba EG |
571 | "mac %d: bt_activity_grading %d smps_req %d\n", |
572 | mvmvif->id, bt_activity_grading, smps_mode); | |
f6415f6b | 573 | |
45bbb2ca EG |
574 | if (vif->type == NL80211_IFTYPE_STATION) |
575 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
576 | smps_mode); | |
f6415f6b | 577 | |
0ee5bcdd EG |
578 | /* low latency is always primary */ |
579 | if (iwl_mvm_vif_low_latency(mvmvif)) { | |
580 | data->primary_ll = true; | |
581 | ||
582 | data->secondary = data->primary; | |
583 | data->primary = chanctx_conf; | |
584 | } | |
585 | ||
dac94da8 | 586 | if (vif->type == NL80211_IFTYPE_AP) { |
5023d966 | 587 | if (!mvmvif->ap_ibss_active) |
dac94da8 EG |
588 | return; |
589 | ||
dac94da8 EG |
590 | if (chanctx_conf == data->primary) |
591 | return; | |
592 | ||
0ee5bcdd EG |
593 | if (!data->primary_ll) { |
594 | /* | |
595 | * downgrade the current primary no matter what its | |
596 | * type is. | |
597 | */ | |
598 | data->secondary = data->primary; | |
599 | data->primary = chanctx_conf; | |
600 | } else { | |
601 | /* there is low latency vif - we will be secondary */ | |
602 | data->secondary = chanctx_conf; | |
603 | } | |
9166b1ee EG |
604 | return; |
605 | } | |
606 | ||
0ee5bcdd EG |
607 | /* |
608 | * STA / P2P Client, try to be primary if first vif. If we are in low | |
609 | * latency mode, we are already in primary and just don't do much | |
610 | */ | |
dac94da8 EG |
611 | if (!data->primary || data->primary == chanctx_conf) |
612 | data->primary = chanctx_conf; | |
613 | else if (!data->secondary) | |
614 | /* if secondary is not NULL, it might be a GO */ | |
615 | data->secondary = chanctx_conf; | |
616 | ||
4d66449a EG |
617 | /* |
618 | * don't reduce the Tx power if one of these is true: | |
619 | * we are in LOOSE | |
620 | * single share antenna product | |
621 | * BT is active | |
622 | * we are associated | |
623 | */ | |
39149911 | 624 | if (iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT || |
4d66449a | 625 | mvm->cfg->bt_shared_single_ant || !vif->bss_conf.assoc || |
430a3bba | 626 | le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF) { |
0f618e6e | 627 | iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false); |
f6fc5775 | 628 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); |
2b76ef13 | 629 | return; |
39149911 | 630 | } |
2b76ef13 | 631 | |
911222b5 AO |
632 | /* try to get the avg rssi from fw */ |
633 | ave_rssi = mvmvif->bf_data.ave_beacon_signal; | |
2b76ef13 EG |
634 | |
635 | /* if the RSSI isn't valid, fake it is very low */ | |
636 | if (!ave_rssi) | |
637 | ave_rssi = -100; | |
8286d9f5 | 638 | if (ave_rssi > -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH) { |
2b76ef13 EG |
639 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true)) |
640 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
8286d9f5 | 641 | } else if (ave_rssi < -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH) { |
2b76ef13 EG |
642 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false)) |
643 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
2b76ef13 EG |
644 | } |
645 | ||
646 | /* Begin to monitor the RSSI: it may influence the reduced Tx power */ | |
f6fc5775 | 647 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, true, ave_rssi); |
7da052b8 EG |
648 | } |
649 | ||
d37cac98 | 650 | static void iwl_mvm_bt_coex_notif_handle(struct iwl_mvm *mvm) |
f421f9c3 | 651 | { |
2b76ef13 | 652 | struct iwl_bt_iterator_data data = { |
7da052b8 | 653 | .mvm = mvm, |
d37cac98 | 654 | .notif = &mvm->last_bt_notif, |
7da052b8 | 655 | }; |
430a3bba | 656 | struct iwl_bt_coex_ci_cmd cmd = {}; |
dac94da8 | 657 | u8 ci_bw_idx; |
f421f9c3 | 658 | |
a39979a8 EG |
659 | /* Ignore updates if we are in force mode */ |
660 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
661 | return; | |
662 | ||
dac94da8 | 663 | rcu_read_lock(); |
7da052b8 EG |
664 | ieee80211_iterate_active_interfaces_atomic( |
665 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
666 | iwl_mvm_bt_notif_iterator, &data); | |
667 | ||
dac94da8 EG |
668 | if (data.primary) { |
669 | struct ieee80211_chanctx_conf *chan = data.primary; | |
670 | if (WARN_ON(!chan->def.chan)) { | |
671 | rcu_read_unlock(); | |
672 | return; | |
673 | } | |
674 | ||
675 | if (chan->def.width < NL80211_CHAN_WIDTH_40) { | |
676 | ci_bw_idx = 0; | |
dac94da8 | 677 | } else { |
dac94da8 EG |
678 | if (chan->def.center_freq1 > |
679 | chan->def.chan->center_freq) | |
680 | ci_bw_idx = 2; | |
681 | else | |
682 | ci_bw_idx = 1; | |
683 | } | |
684 | ||
685 | cmd.bt_primary_ci = | |
686 | iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx]; | |
430a3bba EG |
687 | cmd.primary_ch_phy_id = |
688 | cpu_to_le32(*((u16 *)data.primary->drv_priv)); | |
dac94da8 EG |
689 | } |
690 | ||
691 | if (data.secondary) { | |
692 | struct ieee80211_chanctx_conf *chan = data.secondary; | |
693 | if (WARN_ON(!data.secondary->def.chan)) { | |
694 | rcu_read_unlock(); | |
695 | return; | |
696 | } | |
697 | ||
698 | if (chan->def.width < NL80211_CHAN_WIDTH_40) { | |
699 | ci_bw_idx = 0; | |
dac94da8 | 700 | } else { |
dac94da8 EG |
701 | if (chan->def.center_freq1 > |
702 | chan->def.chan->center_freq) | |
703 | ci_bw_idx = 2; | |
704 | else | |
705 | ci_bw_idx = 1; | |
706 | } | |
707 | ||
708 | cmd.bt_secondary_ci = | |
709 | iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx]; | |
430a3bba EG |
710 | cmd.secondary_ch_phy_id = |
711 | cpu_to_le32(*((u16 *)data.secondary->drv_priv)); | |
dac94da8 EG |
712 | } |
713 | ||
714 | rcu_read_unlock(); | |
715 | ||
716 | /* Don't spam the fw with the same command over and over */ | |
717 | if (memcmp(&cmd, &mvm->last_bt_ci_cmd, sizeof(cmd))) { | |
a1022927 | 718 | if (iwl_mvm_send_cmd_pdu(mvm, BT_COEX_CI, 0, |
dac94da8 | 719 | sizeof(cmd), &cmd)) |
3c6acb61 | 720 | IWL_ERR(mvm, "Failed to send BT_CI cmd\n"); |
dac94da8 EG |
721 | memcpy(&mvm->last_bt_ci_cmd, &cmd, sizeof(cmd)); |
722 | } | |
9166b1ee EG |
723 | } |
724 | ||
0416841d JB |
725 | void iwl_mvm_rx_bt_coex_notif(struct iwl_mvm *mvm, |
726 | struct iwl_rx_cmd_buffer *rxb) | |
9166b1ee EG |
727 | { |
728 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
df878f38 | 729 | struct iwl_bt_coex_profile_notif *notif = (void *)pkt->data; |
9166b1ee | 730 | |
0416841d JB |
731 | if (!fw_has_api(&mvm->fw->ucode_capa, |
732 | IWL_UCODE_TLV_API_BT_COEX_SPLIT)) { | |
733 | iwl_mvm_rx_bt_coex_notif_old(mvm, rxb); | |
734 | return; | |
735 | } | |
0ea8d043 | 736 | |
9166b1ee | 737 | IWL_DEBUG_COEX(mvm, "BT Coex Notification received\n"); |
dac94da8 EG |
738 | IWL_DEBUG_COEX(mvm, "\tBT ci compliance %d\n", notif->bt_ci_compliance); |
739 | IWL_DEBUG_COEX(mvm, "\tBT primary_ch_lut %d\n", | |
740 | le32_to_cpu(notif->primary_ch_lut)); | |
741 | IWL_DEBUG_COEX(mvm, "\tBT secondary_ch_lut %d\n", | |
742 | le32_to_cpu(notif->secondary_ch_lut)); | |
743 | IWL_DEBUG_COEX(mvm, "\tBT activity grading %d\n", | |
744 | le32_to_cpu(notif->bt_activity_grading)); | |
9166b1ee | 745 | |
d37cac98 EG |
746 | /* remember this notification for future use: rssi fluctuations */ |
747 | memcpy(&mvm->last_bt_notif, notif, sizeof(mvm->last_bt_notif)); | |
748 | ||
749 | iwl_mvm_bt_coex_notif_handle(mvm); | |
2b76ef13 EG |
750 | } |
751 | ||
2b76ef13 | 752 | void iwl_mvm_bt_rssi_event(struct iwl_mvm *mvm, struct ieee80211_vif *vif, |
a8182929 | 753 | enum ieee80211_rssi_event_data rssi_event) |
2b76ef13 | 754 | { |
5b530e95 | 755 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); |
2b76ef13 EG |
756 | int ret; |
757 | ||
859d914c JB |
758 | if (!fw_has_api(&mvm->fw->ucode_capa, |
759 | IWL_UCODE_TLV_API_BT_COEX_SPLIT)) { | |
0ea8d043 EG |
760 | iwl_mvm_bt_rssi_event_old(mvm, vif, rssi_event); |
761 | return; | |
762 | } | |
763 | ||
3dd1cd2d | 764 | lockdep_assert_held(&mvm->mutex); |
2b76ef13 | 765 | |
a39979a8 EG |
766 | /* Ignore updates if we are in force mode */ |
767 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
768 | return; | |
769 | ||
1e929199 EG |
770 | /* |
771 | * Rssi update while not associated - can happen since the statistics | |
772 | * are handled asynchronously | |
773 | */ | |
774 | if (mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT) | |
3dd1cd2d | 775 | return; |
2b76ef13 | 776 | |
4515f30f | 777 | /* No BT - reports should be disabled */ |
430a3bba | 778 | if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF) |
3dd1cd2d | 779 | return; |
2b76ef13 EG |
780 | |
781 | IWL_DEBUG_COEX(mvm, "RSSI for %pM is now %s\n", vif->bss_conf.bssid, | |
782 | rssi_event == RSSI_EVENT_HIGH ? "HIGH" : "LOW"); | |
783 | ||
784 | /* | |
785 | * Check if rssi is good enough for reduced Tx power, but not in loose | |
786 | * scheme. | |
787 | */ | |
39149911 | 788 | if (rssi_event == RSSI_EVENT_LOW || mvm->cfg->bt_shared_single_ant || |
4515f30f | 789 | iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT) |
2b76ef13 EG |
790 | ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, |
791 | false); | |
f421f9c3 | 792 | else |
2b76ef13 | 793 | ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true); |
f421f9c3 | 794 | |
2b76ef13 EG |
795 | if (ret) |
796 | IWL_ERR(mvm, "couldn't send BT_CONFIG HCMD upon RSSI event\n"); | |
f421f9c3 | 797 | } |
9166b1ee | 798 | |
9145d151 EG |
799 | #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) |
800 | #define LINK_QUAL_AGG_TIME_LIMIT_BT_ACT (1200) | |
801 | ||
5b7ff615 EG |
802 | u16 iwl_mvm_coex_agg_time_limit(struct iwl_mvm *mvm, |
803 | struct ieee80211_sta *sta) | |
9145d151 | 804 | { |
5b577a90 | 805 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
4c86f938 EG |
806 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(mvmsta->vif); |
807 | struct iwl_mvm_phy_ctxt *phy_ctxt = mvmvif->phy_ctxt; | |
9145d151 EG |
808 | enum iwl_bt_coex_lut_type lut_type; |
809 | ||
859d914c | 810 | if (!fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
0ea8d043 EG |
811 | return iwl_mvm_coex_agg_time_limit_old(mvm, sta); |
812 | ||
4c86f938 EG |
813 | if (IWL_COEX_IS_TTC_ON(mvm->last_bt_notif.ttc_rrc_status, phy_ctxt->id)) |
814 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; | |
815 | ||
9145d151 | 816 | if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < |
c2119351 | 817 | BT_HIGH_TRAFFIC) |
9145d151 | 818 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; |
35fbf5d0 | 819 | |
9145d151 EG |
820 | lut_type = iwl_get_coex_type(mvm, mvmsta->vif); |
821 | ||
7fa4fa0c | 822 | if (lut_type == BT_COEX_LOOSE_LUT || lut_type == BT_COEX_INVALID_LUT) |
9145d151 EG |
823 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; |
824 | ||
825 | /* tight coex, high bt traffic, reduce AGG time limit */ | |
826 | return LINK_QUAL_AGG_TIME_LIMIT_BT_ACT; | |
827 | } | |
828 | ||
ffa6c707 EG |
829 | bool iwl_mvm_bt_coex_is_mimo_allowed(struct iwl_mvm *mvm, |
830 | struct ieee80211_sta *sta) | |
831 | { | |
5b577a90 | 832 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
4c86f938 EG |
833 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(mvmsta->vif); |
834 | struct iwl_mvm_phy_ctxt *phy_ctxt = mvmvif->phy_ctxt; | |
7fa4fa0c | 835 | enum iwl_bt_coex_lut_type lut_type; |
ffa6c707 | 836 | |
859d914c | 837 | if (!fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
5fc7d86c | 838 | return iwl_mvm_bt_coex_is_mimo_allowed_old(mvm, sta); |
0ea8d043 | 839 | |
4c86f938 | 840 | if (IWL_COEX_IS_TTC_ON(mvm->last_bt_notif.ttc_rrc_status, phy_ctxt->id)) |
35fbf5d0 EG |
841 | return true; |
842 | ||
ffa6c707 EG |
843 | if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < |
844 | BT_HIGH_TRAFFIC) | |
845 | return true; | |
846 | ||
847 | /* | |
7fa4fa0c EG |
848 | * In Tight / TxTxDis, BT can't Rx while we Tx, so use both antennas |
849 | * since BT is already killed. | |
850 | * In Loose, BT can Rx while we Tx, so forbid MIMO to let BT Rx while | |
851 | * we Tx. | |
852 | * When we are in 5GHz, we'll get BT_COEX_INVALID_LUT allowing MIMO. | |
ffa6c707 | 853 | */ |
7fa4fa0c EG |
854 | lut_type = iwl_get_coex_type(mvm, mvmsta->vif); |
855 | return lut_type != BT_COEX_LOOSE_LUT; | |
ffa6c707 EG |
856 | } |
857 | ||
219fb66b EG |
858 | bool iwl_mvm_bt_coex_is_ant_avail(struct iwl_mvm *mvm, u8 ant) |
859 | { | |
860 | /* there is no other antenna, shared antenna is always available */ | |
861 | if (mvm->cfg->bt_shared_single_ant) | |
862 | return true; | |
863 | ||
864 | if (ant & mvm->cfg->non_shared_ant) | |
865 | return true; | |
866 | ||
859d914c | 867 | if (!fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
219fb66b EG |
868 | return iwl_mvm_bt_coex_is_shared_ant_avail_old(mvm); |
869 | ||
870 | return le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < | |
871 | BT_HIGH_TRAFFIC; | |
872 | } | |
873 | ||
34c8b24f EG |
874 | bool iwl_mvm_bt_coex_is_shared_ant_avail(struct iwl_mvm *mvm) |
875 | { | |
bbab7582 EG |
876 | /* there is no other antenna, shared antenna is always available */ |
877 | if (mvm->cfg->bt_shared_single_ant) | |
878 | return true; | |
879 | ||
859d914c | 880 | if (!fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
0ea8d043 EG |
881 | return iwl_mvm_bt_coex_is_shared_ant_avail_old(mvm); |
882 | ||
cb97e415 | 883 | return le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < BT_HIGH_TRAFFIC; |
34c8b24f EG |
884 | } |
885 | ||
2fd647f8 EP |
886 | bool iwl_mvm_bt_coex_is_tpc_allowed(struct iwl_mvm *mvm, |
887 | enum ieee80211_band band) | |
888 | { | |
889 | u32 bt_activity = le32_to_cpu(mvm->last_bt_notif.bt_activity_grading); | |
890 | ||
859d914c | 891 | if (!fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
0ea8d043 EG |
892 | return iwl_mvm_bt_coex_is_tpc_allowed_old(mvm, band); |
893 | ||
2fd647f8 EP |
894 | if (band != IEEE80211_BAND_2GHZ) |
895 | return false; | |
896 | ||
897 | return bt_activity >= BT_LOW_TRAFFIC; | |
898 | } | |
899 | ||
ee7bea58 | 900 | u8 iwl_mvm_bt_coex_tx_prio(struct iwl_mvm *mvm, struct ieee80211_hdr *hdr, |
b797e3fb | 901 | struct ieee80211_tx_info *info, u8 ac) |
ee7bea58 EG |
902 | { |
903 | __le16 fc = hdr->frame_control; | |
904 | ||
b797e3fb EG |
905 | if (info->band != IEEE80211_BAND_2GHZ) |
906 | return 0; | |
907 | ||
cdb00563 EG |
908 | if (unlikely(mvm->bt_tx_prio)) |
909 | return mvm->bt_tx_prio - 1; | |
910 | ||
ee7bea58 | 911 | /* High prio packet (wrt. BT coex) if it is EAPOL, MCAST or MGMT */ |
b797e3fb | 912 | if (info->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO || |
ee7bea58 | 913 | is_multicast_ether_addr(hdr->addr1) || |
b797e3fb EG |
914 | ieee80211_is_ctl(fc) || ieee80211_is_mgmt(fc) || |
915 | ieee80211_is_nullfunc(fc) || ieee80211_is_qos_nullfunc(fc)) | |
916 | return 3; | |
917 | ||
918 | switch (ac) { | |
919 | case IEEE80211_AC_BE: | |
920 | return 1; | |
921 | case IEEE80211_AC_VO: | |
922 | return 3; | |
923 | case IEEE80211_AC_VI: | |
ee7bea58 | 924 | return 2; |
b797e3fb EG |
925 | default: |
926 | break; | |
927 | } | |
ee7bea58 EG |
928 | |
929 | return 0; | |
930 | } | |
931 | ||
8e484f0b | 932 | void iwl_mvm_bt_coex_vif_change(struct iwl_mvm *mvm) |
9166b1ee | 933 | { |
859d914c JB |
934 | if (!fw_has_api(&mvm->fw->ucode_capa, |
935 | IWL_UCODE_TLV_API_BT_COEX_SPLIT)) { | |
0ea8d043 EG |
936 | iwl_mvm_bt_coex_vif_change_old(mvm); |
937 | return; | |
938 | } | |
939 | ||
d37cac98 | 940 | iwl_mvm_bt_coex_notif_handle(mvm); |
9166b1ee | 941 | } |
b9fae2d5 | 942 | |
0416841d JB |
943 | void iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm, |
944 | struct iwl_rx_cmd_buffer *rxb) | |
b9fae2d5 EG |
945 | { |
946 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
947 | u32 ant_isolation = le32_to_cpup((void *)pkt->data); | |
704602a1 | 948 | struct iwl_bt_coex_corun_lut_update_cmd cmd = {}; |
b9fae2d5 EG |
949 | u8 __maybe_unused lower_bound, upper_bound; |
950 | u8 lut; | |
951 | ||
0416841d JB |
952 | if (!fw_has_api(&mvm->fw->ucode_capa, |
953 | IWL_UCODE_TLV_API_BT_COEX_SPLIT)) { | |
954 | iwl_mvm_rx_ant_coupling_notif_old(mvm, rxb); | |
955 | return; | |
956 | } | |
0ea8d043 | 957 | |
0522588d | 958 | if (!iwl_mvm_bt_is_plcr_supported(mvm)) |
0416841d | 959 | return; |
b9fae2d5 EG |
960 | |
961 | lockdep_assert_held(&mvm->mutex); | |
962 | ||
a39979a8 EG |
963 | /* Ignore updates if we are in force mode */ |
964 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
0416841d | 965 | return; |
a39979a8 | 966 | |
b9fae2d5 | 967 | if (ant_isolation == mvm->last_ant_isol) |
0416841d | 968 | return; |
b9fae2d5 EG |
969 | |
970 | for (lut = 0; lut < ARRAY_SIZE(antenna_coupling_ranges) - 1; lut++) | |
971 | if (ant_isolation < antenna_coupling_ranges[lut + 1].range) | |
972 | break; | |
973 | ||
974 | lower_bound = antenna_coupling_ranges[lut].range; | |
975 | ||
976 | if (lut < ARRAY_SIZE(antenna_coupling_ranges) - 1) | |
977 | upper_bound = antenna_coupling_ranges[lut + 1].range; | |
978 | else | |
979 | upper_bound = antenna_coupling_ranges[lut].range; | |
980 | ||
981 | IWL_DEBUG_COEX(mvm, "Antenna isolation=%d in range [%d,%d[, lut=%d\n", | |
982 | ant_isolation, lower_bound, upper_bound, lut); | |
983 | ||
984 | mvm->last_ant_isol = ant_isolation; | |
985 | ||
986 | if (mvm->last_corun_lut == lut) | |
0416841d | 987 | return; |
b9fae2d5 EG |
988 | |
989 | mvm->last_corun_lut = lut; | |
990 | ||
b9fae2d5 | 991 | /* For the moment, use the same LUT for 20GHz and 40GHz */ |
704602a1 EG |
992 | memcpy(&cmd.corun_lut20, antenna_coupling_ranges[lut].lut20, |
993 | sizeof(cmd.corun_lut20)); | |
b9fae2d5 | 994 | |
704602a1 EG |
995 | memcpy(&cmd.corun_lut40, antenna_coupling_ranges[lut].lut20, |
996 | sizeof(cmd.corun_lut40)); | |
b9fae2d5 | 997 | |
0416841d JB |
998 | if (iwl_mvm_send_cmd_pdu(mvm, BT_COEX_UPDATE_CORUN_LUT, 0, |
999 | sizeof(cmd), &cmd)) | |
1000 | IWL_ERR(mvm, | |
1001 | "failed to send BT_COEX_UPDATE_CORUN_LUT command\n"); | |
b9fae2d5 | 1002 | } |