iwlwifi: mvm: support beacon storing
[deliverable/linux.git] / drivers / net / wireless / intel / iwlwifi / mvm / fw-api.h
CommitLineData
8ca151b5
JB
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
ee9219b2 9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
6fa52430 10 * Copyright(c) 2016 Intel Deutschland GmbH
8ca151b5
JB
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * USA
25 *
26 * The full GNU General Public License is included in this distribution
410dc5aa 27 * in the file called COPYING.
8ca151b5
JB
28 *
29 * Contact Information:
cb2f8277 30 * Intel Linux Wireless <linuxwifi@intel.com>
8ca151b5
JB
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32 *
33 * BSD LICENSE
34 *
51368bf7 35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
ee9219b2 36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
6fa52430 37 * Copyright(c) 2016 Intel Deutschland GmbH
8ca151b5
JB
38 * All rights reserved.
39 *
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
42 * are met:
43 *
44 * * Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * * Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in
48 * the documentation and/or other materials provided with the
49 * distribution.
50 * * Neither the name Intel Corporation nor the names of its
51 * contributors may be used to endorse or promote products derived
52 * from this software without specific prior written permission.
53 *
54 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
55 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
56 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
57 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
58 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
60 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
61 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
62 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
63 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
64 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65 *
66 *****************************************************************************/
67
68#ifndef __fw_api_h__
69#define __fw_api_h__
70
71#include "fw-api-rs.h"
ee6dbb29 72#include "fw-api-rx.h"
8ca151b5
JB
73#include "fw-api-tx.h"
74#include "fw-api-sta.h"
75#include "fw-api-mac.h"
76#include "fw-api-power.h"
77#include "fw-api-d3.h"
5b7ff615 78#include "fw-api-coex.h"
e820c2da 79#include "fw-api-scan.h"
d19ac589 80#include "fw-api-stats.h"
ce792918 81#include "fw-api-tof.h"
8ca151b5 82
19e737c9 83/* Tx queue numbers */
8ca151b5
JB
84enum {
85 IWL_MVM_OFFCHANNEL_QUEUE = 8,
86 IWL_MVM_CMD_QUEUE = 9,
8ca151b5
JB
87};
88
b2d81db7
JB
89enum iwl_mvm_tx_fifo {
90 IWL_MVM_TX_FIFO_BK = 0,
91 IWL_MVM_TX_FIFO_BE,
92 IWL_MVM_TX_FIFO_VI,
93 IWL_MVM_TX_FIFO_VO,
94 IWL_MVM_TX_FIFO_MCAST = 5,
95 IWL_MVM_TX_FIFO_CMD = 7,
96};
19e737c9 97
8ca151b5
JB
98#define IWL_MVM_STATION_COUNT 16
99
cf7b491d
AN
100#define IWL_MVM_TDLS_STA_COUNT 4
101
8ca151b5
JB
102/* commands */
103enum {
104 MVM_ALIVE = 0x1,
105 REPLY_ERROR = 0x2,
e5046019 106 ECHO_CMD = 0x3,
8ca151b5
JB
107
108 INIT_COMPLETE_NOTIF = 0x4,
109
110 /* PHY context commands */
111 PHY_CONTEXT_CMD = 0x8,
112 DBG_CFG = 0x9,
b9fae2d5 113 ANTENNA_COUPLING_NOTIFICATION = 0xa,
8ca151b5 114
d2496221 115 /* UMAC scan commands */
ee9219b2 116 SCAN_ITERATION_COMPLETE_UMAC = 0xb5,
d2496221
DS
117 SCAN_CFG_CMD = 0xc,
118 SCAN_REQ_UMAC = 0xd,
119 SCAN_ABORT_UMAC = 0xe,
120 SCAN_COMPLETE_UMAC = 0xf,
121
8ca151b5 122 /* station table */
5a258aae 123 ADD_STA_KEY = 0x17,
8ca151b5
JB
124 ADD_STA = 0x18,
125 REMOVE_STA = 0x19,
126
e1120187
MG
127 /* paging get item */
128 FW_GET_ITEM_CMD = 0x1a,
129
8ca151b5
JB
130 /* TX */
131 TX_CMD = 0x1c,
132 TXPATH_FLUSH = 0x1e,
133 MGMT_MCAST_KEY = 0x1f,
134
3edf8ff6
AA
135 /* scheduler config */
136 SCD_QUEUE_CFG = 0x1d,
137
8ca151b5
JB
138 /* global key */
139 WEP_KEY = 0x20,
140
04fd2c28
LK
141 /* Memory */
142 SHARED_MEM_CFG = 0x25,
143
77c5d7ef
AN
144 /* TDLS */
145 TDLS_CHANNEL_SWITCH_CMD = 0x27,
146 TDLS_CHANNEL_SWITCH_NOTIFICATION = 0xaa,
307e4723 147 TDLS_CONFIG_CMD = 0xa7,
77c5d7ef 148
8ca151b5
JB
149 /* MAC and Binding commands */
150 MAC_CONTEXT_CMD = 0x28,
151 TIME_EVENT_CMD = 0x29, /* both CMD and response */
152 TIME_EVENT_NOTIFICATION = 0x2a,
153 BINDING_CONTEXT_CMD = 0x2b,
154 TIME_QUOTA_CMD = 0x2c,
4ac6cb59 155 NON_QOS_TX_COUNTER_CMD = 0x2d,
8ca151b5
JB
156
157 LQ_CMD = 0x4e,
158
a6c4fb44
MG
159 /* paging block to FW cpu2 */
160 FW_PAGING_BLOCK_CMD = 0x4f,
161
8ca151b5
JB
162 /* Scan offload */
163 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
164 SCAN_OFFLOAD_ABORT_CMD = 0x52,
720befbf 165 HOT_SPOT_CMD = 0x53,
8ca151b5
JB
166 SCAN_OFFLOAD_COMPLETE = 0x6D,
167 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
168 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
35a000b7 169 MATCH_FOUND_NOTIFICATION = 0xd9,
fb98be5e 170 SCAN_ITERATION_COMPLETE = 0xe7,
8ca151b5
JB
171
172 /* Phy */
173 PHY_CONFIGURATION_CMD = 0x6a,
174 CALIB_RES_NOTIF_PHY_DB = 0x6b,
175 /* PHY_DB_CMD = 0x6c, */
176
ce792918
GG
177 /* ToF - 802.11mc FTM */
178 TOF_CMD = 0x10,
179 TOF_NOTIFICATION = 0x11,
180
e811ada7 181 /* Power - legacy power table command */
8ca151b5 182 POWER_TABLE_CMD = 0x77,
175a70b7 183 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
9180ac50 184 LTR_CONFIG = 0xee,
8ca151b5 185
9ee718aa
EL
186 /* Thermal Throttling*/
187 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
188
0becb377
MG
189 /* Set/Get DC2DC frequency tune */
190 DC2DC_CONFIG_CMD = 0x83,
191
8ca151b5
JB
192 /* NVM */
193 NVM_ACCESS_CMD = 0x88,
194
195 SET_CALIB_DEFAULT_CMD = 0x8e,
196
571765c8 197 BEACON_NOTIFICATION = 0x90,
8ca151b5
JB
198 BEACON_TEMPLATE_CMD = 0x91,
199 TX_ANT_CONFIGURATION_CMD = 0x98,
91a8bcde 200 STATISTICS_CMD = 0x9c,
8ca151b5 201 STATISTICS_NOTIFICATION = 0x9d,
3e56eadf 202 EOSP_NOTIFICATION = 0x9e,
88f2fd73 203 REDUCE_TX_POWER_CMD = 0x9f,
8ca151b5
JB
204
205 /* RF-KILL commands and notifications */
206 CARD_STATE_CMD = 0xa0,
207 CARD_STATE_NOTIFICATION = 0xa1,
208
d64048ed
HG
209 MISSED_BEACONS_NOTIFICATION = 0xa2,
210
e811ada7
AB
211 /* Power - new power table command */
212 MAC_PM_POWER_TABLE = 0xa9,
213
30269c12
CRI
214 MFUART_LOAD_NOTIFICATION = 0xb1,
215
8ca151b5
JB
216 REPLY_RX_PHY_CMD = 0xc0,
217 REPLY_RX_MPDU_CMD = 0xc1,
13555e8b 218 FRAME_RELEASE = 0xc3,
8ca151b5
JB
219 BA_NOTIF = 0xc5,
220
dcaf9f5e
AN
221 /* Location Aware Regulatory */
222 MCC_UPDATE_CMD = 0xc8,
88931cc9 223 MCC_CHUB_UPDATE_CMD = 0xc9,
dcaf9f5e 224
a2d79c57
MG
225 MARKER_CMD = 0xcb,
226
fb3ceb81
EG
227 /* BT Coex */
228 BT_COEX_PRIO_TABLE = 0xcc,
229 BT_COEX_PROT_ENV = 0xcd,
230 BT_PROFILE_NOTIFICATION = 0xce,
430a3bba
EG
231 BT_CONFIG = 0x9b,
232 BT_COEX_UPDATE_SW_BOOST = 0x5a,
233 BT_COEX_UPDATE_CORUN_LUT = 0x5b,
234 BT_COEX_UPDATE_REDUCED_TXP = 0x5c,
dac94da8 235 BT_COEX_CI = 0x5d,
fb3ceb81 236
1f3b0ff8 237 REPLY_SF_CFG_CMD = 0xd1,
7df15b1e
HG
238 REPLY_BEACON_FILTERING_CMD = 0xd2,
239
a0a09243
LC
240 /* DTS measurements */
241 CMD_DTS_MEASUREMENT_TRIGGER = 0xdc,
242 DTS_MEASUREMENT_NOTIFICATION = 0xdd,
243
8ca151b5 244 REPLY_DEBUG_CMD = 0xf0,
321c2104 245 LDBG_CONFIG_CMD = 0xf6,
8ca151b5
JB
246 DEBUG_LOG_MSG = 0xf7,
247
c87163b9 248 BCAST_FILTER_CMD = 0xcf,
51b6b9e0
EG
249 MCAST_FILTER_CMD = 0xd0,
250
8ca151b5
JB
251 /* D3 commands/notifications */
252 D3_CONFIG_CMD = 0xd3,
253 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
254 OFFLOADS_QUERY_CMD = 0xd5,
255 REMOTE_WAKE_CONFIG_CMD = 0xd6,
98ee7783 256 D0I3_END_CMD = 0xed,
8ca151b5
JB
257
258 /* for WoWLAN in particular */
259 WOWLAN_PATTERNS = 0xe0,
260 WOWLAN_CONFIGURATION = 0xe1,
261 WOWLAN_TSC_RSC_PARAM = 0xe2,
262 WOWLAN_TKIP_PARAM = 0xe3,
263 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
264 WOWLAN_GET_STATUSES = 0xe5,
265 WOWLAN_TX_POWER_PER_DB = 0xe6,
266
267 /* and for NetDetect */
b04998f3
LC
268 SCAN_OFFLOAD_PROFILES_QUERY_CMD = 0x56,
269 SCAN_OFFLOAD_HOTSPOTS_CONFIG_CMD = 0x58,
270 SCAN_OFFLOAD_HOTSPOTS_QUERY_CMD = 0x59,
8ca151b5
JB
271
272 REPLY_MAX = 0xff,
273};
274
39bdb17e
SD
275/* Please keep this enum *SORTED* by hex value.
276 * Needed for binary search, otherwise a warning will be triggered.
277 */
09eef330
AE
278enum iwl_phy_ops_subcmd_ids {
279 CMD_DTS_MEASUREMENT_TRIGGER_WIDE = 0x0,
280 DTS_MEASUREMENT_NOTIF_WIDE = 0xFF,
281};
282
0db056d3
SS
283enum iwl_prot_offload_subcmd_ids {
284 STORED_BEACON_NTF = 0xFF,
285};
286
09eef330
AE
287/* command groups */
288enum {
39bdb17e
SD
289 LEGACY_GROUP = 0x0,
290 LONG_GROUP = 0x1,
09eef330 291 PHY_OPS_GROUP = 0x4,
0db056d3 292 PROT_OFFLOAD_GROUP = 0xb,
09eef330
AE
293};
294
8ca151b5
JB
295/**
296 * struct iwl_cmd_response - generic response struct for most commands
297 * @status: status of the command asked, changes for each one
298 */
299struct iwl_cmd_response {
300 __le32 status;
301};
302
303/*
304 * struct iwl_tx_ant_cfg_cmd
305 * @valid: valid antenna configuration
306 */
307struct iwl_tx_ant_cfg_cmd {
308 __le32 valid;
309} __packed;
310
311/*
312 * Calibration control struct.
313 * Sent as part of the phy configuration command.
314 * @flow_trigger: bitmap for which calibrations to perform according to
315 * flow triggers.
316 * @event_trigger: bitmap for which calibrations to perform according to
317 * event triggers.
318 */
319struct iwl_calib_ctrl {
320 __le32 flow_trigger;
321 __le32 event_trigger;
322} __packed;
323
324/* This enum defines the bitmap of various calibrations to enable in both
325 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
326 */
327enum iwl_calib_cfg {
328 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
329 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
330 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
331 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
332 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
333 IWL_CALIB_CFG_DC_IDX = BIT(5),
334 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
335 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
336 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
337 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
338 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
339 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
340 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
341 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
342 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
343 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
344 IWL_CALIB_CFG_DAC_IDX = BIT(16),
345 IWL_CALIB_CFG_ABS_IDX = BIT(17),
346 IWL_CALIB_CFG_AGC_IDX = BIT(18),
347};
348
349/*
350 * Phy configuration command.
351 */
352struct iwl_phy_cfg_cmd {
353 __le32 phy_cfg;
354 struct iwl_calib_ctrl calib_control;
355} __packed;
356
357#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
358#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
359#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
360#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
361#define PHY_CFG_TX_CHAIN_A BIT(8)
362#define PHY_CFG_TX_CHAIN_B BIT(9)
363#define PHY_CFG_TX_CHAIN_C BIT(10)
364#define PHY_CFG_RX_CHAIN_A BIT(12)
365#define PHY_CFG_RX_CHAIN_B BIT(13)
366#define PHY_CFG_RX_CHAIN_C BIT(14)
367
368
369/* Target of the NVM_ACCESS_CMD */
370enum {
371 NVM_ACCESS_TARGET_CACHE = 0,
372 NVM_ACCESS_TARGET_OTP = 1,
373 NVM_ACCESS_TARGET_EEPROM = 2,
374};
375
b9545b48 376/* Section types for NVM_ACCESS_CMD */
8ca151b5 377enum {
ae2b21b0 378 NVM_SECTION_TYPE_SW = 1,
77db0a3c 379 NVM_SECTION_TYPE_REGULATORY = 3,
ae2b21b0
EH
380 NVM_SECTION_TYPE_CALIBRATION = 4,
381 NVM_SECTION_TYPE_PRODUCTION = 5,
77db0a3c 382 NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
ce500071
EH
383 NVM_SECTION_TYPE_PHY_SKU = 12,
384 NVM_MAX_NUM_SECTIONS = 13,
8ca151b5
JB
385};
386
387/**
388 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
389 * @op_code: 0 - read, 1 - write
390 * @target: NVM_ACCESS_TARGET_*
391 * @type: NVM_SECTION_TYPE_*
392 * @offset: offset in bytes into the section
393 * @length: in bytes, to read/write
394 * @data: if write operation, the data to write. On read its empty
395 */
b9545b48 396struct iwl_nvm_access_cmd {
8ca151b5
JB
397 u8 op_code;
398 u8 target;
399 __le16 type;
400 __le16 offset;
401 __le16 length;
402 u8 data[];
403} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
404
a6c4fb44
MG
405#define NUM_OF_FW_PAGING_BLOCKS 33 /* 32 for data and 1 block for CSS */
406
407/*
408 * struct iwl_fw_paging_cmd - paging layout
409 *
410 * (FW_PAGING_BLOCK_CMD = 0x4f)
411 *
412 * Send to FW the paging layout in the driver.
413 *
414 * @flags: various flags for the command
415 * @block_size: the block size in powers of 2
416 * @block_num: number of blocks specified in the command.
417 * @device_phy_addr: virtual addresses from device side
418*/
419struct iwl_fw_paging_cmd {
420 __le32 flags;
421 __le32 block_size;
422 __le32 block_num;
423 __le32 device_phy_addr[NUM_OF_FW_PAGING_BLOCKS];
424} __packed; /* FW_PAGING_BLOCK_CMD_API_S_VER_1 */
425
e1120187
MG
426/*
427 * Fw items ID's
428 *
429 * @IWL_FW_ITEM_ID_PAGING: Address of the pages that the FW will upload
430 * download
431 */
432enum iwl_fw_item_id {
433 IWL_FW_ITEM_ID_PAGING = 3,
434};
435
436/*
437 * struct iwl_fw_get_item_cmd - get an item from the fw
438 */
439struct iwl_fw_get_item_cmd {
440 __le32 item_id;
441} __packed; /* FW_GET_ITEM_CMD_API_S_VER_1 */
442
321c2104
GBA
443#define CONT_REC_COMMAND_SIZE 80
444#define ENABLE_CONT_RECORDING 0x15
445#define DISABLE_CONT_RECORDING 0x16
446
447/*
448 * struct iwl_continuous_record_mode - recording mode
449 */
450struct iwl_continuous_record_mode {
451 __le16 enable_recording;
452} __packed;
453
454/*
455 * struct iwl_continuous_record_cmd - enable/disable continuous recording
456 */
457struct iwl_continuous_record_cmd {
458 struct iwl_continuous_record_mode record_mode;
459 u8 pad[CONT_REC_COMMAND_SIZE -
460 sizeof(struct iwl_continuous_record_mode)];
461} __packed;
462
e1120187
MG
463struct iwl_fw_get_item_resp {
464 __le32 item_id;
465 __le32 item_byte_cnt;
466 __le32 item_val;
467} __packed; /* FW_GET_ITEM_RSP_S_VER_1 */
468
8ca151b5
JB
469/**
470 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
471 * @offset: offset in bytes into the section
472 * @length: in bytes, either how much was written or read
473 * @type: NVM_SECTION_TYPE_*
474 * @status: 0 for success, fail otherwise
475 * @data: if read operation, the data returned. Empty on write.
476 */
b9545b48 477struct iwl_nvm_access_resp {
8ca151b5
JB
478 __le16 offset;
479 __le16 length;
480 __le16 type;
481 __le16 status;
482 u8 data[];
483} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
484
485/* MVM_ALIVE 0x1 */
486
487/* alive response is_valid values */
488#define ALIVE_RESP_UCODE_OK BIT(0)
489#define ALIVE_RESP_RFKILL BIT(1)
490
491/* alive response ver_type values */
492enum {
493 FW_TYPE_HW = 0,
494 FW_TYPE_PROT = 1,
495 FW_TYPE_AP = 2,
496 FW_TYPE_WOWLAN = 3,
497 FW_TYPE_TIMING = 4,
498 FW_TYPE_WIPAN = 5
499};
500
501/* alive response ver_subtype values */
502enum {
503 FW_SUBTYPE_FULL_FEATURE = 0,
504 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
505 FW_SUBTYPE_REDUCED = 2,
506 FW_SUBTYPE_ALIVE_ONLY = 3,
507 FW_SUBTYPE_WOWLAN = 4,
508 FW_SUBTYPE_AP_SUBTYPE = 5,
509 FW_SUBTYPE_WIPAN = 6,
510 FW_SUBTYPE_INITIALIZE = 9
511};
512
513#define IWL_ALIVE_STATUS_ERR 0xDEAD
514#define IWL_ALIVE_STATUS_OK 0xCAFE
515
516#define IWL_ALIVE_FLG_RFKILL BIT(0)
517
7e1223b5 518struct mvm_alive_resp_ver1 {
8ca151b5
JB
519 __le16 status;
520 __le16 flags;
521 u8 ucode_minor;
522 u8 ucode_major;
523 __le16 id;
524 u8 api_minor;
525 u8 api_major;
526 u8 ver_subtype;
527 u8 ver_type;
528 u8 mac;
529 u8 opt;
530 __le16 reserved2;
531 __le32 timestamp;
532 __le32 error_event_table_ptr; /* SRAM address for error log */
533 __le32 log_event_table_ptr; /* SRAM address for event log */
534 __le32 cpu_register_ptr;
535 __le32 dbgm_config_ptr;
536 __le32 alive_counter_ptr;
537 __le32 scd_base_ptr; /* SRAM address for SCD */
538} __packed; /* ALIVE_RES_API_S_VER_1 */
539
01a9ca51
EH
540struct mvm_alive_resp_ver2 {
541 __le16 status;
542 __le16 flags;
543 u8 ucode_minor;
544 u8 ucode_major;
545 __le16 id;
546 u8 api_minor;
547 u8 api_major;
548 u8 ver_subtype;
549 u8 ver_type;
550 u8 mac;
551 u8 opt;
552 __le16 reserved2;
553 __le32 timestamp;
554 __le32 error_event_table_ptr; /* SRAM address for error log */
555 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
556 __le32 cpu_register_ptr;
557 __le32 dbgm_config_ptr;
558 __le32 alive_counter_ptr;
559 __le32 scd_base_ptr; /* SRAM address for SCD */
560 __le32 st_fwrd_addr; /* pointer to Store and forward */
561 __le32 st_fwrd_size;
562 u8 umac_minor; /* UMAC version: minor */
563 u8 umac_major; /* UMAC version: major */
564 __le16 umac_id; /* UMAC version: id */
565 __le32 error_info_addr; /* SRAM address for UMAC error log */
566 __le32 dbg_print_buff_addr;
567} __packed; /* ALIVE_RES_API_S_VER_2 */
568
7e1223b5
EG
569struct mvm_alive_resp {
570 __le16 status;
571 __le16 flags;
572 __le32 ucode_minor;
573 __le32 ucode_major;
574 u8 ver_subtype;
575 u8 ver_type;
576 u8 mac;
577 u8 opt;
578 __le32 timestamp;
579 __le32 error_event_table_ptr; /* SRAM address for error log */
580 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
581 __le32 cpu_register_ptr;
582 __le32 dbgm_config_ptr;
583 __le32 alive_counter_ptr;
584 __le32 scd_base_ptr; /* SRAM address for SCD */
585 __le32 st_fwrd_addr; /* pointer to Store and forward */
586 __le32 st_fwrd_size;
587 __le32 umac_minor; /* UMAC version: minor */
588 __le32 umac_major; /* UMAC version: major */
589 __le32 error_info_addr; /* SRAM address for UMAC error log */
590 __le32 dbg_print_buff_addr;
591} __packed; /* ALIVE_RES_API_S_VER_3 */
592
8ca151b5
JB
593/* Error response/notification */
594enum {
595 FW_ERR_UNKNOWN_CMD = 0x0,
596 FW_ERR_INVALID_CMD_PARAM = 0x1,
597 FW_ERR_SERVICE = 0x2,
598 FW_ERR_ARC_MEMORY = 0x3,
599 FW_ERR_ARC_CODE = 0x4,
600 FW_ERR_WATCH_DOG = 0x5,
601 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
602 FW_ERR_WEP_KEY_SIZE = 0x11,
603 FW_ERR_OBSOLETE_FUNC = 0x12,
604 FW_ERR_UNEXPECTED = 0xFE,
605 FW_ERR_FATAL = 0xFF
606};
607
608/**
609 * struct iwl_error_resp - FW error indication
610 * ( REPLY_ERROR = 0x2 )
611 * @error_type: one of FW_ERR_*
612 * @cmd_id: the command ID for which the error occured
613 * @bad_cmd_seq_num: sequence number of the erroneous command
614 * @error_service: which service created the error, applicable only if
615 * error_type = 2, otherwise 0
616 * @timestamp: TSF in usecs.
617 */
618struct iwl_error_resp {
619 __le32 error_type;
620 u8 cmd_id;
621 u8 reserved1;
622 __le16 bad_cmd_seq_num;
623 __le32 error_service;
624 __le64 timestamp;
625} __packed;
626
627
628/* Common PHY, MAC and Bindings definitions */
629
630#define MAX_MACS_IN_BINDING (3)
631#define MAX_BINDINGS (4)
632#define AUX_BINDING_INDEX (3)
633#define MAX_PHYS (4)
634
635/* Used to extract ID and color from the context dword */
636#define FW_CTXT_ID_POS (0)
637#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
638#define FW_CTXT_COLOR_POS (8)
639#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
640#define FW_CTXT_INVALID (0xffffffff)
641
642#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
643 (_color << FW_CTXT_COLOR_POS))
644
645/* Possible actions on PHYs, MACs and Bindings */
646enum {
647 FW_CTXT_ACTION_STUB = 0,
648 FW_CTXT_ACTION_ADD,
649 FW_CTXT_ACTION_MODIFY,
650 FW_CTXT_ACTION_REMOVE,
651 FW_CTXT_ACTION_NUM
652}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
653
654/* Time Events */
655
656/* Time Event types, according to MAC type */
657enum iwl_time_event_type {
658 /* BSS Station Events */
659 TE_BSS_STA_AGGRESSIVE_ASSOC,
660 TE_BSS_STA_ASSOC,
661 TE_BSS_EAP_DHCP_PROT,
662 TE_BSS_QUIET_PERIOD,
663
664 /* P2P Device Events */
665 TE_P2P_DEVICE_DISCOVERABLE,
666 TE_P2P_DEVICE_LISTEN,
667 TE_P2P_DEVICE_ACTION_SCAN,
668 TE_P2P_DEVICE_FULL_SCAN,
669
670 /* P2P Client Events */
671 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
672 TE_P2P_CLIENT_ASSOC,
673 TE_P2P_CLIENT_QUIET_PERIOD,
674
675 /* P2P GO Events */
676 TE_P2P_GO_ASSOC_PROT,
677 TE_P2P_GO_REPETITIVE_NOA,
678 TE_P2P_GO_CT_WINDOW,
679
680 /* WiDi Sync Events */
681 TE_WIDI_TX_SYNC,
682
7f0a7c67 683 /* Channel Switch NoA */
f991e17b 684 TE_CHANNEL_SWITCH_PERIOD,
7f0a7c67 685
8ca151b5
JB
686 TE_MAX
687}; /* MAC_EVENT_TYPE_API_E_VER_1 */
688
f8f03c3e
EL
689
690
691/* Time event - defines for command API v1 */
692
693/*
694 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
695 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
696 * the first fragment is scheduled.
697 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
698 * the first 2 fragments are scheduled.
699 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
700 * number of fragments are valid.
701 *
702 * Other than the constant defined above, specifying a fragmentation value 'x'
703 * means that the event can be fragmented but only the first 'x' will be
704 * scheduled.
705 */
706enum {
707 TE_V1_FRAG_NONE = 0,
708 TE_V1_FRAG_SINGLE = 1,
709 TE_V1_FRAG_DUAL = 2,
710 TE_V1_FRAG_ENDLESS = 0xffffffff
711};
712
713/* If a Time Event can be fragmented, this is the max number of fragments */
714#define TE_V1_FRAG_MAX_MSK 0x0fffffff
715/* Repeat the time event endlessly (until removed) */
716#define TE_V1_REPEAT_ENDLESS 0xffffffff
717/* If a Time Event has bounded repetitions, this is the maximal value */
718#define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
719
8ca151b5
JB
720/* Time Event dependencies: none, on another TE, or in a specific time */
721enum {
f8f03c3e
EL
722 TE_V1_INDEPENDENT = 0,
723 TE_V1_DEP_OTHER = BIT(0),
724 TE_V1_DEP_TSF = BIT(1),
725 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
8ca151b5 726}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
f8f03c3e 727
1da80e80 728/*
f8f03c3e
EL
729 * @TE_V1_NOTIF_NONE: no notifications
730 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
731 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
732 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
733 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
734 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
735 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
736 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
737 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
738 *
1da80e80
IP
739 * Supported Time event notifications configuration.
740 * A notification (both event and fragment) includes a status indicating weather
741 * the FW was able to schedule the event or not. For fragment start/end
742 * notification the status is always success. There is no start/end fragment
743 * notification for monolithic events.
1da80e80 744 */
8ca151b5 745enum {
f8f03c3e
EL
746 TE_V1_NOTIF_NONE = 0,
747 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
748 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
749 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
750 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
751 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
752 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
753 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
754 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
1da80e80 755}; /* MAC_EVENT_ACTION_API_E_VER_2 */
8ca151b5 756
a373f67c 757/* Time event - defines for command API */
f8f03c3e 758
8ca151b5 759/*
f8f03c3e
EL
760 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
761 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
8ca151b5 762 * the first fragment is scheduled.
f8f03c3e 763 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
8ca151b5 764 * the first 2 fragments are scheduled.
f8f03c3e
EL
765 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
766 * number of fragments are valid.
8ca151b5
JB
767 *
768 * Other than the constant defined above, specifying a fragmentation value 'x'
769 * means that the event can be fragmented but only the first 'x' will be
770 * scheduled.
771 */
772enum {
f8f03c3e
EL
773 TE_V2_FRAG_NONE = 0,
774 TE_V2_FRAG_SINGLE = 1,
775 TE_V2_FRAG_DUAL = 2,
776 TE_V2_FRAG_MAX = 0xfe,
777 TE_V2_FRAG_ENDLESS = 0xff
8ca151b5
JB
778};
779
780/* Repeat the time event endlessly (until removed) */
f8f03c3e 781#define TE_V2_REPEAT_ENDLESS 0xff
8ca151b5 782/* If a Time Event has bounded repetitions, this is the maximal value */
f8f03c3e
EL
783#define TE_V2_REPEAT_MAX 0xfe
784
785#define TE_V2_PLACEMENT_POS 12
786#define TE_V2_ABSENCE_POS 15
787
a373f67c 788/* Time event policy values
f8f03c3e
EL
789 * A notification (both event and fragment) includes a status indicating weather
790 * the FW was able to schedule the event or not. For fragment start/end
791 * notification the status is always success. There is no start/end fragment
792 * notification for monolithic events.
793 *
794 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
795 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
796 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
797 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
798 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
799 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
800 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
801 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
802 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
803 * @TE_V2_DEP_OTHER: depends on another time event
804 * @TE_V2_DEP_TSF: depends on a specific time
805 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
806 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
807 */
808enum {
809 TE_V2_DEFAULT_POLICY = 0x0,
810
811 /* notifications (event start/stop, fragment start/stop) */
812 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
813 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
814 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
815 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
816
817 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
818 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
819 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
820 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
1f6bf078 821 T2_V2_START_IMMEDIATELY = BIT(11),
f8f03c3e
EL
822
823 TE_V2_NOTIF_MSK = 0xff,
824
825 /* placement characteristics */
826 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
827 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
828 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
829
830 /* are we present or absent during the Time Event. */
831 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
832};
8ca151b5
JB
833
834/**
a373f67c 835 * struct iwl_time_event_cmd_api - configuring Time Events
f8f03c3e
EL
836 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
837 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
8ca151b5
JB
838 * ( TIME_EVENT_CMD = 0x29 )
839 * @id_and_color: ID and color of the relevant MAC
840 * @action: action to perform, one of FW_CTXT_ACTION_*
841 * @id: this field has two meanings, depending on the action:
842 * If the action is ADD, then it means the type of event to add.
843 * For all other actions it is the unique event ID assigned when the
844 * event was added by the FW.
845 * @apply_time: When to start the Time Event (in GP2)
846 * @max_delay: maximum delay to event's start (apply time), in TU
847 * @depends_on: the unique ID of the event we depend on (if any)
848 * @interval: interval between repetitions, in TU
8ca151b5
JB
849 * @duration: duration of event in TU
850 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
8ca151b5 851 * @max_frags: maximal number of fragments the Time Event can be divided to
f8f03c3e
EL
852 * @policy: defines whether uCode shall notify the host or other uCode modules
853 * on event and/or fragment start and/or end
854 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
855 * TE_EVENT_SOCIOPATHIC
856 * using TE_ABSENCE and using TE_NOTIF_*
8ca151b5 857 */
a373f67c 858struct iwl_time_event_cmd {
8ca151b5
JB
859 /* COMMON_INDEX_HDR_API_S_VER_1 */
860 __le32 id_and_color;
861 __le32 action;
862 __le32 id;
f8f03c3e 863 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
8ca151b5
JB
864 __le32 apply_time;
865 __le32 max_delay;
8ca151b5 866 __le32 depends_on;
8ca151b5 867 __le32 interval;
8ca151b5 868 __le32 duration;
f8f03c3e
EL
869 u8 repeat;
870 u8 max_frags;
871 __le16 policy;
872} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
8ca151b5
JB
873
874/**
875 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
876 * @status: bit 0 indicates success, all others specify errors
877 * @id: the Time Event type
878 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
879 * @id_and_color: ID and color of the relevant MAC
880 */
881struct iwl_time_event_resp {
882 __le32 status;
883 __le32 id;
884 __le32 unique_id;
885 __le32 id_and_color;
886} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
887
888/**
889 * struct iwl_time_event_notif - notifications of time event start/stop
890 * ( TIME_EVENT_NOTIFICATION = 0x2a )
891 * @timestamp: action timestamp in GP2
892 * @session_id: session's unique id
893 * @unique_id: unique id of the Time Event itself
894 * @id_and_color: ID and color of the relevant MAC
895 * @action: one of TE_NOTIF_START or TE_NOTIF_END
896 * @status: true if scheduled, false otherwise (not executed)
897 */
898struct iwl_time_event_notif {
899 __le32 timestamp;
900 __le32 session_id;
901 __le32 unique_id;
902 __le32 id_and_color;
903 __le32 action;
904 __le32 status;
905} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
906
907
908/* Bindings and Time Quota */
909
910/**
911 * struct iwl_binding_cmd - configuring bindings
912 * ( BINDING_CONTEXT_CMD = 0x2b )
913 * @id_and_color: ID and color of the relevant Binding
914 * @action: action to perform, one of FW_CTXT_ACTION_*
915 * @macs: array of MAC id and colors which belong to the binding
916 * @phy: PHY id and color which belongs to the binding
917 */
918struct iwl_binding_cmd {
919 /* COMMON_INDEX_HDR_API_S_VER_1 */
920 __le32 id_and_color;
921 __le32 action;
922 /* BINDING_DATA_API_S_VER_1 */
923 __le32 macs[MAX_MACS_IN_BINDING];
924 __le32 phy;
925} __packed; /* BINDING_CMD_API_S_VER_1 */
926
35adfd6e
IP
927/* The maximal number of fragments in the FW's schedule session */
928#define IWL_MVM_MAX_QUOTA 128
929
8ca151b5
JB
930/**
931 * struct iwl_time_quota_data - configuration of time quota per binding
932 * @id_and_color: ID and color of the relevant Binding
933 * @quota: absolute time quota in TU. The scheduler will try to divide the
934 * remainig quota (after Time Events) according to this quota.
935 * @max_duration: max uninterrupted context duration in TU
936 */
937struct iwl_time_quota_data {
938 __le32 id_and_color;
939 __le32 quota;
940 __le32 max_duration;
941} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
942
943/**
944 * struct iwl_time_quota_cmd - configuration of time quota between bindings
945 * ( TIME_QUOTA_CMD = 0x2c )
946 * @quotas: allocations per binding
947 */
948struct iwl_time_quota_cmd {
949 struct iwl_time_quota_data quotas[MAX_BINDINGS];
950} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
951
952
953/* PHY context */
954
955/* Supported bands */
956#define PHY_BAND_5 (0)
957#define PHY_BAND_24 (1)
958
959/* Supported channel width, vary if there is VHT support */
960#define PHY_VHT_CHANNEL_MODE20 (0x0)
961#define PHY_VHT_CHANNEL_MODE40 (0x1)
962#define PHY_VHT_CHANNEL_MODE80 (0x2)
963#define PHY_VHT_CHANNEL_MODE160 (0x3)
964
965/*
966 * Control channel position:
967 * For legacy set bit means upper channel, otherwise lower.
968 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
969 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
970 * center_freq
971 * |
972 * 40Mhz |_______|_______|
973 * 80Mhz |_______|_______|_______|_______|
974 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
975 * code 011 010 001 000 | 100 101 110 111
976 */
977#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
978#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
979#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
980#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
981#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
982#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
983#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
984#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
985
986/*
987 * @band: PHY_BAND_*
988 * @channel: channel number
989 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
990 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
991 */
992struct iwl_fw_channel_info {
993 u8 band;
994 u8 channel;
995 u8 width;
996 u8 ctrl_pos;
997} __packed;
998
999#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
1000#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
1001 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
1002#define PHY_RX_CHAIN_VALID_POS (1)
1003#define PHY_RX_CHAIN_VALID_MSK \
1004 (0x7 << PHY_RX_CHAIN_VALID_POS)
1005#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
1006#define PHY_RX_CHAIN_FORCE_SEL_MSK \
1007 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
1008#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
1009#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
1010 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
1011#define PHY_RX_CHAIN_CNT_POS (10)
1012#define PHY_RX_CHAIN_CNT_MSK \
1013 (0x3 << PHY_RX_CHAIN_CNT_POS)
1014#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
1015#define PHY_RX_CHAIN_MIMO_CNT_MSK \
1016 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
1017#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
1018#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
1019 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
1020
1021/* TODO: fix the value, make it depend on firmware at runtime? */
1022#define NUM_PHY_CTX 3
1023
1024/* TODO: complete missing documentation */
1025/**
1026 * struct iwl_phy_context_cmd - config of the PHY context
1027 * ( PHY_CONTEXT_CMD = 0x8 )
1028 * @id_and_color: ID and color of the relevant Binding
1029 * @action: action to perform, one of FW_CTXT_ACTION_*
1030 * @apply_time: 0 means immediate apply and context switch.
1031 * other value means apply new params after X usecs
1032 * @tx_param_color: ???
1033 * @channel_info:
1034 * @txchain_info: ???
1035 * @rxchain_info: ???
1036 * @acquisition_data: ???
1037 * @dsp_cfg_flags: set to 0
1038 */
1039struct iwl_phy_context_cmd {
1040 /* COMMON_INDEX_HDR_API_S_VER_1 */
1041 __le32 id_and_color;
1042 __le32 action;
1043 /* PHY_CONTEXT_DATA_API_S_VER_1 */
1044 __le32 apply_time;
1045 __le32 tx_param_color;
1046 struct iwl_fw_channel_info ci;
1047 __le32 txchain_info;
1048 __le32 rxchain_info;
1049 __le32 acquisition_data;
1050 __le32 dsp_cfg_flags;
1051} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
1052
720befbf
AM
1053/*
1054 * Aux ROC command
1055 *
1056 * Command requests the firmware to create a time event for a certain duration
1057 * and remain on the given channel. This is done by using the Aux framework in
1058 * the FW.
1059 * The command was first used for Hot Spot issues - but can be used regardless
1060 * to Hot Spot.
1061 *
1062 * ( HOT_SPOT_CMD 0x53 )
1063 *
1064 * @id_and_color: ID and color of the MAC
1065 * @action: action to perform, one of FW_CTXT_ACTION_*
1066 * @event_unique_id: If the action FW_CTXT_ACTION_REMOVE then the
1067 * event_unique_id should be the id of the time event assigned by ucode.
1068 * Otherwise ignore the event_unique_id.
1069 * @sta_id_and_color: station id and color, resumed during "Remain On Channel"
1070 * activity.
1071 * @channel_info: channel info
1072 * @node_addr: Our MAC Address
1073 * @reserved: reserved for alignment
1074 * @apply_time: GP2 value to start (should always be the current GP2 value)
1075 * @apply_time_max_delay: Maximum apply time delay value in TU. Defines max
1076 * time by which start of the event is allowed to be postponed.
1077 * @duration: event duration in TU To calculate event duration:
1078 * timeEventDuration = min(duration, remainingQuota)
1079 */
1080struct iwl_hs20_roc_req {
1081 /* COMMON_INDEX_HDR_API_S_VER_1 hdr */
1082 __le32 id_and_color;
1083 __le32 action;
1084 __le32 event_unique_id;
1085 __le32 sta_id_and_color;
1086 struct iwl_fw_channel_info channel_info;
1087 u8 node_addr[ETH_ALEN];
1088 __le16 reserved;
1089 __le32 apply_time;
1090 __le32 apply_time_max_delay;
1091 __le32 duration;
1092} __packed; /* HOT_SPOT_CMD_API_S_VER_1 */
1093
1094/*
1095 * values for AUX ROC result values
1096 */
1097enum iwl_mvm_hot_spot {
1098 HOT_SPOT_RSP_STATUS_OK,
1099 HOT_SPOT_RSP_STATUS_TOO_MANY_EVENTS,
1100 HOT_SPOT_MAX_NUM_OF_SESSIONS,
1101};
1102
1103/*
1104 * Aux ROC command response
1105 *
1106 * In response to iwl_hs20_roc_req the FW sends this command to notify the
1107 * driver the uid of the timevent.
1108 *
1109 * ( HOT_SPOT_CMD 0x53 )
1110 *
1111 * @event_unique_id: Unique ID of time event assigned by ucode
1112 * @status: Return status 0 is success, all the rest used for specific errors
1113 */
1114struct iwl_hs20_roc_res {
1115 __le32 event_unique_id;
1116 __le32 status;
1117} __packed; /* HOT_SPOT_RSP_API_S_VER_1 */
1118
8ca151b5
JB
1119/**
1120 * struct iwl_radio_version_notif - information on the radio version
1121 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1122 * @radio_flavor:
1123 * @radio_step:
1124 * @radio_dash:
1125 */
1126struct iwl_radio_version_notif {
1127 __le32 radio_flavor;
1128 __le32 radio_step;
1129 __le32 radio_dash;
1130} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1131
1132enum iwl_card_state_flags {
1133 CARD_ENABLED = 0x00,
1134 HW_CARD_DISABLED = 0x01,
1135 SW_CARD_DISABLED = 0x02,
1136 CT_KILL_CARD_DISABLED = 0x04,
1137 HALT_CARD_DISABLED = 0x08,
1138 CARD_DISABLED_MSK = 0x0f,
1139 CARD_IS_RX_ON = 0x10,
1140};
1141
1142/**
1143 * struct iwl_radio_version_notif - information on the radio version
1144 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1145 * @flags: %iwl_card_state_flags
1146 */
1147struct iwl_card_state_notif {
1148 __le32 flags;
1149} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1150
d64048ed
HG
1151/**
1152 * struct iwl_missed_beacons_notif - information on missed beacons
1153 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1154 * @mac_id: interface ID
1155 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1156 * beacons since last RX.
1157 * @consec_missed_beacons: number of consecutive missed beacons
1158 * @num_expected_beacons:
1159 * @num_recvd_beacons:
1160 */
1161struct iwl_missed_beacons_notif {
1162 __le32 mac_id;
1163 __le32 consec_missed_beacons_since_last_rx;
1164 __le32 consec_missed_beacons;
1165 __le32 num_expected_beacons;
1166 __le32 num_recvd_beacons;
1167} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1168
30269c12
CRI
1169/**
1170 * struct iwl_mfuart_load_notif - mfuart image version & status
1171 * ( MFUART_LOAD_NOTIFICATION = 0xb1 )
1172 * @installed_ver: installed image version
1173 * @external_ver: external image version
1174 * @status: MFUART loading status
1175 * @duration: MFUART loading time
1176*/
1177struct iwl_mfuart_load_notif {
1178 __le32 installed_ver;
1179 __le32 external_ver;
1180 __le32 status;
1181 __le32 duration;
1182} __packed; /*MFU_LOADER_NTFY_API_S_VER_1*/
1183
8ca151b5
JB
1184/**
1185 * struct iwl_set_calib_default_cmd - set default value for calibration.
1186 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1187 * @calib_index: the calibration to set value for
1188 * @length: of data
1189 * @data: the value to set for the calibration result
1190 */
1191struct iwl_set_calib_default_cmd {
1192 __le16 calib_index;
1193 __le16 length;
1194 u8 data[0];
1195} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1196
51b6b9e0 1197#define MAX_PORT_ID_NUM 2
e59647ea 1198#define MAX_MCAST_FILTERING_ADDRESSES 256
51b6b9e0
EG
1199
1200/**
1201 * struct iwl_mcast_filter_cmd - configure multicast filter.
1202 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1203 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1204 * to identify network interface adopted in host-device IF.
1205 * It is used by FW as index in array of addresses. This array has
1206 * MAX_PORT_ID_NUM members.
1207 * @count: Number of MAC addresses in the array
1208 * @pass_all: Set 1 to pass all multicast packets.
1209 * @bssid: current association BSSID.
1210 * @addr_list: Place holder for array of MAC addresses.
1211 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1212 */
1213struct iwl_mcast_filter_cmd {
1214 u8 filter_own;
1215 u8 port_id;
1216 u8 count;
1217 u8 pass_all;
1218 u8 bssid[6];
1219 u8 reserved[2];
1220 u8 addr_list[0];
1221} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1222
c87163b9
EP
1223#define MAX_BCAST_FILTERS 8
1224#define MAX_BCAST_FILTER_ATTRS 2
1225
1226/**
1227 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1228 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1229 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1230 * start of ip payload).
1231 */
1232enum iwl_mvm_bcast_filter_attr_offset {
1233 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1234 BCAST_FILTER_OFFSET_IP_END = 1,
1235};
1236
1237/**
1238 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1239 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1240 * @offset: starting offset of this pattern.
1241 * @val: value to match - big endian (MSB is the first
1242 * byte to match from offset pos).
1243 * @mask: mask to match (big endian).
1244 */
1245struct iwl_fw_bcast_filter_attr {
1246 u8 offset_type;
1247 u8 offset;
1248 __le16 reserved1;
1249 __be32 val;
1250 __be32 mask;
1251} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1252
1253/**
1254 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1255 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1256 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1257 */
1258enum iwl_mvm_bcast_filter_frame_type {
1259 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1260 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1261};
1262
1263/**
1264 * struct iwl_fw_bcast_filter - broadcast filter
1265 * @discard: discard frame (1) or let it pass (0).
1266 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1267 * @num_attrs: number of valid attributes in this filter.
1268 * @attrs: attributes of this filter. a filter is considered matched
1269 * only when all its attributes are matched (i.e. AND relationship)
1270 */
1271struct iwl_fw_bcast_filter {
1272 u8 discard;
1273 u8 frame_type;
1274 u8 num_attrs;
1275 u8 reserved1;
1276 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1277} __packed; /* BCAST_FILTER_S_VER_1 */
1278
1279/**
1280 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1281 * @default_discard: default action for this mac (discard (1) / pass (0)).
1282 * @attached_filters: bitmap of relevant filters for this mac.
1283 */
1284struct iwl_fw_bcast_mac {
1285 u8 default_discard;
1286 u8 reserved1;
1287 __le16 attached_filters;
1288} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1289
1290/**
1291 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1292 * @disable: enable (0) / disable (1)
1293 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1294 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1295 * @filters: broadcast filters
1296 * @macs: broadcast filtering configuration per-mac
1297 */
1298struct iwl_bcast_filter_cmd {
1299 u8 disable;
1300 u8 max_bcast_filters;
1301 u8 max_macs;
1302 u8 reserved1;
1303 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1304 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1305} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1306
a2d79c57
MG
1307/*
1308 * enum iwl_mvm_marker_id - maker ids
1309 *
1310 * The ids for different type of markers to insert into the usniffer logs
1311 */
1312enum iwl_mvm_marker_id {
1313 MARKER_ID_TX_FRAME_LATENCY = 1,
1314}; /* MARKER_ID_API_E_VER_1 */
1315
1316/**
1317 * struct iwl_mvm_marker - mark info into the usniffer logs
1318 *
1319 * (MARKER_CMD = 0xcb)
1320 *
1321 * Mark the UTC time stamp into the usniffer logs together with additional
1322 * metadata, so the usniffer output can be parsed.
1323 * In the command response the ucode will return the GP2 time.
1324 *
1325 * @dw_len: The amount of dwords following this byte including this byte.
1326 * @marker_id: A unique marker id (iwl_mvm_marker_id).
1327 * @reserved: reserved.
1328 * @timestamp: in milliseconds since 1970-01-01 00:00:00 UTC
1329 * @metadata: additional meta data that will be written to the unsiffer log
1330 */
1331struct iwl_mvm_marker {
1332 u8 dwLen;
1333 u8 markerId;
1334 __le16 reserved;
1335 __le64 timestamp;
1336 __le32 metadata[0];
1337} __packed; /* MARKER_API_S_VER_1 */
1338
0becb377
MG
1339/*
1340 * enum iwl_dc2dc_config_id - flag ids
1341 *
1342 * Ids of dc2dc configuration flags
1343 */
1344enum iwl_dc2dc_config_id {
1345 DCDC_LOW_POWER_MODE_MSK_SET = 0x1, /* not used */
1346 DCDC_FREQ_TUNE_SET = 0x2,
1347}; /* MARKER_ID_API_E_VER_1 */
1348
1349/**
1350 * struct iwl_dc2dc_config_cmd - configure dc2dc values
1351 *
1352 * (DC2DC_CONFIG_CMD = 0x83)
1353 *
1354 * Set/Get & configure dc2dc values.
1355 * The command always returns the current dc2dc values.
1356 *
1357 * @flags: set/get dc2dc
1358 * @enable_low_power_mode: not used.
1359 * @dc2dc_freq_tune0: frequency divider - digital domain
1360 * @dc2dc_freq_tune1: frequency divider - analog domain
1361 */
1362struct iwl_dc2dc_config_cmd {
1363 __le32 flags;
1364 __le32 enable_low_power_mode; /* not used */
1365 __le32 dc2dc_freq_tune0;
1366 __le32 dc2dc_freq_tune1;
1367} __packed; /* DC2DC_CONFIG_CMD_API_S_VER_1 */
1368
1369/**
1370 * struct iwl_dc2dc_config_resp - response for iwl_dc2dc_config_cmd
1371 *
1372 * Current dc2dc values returned by the FW.
1373 *
1374 * @dc2dc_freq_tune0: frequency divider - digital domain
1375 * @dc2dc_freq_tune1: frequency divider - analog domain
1376 */
1377struct iwl_dc2dc_config_resp {
1378 __le32 dc2dc_freq_tune0;
1379 __le32 dc2dc_freq_tune1;
1380} __packed; /* DC2DC_CONFIG_RESP_API_S_VER_1 */
1381
1f3b0ff8
LE
1382/***********************************
1383 * Smart Fifo API
1384 ***********************************/
1385/* Smart Fifo state */
1386enum iwl_sf_state {
1387 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1388 SF_FULL_ON,
1389 SF_UNINIT,
1390 SF_INIT_OFF,
1391 SF_HW_NUM_STATES
1392};
1393
1394/* Smart Fifo possible scenario */
1395enum iwl_sf_scenario {
1396 SF_SCENARIO_SINGLE_UNICAST,
1397 SF_SCENARIO_AGG_UNICAST,
1398 SF_SCENARIO_MULTICAST,
1399 SF_SCENARIO_BA_RESP,
1400 SF_SCENARIO_TX_RESP,
1401 SF_NUM_SCENARIO
1402};
1403
1404#define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1405#define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1406
1407/* smart FIFO default values */
b4c82adc 1408#define SF_W_MARK_SISO 6144
1f3b0ff8
LE
1409#define SF_W_MARK_MIMO2 8192
1410#define SF_W_MARK_MIMO3 6144
1411#define SF_W_MARK_LEGACY 4096
1412#define SF_W_MARK_SCAN 4096
1413
f4a3ee49
EH
1414/* SF Scenarios timers for default configuration (aligned to 32 uSec) */
1415#define SF_SINGLE_UNICAST_IDLE_TIMER_DEF 160 /* 150 uSec */
1416#define SF_SINGLE_UNICAST_AGING_TIMER_DEF 400 /* 0.4 mSec */
1417#define SF_AGG_UNICAST_IDLE_TIMER_DEF 160 /* 150 uSec */
1418#define SF_AGG_UNICAST_AGING_TIMER_DEF 400 /* 0.4 mSec */
1419#define SF_MCAST_IDLE_TIMER_DEF 160 /* 150 mSec */
1420#define SF_MCAST_AGING_TIMER_DEF 400 /* 0.4 mSec */
1421#define SF_BA_IDLE_TIMER_DEF 160 /* 150 uSec */
1422#define SF_BA_AGING_TIMER_DEF 400 /* 0.4 mSec */
1423#define SF_TX_RE_IDLE_TIMER_DEF 160 /* 150 uSec */
1424#define SF_TX_RE_AGING_TIMER_DEF 400 /* 0.4 mSec */
1425
1426/* SF Scenarios timers for BSS MAC configuration (aligned to 32 uSec) */
1f3b0ff8
LE
1427#define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1428#define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1429#define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1430#define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1431#define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1432#define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1433#define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1434#define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1435#define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1436#define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1437
1438#define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1439
161bdb77
EH
1440#define SF_CFG_DUMMY_NOTIF_OFF BIT(16)
1441
1f3b0ff8
LE
1442/**
1443 * Smart Fifo configuration command.
86974bff 1444 * @state: smart fifo state, types listed in enum %iwl_sf_sate.
1f3b0ff8
LE
1445 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1446 * @long_delay_timeouts: aging and idle timer values for each scenario
1447 * in long delay state.
1448 * @full_on_timeouts: timer values for each scenario in full on state.
1449 */
1450struct iwl_sf_cfg_cmd {
86974bff 1451 __le32 state;
1f3b0ff8
LE
1452 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1453 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1454 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1455} __packed; /* SF_CFG_API_S_VER_2 */
1456
8ba2d7a1
EH
1457/***********************************
1458 * Location Aware Regulatory (LAR) API - MCC updates
1459 ***********************************/
1460
6fa52430
MG
1461/**
1462 * struct iwl_mcc_update_cmd_v1 - Request the device to update geographic
1463 * regulatory profile according to the given MCC (Mobile Country Code).
1464 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1465 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1466 * MCC in the cmd response will be the relevant MCC in the NVM.
1467 * @mcc: given mobile country code
1468 * @source_id: the source from where we got the MCC, see iwl_mcc_source
1469 * @reserved: reserved for alignment
1470 */
1471struct iwl_mcc_update_cmd_v1 {
1472 __le16 mcc;
1473 u8 source_id;
1474 u8 reserved;
1475} __packed; /* LAR_UPDATE_MCC_CMD_API_S_VER_1 */
1476
8ba2d7a1
EH
1477/**
1478 * struct iwl_mcc_update_cmd - Request the device to update geographic
1479 * regulatory profile according to the given MCC (Mobile Country Code).
1480 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1481 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1482 * MCC in the cmd response will be the relevant MCC in the NVM.
1483 * @mcc: given mobile country code
1484 * @source_id: the source from where we got the MCC, see iwl_mcc_source
1485 * @reserved: reserved for alignment
6fa52430
MG
1486 * @key: integrity key for MCC API OEM testing
1487 * @reserved2: reserved
8ba2d7a1
EH
1488 */
1489struct iwl_mcc_update_cmd {
1490 __le16 mcc;
1491 u8 source_id;
1492 u8 reserved;
6fa52430
MG
1493 __le32 key;
1494 __le32 reserved2[5];
1495} __packed; /* LAR_UPDATE_MCC_CMD_API_S_VER_2 */
1496
1497/**
1498 * iwl_mcc_update_resp_v1 - response to MCC_UPDATE_CMD.
1499 * Contains the new channel control profile map, if changed, and the new MCC
1500 * (mobile country code).
1501 * The new MCC may be different than what was requested in MCC_UPDATE_CMD.
1502 * @status: see &enum iwl_mcc_update_status
1503 * @mcc: the new applied MCC
1504 * @cap: capabilities for all channels which matches the MCC
1505 * @source_id: the MCC source, see iwl_mcc_source
1506 * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
1507 * channels, depending on platform)
1508 * @channels: channel control data map, DWORD for each channel. Only the first
1509 * 16bits are used.
1510 */
1511struct iwl_mcc_update_resp_v1 {
1512 __le32 status;
1513 __le16 mcc;
1514 u8 cap;
1515 u8 source_id;
1516 __le32 n_channels;
1517 __le32 channels[0];
1518} __packed; /* LAR_UPDATE_MCC_CMD_RESP_S_VER_1 */
8ba2d7a1
EH
1519
1520/**
1521 * iwl_mcc_update_resp - response to MCC_UPDATE_CMD.
1522 * Contains the new channel control profile map, if changed, and the new MCC
1523 * (mobile country code).
1524 * The new MCC may be different than what was requested in MCC_UPDATE_CMD.
47c8b154 1525 * @status: see &enum iwl_mcc_update_status
8ba2d7a1
EH
1526 * @mcc: the new applied MCC
1527 * @cap: capabilities for all channels which matches the MCC
1528 * @source_id: the MCC source, see iwl_mcc_source
6fa52430
MG
1529 * @time: time elapsed from the MCC test start (in 30 seconds TU)
1530 * @reserved: reserved.
8ba2d7a1
EH
1531 * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
1532 * channels, depending on platform)
1533 * @channels: channel control data map, DWORD for each channel. Only the first
1534 * 16bits are used.
1535 */
1536struct iwl_mcc_update_resp {
1537 __le32 status;
1538 __le16 mcc;
1539 u8 cap;
1540 u8 source_id;
6fa52430
MG
1541 __le16 time;
1542 __le16 reserved;
8ba2d7a1
EH
1543 __le32 n_channels;
1544 __le32 channels[0];
6fa52430 1545} __packed; /* LAR_UPDATE_MCC_CMD_RESP_S_VER_2 */
8ba2d7a1
EH
1546
1547/**
1548 * struct iwl_mcc_chub_notif - chub notifies of mcc change
1549 * (MCC_CHUB_UPDATE_CMD = 0xc9)
1550 * The Chub (Communication Hub, CommsHUB) is a HW component that connects to
1551 * the cellular and connectivity cores that gets updates of the mcc, and
1552 * notifies the ucode directly of any mcc change.
1553 * The ucode requests the driver to request the device to update geographic
1554 * regulatory profile according to the given MCC (Mobile Country Code).
1555 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1556 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1557 * MCC in the cmd response will be the relevant MCC in the NVM.
1558 * @mcc: given mobile country code
1559 * @source_id: identity of the change originator, see iwl_mcc_source
1560 * @reserved1: reserved for alignment
1561 */
1562struct iwl_mcc_chub_notif {
1563 u16 mcc;
1564 u8 source_id;
1565 u8 reserved1;
1566} __packed; /* LAR_MCC_NOTIFY_S */
1567
1568enum iwl_mcc_update_status {
1569 MCC_RESP_NEW_CHAN_PROFILE,
1570 MCC_RESP_SAME_CHAN_PROFILE,
1571 MCC_RESP_INVALID,
1572 MCC_RESP_NVM_DISABLED,
1573 MCC_RESP_ILLEGAL,
1574 MCC_RESP_LOW_PRIORITY,
6fa52430
MG
1575 MCC_RESP_TEST_MODE_ACTIVE,
1576 MCC_RESP_TEST_MODE_NOT_ACTIVE,
1577 MCC_RESP_TEST_MODE_DENIAL_OF_SERVICE,
8ba2d7a1
EH
1578};
1579
1580enum iwl_mcc_source {
1581 MCC_SOURCE_OLD_FW = 0,
1582 MCC_SOURCE_ME = 1,
1583 MCC_SOURCE_BIOS = 2,
1584 MCC_SOURCE_3G_LTE_HOST = 3,
1585 MCC_SOURCE_3G_LTE_DEVICE = 4,
1586 MCC_SOURCE_WIFI = 5,
1587 MCC_SOURCE_RESERVED = 6,
1588 MCC_SOURCE_DEFAULT = 7,
1589 MCC_SOURCE_UNINITIALIZED = 8,
6fa52430
MG
1590 MCC_SOURCE_MCC_API = 9,
1591 MCC_SOURCE_GET_CURRENT = 0x10,
1592 MCC_SOURCE_GETTING_MCC_TEST_MODE = 0x11,
8ba2d7a1
EH
1593};
1594
a0a09243
LC
1595/* DTS measurements */
1596
1597enum iwl_dts_measurement_flags {
1598 DTS_TRIGGER_CMD_FLAGS_TEMP = BIT(0),
1599 DTS_TRIGGER_CMD_FLAGS_VOLT = BIT(1),
1600};
1601
1602/**
1603 * iwl_dts_measurement_cmd - request DTS temperature and/or voltage measurements
1604 *
1605 * @flags: indicates which measurements we want as specified in &enum
1606 * iwl_dts_measurement_flags
1607 */
1608struct iwl_dts_measurement_cmd {
1609 __le32 flags;
1610} __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_CMD_S */
1611
78efc702
AN
1612/**
1613* enum iwl_dts_control_measurement_mode - DTS measurement type
1614* @DTS_AUTOMATIC: Automatic mode (full SW control). Provide temperature read
1615* back (latest value. Not waiting for new value). Use automatic
1616* SW DTS configuration.
1617* @DTS_REQUEST_READ: Request DTS read. Configure DTS with manual settings,
1618* trigger DTS reading and provide read back temperature read
1619* when available.
1620* @DTS_OVER_WRITE: over-write the DTS temperatures in the SW until next read
1621* @DTS_DIRECT_WITHOUT_MEASURE: DTS returns its latest temperature result,
1622* without measurement trigger.
1623*/
1624enum iwl_dts_control_measurement_mode {
1625 DTS_AUTOMATIC = 0,
1626 DTS_REQUEST_READ = 1,
1627 DTS_OVER_WRITE = 2,
1628 DTS_DIRECT_WITHOUT_MEASURE = 3,
1629};
1630
1631/**
1632* enum iwl_dts_used - DTS to use or used for measurement in the DTS request
1633* @DTS_USE_TOP: Top
1634* @DTS_USE_CHAIN_A: chain A
1635* @DTS_USE_CHAIN_B: chain B
1636* @DTS_USE_CHAIN_C: chain C
1637* @XTAL_TEMPERATURE - read temperature from xtal
1638*/
1639enum iwl_dts_used {
1640 DTS_USE_TOP = 0,
1641 DTS_USE_CHAIN_A = 1,
1642 DTS_USE_CHAIN_B = 2,
1643 DTS_USE_CHAIN_C = 3,
1644 XTAL_TEMPERATURE = 4,
1645};
1646
1647/**
1648* enum iwl_dts_bit_mode - bit-mode to use in DTS request read mode
1649* @DTS_BIT6_MODE: bit 6 mode
1650* @DTS_BIT8_MODE: bit 8 mode
1651*/
1652enum iwl_dts_bit_mode {
1653 DTS_BIT6_MODE = 0,
1654 DTS_BIT8_MODE = 1,
1655};
1656
1657/**
1658 * iwl_ext_dts_measurement_cmd - request extended DTS temperature measurements
1659 * @control_mode: see &enum iwl_dts_control_measurement_mode
1660 * @temperature: used when over write DTS mode is selected
1661 * @sensor: set temperature sensor to use. See &enum iwl_dts_used
1662 * @avg_factor: average factor to DTS in request DTS read mode
1663 * @bit_mode: value defines the DTS bit mode to use. See &enum iwl_dts_bit_mode
1664 * @step_duration: step duration for the DTS
1665 */
1666struct iwl_ext_dts_measurement_cmd {
1667 __le32 control_mode;
1668 __le32 temperature;
1669 __le32 sensor;
1670 __le32 avg_factor;
1671 __le32 bit_mode;
1672 __le32 step_duration;
1673} __packed; /* XVT_FW_DTS_CONTROL_MEASUREMENT_REQUEST_API_S */
1674
a0a09243
LC
1675/**
1676 * iwl_dts_measurement_notif - notification received with the measurements
1677 *
1678 * @temp: the measured temperature
1679 * @voltage: the measured voltage
1680 */
1681struct iwl_dts_measurement_notif {
1682 __le32 temp;
1683 __le32 voltage;
1684} __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_NTFY_S */
1685
77c5d7ef
AN
1686/***********************************
1687 * TDLS API
1688 ***********************************/
1689
1690/* Type of TDLS request */
1691enum iwl_tdls_channel_switch_type {
1692 TDLS_SEND_CHAN_SW_REQ = 0,
1693 TDLS_SEND_CHAN_SW_RESP_AND_MOVE_CH,
1694 TDLS_MOVE_CH,
1695}; /* TDLS_STA_CHANNEL_SWITCH_CMD_TYPE_API_E_VER_1 */
1696
1697/**
1698 * Switch timing sub-element in a TDLS channel-switch command
1699 * @frame_timestamp: GP2 timestamp of channel-switch request/response packet
1700 * received from peer
1701 * @max_offchan_duration: What amount of microseconds out of a DTIM is given
1702 * to the TDLS off-channel communication. For instance if the DTIM is
1703 * 200TU and the TDLS peer is to be given 25% of the time, the value
1704 * given will be 50TU, or 50 * 1024 if translated into microseconds.
1705 * @switch_time: switch time the peer sent in its channel switch timing IE
1706 * @switch_timout: switch timeout the peer sent in its channel switch timing IE
1707 */
1708struct iwl_tdls_channel_switch_timing {
1709 __le32 frame_timestamp; /* GP2 time of peer packet Rx */
1710 __le32 max_offchan_duration; /* given in micro-seconds */
1711 __le32 switch_time; /* given in micro-seconds */
1712 __le32 switch_timeout; /* given in micro-seconds */
1713} __packed; /* TDLS_STA_CHANNEL_SWITCH_TIMING_DATA_API_S_VER_1 */
1714
1715#define IWL_TDLS_CH_SW_FRAME_MAX_SIZE 200
1716
1717/**
1718 * TDLS channel switch frame template
1719 *
1720 * A template representing a TDLS channel-switch request or response frame
1721 *
1722 * @switch_time_offset: offset to the channel switch timing IE in the template
1723 * @tx_cmd: Tx parameters for the frame
1724 * @data: frame data
1725 */
1726struct iwl_tdls_channel_switch_frame {
1727 __le32 switch_time_offset;
1728 struct iwl_tx_cmd tx_cmd;
1729 u8 data[IWL_TDLS_CH_SW_FRAME_MAX_SIZE];
1730} __packed; /* TDLS_STA_CHANNEL_SWITCH_FRAME_API_S_VER_1 */
1731
1732/**
1733 * TDLS channel switch command
1734 *
1735 * The command is sent to initiate a channel switch and also in response to
1736 * incoming TDLS channel-switch request/response packets from remote peers.
1737 *
1738 * @switch_type: see &enum iwl_tdls_channel_switch_type
1739 * @peer_sta_id: station id of TDLS peer
1740 * @ci: channel we switch to
1741 * @timing: timing related data for command
1742 * @frame: channel-switch request/response template, depending to switch_type
1743 */
1744struct iwl_tdls_channel_switch_cmd {
1745 u8 switch_type;
1746 __le32 peer_sta_id;
1747 struct iwl_fw_channel_info ci;
1748 struct iwl_tdls_channel_switch_timing timing;
1749 struct iwl_tdls_channel_switch_frame frame;
1750} __packed; /* TDLS_STA_CHANNEL_SWITCH_CMD_API_S_VER_1 */
1751
1752/**
1753 * TDLS channel switch start notification
1754 *
1755 * @status: non-zero on success
1756 * @offchannel_duration: duration given in microseconds
1757 * @sta_id: peer currently performing the channel-switch with
1758 */
1759struct iwl_tdls_channel_switch_notif {
1760 __le32 status;
1761 __le32 offchannel_duration;
1762 __le32 sta_id;
1763} __packed; /* TDLS_STA_CHANNEL_SWITCH_NTFY_API_S_VER_1 */
1764
307e4723
AN
1765/**
1766 * TDLS station info
1767 *
1768 * @sta_id: station id of the TDLS peer
1769 * @tx_to_peer_tid: TID reserved vs. the peer for FW based Tx
1770 * @tx_to_peer_ssn: initial SSN the FW should use for Tx on its TID vs the peer
1771 * @is_initiator: 1 if the peer is the TDLS link initiator, 0 otherwise
1772 */
1773struct iwl_tdls_sta_info {
1774 u8 sta_id;
1775 u8 tx_to_peer_tid;
1776 __le16 tx_to_peer_ssn;
1777 __le32 is_initiator;
1778} __packed; /* TDLS_STA_INFO_VER_1 */
1779
1780/**
1781 * TDLS basic config command
1782 *
1783 * @id_and_color: MAC id and color being configured
1784 * @tdls_peer_count: amount of currently connected TDLS peers
1785 * @tx_to_ap_tid: TID reverved vs. the AP for FW based Tx
1786 * @tx_to_ap_ssn: initial SSN the FW should use for Tx on its TID vs. the AP
1787 * @sta_info: per-station info. Only the first tdls_peer_count entries are set
1788 * @pti_req_data_offset: offset of network-level data for the PTI template
1789 * @pti_req_tx_cmd: Tx parameters for PTI request template
1790 * @pti_req_template: PTI request template data
1791 */
1792struct iwl_tdls_config_cmd {
1793 __le32 id_and_color; /* mac id and color */
1794 u8 tdls_peer_count;
1795 u8 tx_to_ap_tid;
1796 __le16 tx_to_ap_ssn;
1797 struct iwl_tdls_sta_info sta_info[IWL_MVM_TDLS_STA_COUNT];
1798
1799 __le32 pti_req_data_offset;
1800 struct iwl_tx_cmd pti_req_tx_cmd;
1801 u8 pti_req_template[0];
1802} __packed; /* TDLS_CONFIG_CMD_API_S_VER_1 */
1803
1804/**
1805 * TDLS per-station config information from FW
1806 *
1807 * @sta_id: station id of the TDLS peer
1808 * @tx_to_peer_last_seq: last sequence number used by FW during FW-based Tx to
1809 * the peer
1810 */
1811struct iwl_tdls_config_sta_info_res {
1812 __le16 sta_id;
1813 __le16 tx_to_peer_last_seq;
1814} __packed; /* TDLS_STA_INFO_RSP_VER_1 */
1815
1816/**
1817 * TDLS config information from FW
1818 *
1819 * @tx_to_ap_last_seq: last sequence number used by FW during FW-based Tx to AP
1820 * @sta_info: per-station TDLS config information
1821 */
1822struct iwl_tdls_config_res {
1823 __le32 tx_to_ap_last_seq;
1824 struct iwl_tdls_config_sta_info_res sta_info[IWL_MVM_TDLS_STA_COUNT];
1825} __packed; /* TDLS_CONFIG_RSP_API_S_VER_1 */
1826
04fd2c28
LK
1827#define TX_FIFO_MAX_NUM 8
1828#define RX_FIFO_MAX_NUM 2
1829
1830/**
1831 * Shared memory configuration information from the FW
1832 *
1833 * @shared_mem_addr: shared memory addr (pre 8000 HW set to 0x0 as MARBH is not
1834 * accessible)
1835 * @shared_mem_size: shared memory size
1836 * @sample_buff_addr: internal sample (mon/adc) buff addr (pre 8000 HW set to
1837 * 0x0 as accessible only via DBGM RDAT)
1838 * @sample_buff_size: internal sample buff size
1839 * @txfifo_addr: start addr of TXF0 (excluding the context table 0.5KB), (pre
1840 * 8000 HW set to 0x0 as not accessible)
1841 * @txfifo_size: size of TXF0 ... TXF7
1842 * @rxfifo_size: RXF1, RXF2 sizes. If there is no RXF2, it'll have a value of 0
1843 * @page_buff_addr: used by UMAC and performance debug (page miss analysis),
1844 * when paging is not supported this should be 0
1845 * @page_buff_size: size of %page_buff_addr
1846 */
1847struct iwl_shared_mem_cfg {
1848 __le32 shared_mem_addr;
1849 __le32 shared_mem_size;
1850 __le32 sample_buff_addr;
1851 __le32 sample_buff_size;
1852 __le32 txfifo_addr;
1853 __le32 txfifo_size[TX_FIFO_MAX_NUM];
1854 __le32 rxfifo_size[RX_FIFO_MAX_NUM];
1855 __le32 page_buff_addr;
1856 __le32 page_buff_size;
1857} __packed; /* SHARED_MEM_ALLOC_API_S_VER_1 */
1858
0db056d3
SS
1859#define MAX_STORED_BEACON_SIZE 600
1860
1861/**
1862 * Stored beacon notification
1863 *
1864 * @system_time: system time on air rise
1865 * @tsf: TSF on air rise
1866 * @beacon_timestamp: beacon on air rise
1867 * @phy_flags: general phy flags: band, modulation, etc.
1868 * @channel: channel this beacon was received on
1869 * @rates: rate in ucode internal format
1870 * @byte_count: frame's byte count
1871 */
1872struct iwl_stored_beacon_notif {
1873 __le32 system_time;
1874 __le64 tsf;
1875 __le32 beacon_timestamp;
1876 __le16 phy_flags;
1877 __le16 channel;
1878 __le32 rates;
1879 __le32 byte_count;
1880 u8 data[MAX_STORED_BEACON_SIZE];
1881} __packed; /* WOWLAN_STROED_BEACON_INFO_S_VER_1 */
1882
8ca151b5 1883#endif /* __fw_api_h__ */
This page took 0.50429 seconds and 5 git commands to generate.