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[PATCH] ieee80211: cleanup
[deliverable/linux.git] / drivers / net / wireless / ipw2100.h
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2c86c275
JK		 1/******************************************************************************
2
3 Copyright(c) 2003 - 2005 Intel Corporation. All rights reserved.
4
5 This program is free software; you can redistribute it and/or modify it
6 under the terms of version 2 of the GNU General Public License as
7 published by the Free Software Foundation.
8
9 This program is distributed in the hope that it will be useful, but WITHOUT
10 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 more details.
13
14 You should have received a copy of the GNU General Public License along with
15 this program; if not, write to the Free Software Foundation, Inc., 59
16 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17
18 The full GNU General Public License is included in this distribution in the
19 file called LICENSE.
20
21 Contact Information:
22 James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25******************************************************************************/
26#ifndef _IPW2100_H
27#define _IPW2100_H
28
29#include <linux/sched.h>
30#include <linux/interrupt.h>
31#include <linux/netdevice.h>
32#include <linux/etherdevice.h>
33#include <linux/list.h>
34#include <linux/delay.h>
35#include <linux/skbuff.h>
36#include <asm/io.h>
37#include <linux/socket.h>
38#include <linux/if_arp.h>
39#include <linux/wireless.h>
40#include <linux/version.h>
41#include <net/iw_handler.h> // new driver API
42
43#include <net/ieee80211.h>
44
45#include <linux/workqueue.h>
46
47#ifndef IRQ_NONE
48typedef void irqreturn_t;
49#define IRQ_NONE
50#define IRQ_HANDLED
51#define IRQ_RETVAL(x)
52#endif
53
54#if WIRELESS_EXT < 17
55#define IW_QUAL_QUAL_INVALID 0x10
56#define IW_QUAL_LEVEL_INVALID 0x20
57#define IW_QUAL_NOISE_INVALID 0x40
58#endif
59
60#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) )
61#define pci_dma_sync_single_for_cpu pci_dma_sync_single
62#define pci_dma_sync_single_for_device pci_dma_sync_single
63#endif
64
65#ifndef HAVE_FREE_NETDEV
66#define free_netdev(x) kfree(x)
67#endif
68
69
70
71struct ipw2100_priv;
72struct ipw2100_tx_packet;
73struct ipw2100_rx_packet;
74
75#ifdef CONFIG_IPW_DEBUG
76enum { IPW_DEBUG_ENABLED = 1 };
77extern u32 ipw2100_debug_level;
78#define IPW_DEBUG(level, message...) \
79do { \
80 if (ipw2100_debug_level & (level)) { \
81 printk(KERN_DEBUG "ipw2100: %c %s ", \
82 in_interrupt() ? 'I' : 'U', __FUNCTION__); \
83 printk(message); \
84 } \
85} while (0)
86#else
87enum { IPW_DEBUG_ENABLED = 0 };
88#define IPW_DEBUG(level, message...) do {} while (0)
89#endif /* CONFIG_IPW_DEBUG */
90
91#define IPW_DL_UNINIT 0x80000000
92#define IPW_DL_NONE 0x00000000
93#define IPW_DL_ALL 0x7FFFFFFF
94
95/*
96 * To use the debug system;
97 *
98 * If you are defining a new debug classification, simply add it to the #define
99 * list here in the form of:
100 *
101 * #define IPW_DL_xxxx VALUE
102 *
103 * shifting value to the left one bit from the previous entry. xxxx should be
104 * the name of the classification (for example, WEP)
105 *
106 * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your
107 * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want
108 * to send output to that classification.
109 *
110 * To add your debug level to the list of levels seen when you perform
111 *
112 * % cat /proc/net/ipw2100/debug_level
113 *
114 * you simply need to add your entry to the ipw2100_debug_levels array.
115 *
116 * If you do not see debug_level in /proc/net/ipw2100 then you do not have
117 * CONFIG_IPW_DEBUG defined in your kernel configuration
118 *
119 */
120
121#define IPW_DL_ERROR (1<<0)
122#define IPW_DL_WARNING (1<<1)
123#define IPW_DL_INFO (1<<2)
124#define IPW_DL_WX (1<<3)
125#define IPW_DL_HC (1<<5)
126#define IPW_DL_STATE (1<<6)
127
128#define IPW_DL_NOTIF (1<<10)
129#define IPW_DL_SCAN (1<<11)
130#define IPW_DL_ASSOC (1<<12)
131#define IPW_DL_DROP (1<<13)
132
133#define IPW_DL_IOCTL (1<<14)
134#define IPW_DL_RF_KILL (1<<17)
135
136
137#define IPW_DL_MANAGE (1<<15)
138#define IPW_DL_FW (1<<16)
139
140#define IPW_DL_FRAG (1<<21)
141#define IPW_DL_WEP (1<<22)
142#define IPW_DL_TX (1<<23)
143#define IPW_DL_RX (1<<24)
144#define IPW_DL_ISR (1<<25)
145#define IPW_DL_IO (1<<26)
146#define IPW_DL_TRACE (1<<28)
147
148#define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
149#define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
150#define IPW_DEBUG_INFO(f...) IPW_DEBUG(IPW_DL_INFO, ## f)
151#define IPW_DEBUG_WX(f...) IPW_DEBUG(IPW_DL_WX, ## f)
152#define IPW_DEBUG_SCAN(f...) IPW_DEBUG(IPW_DL_SCAN, ## f)
153#define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f)
154#define IPW_DEBUG_TRACE(f...) IPW_DEBUG(IPW_DL_TRACE, ## f)
155#define IPW_DEBUG_RX(f...) IPW_DEBUG(IPW_DL_RX, ## f)
156#define IPW_DEBUG_TX(f...) IPW_DEBUG(IPW_DL_TX, ## f)
157#define IPW_DEBUG_ISR(f...) IPW_DEBUG(IPW_DL_ISR, ## f)
158#define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f)
159#define IPW_DEBUG_WEP(f...) IPW_DEBUG(IPW_DL_WEP, ## f)
160#define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f)
161#define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f)
162#define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f)
163#define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f)
164#define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f)
165#define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f)
166#define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f)
167#define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
168#define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
169
170
171#define VERIFY(f) \
172{ \
173 int status = 0; \
174 status = f; \
175 if(status) \
176 return status; \
177}
178
179enum {
180 IPW_HW_STATE_DISABLED = 1,
181 IPW_HW_STATE_ENABLED = 0
182};
183
184struct ssid_context {
185 char ssid[IW_ESSID_MAX_SIZE + 1];
186 int ssid_len;
187 unsigned char bssid[ETH_ALEN];
188 int port_type;
189 int channel;
190
191};
192
193extern const char *port_type_str[];
194extern const char *band_str[];
195
196#define NUMBER_OF_BD_PER_COMMAND_PACKET 1
197#define NUMBER_OF_BD_PER_DATA_PACKET 2
198
199#define IPW_MAX_BDS 6
200#define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR 2
201#define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS 1
202
203#define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \
204 (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET)
205
206struct bd_status {
207 union {
208 struct { u8 nlf:1, txType:2, intEnabled:1, reserved:4;} fields;
209 u8 field;
210 } info;
211} __attribute__ ((packed));
212
213#define IPW_BUFDESC_LAST_FRAG 0
214
215struct ipw2100_bd {
216 u32 host_addr;
217 u32 buf_length;
218 struct bd_status status;
219 /* number of fragments for frame (should be set only for
220 * 1st TBD) */
221 u8 num_fragments;
222 u8 reserved[6];
223} __attribute__ ((packed));
224
225#define IPW_BD_QUEUE_LENGTH(n) (1<<n)
226#define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd))
227
228#define IPW_BD_STATUS_TX_FRAME_802_3 0x00
229#define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01
230#define IPW_BD_STATUS_TX_FRAME_COMMAND 0x02
231#define IPW_BD_STATUS_TX_FRAME_802_11 0x04
232#define IPW_BD_STATUS_TX_INTERRUPT_ENABLE 0x08
233
234struct ipw2100_bd_queue {
235 /* driver (virtual) pointer to queue */
236 struct ipw2100_bd *drv;
237
238 /* firmware (physical) pointer to queue */
239 dma_addr_t nic;
240
241 /* Length of phy memory allocated for BDs */
242 u32 size;
243
244 /* Number of BDs in queue (and in array) */
245 u32 entries;
246
247 /* Number of available BDs (invalid for NIC BDs) */
248 u32 available;
249
250 /* Offset of oldest used BD in array (next one to
251 * check for completion) */
252 u32 oldest;
253
254 /* Offset of next available (unused) BD */
255 u32 next;
256};
257
258#define RX_QUEUE_LENGTH 256
259#define TX_QUEUE_LENGTH 256
260#define HW_QUEUE_LENGTH 256
261
262#define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET)
263
264#define STATUS_TYPE_MASK 0x0000000f
265#define COMMAND_STATUS_VAL 0
266#define STATUS_CHANGE_VAL 1
267#define P80211_DATA_VAL 2
268#define P8023_DATA_VAL 3
269#define HOST_NOTIFICATION_VAL 4
270
271#define IPW2100_RSSI_TO_DBM (-98)
272
273struct ipw2100_status {
274 u32 frame_size;
275 u16 status_fields;
276 u8 flags;
277#define IPW_STATUS_FLAG_DECRYPTED (1<<0)
278#define IPW_STATUS_FLAG_WEP_ENCRYPTED (1<<1)
279#define IPW_STATUS_FLAG_CRC_ERROR (1<<2)
280 u8 rssi;
281} __attribute__ ((packed));
282
283struct ipw2100_status_queue {
284 /* driver (virtual) pointer to queue */
285 struct ipw2100_status *drv;
286
287 /* firmware (physical) pointer to queue */
288 dma_addr_t nic;
289
290 /* Length of phy memory allocated for BDs */
291 u32 size;
292};
293
294#define HOST_COMMAND_PARAMS_REG_LEN 100
295#define CMD_STATUS_PARAMS_REG_LEN 3
296
297#define IPW_WPA_CAPABILITIES 0x1
298#define IPW_WPA_LISTENINTERVAL 0x2
299#define IPW_WPA_AP_ADDRESS 0x4
300
301#define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
302
303struct ipw2100_wpa_assoc_frame {
304 u16 fixed_ie_mask;
305 struct {
306 u16 capab_info;
307 u16 listen_interval;
308 u8 current_ap[ETH_ALEN];
309 } fixed_ies;
310 u32 var_ie_len;
311 u8 var_ie[IPW_MAX_VAR_IE_LEN];
312};
313
314#define IPW_BSS 1
315#define IPW_MONITOR 2
316#define IPW_IBSS 3
317
318/**
319 * @struct _tx_cmd - HWCommand
320 * @brief H/W command structure.
321 */
322struct ipw2100_cmd_header {
323 u32 host_command_reg;
324 u32 host_command_reg1;
325 u32 sequence;
326 u32 host_command_len_reg;
327 u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN];
328 u32 cmd_status_reg;
329 u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN];
330 u32 rxq_base_ptr;
331 u32 rxq_next_ptr;
332 u32 rxq_host_ptr;
333 u32 txq_base_ptr;
334 u32 txq_next_ptr;
335 u32 txq_host_ptr;
336 u32 tx_status_reg;
337 u32 reserved;
338 u32 status_change_reg;
339 u32 reserved1[3];
340 u32 *ordinal1_ptr;
341 u32 *ordinal2_ptr;
342} __attribute__ ((packed));
343
344struct ipw2100_data_header {
345 u32 host_command_reg;
346 u32 host_command_reg1;
347 u8 encrypted; // BOOLEAN in win! TRUE if frame is enc by driver
348 u8 needs_encryption; // BOOLEAN in win! TRUE if frma need to be enc in NIC
349 u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key
350 u8 key_size; // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV
351 u8 key[16];
352 u8 reserved[10]; // f/w reserved
353 u8 src_addr[ETH_ALEN];
354 u8 dst_addr[ETH_ALEN];
355 u16 fragment_size;
356} __attribute__ ((packed));
357
358// Host command data structure
359struct host_command {
360 u32 host_command; // COMMAND ID
361 u32 host_command1; // COMMAND ID
362 u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID)
363 u32 host_command_length; // LENGTH
364 u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS
365} __attribute__ ((packed));
366
367
368typedef enum {
369 POWER_ON_RESET,
370 EXIT_POWER_DOWN_RESET,
371 SW_RESET,
372 EEPROM_RW,
373 SW_RE_INIT
374} ipw2100_reset_event;
375
376enum {
377 COMMAND = 0xCAFE,
378 DATA,
379 RX
380};
381
382
383struct ipw2100_tx_packet {
384 int type;
385 int index;
386 union {
387 struct { /* COMMAND */
388 struct ipw2100_cmd_header* cmd;
389 dma_addr_t cmd_phys;
390 } c_struct;
391 struct { /* DATA */
392 struct ipw2100_data_header* data;
393 dma_addr_t data_phys;
394 struct ieee80211_txb *txb;
395 } d_struct;
396 } info;
397 int jiffy_start;
398
399 struct list_head list;
400};
401
402
403struct ipw2100_rx_packet {
404 struct ipw2100_rx *rxp;
405 dma_addr_t dma_addr;
406 int jiffy_start;
407 struct sk_buff *skb;
408 struct list_head list;
409};
410
411#define FRAG_DISABLED (1<<31)
412#define RTS_DISABLED (1<<31)
413#define MAX_RTS_THRESHOLD 2304U
414#define MIN_RTS_THRESHOLD 1U
415#define DEFAULT_RTS_THRESHOLD 1000U
416
417#define DEFAULT_BEACON_INTERVAL 100U
418#define DEFAULT_SHORT_RETRY_LIMIT 7U
419#define DEFAULT_LONG_RETRY_LIMIT 4U
420
421struct ipw2100_ordinals {
422 u32 table1_addr;
423 u32 table2_addr;
424 u32 table1_size;
425 u32 table2_size;
426};
427
428/* Host Notification header */
429struct ipw2100_notification {
430 u32 hnhdr_subtype; /* type of host notification */
431 u32 hnhdr_size; /* size in bytes of data
432 or number of entries, if table.
433 Does NOT include header */
434} __attribute__ ((packed));
435
436#define MAX_KEY_SIZE 16
437#define MAX_KEYS 8
438
439#define IPW2100_WEP_ENABLE (1<<1)
440#define IPW2100_WEP_DROP_CLEAR (1<<2)
441
442#define IPW_NONE_CIPHER (1<<0)
443#define IPW_WEP40_CIPHER (1<<1)
444#define IPW_TKIP_CIPHER (1<<2)
445#define IPW_CCMP_CIPHER (1<<4)
446#define IPW_WEP104_CIPHER (1<<5)
447#define IPW_CKIP_CIPHER (1<<6)
448
449#define IPW_AUTH_OPEN 0
450#define IPW_AUTH_SHARED 1
451
452struct statistic {
453 int value;
454 int hi;
455 int lo;
456};
457
458#define INIT_STAT(x) do { \
459 (x)->value = (x)->hi = 0; \
460 (x)->lo = 0x7fffffff; \
461} while (0)
462#define SET_STAT(x,y) do { \
463 (x)->value = y; \
464 if ((x)->value > (x)->hi) (x)->hi = (x)->value; \
465 if ((x)->value < (x)->lo) (x)->lo = (x)->value; \
466} while (0)
467#define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \
468while (0)
469#define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \
470while (0)
471
472#define IPW2100_ERROR_QUEUE 5
473
474/* Power management code: enable or disable? */
475enum {
476#ifdef CONFIG_PM
477 IPW2100_PM_DISABLED = 0,
478 PM_STATE_SIZE = 16,
479#else
480 IPW2100_PM_DISABLED = 1,
481 PM_STATE_SIZE = 0,
482#endif
483};
484
485#define STATUS_POWERED (1<<0)
486#define STATUS_CMD_ACTIVE (1<<1) /**< host command in progress */
487#define STATUS_RUNNING (1<<2) /* Card initialized, but not enabled */
488#define STATUS_ENABLED (1<<3) /* Card enabled -- can scan,Tx,Rx */
489#define STATUS_STOPPING (1<<4) /* Card is in shutdown phase */
490#define STATUS_INITIALIZED (1<<5) /* Card is ready for external calls */
491#define STATUS_ASSOCIATING (1<<9) /* Associated, but no BSSID yet */
492#define STATUS_ASSOCIATED (1<<10) /* Associated and BSSID valid */
493#define STATUS_INT_ENABLED (1<<11)
494#define STATUS_RF_KILL_HW (1<<12)
495#define STATUS_RF_KILL_SW (1<<13)
496#define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW)
497#define STATUS_EXIT_PENDING (1<<14)
498
499#define STATUS_SCAN_PENDING (1<<23)
500#define STATUS_SCANNING (1<<24)
501#define STATUS_SCAN_ABORTING (1<<25)
502#define STATUS_SCAN_COMPLETE (1<<26)
503#define STATUS_WX_EVENT_PENDING (1<<27)
504#define STATUS_RESET_PENDING (1<<29)
505#define STATUS_SECURITY_UPDATED (1<<30) /* Security sync needed */
506
507
508
509/* Internal NIC states */
510#define IPW_STATE_INITIALIZED (1<<0)
511#define IPW_STATE_COUNTRY_FOUND (1<<1)
512#define IPW_STATE_ASSOCIATED (1<<2)
513#define IPW_STATE_ASSN_LOST (1<<3)
514#define IPW_STATE_ASSN_CHANGED (1<<4)
515#define IPW_STATE_SCAN_COMPLETE (1<<5)
516#define IPW_STATE_ENTERED_PSP (1<<6)
517#define IPW_STATE_LEFT_PSP (1<<7)
518#define IPW_STATE_RF_KILL (1<<8)
519#define IPW_STATE_DISABLED (1<<9)
520#define IPW_STATE_POWER_DOWN (1<<10)
521#define IPW_STATE_SCANNING (1<<11)
522
523
524
525#define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */
526#define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */
527#define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */
528#define CFG_CUSTOM_MAC (1<<3)
529#define CFG_LONG_PREAMBLE (1<<4)
530#define CFG_ASSOCIATE (1<<6)
531#define CFG_FIXED_RATE (1<<7)
532#define CFG_ADHOC_CREATE (1<<8)
533#define CFG_C3_DISABLED (1<<9)
534#define CFG_PASSIVE_SCAN (1<<10)
535
536#define CAP_SHARED_KEY (1<<0) /* Off = OPEN */
537#define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */
538
539struct ipw2100_priv {
540
541 int stop_hang_check; /* Set 1 when shutting down to kill hang_check */
542 int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */
543
544 struct ieee80211_device *ieee;
545 unsigned long status;
546 unsigned long config;
547 unsigned long capability;
548
549 /* Statistics */
550 int resets;
551 int reset_backoff;
552
553 /* Context */
554 u8 essid[IW_ESSID_MAX_SIZE];
555 u8 essid_len;
556 u8 bssid[ETH_ALEN];
557 u8 channel;
558 int last_mode;
559 int cstate_limit;
560
561 unsigned long connect_start;
562 unsigned long last_reset;
563
564 u32 channel_mask;
565 u32 fatal_error;
566 u32 fatal_errors[IPW2100_ERROR_QUEUE];
567 u32 fatal_index;
568 int eeprom_version;
569 int firmware_version;
570 unsigned long hw_features;
571 int hangs;
572 u32 last_rtc;
573 int dump_raw; /* 1 to dump raw bytes in /sys/.../memory */
574 u8* snapshot[0x30];
575
576 u8 mandatory_bssid_mac[ETH_ALEN];
577 u8 mac_addr[ETH_ALEN];
578
579 int power_mode;
580
581 /* WEP data */
582 struct ieee80211_security sec;
583 int messages_sent;
584
585
586 int short_retry_limit;
587 int long_retry_limit;
588
589 u32 rts_threshold;
590 u32 frag_threshold;
591
592 int in_isr;
593
594 u32 tx_rates;
595 int tx_power;
596 u32 beacon_interval;
597
598 char nick[IW_ESSID_MAX_SIZE + 1];
599
600 struct ipw2100_status_queue status_queue;
601
602 struct statistic txq_stat;
603 struct statistic rxq_stat;
604 struct ipw2100_bd_queue rx_queue;
605 struct ipw2100_bd_queue tx_queue;
606 struct ipw2100_rx_packet *rx_buffers;
607
608 struct statistic fw_pend_stat;
609 struct list_head fw_pend_list;
610
611 struct statistic msg_free_stat;
612 struct statistic msg_pend_stat;
613 struct list_head msg_free_list;
614 struct list_head msg_pend_list;
615 struct ipw2100_tx_packet *msg_buffers;
616
617 struct statistic tx_free_stat;
618 struct statistic tx_pend_stat;
619 struct list_head tx_free_list;
620 struct list_head tx_pend_list;
621 struct ipw2100_tx_packet *tx_buffers;
622
623 struct ipw2100_ordinals ordinals;
624
625 struct pci_dev *pci_dev;
626
627 struct proc_dir_entry *dir_dev;
628
629 struct net_device *net_dev;
630 struct iw_statistics wstats;
631
632 struct tasklet_struct irq_tasklet;
633
634 struct workqueue_struct *workqueue;
635 struct work_struct reset_work;
636 struct work_struct security_work;
637 struct work_struct wx_event_work;
638 struct work_struct hang_check;
639 struct work_struct rf_kill;
640
641 u32 interrupts;
642 int tx_interrupts;
643 int rx_interrupts;
644 int inta_other;
645
646 spinlock_t low_lock;
647 struct semaphore action_sem;
648 struct semaphore adapter_sem;
649
650 wait_queue_head_t wait_command_queue;
651#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
652 u32 pm_state[PM_STATE_SIZE];
653#endif
654};
655
656
657/*********************************************************
658 * Host Command -> From Driver to FW
659 *********************************************************/
660
661/**
662 * Host command identifiers
663 */
664#define HOST_COMPLETE 2
665#define SYSTEM_CONFIG 6
666#define SSID 8
667#define MANDATORY_BSSID 9
668#define AUTHENTICATION_TYPE 10
669#define ADAPTER_ADDRESS 11
670#define PORT_TYPE 12
671#define INTERNATIONAL_MODE 13
672#define CHANNEL 14
673#define RTS_THRESHOLD 15
674#define FRAG_THRESHOLD 16
675#define POWER_MODE 17
676#define TX_RATES 18
677#define BASIC_TX_RATES 19
678#define WEP_KEY_INFO 20
679#define WEP_KEY_INDEX 25
680#define WEP_FLAGS 26
681#define ADD_MULTICAST 27
682#define CLEAR_ALL_MULTICAST 28
683#define BEACON_INTERVAL 29
684#define ATIM_WINDOW 30
685#define CLEAR_STATISTICS 31
686#define SEND 33
687#define TX_POWER_INDEX 36
688#define BROADCAST_SCAN 43
689#define CARD_DISABLE 44
690#define PREFERRED_BSSID 45
691#define SET_SCAN_OPTIONS 46
692#define SCAN_DWELL_TIME 47
693#define SWEEP_TABLE 48
694#define AP_OR_STATION_TABLE 49
695#define GROUP_ORDINALS 50
696#define SHORT_RETRY_LIMIT 51
697#define LONG_RETRY_LIMIT 52
698
699#define HOST_PRE_POWER_DOWN 58
700#define CARD_DISABLE_PHY_OFF 61
701#define MSDU_TX_RATES 62
702
703
704// Rogue AP Detection
705#define SET_STATION_STAT_BITS 64
706#define CLEAR_STATIONS_STAT_BITS 65
707#define LEAP_ROGUE_MODE 66 //TODO tbw replaced by CFG_LEAP_ROGUE_AP
708#define SET_SECURITY_INFORMATION 67
709#define DISASSOCIATION_BSSID 68
710#define SET_WPA_IE 69
711
712
713
714// system configuration bit mask:
715//#define IPW_CFG_ANTENNA_SETTING 0x03
716//#define IPW_CFG_ANTENNA_A 0x01
717//#define IPW_CFG_ANTENNA_B 0x02
718#define IPW_CFG_MONITOR 0x00004
719//#define IPW_CFG_TX_STATUS_ENABLE 0x00008
720#define IPW_CFG_PREAMBLE_AUTO 0x00010
721#define IPW_CFG_IBSS_AUTO_START 0x00020
722//#define IPW_CFG_KERBEROS_ENABLE 0x00040
723#define IPW_CFG_LOOPBACK 0x00100
724//#define IPW_CFG_WNMP_PING_PASS 0x00200
725//#define IPW_CFG_DEBUG_ENABLE 0x00400
726#define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800
727//#define IPW_CFG_BT_PRIORITY 0x01000
728#define IPW_CFG_BT_SIDEBAND_SIGNAL 0x02000
729#define IPW_CFG_802_1x_ENABLE 0x04000
730#define IPW_CFG_BSS_MASK 0x08000
731#define IPW_CFG_IBSS_MASK 0x10000
732//#define IPW_CFG_DYNAMIC_CW 0x10000
733
734#define IPW_SCAN_NOASSOCIATE (1<<0)
735#define IPW_SCAN_MIXED_CELL (1<<1)
736/* RESERVED (1<<2) */
737#define IPW_SCAN_PASSIVE (1<<3)
738
739#define IPW_NIC_FATAL_ERROR 0x2A7F0
740#define IPW_ERROR_ADDR(x) (x & 0x3FFFF)
741#define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24)
742#define IPW2100_ERR_C3_CORRUPTION (0x10 << 24)
743#define IPW2100_ERR_MSG_TIMEOUT (0x11 << 24)
744#define IPW2100_ERR_FW_LOAD (0x12 << 24)
745
746#define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND 0x200
747#define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80
748
749#define IPW_MEM_HOST_SHARED_RX_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40)
750#define IPW_MEM_HOST_SHARED_RX_STATUS_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44)
751#define IPW_MEM_HOST_SHARED_RX_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48)
752#define IPW_MEM_HOST_SHARED_RX_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0)
753
754#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
755#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
756#define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
757
758#define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \
759 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20)
760
761#define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
762 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
763
764
765#if 0
766#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
767#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
768#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x08)
769#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0c)
770#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x10)
771#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x14)
772#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x18)
773#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x1c)
774#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
775#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x84)
776#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x88)
777#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x8c)
778
779#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE(QueueNum) \
780 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + (QueueNum<<3))
781#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE(QueueNum) \
782 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0004+(QueueNum<<3))
783#define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX(QueueNum) \
784 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0080+(QueueNum<<2))
785
786#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_WRITE_INDEX \
787 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x00)
788#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_WRITE_INDEX \
789 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x04)
790#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_WRITE_INDEX \
791 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x08)
792#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_WRITE_INDEX \
793 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x0c)
794#define IPW_MEM_HOST_SHARED_SLAVE_MODE_INT_REGISTER \
795 (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x78)
796
797#endif
798
799#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
800#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
801
802#define IPW2100_INTA_TX_TRANSFER (0x00000001) // Bit 0 (LSB)
803#define IPW2100_INTA_RX_TRANSFER (0x00000002) // Bit 1
804#define IPW2100_INTA_TX_COMPLETE (0x00000004) // Bit 2
805#define IPW2100_INTA_EVENT_INTERRUPT (0x00000008) // Bit 3
806#define IPW2100_INTA_STATUS_CHANGE (0x00000010) // Bit 4
807#define IPW2100_INTA_BEACON_PERIOD_EXPIRED (0x00000020) // Bit 5
808#define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE (0x00010000) // Bit 16
809#define IPW2100_INTA_FW_INIT_DONE (0x01000000) // Bit 24
810#define IPW2100_INTA_FW_CALIBRATION_CALC (0x02000000) // Bit 25
811#define IPW2100_INTA_FATAL_ERROR (0x40000000) // Bit 30
812#define IPW2100_INTA_PARITY_ERROR (0x80000000) // Bit 31 (MSB)
813
814#define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET (0x00000001)
815#define IPW_AUX_HOST_RESET_REG_FORCE_NMI (0x00000002)
816#define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI (0x00000004)
817#define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI (0x00000008)
818#define IPW_AUX_HOST_RESET_REG_SW_RESET (0x00000080)
819#define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED (0x00000100)
820#define IPW_AUX_HOST_RESET_REG_STOP_MASTER (0x00000200)
821
822#define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY (0x00000001) // Bit 0 (LSB)
823#define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY (0x00000002) // Bit 1
824#define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE (0x00000004) // Bit 2
825#define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG (0x000007c0) // Bits 6-10
826#define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE (0x00000200) // Bit 9
827#define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE (0x00000400) // Bit 10
828#define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE (0x20000000) // Bit 29
829#define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK (0x40000000) // Bit 30
830#define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK (0x80000000) // Bit 31 (MSB)
831
832#define IPW_BIT_GPIO_GPIO1_MASK 0x0000000C
833#define IPW_BIT_GPIO_GPIO3_MASK 0x000000C0
834#define IPW_BIT_GPIO_GPIO1_ENABLE 0x00000008
835#define IPW_BIT_GPIO_RF_KILL 0x00010000
836
837#define IPW_BIT_GPIO_LED_OFF 0x00002000 // Bit 13 = 1
838
839#define IPW_REG_DOMAIN_0_OFFSET 0x0000
840#define IPW_REG_DOMAIN_1_OFFSET IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND
841
842#define IPW_REG_INTA IPW_REG_DOMAIN_0_OFFSET + 0x0008
843#define IPW_REG_INTA_MASK IPW_REG_DOMAIN_0_OFFSET + 0x000C
844#define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010
845#define IPW_REG_INDIRECT_ACCESS_DATA IPW_REG_DOMAIN_0_OFFSET + 0x0014
846#define IPW_REG_AUTOINCREMENT_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0018
847#define IPW_REG_AUTOINCREMENT_DATA IPW_REG_DOMAIN_0_OFFSET + 0x001C
848#define IPW_REG_RESET_REG IPW_REG_DOMAIN_0_OFFSET + 0x0020
849#define IPW_REG_GP_CNTRL IPW_REG_DOMAIN_0_OFFSET + 0x0024
850#define IPW_REG_GPIO IPW_REG_DOMAIN_0_OFFSET + 0x0030
851#define IPW_REG_FW_TYPE IPW_REG_DOMAIN_1_OFFSET + 0x0188
852#define IPW_REG_FW_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x018C
853#define IPW_REG_FW_COMPATABILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190
854
855#define IPW_REG_INDIRECT_ADDR_MASK 0x00FFFFFC
856
857#define IPW_INTERRUPT_MASK 0xC1010013
858
859#define IPW2100_CONTROL_REG 0x220000
860#define IPW2100_CONTROL_PHY_OFF 0x8
861
862#define IPW2100_COMMAND 0x00300004
863#define IPW2100_COMMAND_PHY_ON 0x0
864#define IPW2100_COMMAND_PHY_OFF 0x1
865
866/* in DEBUG_AREA, values of memory always 0xd55555d5 */
867#define IPW_REG_DOA_DEBUG_AREA_START IPW_REG_DOMAIN_0_OFFSET + 0x0090
868#define IPW_REG_DOA_DEBUG_AREA_END IPW_REG_DOMAIN_0_OFFSET + 0x00FF
869#define IPW_DATA_DOA_DEBUG_VALUE 0xd55555d5
870
871#define IPW_INTERNAL_REGISTER_HALT_AND_RESET 0x003000e0
872
873#define IPW_WAIT_CLOCK_STABILIZATION_DELAY 50 // micro seconds
874#define IPW_WAIT_RESET_ARC_COMPLETE_DELAY 10 // micro seconds
875#define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10 // micro seconds
876
877// BD ring queue read/write difference
878#define IPW_BD_QUEUE_W_R_MIN_SPARE 2
879
880#define IPW_CACHE_LINE_LENGTH_DEFAULT 0x80
881
882#define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT 100 // 100 milli
883#define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT 100 // 100 milli
884
885
886
887
888#define IPW_HEADER_802_11_SIZE sizeof(struct ieee80211_header_data)
889#define IPW_MAX_80211_PAYLOAD_SIZE 2304U
890#define IPW_MAX_802_11_PAYLOAD_LENGTH 2312
891#define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH 1536
892#define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH 60
893#define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \
894 (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \
895 sizeof(struct ethhdr))
896
897#define IPW_802_11_FCS_LENGTH 4
898#define IPW_RX_NIC_BUFFER_LENGTH \
899 (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \
900 IPW_802_11_FCS_LENGTH)
901
902#define IPW_802_11_PAYLOAD_OFFSET \
903 (sizeof(struct ieee80211_header_data) + \
904 sizeof(struct ieee80211_snap_hdr))
905
906struct ipw2100_rx {
907 union {
908 unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH];
909 struct ieee80211_hdr header;
910 u32 status;
911 struct ipw2100_notification notification;
912 struct ipw2100_cmd_header command;
913 } rx_data;
914} __attribute__ ((packed));
915
916// Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved
917#define TX_RATE_1_MBIT 0x0001
918#define TX_RATE_2_MBIT 0x0002
919#define TX_RATE_5_5_MBIT 0x0004
920#define TX_RATE_11_MBIT 0x0008
921#define TX_RATE_MASK 0x000F
922#define DEFAULT_TX_RATES 0x000F
923
924#define IPW_POWER_MODE_CAM 0x00 //(always on)
925#define IPW_POWER_INDEX_1 0x01
926#define IPW_POWER_INDEX_2 0x02
927#define IPW_POWER_INDEX_3 0x03
928#define IPW_POWER_INDEX_4 0x04
929#define IPW_POWER_INDEX_5 0x05
930#define IPW_POWER_AUTO 0x06
931#define IPW_POWER_MASK 0x0F
932#define IPW_POWER_ENABLED 0x10
933#define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK)
934
935#define IPW_TX_POWER_AUTO 0
936#define IPW_TX_POWER_ENHANCED 1
937
938#define IPW_TX_POWER_DEFAULT 32
939#define IPW_TX_POWER_MIN 0
940#define IPW_TX_POWER_MAX 16
941#define IPW_TX_POWER_MIN_DBM (-12)
942#define IPW_TX_POWER_MAX_DBM 16
943
944#define FW_SCAN_DONOT_ASSOCIATE 0x0001 // Dont Attempt to Associate after Scan
945#define FW_SCAN_PASSIVE 0x0008 // Force PASSSIVE Scan
946
947#define REG_MIN_CHANNEL 0
948#define REG_MAX_CHANNEL 14
949
950#define REG_CHANNEL_MASK 0x00003FFF
951#define IPW_IBSS_11B_DEFAULT_MASK 0x87ff
952
953#define DIVERSITY_EITHER 0 // Use both antennas
954#define DIVERSITY_ANTENNA_A 1 // Use antenna A
955#define DIVERSITY_ANTENNA_B 2 // Use antenna B
956
957
958#define HOST_COMMAND_WAIT 0
959#define HOST_COMMAND_NO_WAIT 1
960
961#define LOCK_NONE 0
962#define LOCK_DRIVER 1
963#define LOCK_FW 2
964
965#define TYPE_SWEEP_ORD 0x000D
966#define TYPE_IBSS_STTN_ORD 0x000E
967#define TYPE_BSS_AP_ORD 0x000F
968#define TYPE_RAW_BEACON_ENTRY 0x0010
969#define TYPE_CALIBRATION_DATA 0x0011
970#define TYPE_ROGUE_AP_DATA 0x0012
971#define TYPE_ASSOCIATION_REQUEST 0x0013
972#define TYPE_REASSOCIATION_REQUEST 0x0014
973
974
975#define HW_FEATURE_RFKILL (0x0001)
976#define RF_KILLSWITCH_OFF (1)
977#define RF_KILLSWITCH_ON (0)
978
979#define IPW_COMMAND_POOL_SIZE 40
980
981#define IPW_START_ORD_TAB_1 1
982#define IPW_START_ORD_TAB_2 1000
983
984#define IPW_ORD_TAB_1_ENTRY_SIZE sizeof(u32)
985
986#define IS_ORDINAL_TABLE_ONE(mgr,id) \
987 ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size))
988#define IS_ORDINAL_TABLE_TWO(mgr,id) \
989 ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2)))
990
991#define BSS_ID_LENGTH 6
992
993// Fixed size data: Ordinal Table 1
994typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW
995// Transmit statistics
996 IPW_ORD_STAT_TX_HOST_REQUESTS = 1,// # of requested Host Tx's (MSDU)
997 IPW_ORD_STAT_TX_HOST_COMPLETE, // # of successful Host Tx's (MSDU)
998 IPW_ORD_STAT_TX_DIR_DATA, // # of successful Directed Tx's (MSDU)
999
1000 IPW_ORD_STAT_TX_DIR_DATA1 = 4, // # of successful Directed Tx's (MSDU) @ 1MB
1001 IPW_ORD_STAT_TX_DIR_DATA2, // # of successful Directed Tx's (MSDU) @ 2MB
1002 IPW_ORD_STAT_TX_DIR_DATA5_5, // # of successful Directed Tx's (MSDU) @ 5_5MB
1003 IPW_ORD_STAT_TX_DIR_DATA11, // # of successful Directed Tx's (MSDU) @ 11MB
1004 IPW_ORD_STAT_TX_DIR_DATA22, // # of successful Directed Tx's (MSDU) @ 22MB
1005
1006 IPW_ORD_STAT_TX_NODIR_DATA1 = 13,// # of successful Non_Directed Tx's (MSDU) @ 1MB
1007 IPW_ORD_STAT_TX_NODIR_DATA2, // # of successful Non_Directed Tx's (MSDU) @ 2MB
1008 IPW_ORD_STAT_TX_NODIR_DATA5_5, // # of successful Non_Directed Tx's (MSDU) @ 5.5MB
1009 IPW_ORD_STAT_TX_NODIR_DATA11, // # of successful Non_Directed Tx's (MSDU) @ 11MB
1010
1011 IPW_ORD_STAT_NULL_DATA = 21, // # of successful NULL data Tx's
1012 IPW_ORD_STAT_TX_RTS, // # of successful Tx RTS
1013 IPW_ORD_STAT_TX_CTS, // # of successful Tx CTS
1014 IPW_ORD_STAT_TX_ACK, // # of successful Tx ACK
1015 IPW_ORD_STAT_TX_ASSN, // # of successful Association Tx's
1016 IPW_ORD_STAT_TX_ASSN_RESP, // # of successful Association response Tx's
1017 IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's
1018 IPW_ORD_STAT_TX_REASSN_RESP, // # of successful Reassociation response Tx's
1019 IPW_ORD_STAT_TX_PROBE, // # of probes successfully transmitted
1020 IPW_ORD_STAT_TX_PROBE_RESP, // # of probe responses successfully transmitted
1021 IPW_ORD_STAT_TX_BEACON, // # of tx beacon
1022 IPW_ORD_STAT_TX_ATIM, // # of Tx ATIM
1023 IPW_ORD_STAT_TX_DISASSN, // # of successful Disassociation TX
1024 IPW_ORD_STAT_TX_AUTH, // # of successful Authentication Tx
1025 IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX
1026
1027 IPW_ORD_STAT_TX_TOTAL_BYTES = 41,// Total successful Tx data bytes
1028 IPW_ORD_STAT_TX_RETRIES, // # of Tx retries
1029 IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS
1030 IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS
1031 IPW_ORD_STAT_TX_RETRY5_5, // # of Tx retries at 5.5MBPS
1032 IPW_ORD_STAT_TX_RETRY11, // # of Tx retries at 11MBPS
1033
1034 IPW_ORD_STAT_TX_FAILURES = 51, // # of Tx Failures
1035 IPW_ORD_STAT_TX_ABORT_AT_HOP, //NS // # of Tx's aborted at hop time
1036 IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP,// # of times max tries in a hop failed
1037 IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup
1038 IPW_ORD_STAT_TX_ABORT_STX, //NS // # of times backoff aborted
1039 IPW_ORD_STAT_TX_DISASSN_FAIL, // # of times disassociation failed
1040 IPW_ORD_STAT_TX_ERR_CTS, // # of missed/bad CTS frames
1041 IPW_ORD_STAT_TX_BPDU, //NS // # of spanning tree BPDUs sent
1042 IPW_ORD_STAT_TX_ERR_ACK, // # of tx err due to acks
1043
1044 // Receive statistics
1045 IPW_ORD_STAT_RX_HOST = 61, // # of packets passed to host
1046 IPW_ORD_STAT_RX_DIR_DATA, // # of directed packets
1047 IPW_ORD_STAT_RX_DIR_DATA1, // # of directed packets at 1MB
1048 IPW_ORD_STAT_RX_DIR_DATA2, // # of directed packets at 2MB
1049 IPW_ORD_STAT_RX_DIR_DATA5_5, // # of directed packets at 5.5MB
1050 IPW_ORD_STAT_RX_DIR_DATA11, // # of directed packets at 11MB
1051 IPW_ORD_STAT_RX_DIR_DATA22, // # of directed packets at 22MB
1052
1053 IPW_ORD_STAT_RX_NODIR_DATA = 71,// # of nondirected packets
1054 IPW_ORD_STAT_RX_NODIR_DATA1, // # of nondirected packets at 1MB
1055 IPW_ORD_STAT_RX_NODIR_DATA2, // # of nondirected packets at 2MB
1056 IPW_ORD_STAT_RX_NODIR_DATA5_5, // # of nondirected packets at 5.5MB
1057 IPW_ORD_STAT_RX_NODIR_DATA11, // # of nondirected packets at 11MB
1058
1059 IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's
1060 IPW_ORD_STAT_RX_POLL, //NS // # of poll rx
1061 IPW_ORD_STAT_RX_RTS, // # of Rx RTS
1062 IPW_ORD_STAT_RX_CTS, // # of Rx CTS
1063 IPW_ORD_STAT_RX_ACK, // # of Rx ACK
1064 IPW_ORD_STAT_RX_CFEND, // # of Rx CF End
1065 IPW_ORD_STAT_RX_CFEND_ACK, // # of Rx CF End + CF Ack
1066 IPW_ORD_STAT_RX_ASSN, // # of Association Rx's
1067 IPW_ORD_STAT_RX_ASSN_RESP, // # of Association response Rx's
1068 IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's
1069 IPW_ORD_STAT_RX_REASSN_RESP, // # of Reassociation response Rx's
1070 IPW_ORD_STAT_RX_PROBE, // # of probe Rx's
1071 IPW_ORD_STAT_RX_PROBE_RESP, // # of probe response Rx's
1072 IPW_ORD_STAT_RX_BEACON, // # of Rx beacon
1073 IPW_ORD_STAT_RX_ATIM, // # of Rx ATIM
1074 IPW_ORD_STAT_RX_DISASSN, // # of disassociation Rx
1075 IPW_ORD_STAT_RX_AUTH, // # of authentication Rx
1076 IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx
1077
1078 IPW_ORD_STAT_RX_TOTAL_BYTES = 101,// Total rx data bytes received
1079 IPW_ORD_STAT_RX_ERR_CRC, // # of packets with Rx CRC error
1080 IPW_ORD_STAT_RX_ERR_CRC1, // # of Rx CRC errors at 1MB
1081 IPW_ORD_STAT_RX_ERR_CRC2, // # of Rx CRC errors at 2MB
1082 IPW_ORD_STAT_RX_ERR_CRC5_5, // # of Rx CRC errors at 5.5MB
1083 IPW_ORD_STAT_RX_ERR_CRC11, // # of Rx CRC errors at 11MB
1084
1085 IPW_ORD_STAT_RX_DUPLICATE1 = 112, // # of duplicate rx packets at 1MB
1086 IPW_ORD_STAT_RX_DUPLICATE2, // # of duplicate rx packets at 2MB
1087 IPW_ORD_STAT_RX_DUPLICATE5_5, // # of duplicate rx packets at 5.5MB
1088 IPW_ORD_STAT_RX_DUPLICATE11, // # of duplicate rx packets at 11MB
1089 IPW_ORD_STAT_RX_DUPLICATE = 119, // # of duplicate rx packets
1090
1091 IPW_ORD_PERS_DB_LOCK = 120, // # locking fw permanent db
1092 IPW_ORD_PERS_DB_SIZE, // # size of fw permanent db
1093 IPW_ORD_PERS_DB_ADDR, // # address of fw permanent db
1094 IPW_ORD_STAT_RX_INVALID_PROTOCOL, // # of rx frames with invalid protocol
1095 IPW_ORD_SYS_BOOT_TIME, // # Boot time
1096 IPW_ORD_STAT_RX_NO_BUFFER, // # of rx frames rejected due to no buffer
1097 IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late
1098 IPW_ORD_STAT_RX_ABORT_AT_HOP, //NS // # of rx frames aborted due to hop
1099 IPW_ORD_STAT_RX_MISSING_FRAG, // # of rx frames dropped due to missing fragment
1100 IPW_ORD_STAT_RX_ORPHAN_FRAG, // # of rx frames dropped due to non-sequential fragment
1101 IPW_ORD_STAT_RX_ORPHAN_FRAME, // # of rx frames dropped due to unmatched 1st frame
1102 IPW_ORD_STAT_RX_FRAG_AGEOUT, // # of rx frames dropped due to uncompleted frame
1103 IPW_ORD_STAT_RX_BAD_SSID, //NS // Bad SSID (unused)
1104 IPW_ORD_STAT_RX_ICV_ERRORS, // # of ICV errors during decryption
1105
1106// PSP Statistics
1107 IPW_ORD_STAT_PSP_SUSPENSION = 137,// # of times adapter suspended
1108 IPW_ORD_STAT_PSP_BCN_TIMEOUT, // # of beacon timeout
1109 IPW_ORD_STAT_PSP_POLL_TIMEOUT, // # of poll response timeouts
1110 IPW_ORD_STAT_PSP_NONDIR_TIMEOUT,// # of timeouts waiting for last broadcast/muticast pkt
1111 IPW_ORD_STAT_PSP_RX_DTIMS, // # of PSP DTIMs received
1112 IPW_ORD_STAT_PSP_RX_TIMS, // # of PSP TIMs received
1113 IPW_ORD_STAT_PSP_STATION_ID, // PSP Station ID
1114
1115// Association and roaming
1116 IPW_ORD_LAST_ASSN_TIME = 147, // RTC time of last association
1117 IPW_ORD_STAT_PERCENT_MISSED_BCNS,// current calculation of % missed beacons
1118 IPW_ORD_STAT_PERCENT_RETRIES, // current calculation of % missed tx retries
1119 IPW_ORD_ASSOCIATED_AP_PTR, // If associated, this is ptr to the associated
1120 // AP table entry. set to 0 if not associated
1121 IPW_ORD_AVAILABLE_AP_CNT, // # of AP's decsribed in the AP table
1122 IPW_ORD_AP_LIST_PTR, // Ptr to list of available APs
1123 IPW_ORD_STAT_AP_ASSNS, // # of associations
1124 IPW_ORD_STAT_ASSN_FAIL, // # of association failures
1125 IPW_ORD_STAT_ASSN_RESP_FAIL, // # of failuresdue to response fail
1126 IPW_ORD_STAT_FULL_SCANS, // # of full scans
1127
1128 IPW_ORD_CARD_DISABLED, // # Card Disabled
1129 IPW_ORD_STAT_ROAM_INHIBIT, // # of times roaming was inhibited due to ongoing activity
1130 IPW_FILLER_40,
1131 IPW_ORD_RSSI_AT_ASSN = 160, // RSSI of associated AP at time of association
1132 IPW_ORD_STAT_ASSN_CAUSE1, // # of reassociations due to no tx from AP in last N
1133 // hops or no prob_ responses in last 3 minutes
1134 IPW_ORD_STAT_ASSN_CAUSE2, // # of reassociations due to poor tx/rx quality
1135 IPW_ORD_STAT_ASSN_CAUSE3, // # of reassociations due to tx/rx quality with excessive
1136 // load at the AP
1137 IPW_ORD_STAT_ASSN_CAUSE4, // # of reassociations due to AP RSSI level fell below
1138 // eligible group
1139 IPW_ORD_STAT_ASSN_CAUSE5, // # of reassociations due to load leveling
1140 IPW_ORD_STAT_ASSN_CAUSE6, //NS // # of reassociations due to dropped by Ap
1141 IPW_FILLER_41,
1142 IPW_FILLER_42,
1143 IPW_FILLER_43,
1144 IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed
1145 IPW_ORD_STAT_AUTH_RESP_FAIL, // # of times authentication response failed
1146 IPW_ORD_STATION_TABLE_CNT, // # of entries in association table
1147
1148// Other statistics
1149 IPW_ORD_RSSI_AVG_CURR = 173, // Current avg RSSI
1150 IPW_ORD_STEST_RESULTS_CURR, //NS // Current self test results word
1151 IPW_ORD_STEST_RESULTS_CUM, //NS // Cummulative self test results word
1152 IPW_ORD_SELF_TEST_STATUS, //NS //
1153 IPW_ORD_POWER_MGMT_MODE, // Power mode - 0=CAM, 1=PSP
1154 IPW_ORD_POWER_MGMT_INDEX, //NS //
1155 IPW_ORD_COUNTRY_CODE, // IEEE country code as recv'd from beacon
1156 IPW_ORD_COUNTRY_CHANNELS, // channels suported by country
1157// IPW_ORD_COUNTRY_CHANNELS:
1158// For 11b the lower 2-byte are used for channels from 1-14
1159// and the higher 2-byte are not used.
1160 IPW_ORD_RESET_CNT, // # of adapter resets (warm)
1161 IPW_ORD_BEACON_INTERVAL, // Beacon interval
1162
1163 IPW_ORD_PRINCETON_VERSION = 184, //NS // Princeton Version
1164 IPW_ORD_ANTENNA_DIVERSITY, // TRUE if antenna diversity is disabled
1165 IPW_ORD_CCA_RSSI, //NS // CCA RSSI value (factory programmed)
1166 IPW_ORD_STAT_EEPROM_UPDATE, //NS // # of times config EEPROM updated
1167 IPW_ORD_DTIM_PERIOD, // # of beacon intervals between DTIMs
1168 IPW_ORD_OUR_FREQ, // current radio freq lower digits - channel ID
1169
1170 IPW_ORD_RTC_TIME = 190, // current RTC time
1171 IPW_ORD_PORT_TYPE, // operating mode
1172 IPW_ORD_CURRENT_TX_RATE, // current tx rate
1173 IPW_ORD_SUPPORTED_RATES, // Bitmap of supported tx rates
1174 IPW_ORD_ATIM_WINDOW, // current ATIM Window
1175 IPW_ORD_BASIC_RATES, // bitmap of basic tx rates
1176 IPW_ORD_NIC_HIGHEST_RATE, // bitmap of basic tx rates
1177 IPW_ORD_AP_HIGHEST_RATE, // bitmap of basic tx rates
1178 IPW_ORD_CAPABILITIES, // Management frame capability field
1179 IPW_ORD_AUTH_TYPE, // Type of authentication
1180 IPW_ORD_RADIO_TYPE, // Adapter card platform type
1181 IPW_ORD_RTS_THRESHOLD = 201, // Min length of packet after which RTS handshaking is used
1182 IPW_ORD_INT_MODE, // International mode
1183 IPW_ORD_FRAGMENTATION_THRESHOLD, // protocol frag threshold
1184 IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, // EEPROM offset in SRAM
1185 IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE, // EEPROM size in SRAM
1186 IPW_ORD_EEPROM_SKU_CAPABILITY, // EEPROM SKU Capability 206 =
1187 IPW_ORD_EEPROM_IBSS_11B_CHANNELS, // EEPROM IBSS 11b channel set
1188
1189 IPW_ORD_MAC_VERSION = 209, // MAC Version
1190 IPW_ORD_MAC_REVISION, // MAC Revision
1191 IPW_ORD_RADIO_VERSION, // Radio Version
1192 IPW_ORD_NIC_MANF_DATE_TIME, // MANF Date/Time STAMP
1193 IPW_ORD_UCODE_VERSION, // Ucode Version
1194 IPW_ORD_HW_RF_SWITCH_STATE = 214, // HW RF Kill Switch State
1195} ORDINALTABLE1;
1196//ENDOF TABLE1
1197
1198// ordinal table 2
1199// Variable length data:
1200#define IPW_FIRST_VARIABLE_LENGTH_ORDINAL 1001
1201
1202typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW
1203 IPW_ORD_STAT_BASE = 1000, // contains number of variable ORDs
1204 IPW_ORD_STAT_ADAPTER_MAC = 1001, // 6 bytes: our adapter MAC address
1205 IPW_ORD_STAT_PREFERRED_BSSID = 1002, // 6 bytes: BSSID of the preferred AP
1206 IPW_ORD_STAT_MANDATORY_BSSID = 1003, // 6 bytes: BSSID of the mandatory AP
1207 IPW_FILL_1, //NS //
1208 IPW_ORD_STAT_COUNTRY_TEXT = 1005, // 36 bytes: Country name text, First two bytes are Country code
1209 IPW_ORD_STAT_ASSN_SSID = 1006, // 32 bytes: ESSID String
1210 IPW_ORD_STATION_TABLE = 1007, // ? bytes: Station/AP table (via Direct SSID Scans)
1211 IPW_ORD_STAT_SWEEP_TABLE = 1008, // ? bytes: Sweep/Host Table table (via Broadcast Scans)
1212 IPW_ORD_STAT_ROAM_LOG = 1009, // ? bytes: Roaming log
1213 IPW_ORD_STAT_RATE_LOG = 1010, //NS // 0 bytes: Rate log
1214 IPW_ORD_STAT_FIFO = 1011, //NS // 0 bytes: Fifo buffer data structures
1215 IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011")
1216 IPW_ORD_STAT_FW_DATE = 1013, // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002")
1217 IPW_ORD_STAT_ASSN_AP_BSSID = 1014, // 6 bytes: MAC address of associated AP
1218 IPW_ORD_STAT_DEBUG = 1015, //NS // ? bytes:
1219 IPW_ORD_STAT_NIC_BPA_NUM = 1016, // 11 bytes: NIC BPA number in ASCII
1220 IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date
1221 IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018,
1222} ORDINALTABLE2; // NS - means Not Supported by FW
1223
1224#define IPW_LAST_VARIABLE_LENGTH_ORDINAL 1018
1225
1226#ifndef WIRELESS_SPY
1227#define WIRELESS_SPY // enable iwspy support
1228#endif
1229
1230extern struct iw_handler_def ipw2100_wx_handler_def;
1231extern struct iw_statistics *ipw2100_wx_wireless_stats(struct net_device * dev);
1232extern void ipw2100_wx_event_work(struct ipw2100_priv *priv);
1233
1234#define IPW_HOST_FW_SHARED_AREA0 0x0002f200
1235#define IPW_HOST_FW_SHARED_AREA0_END 0x0002f510 // 0x310 bytes
1236
1237#define IPW_HOST_FW_SHARED_AREA1 0x0002f610
1238#define IPW_HOST_FW_SHARED_AREA1_END 0x0002f630 // 0x20 bytes
1239
1240#define IPW_HOST_FW_SHARED_AREA2 0x0002fa00
1241#define IPW_HOST_FW_SHARED_AREA2_END 0x0002fa20 // 0x20 bytes
1242
1243#define IPW_HOST_FW_SHARED_AREA3 0x0002fc00
1244#define IPW_HOST_FW_SHARED_AREA3_END 0x0002fc10 // 0x10 bytes
1245
1246#define IPW_HOST_FW_INTERRUPT_AREA 0x0002ff80
1247#define IPW_HOST_FW_INTERRUPT_AREA_END 0x00030000 // 0x80 bytes
1248
1249struct ipw2100_fw_chunk {
1250 unsigned char *buf;
1251 long len;
1252 long pos;
1253 struct list_head list;
1254};
1255
1256struct ipw2100_fw_chunk_set {
1257 const void *data;
1258 unsigned long size;
1259};
1260
1261struct ipw2100_fw {
1262 int version;
1263 struct ipw2100_fw_chunk_set fw;
1264 struct ipw2100_fw_chunk_set uc;
1265 const struct firmware *fw_entry;
1266};
1267
1268int ipw2100_get_firmware(struct ipw2100_priv *priv, struct ipw2100_fw *fw);
1269void ipw2100_release_firmware(struct ipw2100_priv *priv, struct ipw2100_fw *fw);
1270int ipw2100_fw_download(struct ipw2100_priv *priv, struct ipw2100_fw *fw);
1271int ipw2100_ucode_download(struct ipw2100_priv *priv, struct ipw2100_fw *fw);
1272
1273#define MAX_FW_VERSION_LEN 14
1274
1275int ipw2100_get_fwversion(struct ipw2100_priv *priv, char *buf, size_t max);
1276int ipw2100_get_ucodeversion(struct ipw2100_priv *priv, char *buf, size_t max);
1277
1278#endif /* _IPW2100_H */
Linux kernel - Deliverables
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