projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 2c86c275 JK |
1 | /****************************************************************************** |
| 2 | ||
| 3 | Copyright(c) 2003 - 2005 Intel Corporation. All rights reserved. | |
| 4 | ||
| 5 | This program is free software; you can redistribute it and/or modify it | |
| 6 | under the terms of version 2 of the GNU General Public License as | |
| 7 | published by the Free Software Foundation. | |
| 8 | ||
| 9 | This program is distributed in the hope that it will be useful, but WITHOUT | |
| 10 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
| 12 | more details. | |
| 13 | ||
| 14 | You should have received a copy of the GNU General Public License along with | |
| 15 | this program; if not, write to the Free Software Foundation, Inc., 59 | |
| 16 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
| 17 | ||
| 18 | The full GNU General Public License is included in this distribution in the | |
| 19 | file called LICENSE. | |
| 20 | ||
| 21 | Contact Information: | |
| 22 | James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
| 23 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
| 24 | ||
| 25 | ******************************************************************************/ | |
| 26 | #ifndef _IPW2100_H | |
| 27 | #define _IPW2100_H | |
| 28 | ||
| 29 | #include <linux/sched.h> | |
| 30 | #include <linux/interrupt.h> | |
| 31 | #include <linux/netdevice.h> | |
| 32 | #include <linux/etherdevice.h> | |
| 33 | #include <linux/list.h> | |
| 34 | #include <linux/delay.h> | |
| 35 | #include <linux/skbuff.h> | |
| 36 | #include <asm/io.h> | |
| 37 | #include <linux/socket.h> | |
| 38 | #include <linux/if_arp.h> | |
| 39 | #include <linux/wireless.h> | |
| 40 | #include <linux/version.h> | |
| 41 | #include <net/iw_handler.h> // new driver API | |
| 42 | ||
| 43 | #include <net/ieee80211.h> | |
| 44 | ||
| 45 | #include <linux/workqueue.h> | |
| 46 | ||
| 2c86c275 JK |
47 | struct ipw2100_priv; |
| 48 | struct ipw2100_tx_packet; | |
| 49 | struct ipw2100_rx_packet; | |
| 50 | ||
| 2c86c275 JK |
51 | #define IPW_DL_UNINIT 0x80000000 |
| 52 | #define IPW_DL_NONE 0x00000000 | |
| 53 | #define IPW_DL_ALL 0x7FFFFFFF | |
| 54 | ||
| 55 | /* | |
| 56 | * To use the debug system; | |
| 57 | * | |
| 58 | * If you are defining a new debug classification, simply add it to the #define | |
| 59 | * list here in the form of: | |
| 60 | * | |
| 61 | * #define IPW_DL_xxxx VALUE | |
| 62 | * | |
| 63 | * shifting value to the left one bit from the previous entry. xxxx should be | |
| 64 | * the name of the classification (for example, WEP) | |
| 65 | * | |
| 66 | * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your | |
| 67 | * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want | |
| 68 | * to send output to that classification. | |
| 69 | * | |
| 70 | * To add your debug level to the list of levels seen when you perform | |
| 71 | * | |
| 72 | * % cat /proc/net/ipw2100/debug_level | |
| 73 | * | |
| 74 | * you simply need to add your entry to the ipw2100_debug_levels array. | |
| 75 | * | |
| 76 | * If you do not see debug_level in /proc/net/ipw2100 then you do not have | |
| 77 | * CONFIG_IPW_DEBUG defined in your kernel configuration | |
| 78 | * | |
| 79 | */ | |
| 80 | ||
| 81 | #define IPW_DL_ERROR (1<<0) | |
| 82 | #define IPW_DL_WARNING (1<<1) | |
| 83 | #define IPW_DL_INFO (1<<2) | |
| 84 | #define IPW_DL_WX (1<<3) | |
| 85 | #define IPW_DL_HC (1<<5) | |
| 86 | #define IPW_DL_STATE (1<<6) | |
| 87 | ||
| 88 | #define IPW_DL_NOTIF (1<<10) | |
| 89 | #define IPW_DL_SCAN (1<<11) | |
| 90 | #define IPW_DL_ASSOC (1<<12) | |
| 91 | #define IPW_DL_DROP (1<<13) | |
| 92 | ||
| 93 | #define IPW_DL_IOCTL (1<<14) | |
| 94 | #define IPW_DL_RF_KILL (1<<17) | |
| 95 | ||
| 96 | ||
| 97 | #define IPW_DL_MANAGE (1<<15) | |
| 98 | #define IPW_DL_FW (1<<16) | |
| 99 | ||
| 100 | #define IPW_DL_FRAG (1<<21) | |
| 101 | #define IPW_DL_WEP (1<<22) | |
| 102 | #define IPW_DL_TX (1<<23) | |
| 103 | #define IPW_DL_RX (1<<24) | |
| 104 | #define IPW_DL_ISR (1<<25) | |
| 105 | #define IPW_DL_IO (1<<26) | |
| 106 | #define IPW_DL_TRACE (1<<28) | |
| 107 | ||
| 108 | #define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a) | |
| 109 | #define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a) | |
| 110 | #define IPW_DEBUG_INFO(f...) IPW_DEBUG(IPW_DL_INFO, ## f) | |
| 111 | #define IPW_DEBUG_WX(f...) IPW_DEBUG(IPW_DL_WX, ## f) | |
| 112 | #define IPW_DEBUG_SCAN(f...) IPW_DEBUG(IPW_DL_SCAN, ## f) | |
| 113 | #define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f) | |
| 114 | #define IPW_DEBUG_TRACE(f...) IPW_DEBUG(IPW_DL_TRACE, ## f) | |
| 115 | #define IPW_DEBUG_RX(f...) IPW_DEBUG(IPW_DL_RX, ## f) | |
| 116 | #define IPW_DEBUG_TX(f...) IPW_DEBUG(IPW_DL_TX, ## f) | |
| 117 | #define IPW_DEBUG_ISR(f...) IPW_DEBUG(IPW_DL_ISR, ## f) | |
| 118 | #define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f) | |
| 119 | #define IPW_DEBUG_WEP(f...) IPW_DEBUG(IPW_DL_WEP, ## f) | |
| 120 | #define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f) | |
| 121 | #define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f) | |
| 122 | #define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f) | |
| 123 | #define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f) | |
| 124 | #define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f) | |
| 125 | #define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f) | |
| 126 | #define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f) | |
| 127 | #define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a) | |
| 128 | #define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a) | |
| 129 | ||
| 2c86c275 JK |
130 | enum { |
| 131 | IPW_HW_STATE_DISABLED = 1, | |
| 132 | IPW_HW_STATE_ENABLED = 0 | |
| 133 | }; | |
| 134 | ||
| 135 | struct ssid_context { | |
| 136 | char ssid[IW_ESSID_MAX_SIZE + 1]; | |
| 137 | int ssid_len; | |
| 138 | unsigned char bssid[ETH_ALEN]; | |
| 139 | int port_type; | |
| 140 | int channel; | |
| 141 | ||
| 142 | }; | |
| 143 | ||
| 144 | extern const char *port_type_str[]; | |
| 145 | extern const char *band_str[]; | |
| 146 | ||
| 147 | #define NUMBER_OF_BD_PER_COMMAND_PACKET 1 | |
| 148 | #define NUMBER_OF_BD_PER_DATA_PACKET 2 | |
| 149 | ||
| 150 | #define IPW_MAX_BDS 6 | |
| 151 | #define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR 2 | |
| 152 | #define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS 1 | |
| 153 | ||
| 154 | #define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \ | |
| 155 | (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET) | |
| 156 | ||
| 157 | struct bd_status { | |
| 158 | union { | |
| 159 | struct { u8 nlf:1, txType:2, intEnabled:1, reserved:4;} fields; | |
| 160 | u8 field; | |
| 161 | } info; | |
| 162 | } __attribute__ ((packed)); | |
| 163 | ||
| 2c86c275 JK |
164 | struct ipw2100_bd { |
| 165 | u32 host_addr; | |
| 166 | u32 buf_length; | |
| 167 | struct bd_status status; | |
| 168 | /* number of fragments for frame (should be set only for | |
| 169 | * 1st TBD) */ | |
| 170 | u8 num_fragments; | |
| 171 | u8 reserved[6]; | |
| 172 | } __attribute__ ((packed)); | |
| 173 | ||
| 174 | #define IPW_BD_QUEUE_LENGTH(n) (1<<n) | |
| 175 | #define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd)) | |
| 176 | ||
| 177 | #define IPW_BD_STATUS_TX_FRAME_802_3 0x00 | |
| 178 | #define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01 | |
| 179 | #define IPW_BD_STATUS_TX_FRAME_COMMAND 0x02 | |
| 180 | #define IPW_BD_STATUS_TX_FRAME_802_11 0x04 | |
| 181 | #define IPW_BD_STATUS_TX_INTERRUPT_ENABLE 0x08 | |
| 182 | ||
| 183 | struct ipw2100_bd_queue { | |
| 184 | /* driver (virtual) pointer to queue */ | |
| 185 | struct ipw2100_bd *drv; | |
| 186 | ||
| 187 | /* firmware (physical) pointer to queue */ | |
| 188 | dma_addr_t nic; | |
| 189 | ||
| 190 | /* Length of phy memory allocated for BDs */ | |
| 191 | u32 size; | |
| 192 | ||
| 193 | /* Number of BDs in queue (and in array) */ | |
| 194 | u32 entries; | |
| 195 | ||
| 196 | /* Number of available BDs (invalid for NIC BDs) */ | |
| 197 | u32 available; | |
| 198 | ||
| 199 | /* Offset of oldest used BD in array (next one to | |
| 200 | * check for completion) */ | |
| 201 | u32 oldest; | |
| 202 | ||
| 203 | /* Offset of next available (unused) BD */ | |
| 204 | u32 next; | |
| 205 | }; | |
| 206 | ||
| 207 | #define RX_QUEUE_LENGTH 256 | |
| 208 | #define TX_QUEUE_LENGTH 256 | |
| 209 | #define HW_QUEUE_LENGTH 256 | |
| 210 | ||
| 211 | #define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET) | |
| 212 | ||
| 213 | #define STATUS_TYPE_MASK 0x0000000f | |
| 214 | #define COMMAND_STATUS_VAL 0 | |
| 215 | #define STATUS_CHANGE_VAL 1 | |
| 216 | #define P80211_DATA_VAL 2 | |
| 217 | #define P8023_DATA_VAL 3 | |
| 218 | #define HOST_NOTIFICATION_VAL 4 | |
| 219 | ||
| 220 | #define IPW2100_RSSI_TO_DBM (-98) | |
| 221 | ||
| 222 | struct ipw2100_status { | |
| 223 | u32 frame_size; | |
| 224 | u16 status_fields; | |
| 225 | u8 flags; | |
| 226 | #define IPW_STATUS_FLAG_DECRYPTED (1<<0) | |
| 227 | #define IPW_STATUS_FLAG_WEP_ENCRYPTED (1<<1) | |
| 228 | #define IPW_STATUS_FLAG_CRC_ERROR (1<<2) | |
| 229 | u8 rssi; | |
| 230 | } __attribute__ ((packed)); | |
| 231 | ||
| 232 | struct ipw2100_status_queue { | |
| 233 | /* driver (virtual) pointer to queue */ | |
| 234 | struct ipw2100_status *drv; | |
| 235 | ||
| 236 | /* firmware (physical) pointer to queue */ | |
| 237 | dma_addr_t nic; | |
| 238 | ||
| 239 | /* Length of phy memory allocated for BDs */ | |
| 240 | u32 size; | |
| 241 | }; | |
| 242 | ||
| 243 | #define HOST_COMMAND_PARAMS_REG_LEN 100 | |
| 244 | #define CMD_STATUS_PARAMS_REG_LEN 3 | |
| 245 | ||
| 246 | #define IPW_WPA_CAPABILITIES 0x1 | |
| 247 | #define IPW_WPA_LISTENINTERVAL 0x2 | |
| 248 | #define IPW_WPA_AP_ADDRESS 0x4 | |
| 249 | ||
| 250 | #define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32)) | |
| 251 | ||
| 252 | struct ipw2100_wpa_assoc_frame { | |
| 253 | u16 fixed_ie_mask; | |
| 254 | struct { | |
| 255 | u16 capab_info; | |
| 256 | u16 listen_interval; | |
| 257 | u8 current_ap[ETH_ALEN]; | |
| 258 | } fixed_ies; | |
| 259 | u32 var_ie_len; | |
| 260 | u8 var_ie[IPW_MAX_VAR_IE_LEN]; | |
| 261 | }; | |
| 262 | ||
| 263 | #define IPW_BSS 1 | |
| 264 | #define IPW_MONITOR 2 | |
| 265 | #define IPW_IBSS 3 | |
| 266 | ||
| 267 | /** | |
| 268 | * @struct _tx_cmd - HWCommand | |
| 269 | * @brief H/W command structure. | |
| 270 | */ | |
| 271 | struct ipw2100_cmd_header { | |
| 272 | u32 host_command_reg; | |
| 273 | u32 host_command_reg1; | |
| 274 | u32 sequence; | |
| 275 | u32 host_command_len_reg; | |
| 276 | u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN]; | |
| 277 | u32 cmd_status_reg; | |
| 278 | u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN]; | |
| 279 | u32 rxq_base_ptr; | |
| 280 | u32 rxq_next_ptr; | |
| 281 | u32 rxq_host_ptr; | |
| 282 | u32 txq_base_ptr; | |
| 283 | u32 txq_next_ptr; | |
| 284 | u32 txq_host_ptr; | |
| 285 | u32 tx_status_reg; | |
| 286 | u32 reserved; | |
| 287 | u32 status_change_reg; | |
| 288 | u32 reserved1[3]; | |
| 289 | u32 *ordinal1_ptr; | |
| 290 | u32 *ordinal2_ptr; | |
| 291 | } __attribute__ ((packed)); | |
| 292 | ||
| 293 | struct ipw2100_data_header { | |
| 294 | u32 host_command_reg; | |
| 295 | u32 host_command_reg1; | |
| 296 | u8 encrypted; // BOOLEAN in win! TRUE if frame is enc by driver | |
| 297 | u8 needs_encryption; // BOOLEAN in win! TRUE if frma need to be enc in NIC | |
| 298 | u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key | |
| 299 | u8 key_size; // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV | |
| 300 | u8 key[16]; | |
| 301 | u8 reserved[10]; // f/w reserved | |
| 302 | u8 src_addr[ETH_ALEN]; | |
| 303 | u8 dst_addr[ETH_ALEN]; | |
| 304 | u16 fragment_size; | |
| 305 | } __attribute__ ((packed)); | |
| 306 | ||
| 070d0165 | 307 | /* Host command data structure */ |
| 2c86c275 JK |
308 | struct host_command { |
| 309 | u32 host_command; // COMMAND ID | |
| 310 | u32 host_command1; // COMMAND ID | |
| 311 | u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID) | |
| 312 | u32 host_command_length; // LENGTH | |
| 313 | u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS | |
| 314 | } __attribute__ ((packed)); | |
| 315 | ||
| 316 | ||
| 317 | typedef enum { | |
| 318 | POWER_ON_RESET, | |
| 319 | EXIT_POWER_DOWN_RESET, | |
| 320 | SW_RESET, | |
| 321 | EEPROM_RW, | |
| 322 | SW_RE_INIT | |
| 323 | } ipw2100_reset_event; | |
| 324 | ||
| 325 | enum { | |
| 326 | COMMAND = 0xCAFE, | |
| 327 | DATA, | |
| 328 | RX | |
| 329 | }; | |
| 330 | ||
| 331 | ||
| 332 | struct ipw2100_tx_packet { | |
| 333 | int type; | |
| 334 | int index; | |
| 335 | union { | |
| 336 | struct { /* COMMAND */ | |
| 337 | struct ipw2100_cmd_header* cmd; | |
| 338 | dma_addr_t cmd_phys; | |
| 339 | } c_struct; | |
| 340 | struct { /* DATA */ | |
| 341 | struct ipw2100_data_header* data; | |
| 342 | dma_addr_t data_phys; | |
| 343 | struct ieee80211_txb *txb; | |
| 344 | } d_struct; | |
| 345 | } info; | |
| 346 | int jiffy_start; | |
| 347 | ||
| 348 | struct list_head list; | |
| 349 | }; | |
| 350 | ||
| 351 | ||
| 352 | struct ipw2100_rx_packet { | |
| 353 | struct ipw2100_rx *rxp; | |
| 354 | dma_addr_t dma_addr; | |
| 355 | int jiffy_start; | |
| 356 | struct sk_buff *skb; | |
| 357 | struct list_head list; | |
| 358 | }; | |
| 359 | ||
| 360 | #define FRAG_DISABLED (1<<31) | |
| 361 | #define RTS_DISABLED (1<<31) | |
| 362 | #define MAX_RTS_THRESHOLD 2304U | |
| 363 | #define MIN_RTS_THRESHOLD 1U | |
| 364 | #define DEFAULT_RTS_THRESHOLD 1000U | |
| 365 | ||
| 366 | #define DEFAULT_BEACON_INTERVAL 100U | |
| 367 | #define DEFAULT_SHORT_RETRY_LIMIT 7U | |
| 368 | #define DEFAULT_LONG_RETRY_LIMIT 4U | |
| 369 | ||
| 370 | struct ipw2100_ordinals { | |
| 371 | u32 table1_addr; | |
| 372 | u32 table2_addr; | |
| 373 | u32 table1_size; | |
| 374 | u32 table2_size; | |
| 375 | }; | |
| 376 | ||
| 377 | /* Host Notification header */ | |
| 378 | struct ipw2100_notification { | |
| 379 | u32 hnhdr_subtype; /* type of host notification */ | |
| 380 | u32 hnhdr_size; /* size in bytes of data | |
| 381 | or number of entries, if table. | |
| 382 | Does NOT include header */ | |
| 383 | } __attribute__ ((packed)); | |
| 384 | ||
| 385 | #define MAX_KEY_SIZE 16 | |
| 386 | #define MAX_KEYS 8 | |
| 387 | ||
| 388 | #define IPW2100_WEP_ENABLE (1<<1) | |
| 389 | #define IPW2100_WEP_DROP_CLEAR (1<<2) | |
| 390 | ||
| 391 | #define IPW_NONE_CIPHER (1<<0) | |
| 392 | #define IPW_WEP40_CIPHER (1<<1) | |
| 393 | #define IPW_TKIP_CIPHER (1<<2) | |
| 394 | #define IPW_CCMP_CIPHER (1<<4) | |
| 395 | #define IPW_WEP104_CIPHER (1<<5) | |
| 396 | #define IPW_CKIP_CIPHER (1<<6) | |
| 397 | ||
| 398 | #define IPW_AUTH_OPEN 0 | |
| 399 | #define IPW_AUTH_SHARED 1 | |
| 400 | ||
| 401 | struct statistic { | |
| 402 | int value; | |
| 403 | int hi; | |
| 404 | int lo; | |
| 405 | }; | |
| 406 | ||
| 407 | #define INIT_STAT(x) do { \ | |
| 408 | (x)->value = (x)->hi = 0; \ | |
| 409 | (x)->lo = 0x7fffffff; \ | |
| 410 | } while (0) | |
| 411 | #define SET_STAT(x,y) do { \ | |
| 412 | (x)->value = y; \ | |
| 413 | if ((x)->value > (x)->hi) (x)->hi = (x)->value; \ | |
| 414 | if ((x)->value < (x)->lo) (x)->lo = (x)->value; \ | |
| 415 | } while (0) | |
| 416 | #define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \ | |
| 417 | while (0) | |
| 418 | #define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \ | |
| 419 | while (0) | |
| 420 | ||
| 421 | #define IPW2100_ERROR_QUEUE 5 | |
| 422 | ||
| 423 | /* Power management code: enable or disable? */ | |
| 424 | enum { | |
| 425 | #ifdef CONFIG_PM | |
| 426 | IPW2100_PM_DISABLED = 0, | |
| 427 | PM_STATE_SIZE = 16, | |
| 428 | #else | |
| 429 | IPW2100_PM_DISABLED = 1, | |
| 430 | PM_STATE_SIZE = 0, | |
| 431 | #endif | |
| 432 | }; | |
| 433 | ||
| 434 | #define STATUS_POWERED (1<<0) | |
| 435 | #define STATUS_CMD_ACTIVE (1<<1) /**< host command in progress */ | |
| 436 | #define STATUS_RUNNING (1<<2) /* Card initialized, but not enabled */ | |
| 437 | #define STATUS_ENABLED (1<<3) /* Card enabled -- can scan,Tx,Rx */ | |
| 438 | #define STATUS_STOPPING (1<<4) /* Card is in shutdown phase */ | |
| 439 | #define STATUS_INITIALIZED (1<<5) /* Card is ready for external calls */ | |
| 440 | #define STATUS_ASSOCIATING (1<<9) /* Associated, but no BSSID yet */ | |
| 441 | #define STATUS_ASSOCIATED (1<<10) /* Associated and BSSID valid */ | |
| 442 | #define STATUS_INT_ENABLED (1<<11) | |
| 443 | #define STATUS_RF_KILL_HW (1<<12) | |
| 444 | #define STATUS_RF_KILL_SW (1<<13) | |
| 445 | #define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW) | |
| 446 | #define STATUS_EXIT_PENDING (1<<14) | |
| 447 | ||
| 448 | #define STATUS_SCAN_PENDING (1<<23) | |
| 449 | #define STATUS_SCANNING (1<<24) | |
| 450 | #define STATUS_SCAN_ABORTING (1<<25) | |
| 451 | #define STATUS_SCAN_COMPLETE (1<<26) | |
| 452 | #define STATUS_WX_EVENT_PENDING (1<<27) | |
| 453 | #define STATUS_RESET_PENDING (1<<29) | |
| 454 | #define STATUS_SECURITY_UPDATED (1<<30) /* Security sync needed */ | |
| 455 | ||
| 456 | ||
| 457 | ||
| 458 | /* Internal NIC states */ | |
| 459 | #define IPW_STATE_INITIALIZED (1<<0) | |
| 460 | #define IPW_STATE_COUNTRY_FOUND (1<<1) | |
| 461 | #define IPW_STATE_ASSOCIATED (1<<2) | |
| 462 | #define IPW_STATE_ASSN_LOST (1<<3) | |
| 463 | #define IPW_STATE_ASSN_CHANGED (1<<4) | |
| 464 | #define IPW_STATE_SCAN_COMPLETE (1<<5) | |
| 465 | #define IPW_STATE_ENTERED_PSP (1<<6) | |
| 466 | #define IPW_STATE_LEFT_PSP (1<<7) | |
| 467 | #define IPW_STATE_RF_KILL (1<<8) | |
| 468 | #define IPW_STATE_DISABLED (1<<9) | |
| 469 | #define IPW_STATE_POWER_DOWN (1<<10) | |
| 470 | #define IPW_STATE_SCANNING (1<<11) | |
| 471 | ||
| 472 | ||
| 473 | ||
| 474 | #define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */ | |
| 475 | #define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */ | |
| 476 | #define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */ | |
| 477 | #define CFG_CUSTOM_MAC (1<<3) | |
| 478 | #define CFG_LONG_PREAMBLE (1<<4) | |
| 479 | #define CFG_ASSOCIATE (1<<6) | |
| 480 | #define CFG_FIXED_RATE (1<<7) | |
| 481 | #define CFG_ADHOC_CREATE (1<<8) | |
| 482 | #define CFG_C3_DISABLED (1<<9) | |
| 483 | #define CFG_PASSIVE_SCAN (1<<10) | |
| 484 | ||
| 485 | #define CAP_SHARED_KEY (1<<0) /* Off = OPEN */ | |
| 486 | #define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */ | |
| 487 | ||
| 488 | struct ipw2100_priv { | |
| 489 | ||
| 490 | int stop_hang_check; /* Set 1 when shutting down to kill hang_check */ | |
| 491 | int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */ | |
| 492 | ||
| 493 | struct ieee80211_device *ieee; | |
| 494 | unsigned long status; | |
| 495 | unsigned long config; | |
| 496 | unsigned long capability; | |
| 497 | ||
| 498 | /* Statistics */ | |
| 499 | int resets; | |
| 500 | int reset_backoff; | |
| 501 | ||
| 502 | /* Context */ | |
| 503 | u8 essid[IW_ESSID_MAX_SIZE]; | |
| 504 | u8 essid_len; | |
| 505 | u8 bssid[ETH_ALEN]; | |
| 506 | u8 channel; | |
| 507 | int last_mode; | |
| 508 | int cstate_limit; | |
| 509 | ||
| 510 | unsigned long connect_start; | |
| 511 | unsigned long last_reset; | |
| 512 | ||
| 513 | u32 channel_mask; | |
| 514 | u32 fatal_error; | |
| 515 | u32 fatal_errors[IPW2100_ERROR_QUEUE]; | |
| 516 | u32 fatal_index; | |
| 517 | int eeprom_version; | |
| 518 | int firmware_version; | |
| 519 | unsigned long hw_features; | |
| 520 | int hangs; | |
| 521 | u32 last_rtc; | |
| 522 | int dump_raw; /* 1 to dump raw bytes in /sys/.../memory */ | |
| 523 | u8* snapshot[0x30]; | |
| 524 | ||
| 525 | u8 mandatory_bssid_mac[ETH_ALEN]; | |
| 526 | u8 mac_addr[ETH_ALEN]; | |
| 527 | ||
| 528 | int power_mode; | |
| 529 | ||
| 530 | /* WEP data */ | |
| 531 | struct ieee80211_security sec; | |
| 532 | int messages_sent; | |
| 533 | ||
| 534 | ||
| 535 | int short_retry_limit; | |
| 536 | int long_retry_limit; | |
| 537 | ||
| 538 | u32 rts_threshold; | |
| 539 | u32 frag_threshold; | |
| 540 | ||
| 541 | int in_isr; | |
| 542 | ||
| 543 | u32 tx_rates; | |
| 544 | int tx_power; | |
| 545 | u32 beacon_interval; | |
| 546 | ||
| 547 | char nick[IW_ESSID_MAX_SIZE + 1]; | |
| 548 | ||
| 549 | struct ipw2100_status_queue status_queue; | |
| 550 | ||
| 551 | struct statistic txq_stat; | |
| 552 | struct statistic rxq_stat; | |
| 553 | struct ipw2100_bd_queue rx_queue; | |
| 554 | struct ipw2100_bd_queue tx_queue; | |
| 555 | struct ipw2100_rx_packet *rx_buffers; | |
| 556 | ||
| 557 | struct statistic fw_pend_stat; | |
| 558 | struct list_head fw_pend_list; | |
| 559 | ||
| 560 | struct statistic msg_free_stat; | |
| 561 | struct statistic msg_pend_stat; | |
| 562 | struct list_head msg_free_list; | |
| 563 | struct list_head msg_pend_list; | |
| 564 | struct ipw2100_tx_packet *msg_buffers; | |
| 565 | ||
| 566 | struct statistic tx_free_stat; | |
| 567 | struct statistic tx_pend_stat; | |
| 568 | struct list_head tx_free_list; | |
| 569 | struct list_head tx_pend_list; | |
| 570 | struct ipw2100_tx_packet *tx_buffers; | |
| 571 | ||
| 572 | struct ipw2100_ordinals ordinals; | |
| 573 | ||
| 574 | struct pci_dev *pci_dev; | |
| 575 | ||
| 576 | struct proc_dir_entry *dir_dev; | |
| 577 | ||
| 578 | struct net_device *net_dev; | |
| 579 | struct iw_statistics wstats; | |
| 580 | ||
| 581 | struct tasklet_struct irq_tasklet; | |
| 582 | ||
| 583 | struct workqueue_struct *workqueue; | |
| 584 | struct work_struct reset_work; | |
| 585 | struct work_struct security_work; | |
| 586 | struct work_struct wx_event_work; | |
| 587 | struct work_struct hang_check; | |
| 588 | struct work_struct rf_kill; | |
| 589 | ||
| 590 | u32 interrupts; | |
| 591 | int tx_interrupts; | |
| 592 | int rx_interrupts; | |
| 593 | int inta_other; | |
| 594 | ||
| 595 | spinlock_t low_lock; | |
| 596 | struct semaphore action_sem; | |
| 597 | struct semaphore adapter_sem; | |
| 598 | ||
| 599 | wait_queue_head_t wait_command_queue; | |
| 2c86c275 JK |
600 | }; |
| 601 | ||
| 602 | ||
| 603 | /********************************************************* | |
| 604 | * Host Command -> From Driver to FW | |
| 605 | *********************************************************/ | |
| 606 | ||
| 607 | /** | |
| 608 | * Host command identifiers | |
| 609 | */ | |
| 610 | #define HOST_COMPLETE 2 | |
| 611 | #define SYSTEM_CONFIG 6 | |
| 612 | #define SSID 8 | |
| 613 | #define MANDATORY_BSSID 9 | |
| 614 | #define AUTHENTICATION_TYPE 10 | |
| 615 | #define ADAPTER_ADDRESS 11 | |
| 616 | #define PORT_TYPE 12 | |
| 617 | #define INTERNATIONAL_MODE 13 | |
| 618 | #define CHANNEL 14 | |
| 619 | #define RTS_THRESHOLD 15 | |
| 620 | #define FRAG_THRESHOLD 16 | |
| 621 | #define POWER_MODE 17 | |
| 622 | #define TX_RATES 18 | |
| 623 | #define BASIC_TX_RATES 19 | |
| 624 | #define WEP_KEY_INFO 20 | |
| 625 | #define WEP_KEY_INDEX 25 | |
| 626 | #define WEP_FLAGS 26 | |
| 627 | #define ADD_MULTICAST 27 | |
| 628 | #define CLEAR_ALL_MULTICAST 28 | |
| 629 | #define BEACON_INTERVAL 29 | |
| 630 | #define ATIM_WINDOW 30 | |
| 631 | #define CLEAR_STATISTICS 31 | |
| 632 | #define SEND 33 | |
| 633 | #define TX_POWER_INDEX 36 | |
| 634 | #define BROADCAST_SCAN 43 | |
| 635 | #define CARD_DISABLE 44 | |
| 636 | #define PREFERRED_BSSID 45 | |
| 637 | #define SET_SCAN_OPTIONS 46 | |
| 638 | #define SCAN_DWELL_TIME 47 | |
| 639 | #define SWEEP_TABLE 48 | |
| 640 | #define AP_OR_STATION_TABLE 49 | |
| 641 | #define GROUP_ORDINALS 50 | |
| 642 | #define SHORT_RETRY_LIMIT 51 | |
| 643 | #define LONG_RETRY_LIMIT 52 | |
| 644 | ||
| 645 | #define HOST_PRE_POWER_DOWN 58 | |
| 646 | #define CARD_DISABLE_PHY_OFF 61 | |
| 647 | #define MSDU_TX_RATES 62 | |
| 648 | ||
| 649 | ||
| 070d0165 | 650 | /* Rogue AP Detection */ |
| 2c86c275 JK |
651 | #define SET_STATION_STAT_BITS 64 |
| 652 | #define CLEAR_STATIONS_STAT_BITS 65 | |
| 653 | #define LEAP_ROGUE_MODE 66 //TODO tbw replaced by CFG_LEAP_ROGUE_AP | |
| 654 | #define SET_SECURITY_INFORMATION 67 | |
| 655 | #define DISASSOCIATION_BSSID 68 | |
| 656 | #define SET_WPA_IE 69 | |
| 657 | ||
| 658 | ||
| 659 | ||
| 070d0165 | 660 | /* system configuration bit mask: */ |
| 2c86c275 | 661 | #define IPW_CFG_MONITOR 0x00004 |
| 2c86c275 JK |
662 | #define IPW_CFG_PREAMBLE_AUTO 0x00010 |
| 663 | #define IPW_CFG_IBSS_AUTO_START 0x00020 | |
| 2c86c275 | 664 | #define IPW_CFG_LOOPBACK 0x00100 |
| 2c86c275 | 665 | #define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800 |
| 2c86c275 JK |
666 | #define IPW_CFG_BT_SIDEBAND_SIGNAL 0x02000 |
| 667 | #define IPW_CFG_802_1x_ENABLE 0x04000 | |
| 668 | #define IPW_CFG_BSS_MASK 0x08000 | |
| 669 | #define IPW_CFG_IBSS_MASK 0x10000 | |
| 2c86c275 JK |
670 | |
| 671 | #define IPW_SCAN_NOASSOCIATE (1<<0) | |
| 672 | #define IPW_SCAN_MIXED_CELL (1<<1) | |
| 673 | /* RESERVED (1<<2) */ | |
| 674 | #define IPW_SCAN_PASSIVE (1<<3) | |
| 675 | ||
| 676 | #define IPW_NIC_FATAL_ERROR 0x2A7F0 | |
| 677 | #define IPW_ERROR_ADDR(x) (x & 0x3FFFF) | |
| 678 | #define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24) | |
| 679 | #define IPW2100_ERR_C3_CORRUPTION (0x10 << 24) | |
| 680 | #define IPW2100_ERR_MSG_TIMEOUT (0x11 << 24) | |
| 681 | #define IPW2100_ERR_FW_LOAD (0x12 << 24) | |
| 682 | ||
| 683 | #define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND 0x200 | |
| 684 | #define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80 | |
| 685 | ||
| 686 | #define IPW_MEM_HOST_SHARED_RX_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40) | |
| 687 | #define IPW_MEM_HOST_SHARED_RX_STATUS_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44) | |
| 688 | #define IPW_MEM_HOST_SHARED_RX_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48) | |
| 689 | #define IPW_MEM_HOST_SHARED_RX_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0) | |
| 690 | ||
| 691 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00) | |
| 692 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04) | |
| 693 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80) | |
| 694 | ||
| 695 | #define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \ | |
| 696 | (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20) | |
| 697 | ||
| 698 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \ | |
| 699 | (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND) | |
| 700 | ||
| 2c86c275 JK |
701 | #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180) |
| 702 | #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184) | |
| 703 | ||
| 704 | #define IPW2100_INTA_TX_TRANSFER (0x00000001) // Bit 0 (LSB) | |
| 705 | #define IPW2100_INTA_RX_TRANSFER (0x00000002) // Bit 1 | |
| 706 | #define IPW2100_INTA_TX_COMPLETE (0x00000004) // Bit 2 | |
| 707 | #define IPW2100_INTA_EVENT_INTERRUPT (0x00000008) // Bit 3 | |
| 708 | #define IPW2100_INTA_STATUS_CHANGE (0x00000010) // Bit 4 | |
| 709 | #define IPW2100_INTA_BEACON_PERIOD_EXPIRED (0x00000020) // Bit 5 | |
| 710 | #define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE (0x00010000) // Bit 16 | |
| 711 | #define IPW2100_INTA_FW_INIT_DONE (0x01000000) // Bit 24 | |
| 712 | #define IPW2100_INTA_FW_CALIBRATION_CALC (0x02000000) // Bit 25 | |
| 713 | #define IPW2100_INTA_FATAL_ERROR (0x40000000) // Bit 30 | |
| 714 | #define IPW2100_INTA_PARITY_ERROR (0x80000000) // Bit 31 (MSB) | |
| 715 | ||
| 716 | #define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET (0x00000001) | |
| 717 | #define IPW_AUX_HOST_RESET_REG_FORCE_NMI (0x00000002) | |
| 718 | #define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI (0x00000004) | |
| 719 | #define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI (0x00000008) | |
| 720 | #define IPW_AUX_HOST_RESET_REG_SW_RESET (0x00000080) | |
| 721 | #define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED (0x00000100) | |
| 722 | #define IPW_AUX_HOST_RESET_REG_STOP_MASTER (0x00000200) | |
| 723 | ||
| 724 | #define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY (0x00000001) // Bit 0 (LSB) | |
| 725 | #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY (0x00000002) // Bit 1 | |
| 726 | #define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE (0x00000004) // Bit 2 | |
| 727 | #define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG (0x000007c0) // Bits 6-10 | |
| 728 | #define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE (0x00000200) // Bit 9 | |
| 729 | #define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE (0x00000400) // Bit 10 | |
| 730 | #define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE (0x20000000) // Bit 29 | |
| 731 | #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK (0x40000000) // Bit 30 | |
| 732 | #define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK (0x80000000) // Bit 31 (MSB) | |
| 733 | ||
| 734 | #define IPW_BIT_GPIO_GPIO1_MASK 0x0000000C | |
| 735 | #define IPW_BIT_GPIO_GPIO3_MASK 0x000000C0 | |
| 736 | #define IPW_BIT_GPIO_GPIO1_ENABLE 0x00000008 | |
| 737 | #define IPW_BIT_GPIO_RF_KILL 0x00010000 | |
| 738 | ||
| 739 | #define IPW_BIT_GPIO_LED_OFF 0x00002000 // Bit 13 = 1 | |
| 740 | ||
| 741 | #define IPW_REG_DOMAIN_0_OFFSET 0x0000 | |
| 742 | #define IPW_REG_DOMAIN_1_OFFSET IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND | |
| 743 | ||
| 744 | #define IPW_REG_INTA IPW_REG_DOMAIN_0_OFFSET + 0x0008 | |
| 745 | #define IPW_REG_INTA_MASK IPW_REG_DOMAIN_0_OFFSET + 0x000C | |
| 746 | #define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010 | |
| 747 | #define IPW_REG_INDIRECT_ACCESS_DATA IPW_REG_DOMAIN_0_OFFSET + 0x0014 | |
| 748 | #define IPW_REG_AUTOINCREMENT_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0018 | |
| 749 | #define IPW_REG_AUTOINCREMENT_DATA IPW_REG_DOMAIN_0_OFFSET + 0x001C | |
| 750 | #define IPW_REG_RESET_REG IPW_REG_DOMAIN_0_OFFSET + 0x0020 | |
| 751 | #define IPW_REG_GP_CNTRL IPW_REG_DOMAIN_0_OFFSET + 0x0024 | |
| 752 | #define IPW_REG_GPIO IPW_REG_DOMAIN_0_OFFSET + 0x0030 | |
| 753 | #define IPW_REG_FW_TYPE IPW_REG_DOMAIN_1_OFFSET + 0x0188 | |
| 754 | #define IPW_REG_FW_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x018C | |
| 755 | #define IPW_REG_FW_COMPATABILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190 | |
| 756 | ||
| 757 | #define IPW_REG_INDIRECT_ADDR_MASK 0x00FFFFFC | |
| 758 | ||
| 759 | #define IPW_INTERRUPT_MASK 0xC1010013 | |
| 760 | ||
| 761 | #define IPW2100_CONTROL_REG 0x220000 | |
| 762 | #define IPW2100_CONTROL_PHY_OFF 0x8 | |
| 763 | ||
| 764 | #define IPW2100_COMMAND 0x00300004 | |
| 765 | #define IPW2100_COMMAND_PHY_ON 0x0 | |
| 766 | #define IPW2100_COMMAND_PHY_OFF 0x1 | |
| 767 | ||
| 768 | /* in DEBUG_AREA, values of memory always 0xd55555d5 */ | |
| 769 | #define IPW_REG_DOA_DEBUG_AREA_START IPW_REG_DOMAIN_0_OFFSET + 0x0090 | |
| 770 | #define IPW_REG_DOA_DEBUG_AREA_END IPW_REG_DOMAIN_0_OFFSET + 0x00FF | |
| 771 | #define IPW_DATA_DOA_DEBUG_VALUE 0xd55555d5 | |
| 772 | ||
| 773 | #define IPW_INTERNAL_REGISTER_HALT_AND_RESET 0x003000e0 | |
| 774 | ||
| 775 | #define IPW_WAIT_CLOCK_STABILIZATION_DELAY 50 // micro seconds | |
| 776 | #define IPW_WAIT_RESET_ARC_COMPLETE_DELAY 10 // micro seconds | |
| 777 | #define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10 // micro seconds | |
| 778 | ||
| 779 | // BD ring queue read/write difference | |
| 780 | #define IPW_BD_QUEUE_W_R_MIN_SPARE 2 | |
| 781 | ||
| 782 | #define IPW_CACHE_LINE_LENGTH_DEFAULT 0x80 | |
| 783 | ||
| 784 | #define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT 100 // 100 milli | |
| 785 | #define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT 100 // 100 milli | |
| 786 | ||
| 787 | ||
| 788 | ||
| 789 | ||
| 66b04a80 | 790 | #define IPW_HEADER_802_11_SIZE sizeof(struct ieee80211_hdr_3addr) |
| 2c86c275 JK |
791 | #define IPW_MAX_80211_PAYLOAD_SIZE 2304U |
| 792 | #define IPW_MAX_802_11_PAYLOAD_LENGTH 2312 | |
| 793 | #define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH 1536 | |
| 794 | #define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH 60 | |
| 795 | #define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \ | |
| 796 | (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \ | |
| 797 | sizeof(struct ethhdr)) | |
| 798 | ||
| 799 | #define IPW_802_11_FCS_LENGTH 4 | |
| 800 | #define IPW_RX_NIC_BUFFER_LENGTH \ | |
| 801 | (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \ | |
| 802 | IPW_802_11_FCS_LENGTH) | |
| 803 | ||
| 804 | #define IPW_802_11_PAYLOAD_OFFSET \ | |
| 66b04a80 | 805 | (sizeof(struct ieee80211_hdr_3addr) + \ |
| 2c86c275 JK |
806 | sizeof(struct ieee80211_snap_hdr)) |
| 807 | ||
| 808 | struct ipw2100_rx { | |
| 809 | union { | |
| 810 | unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH]; | |
| 811 | struct ieee80211_hdr header; | |
| 812 | u32 status; | |
| 813 | struct ipw2100_notification notification; | |
| 814 | struct ipw2100_cmd_header command; | |
| 815 | } rx_data; | |
| 816 | } __attribute__ ((packed)); | |
| 817 | ||
| 070d0165 | 818 | /* Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved */ |
| 2c86c275 JK |
819 | #define TX_RATE_1_MBIT 0x0001 |
| 820 | #define TX_RATE_2_MBIT 0x0002 | |
| 821 | #define TX_RATE_5_5_MBIT 0x0004 | |
| 822 | #define TX_RATE_11_MBIT 0x0008 | |
| 823 | #define TX_RATE_MASK 0x000F | |
| 824 | #define DEFAULT_TX_RATES 0x000F | |
| 825 | ||
| 826 | #define IPW_POWER_MODE_CAM 0x00 //(always on) | |
| 827 | #define IPW_POWER_INDEX_1 0x01 | |
| 828 | #define IPW_POWER_INDEX_2 0x02 | |
| 829 | #define IPW_POWER_INDEX_3 0x03 | |
| 830 | #define IPW_POWER_INDEX_4 0x04 | |
| 831 | #define IPW_POWER_INDEX_5 0x05 | |
| 832 | #define IPW_POWER_AUTO 0x06 | |
| 833 | #define IPW_POWER_MASK 0x0F | |
| 834 | #define IPW_POWER_ENABLED 0x10 | |
| 835 | #define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK) | |
| 836 | ||
| 837 | #define IPW_TX_POWER_AUTO 0 | |
| 838 | #define IPW_TX_POWER_ENHANCED 1 | |
| 839 | ||
| 840 | #define IPW_TX_POWER_DEFAULT 32 | |
| 841 | #define IPW_TX_POWER_MIN 0 | |
| 842 | #define IPW_TX_POWER_MAX 16 | |
| 843 | #define IPW_TX_POWER_MIN_DBM (-12) | |
| 844 | #define IPW_TX_POWER_MAX_DBM 16 | |
| 845 | ||
| 846 | #define FW_SCAN_DONOT_ASSOCIATE 0x0001 // Dont Attempt to Associate after Scan | |
| 847 | #define FW_SCAN_PASSIVE 0x0008 // Force PASSSIVE Scan | |
| 848 | ||
| 849 | #define REG_MIN_CHANNEL 0 | |
| 850 | #define REG_MAX_CHANNEL 14 | |
| 851 | ||
| 852 | #define REG_CHANNEL_MASK 0x00003FFF | |
| 853 | #define IPW_IBSS_11B_DEFAULT_MASK 0x87ff | |
| 854 | ||
| 855 | #define DIVERSITY_EITHER 0 // Use both antennas | |
| 856 | #define DIVERSITY_ANTENNA_A 1 // Use antenna A | |
| 857 | #define DIVERSITY_ANTENNA_B 2 // Use antenna B | |
| 858 | ||
| 859 | ||
| 860 | #define HOST_COMMAND_WAIT 0 | |
| 861 | #define HOST_COMMAND_NO_WAIT 1 | |
| 862 | ||
| 863 | #define LOCK_NONE 0 | |
| 864 | #define LOCK_DRIVER 1 | |
| 865 | #define LOCK_FW 2 | |
| 866 | ||
| 867 | #define TYPE_SWEEP_ORD 0x000D | |
| 868 | #define TYPE_IBSS_STTN_ORD 0x000E | |
| 869 | #define TYPE_BSS_AP_ORD 0x000F | |
| 870 | #define TYPE_RAW_BEACON_ENTRY 0x0010 | |
| 871 | #define TYPE_CALIBRATION_DATA 0x0011 | |
| 872 | #define TYPE_ROGUE_AP_DATA 0x0012 | |
| 873 | #define TYPE_ASSOCIATION_REQUEST 0x0013 | |
| 874 | #define TYPE_REASSOCIATION_REQUEST 0x0014 | |
| 875 | ||
| 876 | ||
| 877 | #define HW_FEATURE_RFKILL (0x0001) | |
| 878 | #define RF_KILLSWITCH_OFF (1) | |
| 879 | #define RF_KILLSWITCH_ON (0) | |
| 880 | ||
| 881 | #define IPW_COMMAND_POOL_SIZE 40 | |
| 882 | ||
| 883 | #define IPW_START_ORD_TAB_1 1 | |
| 884 | #define IPW_START_ORD_TAB_2 1000 | |
| 885 | ||
| 886 | #define IPW_ORD_TAB_1_ENTRY_SIZE sizeof(u32) | |
| 887 | ||
| 888 | #define IS_ORDINAL_TABLE_ONE(mgr,id) \ | |
| 889 | ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size)) | |
| 890 | #define IS_ORDINAL_TABLE_TWO(mgr,id) \ | |
| 891 | ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2))) | |
| 892 | ||
| 893 | #define BSS_ID_LENGTH 6 | |
| 894 | ||
| 895 | // Fixed size data: Ordinal Table 1 | |
| 896 | typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW | |
| 897 | // Transmit statistics | |
| 898 | IPW_ORD_STAT_TX_HOST_REQUESTS = 1,// # of requested Host Tx's (MSDU) | |
| 899 | IPW_ORD_STAT_TX_HOST_COMPLETE, // # of successful Host Tx's (MSDU) | |
| 900 | IPW_ORD_STAT_TX_DIR_DATA, // # of successful Directed Tx's (MSDU) | |
| 901 | ||
| 902 | IPW_ORD_STAT_TX_DIR_DATA1 = 4, // # of successful Directed Tx's (MSDU) @ 1MB | |
| 903 | IPW_ORD_STAT_TX_DIR_DATA2, // # of successful Directed Tx's (MSDU) @ 2MB | |
| 904 | IPW_ORD_STAT_TX_DIR_DATA5_5, // # of successful Directed Tx's (MSDU) @ 5_5MB | |
| 905 | IPW_ORD_STAT_TX_DIR_DATA11, // # of successful Directed Tx's (MSDU) @ 11MB | |
| 906 | IPW_ORD_STAT_TX_DIR_DATA22, // # of successful Directed Tx's (MSDU) @ 22MB | |
| 907 | ||
| 908 | IPW_ORD_STAT_TX_NODIR_DATA1 = 13,// # of successful Non_Directed Tx's (MSDU) @ 1MB | |
| 909 | IPW_ORD_STAT_TX_NODIR_DATA2, // # of successful Non_Directed Tx's (MSDU) @ 2MB | |
| 910 | IPW_ORD_STAT_TX_NODIR_DATA5_5, // # of successful Non_Directed Tx's (MSDU) @ 5.5MB | |
| 911 | IPW_ORD_STAT_TX_NODIR_DATA11, // # of successful Non_Directed Tx's (MSDU) @ 11MB | |
| 912 | ||
| 913 | IPW_ORD_STAT_NULL_DATA = 21, // # of successful NULL data Tx's | |
| 914 | IPW_ORD_STAT_TX_RTS, // # of successful Tx RTS | |
| 915 | IPW_ORD_STAT_TX_CTS, // # of successful Tx CTS | |
| 916 | IPW_ORD_STAT_TX_ACK, // # of successful Tx ACK | |
| 917 | IPW_ORD_STAT_TX_ASSN, // # of successful Association Tx's | |
| 918 | IPW_ORD_STAT_TX_ASSN_RESP, // # of successful Association response Tx's | |
| 919 | IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's | |
| 920 | IPW_ORD_STAT_TX_REASSN_RESP, // # of successful Reassociation response Tx's | |
| 921 | IPW_ORD_STAT_TX_PROBE, // # of probes successfully transmitted | |
| 922 | IPW_ORD_STAT_TX_PROBE_RESP, // # of probe responses successfully transmitted | |
| 923 | IPW_ORD_STAT_TX_BEACON, // # of tx beacon | |
| 924 | IPW_ORD_STAT_TX_ATIM, // # of Tx ATIM | |
| 925 | IPW_ORD_STAT_TX_DISASSN, // # of successful Disassociation TX | |
| 926 | IPW_ORD_STAT_TX_AUTH, // # of successful Authentication Tx | |
| 927 | IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX | |
| 928 | ||
| 929 | IPW_ORD_STAT_TX_TOTAL_BYTES = 41,// Total successful Tx data bytes | |
| 930 | IPW_ORD_STAT_TX_RETRIES, // # of Tx retries | |
| 931 | IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS | |
| 932 | IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS | |
| 933 | IPW_ORD_STAT_TX_RETRY5_5, // # of Tx retries at 5.5MBPS | |
| 934 | IPW_ORD_STAT_TX_RETRY11, // # of Tx retries at 11MBPS | |
| 935 | ||
| 936 | IPW_ORD_STAT_TX_FAILURES = 51, // # of Tx Failures | |
| 937 | IPW_ORD_STAT_TX_ABORT_AT_HOP, //NS // # of Tx's aborted at hop time | |
| 938 | IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP,// # of times max tries in a hop failed | |
| 939 | IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup | |
| 940 | IPW_ORD_STAT_TX_ABORT_STX, //NS // # of times backoff aborted | |
| 941 | IPW_ORD_STAT_TX_DISASSN_FAIL, // # of times disassociation failed | |
| 942 | IPW_ORD_STAT_TX_ERR_CTS, // # of missed/bad CTS frames | |
| 943 | IPW_ORD_STAT_TX_BPDU, //NS // # of spanning tree BPDUs sent | |
| 944 | IPW_ORD_STAT_TX_ERR_ACK, // # of tx err due to acks | |
| 945 | ||
| 946 | // Receive statistics | |
| 947 | IPW_ORD_STAT_RX_HOST = 61, // # of packets passed to host | |
| 948 | IPW_ORD_STAT_RX_DIR_DATA, // # of directed packets | |
| 949 | IPW_ORD_STAT_RX_DIR_DATA1, // # of directed packets at 1MB | |
| 950 | IPW_ORD_STAT_RX_DIR_DATA2, // # of directed packets at 2MB | |
| 951 | IPW_ORD_STAT_RX_DIR_DATA5_5, // # of directed packets at 5.5MB | |
| 952 | IPW_ORD_STAT_RX_DIR_DATA11, // # of directed packets at 11MB | |
| 953 | IPW_ORD_STAT_RX_DIR_DATA22, // # of directed packets at 22MB | |
| 954 | ||
| 955 | IPW_ORD_STAT_RX_NODIR_DATA = 71,// # of nondirected packets | |
| 956 | IPW_ORD_STAT_RX_NODIR_DATA1, // # of nondirected packets at 1MB | |
| 957 | IPW_ORD_STAT_RX_NODIR_DATA2, // # of nondirected packets at 2MB | |
| 958 | IPW_ORD_STAT_RX_NODIR_DATA5_5, // # of nondirected packets at 5.5MB | |
| 959 | IPW_ORD_STAT_RX_NODIR_DATA11, // # of nondirected packets at 11MB | |
| 960 | ||
| 961 | IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's | |
| 962 | IPW_ORD_STAT_RX_POLL, //NS // # of poll rx | |
| 963 | IPW_ORD_STAT_RX_RTS, // # of Rx RTS | |
| 964 | IPW_ORD_STAT_RX_CTS, // # of Rx CTS | |
| 965 | IPW_ORD_STAT_RX_ACK, // # of Rx ACK | |
| 966 | IPW_ORD_STAT_RX_CFEND, // # of Rx CF End | |
| 967 | IPW_ORD_STAT_RX_CFEND_ACK, // # of Rx CF End + CF Ack | |
| 968 | IPW_ORD_STAT_RX_ASSN, // # of Association Rx's | |
| 969 | IPW_ORD_STAT_RX_ASSN_RESP, // # of Association response Rx's | |
| 970 | IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's | |
| 971 | IPW_ORD_STAT_RX_REASSN_RESP, // # of Reassociation response Rx's | |
| 972 | IPW_ORD_STAT_RX_PROBE, // # of probe Rx's | |
| 973 | IPW_ORD_STAT_RX_PROBE_RESP, // # of probe response Rx's | |
| 974 | IPW_ORD_STAT_RX_BEACON, // # of Rx beacon | |
| 975 | IPW_ORD_STAT_RX_ATIM, // # of Rx ATIM | |
| 976 | IPW_ORD_STAT_RX_DISASSN, // # of disassociation Rx | |
| 977 | IPW_ORD_STAT_RX_AUTH, // # of authentication Rx | |
| 978 | IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx | |
| 979 | ||
| 980 | IPW_ORD_STAT_RX_TOTAL_BYTES = 101,// Total rx data bytes received | |
| 981 | IPW_ORD_STAT_RX_ERR_CRC, // # of packets with Rx CRC error | |
| 982 | IPW_ORD_STAT_RX_ERR_CRC1, // # of Rx CRC errors at 1MB | |
| 983 | IPW_ORD_STAT_RX_ERR_CRC2, // # of Rx CRC errors at 2MB | |
| 984 | IPW_ORD_STAT_RX_ERR_CRC5_5, // # of Rx CRC errors at 5.5MB | |
| 985 | IPW_ORD_STAT_RX_ERR_CRC11, // # of Rx CRC errors at 11MB | |
| 986 | ||
| 987 | IPW_ORD_STAT_RX_DUPLICATE1 = 112, // # of duplicate rx packets at 1MB | |
| 988 | IPW_ORD_STAT_RX_DUPLICATE2, // # of duplicate rx packets at 2MB | |
| 989 | IPW_ORD_STAT_RX_DUPLICATE5_5, // # of duplicate rx packets at 5.5MB | |
| 990 | IPW_ORD_STAT_RX_DUPLICATE11, // # of duplicate rx packets at 11MB | |
| 991 | IPW_ORD_STAT_RX_DUPLICATE = 119, // # of duplicate rx packets | |
| 992 | ||
| 993 | IPW_ORD_PERS_DB_LOCK = 120, // # locking fw permanent db | |
| 994 | IPW_ORD_PERS_DB_SIZE, // # size of fw permanent db | |
| 995 | IPW_ORD_PERS_DB_ADDR, // # address of fw permanent db | |
| 996 | IPW_ORD_STAT_RX_INVALID_PROTOCOL, // # of rx frames with invalid protocol | |
| 997 | IPW_ORD_SYS_BOOT_TIME, // # Boot time | |
| 998 | IPW_ORD_STAT_RX_NO_BUFFER, // # of rx frames rejected due to no buffer | |
| 999 | IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late | |
| 1000 | IPW_ORD_STAT_RX_ABORT_AT_HOP, //NS // # of rx frames aborted due to hop | |
| 1001 | IPW_ORD_STAT_RX_MISSING_FRAG, // # of rx frames dropped due to missing fragment | |
| 1002 | IPW_ORD_STAT_RX_ORPHAN_FRAG, // # of rx frames dropped due to non-sequential fragment | |
| 1003 | IPW_ORD_STAT_RX_ORPHAN_FRAME, // # of rx frames dropped due to unmatched 1st frame | |
| 1004 | IPW_ORD_STAT_RX_FRAG_AGEOUT, // # of rx frames dropped due to uncompleted frame | |
| 1005 | IPW_ORD_STAT_RX_BAD_SSID, //NS // Bad SSID (unused) | |
| 1006 | IPW_ORD_STAT_RX_ICV_ERRORS, // # of ICV errors during decryption | |
| 1007 | ||
| 1008 | // PSP Statistics | |
| 1009 | IPW_ORD_STAT_PSP_SUSPENSION = 137,// # of times adapter suspended | |
| 1010 | IPW_ORD_STAT_PSP_BCN_TIMEOUT, // # of beacon timeout | |
| 1011 | IPW_ORD_STAT_PSP_POLL_TIMEOUT, // # of poll response timeouts | |
| 1012 | IPW_ORD_STAT_PSP_NONDIR_TIMEOUT,// # of timeouts waiting for last broadcast/muticast pkt | |
| 1013 | IPW_ORD_STAT_PSP_RX_DTIMS, // # of PSP DTIMs received | |
| 1014 | IPW_ORD_STAT_PSP_RX_TIMS, // # of PSP TIMs received | |
| 1015 | IPW_ORD_STAT_PSP_STATION_ID, // PSP Station ID | |
| 1016 | ||
| 1017 | // Association and roaming | |
| 1018 | IPW_ORD_LAST_ASSN_TIME = 147, // RTC time of last association | |
| 1019 | IPW_ORD_STAT_PERCENT_MISSED_BCNS,// current calculation of % missed beacons | |
| 1020 | IPW_ORD_STAT_PERCENT_RETRIES, // current calculation of % missed tx retries | |
| 1021 | IPW_ORD_ASSOCIATED_AP_PTR, // If associated, this is ptr to the associated | |
| 1022 | // AP table entry. set to 0 if not associated | |
| 1023 | IPW_ORD_AVAILABLE_AP_CNT, // # of AP's decsribed in the AP table | |
| 1024 | IPW_ORD_AP_LIST_PTR, // Ptr to list of available APs | |
| 1025 | IPW_ORD_STAT_AP_ASSNS, // # of associations | |
| 1026 | IPW_ORD_STAT_ASSN_FAIL, // # of association failures | |
| 1027 | IPW_ORD_STAT_ASSN_RESP_FAIL, // # of failuresdue to response fail | |
| 1028 | IPW_ORD_STAT_FULL_SCANS, // # of full scans | |
| 1029 | ||
| 1030 | IPW_ORD_CARD_DISABLED, // # Card Disabled | |
| 1031 | IPW_ORD_STAT_ROAM_INHIBIT, // # of times roaming was inhibited due to ongoing activity | |
| 1032 | IPW_FILLER_40, | |
| 1033 | IPW_ORD_RSSI_AT_ASSN = 160, // RSSI of associated AP at time of association | |
| 1034 | IPW_ORD_STAT_ASSN_CAUSE1, // # of reassociations due to no tx from AP in last N | |
| 1035 | // hops or no prob_ responses in last 3 minutes | |
| 1036 | IPW_ORD_STAT_ASSN_CAUSE2, // # of reassociations due to poor tx/rx quality | |
| 1037 | IPW_ORD_STAT_ASSN_CAUSE3, // # of reassociations due to tx/rx quality with excessive | |
| 1038 | // load at the AP | |
| 1039 | IPW_ORD_STAT_ASSN_CAUSE4, // # of reassociations due to AP RSSI level fell below | |
| 1040 | // eligible group | |
| 1041 | IPW_ORD_STAT_ASSN_CAUSE5, // # of reassociations due to load leveling | |
| 1042 | IPW_ORD_STAT_ASSN_CAUSE6, //NS // # of reassociations due to dropped by Ap | |
| 1043 | IPW_FILLER_41, | |
| 1044 | IPW_FILLER_42, | |
| 1045 | IPW_FILLER_43, | |
| 1046 | IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed | |
| 1047 | IPW_ORD_STAT_AUTH_RESP_FAIL, // # of times authentication response failed | |
| 1048 | IPW_ORD_STATION_TABLE_CNT, // # of entries in association table | |
| 1049 | ||
| 1050 | // Other statistics | |
| 1051 | IPW_ORD_RSSI_AVG_CURR = 173, // Current avg RSSI | |
| 1052 | IPW_ORD_STEST_RESULTS_CURR, //NS // Current self test results word | |
| 1053 | IPW_ORD_STEST_RESULTS_CUM, //NS // Cummulative self test results word | |
| 1054 | IPW_ORD_SELF_TEST_STATUS, //NS // | |
| 1055 | IPW_ORD_POWER_MGMT_MODE, // Power mode - 0=CAM, 1=PSP | |
| 1056 | IPW_ORD_POWER_MGMT_INDEX, //NS // | |
| 1057 | IPW_ORD_COUNTRY_CODE, // IEEE country code as recv'd from beacon | |
| 1058 | IPW_ORD_COUNTRY_CHANNELS, // channels suported by country | |
| 1059 | // IPW_ORD_COUNTRY_CHANNELS: | |
| 1060 | // For 11b the lower 2-byte are used for channels from 1-14 | |
| 1061 | // and the higher 2-byte are not used. | |
| 1062 | IPW_ORD_RESET_CNT, // # of adapter resets (warm) | |
| 1063 | IPW_ORD_BEACON_INTERVAL, // Beacon interval | |
| 1064 | ||
| 1065 | IPW_ORD_PRINCETON_VERSION = 184, //NS // Princeton Version | |
| 1066 | IPW_ORD_ANTENNA_DIVERSITY, // TRUE if antenna diversity is disabled | |
| 1067 | IPW_ORD_CCA_RSSI, //NS // CCA RSSI value (factory programmed) | |
| 1068 | IPW_ORD_STAT_EEPROM_UPDATE, //NS // # of times config EEPROM updated | |
| 1069 | IPW_ORD_DTIM_PERIOD, // # of beacon intervals between DTIMs | |
| 1070 | IPW_ORD_OUR_FREQ, // current radio freq lower digits - channel ID | |
| 1071 | ||
| 1072 | IPW_ORD_RTC_TIME = 190, // current RTC time | |
| 1073 | IPW_ORD_PORT_TYPE, // operating mode | |
| 1074 | IPW_ORD_CURRENT_TX_RATE, // current tx rate | |
| 1075 | IPW_ORD_SUPPORTED_RATES, // Bitmap of supported tx rates | |
| 1076 | IPW_ORD_ATIM_WINDOW, // current ATIM Window | |
| 1077 | IPW_ORD_BASIC_RATES, // bitmap of basic tx rates | |
| 1078 | IPW_ORD_NIC_HIGHEST_RATE, // bitmap of basic tx rates | |
| 1079 | IPW_ORD_AP_HIGHEST_RATE, // bitmap of basic tx rates | |
| 1080 | IPW_ORD_CAPABILITIES, // Management frame capability field | |
| 1081 | IPW_ORD_AUTH_TYPE, // Type of authentication | |
| 1082 | IPW_ORD_RADIO_TYPE, // Adapter card platform type | |
| 1083 | IPW_ORD_RTS_THRESHOLD = 201, // Min length of packet after which RTS handshaking is used | |
| 1084 | IPW_ORD_INT_MODE, // International mode | |
| 1085 | IPW_ORD_FRAGMENTATION_THRESHOLD, // protocol frag threshold | |
| 1086 | IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, // EEPROM offset in SRAM | |
| 1087 | IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE, // EEPROM size in SRAM | |
| 1088 | IPW_ORD_EEPROM_SKU_CAPABILITY, // EEPROM SKU Capability 206 = | |
| 1089 | IPW_ORD_EEPROM_IBSS_11B_CHANNELS, // EEPROM IBSS 11b channel set | |
| 1090 | ||
| 1091 | IPW_ORD_MAC_VERSION = 209, // MAC Version | |
| 1092 | IPW_ORD_MAC_REVISION, // MAC Revision | |
| 1093 | IPW_ORD_RADIO_VERSION, // Radio Version | |
| 1094 | IPW_ORD_NIC_MANF_DATE_TIME, // MANF Date/Time STAMP | |
| 1095 | IPW_ORD_UCODE_VERSION, // Ucode Version | |
| 1096 | IPW_ORD_HW_RF_SWITCH_STATE = 214, // HW RF Kill Switch State | |
| 1097 | } ORDINALTABLE1; | |
| 2c86c275 JK |
1098 | |
| 1099 | // ordinal table 2 | |
| 1100 | // Variable length data: | |
| 1101 | #define IPW_FIRST_VARIABLE_LENGTH_ORDINAL 1001 | |
| 1102 | ||
| 1103 | typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW | |
| 1104 | IPW_ORD_STAT_BASE = 1000, // contains number of variable ORDs | |
| 1105 | IPW_ORD_STAT_ADAPTER_MAC = 1001, // 6 bytes: our adapter MAC address | |
| 1106 | IPW_ORD_STAT_PREFERRED_BSSID = 1002, // 6 bytes: BSSID of the preferred AP | |
| 1107 | IPW_ORD_STAT_MANDATORY_BSSID = 1003, // 6 bytes: BSSID of the mandatory AP | |
| 1108 | IPW_FILL_1, //NS // | |
| 1109 | IPW_ORD_STAT_COUNTRY_TEXT = 1005, // 36 bytes: Country name text, First two bytes are Country code | |
| 1110 | IPW_ORD_STAT_ASSN_SSID = 1006, // 32 bytes: ESSID String | |
| 1111 | IPW_ORD_STATION_TABLE = 1007, // ? bytes: Station/AP table (via Direct SSID Scans) | |
| 1112 | IPW_ORD_STAT_SWEEP_TABLE = 1008, // ? bytes: Sweep/Host Table table (via Broadcast Scans) | |
| 1113 | IPW_ORD_STAT_ROAM_LOG = 1009, // ? bytes: Roaming log | |
| 1114 | IPW_ORD_STAT_RATE_LOG = 1010, //NS // 0 bytes: Rate log | |
| 1115 | IPW_ORD_STAT_FIFO = 1011, //NS // 0 bytes: Fifo buffer data structures | |
| 1116 | IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011") | |
| 1117 | IPW_ORD_STAT_FW_DATE = 1013, // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002") | |
| 1118 | IPW_ORD_STAT_ASSN_AP_BSSID = 1014, // 6 bytes: MAC address of associated AP | |
| 1119 | IPW_ORD_STAT_DEBUG = 1015, //NS // ? bytes: | |
| 1120 | IPW_ORD_STAT_NIC_BPA_NUM = 1016, // 11 bytes: NIC BPA number in ASCII | |
| 1121 | IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date | |
| 1122 | IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018, | |
| 1123 | } ORDINALTABLE2; // NS - means Not Supported by FW | |
| 1124 | ||
| 1125 | #define IPW_LAST_VARIABLE_LENGTH_ORDINAL 1018 | |
| 1126 | ||
| 1127 | #ifndef WIRELESS_SPY | |
| 1128 | #define WIRELESS_SPY // enable iwspy support | |
| 1129 | #endif | |
| 1130 | ||
| 2c86c275 JK |
1131 | #define IPW_HOST_FW_SHARED_AREA0 0x0002f200 |
| 1132 | #define IPW_HOST_FW_SHARED_AREA0_END 0x0002f510 // 0x310 bytes | |
| 1133 | ||
| 1134 | #define IPW_HOST_FW_SHARED_AREA1 0x0002f610 | |
| 1135 | #define IPW_HOST_FW_SHARED_AREA1_END 0x0002f630 // 0x20 bytes | |
| 1136 | ||
| 1137 | #define IPW_HOST_FW_SHARED_AREA2 0x0002fa00 | |
| 1138 | #define IPW_HOST_FW_SHARED_AREA2_END 0x0002fa20 // 0x20 bytes | |
| 1139 | ||
| 1140 | #define IPW_HOST_FW_SHARED_AREA3 0x0002fc00 | |
| 1141 | #define IPW_HOST_FW_SHARED_AREA3_END 0x0002fc10 // 0x10 bytes | |
| 1142 | ||
| 1143 | #define IPW_HOST_FW_INTERRUPT_AREA 0x0002ff80 | |
| 1144 | #define IPW_HOST_FW_INTERRUPT_AREA_END 0x00030000 // 0x80 bytes | |
| 1145 | ||
| 1146 | struct ipw2100_fw_chunk { | |
| 1147 | unsigned char *buf; | |
| 1148 | long len; | |
| 1149 | long pos; | |
| 1150 | struct list_head list; | |
| 1151 | }; | |
| 1152 | ||
| 1153 | struct ipw2100_fw_chunk_set { | |
| 1154 | const void *data; | |
| 1155 | unsigned long size; | |
| 1156 | }; | |
| 1157 | ||
| 1158 | struct ipw2100_fw { | |
| 1159 | int version; | |
| 1160 | struct ipw2100_fw_chunk_set fw; | |
| 1161 | struct ipw2100_fw_chunk_set uc; | |
| 1162 | const struct firmware *fw_entry; | |
| 1163 | }; | |
| 1164 | ||
| 2c86c275 JK |
1165 | #define MAX_FW_VERSION_LEN 14 |
| 1166 | ||
| 2c86c275 | 1167 | #endif /* _IPW2100_H */ |